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1. DISP DISP follows 2nd byte of instruction before data if required except if mod 00 and r m 110 then EA disp high disp low SPECIFICATIONS Central Processor CPU 8086 5 MHz clock rate Note May be operated at 2 5 MHz or 5 MHz jumper selectable for use with 8086 Memory ROM 8K bytes 2316 2716 RAM 2K bytes expandable to 4K bytes 2142 Mnemonic and Description 17 7 Instruction Code 76543210 76543210 JNS Jump on not sign LOOP Loop CX times LOOPZ LOOPE Loop while zero equal LOOPNZ LOOPNE Loop while not zero equal JCXZ Jump on CX zero INT Interrupt Type specitied Type 3 INTO Interrupt on overflow IRET Interrupt return Processor Control CLC Clearcarry CMC Complement carry STC Set carry CLO Clear direction STO Set direction CL Clear interrupt STI Set interrupt KLT Halt ESC Escape to external device i LOCK Bus lock prefix 11110000 l it siw 01 then 16 bits of immediate data form the operand if s w 11 then an immediate data byte is sign extended to form the 16 bit operand i if v 0 then count 1 if v 0 then count in CL x don t care S if v 0 then count 1 if v 1 then count in CL register z is used for string primitives for comparison with ZF FLAG SEGMENT OVERRIDE PREFIX 001 reg110 REG is assigned according to the following table 16 Bit w 1 BBit w 0 Segment 000 pF2. Reg memory and register to either 001010dw STOS Stor byte wd frm AUA Immediate from register memory 100000s w mod10 1 rim data data it s w 01 a immediate from accumulator foo10110w daa _datailw 1 SOR Subtract with borrow n Reg memory and register to either 0001100 w 100000sw modot1 rim data Immediate from register memory CALL Call tL Call Immediate from accumulator ooorttow data dataitwet_ eve ren E aa Vag as ad re m betes Direct within segment akan DEC Decrement Bare ee 25 Sih ante Indirect within segment Register memory X Direct inters gment Register vee a DS Dr B aa g WEG Change sign Indirect intersegment Control Transfer Bo a ae Li disp low _disp nigh mod 010 rim continued 17 6 SDK 86 Table 4 8086 Instruction Set Summary Continued Mnemonic and Description JMP Unconditional Jump Direct within segment _ Instruction Code 76543210 76543210 76543210 Direct within segment short Indirect within segment Direct intersegment Indirect intersegment mod 101 r m RET Return from CALL Within segment l Within seg adding immed to SP 11000011 11000010 Intersegment Intersegment adding immediate to SP 11001010 JE JZ Jump on equal zero onio dsp Jo on JL JNGE Jump on less not greater or equa er ae oe ILENE Jump on less or equal not or
3. SCAN DIGIT SEGMENT HHH L T KEYBOARD 5888 B688 LED DISPLAY V0 VO CONNECTORS Figure 1 SDK 86 System Design Kit Functional Block Diagram 17 4 SDK 86 Documentation In addition to detailed information on using the moni tors the SDK 86 user s manual provides circuit dia grams a monitor listing and a description of how the system works The complete design library for the SDK 86 is shown in Figure 4 and listed in the specifica tions section under Reference Manuals _ EXECUTION UNIT BUS INTERFACE UNIT sdf P RELOCATION REGISTER FILE REGISTER FILE SEGMENT DATA REGISTERS POINTER AND AND INDEX REGS INSTRUCTION 8 WORDS POINTER 5 WORDS Figure 4 SDK 86 Design Library Table 1 Keyboard Mode Commands Starts monitor Allows user to execute user program and causes it to halt at predetermined program stop Useful for debugging Single step Allows user to execute user program one instruction at a time Useful for debugging Substitute Allows user to examine and memory modify memory locations in byte or word mode 7 Examine Allows user to examine and register modify 8086 register contents Block move Allows user to relocate pro gram and data portions in memory Input or output Allows direct control of SDK 86 I O facilities in byte or mode INTERFACE 16 BIT ALU INSTRUCTION QUEUE CONTROL amp TIMING CLK RESET READY MNIMX Vcc GND Table 2 S
4. iMUL Integer multiply signed 1 141011w modt01 rim PUSH Push Sunog Miia ee Galaa Hs Be 24 AAM ASCII adjust tor multiply 11010100 00001010 A 1111011 w modi to m _ rororo foooo1010 10011000 DIV Divide unsigned IDIV Integer divide signed AAD ASCIl adjust for divide CBW Convert byte to word Register memory 01010 reg Register Segment register 00 0 reg 110 Che ent Oy a a t ran POP Pop ss aa oof CWO Convert word to double word Segment register XCHG Exchange p os b Register memory with register one Logic Register with accumulator l MOT invert soo a a Lea tot w modo 10 rim i SHL SAL Shift logical arithmetic left 110 100v w mod100 rim N p a SON 4 SHR Shift logical right 110100vw modt01 rim Fixed port ee fr110010wl pot SAR Shift arithmetic right Variable port hae ROL Rotate left 11 0100vw modo 00 rm Me 3 Baty g ROR Rotate right 110100vw modo01 nm OUT Output RCL Rotate through carry flag lett 110100vw mod010 rm Fixed port ACR Rotate through carry right 110100vw mod011 rm Variable port _XLAT Transiate byte to AL LEA Load EA to register AND And Reg memory and register to either 001000dw Immediate to register memory 1000000w mod100 rim gata Reg memory and register to either 000010dw mod reg rim Arithmetic immediate to register memory 1000000w mod001 r m data AOD Aad tae Ae faa pg
5. 000 AL 00 ES 001 nis Ae 001 01 CS 010 010 10 SS 011 011 11 DS 100 100 101 101 110 110 111 111 Instructions which reference the flag register file as a 16 bit object use the symbol FLAGS to represent the file FLAGS X X X X OF DF 1F TF SF ZF X AF X PF X CF Mnemonics Intel 1978 Addressing ROM FE000 FFFFF RAM 0 7FF 800 FFF available with additional 2142 s Note The wire wrap area of the SDK 86 PC board may be used for additional custom memory expansion Input Output Parallel 48 lines two 8255A s Serial RS232 or current loop 8251A Baud Rate selectable from 110 to 4800 baud SDK 86 Interfaces ae Bus All signals TTL compatible Parallel O All signals TTL compatible Serial I O 20 mA current a TY or RS232 Note The user has access to all bus signals which enable him to design cus tom system expansions into the kit s wire wrap area Interrupts 256 vectored Maskable Non maskable TRAP DMA Hoid Request Jumper selectable TTL compatible input Software System Monitor Preprogrammed 2716 or 2316 ROMs gt Addresses FE000 FFFFF Monitor IJO Keyboard display or TTY or CRT serial VO Physical Characteristics Width 13 5 in 34 3 cm Height 12 in 30 5 cm Depth 1 75 in 4 45 cm i Weight approx 24 0z 3 3 kg ORDERING INFORMATION Part Number SDK 86 Description
6. MCS 86 system design kit Electrical Characteristics DC Power Requirement Power supply not included in BD Voc5V 5 Current 3 5A 0 3A l VTTY required only if teletype is connected VttTy 12V 10 Environmental Characteristics Operating Temperature 0 50 C Reference Manuals 9800697A SDK 86 MCS 86 System Design Kit Assembly Manual 9800722 MCS 86 User s Manual 9800640A 8086 Assembly Language Programming Manual 8086 Assembly Language Reference Card Reference manuals are shipped with each product only if designated SUPPLIED see above Manuals may be ordered from any Intel sales representative distributor office or from Intel Literature Department 3065 Powers j Avenue Santa Clara California 95051 ee ae 17 8
7. SDK 86 NMiCS 86 SYSTEM DESIGN KIT Complete Single Board Microcomputer a Wire Wrap Area for Custom Interfaces System Including CPU Memory and I O a Extensive System Monitor Software in a Easy to Assemble Kit Form ROM a High Performance 8086 16 Bit CPU Comprehensive Design Library a Interfaces Directly with TTY or CRT Included Interactive LED Display and Keyboard The SDK 86 MCS 86 System Design Kit is a complete single board 8086 microcomputer system in kit form It contains all necessary components to complete construction of the kit including LED display keyboard resistors caps crys tal and miscellaneous hardware Included are preprogrammed ROMs containing a system monitor for general soft ware utilities and system diagnostics The complete kit includes an 8 digit LED display and a mnemonic 24 key key board for direct insertion examination and execution of a user s program In addition it can be directly interfaced with a teletype terminal CRT terminal or the serial port of an Intellec system The SDK 86 is a high performance proto type system with designed in flexibility for simple interface to the user s application TTS 17 3 SDK 86 FUNCTIONAL DESCRIPTION The SDK 86 is a complete MCS 86 microcomputer sys tem on a single board in kit form It contains all neces sary components to build a useful functional system Such items as resistors caps and sockets are included Assembly time varies fro
8. a SP Se Immediate to accumulator 0000110w datas Reg memory with register to either 000000d w mod reg rim 100000sw mod000 rm data oooootow data dataitw t LD8 Load pointer to DS LENES data it w 1 LES Load pointer to ES oe Immediate to accumulator gt f0010010w daa dataitw t LAHF Load AH with flags 10011111 T ae jodi us SANE Store AH into flags frootii1o0 gt ee ouae Ue nd function to mem La PUSHF Push flags ny 10031100 o aiei Register memory and register 1000010w POPF Pop flags Immediate data and register memory 1 11 1011w mod000 rm data dataitw 1 ane A A ee ee Immediate data and accumulator 1010100w data dataitw 1 OR Or XOR Exclusive or ie Reg memory and register to either Immediate to register memory Immediate to accumulator ot aa Immediate to register memory Immediate to accumulator data if w 1 ADC Add with carry Reg memory with register to either Immediate to register memory 000100 w mod reg nim 100000sw modd10 rim daa dataitsw 01 DO0TOT Ow data datattwet Immediate to accumulator String Manipulation Register memory i AEP Repeat T ip Register 01000 reg raat et i i MOVS Move byteiword t010010w AAA ASCII adjust for add DAA Decimal adjust tor add CMPS Compare byte word S 5 na SCAS Scan byte word SUB Subtract ee eee ase LODS Load bytelwd to ALIAX
9. erial Mode Commands Dump memory Allows user to print or display large blocks of memory infor mation in hex format than amount visible on terminal s CRT display Start continue Allows user to display blocks OB BP MV SI EW DI l M o A EB AX ER BX Figure 3 SDK 86 Keyboard display of memory information larger than amount visible on ter as minal s CRT display Punch read Allows user to transmit fin paper tape ished programs into and out of SDK 86 via TTY paper tape punch 17 5 _SDK 86 8086 INSTRUCTION SET L a o man at Table 4 contains a summary of processor instructions used for the 8086 microprocessor Table 4 8086 Instruction Set Summary ae ere a ae ve Mnemonic and Description Mnemonic and Description Data Transfer Pe ae ihe 4 MOV Meve 76543210 76543210 76543210 78543210 CMP Compare Register memory to from register 100010 w Register memory and register frroo0rtw mo000 1m daa J tatatwt Immediate to register memory Immediate to register Immediate with register memory immediate with accumulator Memory to accumulator 1010 000 w addr high AAS ASCII adjust tor subtract Accumulator to memory 1010001w addr high gt DAS Decimal adjust for subtract Fil See Register memory to segment register 10001110 modOreg r m MUL Multiply unsigned 1110 iw moai 00 rim Segment register to register memory 10001100 modOreg rim
10. ies ROMs Communications Interface The SDK 86 communicates with the outside world through either the on board light emitting diode LED display keyboard combination or the user s TTY or CRT terminal jumper selectable or by means of a special mode in which an intellec development system transports finished programs to and from the SDK 86 Memory may be easily expanded by simply soldering in additional devices in locations provided for this pur pose A large area of the board 22 square inches is laid out as general purpose wire wrap for the user s custom interfaces Assembly Only a few simple tools are required for assembly sol dering iron cutters screwdriver etc The SDK 86 assembly manual contains step by step instructions for easy assembly with a minimum of mistakes Once con struction is complete the user connects his kit to a power supply and the SDK 86 is ready to go The monitor starts immediately upon power on or reset Commands Keyboard mode commands serial port commands and Intellec slave mode commands are summarized in Table 1 Table 2 and Table 3 respec tively The SDK 86 keyboard is shown in Figure 3 LINES CONNECTOR ADDRESS BUS EXPANSION CONNECTOR DATA BUS KBD DISP EXPANSION I O PORTS O PORTS CTRL CONNECTOR 8255A 8255A CTRL 5 XPANSION E EXPANSION EXPANSION sees SOCKET SOCKET SOCKETS BAUD RATE USART GENERATOR 8251A TTY or RS232 E ome KEYBD DISPLAY Ea
11. iit asp ater greate JB JNAE Jump on below not above 01110010 l i JBE JMA Jump on bel T Jump on delow or equa not above aR 10110 JP JPE Jump on parity parity even 01110000 01111000 JO Jump on overflow J Jump on sign JME INZ JuMp on not equal not zero JML JGE Jump on not less greater or equa JMLE J Jump on not less or equal greater JMB JAE Jump on not below above or equa JNBE JA Jump on not below or equal above P JMP JPO Jump on not par par odd JMO Jump on not overtiow 01110001 Notes AL 8 bit accumulator AX 16 bit accumutator CX Count register DS Data segment ES Extra segment 6 4 05 ete Above below refers to unsigned value Greater more positive l A Less less positive more negative signed values if d 1 then to reg if d 0 then from reg if w 1 then word instruction if w 0 then byte instruction if mod 11 then r m is treated as a REG field if mod 00 then DISP 0 disp low and disp high are absent if mod 01 then DISP disp low sign extended to 16 bits disp high is absent if mod 10 then DISP disp high disp low if r m 000 then EA BX SI DISP if r m 001 then EA BX DI DISP if r m 010 then EA BP SI DISP if r m 011 then EA BP DI DISP if r m 100 then EA St DISP if r m 101 then EA DI DISP if r m 110 then EA BP DISP if r m 111 then EA BX
12. m 4 to 10 hours depending on the skill of the user The SDK 86 functional block dia gram is shown in Figure 1 8086 Processor The SDK 86 is designed around Intel s 8086 microproc essor The Intel 8086 is a new generation high perform ance microprocessor implemented in N channel deple tion load silicon gate technology HMOS and pack aged in a 40 pin CerDIP package The processor features attributes of both 8 bit and 16 bit micro processors in that it addresses memory as a Sequence of 8 bit bytes but has a 16 bit wide physical path to memory for high performance Additional features of the 8086 include the following e Direct addressing capability to one megabyte of memory e Assembly language compatibility with 8080 8085 e 14 word x 16 bit register set with symmetrical oper ations e 24 operand addressing modes e Bit byte word and block operations e 8 and 16 byte signed and unsigned arithmetic in binary or decimal mode including multiply and divide e 4 or 5 or 8 MHz clock rate CLK GEN 8284 LATCHES PROM DECODE LOGIC uoo c PROM PROM 2316E 2316E TRANSCEIVER DRIVER a CONTROL RAM DECODE I O DECODE LOGIC LOGIC A block diagram of the 8086 microprocessor is shown in Figure 2 System Monitor A compact but powerful system monitor is supplied with the SDK 86 to provide general software utilities and system diagnostics It comes in preprogrammed read only memor
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