DIMM-RM9200
Contents
1. Pin Interface Signal Dir Pin Interface Signal Dir 1 Power GND 2 Power GND 3 Data D15 4 Power 3V3 5 Data D14 I O 6 Data D7 7 Data D13 I O 8 Data D6 9 Data D12 I O 10 D5 I O 11 Data D11 I O 12 Data D4 13 Data D10 I O 14 Data D3 I O 15 D9 I O 16 D2 I O 17 Data D8 I O 18 D1 I O 19 Address A21 OUT 20 I O 21 Address A20 OUT 22 Address A9 OUT 23 Address A19 OUT 24 Address 8 OUT 25 Address A18 OUT 26 Address A7 OUT 27 Address A17 OUT 28 Address A6 OUT 29 Address A16 OUT 30 Address IAS OUT 31 Address A15 OUT 32 Address 4 OUT 33 Address A14 OUT 34 Address A3 OUT 35 Address A13 OUT 36 Address A2 OUT 37 Address A12 OUT 38 Address AT OUT 39 Address A11 OUT 40 Address OUT 41 Address A10 OUT 42 Control INRESET OUT Control NOE OUT 44 Control nBS1 OUT 45 Control NWE 46 Control nBS3 OUT 47 Control nCS2 OUT 48 Control I O 53 5 5 I O 49 Control I O PC10 nCS4 CFCS I O 50 ControlI O PC11 nCS5 CFCE1 I O 51 Control I O PC12 nCS6 CFCE 52 J ControljI O PC13 nCS7 I O 53 Control I O PC6 NWAIT I O 54 Control I O PB29 IRQO I O 55 Control I O PB28 FIQ I O 56 Control I O PA25 TWD IRQ2 I O 57 Control I O PA26 TWCK IRQ1 58 Control nRESET IN IN 59 Control INBOOTMODE I O2. 7 1 USARTO Signal DIMM Pin PIO Controller Port Pin TXD 128 PIO A Peripheral 17 RXD 130 PIO Peripheral 18 SCLK 131 PIO B Peripheral 19 MCTS 135 PIO A Peripheral 20 nRTS 77 PIO D Peripheral PD21 Table 2 USARTO Port Pinout 7 20 USARTI Signal DIMM Pin PIO Controller Port Pin TXD 68 PIO Peripheral 20 RXD 72 B Peripheral 21 SCLK 78 PIO B Peripheral 22 nDCD 86 PIO B Peripheral PB23 nCTS 75 PIO B Peripheral 24 nDSR 82 PIO B Peripheral PB25 nRTS 98 PIO D Peripheral PD22 nDTR 92 D Peripheral PD25 Table 3 USART1 Port Pinout 7 3 USART2 Signal DIMM Pin PIO Controller Port Pin TXD 133 PIO A Peripheral 23 RXD 120 PIO A Peripheral 22 SCLK 132 PIO A Peripheral 24 MCTS 110 PIO A Peripheral PA30 nRTS 88 PIO D Peripheral A PD13 Table 4 USART 2 Port Pinout The nCTS Pin for USART is only available on PA30 which also is the DRXD Pin of the debug UART DIMM RM9200 Module Specification DIMM RM9200 LEMBEDDED SYSTEM DESIGN 7 4 USART3 Signal DIMM Pin PIO Controller Port Pin TXD 123 PIO Peripheral 5 RXD 124 PIO A Peripheral PA6 SCLK 85 B Peripheral PB2 nCTS 138 PIO B Peripheral nRTS 100 D Peripheral PD24 136 PIO B Peripheral B PBO Tabl
3. Applications that are described in this manual are for illustrative purpose only NEMONOS makes no representation or warranty that such application will be suitable for the specified use without further testing or modification 4 2 Copyright Copyright 2005 by NEMONOS GmbH rights reserved No part of this manual may be reproduced transmitted transcribed stored in a retrieval system or translated into any language or computer language in any form or by any means electronic mechanical photocopying recording or otherwise without the express written permission of NEMONOS GmbH 4 3 Trademarks products and trademarks mentioned in this manual are trademarks of their respective owners 4 4 Limited Warranty for Open Source Software On customer demand our modules can be shipped with open source software As the linux kernel as well as the u boot bootloader are distributed under GPL version 2 the terms and conditions of this GPL version 2 also apply to the u boot and kernel we distribute You got the sources for the linux kernel and u boot together with the DIMM RM9200 evaluation board In case you didn t get the CD please contact us and we will provide you with a download link for the sources and patches Please read the GPL version 2 which is included file COPYING in the u boot as well as the kernel main folder carefully Especially the following warranty applies to the sources binaries of u boot and li
4. Micrel KS8721BL SL Datasheet Version KS8721BL SL Rev 1 1 Publication Date May 17 2004 www micrel com 12 4 Micrel KS8001L S Datasheet Version KS8001L L Rev 1 03 Publication Date March 7 2006 www micrel com 12 5 Intel Embedded Flash Memory J3 v D Datasheet Version 308551 003 Publication Date February 2006 www intel com 12 6 Intel StrataFlash Embedded Memory P30 Family Datasheet Version 306666 007 Publication Date May 1 2006 www intel com DIMM RM9200 Module Specification 23 LEMBEDDED SYSTEM DESIGN DIMM RM9200 13 Hardware Revision History Version Date Alteration 1 1 26 10 05 1 Official Release 1 2 11 10 06 Changed Ethernet Phy from Davicom DM9161A consumer temperature range to Micrel 58721 industrial temperature range Removed discontinued 450 021 data flash Added TWI EEROM for manufacturer information 1 3 22 06 07 Changed SPI CS signal for onboard SPI driven SD Card socket from nPCSO to nPCS1 DIMM RM9200 Module Specification 24 DIMM RM9200 14 Document Revision History Version Date Alteration 0 9 15 03 05 Initial Draft 0 91 05 09 05 Connector pinout changes Added pin descriptions 1 00 19 10 05 Added signal direction in connector pinout Added DIMM Socket table 1 01 27 10 05 Added peripheral groups pinout 1 02 28 07 06 Corrected Pinout descritive text Added USART3 nRTS pinout comments Added installation in
5. integrated on a smaller board surface The reduction in the number of steps necessary in manufacturing and assembling the component group is another cost decreasing factor The one sided reflow process as well as exclusion of the wave solder process serves to increase the yield in manufacturing and improve quality The required SO DIMM connector is a very inexpensive standard component and is available from numerous manufacturers In designing the DIMM RM9200 attention was directed toward its use in embedded applications Because most peripheral interfaces used in such applications are device internal in external interfaces mainly special customized interfaces are used the serial interface driver components have been excluded from the DIMM RM9200 leading the interfaces as pure TTL signals to the outside This further decreases additional costs while enabling the user to have more flexibility when selecting the interface driver RS485 RS422 RS232 TTY etc The power consumption of the controller architecture is drastically reduced due to the integrated components This makes the system optimally adaptable with power saving modes The DIMM RM9200 also has minimized or eliminated some of the most critical disadvantages of the microcontroller The DIMM RM9200 today needs less board surface than most micro controller applications The embedded controller cost has been drastically decreased by the DIMM RM9200 The DIMM RM9200 archi
6. optional 2 Mb serial flash for configuration or customer data 12 optional LEDs 1 power 8 user 3 ethernet for status display on board 1 8V power supply for processor core voltage 144 pins SO DIMM card edge connector ultra small size 67 6 mm x 36 5 mm 5 3 Block Diagram SDRAM BUFFER 16 Bit Data 23 Bit Address AT91RM9200 ARM920T CPU with MMU 10 100MBit Ethernet Phy Ethernet 10 100MBit 1 8V Regulator SO DIMM connector AT91RM9200 DIMM Picture 1 Module Block Diagram DIMM RM9200 Module Specification 9 DIMM RM9200 LEMBEDDED SYSTEM DESIGN 5 4 Component View NL RS R4 RS 2 IC4 g S ice 25 2 5 5 E css Bl Bg B EJ AE E B E E E i E is E B I iS m o IX 534 B HS TESTIS E EE OOOO Kaen C3 Picture 2 Placeplan 5 5 Functional Description 5 5 1 SO DIMM connector All external connections are accessible through the 144 pins SO DIMM card edge connector The following external functionality is available 3V3 power supply input 1V8 power supply output max 50mW buffered address bus with addr
7. products in your systems Before contacting NEMONOS technical support please consult our web site for the latest product documentation utilities and drivers If the information does not help to solve the problem contact us by email or telephone 2005 NEMONOS GmbH Embedded System Design Bernstorffstrasse 99 D 22767 Hamburg Telefon 49 40 401716 00 Telefax 49 40 401716 07 Internet www nemonos com E Mail support nemonos com DIMM RM9200 Module Specification 7 DIMM RM9200 S Ex HEAR 5 Introduction 5 1 DIMM RM9200 Architecture The application specific portion of a standard embedded application typically requires low pin count components such as relays power supplies A D converters An embedded Controller requires components of much higher pin count and higher density circuit boards The DIMM RM9200 concept separates the high density circuit board of the embedded Controller from the low density often two layer application specific baseboard To address the drawback of a higher price for an embedded controller like solution the DIMM RM9200 performs without discrete peripheral connectors significantly reducing the cost In other embedded controller solutions connectors and their assembly are a significant part of the manufacturing costs In low end solutions these costs can be as much as 25 Because the DIMM RM9200 performs without connectors these costs are significantly decreased and the controller can be
8. type 250 021 will be accessed using the SPI chip select NPCSO The data flash can be used for storage of configuration data or a bootloader Booting U Boot with TFTP feature from the data flash in a network environment the Strata Flash can be omitted further reducing the system costs DIMM RM9200 Module Specification DIMM RM9200 12 5 5 3 4 Address data bus buffer chip selects but NCS1 SDRAM activate the on board data bus buffers Activity on the external data bus interface thus is reduced to a minimum The address bus buffers are always activated allowing for further external logic with fast timing The buffers are 5V tolerant 3 3V devices 74LCX16245 allowing the connection of either 3 3V or 5V external devices In addition to the address lines A0 A22 and data lines DO D15 the signals common to multiple external devices NOE NWE BS1 and BS3 are buffered The chip select signals NCS2 NCS7 are not buffered 5 5 3 5 Special notes for watchdog usage As the DIMM RM9200 uses Intel StrataFlash for Program storage and as boot device special care has to be taken when using the Flash as filesystem storage device e g as JFFS2 Image Source under Linux The Intel Flashes can be switched into Read Status mode in order to get the status of the chip e g after writing a sector This command can be disabled by software command Read Array command or by hardware reset A problem can arise if a watchdog r
9. 210179 mm LW 90 DIMM RM9200 Hardware Manual Document Revision V 1 06 DIMM RM9200 12 Contents 1 Contents 2 2 Pictures 4 3 Tables 5 4 User Information 6 4 1 About This Manual 6 4 2 Copyright 6 4 3 Trademarks 6 4 4 Limited Warranty for Open Source Software 6 4 5 Technical Support 7 5 Introduction 8 5 1 DIMM RM9200 Architecture 8 5 2 Feature Summary 9 5 3 Block Diagram 9 5 4 Component View 10 5 5 Functional Description 10 5 5 1 SO DIMM connector 10 5 5 2 Power supply 11 5 5 3 Memory Layout 11 5 5 4 Ethernet Phy 12 6 DIMM RM9200 Module Pinout 13 7 9200 Peripherals Pinout 15 7 1 USARTO 15 7 2 USARTI 15 7 3 USART2 15 7 4 USART3 16 7 5 SPI 16 7 6 MCI 16 7 7 TWI 17 7 8 SSCO 17 7 9 SSCI 17 8 Signal Description 18 8 1 Address Data Bus 18 8 2 Control Signals 18 8 2 1 nRESET 18 6 2 2 nOE 18 8 2 3 nWE 18 8 2 4 NBS1 nBS3 18 8 2 5 IN 19 8 2 6 nBOOTMODE 19 8 3 Peripherals 19 8 3 1 Ethernet 19 9 Mechanical Dimensions 20 9 1 DIMM RM9200 Module 20 9 2 DIMM Connector 20 10 Installing the DIMM RM9200 21 10 1 Installing the module 21 11 Technical Specifications 22 DIMM RM9200 Module Specification 2 DIMM RM9200 er es 12 Important Documents 24 12 1 Atmel AT91RM9200 Datasheet 24 12 2 Atmel AT91RM9200 Errata Sheet 24 12 3 Micrel KS8721BL SL Datasheet 24 12 4 Micrel KS8001L S Datasheet 24 12 5 Intel Embedded Flash Memory J3 v D Datasheet 24 12 6Intel StrataFlash Embedded Memo
10. 60 Power GND 61 Power GND 62 Power GND 63 Power 3V3 64 Power 3V3 65 SPLI O PA3 nPCSO IRQ5 I O 66 Power 3V3 67 SPI PA1 MOSI PCKO I O 68 USARTI PB20 USART1_TXD I O 69 SPI PA2 SPCK IRQ4 I O 70 JTAG TDI IN 71 SPI 72 USARTI PB21 USART1_RXD I O 73 TCK IN 74 JTAG TDO OUT 75 USARTI IPB24 nUSART1_CTS I O 76 JTAG TMS IN 77 USARTO PD21 nUSARTO RTS I O 78 USARTI PB22 USART1 SCLK I O 79 SPLI O PD18 nPCS1 I O 80 INTRST IN 81 Timerj O 13 2 I O 82 JUSART1 PB25 nUSART1_DSR I O 83 27 84 SPLI O PD19 nPCS2 85 2 0 5 I O 86 USARTI PB23 nUuSARTI DCDI O DIMM RM9200 Module Specification 13 DIMM RM9200 LEMBEDDED SYSTEM DESIGN Pin Interface Signal Dir Pin Interface Signal Dir 87 Timer O PBI4 TD2 88 USART2 PD23 nUSART2 RTS O 89 USB IHDPB I O 90 Timer I O PB9 RDI TIOB4 I O 91 USB HDMB I O 92 USART1 PD25 nUSART1_DTRII O 93 USB HDPA 94 SPLI O PD20 nPCS3 I O 95 USB HDMA I O 96 Timer I O 5 I O 97 USB DDP 98 USART1 PD22 nUSART1_RTS 99 USB DDM 100 USART3 PD24 nUSART3 RTS O 101 Timer O 12 2 I O 102 MMC I O IPB4 RKO MCDA2 I O 103 Timer I O PB6 TF1 TIOA3 I O 104 Timer I O PB11 RF1 TIOBS I O 105 PB
11. 8 TD1 TIOA4 106 Timer I O PB7 TK1 TIOB3 I O 107 MMC I O IPB5 RFO MCDA3 I O 108 MMC I O PB3 RDO MCDAI1 I O 109 MMC I O PA29 MCDAO I O 110 DBG_USART PA30 DBG_RXD I O 111 MMC I O PA28 MCCDA I O 112 MMC I O 27 I O 113 I O PC5 BFWE I O 114 I O PC4 BFOE I O 115 I O PCI BFRDY SMOE I O 116 I O PC2 BFAVD I O 117 I O PC3 BFBAA SMWE I O 118 I O I O 119 5 I O 120 USART2 PA22 USART2_IRDA O 121 MMC l O PA9 MCDBO I O RXD 123 USART3 PAS USART3 TXD I O 122 Power 1V8 125 lTimer I O PA21 TIOA2 I O 124 USART3 PAG USART3 RXD I O 1277 MMC I O PA8 MCCDB 126 I O PA10 I O 129 Power GND 128 USARTO PA17 USARTO_TXD 131 JUSARTO PA19 USARTO_SCK I O 130 USARTO PA18 USARTO_RXD I O Timer O 1 132 JUSART2 I O PA24 SCK2 I O 133 USART2 IPA23 USART2_IRDA I O 134 Power 3V3 TXD 136 lTimer I O PBO TFO I O 135 USARTO PA20 nUSARTO CTS O 138 JTimerj O PB1 TKO I O 137 DBG_USART PA31 DBG_TXD I O 140 Power AVDDT ETH CT TD 139 Power AVDDR ETH CT RD 142 Ethernet OUT 141 Ethernet ETH RX IN 144 Ethernet ETH TX OUT 143 Ethernet ETH RX IN Table 1 Module Pinout DIMM RM9200 Module Specification 14 DIMM RM9200 LEMBEDDED SYSTEM DESIGN 7 DIMM RM9200 Peripherals Pinout Following section describes the pinout of the peripheral groups of the AT91RM9200 controller available on the DIMM RM9200
12. WE is the buffered nWE signal from the processor It is active low for write accesses to the external memory interface For further information please consult the AT91RM9200 user s manual data sheet 8 2 4 NBSI nBS3 The signals nBS1 nBS3 are the buffered nBS1 nBS3 signal from the processor They serve as ior iow signals for compact flash devices Further information can be found in the AT91RM9200 user s manual data sheet DIMM RM9200 Module Specification 18 DIMM RM9200 12 8 2 5 nRESET signal nRESET IN is an external reset input to the on board supervisory circuit An active low signal on this pin asserts a hardware reset by activating the on board reset signal The signal has an on board 33k pullup and can be driven with an open collector open drain or push pull driver 8 2 6 nBOOTMODE The signal nBOOTMODE is connected to the BMS signal of the processor When set high the on chip boot mode is selected and the processor starts execution from internal ROM When set to low the code at 0x10000000 external memory area 0 is executed The external memory area 0 selects the onboard parallel flash For further information please consult the AT91RM9200 user s manual 8 3 Peripherals 8 3 1 Ethernet The ethernet interface uses a Micrel 58721 Micrel KS8001 physical layer chip for interfacing to the RJ45 connector The termination network for the RX signals is already placed on the DIMM RM9200 The series re
13. e 5 USART3 Port Pinout The Pins SCLK nCTS and nRTS on PIO B for USART3 share their pins with Pins TKO and TDO of SSCO If you want to use USART3 with full hardware handshake you can t use SSCO transmit functionality If you want to use USART3 for RS485 you should use nRTS on PIO D PD24 for direction switching 7 5 SPI Signal DIMM Pin PIO Controller Port Pin INPCSO 65 PIO A Peripheral A INPCS1 79 D Peripheral 018 INPCS2 84 PIO D Peripheral PD19 INPCS3 94 D Peripheral 20 MISO 71 PIO A Peripheral A PAO MOSI 67 PIO A Peripheral 1 SPCK 69 PIO Peripheral 2 Table 6 SPI Port Pinout If the optional SD Card socket on the DIMM RM9200 is populated NPCS1 is used for this card socket and therefore can not be used for external peripherals 7 6 MCI Signal DIMM Pin PIO Controller Port Pin MCCK 112 PIO Peripheral 27 MCCDA 111 PIO A Peripheral 28 MCDAO 109 PIO A Peripheral 29 1 108 B Peripheral PB3 IMCDA2 102 PIO B Peripheral 4 IMCDA3 107 PIO Peripheral 5 IMCCDB 127 PIO A Peripheral PA8 MCDBO 121 PIO A Peripheral 9 Table 7 MCI Port Pinout DIMM RM9200 Module Specification DIMM RM9200 LEMBEDDED SYSTEM DESIGN Slot A support both MMC and SD Cards while Slot B only supports MMC Cards If u
14. eset occurs while the flash is in Read Status mode The processor resets and tries to fetch the first instruction from flash As the flash remains in Read Status command the watchdog reset is only internal to the AT91RM9200 chip the program fetch will fail and the system will stall In order to circumvent this behavior there is a patch available for the linux kernel which uses the watchdog interrupt to reset the flash into Read Array mode before asserting a watchdog reset However this is not 100 secure If you need 100 security you have to use an external watchdog circuitry 5 5 4 Ethernet Phy A Micrel 58721 or Micrel KS8001 is used as physical layer chip This low power transceiver for 10 100BASE TX performs auto negotiation compliant with IEEE 802 3u and auto crossover function It is specified for the industrial temperature range The whole Ethernet interface is formed with the fast Media Independent Interface MII and the Media Access Control Layer MAC of the Atmel AT91RM9200 combined with the Micrel PHY supplemented through an external RJ45 Modular Jack with integrated inductance A symmetrical kind of Modular Jack is needed for auto MDIX functionality A good choice for a transformer is PH163539 from YCL J0024D21 from Pulse can be used as ethernet connector with integrated transformer DIMM RM9200 Module Specification 12 DIMM RM9200 6 DIMM RM9200 Module Pinout LEMBEDDED SYSTEM DESIGN
15. ess lines AO through A22 buffered data bus with data lines DO through D15 buffered read write strobes and byte select signals unbuffered chip selects nCS2 through 57 reset_out reset_in and interrupts serial interfaces timer inputs and outputs 1 USB host and 2 USB device interfaces JTAG interface and dbg USART used during production 10 100Mbit Ethernet signals The internal circuitry of the DIMM RM9200 is based on 3V3 low voltage technology but the address and data bus SO DIMM signals are 5 V tolerant Therefore you can use both 3V3 and 5 V components to interface to the SO DIMM connector All other interface signals are 3V3 only DIMM RM9200 Module Specification DIMM RM9200 12 5 5 2 Power supply 5 5 2 1 External power supply The DIMM RM9200 requires an external power supply You have to power the DIMM RM9200 with a 3V3 0 5 A external power supply connected to the 3V3 pins on the SO DIMM connector When using an external power supply it is strongly advised to place a low ESR capacitor on the carrier board close to the 3V3 input to reduce interference 5 5 2 2 On board power supply The core supply voltage for the AT91RM9200 is generated on board and is available for reference on the 1V8 pin of the SO DIMM connector The power consumption of external components if any must be limited to 50mW 5 5 3 Memory Layout Equipped with either 64Mbit 128 Mbit or 256 Mbit Intel Strata Flash as well as with two SDRAMs o
16. f each 128 Mbit or 256 Mbit the DIMM RM9200 realizes a total of 8 16 or 32 Mbyte Flash and 32 or 64 Mbyte SDRAM Standard variants are 8MByte 32 MByte Flash SDRAM respectively 32 64 MByte Flash SDRAM Using A25 for the chip internally not bonded A24 address line it is possible to address 32 MByte of Flash Memory for the missing A24 problem please take a look in the errata for the ATMEL AT91RM9200 5 5 3 1 Flash chip select NCSO The flash memory is accessed 16 bits wide with NCSO The resulting address range for the two standard options are 16 MByte 0 1000 0000 Ox10FF FFFF JL28F128 3A 32 MByte 0 1000 0000 Ox10FF FFFF 1 segment 16 Mbyte JL28F256 3C PF48F4000P0Z 0x1100 0000 Ox11FF FFFF mirror of 1 segment 16 Mbyte 0x1200 0000 Ox12FF FFFF 2 segment 16 Mbyte The gap in the flash memory area for the 32MByte device can be avoided by addressing the flash starting at offset 0x1100 0000 This results in the following memory layout 32 MByte 0 1100 0000 Ox11FF FFFF 1 segment 16 Mbyte JL28F256J3C PF48F4000P0Z 0x1200 0000 Ox12FF FFFF 2 segment 16 Mbyte 5 5 3 2 SDRAM chip select NCS1 The SDRAM is accessed with 32 bit data bus width at NCS1 This results in the following address range for the standard memory options 32 MByte 0 2000 0000 0x21 FF FFFF MT48LC8M16A2 64 MByte 0 2000 0000 0x23FF FFFF MT48LC16M16A2 5 5 3 3 Serial data flash chip select NPCSO An optional serial data flash of
17. formation 1 03 03 07 07 Corrected pinout descriptive text for 23 PB24 in Table 7 2 1 04 25 07 07 Added Hardware Revision History 1 05 27 07 07 Changed ethernet PHY description to Micrel 58721 KS8001 Added Micel datasheet info Removed Davicom datasheet info Added note in chapter 7 5 about nPCS1 used for optional SD Card socket 1 06 09 07 08 Added Intel datasheet info Added Watchdog notes in chapter 5 5 3 5 Added open source software legal notice in chapter 4 4 DIMM RM9200 Module Specification 25
18. ith varying height Manufacturer Order Code Description JST DM 3B1 N1210 Horizontal mounted SMD extremely small space JAE MM30 1444 series Vertical mounted through hole different lever keying types JAE MM30 144 series Horizontal mounted SMD different mounted heights Table 11 DIMM Socket Selection DIMM RM9200 Module Specification 20 DIMM RM9200 10 Installing the DIMM RM9200 10 1 Installing the module Caution e Always wear a grounded wrist strap when handling the DIMM RM9200 in order to discharge any static electricity from your body e Always unplug your system from power before installing the DIMM RM9200 The DIMM RM9200 does not require any configurations before installation Perform the following step by step instructions to install the DIMM RM9200 in your system e Unplug your system from the power outlet e Insert the DIMM RM9200 into the SO DIMM connector on the carrier board The module should drop easily into place Do not force the module into the socket to avoid damage to the socket If the module does not fit check its alignment You also may pull the two plastic locking clips gently sideways away form the socket during insertion before the module is locked into the socket Reconnect your system to the power outlet The DIMM is now ready to use DIMM RM9200 Module Specification 21 DIMM RM9200 Technical Specifications Microcontroller CPU type CPU
19. lects for connection of external peripheral components like USARTs CAN interfaces or a LCD controller If not mentioned the signals are directly connected to the processor For a description of the processor pin functionality please take a look at the AT91RM9200 user s manual Caution processor is 3 3V device Input voltages above 3 6V may cause permanent damage to the processor Only the address data bus signals and some control signals are 5V tolerant Following sections describe only the pins which are not directly connected to the processor 8 1 Address Data Bus From the processors address and data bus the address lines A0 A22 and data lines DO D15 are available at the SO DIMM connector via 5V tolerant bus buffers of type 74LVX16245 The address bus signals are always active while the data bus signals are active only when SDRAM is inactive 8 2 Control Signals 8 2 nRESET The signal nRESET is the reset output of the on board supervisory circuit It will be activated active low whenever the supply voltage drops below 2 94V or the core voltage drops below 1 75V Additionally it can be forced active by setting the signal nRESET IN low 8 2 2 nOE The signal nOE is the buffered nOE signal from the processor It is active low for read accesses to the external memory interface For further information concerning this signal please consult the AT91RM9200 user s manual data sheet 8 2 3 nWE The signal n
20. nux kernel we redistribute BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE THERE IS NO WARRANTY FOR THE PROGRAM TO THE EXTENT PERMITTED BY APPLICABLE LAW EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND OR OTHER PARTIES PROVIDE THE PROGRAM AS IS WITHOUT WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU SHOULD THE DIMM RM9200 Module Specification 6 DIMM RM9200 a PROGRAM PROVE DEFECTIVE YOU ASSUME THE COST OF ALL NECESSARY SERVICING REPAIR OR CORRECTION IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER OR ANY OTHER PARTY WHO MAY MODIFY AND OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE BE LIABLE TO YOU FOR DAMAGES INCLUDING ANY GENERAL SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 4 5 Technical Support Technicians and engineers from NEMONOS are available for technical support We are committed to making our product easy to use and will help you use our
21. ry P30 Family Datasheet 24 13 Hardware Revision History 25 14 Document Revision History 26 DIMM RM9200 Module Specification 3 DIMM RM9200 r T 2 Pictures Module Block Diagram 9 Placeplan 10 Module Dimensions 20 DIMM RM9200 LEMBEDDED SYSTEM DESIGN 3 Tables Module Pinout USARTO Port Pinout USART1 Port Pinout USART Port Pinout USART3 Port Pinout SPI Port Pinout MCI Port Pinout TWI Port Pinout SSCO Port Pinout SSC1 Port Pinout DIMM Socket Selection DIMM RM9200 Module Specification 15 15 15 16 16 16 17 17 17 20 DIMM RM9200 S Ex HEAR 4 User Information 4 1 About This Manual This document provides information about products from NEMONOS GmbH No warranty of suitability purpose or fitness is implied While every attempt has been made to ensure that the information in this document is accurate the information contained within is supplied as is and is subject to change without notice For the circuits descriptions and tables indicated NEMONOS assumes no responsibility as far as patents or other rights of third parties are concerned as well as for any errors or inaccuracies that may appear in this document NEMONOS reserves the right to make changes without notice in the products including circuits and or software described or contained in this manual in order to improve design and or performance NEMONOS assumes no responsibility or liability for the use of the described product s
22. sing Slot A for SD Cards you can t use SSCO receive functionality as the signals MCDA1 3 share their pins with RDO RKO and RFO 7 7 TWI Signal DIMM Pin PIO Controller Port Pin TWD 56 PIO A Peripheral 25 57 PIO A Peripheral PA26 Table 8 TWI Port Pinout 7 8 SSCO Signal DIMM Pin PIO Controller Port Pin 136 Peripheral 138 PIO B Peripheral PB1 TDO 85 PIO Peripheral 2 RDO 108 PIO B Peripheral PB3 RKO 102 B Peripheral PB4 RFO 107 PIO B Peripheral 5 Table 9 SSCO Port Pinout SSCO shares it s pins with USART3 transmit functionality and MCI receive functionality If you want to use SSCO you can t use hardware handshake synchronous transfer on USART3 and SD Card interface using 4 data lines 7 9 SSCI Signal DIMM Pin PIO Controller Port Pin TF1 103 PIO B Peripheral 6 106 PIO B Peripheral PB7 TD1 105 PIO B Peripheral 8 RD1 90 PIO B Peripheral 9 RK1 96 PIO B Peripheral 10 RF1 104 PIO Peripheral PB11 Table 10 SSC1 Port Pinout DIMM RM9200 Module Specification DIMM RM9200 e ER HEAR 8 Signal Description The SO DIMM connector provides the signals for the embedded peripheral components of the AT91RM9200 as well as address data lines and chip se
23. sistors for the TX signals have to be placed on the carrier board The RX signals are available at pins 141 _ and 143 ETH RX The TX signals are available at pins 142 TX 144 Due to the size of the recomended components the decoupling of the analog supply pins AVVDR and AVVDT needs additional external components for good ripple rejection 10uF ceramic or tantalum capacitors should be mounted as close as possible to the SO DIMM connector pins 139 AVDDR and 140 AVDDT All other peripheral pins are directly connected to the corresponding pin of the processor DIMM RM9200 Module Specification 19 DIMM RM9200 9 Mechanical Dimensions 9 1 DIMM RM9200 Module R 2mm Rr R 0 75mm 35 5 mm 2 e EE 27 5mm aee 67 6mm Picture 3 Module Dimensions 9 2 DIMM Connector The DIMM RM9200 uses standard SO DIMM memory sockets for connection to the carrier board 3 3V as well as 5V keying can be used for the SO DIMM sockets as the DIMM RM9200 features a wide key for both keying types Caution e The pinout of the DIMM RM9200 SO DIMM connector is NOT compatible with memory sockets Insertion into a socket with wrong pinout may damage the DIMM RM9200 and the carrier board Following table is a short list of possible DIMM connectors which can be used with the DIMM RM9200 Most connectors are right angled connectors w
24. speed Memory SDRAM Program Flash Data Flash SD Card Interfaces SDRAM External Bus Interface LEMBEDDED SYSTEM DESIGN AT91RM9200 ARM920T microcontroller 180 MHz 32 MByte optional 64 MByte 32 bit data bus 16 MByte optional 32 MByte 16 bit data bus 2 MBit SPI Dataflash onlyon Revision 1 1 boards optional Socket on bottom side vertical mounting 32 MByte optional 64 MByte 32 bit data bus 23Bit buffered address bus 16Bit buffered data bus SV tolerant bus buffers External power supply standard Input Input connection On board power supply Type Output Output connection General information Connector Power consumption PCB type Operating temperature Storage temperature Humidity Dimensions h x w Weight DIMM RM9200 Module Specification 3 3 V 596 300 mA max SO DIMM bus pins 3V3 and GND Low drop out linear voltage regulator 1 8 V 50 mA max SO DIMM bus pin 1V8 SO DIMM card edge 144 pins 3 3 V 220 mA typical 8 layer lead free SO DIMM module 25 C to 85 C 25 C to 85 C 10 90 non condensing 37 x 67 mm 30g 22 DIMM RM9200 1 2 12 Important Documents 12 1 Atmel AT9IRM9200 Datasheet Literatur Number 1768D pdf Revision History D Publication Date 11 Jul 05 www atmel com 12 2 Atmel AT9I RM9200 Errata Sheet Literatur Number 6015G pdf Revision History G Publication Date 11 Jul 05 www atmel com 12 3
25. tecture has eliminated the complicated cabling of an embedded PC The user receives important advantages by using DIMM RM9200 Because of the availability of numerous development platforms the user can begin the software development immediately on any platform with the AT91RM9200 This is a factor that may influence the success of a product in today s market where time to market is of high importance As target hardware becomes available it can be implemented with no obstacles to operation because it will be unnecessary to change the software With the SO DIMM connector an exchange for other CPU types is possible increasing the scalability of the ultimate device In the case of product information and new designs the CPU may simply be superseded by a new DIMM module saving redesign time Through continuous development of the DIMM modules the cost for the life span of a product can be reduced profiting users DIMM RM9200 Module Specification 8 DIMM RM9200 5 2 Feature Summary ATMEL AT91RM9200 microcontroller in BGA package with 190 MHz ARM9 CPU UBOOT GPL boot loader LINUX operating system optional WinCE supported 32 SDRAM memory optional 64 MB 32 bit SDRAM data bus 16 MB Flash memory optional 32 MB 16 bit Flash data bus buffered external 23 bit address 16 bit data bus 10 100Mbit Ethernet with on board physical layer and fast MII interface 4 serial interfaces 2 USB host ports 1 USB function port
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