SuperHTM Family E10A-USB Emulator Additional
Contents
1. I Bus L Bus amp Branch Acquires the contents of L Bus amp Branch and I Bus After selecting Type of I Trace mode select the content to be acquired from Acquisition Typical examples are described below note that items disabled for Acquisition are not acquired For the MCUs that incorporate neither DMAC or DTC do not select DMA or DTC when selecting the bus master on the I bus e Example of acquiring branch information only Select L Bus amp Branch from Type and enable Branch on Acquisition e Example of acquiring the read or write access L bus only by a user program Select L Bus amp Branch from Type and enable Read Write and Data access on Acquisition e Example of acquiring the read access only by DMA I bus Select I Bus from Type and enable Read DMA and Data access on Acquisition RENESAS Using Event Condition restricts the condition the following three items are set as the internal trace conditions Table 2 11 Trace Conditions of the Internal Trace Item Acquisition Information Trace halt Acquires the internal trace until the Event Condition is satisfied The trace content is displayed in the Trace window after a trace has been halted No break occurs in the user program Trace acquisition condition Acquires only the data access where the Event Condition is satisfied Point to point Traces the period from the satisfaction of Event Condition2. dialog box can be displayed by selecting Setting Note For the command line syntax refer to the online help a Specifying the measurement start end conditions The measurement start end conditions are specified by using Event Condition 1 2 The Ch1 2 3 list box of the Combination action Sequential PtoP dialog box can be used Table 2 14 Measurement Period Classification Item Selection in Ch2 to Ch1 the Ch1 2 3 PA Description The period from the satisfaction of the condition set in Event Condition 2 start condition to the satisfaction of the condition set in Event Condition 1 end condition is set as the performance measurement period The period from the satisfaction of the condition set in Event Condition 1 start condition to the satisfaction of the condition set in Event Condition 2 end condition is set as the performance measurement period list box Ch1 to Ch2 PA Other than above 26 The period from the start of execution of the user program to the occurrence of a break is measured RENESAS Perfomance Analysis Condition Channel 1 Elapsed time v Channel 2 Disabled be Channel 3 Disabled gt Channel 4 Disabled OK Cancel Figure 2 6 Performance Analysis Dialog Box For measurement tolerance e The measured value includes tolerance e Tolerance will be generated before or after a break Note When Ch2 to Ch1 PA or Chl to Ch2 PA is selected to execute the
3. Ch3 O x x X O Condition 3 B and T2 Event Ch4 O x x x O Condition 4 B and T3 Event Ch5 O x x X O Condition 5 B and T3 Event Ch6 O X X X O Condition 6 B and T2 Event Ch7 O x x x O Condition 7 B and T2 Event Ch8 O x x x O Condition 8 B and T2 Event Ch9 O x x X O Condition 9 B and T2 Event Ch10 O x x x O Condition 10 B and T2 Notes 1 O Can be set in the dialog box X Cannot be set in the dialog box 2 For the Action item B Setting a break is enabled For the count condition setting a break is only enabled T1 Setting the trace halt and acquisition conditions are enabled for the internal trace T2 Setting the trace halt is enabled for the internal trace T3 Setting the trace halt and point to point is enabled for the internal trace P Setting a performance measurement start or end condition is enabled RENESAS Sequential Setting Using the Combination action Sequential or PtoP dialog box specifies the sequential condition and the start or end of performance measurement Table 2 7 Conditions to Be Set Classification Ch1 2 3 list box Item Description Sets the sequential condition and the start or end of performance measurement using Event Conditions 1 to 3 Don t care Sets no sequential condition or the start or end of performance measurement Break Ch3 2 1 Breaks when a condition is satisfied in the order of Event Condition 3 2 1 Break Ch2 1 Break
4. function e Verify In the IO window the verify function of the input value is disabled 9 Illegal Instructions Do not execute illegal instructions with STEP type commands 10 MCU Operating Mode Do not use the emulator in the boot mode user boot mode and user program mode 11 MCU On chip Flash Memory The MCU on chip flash memory cannot be reprogrammed during execution of the user program RENESAS 2 2 Specific Functions and Notes for the Emulator when Using the SH Tiny Series Debugging MCU Board 2 2 1 Selecting the Target MCU Select the target MCU for the emulator according to that in use For details refer to section 4 Preparations for Debugging in the SuperH Family EIOA USB Emulator User s Manual For debugging the SH Tiny series debugging MCU board select the following in the Debugger Target and Select Emulator mode dialog boxes e Debugger Target dialog box SH7125Series Debug MCU BOARD E10A USB SYSTEM e Select Emulator mode dialog box For SH7124 SH7124_Debug_MCU_BOARD For SH7125 SH7125_Debug_MCU_BOARD 2 2 2 Event Condition Functions The emulator is used to set event conditions for the following three functions e Break of the user program e Internal trace e Start or end of performance measurement RENESAS Table 2 5 lists the types of Event Condition Table 2 5 Types of Event Condition Event Condition Type Address bus condition Address Description Sets a co
5. in the power on reset vector table PC Value of the PC in the power on reset vector table SR H 000000FO GBR H 00000000 VBR H 00000000 MACH H 00000000 MACL H 00000000 PR H 00000000 The emulator uses the H UDI do not access the H UDI Low Power States e When the emulator is used the sleep state can be cleared with either the clearing function or with the STOP button and a break will occur e The memory must not be accessed or modified in software standby state e When the emulator is used do not use the deep software standby mode Reset Signals The MCU reset signals are only valid during emulation started with clicking the GO or STEP type button If these signals are enabled on the user system in command input wait state they are not sent to the MCU Note Do not break the user program when the RES signal is being low A TIMEOUT error will occur RENESAS 5 Memory Access during User Program Execution During execution of the user program memory is accessed by the following two methods as shown in table 2 2 Table 2 2 Memory Access during User Program Execution Method Description H UDI read write The stopping time of the user program is short because memory is accessed by the dedicated bus master Short break This method is not used in this product Do not set short break The method for accessing memory during execution of the user program is specified by using the Configuration dialog bo
6. instruction 3 During step operation specifying BREAKPOINTs and Event Condition breaks are disabled 4 When execution resumes from the address where a BREAKPOINT is specified and a break occurs before Event Condition execution single step operation is performed at the address before execution resumes Therefore realtime operation cannot be performed 5 If an address of a BREAKPOINT cannot be correctly set in the ROM a mark will be displayed in the BP area of the address on the Source or Disassembly window by refreshing the Memory window etc after Go execution However no break will occur at this address When the program halts with the event condition the mark disappears 2 2 6 Notes on Setting the Event Condition Dialog Box and the BREAKCONDITION_ SET Command 1 When Go to cursor Step In Step Over or Step Out is selected the settings of Event Condition 3 are disabled 2 When an Event Condition is satisfied emulation may stop after two or more instructions have been executed 25 RENESAS 2 2 7 Performance Measurement Function The emulator supports the performance measurement function 1 Setting the performance measurement conditions To set the performance measurement conditions use the Performance Analysis dialog box and the PERFORMANCE_SET command When any line in the Performance Analysis window is clicked with the right mouse button a popup menu is displayed and the Performance Analysis
7. of such detachment This document may not be reproduced or duplicated in any form in whole or in part without prior written approval from Renesas Please contact a Renesas sales office if you have any questions regarding the information contained in this document Renesas semiconductor products or if you have any other inquiries Contents Section 1 About the Emulator iS 1 1 1 Components of the Emulator eee eeeeseeseceseceseceeecceeseeeseesseeeseesaeesaessseseseseeeseeeas 1 1 2 Connecting the Emulator with the SH Tiny Series Debugging MCU Board 3 Section 2 Software Specifications when Using the SH Tiny Series Debugging MCU Board nacida 5 2 1 Differences between the MCU and the Emulator ooococnncccinocnnocononcnononcnoncncnnncnoncncnnannnnoss 5 2 2 Specific Functions and Notes for the Emulator when Using the SH Tiny Series Debugging MCU Board een 8 2 2 1 Selechnsithe Target MCU siciliano dra rita 8 2 2 2 Event Condition Functions oooconoonononnononnononennnnnonannononeonanaononnonannononeonanarnonno ninos 8 2 253 Trace PUNCtONS e eeen ea or tant ctssteudars NEEE E eSEE ESTEA 14 2 2 4 Note on Using the JTAG H UDI Clock TCK cee eee eeeceeeneeeeneeeeneeeenneeee 25 2 2 5 Notes on Setting the Breakpoint Dialog BOX ooooonccnncninnnocnnoccnoncnnnnannnanonnonnnos 25 2 2 6 Notes on Setting the Event Condition Dialog Box and the BREAKCONDITION_ SET Command cocooonccnncnconcnoncnononononnncnn
8. 5 to the satisfaction of Event Condition 4 To restrict trace acquisition to access for only a specific address or specific function of a program an Event Condition can be used Typical examples are described below Example of halting a trace with a write access L bus to H FFFF8000 by the user program as a condition trace halt Set the condition to be acquired on I Trace mode Set the following in the Event Condition 1 or Event Condition 2 dialog box Address condition Set Address and H FFFF8000 Bus state condition Set L Bus and Write Action condition Disable Acquire Break and set Acquire Trace for Stop Example of acquiring the write access L bus only to H FFFF8000 by the user program trace acquisition condition Select L Bus amp Branch from Type and enable Write and Data access on Acquisition Set the following in the Event Condition 1 or Event Condition 2 dialog box Address condition Set Address and H FFFF8000 Bus state condition Set L Bus and Write Action condition Disable Acquire Break and set Acquire Trace for Condition For the trace acquisition condition the condition to be acquired by Event Condition should be acquired by I Trace mode Example of acquiring a trace for the period while the program passes H 1000 through H 2000 point to point Set the condition to be acquired on I Trace mode Set the address condition as H 1000 in the E
9. REJ1 0J1 424 0200 Everywhere you imagine y lt E N ESAS SuperH Family E10A USB Emulator Additional Document for User s Manual Supplementary Information on Using the SH Tiny Series Debugging MCU Board Renesas Microcomputer Development Environment System SuperH Family SH Tiny Series E10A USB for SH Tiny Series HS7125DBKCU01HE Rev 2 00 Renesas Technology Revision Date Apr 04 2007 ee Notes regarding these materials This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document including but not limited to product data diagrams charts programs algorithms and application circuit examples You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass destruction or for the purpose of any other military use When exporting the products or technology described herein you should follow the app
10. able 2 3 Trace Functions Function Internal Trace AUD Trace Branch trace Supported Supported Memory access trace Supported Supported Software trace Not supported Supported Table 2 9 shows the type numbers that the AUD function can be used Table 2 9 Type Number and AUD Function Type Number AUD Function HS0005KCU01H Not supported HS0005KCU02H Supported The internal and AUD traces are set in the Acquisition dialog box of the Trace window RENESAS Internal Trace Function When I Trace is selected for Trace type on the Trace Mode page of the Acquisition dialog box the internal trace can be used Acquisition Trace mode Trace type e Trace C AUD function I Trace mode Type L Bus amp Branch Acquisition V Read IV Write V Branch Y Data access or 1 DT JV Instruction Fetch When trace buffer full Trace continue y AUD mode F r r Figure 2 2 Acquisition Dialog Box Internal Trace Function 15 ENESAS The following three items can be selected as the internal trace from Type of I Trace mode Table 2 10 Information on Acquiring the Internal Trace Item Acquisition Information L Bus 8 Branch Acquires the data and branch information on the L bus e Data access read write e Branch information e Instruction fetch I Bus Acquires the data on the I bus e Data access read write e Selection of the bus master on the I bus CPU DMA DTC e Instruction fetch
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12. ayed Branch trace can be acquired by selecting the Branch trace check box in the AUD function group box of the Trace mode page The branch type can be selected in the AUD Branch trace page Acquisition Trace mode Window trace AUD Branch trace V Acquire normal branch instruction trace Y Acquire subroutine branch instruction trace V Acquire exception branch instruction trace OK Cancel Figure 2 4 AUD Branch trace Page 22 ENESAS b Window Trace Function Memory access in the specified range can be acquired by trace Two memory ranges can be specified for channels A and B The read write or read write cycle can be selected as the bus cycle for trace acquisition Setting Method i Select the Channel A and Channel B check boxes in the AUD function group box of the Trace mode page Each channel will become valid ii Open the Window trace page and specify the bus cycle memory range and bus type that are to be set for each channel Ac quisit ion Trace mode Window trace AUD Branch trace Channel A Read Write C Read Write C Read Write Start address HF FFF8000 End address HF FFF8003 Bus state L Bus Channel B Read Write Read Write C Read Write Start address HF FFFS000 End address HF FFF8003 Bus state e Bus Coca Figure 2 5 Window trace Page 23 RENESAS c Software Trace Function Note This function can b
13. ch occurs while the trace information is being output the CPU stops operations until the information is output The user program is not executed in realtime Trace buffer Trace continue This function overwrites the latest trace information to store full the oldest trace information Trace stop After the trace buffer becomes full the trace information is no longer acquired The user program is continuously executed To set the AUD trace acquisition mode click the Trace window with the right mouse button and select Setting from the pop up menu to display the Acquisition dialog box The AUD trace acquisition mode can be set in the AUD model or AUD mode2 group box in the Trace mode page of the Acquisition dialog box 20 RENESAS Acquisition Trace mode Window trace AUD Branch trace Trace type C Trace AUD function AUD mode V Branch trace Window trace fie Grennell 4 JT Channel E TF Software trace AUD model Realtime trace C Non realtime trace AUD mode2 Trace continue C Trace stop Break AUD trace display range Start pointer 0 255 End pointer po x Figure 2 3 Trace mode Page When the AUD trace function is used select the AUD function radio button in the Trace type group box of the Trace mode page 21 RENESAS a Branch Trace Function The branch source and destination addresses and their source lines are displ
14. condition before executing one or two instructions in the SLEEP instruction 3 Ifthe power on reset and the Event condition are matched simultaneously no condition will be satisfied 4 Ifa condition of which intervals are satisfied closely is set no sequential condition will be satisfied Set the Event conditions sequentially which are satisfied closely by the program counter with intervals of two or more instructions The CPU is structured as a pipeline the order between the instruction fetch cycle and the memory cycle is determined by the pipeline Accordingly when the channel condition is matched in the order of bys cycle the sequential condition is satisfied 13 RENESAS 5 Ifthe settings of the Event condition or the sequential conditions are changed during execution of the program execution will be suspended The number of clocks to be suspended during execution of the program is a maximum of about 52 bus clocks B If the bus clock Bo is 10 0 MHz the program will be suspended for 5 2 us 6 Ifthe settings of Event conditions or the sequential conditions are changed during execution of the program the emulator temporarily disables all Event conditions to change the settings During this period no Event condition will be satisfied 7 When the emulator is being connected the user break controller UBC function is not available 2 2 3 Trace Functions The emulator supports the trace functions listed in table 2 8 T
15. e peripheral clock Pb is 10 0 MHz and the bus clock Bo is 10 0 MHz the program will be suspended for 2 87 ms If a break occurs with the Event Condition when one or two instructions have been executed after a break occurred in an instruction and there is an unconditional branch a trace result will be displayed even if the unconditional branch has not been executed Restarting trace acquisition after halting Restarting trace acquisition is disabled during execution of the user program a break must be generated Note on execution of the user program Do not change trace settings during execution of the user program trace acquisition may be disabled The following trace settings will be changed the conditions of Event Condition the sequential conditions satisfied by Event Condition and internal trace set in the Acquisition dialog box To change these settings a break must be generated RENESAS AUD Trace Functions This function is operational when the AUD pin of the device is connected to the emulator Table 2 13 shows the AUD trace acquisition mode that can be set in each trace function Table 2 13 AUD Trace Acquisition Mode Type Mode Description Continuous Realtime trace When the next branch occurs while the trace information is trace occurs being output all the information may not be output The user program can be executed in realtime but some trace information will be lost Non realtime trace When the next bran
16. e supported with SHC C compiler manufactured by Renesas Technology Corp including OEM and bundle products V7 0 or later When a specific instruction is executed the PC value at execution and the contents of one general register are acquired by trace Describe the Trace x function x is a variable name to be compiled and linked beforehand For details refer to the SHC manual When the load module is downloaded on the emulator and is executed while a software trace function is valid the PC value that has executed the Trace x function the general register value for x and the source lines are displayed To activate the software trace function select the Software trace check box in the AUD function group box of the Trace mode page Notes on AUD Trace 1 When the trace display is performed during user program execution the mnemonics operands or sources are not displayed 2 The AUD branch trace function outputs the differences between newly output branch source addresses and previously output branch source addresses The window trace function outputs the differences between newly output addresses and previously output addresses If the previous branch source address is the same as the upper 16 bits the lower 16 bits are output If it matches the upper 24 bits the lower 8 bits are output If it matches the upper 28 bits the lower 4 bits are output The emulator regenerates the 32 bit address from these differences and display
17. ed If the start and end conditions are satisfied closely trace information will not be acquired correctly The execution cycle of the instruction fetched before the start condition is satisfied may be traced Halting a trace Do not set the trace end condition for the sleep instruction and the branch instruction that the delay slot becomes the sleep instruction RENESAS Trace acquisition condition Do not set the trace end condition for the sleep instruction and the branch instruction according to which the delay slot becomes the sleep instruction When I Bus L Bus amp Branch is selected and the trace acquisition condition is set for the L bus and I bus with Event Condition set the L bus condition and the I bus condition for Event Condition 1 and Event Condition 2 respectively If the settings of I Trace mode are changed during execution of the program execution will be suspended The number of clocks to be suspended during execution of the program is a maximum of about 26 bus clocks B If the bus clock B is 10 0 MHz the program will be suspended for 2 6 us Do not use the data condition as the trace acquisition condition Displaying a trace If a trace is displayed during execution of the program execution will be suspended to acquire the trace information The number of clocks to be suspended during execution of the program is a maximum of about 16384 peripheral clocks Pp 12310 bus clocks B If th
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20. measurement result after a break the measurement results during performance measurement are added 2 If the start condition is satisfied after the end condition has been satisfied by the point to point of the internal trace trace acquisition will be restarted 3 When the start or end of performance measurement is used the count for specifying the condition of Event Condition 1 must be once Usage Example of Sequential Break Extension Setting A tutorial program provided for the product is used as an example For the tutorial program refer to section 6 Tutorial in the SuperH Family EIOA USB Emulator User s Manual The conditions of Event Condition are set as follows 1 Ch3 Breaks address H 00001068 when the condition Only program fetched address after is satisfied 2 Ch2 Breaks address H 0000107a when the condition Only program fetched address after is satisfied 3 Chl Breaks address H 00001086 when the condition Only program fetched address after is satisfied Note Do not set other channels 4 Sets the content of the Ch1 2 3 list box to Break Ch 3 2 1 in the Combination action Sequential or PtoP dialog box 5 Enables the condition of Event Condition 1 from the popup menu by clicking the right mouse button on the Event Condition sheet Then set the program counter and stack pointer PC H 00000800 R15 H 00010000 in the Registers window and click the Go button If this does not execu
21. ndition when the address bus data access value or the program counter value before or after execution of instructions is matched Data bus condition Data Sets a condition when the data bus value is matched Byte word or longword can be specified as the access data size Bus state condition Bus State There are two bus state condition settings Bus state condition Sets a condition when the data bus value is matched Read Write condition Sets a condition when the read write condition is matched Count Sets a condition when the specified other conditions are satisfied for the specified counts Action Selects the operation when a condition such as a break a trace halt condition or a trace acquisition condition is matched Using the Combination action Sequential or PtoP dialog box which is opened by selecting Combination action Sequential or PtoP from the pop up menu on the Event Condition sheet specifies the sequential condition and the start or end of performance measurement RENESAS Table 2 6 lists the combinations of conditions that can be set under Chl to Ch10 Table 2 6 Dialog Boxes for Setting Event Conditions Function Address Bus Data Bus Bus State Count Condition Condition Condition BusCondition Dialog Box Address Data State Count Action Event Chi O O O O O Condition 1 B T1 and P Event Ch2 O O O x O Condition 2 B T1 and P Event
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23. nonnncnnccnncrnnonnss 25 2 2 7 Performance Measurement Function oococnoccconcncononconnncnncnnonannnnnncnnancnnnc nana ncnnncconos 26 RENESAS ENESAS Section 1 About the Emulator 1 1 Components of the Emulator The E10A USB emulator supports the SH Tiny series debugging MCU board SH7124 debugging MCU board or SH7125 debugging MCU board Table 1 1 lists the components of the emulator RENESAS Table 1 1 Components of the Emulator Classi Quan fication Component Appearance tity Remarks Hard Emulator box HS0005KCU01H ware Depth 65 0 mm Width 97 0 mm Height 20 0 mm Mass 72 9 g or HS0005KCU02H Depth 65 0 mm Width 97 0 mm Height 20 0 mm Mass 73 7 g User system interface gt 1 14 pin type cable Length 20 cm Mass 33 1 g User system interface 1 36 pin type cable u Length 20 cm Mass 49 2 g only for HS0005KCUO2H USB cable 1 Length 150 cm Mass 50 6 g Soft E10A USB emulator setup 1 HS0005KCUO1SR ware program SD SuperH Family E10A HS0005KCUO1HJ USB Emulator User s HSOOO5KCU01HE Manual Supplementary HS7125DBKCUO1HJ Information on Using the HS7125DBKCU01HE SH Tiny Series Debugging MCU Board and Test program manual for HS0005TMO01HJ and HS0005KCU01H and HS0005TMO1HE HS0005KCU02H provided on a CD R Note Additional document for the MCUs supported by the emulator is included Check the target MCU and refer to its additional document RENESAS 12 Connecting the Emulat
24. or with the SH Tiny Series Debugging MCU Board Table 1 2 shows the type number of the emulator the corresponding connector type and the use of AUD function Table 1 2 Type Number AUD Function and Connector Type Type Number Connector AUD Function HS0005KCU02H 36 pin connector Available HS0005KCU01H HSOOO5KCU02H 14 pin connector Not available The H UDI port connector has the 36 pin and 14 pin types as described below Use them according to the purpose of the usage 1 36 pin type with AUD function The AUD trace function is supported A large amount of trace information can be acquired in realtime The window trace function is also supported for acquiring memory access in the specified range memory access address or memory access data by tracing 2 14 pin type without AUD function The AUD trace function cannot be used because only the H UDI function is supported RENESAS RENESAS Section 2 Software Specifications when Using the SH Tiny Series Debugging MCU Board 2 1 Differences between the MCU and the Emulator 1 When the emulator system is initiated it initializes the general registers and part of the control registers The initial values of the MCU are undefined When the emulator is initiated from the workspace a value to be entered is saved in a session Table 2 1 Register Initial Values at Emulator Link Up Register Emulator at Link Up RO to R14 H 00000000 R15 SP Value of the SP
25. ounting is also halted 3 When the measurement start or end condition is set counting is halted if a power on reset is input after and before the satisfaction of measurement start and end conditions 2 Displaying the measured result The measured result is displayed in the Performance Analysis window or the PERFORMANCE_ANALYSIS command with hexadecimal 32 bits Note Ifa performance counter overflows as a result of measurement will be displayed 28 RENESAS 3 Initializing the measured result To initialize the measured result select Initialize from the popup menu in the Performance Analysis window or specify INIT with the PERFORMANCE_ANALYSIS command 29 RENESAS 30 RENESAS SuperH Family E10A USB Emulator Additional Document for User s Manual Supplementary Information on Using the SH Tiny Series Debugging MCU Board Publication Date Rev 1 00 July 10 2006 Rev 2 00 April 4 2007 Published by Sales Strategic Planning Div Renesas Technology Corp Edited by Customer Support Department Global Strategic Communication Div Renesas Solutions Corp 2007 Renesas Technology Corp All rights reserved Printed in Japan Renesas Technology Corp Sales Strategic Planning Div Nippon Bldg 2 6 2 Ohte machi Chiyoda ku Tokyo 100 0004 Japan ENESAS RENESAS SALES OFFICES http www renesas com Refer to http www renesas com en network for the latest and detailed information Re
26. rH Family E10A USB Emulator Additional Document for User s Manual Supplementary Information on Using the SH Tiny Series Debugging MCU Board ENESAS Renesas Technology Corp 2 6 2 Ote machi Chiyoda ku Tokyo 100 0004 Japan
27. s it in the Trace window If the emulator cannot display the 32 bit address it displays the difference from the previously displayed 32 bit address 3 If the 32 bit address cannot be displayed the source line is not displayed 4 If acompletion type exception occurs during exception branch acquisition the next address to the address in which an exception occurs is acquired 5 The AUD trace is disabled while the profiling function is used 6 Set the AUD clock AUDCK frequency to 40 MHz or lower If the frequency is higher than 40 MHz the emulator will not operate normally 24 RENESAS 2 2 4 Note on Using the JTAG H UDI Clock TCK 1 Set the JTAG clock TCK frequency to 1 4 or lower than the frequency of the peripheral clock Po and to 2 MHz or more 2 The initial value of the JTAG clock TCK is 2 5 MHz 3 A value to be set for the JTAG clock TCK is initialized after executing Reset CPU or Reset Go Thus the TCK value will be 2 5 MHz 2 2 5 Notes on Setting the Breakpoint Dialog Box 1 When an odd address is set the next lowest even address is used 2 A BREAKPOINT is accomplished by replacing instructions of the specified address Accordingly it can be set only to the internal RAM area A BREAKPOINT cannot be set to the following addresses e An area other than CS the internal RAM and the internal flash memory e An instruction in which Break Condition 2 is satisfied e A slot instruction of a delayed branch
28. s when a condition is satisfied in the order of Event Condition 2 1 I Trace stop Ch3 2 1 Halts acquisition of an internal trace when a condition is satisfied in the order of Event Condition 3 2 1 I Trace stop Ch2 1 Halts acquisition of an internal trace when a condition is satisfied in the order of Event Condition 2 1 Ch2 to Ch1 PA Sets the performance measurement period during the time from the satisfaction of the condition set in Event Condition 2 start condition to the satisfaction of the condition set in Event Condition 1 end condition Ch1 to Ch2 PA Sets the performance measurement period during the time from the satisfaction of the condition set in Event Condition 1 start condition to the satisfaction of the condition set in Event Condition 2 end condition Ch4 5 list box Sets the point to point of the internal trace the start or end condition of trace acquisition using Event Conditions 4 and 5 Don t care Sets no start or end condition of trace acquisition I Trace Ch5 to Ch4 PtoP Sets the acquisition period during the time from the satisfaction of the condition set in Event Condition 5 start condition to the satisfaction of the condition set in Event Condition 4 end condition RENESAS 11 Notes 1 If the start condition is satisfied after the end condition has been satisfied by measuring performance performance measurement will be restarted For the
29. te normally issue a reset and execute the above procedures The program is executed up to the condition of Ch1 and halted Here the condition is satisfied in the order of Ch3 gt 2 gt 1 RENESAS i 0x00001058 ali j 0x00001068 p_sam gt sort a 0x00001070 p_sam gt change a 0x00001076 p_sam gt s0 a 0 0x0000107a p_sam gt sl all 0x0000107e p_sam gt s al2 0x00001082 p_sam gt s3 al3 0x00001086 p_sam gt sd al4 0x0000108a p_sam gt s5 al5 0x0000108e p_sam gt s6 aL6 0x00001092 p_sam gt s7 al 0x00001096 p_sam gt s8 al8 0x0000109a p_sam gt s9 aL9 0x0000109e delete p_sam Figure 2 1 Source Window at Execution Halted Sequential Break If the sequential condition performance measurement start end or point to point for the internal trace is set conditions of Event Condition to be used will be disabled Such conditions must be enabled from the popup menu by clicking the right mouse button on the Event Condition sheet Notes 1 Ifthe Event condition is set for the slot in the delayed branch instruction by the program counter after execution of the instruction the condition is satisfied before executing the instruction in the branch destination when a break has been set it occurs before executing the instruction in the branch destination 2 Do not set the Event condition for the SLEEP instruction by the program counter after execution of the instruction Do not set the data access
30. user program specify conditions set in Event Condition 2 and Event Condition 1 and one or more items for performance measurement b Measurement item Items are measured with Channel 1 to 4 in the Performance Analysis dialog box Maximum four conditions can be specified at the same time Table 2 15 shows the measurement items 27 RENESAS Table 2 15 Measurement Item Selected Name Option Disabled None Elapsed time AC The number of execution cycles I is set as the measurement item Number of execution states VS Branch instruction counts BT Number of execution instructions l Exception interrupt counts EA Interrupt counts INT URAM area access counts UN URAM area instruction access counts UIN URAM area data access counts UDN Note Selected names are displayed for CONDITION in the Performance Analysis window Options are parameters for lt mode gt of the PERFORMANCE_SET command Each measurement condition is also counted when a condition in table 2 16 is generated Table 2 16 Performance Measurement Condition to be Counted Measurement Condition Notes Branch count The counter value is incremented by 2 This means that two cycles are valid for one branch Notes 1 In the non realtime trace mode of the AUD trace normal counting cannot be performed because the generation state of the stall or the execution cycle is changed 2 When the CPU clock is halted in the mode such as sleep c
31. vent Condition 5 dialog box RENESAS Set the address condition as H 2000 in the Event Condition 4 dialog box Set Ch4 5 as I Trace Ch5 to Ch4 PtoP in the Combination action Sequential or PtoP dialog box When point to point and trace acquisition condition are set simultaneously they are ANDed Notes on Internal Trace Timestamp The timestamp is twice the crystal oscillator or the external clock that is connected to or input to the target MCU Table 2 12 shows the timing for acquiring the timestamp Table 2 12 Timing for the Timestamp Acquisition Item Counter Value Stored in the Trace Memory L bus instruction fetch Counter value when instruction fetch has been completed L bus data access Counter value when data access has been completed Branch Counter value when the next bus cycle has been completed after a branch I bus fetch Counter value when a fetch has been completed I bus data access Counter value when data access has been completed 18 Point to point The trace start condition is satisfied when the specified instruction has been fetched Accordingly if the trace start condition has been set for the overrun fetched instruction an instruction that is not executed although it has been fetched at a branch or transition to an interrupt tracing is started during overrun fetching of the instruction However when overrun fetching is achieved a branch is completed tracing is automatically suspend
32. x Table 2 3 Stopping Time by Memory Access Reference Method Condition Stopping Time H UDI read write Reading of one longword for the Reading Maximum 2 bus clocks internal RAM Bo Writing of one longword for the Writing Maximum 2 bus clocks Bo internal RAM 6 Using WDT The WDT does not operate during break 7 Loading Sessions Information in JTAG clock of the Configuration dialog box cannot be recovered by loading sessions Thus the TCK value will be as follows e When HS0005KCU01H or HS0005KCU02H is used TCK 2 5 MHz 8 IO Window e Display and modification For each watchdog timer register there are two registers to be separately used for write and read operations RENESAS Table 2 4 Watchdog Timer Register Register Name Usage Register WTCSR W Write Watchdog timer control status register WTCNT W Write Watchdog timer counter WTCSR R Read Watchdog timer control status register WTCNT R Read Watchdog timer counter e Customization of the I O register definition file After the I O register definition file is created the MCU s specifications may be changed If each I O register in the I O register definition file differs from addresses described in the hardware manual change the I O register definition file according to the description in the hardware manual The I O register definition file can be customized depending on its format Note that however the emulator does not support the bit field
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