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1. intlz vrite this ccld bcct lcader prcgram cut tc the d sk INTLZ LXI CALL 2 LXI CALL MVI CALL CALL Je DONE JAP SP STACK set up stack 2 2 the drive B RAM 300H get starting address cf this SETDMA set the write address C 1 set the tc write SETSEC DWRITE write this prcgram cut ERROR DONE stcp here 99 se v 60 9 99 09 WO 09 DI a O xO 00 HO UI N 4 69 AN AF 99 bo OF C L L U AV 4 2 s s OO QU 38 54 au sa at REO OO OO OO O Y ET QUN ONU FWN ao 9 9 06 99 94 99 y 99 yo 99 na 99 a 4 ON AD ow 4 a ao yn 2900 E000 400 E6EE 2009 00 2012 2015 018 024 2700 E782 745 E746 mou U tp i H HN ti 21003E 31 8 CDOFEO 009 0 219029 44 30 CD12z0 050A 236 7 0 21 c5 CCOCEO 1 CS CDOFEO CD24E0 218000 09 C318E7 la Boot leader program for cp m The follcuing code is
2. 8 UART INVERTED UART INVERTED 343 370 DATA INPUT DATA OUTPUT 9 UART INVERTED DISK JOCKEY 343 371 STATUS FUNCTION DISK JOCKEY DRIVE CONTROL 343 372 STATUS REGISTER Lo NOT USED 343 373 1791 CONTROLLER 1791 CONTROLLER 343 374 STATUS COMMAND 1791 TRACK REGISTER 343 375 d E3FE 1791 SECTOR REGISTER 343 376 E3FF 1791 DATA REGISTER 343 377 E400 E7FF 344 000 347 377 in s apum UMED lt amp ume ss ANA Q s SE G s uM s s CUM W s du QUE QUAM AUR s s s v 57 SOFTWARE LISTINGS 58 48 56 99 9 9 WO WO or 99 QA Ut QAO Oo AVA BW IN Q vO O0 OY UE EWN Qut zw O 9 09 99 08 99 66 00 sb 9 6 WO 9 On oe 99 99 E K WN WA FU e 2 22 2 98 49 68 99 9 e OO C 47 9 4 u Ow Wed ou 9 ME ME Ge 94 99 sa
3. 28 29 30 39 40 41 5E98 21045F 5E9B C3A75E 5EQE 1 5EA4 5EA7 5EAA 5EAB 5EAD 5EAF 5EBS 5EBI 5EB2 5EB3 5EB4 5EB5 210C5F C3BF5E 21DC5E 3 0300 17 const get the status for the currently assigned console device The console device be gotten from iobyte then a jump to the correct console status routine is performed k e k k k k k k k k fe k k k k k k k k k k k k K k k k k kk k k kk k k k e e e kx kx e ke kk k k k k k k k k k k kk kk CONST LXI H CSTBLE beginning of jump table JMP select corre jump K k k k k k k k k k k k k k k k k k k k k K k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k ok csreader if the console is assigned to the reader then a jump will be made here where another jump will occur to the correct reader status x k CSREADR LXI H CSRTBLE beginning of reader status tal JMP READERA k k k k k k k k k k k k k k k k k k k k k k k k k k ck ck deck ode sk deck ck deck ke koe ke e kx x ke ke ko e ko ko oko ERE RK kk conin take the correct jump for the console input routine The jump is based on the two least sig nificant bits of iobyte Kk k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k
4. 5EDC 5EDE 5EEQ 5EE2 5 4 5 5EE8 5EEA SEEC SEEE SEFQ SEF2 5EF4 5EF6 5EF8 5EFA 03 0 1F5F BC5E lF5F 06 0 145 D15E 145F 06 0 145F 145F 145F 06 0 145F 145F 145F k k kk c If customizing I O routines is being performed the table below should be modified to reflect the changes all I O devices are decoded out of iobyte and the jump is taken from the following tables K k k k k k k k k k k k k k k k k k k k k k k k k k e k ke e k k k he e e e k ke ke ke ke ke k ke kx k k kn ke kx kn kx kx kn k console input table CITBLE DW DW DW DW CITTY CICRT READER console output table COTBLE DW LTBLE DW DW DW DW COTTY COCRT LIST COUCI 1155 device table COTTY COCRT COLPT COULI punch device table PTBLE DW DW DW DW COTTY COPTP COUPI COUP2 input input input input output output output output zoutput output zoutput output output output output output reader device input table from from from from to to to to to to to to to to to to tty currently assigned by intioby input from 2d crt currently SWITCHBOARD serial port 1 reader depends on reader selection user console 1 c
5. IN 2 Input frem paper tape reader get status E540 404 swait for character JZ CIPTR 0801 IN 1 E6TF ANI 5strip cff the parity c9 RET DOSCSREGGSAKROCOSARSRNMEMARHANMDRANKDONRANKAKSRH AmKRKRARNE BNBBRNRN KRNA 5 ccnscle status rcutines test if a character has arrived T 202120 CSTTY CALL TSTAT sstatus frcm disk 24 3809 STAT M71 sprep fcr zerc return cO Rud snething found 30 A sreturn with 0 59 RET 523220908699 9 t Tne fellesing equates cause the tavizes te zet status frez tae SALTCHBOARD serial pert 1 2 8 599599990092209 amp 9592994529052599209PP5 590905350952 99 9 25905290 0 59 z CSURI EQU sstatus of user reader 1 z CSUR2 EQU status of user reader 2 z CSPTR EQU 3tatus of paper tape reader z CSUC1 EQU status of user console 1 CSCRT IN 2 status frcm crt get status E640 ANI 30H strip of data ready bit 40 XRI 40H correct polarity C3563F JMP STAT j return prcper indication The following messages could be put out by the cbics gt 4 145445145454544424434224 3 000 PROMPT DB ACR ALF prezpt message 16 CP
6. If ar errer cceurs the status reurrned by tne M 29 zezirciler will ce in iccaticn STACK 9329085999 222585955B00 0V 0000000022020 bO000 t 2060080042C 9090 Q vO Ww 74 QN G O0 as 99 po 8 40 AN e de Wo QW W WI vO ww tu Q L a ao ate 99 474 seb A Daft k a a se ve ee 5 9999999 925550909500250909928290682049565029 2 beet lead all cf cpm and then jump there Initialize icbyte 4 59999959509902036552220065029050500890506 3555 BOOT n SP STACK sinitial stack 353 EN MV A INTIOBY sinitialize i obyt 3232 329399 STA IOBYTE LUE 235 2154 LXI H PROMPT sprint signcn message 3633 CALL MESSG x 3E 38 sselect disk A 3E3C 322400 STA CDISK 313399 GOC M LXI B 830ti sset up default disk buffer 3545 22122 CALL DMA E35 352 MVI A 0C3H t r pus i 3 Jump instructicn tc warm bcct 2 212355 LXI START 3 222139 SHLD 1 3 59 323520 5 5 put jump tc cpm entry at 5 3ES3 210531 LXI H ENTRY i 3256 229500 SHLD 6 3 59 340495 LDA CDISK sjump te with current disx in 3552 4 MOV 3 50 239229 JMP C M DDDNSPDEHNDESKARTHDPEDNASOA DNCDRRAN RAS5RNRANCRAE RSHRSGRMARNDHRkSKHHNHDNKBDAD L warm bect lead in all cf cpa except the cbics Then enter cpm 55099 99900690
7. VA 0 SA Ga 343 242 343 242 343 245 343 250 343 252 343 252 343 253 343 254 383 257 3 257 3 260 3 261 3 264 3 264 3 265 3 266 3 267 3 270 3 271 3 272 3 273 3 276 ade MA x SA SAP VAS RAD KAJ dmg SEE 3433277 2210 2216 171 176 366 004 372 004 312 320 343 343 346 343 343 021 000 372 020 252 257 264 000 343 343 343 343 NBUSY BUSY BERROR MEASUR INDXHI INDXLO INDXCT DENFIX NOP NOP MOV MOV RAR JNC MOV RAR MOV RNC MOV ORA JN2 PUSH INX MOV LDA XRI STA XRI XTHL STA MVI XTHL MOV POP MVI STC RET LXI LXI MVI MOV ANA JNZ MOV ANA JZ INX XTHL XTHL XTHL XTHL MOV ANA JNZ RET fill fill D M DCREG RSTBIT DCMD RSTBIT DCMD M CLRCMD M D H A M C INDXCT instruction instruction to the 1791 wait for the busy flag test for device busy restore status return if not busy test for two disk revolutions 47 machine cycles Save cmd address track register save present track 1791 control bits reset the 1791 controller Clear the Command busy fault force an interrupt restore the the track no restore the stack lost record error flag initialize count status port index bit flag wait for index pulse low w
8. w YON YO Si oo 9 ee v9 va to o 3ECF 340309 3502 17 JE 210C3F 1 C3CF3E 21253F 3EE7 340300 3EEB 3033 211C3F 3EF1 340300 3EFN 3EFS 1F 3EF6 3679 21143F 340300 3EFF 1 3290 IF 3FQ1 CONIN1 LDA IOBYTE RAL entry at seldev will fora cffset inte the table pcinted tc by and then pick up the address and jump there SELDEV ANI 6H strip off unwanted bits MVI D 0 form cffset MOV E A DAD D sadd cffset MOV A pick up high byte INX H MOV H M pick up lcw byte MOV L A ferm address PCHL there 5090000990909994952090 90909539992 2202260090 2905 P0009 5 99 5 ccncut take the prcper branch address based the twc Li least significant bits cf icbyte S99500099090922P09522909909205225062425009922280209092522295555002079525 CONOUT LXI 442 COUINT 4 the deccde 95590092955950P625202B2220922296522099000 9DPDPPBERPO99P95690 2293935 8 reader select the correct reader device fcr input The reader selected frcm bits 2 and 3 cf icbyte 86909099099999505555500009292929299899256952022090928928305232G0P02P READER LXI beginning cf reader input table entry at readera will deccde bits 2 amp 3 cf icbyte used by csreader READERA LDA IOBYTE entry at re
9. POWER UP If all previous checks have been performed you are ready to put power to your fully populated board In an empty system with power off insert the Disk Jockey and power up If the board smokes power down and investigate If not measure the regulated voltages again If any voltages have been lost since powering up the bare board power down and check for upside down IC s Isolate the possible faulty chip or chips by powering down removing a section of IC s and powering up again Continue this sequence until the faulty IC or IC s are found BE SURE NEVER TO INSERT OR REMOVE A BOARD WITH POWER ON THIS MAY DAMAGE THE BOARD This completes the initial check out of your Disk Jockey 56 DJ2D REV4 MEMORY MAP HEX ADDRESS FUNCTION OCTAL ADDRESS mA ammo GRAM Au dua avi GUED Gump 7 s W Q s s 17 177 v GM ED G Q s S WP eH s e G s m lt M am Qm um u s se a mm w s a w m lt lt c AED w UNO avi GUE pP s man I O REGISTERS WHEN READ WHEN WRITTEN
10. 11 Programming Specification ROM Subroutines DRIVE dili d A REGISTER BIT PATTERN 7 6 5 4 3 2 1 9 DENSITY DRIVE LSB SIDE DRIVE MSB SECTOR LENGTH LSB SECTOR LENGTH MSB MSB DRIVE LSB DRIVE NO SIDE SIDE BIT SELECTED DRIVE 1 DRIVE B 9 SIDE 0 DRIVEC 1 SIDE 1 DRIVE D SECTOR SECTOR SECTOR DENSITY LENGTH LENGTH LENGTH MSB LSB sassa mas Sama ees 0 0 128 SINGLE 1 256 DOUBLE 1 0 512 DOUBLE 1 1 1024 DOUBLE DSKERR Calling this routine will put the CPU into a loop which will cause the LED Light Emitting Diode at the top left portion of the controller board to flash on and off at intervals of about a second This routine takes parameters and will not return its primary usefulness is to indicate when a hard error has occured during the bootstrap load operation 12 Programming Specification ROM Subroutines DISKETTE INITIALIZATION Before new diskette be successfully used it must be initialized Most diskettes are sold pre initialized However it is sometimes necessary to reinitialize diskette The process of initializing a diskette involves writing the header field of every sector of every track onto the diskette None of the subroutines described
11. 288 1 7MHz 5MHz CPU The controller has a cable connector for attaching a flat cable to the first floppy disk drive and can control a chain of up to four drives daisy chained on this cable A second connector on the DJ is provided for attatching a terminal device The DJ uses memory mapped I O Device registers used to input from and output to the floppy disk and the serial port are accessed from the CPU board of the S 100 system by references to memory addresses registers differ in function depending on whether they are being read or written Most users will not wish to use the hardware level registers directly Instead they can call standard disk and serial I O subroutines contained 1016 bytes of PROM memory on the DJ board This PROM occupies 1024 byte block of 5 100 bus memory address space 1024 byte RAM is also provided which is used by the PROM firmware for the storage of various disk related variables such the current track number the current drive number etc exact map of these variables is included at the end of the PROM listings The remainder of the RAM may be used as a disk data buffer or for general purpose memory The actual addresses where the 1 0 registers PROM and RAM Introduction appear are controlled by another PROM referred to as the address selection is supplied with standard addresses burned into it for these registers If the standard addre
12. ERROR i LOST DATA DATA REQUEST BAD DATA FORMAT SELDRV 7 6 5 4 3 2 1 0 INVALID DRIVE NUMBER 14 UTILIZING DISK JOCKEY FIRMWARE Data transfers to and from the disk must be preceeded by calls to routines transfer 1 2 3 4 certain Disk Jockey routines The function of these is to set up parameters that will be used during the The following procedure is suggested Select the drive to be involved in the transfer This is accomplished by calling the routine SELDRV with the proper drive number in register C The drive need not be selected before every transfer A drive once selected will remain selected until another drive is specified For 2 headed drives the side of a drive should specified by calling the SETSID routine with the desired side number in the C register If the drive has not been accessed before the read write head of the drive is in an unknown position To initialize the drive a call should be made to TKZERO in order to bring the head to track zero Set the DMA address This involves calling the routine SETDMA with the correct value in the register pair It is not necessary to set the DMA address before every data transfer If data is always being read into the same area of memory then only one SETDMA call need be made Set the read write head over the desired track This involves a call to TRKSET with the
13. o viui III ki lt O ae 9 eb oo S oo oo 8 24 BW N OU M OVI ue gt ou 90 op OU bo U up OD O0 S nd iii lt RE Ap REUS OS OS OON ON ON HU AVI 4 x GON en me a DESDE CBIOS DRIVERS FOR CPM a a Currently the cbics is set up fcr a 15K cpm tc make a larger system change the value cf CPM a a a 99 95 9 953909090250922522595509 2990900029285960208P 52560229222522582000290 2939 CPM EQU 2900H cp m beginning lcad address 3196 ENTRY EQJ CPM 3064 sepsya entrance peint 9598 CDISK EQU a current disk stcrage lccaticn 9903 EQU 3H sicbyte stcrage lecaticn 1 fe Yebyte allcus selecticn cf different I O devices It can be initialized way Sy changing the equate bellov Initial icbyte is currently defined as ccnscle tty E reader s tty punch tty list tty s a n O OSNDSOSFGNDHDANADASCDHKNCOABRADNRHIRNEUASRDRADC5DB TRHSNRERRREMAR GNMHRKD KHHHBHHH 2090 INTIOBY EQU 0 ginitial icbyte DDONCHOTDENOSDNROCNCUCQRCNDMAUONIANKRCORHE NC AE CADIE MERA NKHKHBIRKHKNM6 The fcllcwing equates reference the disk jeckey 2d ccn
14. s lcaded by the boct prcgram cn the Disk Jockey 2D The 8 2D lcads sectcr cf track zere into memcry at a ORIGIN 3OCH the last page cf ram cn the ccntrcller then jumps there It is the responsibility cf this ccde tc load in the rest cf cp m a 9455 59099 5559232009 t20522422825280959229090802992925505249009P 955255 CPMORG EQU 2900H CPM STARTING ADDRESS ORIGIN EQU 0 900 Disk Jockey starting address RAM EQU ORiIGINe 400H starting address cf 2D STACK EQU RAM 2SEH sstack pcinter starting address within ram TKZERO EQU ORIGIN 11Q strack zerc seek entry pcint TRKSET EQU ORIGIN 14Q sentry fer track seek SETSEC EQU ORIGINe17Q gentry point fcr sector set SETDMA lt 00 ORIGIN 22Q enrty address for read write beginning address DREAD EQU ORIGIN 25Q disk read entry pcint DWRITE EQU ORIGIN 30Q disk write routine address DMAST EQU ORIGIN 454Q sdisk read write status rcutine ORG ORIGIN 700H STADDR LDLOOP RCLOGP EXIT 805990 load Lead in all the rest cf cp m and the cbios There are only two ways to exit this code 1 If an cccurs a jump is made to the loader cn the made to the starting locaticn cf the cold boct in the cbios LXi LXI PUSH LXI PUSH CALL CALL LXI MOV MOV CALL MVI PUSH CALL PCP JNCZ JNZ JMP ICR RZ INR MVI JNZ PUS
15. 3 99 30 DCR C errcr update the ccunt 3 3 F2813E JP DOLOOP ccntinue if nct fcund t if fall thrcugh then errcr 3E30 MESSGA XCHC put sessage address inte H amp L 95590909 22925096PP002G90202098DODDOBETORO9OUODOUSPOROOPADE a messz print the messzae tc by H amp L and termin ated by a OFFH byte 2635 25 92522 2 A Set 325 5 fre ans 1270 ar 323 25 H saus 3147255 1 32 EIN 15 1 ratout 3871 7 2251 BALL CPOUT 7 131 3595 El srestcre pcinter 132 3297 23 _ INX Hoc bump tc next character n 3 98 C33z3E JMP MESSG scentinue until end 135 136 137 settrk call the disk jcckey 2d to seek then exit by 133 testing fcr errors 189 150 PDODDBDAGPHNRHFDA 5SHRAC5PARNRMAAD HAS N HROCORAR MARHRE5SRHHON RK SNMBESNMAOMA 191 132 3 9 CDOCEO SETTRK CaL 193 3ESE 37 435 JMP 5 1 198 ae 002002026 00 SREMMADR eeNRMR8RIBRBDHBKONDNHMBH5HPB2N 196 a a 197 read read one sector frca the disk Try ten times cn Ld 198 s errers befcre returning an err
16. 364 365 3204 03 0 CITBLE CITTY j input frem tty currently assigned by intioby input frem 2d 366 3F06 DW input frem ert currently SWITCHBOARD serial port 1 357 3208 READER input from reader depends cn reader selecticn 368 3F0A 873 DW CIUC1 sinput frcm user ccnsole 1 currently SWITCH30ARD serial port 1 369 370 se 371 ccnscle cutput table 312 373 378 3FOC 06 0 COTSLE Dw COTTY soutput to tty currently assigned by inticby output tc 29 375 3 3C3F DW COCRT cutput to ert currently SWITCHBOARD serial pert 1 376 3F10 F93E Da LIST soutput tc list device depends cn bits 647 cf icbyte a 3F 12 3C3F DW COUC 1 soutout to user console 1 currently SWITCH3CARD serial pert 1 373 379 L 380 list device table 331 2 332 333 3214 05692 LTBLE DW COTTY soutput to tty currently assigned by inticby cutput to 2d 388 3 16 3 3 DW COCRT soutput tc ert currently SwITCHBOARD serial port 1 335 3F18 3C3F DW COLPT soutput to line printer currently SWITCHBOARD serial pert 1 354 3F A 3C3F Dw COUL scutput tc user line printer 1 seurreatiy SWITCHSGARD serial pert 1 337 333 339 punch device table 330 391 392 3F1C 0650 PTBLE bw COTTY soutput to the tty currently assigned by inticby cutput te 24 393 3FIE 3C3F Da COPTP scutput to paper tape punch currently SW4ITCHB8OARD serial pert 1 398 3220 3C3F Dw COUP 1 scutput to user punch 1 currently Sa
17. 8 Meters READ ENBL 4 READ As ED ADUR 8 1 2 ADDR 2 3 1 0 SELECT 6 7 1 gt ADDR 7 1 0 1 a 5 ROM IO as 82 gt gt ADOR 6 ROM SELECT 15 6 7 As 25 gt ADDR 5 EE 1 ADDR 0 SERIAL IN 2 A ADOR 1 SERIAL STAT 4 30 gt gt ADDR 4 4 DISK STAT 12 11 READ ADDR REUS B genis 170 SELECT SERTAL QUT i DRIVE SEL ADDR 2 REN es 8 2 WRITE FUNCTION SEL 4 5 1 0 SELECT M go gt im ADDR 1 1 10 9 73 gt ADDR 0 1 V PSYNC ROM ID ADOR 3 ADDR 4 STATUS MEM DISK JOCKEY 2D REVISION 4 1 OF 5 ROARD SELECT LOGIC ADDRESS BUFFERS COPYRIGHT 1979 GEORGE MORROW 8 VOLTS 1 ADDR 0 1 ADOR 1 1 ADDR 2 1 ADDR 3 1 ADOR 4 1 ADDR 5 1 ADOR 6 1 ADDR 7 1 ADDR 8 1 A00R 9 ROM SELECT 1 ADDR 0 I ADDR 1 1 ADDR 2 1 ADDR 3 1 ADDR 4 1 008 5 1 ADDR 6 1 ADDR 7 1 ADDR 8 1 ADDR 9 1 8 1 WRITE 0 DATA 5 DATA 6 1 ADDR 0 1 ADDR 1 1 ADDR 2 1 ADOR 3 1 ADDR 4 1 ADDR 5 1 ADDR 6 1 ADDR 7 1 ADOR 8 1 ADDR 9 1 ROM SELECT 1 ADOR 0 1 ADDR 1 1 ADDR 2 1 ADDR 3 1 ADDR 4 1 ADDR 5 1 ADDR 6 1 ADOR 7 1 ADDR 8 1 ADDR 9 1 RAN 1 WRITE BRS DI 9 1 DI i DATA 2 DI 2 DATA 3 DI 3 DATA DI 4 5 DI 5 DATA 6 DI 6 DATA 7 DI 7 1 REXD 5 VOLTS 8 vouts 1 51 gt 5 VOLTS power for 1 2 3 4 5 6 39 mfd C 100 116 DISK JOCKEY 2D REVISION 4 PAGE 2 OF
18. DBOOT T ERM IN TRMOUT TKZ ERO TRKSET SETSEC SETDMA DREAD DWRITE SELDRV T PANIC TSTAT DMAST S TATUS DSKERR S ETDEN SETSID Having a jump table around the A represent the address of word 8 of the onboard Standard address The address to call for the utility decoding PROMS routines FUNCTION DOS bootstrap routine Serial input Serial output Recalibrate seek to TRK Seek Select sector Set DMA address Read a sector of disk data Write a sector of disk data Select a disk drive Test for panic character Serial status input Read current DMA address Disk status input Loop to strobe error LED Set density Set side for 2 headed drives The specific function of each subroutine is described below The subroutine upon completion will execute a RET instruction A disk subroutine that completes normally will return with the carry flag cleared to zero A disk subroutine that detects an error condition will return with the carry flag set tol program should always test the carry flag after return from a disk utility subroutine and branch to an appropriate error handling routine if the carry flag is set Programming Specifications Serial I O SERIAL I O There is a hardware UART on the DJ board along with a crystal controlled baud rate generator There are sixteen different baud rates available including 12 of the most common The baud rate of the UART must match the baud rate of the term
19. NANA VAN READ WINDOW EET EE lt e C 51 1 mee 2445241771524 14 gt SW1 6 1 19 el ah e aoe Ul 1 4 6 u 6 Be 501 3 1 L 5 1 2 9 10 9 8 gt 51 1 19 DISABLE POWER UP JUMP OFF ENABLE POWER UP JUMP ON 9 ONE 508 15 2 TWO 10 10 541 7 DISK JOCKEY 20 REVISION 4 FUNCTION REGISTER DRIVE SELECT amp POWER UP JUMP LOGIC wo 14 18 12 18 12 16 16 14 13 74LS241 74LS244 TYPICAL CONNECTOR J2 gt BRE DU Br ai TH USE STOE SEL i8 gt HEAD LOAD Vee 12 1k HEAD 41 2 4 5 A6 V V V M AS V V 11 g 12 A13 A14 A15 10 PAGE 4 OF 5 COPYRIGHT 1979 GEORGE MORROW 5 068 KHz 26 ME DATA DATA 0 V 2 ma 2 5 28 542 4 750 1 2 2 12 29 6 Ar 3 D Sw2 3 mann R294 31 a Bem UU OATES 32 SW2 2 6 5 DATA 7 DATA 7 g 28 SW2 1 0 T d DATA 4 vet 12V E DATA 1 18 45V 1 SERTAL TH 2 ppp 23 _ 5V 1 SERTAL OUT DATA 3 OU ANS 16 1 SERTAL STAT DATA 3 5 4 20 1504 SERO 3 5 n mal 3 4 7k 15 2 aJ SW2 7 an v SW2 6 12V 13 4 5 T a 2N3904 SW2 5 a CONNECTOR vl 1 RESET
20. USING THE COMMAND REN AUTO COM BASIC COM AND 21 HAVE BASIC AUTOMATICALLY ACTIVATED EACH COLD BOOT x TT TTT JE ak kk kk RA A KR KR 24 SYSTEM EQUATES 25 pkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkkkkkkkkkkkkkkk 26 27 0018 MSIZE EQU 24 SYSTEM SIZE IN KBYTES 28 2000 BIAS EQU MSIZE 16 1024 29 4600 CPMB EQU 2600 LOCATION OF CCP 30 4200 BDOS EQU 2E00H BIAS LOCATION OF BDOS 31 5 00 BIOS EQU 3B OGH BIAS LOCATION OF BIOS 32 5E80 USER EQU BIOS 380H START OF USER AREA 33 C380 OFFSET EQU 1E80H BIOS TO SYSGEN IMAGE 4 Mes AA koe ode de eoo SI SIS TAS III III III II IT III TITIS eek eek 36 DISK PARAMETERS DOUBLE DENSITY DISK JOCKEY 37 1121112111711111141171111111113111113111111111111111 38 ON DISK IN SYSGEN IN 24K SYSTEN 39 gt TRACK SECTOR ADDRESS 40 BOOT g 1 900H 0 700 41 CCP 1 1 0980H 4600 42 BDOS 1 17 1180 43 BIOS 1 43 1 80 5BOOH 44 MODE 1 49 21 5E7FH 45 USER 1 50 52 2200 5E80H 46 TOP OF SYSTEM 237FH 5FFFH 47 48 DOUBLE DENSITY SKIP TABLE 49 1 2 19 20 37 38 3 4 21 22 39 40 5 6 23 24 41 42 50 I 7 8 25 26 43 44 9 10 27 28 45 46 11 12 29 30 47 48 51 a 13 14 31 32 49 50 15 1060 33 342 51 52 17 18 55 390 2 a AAA II SSI eek dee dedo IT ISIT II III III TI TOR II K 54 MODE BYTE OPTIONS AND DENSITY
21. 3 3k 85232 IN f2 A 121 11914 S2 CONNECTOR JI RS232 GND 1 gt 5232 OUT Y 750 1 2w 27k gt 240 _ 1 5 mfd Ycc Y gt TIY IN 12v SERO 283906 6 gt 16 voLTs 2 gt 12V 16 voLTs 52 gt 12V DISK JOCKEY 2D REVISION 4 PAGE 5 OF 5 SERIAL INTERFACE LOGIC COPYRIGHT 1979 GEORGE MORROW Morrow Inc Thinker Toys 5221 Central Avenue Richmond CA 94804 415 524 2101 FIELD ENGINEERING MEMO TO All DISCUS Owners and Dealers SUBJECT Update for DISCUS Double Density Operating Systems FROM George Morrow In a world of sell and forget you may be gratified to learn that Morrow Designs sells and remembers That s why we re offering an operating systems upgrade for all DISCUS Double Density Disk Drives At cost below Here s why found an anomaly in Western Digital s 131 Floppy Disk Controller chip Nothing major But under certain conditions you could get an from cp Operating System BDOS ERROR BAD SECTOR When this happens certain information on the disk is no longer readable But it s software correctible So we re correcting it At cost Or below Here s what you do For the Double Density DISCUS Controller Model B f the 2708 EPROM has a label marked B V2 no action is required you have the latest version of the driver software which corrects the 1791 anomaly b the 27
22. initiated Care must be exercised in the use of this routine Under certain circumstances if the density is changed in between disk transfers on the same track the micro program that the 1791 controller executes could fall into an error loop that it could not recover from In such a case the system would have to be reset before further disk operations could be performed The density mode of the 1791 can safely be changed when a subsequent disk transfer operation will occur on a different track than the last It should be noted that the firmware of the Disk Jockey has the ability to automatically set the density mode of the 1791 Whenever a new drive is to be selected or whenever the head is not loaded the Disk Jockey firmware performs a read header operation just after positioning the read write head if necessary and just before attempting to perform a disk transfer This read header operation is used to establish the density of the possibly new track and to determine the length of the sectors on this track If the density has not changed from the last read header operation or if the calling program has set the density correctly through the use of SETDEN the process of reading the sector header is slightly faster by approximately one and a half diskette revolutions than it would be if the initial assumption concerning the density was wrong This subroutine positions the read write head to the outer most track of the diskette trac
23. 0000 00H to 1330 5BH and change location 347 002 0E702H from 76Q 3EH to 347Q 0E7H Step X Initialize the program counter of the CPU to 347 0000 700 but do NOT start the machine Step XI Insert the CP M diskette and be sure that the write protect notch is not covered Close the door securely Step XII Start the CPU The head will load and after a second or two the head will step to track 1 Wait for the head to unload and the activity light to go off CP M has been loaded into memory between 51 0000 2900H and 77 377Q 3EFFH Step XIII Enter the CBIOS code starting at 76 0000 3EGZH sure to check that the code has been entered correctly Step XIV Initialize the program counter of the CPU to 347 1110 E749H but do NOT start the CPU Step XV Take the diskette which has the cold start loader on track sector 1 and place it in the drive Be sure that this diskette is still write enabled the notch should be covered Step XVI Start the CPU The head should load return to track 0 and write the better part of tracks 0 and 1 before it unloads After the head unloads remove the diskette and remove the write enable tab from the diskette Stop the CPU The CPU should be executing the JMP STALL instruction 303 133 347 octal C3 5B E7 hex 28 Patches for CP M Step XVII Connect a terminal to the serial port of the Disk Jockey and adjust the baud rate parity stop bits and word le
24. 006 340 011 30 01U 310 017 30 022 340 025 380 030 380 033 185 246 410 041 380 000 240 000 384 000 343 370 343 170 393 371 34 371 383 372 343 372 313 374 343 374 383 375 313 376 343 377 000 200 000 240 000 00U 000 020 000 001 000 030 000 00 i 000 002 000 040 000 020 000 JOU 000 320 009 035 000 030 000 011 000 004 000 010 000 010 000 008 000 003 000 036 000 076 403 141 303 377 393 360 303 157 303 240 303 223 393 126 103 251 303 378 303 113 303 016 303 211 340 340 380 341 341 u1 441 341 391 it 411 411 wt OO MI AV SS wd AD DISK JOCKEY 2D FIRMWARE REVISION 4 a ORIGIN 1 RAM 10 UDATA DREG USTAT DCMD DSTAT CMDREG CSTAT TRKREG SECREG DATREG Li RCMD WCMD HEAD LOAD DENSTY ULOAD RSTBIT ACCESS READY INDEX RACHD CLRCMD SVCMD SKCMD HCHD ISTAT OSTAT DSLDE TZERO MDINT LIGHT NOLITE a DBOOT TERMIN TRMOUT TKZERO TRKSET SETSEC SETDMA DREAD DWRITE SELDRV AORG 340 000Q EQU 340 000Q SORG 240 000Q EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU JMP JMP JMP JMP JMP JMP JMP JMP JMP JMP JMP JMP ORIGIN 000Q ORIGIN 3 370Q 10 10 DREG 10 2 10 8 CMDREG 10 5 10 6 10 7 2900 2400 4 200 1 300 4 2 809 20
25. 238 ANI RNZ ISTAT CALL CIN LDA ANI RET LDA MOV LDA HOV LDA CMA ANI RRC MOV LDA RAL RAL RAL ADD MOV LDA RAL RAL ADD MOV LDA ADD RET PUSH LHLD MOV MOV POP RET MVI ACD MVI RC MOV STA RET LXI USTAT ISTAT SECREG B A H DMAADR B H C i H 3740 C 200 D I C 3 K input ready bit test for character get character test for panic get UART status input ready bit get current sector no in B get current track no get current density in the msb position save in D put the side select flag in bit position 6 put the sector length code in bits 2 amp 3 put the current disk no in bits 0 amp 1 save the H L pair addr to H L move the DMA addr to recover test for the new drive number less than 8 store the new drive in DISK H 39 CORIGIN test the 3841 131 381 132 341 135 381 140 381 141 341 144 381 145 381 147 381 150 41 150 381 151 341 152 341 155 341 156 381 157 341 157 311 162 341 163 341 164 341 167 1 170 341 173 341 173 341 176 177 341 200 341 203 341 206 341 211 341 213 381 216 341 220 381 221 381 222 3413223 3412223 341 224 341 225 341 226 341 227 381 230 341 232 381 233 341 23 341 237 j41 240 341 210 341 21 391 213 341 214 n 1 245 341 253 011 322 041 0
26. CALL CALL LXI CALL MVI STA MOV CALL LXI PUSH CALL LXI DAD PUSH POP CALL POP PUSH CALL CALL POP INR JNZ LDA INR CPI JNZ JMP JMP DB SP gEGEEH A SELDRV TKZERO set up the stack select drive A recalibrate the heart B 8000H 100H set initial adrs SETDMA 32 0010 B DMAST 100 SETDMA SETSEC DWRITE ERROR B SLOOP TEMP TLOOP DONE ERROR initial track numbe save track number seek to correct trk sector count amp number save sect and count get current address update to next sect move address to B C Set up new address restore sect cnt amp nu set up next sector write the data test for error recover sect cnt amp nu update sector update count get current track update track check if all done continue to next tr error exit track storage DISK SYSTEM SOFTWARE An assembled Disk Jockey 2D is part of a DISCUS 2 system and is also accompanied by a copy of Disk ATE tm Both Disk ATE and the Disk Jockey 2D CP M are tailored to the I O of the Disk Jockey 2D controller Both expect that a serial TTY RS 232 terminal is connected to J2 serial port of the Disk Jockey Both are supplied a write protected diskette notch open which should be kept that way DO NOT COVER THE NOTCH THE DISKETTE Finally both systems are designed to self load when the disk is placed in drive A and a branch is made to 340 0000 209
27. M VERS 1 4 31354820 DB 16K 43502780 DB CP M 20562552 Da YER 320312 DB S 1 38 DB LE OD9A DB ACR ALF FF DB OF FH error nessage table 8 5 8C3F MSGTBL DW ILLDATA illegal data 983F DATAREQ request A33F Dw DATALOS data lost AF3F Dw CRCERR sere error BB3F Dw ILLSEC illezal sectcr CF3F DW ILLDMA illegal dma OW WRITPRO urite prctected ESJF NOTRDY not ready F13F DW UNKNOWN unkncun error 0004 ILLDATA DB ACR ALF 494 474 260 08 ILGL DATA FF DB OFFH 050A DATAREQ DB ACR ALF 4481534129 DB DATA REQ FF DB OFFH ODOA DATALOS 58 ACR ALF 4441544120 08 S DATA LOST FF DB OF FH 0004 CRCERR 28 ACR ALF 4352432045 08 ERROR FF 28 ODOA ILLSEC DB ACR ALF 4940474020 DB ILGL SECTOR TRACK FF Da ODOA ILLDMA DB ACR ALF 594 474 20 DB FF bB 000A 4RITPRO 08 ACR ALF 5752542050 58 ART PROT FF 08 JIDA sSTROY DS 357542352 De NU ARAUL FF cs Of FH JOGA UNKNOAN 23 ACR ALF 55 57 DB UNKOWN ERROR FF CF FH NEWFIRM4 340 000 340 000 349 000 340 000 340 000 340 000 340 900 340 000 340 000 480 000 340 000 340 000 3840 0900 380 000 390 000 340 000 380 000 3 0 000 340 000 340 000 340 000 340 000 340 000 3180 000 340 000 140 000 340 000 340 000 340 000 3840 000 340 000 340 000 30 000 340 000 340 000 310 000 340 000 19 000 310 003 340
28. SETTINGS OF VARIOUS DRIVES 55 56 57 5E78 ORG USER 8 5E78H IN 24K SYSTEM 58 5 78 01000101 DNSTY DB 1 0 1 1 DRIVE SD OTHERS DD 59 BO DENSITY 0 SNGL 1 DBL 69 5E7C 000000 DB 0 0 0 RESERVED 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 5E7F 5 80 5 80 5E83 5 86 5 89 5 8 5E8F 5E92 5E95 0004 0003 2000 2003 2006 2021 0000 000 E096 2003 00 C33C5F C3985E C3A45E C3B65E C3D15E C3C65E C3BC5E C3335F MODE DB MODE BYTE BIT 1 DOES AUTO ON COLD BOOT BIT1 1 DOES AUTO ON WARM BOOT K K k Kk k k k k k k k k K k k k k k k k k k k k k k k k k k k k k k k k k k k K k k k k k k k k k SAMPLE USER AREA K k k k k k k k k K k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k Kk k k k k k k k k k ORG USER 5E80H IN DIST SYSTEM k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k kk k k k k kk kk k kk kk k JUMP TABLE JMPS MUST REMAIN HERE IN SAME ORDER k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k Kk k JMP INIT INITIALIZATION JMP CONST CONSOLE STATUS JMP CONIN CONSOLE INPUT JMP CONOUT CONSOLE OUTPUT JMP LIST LIST OUTPUT JMP PUNCH PUNCH OUTPUT JMP READER READER INPUT JMP PRST PRINTER STATUS CDISK EQU 4 current disk storage location IOBYTE EQU 3H iobyte storage locatio
29. above can be used to write these header fields This 15 a safety measure to ensure that erroneous branch to the firmware PROM cannot re initialize diskette destroying all the data recorded it The initialization function for diskettes is typically provided command included the Disk Operating System Disk ATE diskettes furnished Morrow s Thinker Toys contain commands FMT128 FMT256 512 and FMT1824 to allow the user to format diskettes in any of the four IBM compatible formats CP M diskettes from Thinker Toys contain a command called FORMAT which allows the CP M user to format diskettes in single or dual density 13 Programming Specification ROM Subroutines RECAP OF REGISTER A ERROR BITS SETDMA 7 6 5 4 3 2 1 BIT err ee ADDRESS SET TO DJ I O SPACE DREAD 7 6 5 4 3 2 1 0 BIT NOT READY ILLEGAL ADDRESS ILLEGAL SECTOR RECORD NOT FOUND CRC ERROR LOST DATA DATA REQUEST BAD DATA FORMAT 1 DWRITE 6 5 4 3 2 1 0 NOT READY WRITE PROTECTED ILLEGAL DMA ADDR ILLEGAL SECTOR RECORD NOT FOUND
30. desired track number in register C It is only necessary to call the TRKSET routine when changing tracks If the data 5 6 transfer involves the same track as the previous transfer then no call to TRKSET should be performed Set the desired sector number The sector can be set by calling SETSEC with the correct sector number register C If the sector has not changed since the previous SETSEC call as with a read modify write sequence then this routine may be skipped Read or write the desired sector The controller can now be commanded to read or write to the disk by calling DREAD or DWRITE The order in which these operations occur is important with the exception that the DREAD or DWRITE routine must called last 15 Utilizing Disk Jockey Firmware Data Transfer Examples READ Suppose sectors 5 6 7 and 8 of track 12 drive 1 are to be read into memory starting at location 7 0000 7 H The following program will do this 16 Utilizing Disk Jockey Firmware Example of Disk Read 001 000 061 356 346 001 003 257 001 004 117 001 005 315 363 341 001 010 315 362 341 001 013 016 014 001 015 315 313 342 001 020 001 005 004 001 023 305 001 024 001 002 160 001 027 315 011 342 001 032 301 001 033 305 001 034 315 166 342 001 037 315 042 342 001 042 332 070 001 001 045 301 001 046 005 001 047 312 073 9291 001 052 014 001 053 305 001 054 315 352 341 001 057 04
31. disk that has FMT1024 on it in the drive 2 Type L FMT1024 3 Place the back up diskette in the drive 4 Type 5 FMT1024 65 0000 100 3770 This completes the operation If the write protect notch of the diskette is not covered on the back up diskette Disk ATE will report a disk error and the operation will have to be done over with the notch covered The Bootstrap loader Both Disk ATE and copies of CP M which are purchased through Thinker Toys are supplied on diskettes which load into the system through the use of the bootstrap loader DBOOT To use DBOOT the system should be turned on and the CPU s program counter should be initialized to 340 0000 E000H either from the front panel of the computer or through jump start logic either on the controller or on some other board in the system A 2 3 second delay occurs the first time DBOOT is called after power up so that the system has time to stabilize before the disk is accessed Power should be applied to the drive s that are connected to the Disk Jockey controller at approximately the same time it is supplied to the CPU However the system should be given time to stabilize before a diskette is inserted a drive DBOOT always loads from drive A If a diskette is not in place when DBOOT is started the activity light the front of drive is slowly pulsed to indicate that the bootstrap loader 15 waiting for a diskette to be inserted in the drive and the door to be closed The proper ti
32. have been backed up on a diskette some of the other files on the original diskette from Thinker Toys may need to be moved onto the backup media There are two types of files presently supported by Disk ATE Source and binary The source files always load into the source area of Disk ATE and may also be saved on another diskette from the same source area The Disk ATE user s manual describes this procedure detail When a binary file is first saved a diskette by Disk ATE the Starting address is recorded in the directory entry along with the length The STAT command will display the starting address of binary file along with its length The length is given in 22 Disk System Software increments 1024 bytes Hence there are 2560 bytes in file that is 2 5k long When the file is loaded into memory unless otherwise specified see the Disk ATE user s manual it will be loaded starting at the address displayed by the STAT command and ending at the address which is the sum of the starting address and the file length This file can be saved on another diskette which has been previously formatted by simply placing the diskette in the drive and typing S ave command followed by the proper beginning and ending address As example the binary file 1024 is 3 0k long and and has Starting address of 65 0000 3508 To save this file on a back up diskette the following steps need to be performed 1 Put the
33. of ent dec high byte of cnt write last byte get 1791 status busy bit to carry restore the ACC error bit mask go to the exit set the error flag get the user SP restore the user SP 1791 control bits toggle the load bit the 1791 data reg get return addr get the user s Stack pointer local stack Save user s SP DMA address save DMA addr save return addr error exit load the head disk not ready get the old trk test for head not calibrated seek error present trk the track test for head motion 342 134 342 135 382 136 342 137 3802 140 382 143 342 146 342 147 342 152 342 155 312 157 342 160 342 161 3423162 342 164 342 167 2 342 172 342 175 342 175 312 200 342 201 382 204 342 206 342 206 342 210 382 213 342 215 382 220 342 223 382 225 342 230 342 233 342 231 342 237 312 237 342 242 342 245 342 245 382 247 342 247 342 252 342 255 312 257 342 262 342 262 342 263 382 264 342 265 342 270 3423273 342 276 342 277 ju2 302 312 303 342 106 342 311 342 311 342 314 342 415 442 317 013 043 167 062 312 257 062 072 346 037 037 037 306 041 315 332 072 267 302 006 076 315 346 112 072 356 062 062 005 302 315 303 006 021 041 016 062 032 167 054 302 081 315 267 312 905 302 303 072 117 006 041 312 175 351 010 030 000 154 237 351 311 002 035 147 231 24
34. of the regulator Hand tighten the nut Solder the leads Tighten the screws firmly 51 Parts Installation After bending the leads 90 degrees install and solder the two crystals in place Clip the excess leads Fix them to the circuit board by peeling the protective paper off their foam pad and pressing the pad against the board Be sure to solder the crystals into place so that their padded side will fall into the area outlined on the silk screened legend J Install and solder the two connectors Jl and 22 Be sure to reread the orientation section before installing these parts 1 Install and solder the light emitting diode at the top of the board just to the right of J2 of the leads of this diode is longer than the other The longer lead is the anode and must be to the left when the part is inserted Clip the excess leads after soldering 1 Install solder and clip the leads of the 1 5 dipped tantalum cap just below 22 sure that the lead with the red dot 15 pointed toward the bottom of the circuit board Install solder and clip the 33 picofarad silver mica just to the left of the 10 Meg crystal in the upper left corner of the board Install solder and clip the two 47 picofarad silver mica caps above and below the 74221 at location 4B Install solder and clip the two 33 picofarad silver mica caps one below the 74LS165 IC at location 2D and the other between the 7415244 l
35. 0 000 1800 off off off on on 040 000 2000 off off on off off 050 000 2800 off off on off on 060 000 3000 off off on on off 070 000 3800 off off on on on 100 000 4000 off on off off off 110 000 4800 off on off off on 120 000 5000 off on off on off 138 099 5800 off on off on on 140 000 6000 off on on off off 150 000 6800 off on on off on 160 000 7000 off on on on off 170 000 7800 off on on on on 200 000 8000 off off off off 210 000 8800 off off off on 220 000 9000 off off on off 230 0900 9800 off off on on 240 000 000 off off 250 000 800 off on off on 260 000 000 off on on off 270 000 800 on off on on on 300 000 C080 on on off off off 310 000 C800 on on off off on 320 000 9000 off on off 330 000 0800 off on on 340 000 E0909 on on on off off 350 000 E880 on on on off on 360 000 2000 370 0090 800 44 SET PADDLE 6 OF SW1 TO on SET PADDLE 7 OF 501 TO on POWER ON JUMP TABLE WITH 74LS244 S AT 5D AND 6D REV 3 BOARDS SHOULD USE 244 s ONLY JUMP ADDRESS Octal 000 000 010 000 020 0900 030 000 040 000 050 000 060 000 070 000 100 000 110 000 120 000 130 000 140 000 150 000 160 000 170 000 200 000 210 000 220 0900 230 000 240 000 250 000 260 000 270 000 300 000 310 000 320 000 330 000 340 000 350 000 360 000 370 000 0000 0800 1000 1800 20
36. 00 2800 3000 3800 4000 4800 5000 5800 6000 6800 7000 7800 8000 8800 9000 9800 000 800 B000 B8 C090 800 2900 0800 000 800 000 800 541 is the switch on the LEFT SW1 1 A15 on on on on on on on on on on on on on on on on off off off off off off off off off off off off off off off off FOR 74LS244 S TO ENABLE POWER ON JUMP SW1 2 A14 on on on on on on on on off off off off off off off off on on on on on on on on off off off off off off off off 45 SWITCH SETTING SW1 3 A13 on on on on off off off off on on on on off off off off on on on on off off off off on on on on off off off off SW1 4 A12 on on off off on on off off on on off off on on off off on on off off on on off off on on off off on on off off SW1 5 A11 on off on off on off on off on off on off on off on off on off on off on off on off on off on off on off on off BOOT LED Near the upper left corner of the DJ2D board just to the right of terminal connector J2 is the boot LED This LED will flash and off if the DBOOT routine reports an error Since the boot routine is not affected by terminal I O this LED help in determining whether a no go attempt at bringing up an operating system is due to faulty I O hardware and or drivers
37. 03 072 346 302 171 057 062 057 311 072 346 302 072 057 346 311 272 352 003 242 355 353 012 251 321 077 303 340 040 371 335 371 010 360 370 371 00 377 370 177 371 346 343 342 342 341 340 242 340 343 340 343 340 343 343 340 343 juj 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 138 135 136 137 138 139 140 141 142 143 148 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 LDLOOP LERROR LELOOP COUT CIN CPAN MVI A NOLITE turn off the STA DRVSEL error LED MVI M MDINT open data reg POP discard old TIMER CALL MEASUR head load time POP recover boot PUSH B addr from DMAADDR PUSH D new TIMER value LHLD STABLE 2 set up PUSH H time LHLD STABLE test PUSH data NOP debug instruction PUSH B boot address MVI B 12Q number of retrys PUSH B save the retry no CALL READ read boot sector POP restore retry no RNC successful read DCR B nol count down JNZ LDLOOP try again MVI 779 LXI 242 3034 DCX D MOV A D ORA E JNZ LELOOP MVI A 40Q blink XRA the LED at STA DREG top of the MOV circuit board JMP LERROR 2 LDA USTAT get UART status ANI OSTAT output ready bit JNZ COUT test output ready MOV chara
38. 0300 READERA LDA IOBYTE entry at readerl will shift the bits into position used by list and punch 5EC2 1 READRI RAR 5EC3 C3AB5E JMP SELDEV kkktk punch select the correct punch device The seection ki comes from bits 4 amp 5 of iobyte 5EC6 21F45E PUNCH LXI H PTBLE beginning of punch table 9 0300 LDA IOBYTE entry at pnchl rotates bits a little more in prep for seldev used by list 5ECC PNCHI RAR 5ECD RAR SECE C3C25E JMP READRI list select list device based on bits 6 amp 7 of iobyte kkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk 5EDI 21ECSE LIST LXI H LTBLE beginning of the list device routines 5ED4 0300 LDA IOBYTE 5ED7 RAR 5ED8 RAR 5ED9 C3CCSE JMP 1 k k k k k k k k k k k k k k k k k k k k k k k kk k de e k k k k k k ik k k k k kk k k de n xe k k kk kk ke An kx kx k If customizing I O routines is being performed the table below should be modified to reflect the changes all I O devices are decoded out of iobyte and the jump
39. 045 000 366 375 366 177 346 343 000 342 386 313 346 343 346 511 528 SZLOOP STABLE HDLOAD DSROT DAD LDA MOV ADD MVI POP MOV STA LXI DCR MOV MOV DAD JMP DB DB DB DB LXI MOV INX MOV MOV INX MOV MOV MVI INX PUSH MVI MOV DAD DAD LDA MOV INX LXI LDAX MOV POP DAD DAD MOV STA INX MOV STAX MVI B SECTOR M A 20Q m REG 00Q moo 0 gt ZLOOP 3459 3459 3609 3679 Lond 5 m ox m gt D a gt 4 I 9 oO G Z gt G gt m O RKREG eO gt m e gt gt lt o gt 1779 add the offset get the sector save in B compare w table ntry error flag error return return addr to TOS save the sector in sector reg half page count sec size count half size count to the D E pair return if done double the xfer size count new disk no to C current disk to E update current disk head load constant test for disk change head load flag update head load addr of disk table no disk change save table address Set up the offset address get the current disk parameters save the density info current track get current trk save recover tbl addr add the offset get control bits update DCREG get the old track number and update
40. 08 For users the diskette is accompanied by a series of manuals describing how to back up CP M diskette only precaution is that when drive B is to be used for the up it must be logged in e g DIR B before the back up process begins Backing Up Disk ATE To make a back up copy of Disk ATE load Disk ATE and have a blank diskette which is not write protected the notch should be covered Follow the steps outlined below If You Have a Dual Drive System 1 Perform steps 6 and 7 below inserting the blank disk in drive B 2 TD TD is the transfer disk command with the source drive the left and the destination drive on the right This command will copy all the files on drive A to drive B If You Have a Single Drive System 1 Type 16 This command forces ATE to express numbers and addresses in hexidecimal radix 2 L IO2DTBL T This command loads the I O driver symbol table from the disk After the symbol table is loaded ATE will be able to search the table for variable values Some variables will be necessary to accomplish the back up 3 Type SYSIO IOEND This is the standard way of interrogating ATE to find the value of variables SYSIO is the beginning of the I O driver and IOEND is the end of the driver Make a note of these two values because we will need them later 21 Disk System Software 4 Type L ATETBL lt T gt Thi
41. 08 EPROM has no label it must be replaced or reprogrammed Send us a check for 15 00 or a 2708 EPROM which is erased and functional For the Double Density DISCUS Controller REVs 0 1 3 and 4 S 216 a If you have 2 0 2 1 or 2 2 CP M send us clean diskette or your 2 0 check for 7 00 We ll send back the latest 2 2 CP M diskette W Remember to include the serial number with your reply 7 i gt a lan b If you have Lifeboat 1 4 CP M it s going to be a little more expensive 42 00 For that we ll send you the latest version of CP M 2 2 on a diskette and complete documentation for the upgrade Or if you send us a clean diskette the cost is only 35 00 Normally the cost of the documentation alone is 35 00 Again we must have the serial number of your CP M in order to make this upgrade NOTES ON LIFEBOAT 2D CP M FOR THINKER TOYS There are several features of Lifeboat s 2D version of CP M with which users accustomed to single density CP M on 8 inch drives may not be familiar These features will be explained below ASSIGNING DENSITY 2D CP M must be aware of the density of a diskette before it can successfully perform a read or write operation The command file DENSITY allows the user to inform CP M of the density which a given drive will be assigned a wrong density diskette is placed in a drive and that drive is subsequently accessed the System will fall into an irrecoverab
42. 1 000 001 001 062 011 001 063 345 001 064 301 001 065 303 027 001 001 070 303 070 001 001 073 303 073 001 READ LOOP ERROR DONE LXI XRA MOV CALL CALL MVI CALL LXI PUSH LXI CALL SP E6EEH A C A SELDRV TKZERO C 12 TRKSET 8 4 0050 7000 SETDMA B B SETSEC DREAD ERROR B B DONE C B DMAST 100 B LOOP ERROR DONE set up the stack select drive A recalibrate the head seek the head to track 12 sector count amp number Save sector cnt amp num Set up read address restore sect to read set up sect to read read the sector test for error restore sect cnt amp num update count update sector number save count amp number dma address into B C add sector size to current address new address into B C continue reading error stop Utilizing Disk Jockey Firmware Example of Disk Read 8139 31 EE E6 0103 0104 4F 0195 CD F3 Ei 6158 CD F2 1 019B GE C g10D CD CB E2 0119 01 05 04 0113 C5 0114 01 00 70 0117 CD 09 E2 911A Cl 011 C5 0125 1 0126 05 0127 CA 3B 01 012A gc 0128 C5 012 CD EA El G12F 21 00 01 0132 09 0133 5 0134 1 8135 C3 17 81 013 C3 3B 01 READ LOOP ERROR DONE LXI XRA CALL CALL MVI CALL LXI PUSH CALL SP SELDRV TRZERO C 12 TRKSET 4 0050 B 7000H SETDMA B B SETSEC DREAD ERROR B B DONE Cc B DMAST B H B LOOP ERR
43. 11 332 067 076 311 140 151 042 257 311 315 365 237 062 361 303 315 330 257 062 062 041 076 315 346 300 067 150 000 150 020 347 173 371 052 357 355 351 000 011 154 001 311 257 261 067 310 171 376 077 330 062 311 171 376 077 330 262 11 033 370 115 371 341 034 341 346 341 346 342 342 346 346 000 343 346 346 239 240 281 242 243 248 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 212 213 27 215 276 1217 278 279 280 281 282 284 285 DMASET HOME HENTRY SECSET SEEK DAD JNC LXI DAD JC STC MVI RET MOV MOY SHLD XRA RET CALL PUSH SBB STA POP JMP CALL XRA STA STA LXI MVI CALL ANI RNZ STC RET XRA ORA STC RZ MOV CPI RC STA RET MOV CPI CMC RC STA RET B DMASET H RAM B DMASET A 20Q H B L C DMAADR A HENTRY PSW A TRACK PSW LEAVE HDLOAD A TZFLAG HDF LAG H 0 HCMD CENTRY TZERO A C TRACK DMA address for conflict ewith the I O on the DJ 2D controller get the DMA addr to the H L pair store clear the error flag and return head to trk zero save the flags update the track register recover the flags unload the head load the test for update the two flags time out cons
44. 1791 disk select bits 383 038 383 035 343 036 383 041 313 084 383 085 383 015 383 050 3543 051 383 054 343 055 343 060 343 061 313 064 343 065 343 066 343 071 383 074 383 075 383 100 343 102 343 103 343 104 313 105 143 106 383 107 383 111 383 112 383 113 383 116 383 117 383 122 343 122 383 123 383 124 343 125 383 130 383 131 383 131 333 132 383 134 343 135 383 135 313 140 313 142 4383 143 343 145 343 146 343 147 343 147 383 152 383 153 483 154 383 154 443 155 343 162 414 163 413 163 007 015 362 062 257 041 246 062 365 072 117 072 057 281 062 072 117 072 326 237 057 261 167 356 117 361 302 345 052 053 174 265 302 341 176 316 310 072 366 167 076 067 311 052 051 051 353 041 303 303 034 352 372 351 352 367 371 366 371 001 002 131 345 122 010 366 030 200 345 374 166 357 383 346 346 346 383 346 346 343 346 343 346 346 A wht AP 2 HDCHK TLOOP RDYCHK UNLOAD COMAND CENTRY PATCH RLC DCR JP STA XRA LXI ANA STA PUSH LDA MOV LDA CMA ANA STA LDA MOV LDA SUI 588 DCR ORA MOV XRI MOV POP JNZ PUSH LHLD DCX MOV ORA JNZ POP MOV ANI RZ LDA ORI MOV MVI STC RET LHLD DAD LAD XCHG LXI JMP JMP C DSROT DRVSEL A t
45. 342 060 342 063 342 064 342 065 j42 065 342 066 342 071 342 072 342 075 342 076 342 101 342 102 342 103 342 106 342 107 382 112 3422113 j42 116 42 117 j42 122 32 125 ju2 130 182 133 315 341 035 041 076 062 301 161 160 301 161 035 302 025 362 160 037 332 027 346 312 067 052 371 365 072 356 062 361 311 321 Out 071 061 345 052 345 325 041 345 315 330 072 07 314 332 041 072 216 065 377 240 37 014 014 374 030 337 046 312 366 020 312 000 314 347 342 343 343 342 342 343 342 342 346 346 343 000 346 346 342 342 343 341 312 343 346 WRITE WLOOP CBUSY RETURN LEAVE PREP CALL POP SPHL DCR LXI MVI STA POP MOV MOV POP MOV DCR JNZ DCR JP MOV LDA RAR JC RAL ANI JZ STC LHLD SPHL PUSH LDA XRI STA POP RET POP LXI DAD LXI PUSH LHLD PUSH PUSH LXI PUSH CALL RC LDA INR 2 JC LXI LDA CMP PREP H prepare for write recover DMA addr adjust SP adjust byte cnt E data reg A WCMD CHDREG CSTAT CBUSY 3379 RETURN STACK 2 PSW DCREG LOAD DCHD PSW D H 0 SP SP STACK H DMAADR H D H RETURN H HDLOAD TRKREG A HENTRY SERROR ti TRKREG TRACK M do a write command get the Ist data pair write first byte write high byte get next data pair write low byte dec low byte
46. 5 RAM ROM AND DATA BUFFERS COPYRIGHT 1929 GEORGE MORROW 470 pf FDC CLOCK MCLOCK DATA 7 1 ADOR 0 DATA RQ 1 ADDR 1 1 READ ENBL 1 ENBL 1 CHIP SELECT WDATA 4 DOUBLE Ver HEAD LOAD TK STEP DISK READY TRDEX HOLE TRACK ZERO WRITE PROTECT READ DATA STEP DIR WGATE 4 READ WINDOW MCLOCK MCLOCK FDC CLOCK 12V 5V WDATA 4 CLR FOC WGATE TK STEP READY DISK READY STEP DIR NOEX INDEX HOLE TRACKS TRACK ZERO 11 0 k 112 pf WPROT WRITE PROTECT 9 DISK DATA READ DATA TRAN TRAND 7415221 CONNECTOR J2 A lk HIGH CUR HIGH 1M 2002 B a 1 11914 2 71914 o 1 1M 2 1458 10 3 7 V 7 cc Vcc 5 Voc 4 vco SDWINDOW 5 3 TRAR 3 5 36 k Ye n 12 1 vco TRAND Yee aM 14 9 4 DOUBLE ec 10 13 2 DOWENDOU DDWINDOW 15 7415221 V 4 CLEAR DISK JOCKEY 2D REVISION 4 PAGE 3 OF 5 WRITE DATA A SEPARATION LOGIC FOC CONTROLLER COPYRIGHT 1979 GEORGE MORROW HIGH HIGH 3 1NT RQ anno 3 DATA RQ HEAD fane 107 DAT 3 INDEX DATA 4 READY 22 gt DATA 5 CONNECTOR J2 1 DISK STAT 1 2 gt 741504 ACCESS ENBL DATA 1 DATA 2 CLR FDC CLEAR 1 RERD PWR JMP 3 HEAD LOAD DOUBLE 3 SDWINDOW 3 DDWINDOW DOUBLE EE BO P DATA 5 1 DRIVE SEL ONE wn TNO a
47. 5 366 001 366 372 206 157 236 012 311 372 304 374 262 176 311 247 237 315 002 353 383 342 346 343 000 343 342 346 342 343 342 346 346 343 342 341 383 343 346 343 342 343 343 342 342 342 346 419 420 421 422 u23 424 425 426 427 428 429 530 431 432 833 434 435 436 438 439 440 uut 442 443 yyy 445 446 447 448 849 450 451 452 153 454 455 456 557 158 459 460 561 462 463 464 465 466 467 468 469 470 471 472 473 uTu 475 476 477 478 TVERFY SLOOP SERROR RDHDR RHLOOP CHKSEC INX INX MOV MOV STA XRA STA LDA ANI RAR RAR RAR ADI LXI CALL LDA ORA JNZ MVI MVI CALL JZ LDA XRI STA STA DCR JHZ CALL JMP MVI LXI LXI MVI STA LDAX MOV INR JNZ LXI CALL ORA JZ DCR JNZ JMP LDA VI ZI HDFLAG DSTAT DSIDE SKCMD 0 CENTRY SERROR HDF LAG A CHKSEC B 2 A SVCHD COMAND 2310 RDHDR DCREG DENSTY DCREG DCMD B SLOOP HOME BERROR B 12Q advance to the data register save the new trk turn off data 53 control bit test for seek force a read header operation get the double Sided flag to do 3 ms step operation do a seek command seek error get the force verify track flag no seek amp head OK verify retry no do a verify command erro
48. 595290052006090029520 922206500920022959282252592995502259 31 EE6 LXI SP STACK sinitialize the stack 3 63 XRA A select drive A 3 54 MOV C A 3E65 019820 CALL SELECT 3 68 010224 LXI B 2A02H sectcr ccunt and beginning sectcr 3E58 7 CALL ORIGIN 70AH call the ccld start leader 3 6 C33F3E JMP GOCPM ncw enter cpm 5919 s Heme meve the head tc track a 3 71 00920 HOME CALL TKZERO 11 the disk jeckey 2d 3E74 0 99 SEEK1 MVI C SEXERR ncn relevent errcr mask a e dcerrs returns if nc errcr Otherwise prints an priate errcr messzae and returns tc cpm with an errcr 8 indicaticn e 3 76 DATB3E 9528 JC DOERRI test if errrer 3 79 Eg ret sreturn if ck 3 74 C9 RET 3 78 1 DJERRI ANA strip cff unwanted errers 0508 MVI 8 errcr ccunter JETE 217A3F H MSCTSL gbeginning address cf messages 3E31 SE DOLOOP MOV E M get errcr address in D amp E 3E82 23 INX H 3E83 56 MOV D M 3E35 23 INX 4 3285 RAR scheck if this bit is the errer 3 85 04822 Jc 55 yes exit after printig errer
49. 5FIF 5F1F 5F1F 5F21 5F23 5F26 5F28 5F2A 5F2B 5F2E 5F30 5F31 5F32 5F33 5F33 5F33 5F33 5F33 5F33 5F35 E 5F37 5F39 5F3C 5F3C 5F3E 5F41 A CD21E9 JD C9 C32E5F 3E00 320300 C9 KK K KK YT ec e XK A e KK C Ko Uk x CK KC KCKUKCK KORKCK K KCK KOK KORK K CK CK OK K K YW N X X X X The following equates set the input from the devices to come from the SWITCHBOARD serial port 1 CIUCI EQU input from user console 1 CICRT EQU 5 input from crt CIURI EQU 5 input from user reader 1 CIUR2 EQU input from user reader 2 CIPTR IN 2 input from paper tape reader get status ANI 40H swait for character JZ CIPTR IN 1 7FH strip off the parity RET e k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k kk ck fe eode k k k k k e e k k k k k k k k k k k k k k k console status routines test if a character has arrived kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk CSTTY CALL TSTAT status from disk jockey 2d STAT MVI A 0 prep for zero return RNZ nothing found DCR A return with kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk The following equates cause the devices to get status from the SWITCHBOARD serial port 1 KH k k k k k k k
50. 9 3040 3200 350 300 110 u 10Q 10Q 5 u 3 360 769 Boor CIN COUT HOME SEEK SECSET DMA READ WRITE DRIVE TU TAT 340 084 380 047 380 052 340 055 380 060 340 063 340 141 380 141 340 184 380 147 380 152 340 154 180 154 340 155 380 156 380 161 340 162 340 163 340 168 340 167 380 172 380 172 340 175 380 175 340 200 340 201 340 203 340 204 340 206 3403207 340 210 3400 211 380 212 310 215 380 216 380 217 340 221 340 222 180 22h 340 225 310 227 380 230 380 232 380 233 480 235 340 2410 380 242 3493245 340 2415 140 246 340 251 340 251 340 256 310 261 142 264 4492267 303 103 303 037 303 333 303 277 303 336 000 056 061 372 041 381 021 353 006 004 302 158 303 175 315 351 041 001 076 320 062 374 257 315 045 122 267 076 036 062 352 315 351 303 245 341 341 340 343 343 346 346 342 340 340 340 343 000 000 343 343 343 340 316 143 340 118 DMAST STATUS DSKERR SETDEN SETSID DRESET DSETUP LDHEAD CGGRCK JMP DMSTAT JMP DISKST JMP LERROR DENFIX JMP SIDEFX DS 560 LXI SP TRACK 1 initialize the SP LXI H TIMER memory test data LXI D STABLE the ROM compare MVI B 4 data and count LDAX D get the ROM data CMP M compare w memory JNZ DRESET do timeout INX H move the INX D pointers DCR B dec the count JNZ TESTL t
51. CONST LXI A CSTBLE sbeginning 7 juap table 234 353 222 3 SONINI select cerrect juno 235 225 237 823 25 2 2 281 242 243 esreader if the censcle is assigned to the reader then 245 jump will be made here where ancther jump ud 245 will cccur to the correct reader status 46 e 1009600050909 5650 243 249 3 6 213837 CSREADR LXI AE aga sbeginning cf reader status table 290 3EC9 READESA 1 e 524 253 a 254 cenin take the ccrrect jump fer the ccnsole input 255 rcutine The jump is based cn the least sig 256 e nificant bits cf icbyte s P a S25 259 260 210432 CONIN LXI H CITSLE sbeginning cf character input table 251 262 25 entry at ctnint will deccde tne tuc least significant 9155 25 cf 225 2 This is use by 2cain ecncas ans const 253 255 ww oo 444 LAT CX A eJ a JI AP AN e we PP RP tato tu hd tae 2 4 Mi de tas
52. D POWER UP Before inserting any IC s in their sockets perform the following check out procedure l Re check the back of the board for solder shorts bridged connections and for pins of IC sockets that have not been soldered These unsoldered pins can cause aggravating intermittant probems during check out 2 Re check components for orientation and make sure all components to be soldered have been soldered 3 With an ohm meter check for shorts between all regulated voltages 5V 5V 12V 12V and ground and between two regulator outputs all regulator output pins are on the right Side of the regulator towards the bottom of the circuit board in this case Check for shorts between 5 108 supply voltages 8V 16V 16V and ground 65 100 pins 1 and 51 hold 8 volts pin 2 holds 16 volts and 52 16 volts Ground is on 5 100 pins 50 and 100 Check these voltages for shorts amoung each other 4 Place the board WITHOUT IC s into an empty system bus Slot and power up In case of smoke power down immediately and investigate 5 With a or scope check the regulators for 5V both of the 780545 12V and 12V The bottom pin of all four regulators 15 the output Check for Vcc and ground on all IC s Check for 12V on the 1791 controller the 2941 baud rate generator and the 1458 4558 op amp Check for 12V on the 1682 UART the 1458 4558 amp Finally check for 5V on the 2941 baud rate gene
53. DRAFT User s Manual DISK JOCKEY 2D tm revision 4 Table of Contents Introduction 2 2 e e e Programming Specifications ROM Jump Table e a au o Serial I O e lt lt w w w w s e Disk I O e u a a ROM Subroutines a a o Diskette Initialization Error Bits Recap gt o Utilizing Disk Jockey Firmware Sample Read Routine Sample Write Routine e e Disk System Software e e The Bootstrap Loader o I O Connectors Jl amp J2 e a so Patches for CP M 4 w lt gt o Hardware Level Registers oh Parts LISE 0X Drive Cable Conventions Serial I O Switch Settings e Power on Jump Table e au o Bootstrap LED Indicator e o Phantom Enable Switch o Concise DIP Switch Reference a Assembly Instructions e a o Parts Installation Initial Check out and Power up Concise Firmware Memory Map Software listings e e a w a a n Cold Boot Loader o CBIOS Drivers for CP M Disk Jockey 2D Firmware SchematlcS s 4 UE SE er es Copyright 1979 G Morrow ATTENTION USERS OF THE NORTH STAR 2 2 PROCESSOR BOARD WRITE DATA RACE CONDITION A race condition exists in the write data logic of the ZPB 2A CPU board which can interfere with the operat
54. E SINGLE H zog ms prepare for read recover DMA addr test the read command for Single density save DMA addr ending address t Save also adjust SP adjust byte cnt H DATREG data register A RCMD CMDREG B M C M PUSH B MOV DCR JNZ DCR MOV PUSH LXI POP POP DCX MOV LDAX MOV MOV STAX INX MOV CHP JNZ MOV CHP JNZ JMP RLC MOV LXI MVI STA LDAX MOV INX DCR JNZ JMP B M E RLOOP D RLOOP C M B do the read command first byte of data 2nd byte of data pair Save the data pair Ist byte of next pair dec low byte of ent dec high byte of ent get last byte store last pair SP STACK 6 adjust SP C A get the end get the begin addr early data pointer get early data get late data swap the two bytes of data advance late ptr compare the two data pointers for a match initialize the data count to 128 D DATREG 1791 data register A RCMD CMDREG D M A H SHORTL CBUSY issue the read command get data from disk move data to memory increment data pointer decrement data count test for transfer done 381 378 341 374 381 377 342 000 342 001 342 002 342 005 3 2 007 342 012 342 013 382 014 342 014 312 015 342 016 342 017 342 020 342 023 342 024 3 2 027 342 030 382 030 342 033 342 034 342 037 342 040 342 082 382 045 342 046 342 046 342 051 342 052 342 052 342 053 342 056
55. HBOARD serial port 1 user reader 2 currently SWITCHBOARD serial port 1 ty currently assigned by intioby ststus from 2d crt currently SWITCHBOARD serial port 1 reader depends on reader device user console 1 currently SWITCHBOARD serial port 1 tty currently assigned by intioby status of 2d paper tape reader currently SWITCHBOARD serial port 1 user reader 1 currently SWITCHBOARD serial port 1 Ser reader 2 currently SWITCHBOARD serial port 1 k kk k k k k k k k k k k k k k kk kk kk k k k kk k k k k k k k k k k k k k k k k k kk k k k k k k kk k k kk k hk The following equates set output device to output to the SWITCHBOARD serial port 1l COCRT EQU COUC1 EQU COULI EQU COPTP EQU COUP1 EQU COUP2 EQU COLPT IN ANI 22 OUT RET k K k k k k k k k k k k k k k k k k k k k k k k k k k k de k de e k k kk k k k k k k k dee e ke ke kk e n n k k k k k kk output from crt 5 soutput from user console 1 output from user line printer 1 output from paper tape punch output from user punch 1 output from user punch 2 2 output from line printer get status 80H wait until ok to send COLPT A C output the character 1 k k k k k k k k k k k k k k k k k k kk kk k k k k kk kk kk kk k kk k k k k k k k k k k k k k k k kk k k k k The following equates set the input from the devices to come from the SWITCHBOARD serial port 1 5FlF
56. HPBRHMAANPRDK GN BRRHHHNAD R 425 2 525 The fcllcving equates set cutput device tc cutput tc bi 22 the SWilCH30ARD serial pert 1 Li 429 gt 430 831 3F3C COCRT EQU cutput frca crt 32 3F3C COUC1 EQU soutput frem user ccnscle 1 833 3F3C COUL 1 EQU seutput frem user line printer 1 812 3F3C COPIP EQU output frem paper tape punch 422 3122 Court EQU seutput fren user punch 1 i 5 COUP2 EQU scutput fren user punch 2 42 ES COLPT IN 2 soutput frem line printer get status 439 3240 CA3C3F ig tops walt until ck te send 2M 1 MOV a c seutput the character di PAR 32 OUT 3 342 32746 RET any 85099 95080528624595a5220628a21 53 5958052255929552069 amp 5265420505288260555252t0560 446 L a 886 The fcllewing equates set the input frem the devices tc MS fren tne SwiITCH3GARD serial pert 1 839 3FAT 3FAT 3 37 47 3 9 3F5B 3650 3252 3 53 3256 3F5 8 3853 5 5 3F5B 3F58 3F5B 3F5B 3F5D 3F5F 3F61 3F 62 3F66 3F6A 3F72 3F76 3FTT 3 79 CIUC1 sinput freca user 1 1 z CICRT EQU sinput frem crt CIURI EQU input frem user reader 1 z CIUR2 EQU 5 sinput frem user reader 2
57. ITCHSOARD serial port 1 122 3F22 3 3 COUP2 seutput te user punch 2 currntlly SWITCHSOARD serial pert 1 395 337 398 2 reader device input table 339 400 501 3 28 0350 RTSLE CITTY sinput fren tty currently assigned by inticby input from 2d 492 3225 873 CIPTR input from paper tape reader currently SwiTCH50ARD serial pert 1 403 3 23 53732 pz CIUR sinput frem user reader 1 currently SWITCHSOARD seriai pert 1 434 3 2 CIUR2 input frem user reader 2 currently SWITCHSOARD serial port 1 595 595 e 437 ccnsole status table 435 499 A 513 3220 533F CSTBLE Ow CSTTY sstatus cf tty currently assigned by inticby ststus frem 24 311 2 5832 Dd CSCRT status from crt currently SWITCHAOARD serial perz 1 312 3230 C631E 94 CSREADR status fren reader depends cn reader device ar 3232 5B3F bw CSuC1 status frem user ecnscle 1 currently SWITCHSCARS serial port 1 313 315 OR 416 8 status fromreader device 41 412 19 2234 533 CSRTBLE status fren try currently assigned by inticdy status cf 24 52 3735 533F od Cores status frem paper tape reader currently 14112112 15 ponn 821 3F38 5B3F Dw CSUR 1 status frem user reader 1 currently S4ITCH3043D serial pert 1 552 583 CSUR2 sstatus cf user reader 2 currently SwITCHBOARD serial pcrt 1 424 OODDTENHDNTDRIHPPAeKAONRBHAHO5DHHORHPBRBSHNHN KH5
58. M PUSH CALL CALL a R LXI DAD JMP 2 Disk Jockey 2D 2 If everything vorks a jump is s 122223412224 4544442444454442221443144144544434444444442444 H CPHORG41500H starting lccation fcr cbics SP STACK H 8 2 02H B SETSEC TKZERO H CPMORG 8 SETDMA B 10 B DREAD 3 895000 5 RDLOOP ORIGIN 3 8 4 27 oK 1 B TRKSET B B SETSEC DMAST H 200Q 8 LDLOOP sinitialize the stack save jump address fcr return later greg Bzsectcr count reg C zstarting secter sSave sectcr and ccunt set the secter tc read home the drive starting lccaticn fcr lead sput starting address set up starting lcad address retry ccunter sSave retry ccunt read in the secter fetch retry ccunt stake funp if read is ck supcate retry ccunter stry again if act ten errers start all ever frem deginaing fefetza sacter iront ani 1 supdate tre scant TO CPM IF DONE sCOMPUTE NEW SECTOR MOD 25 test if ever 26 stake jump if secter lt 27 Start with sector 1 cf next track 5 ccunt and sectcr sccnditicnally set new track srestcre ccunt and sector f sSave it again 25325 new sectcr amp et lcad address update te load address read next sector EONSOKKACDSTETIGKRDSNSOSERARREBSORORREKANENCOKARNRRRARKRARNGKR DBRR N Save write all cf com and the cbics ente the disk
59. NPORNRAUANADRCHCE REC5 A0QCODNE RDCCECEuANEBTADDNME MAARNBDIHR POR EBRANRBKKKRBHo 3E00 15008 3500 3203 START JMP 500T secld beet 3203 36032 JMP BOOT swarm bcct 3 26 3 93 JMP CONST ccnsole status 3209 C3CC3 JMP CONIN secnscle input CPOUT JMP CONOUT ccnscle cutput 3 932 JMP LIST list cutput 3E12 JMP PUNCH spunch cutput JMP READER reader input JMP HOME strack zerc heme SELECT disk selecticn JMP track seek 4 SECTOR sectcr select 14 DMA rf al vrite adsress seiec READ disx reas 4RiTE sdisk write 99 GO 59 99 oo AD SO AD Q DD 8S0 WW CO OE WOO WAM ODNO E 9 45 60 49 E739 2752 755 758 758 5 ETSF E762 E765 E763 763 75 E779 E773 776 E779 2118 0 221DET 215 7 222827 215BET C303E7 C35BET F5 C35FET C009 0 0100 7 CD12Z0 0 01 CDOFEO 018 0 DASEZT C373ET7 SAVE LXI SHLD LXI SHLD LXI JMP STALL JMP ERROR PUSH ERRORI JMP STALL 55 here if everything ck H DWRITE schange lcad tc write instead cf read ROLOOP 2 a H ERROR change errcr return address EXIT 1 H STALL get return address LOAD 3 and do the write 5 status and flags i ERRORI stcp here cn errer
60. OR DONE set up the stack select drive A recalibrate the head seek the head to track 12 sector count amp number save sector cnt amp num set up read address restore sect to read set up sect to read read the sector test for error restore sect cnt amp num update count update sector number save count amp number dma address into B C add sector size to current address new address into B C continue reading error stop Utilizing Disk Jockey Firmware WRITE The following program writes from memory starting at 200 0000 89090H onto tracks 4 5 and 6 of disk drive 1 001 000 001 003 001 094 001 045 001 016 001 013 01 016 91 021 91 023 001 026 001 027 001 032 001 035 001 036 01 041 001 044 001 045 001 046 081 047 0081 852 681 853 91 054 801 9057 881 962 881 065 081 066 001 067 601 070 691 973 001 076 001 077 001 121 601 104 001 107 001 112 061 257 117 315 315 001 315 076 062 117 315 001 305 315 041 011 345 301 315 301 305 315 315 332 301 014 005 302 272 274 376 302 303 303 000 356 363 202 209 011 004 112 313 001 352 009 011 166 123 187 035 112 007 023 104 127 346 341 341 177 342 001 342 932 341 001 342 342 342 001 001 001 201 001 001 O Ut WH lH i3 UJ CJ UJ IJ J N IO Q NN E I He i tN G OY Ur ids wN F
61. STATE DO BUS DATA INPUT BUFFER WRITE BLOCK DIAGRAM BOARD SELECT ROM SELECT FUNCTION SELECT DISK SELECT CONTROLLER SELECT STATUS SELECT UART SELECT UART STATUS READY READ WRITE RESET DISK SELECT t HEAD LOAD DISK SELECT BUS HEAD LOADED DATA SEPARATOR CONTROL PAUSE CONTROL DENSITY SELECT CONTROLLER RESET FUNCTION SELECT REGISTER RESET FUNCTION SELECT DENSITY SELECT DATA DATA SEPARATOR SYSTEM CLOC R K CONTROL SYSTEM DISK READ DATA CLOCK INTERNAL TRI STATE DATA BUS DENSITY SELECT DISK CONTROL BUS CONTROLLER RESET FND 1791 P DATA RQ DISK STATUS BUS i INTRQ DISK CONTROL BUS DRIVERS CONTROLLER SELECT WRITE ENCODE A SYSTEM CLOCK DISK WRITE DATA TON LOGIC BAUD RATE K RS 232 1 0 BUS GENERATOR amp RS232 TTY LEVEL 0 1 0 Bus UART STATUS CONVERSION UART SELECT RESET INTERNAL TRI STATE DATA BUS POMER ON JUMP LOGIC SO NUS READ RESET ADDR DSBL TRI STATE DATA OUTPUT DI BUS BUFFER READ BOARD SELECT 1979 6 MORROW ENABLE ON 16 1 2 e sn a 3 INT RQ MEMORY 330 as 2 Vc Ais 86 gt A3 85 gt 12 B3 50 48 O READ 12 ad ccu T i 33 pf p 5001 452 SELECT siNP 46 gt STATUS MEM SINTA 96 gt STALL 5 6 sacle A WRITE ENBL 74LS367 TYPICAL WRITE A 34 gt gt ADDR 9 0 1 STALL
62. Toys have the necessary I O routines to interface CP M to the Disk Jockey controller and to the DJ2D s serial facility These patches will help create a SINGLE DENSITY CP M diskette NOT a double density one Though this may seem of marginal interest at first glance we would point out that this section combined with the software listings provided in the back of this manual constitutes excellent example of interfacing the Discus 2D to a significant disk operating system At the end of this section are two listings which designed to allow the Disk Jockey to be interfaced with the Digital Research CP M operating system This can be done with a minimum of effort The first listing is the so called cold start loader which is used to bring CP M in from the disk It also has code which will allow the user easily to write a modified version of CP M out on the disk There is even a small routine which writes the Cold start loader itself on sector 1 of track 0 The second listing is CBIOS software Custom Basic Input Output System which is the interface between CP M and the Disk Jockey controller The general idea is to key in the cold start loader use the loader to bring CP M in from a diskette enter the CBIOS code and finally use the cold start loader to save everything out on a clean diskette The Cold Start Loader There three parts to the cold start loader LOAD is at address 347 0000 0 700 and is
63. Whenever a seek Programming Specifications Disk I O command is issued which causes the the read write head to move to a new track the firmware on the DJ board performs a verify which reads this sector header to make sure the head is positioned correctly and to determine if there is any change in the sector length or the density of the recorded information If there is an error as to the track number the firmware automatically issues seek to track zero command to position the head over known track The disk drive has a sensor that reports when the read write head 15 physically positioned at track zero A series of step out commands must be issued by the 1791 controller until this status line becomes active This operation will always position the head to the same physical track The seek to track zero command is often called a recalibrate command and is a standard utility subroutine supplied with the disk firmware Transferring a sector of disk data between memory and the disk therefore involves the following steps each corresponding to subroutine call to the Disk Jockey firmware with the exception of error checking Specify the track number the read write head should be positioned over during subsequent data transfers between the disk and memory Check for error conditions Specify the sector number that will be involved in subsequent data transfers between the disk and memory Check for error conditions Spe
64. abeled 741 5240 on the silk screened legend at 6D and the 74LS367 at 7D Install solder and clip the 112 picofarad silver mica beneath the 74221 IC at location 6B Install solder and clip the 470 picofarad mica cap beneath the 7404 IC at location 6B 1 Install solder and clip the 001 microfarad disk cap to the left of the 741574 IC at location 6A 1 Install solder and clip the 01 microfarad mylar cap to the left of the 1458 4558 IC at location 4A Install solder and clip the leads of the three transistors near J2 and of the 3904 transistor below DIP switch 4D carefully observing the placement and orientation information silk screened on the circuit board 1 Install and solder the two DIP switch arrays Switch l of each DIP should be positioned toward the top of the board 52 Parts Installation Install solder and clip the leads of the 19 by pass capacitors whose positions are identified by an oval with asterisk in the middle Bend the leads of the two 7805 regulators and insert them in the circuit board Place a separate finned heat sink between the regulator and the board work a screw from the back of the board through the board heat sink and regulator and hand tighten into the nut on top of the regulator Solder the leads and adjust the wings of the separate heat sink and finally tighten the screw CLEAN AND EXAMINE THE BOARD Use flux cleaner to remove solder ro
65. ader will shift the bits intc pcsiticn used by list and punch READR1 RAR JMP SELDEV SKHSKASSR ESSE punch select the ccrrect punch device The selecticn from bits 4 amp 5 cf iobyte s PUNCH LXI H PTSLE beginning cf punch table LDA IOBYTE 2 entry at pnchl rctates Sits a little mcre in prep fcr seldev used by list LJ PNCH1 RAR RAR JMP READR1 12222421 22243 545114135442213253221535 154255154 44523444434 list select list device based en bits 657 cf icbyte a a s 1151 LXI H LTBLE beginning cf the list device reutines LOA IOBYTE RAR RAR JMP 1 If custezizing I O rcutines is being perfermed the taole helee snculd be macdified te reflect the changes all 177 devices ara jeccded cui cf and tne 15 29297 ferm tne fcilcsina jump 6 253 e 4 4 49 AD 099 08 806502005 sbezinninz cf the character cut table 361 362 ccascle input table 363
66. ait for index pulse high advance count four dummy instructions for delay walt for next low index 98 machiae cycles 343 277 34 3 300 343 302 343 303 343 304 343 307 343 310 383 312 383 313 383 314 343 315 343 316 343 317 43 320 343 321 383 322 383 323 343 325 343 326 343 327 313 330 343 331 383 332 343 335 383 336 343 336 383 337 343 341 343 342 343 343 383 344 343 345 343 350 343 351 343 351 343 354 343 354 313 355 343 356 343 357 341 360 143 361 313 368 393 365 343 366 343 367 346 314 346 311 346 345 3463 347 416 351 171 346 027 027 027 027 062 311 340 000 303 000 009 090 909 001 353 000 001 366 001 367 000 354 031 939 347 Q S NN u w qub ot am an PNO Ew Na MOV ANI CMA MOV LXI MOV MVI INX PUSH INX INX DAD DAD MOV ORI ANA HOV POP RNZ MOV STA RET MOV ANI RAL RAL RAL STA RET LXI DCX MOV ORA XTHL XTHC JNZ RET DB DB DB AORG DS La LW DB X m e trim excess bits compliment B and save new disk get disk no offset addr current disk move to ACC compare w new Save status disk table address add the offset get parameters make off density set new density update check for ndzcd new disk not old update CDISK also get the side bi
67. ansfer operations Stop the CPU Step III Enter the cold start loader into memory starting at location 347 000Q 0 700 The instructions will extend from 347 0000 700 to 347 1770 0E77FH filling most of the first half of the last page of RAM on the controller Step IV Set the program counter of the CPU to location 347 142Q 0E762H but do NOT start the CPU yet Step V Insert the BLANK diskette into the drive and close the door Be sure that the diskette is NOT write protected An 8 write protected diskette has a notch near the corner of the diskette diagonally oppoiste the labled corner this notch is missing or covered the diskette is not write protected Be sure the diskette is inserted right side up a Disk Jockey system the label will be on the top diskette is inserted in the drive with the label held bewteen the thumb and forefinger Step VI Start the computer drive activity light if 15 present will come on the head will load and step out to track 0 unless it is there already After sixteen revolutions of the diskette the head will unload and the activity light will go off i Step VII Stop the CPU It should be in the tight loop JMP DONE 303 171 347 octal C3 79 E7 hex The cold start loader has been written on sector 1 of track 0 27 Patches for CP M Step VIII Remove the diskette from the drive Step IX Change location 347 0010 8E701H from
68. cal difference between an A and a B drive or between any two differently addressed drives is the jumper strapping on the PC board of the drives Strapping a drive for termination and drive selection is documented in the Shugart OEM manual Four different daisy chain cables are available for one two three or four drive systems daisy chain cable is simply parallel cable Not all available connectors on a multiple drive cable need be filled for the system to function Also a dual system with drives addressed say as A and C would work fine as long as the operator remembered to refer to the second drive as C rather than B In other words absence B drive in no way locks out the C and D drives The following rule applies to all cable configurations supplied by Thinker Toys The 50 pin flat ribbon cable provided with the Discus system should be connected to the Disk Jockey controller board 50 that the cable extends out over the solder side of the PC board not the component side Whichever end of the 50 pin flat ribbon cable is chosen to plug into the controller board that side of the cable which is the LEFT closer to the heat sink as it connects to the controller should be UP as it connects to each and every drive on the system Thus Jl pin 58 on the DJ controller board should come in to each disk drive via the top part of the male 50 pin connector attached to the cabinet of each drive If t
69. cify the starting memory address of block of data that is to be transfered to or form the disk Check for error condition Actually perform the read or write operation Check for error conditions ROM SUBROUTINES TRKSET The value the C register of the CPU specifies what track the read write head will be positioned over when the next disk read or disk write operation is issued bounds check is made for a value greater than or equal to zero and less than or equal to 76 If the value the register is within these bounds the contents of the C register is written into the RAM location TRACK Programming Specification ROM Subroutines SECTOR SETDMA SELDRV SETSID Otherwise no action is taken the carry flag is set and the subroutine returns to the calling program The value in the C register of the CPU specifies what sector will be involved in the next disk read or write operation A bounds check is made for a value greater than or equal to l and less than or equal to 26 If the value the C register is within these bounds the data in C is transfered the the RAM location SECTOR and a normal return is made Otherwise no action is taken the carry flag is set and the subroutine returns to the calling program Just prior to a disk transfer operation comparison is made between the value in SECTOR and the maximum number of sectors on the track that transfer is to take place on If the value in SECTOR e
70. cr cenditicn 1 Li a 512 201 2902 3 At 211520 READ LXI 4 DISKR put disk read address into repeat lccp 293 3 22 RDWR SHL5 R4 1 29 9604 MVI 3 19 sretry ccunter 295 3 9 C5 ROWRL PUSH 8 296 3EAA CDOOO00 RW CALL 0 sactually call disk read write 297 3EAD Cl POP 8 223 027335 JKE OK sexit if succesful 203 3651 05 CR B stest errer count 210 3E32 C2A93E JNZ RD4RL ccntinue if nct zerc 211 3EB5 MYI C RWERA read write errer bit 212 2E37 C3753 JMP DOERRS print the apprcpriate errer message 213 212 151255221442 215 216 write write data cnts the disk alsc try ten tines 211 befcre reporting an errcr s 218 219 12132222242 220 221 211859 WRITE LXI H DISKW 222 552 JMP RIAR 223 A 652 DEDDHAPYSDFTOREAARNERANCRNMAR OMAAMDDA NMANANPMRMRRAKNHPRR5DRACRN HRDDR 225 225 ccnst get the status fcr the currently assizned ccnscle 227 device The censcle device can be zetten frem a 223 icbyte then jump tc the ccrrect ccascle status 223 rcutiane is perfermed 239 531 232 233 3 20 242 63
71. cter data CMA STA UDATA send to UART CMA RET LDA USTAT get UART status ANI ISTAT input ready bit JNZ CIN test input ready LDA UDATA get the character CMA true data ANI 177Q trim to 7 bits RET LLA USTAT get UART status 381 021 341 023 341 024 381 027 341 030 141 031 341 031 341 034 341 036 341 037 341 037 341 042 391 043 341 016 341 0U7 341 052 341 053 341 055 341 056 341 057 341 062 3 1 063 341 064 341 065 341 066 341 067 341 072 341 073 341 074 Z41 075 341 076 241 101 341 102 381 103 381 103 341 104 341 107 341 110 341 111 341 112 331 113 381 113 481 115 141 116 3 1 120 341 121 481 122 341 125 381 126 11 126 346 300 315 271 311 072 386 311 072 107 072 117 072 057 386 017 127 072 027 027 027 202 127 072 027 027 202 127 072 202 311 345 052 104 115 311 311 076 201 076 330 171 062 311 041 004 377 340 371 393 004 376 383 375 383 366 346 001 367 346 375 346 354 346 347 346 374 020 53 346 210 080 179 180 181 182 183 184 185 186 THSTAT 187 188 189 190 191 192 DISKST 193 tou 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 DMSTAT 219 220 221 222 223 224 225 4 226 227 DRIVE 228 229 230 231 232 233 234 235 236 237
72. d in the documentation a detailed data sheet describing the way which the 1791 controller functions The 1602 UART comprises two of the read only registers input data and status registers and one of the write only registers output data As with the 1791 we do not describe these registers in great detail since a data sheet for the 1602 is also included in the documentation The 1791 controller has a negative logic data bus For this reason the internal bidirectional data bus of the DJ board 15 also negative logic However the bus of the 1602 UART is positive logic This means that when references are made to the UART registers the signal levels are opposite to what one would normally expect practice then one should always invert data just before it is written into the UART output register likewise data read from the UART should be inverted before it is interpreted READABLE REGISTERS Register 0 The inverted UART data output register Location 343 370 E3F8 hex standard Disk Jockey Date is stored in this register by the UART after it has been assembled from the serial data input stream When a new character is assembled and transferred to this register the UART sets the DR Data Ready flag When this register is read by the CPU the DR flag is reset by the UART hardware Register l The inverted UART status register Location 343 371 E3F9 hex standard Disk Jockey Only the low order five bits of this registe
73. designed to read CP M into memory from location 51 0000 2900H to 77 3770 3FFFH After loading CP M the LOAD routine branches to location 76 0000 GE00H which is routine that initializes several memory locations prints sign on message and then branches to CP M proper SAVE is at location 347 1110 0E749H and is the reverse of LOAD SAVE writes out on the disk starting at track 0 sector 2 all memory locations between 51 0000 2900H and 77 377Q 3FFFH After performing this operation SAVE comes to a dynamic halt at STALL 347 1330 0 75 CP M is a trademark of Digital Research 25 Patches for CP M INTLZ is short routine which writes locations 347 0000 0E780H through 347 1770 DE77FH on sector 1 of track 0 Thus once the cold start loader is keyed into memory it save itself at the right location on the disk CBIOS The standard version of CP M is designed to run with the Intel MDS development system and floppy disk interface Most of the CP M system software is completely independent of the particular 8080 hardware environment in which it happens to be running However there is a certain part which must be tailored to the hardware of the host system This hardware dependent software is completely contained on pages 76 and 77 of memory assuming the standard 16K version can be made to run different hardware by changing the software on pages 76 3E00H and 77 3F89H The CBIOS
74. due to some other cause memory media controller CPU etc PHANTOM ENABLE The DJ2D will respond to the PHANTOM line S 100 pin 67 if paddle 8 of SW4 is placed in the position This paddle is the lowest paddle of the LEFT switch at location 4D The DJ2D will become de selected when the PHANTOM line goes active if this paddle is on If this paddle is placed in the off position the DJ2D will ignore the PHANTOM line order for the Power on Jump feature of the DJ2D to work a SOL computer the PHANTOM Enable Switch must POWER STABILIZATION When booting a disk for the first time after powering up the head on Drive A will not load as evidenced by the LED on the drive door release for a second or two After this initial boot all subsequent boots should load the head immediately until power is turned off and on erasing memory During a boot the firmware the DJ2D searches its internal RAM for a bit pattern to indicate that at least one boot has taken place since power up If no such bit pattern is present short delay will inserted to allow all components in the system to stabilize BOOTING WITHOUT DISKETTE If no diskette has been placed in Drive A and a boot is attempted is often the case during a power on jump when System 15 first powered up the LED on Drive will flash briefly about once every second It is possible to execute a boot in this mode Insert the syste
75. e housing The positive end of the 39 microfarad capacitors is identified by a red band The silk screen identifies the positive lead of these axial parts with a sign The by pass caps identified the silk screened legend by an asterisk enclosed by an oval are not polarized The 01 mylar cap and the 001 disk cap are not polarized The two DIP switch arrays are to be positioned so that switch paddle number 1 is toward the top of the board The SIP resistor packs historically prone to being inserted backwards should have their white dot nearest the white dot on their respective legends This turns out to be down for the two 3 3k Ohm packs at the bottom of the board and to the right for the 188 Ohm pack just below the 21 connector at the top right of the board The crystals included in this kit have a piece of foam attached to their PC board side When these parts are installed the protective paper on the back of the pad should be peeled off just before the leads are inserted through the circuit board at the position indicated on the parts legend The foam pad has an adhesive on it which will hold the crystal to the circuit board The pad and the adhesive are insulators so that no short circuit can occur when the crystal is installed The orientation of the transistors is indicated on the silk Screen legend of the circuit board is their type number A very common cause of smoke on power up is a 2N3986 correctly
76. es The subroutine TRMOUT causes the UART to transmit the data in the register of the CPU The TBRE bit of the UART s status register is tested When TBRE is high the contents of the C register is transferred to the UART s system bus register This automatically resets the TBRE bit The TRMOUT subroutine will wait for the TBRE bit to be high before transferring data to the UART The subroutine TPANIC can be called to detect the presence of a panic character in the serial input stream TPANIC tests the DR bit of the UART s status register When this bit is high TPANIC calls the TERMIN subroutine and then compares the data from the UART with the contents of the C register The ZERO flag of the CPU s FLAGS register is set upon completion of the TPANIC subroutine if the character in the C register has been struck the terminal keyboard The subroutine TSTAT be called to test the condition of Programming Specifications Serial I O the DR bit in the UART s status register Upon completion the ZERO flag of the CPU s FLAGS register is set if the DR bit is high The subroutine does NOT reset the DR bit DISK I O To understand the significance of the disk utility subroutines it is necessary to say a few words about how data is organized on the disk Information on the disk 15 organized into 77 concentric tracks The disk read write head can be moved to any track by a series of step in or step out commands A step in comma
77. est more JMP DSETUP CALL TIMOUT reset time out LXI H 1 PUSH H track O sector MVI L MDINT set up side PUSH H select also MVI 3779 parameter PUSH H and PUSH H track info PUSH H for the PUSH drives LXI H O initialize PUSH H the track INX SP zero flag MVI 109 current disk PUSH H and new disk MVI 3760 initialize DRVSEL PUSH ti and HDFLAG MVI H RAM 3 000Q 256 PUSH H DMA address MVI 309 temporary TIMER PUSH H constant MVI A MDINT initialize 1791 STA DCMD control bits MVI A CLRCMD 1791 reset STA CMDREG command XRA A load the head CALL HDCHK and test for JNC DOOROK drive ready MVI A LIGHT turn on the STA DRYSEL error LED CALL TIMOUT time out to JMP LDHEAD close drive door 340 267 076 076 340 271 380 274 340 276 340 277 340 302 340 303 340 Jou 340 305 340 310 380 311 3410 314 340 315 380 316 340 317 380 321 340 321 340 322 340 325 340 326 310 327 340 330 380 333 340 333 340 335 380 340 340 340 340 381 310 342 380 383 340 346 310 350 10 351 340 354 310 355 380 360 340 360 380 363 340 365 180 370 340 371 380 372 380 375 380 376 310 377 340 377 j41 002 j41 00U 341 007 381 012 381 013 341 015 481 016 311 016 062 066 341 315 301 305 325 052 345 052 345 000 305 006 305 315 301 320 005 302 016 021 033 172 263 302 076 251 062 117 3
78. gt IQ O OY Un A 33 34 35 36 WRITE TLOOP SLOOP DONE ERROR TEMP POP INR JNZ LDA INR CPI JMP JMP DB SP ZEGEEH set up the stack A SELDRV TKZERO select drive A recalibrate the he B 8000H 100H set initial adrs SETDMA 4 TRKSET 32 0010 DMAST H 100H B H B SETDMA B B SETSEC DWRITE ERROR B C B SLOOP TEMP TLOOP DONE ERROR 0 initial track numb save track number seek to correct tr Sector count amp numbe save sect and couni get current addres update to next sect move address to B C set up new address restore sect cnt amp nu Set up next sector write the data test for error recover sect cnt amp nu update sector update count get current track update track check if all done continue to next tri error exit track storage Utilizing Disk Jockey Firmware WRITE The following program writes from memory starting at 200 0000 8000 to tracks 4 5 9100 0103 0104 0105 0108 010 G1GE 0111 0113 0116 0117 011A 6110 011E 0121 0124 0125 0126 0127 012 012 012 012 0132 0135 0136 0137 0138 013 G13E 013 0141 0144 0147 014A EA 09 209 76 53 47 1 07 13 44 47 E6 El EI 7F E2 01 2 1 El 01 E2 E2 E2 01 01 01 01 01 01 and 6 of disk drive 1 WRITE TLOOP SLOOP DONE ERROR TEMP LXI XRA MOV
79. he LED on the front of the drive comes on upon power up the cable is on backwards and should be reversed The LED on the front of the drive should light up only when a command has been issued to load the head Any visual key such as an arrow or triangle on a connector should be used solely as an aid in implementing the connection scheme described above 41 SERIAL I O SWITCH SETTINGS BAUD RATE SELECTION Paddles 1 to 4 of Switch 2 in the lower right corner of the DJ control the baud rate for the 1602 UART Sixteen separate baud rates ranging from 50 to 19 200 available The following table lists all possible switch settings for baud rate selection BAUD RATE SWITCH SETTINGS 5142 1 542 2 SW2 3 SW2 4 BAUD RATE 50 off 75 110 off off 134 5 off on on 150 off on off 300 off off on 600 on off off off 1200 o ff on on on 1800 off on on off 20060 off on off on 2400 off on off off 3600 off off on on 4808 off off on off 7200 off off off on 9600 off off off off 19200 WORD LENGTH Paddle 7 of Switch 2 controls data word length selection for the 1602 UART Placing paddle 7 in the on position sets the word length to 7 bits while off fixes the word length to 8 bits The table below gives the word length selection settings f
80. i DSTAT M HDFLAG PSW DRVSEL C A SIDE C DREG DCREG TRACK 2 gt o G gt Z C os DCREG ULOAD M A A 200Q TIMER H i H CSTAT PATCH HDLOAD rotate to select the proper drive save force head load test for head loaded save the head loaded status get current drive save get current side and merge with drive select select drive side 1791 control bits save get the new trk force single density If track 0 compliment merge w control bits set 1791 control toggel access bit save PREP routine head load status conditionally wait for head load time out count doun 40 ms for head load time out disk status addr test for disk ready force a head unload set disk not ready error flag get index count and multiply by four save in D E pair issue command jump around patch patch for otd ATE 383 166 383 170 171 172 173 176 176 177 200 201 202 203 204 205 tad sav kad 0 ou SAD vA 4 4 CA kav LA SAP SAP 211 212 213 220 223 225 226 231 233 22034 235 236 343 236 343 2Uu0 343 241 MA AD SAP NA dm dz 4m Xm dz 4
81. ill deselect the last drive NDRIVEC This is the drive select bit for the third drive connected to the Disk Jockey A zero selects the third drive when the head is loaded while deselects the third drive NDRIVEB The drive select bit for the second drive connected to the Disk Jockey When the head is loaded zero in this bit will select the second drive while a one will deselect it NDRIVEA The drive select bit for the first drive connected to the Disk Jockey A zero in this bit will select the first drive when the head is loaded and a zero will deselect it Only one of the four low order bits of this register should ever be a zero If more than one of these bits are zero loading the head will select more than one drive and cause data errors during reads and possible head position errors on seeks Register 2 The Disk Jockey function register Location 343 372 E3FA hex standard Disk Jockey Only the low order six bits of this register have Significance Two bits load and unload the read write head of the drive one determines the density mode that the 1791 controller operates at another turns on and off the VCO of the phase lock loop and yet another controls the master reset of the 1791 controller The final bit controls the way that the CPU will access the data register of the 1791 During power up this register is initialized so that it is as if ones had been written 3 3 Hardware level register
82. inal connected to the DJ board order for the serial interface to function properly The UART Universal Asynchronous Receiver Transmitter consists of two independent sections a transmitter section and a receiver section Each section has two registers In the transmitter section register is loaded by the system bus The contents of this bus register are transferred to a shift register where start stop and conditionally parity bits are appended The transmitted serial data originates from this shift register Whenever the contents of the system bus register have been transferred to the second shift register the UART sets the TBRE Transmitter Buffer Register Empty bit its status register In the receiver section there is shift register which assembles a parallel data word from the input serial stream after start and stop bits have been removed When a complete data word has been assembled in this register it is loaded into second register that is accessible from the system bus Whenever this bus register is loaded from the receiver shift register the UART sets the DR Data Ready bit in its status register The subroutine TERMIN be called to wait for the UART to raise the DR bit of its status register The character is then transferred to the A register and trimmed to seven bits Reading the UART s data register automatically resets the DR bit The TERMIN subroutine will not return until a character arriv
83. ion of other boards the 5 10 0 bus if these boards utilize an internal bi directional data bus The following modification will alleviate this problem without degrading the performance of the North Star CPU or any other known device sharing the bus Locate IC It is 74LS132 in the upper left section of the 2 circuit board Remove this chip from its socket bend out 10 and replace the IC in its socket in such a way that pin 10 sticks out without making contact with its assigned socket hole or with any other component Make sure that the chip is oriented correctly when it is replaced Pin 10 should be pointing toward the top of the board This completes the modification User s Manual tm DISK JOCKEY 2 D INTRODUCTION The Thinker Toys DISK JOCKEY 2 D DJ board features three distinct subsections l floppy disk controller capable of reading and writing data either single density FM code or double density code with write precompensation which be connected to any floppy disk drive plug compatible with the Shugart 880 858 2 baud rate selectable hardware UART serial interface that allows communication with a terminal device at TTY 20ma current loop or RS 232 levels 3 Automatic address generation upon reset or power up which allows jump start to the boot strap program in the ROM contained on the board The DJ plugs into S 100 bus slot in a system with an 8080 8085
84. is passed to the DSKERR utility which is described below Before sector one is read into memory various memory locations of the Disk Jockey RAM are initialized Also DBOOT goes through a several second delay the first time it is called after power up In order to effect an orderly start up sequence DBOOT does not require that the drive have a diskette in place when it is called the drive is not ready when DBOOT is called it falls into a loop that turns on the LED at the top of the controller and slowly pulses the activity light at the front of the drive This was done so that DBOOT could be started before a diskette was inserted in the drive When a diskette has been inserted the door should be closed just AFTER the activity light has been pulsed This subroutine loads the B C register pair with the current value of the DMA address recorded in the Disk Jockey RAM This subroutine loads the B register with the sector number involved in the last disk transfer operation It loads the C register with the track number the head 15 currently positioned over Finally it loads the register with a bit pattern indicating the drive involved in the last disk transfer operation the length of the sectors on the current track the side specified by the last SETSID call and whether or not data on the current track is written in single or double density format The details of how this information is encoded in the register is presented below
85. itor 1 8 microfarad axial lead tantalum capacitors 39 microfarad axial lead tantalum capacitors Disk by pass capacitors may vary in value from 01 to 1 microfarads depending on current supplies Dual in line 50 conductor right angle header Single in line 7 conductor right angle header Heat sinks for 5 volt regulators 6 32 5 16 flat head machine screws 6 32 1 4 hex machine nuts 5 0688 MHZ HU 18 Crystal 10 0000 MHz HU 18 Crystal 8 position DIP switch arrays 4D 13D 1 914 4820 0201 signal diodes 1N751A 5 1 volt 5 Zener diode RL289 light emitting diode 2N3904 transistors 2N3906 transistors 8 pin low profile socket 14 pin low profile sockets 16 pin low profile sockets 18 pin low profile sockets 20 pin low profile sockets 40 pin low profile sockets 74 500 quad 2 input NAND gate 3D 741502 quad 2 input NOR gate 4C 7404 hex inverter 2B 38 DJ2D Revision 4 Parts List N e Hm N N N 74LS04 LS14 hex inverter 7B 10B 741 508 quad 2 input AND gate 1D 741513 20 dual 4 input NAND gate 8B 741 530 8 input NAND gate 7C 74LS32 quad 2 input OR gate 7A 6C 74LS74 dual D type flip flop 3B 9B 2C 74LS132 quad 2 input NAND Schmitt Trigger 3B 74LS155 dual l of 4 decoder 9A 7415161 hexidecimal counter 1B 74165 74LS165 8 bit parallel load shift register 2D 741 5174 hex register with clear 7262136 7415221 dual monostable These two parts 4B 68 replace the 74221 IC which appears on the Silk screened legend of
86. ive A B C or D Make sure that the drive in question has a disk formatted in the proper density Reset the system and boot the new disk SAVEUSER The SAVEUSER command places whatever I O that happens to be in memory onto the CP M boot program Thus new I O drivers can be patched in from a front panel or monitor and made permanent through the SAVEUSER command subsequent MOVCPM command will overwrite this patch so once a driver has been tested it should be incorporated into a USER source file as soon as possible The memory locations to patch in I O drivers can be found in the listing of TTUSER included with the CP M diskette AUTO COM The AUTO COM function does not work at this time 2 se III ae Ra de joke a DO e de e Re Ke ae Ke IIT eek TOR ek kk ek 4 SAMPLE USER AREA 5 gt FOR THINKER TOYS 2D CONTROLLER AND SWITCHBOARD g 335544255442 73 8 f THIS DRIVER IMPLEMENTS I O BYTE 9 THE CONSOLE DEVICE IS AN RS232 OR TERMINAL 10 ATTACHED TO THE I O CONNECTOR OF THE DJ2D BOARD 11 THE LIST DEVICE IS AN RS232 OR TTY PRINTER 12 TO THE SECOND SERIAL PORT ON THE SWITCHBOARD 13 THESE ROUTINES CAN BE USED AS A BASIS 14 FOR THE DEVELOPMENT OF YOUR OWN I O 15 NOTE ALSO LOCATIONS OF WHERE TO SET THE 16 DENSITY ON EACH DRIVE AND SETTING OF THE MODE BYTE 17 WHICH CAN RUN A FILE NAMED AUTO COM ON EITHER 18 COLD OR WARM BOOT 19 4 FOR EXAMPLE RENAME BASIC COM TO AUTO COM 20
87. k 00 The track Zero sensor is used to determine this positioning and no read header verify operation is performed There are several side effects of positioning the head at track Zero 1 a flag is set in the Disk Jockey RAM to force Programming Specification ROM Subroutines READ a read header density position verify operation prior to the next disk transfer operation and 2 the mode of the 1791 controller will be forced to single density long as disk transfer operations occur on track zero All compatible diskettes have track zero formatted in single density and condition 2 above relieves the System software of the burden of conditionally changing density every time the head is moved to track zero If the rest of the disk is recorded in double density the Disk Jockey firmware will automatically switch back to double density when the head is moved away from track zero without the intervention of external software This subroutine transfers information from the diskette to memory The first task is to select the proper disk drive If the new drive is not the same as the current drive the load head time out flag is set and the current drive is updated to be the new drive Next the head loaded flag is tested If the head is not loaded or if the current drive was not the same as the new drive the head load time out flag is set The firmware then merges the drive select bits with the head select bit and physica
88. k k k k k k k k k k k k k k k k k k k k k k Q 2 H z entry at coninl will decode the two least significant bits of iobyte This is used by conin conout and const X LDA IOBYTE RAL entry at seldev will form an offset into the table pointed to by H amp L and then pick up the address and jump there SELDEV ANI 6H strip off unwanted bits MVI D 0 form affset MOV DAD D add offset MOV pick up high byte INX H MOV H M pick up low byte MOV L A form address PCHL go there k k k k k k k k k k k k k k k k k k k k k k k k k k kk k k kk k k k k k k ce e en e e xe kx e e k kk k kk ko ko k k k kk conout take the proper branch address based on the two least significant bits of iobyte k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k ko ek koe kk k k k ik k k k k LXI H CITBLE beginning of character input t 5EB6 21 45 CONOUT LXI H COTBLE beginning of the character out tabl 5 9 C3A75E JMP CONIN1 do the decode kkkkkkkkk kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkx reader select the correct reader device for input The reader is selected from bits 2 and 3 of iobyte k kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk 5EBC 21FC5E READER LXI H RTBLE beginning of reader input table entry at readera will decode bits 2 5 3 of iobyte used by csreader 5EBF 3
89. k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k K K k k k k k k PRST EQU S STATUS OF PRINTER 5 1 5 status of user reader 1 CSUR2 EQU 5 status of user reader 2 CSPTR EQU 5 Status of paper tape reader CSUCI EQU Status of user console 1 CSCRT IN 2 Status from crt get status ANI 40H Strip of data ready bit XRI 40H make correct polarity JMP STAT return proper indication kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk THE FOLLOWING IS A TERMINAL INITIALIZATION ROUTINE IT CAN BE USED TO PERFORM ANY INITIALIZATION YOU MAY REQUIRE CURRENTLY IT IS NEEDED kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk INIT EQU MVI A INTIOBY STA IOBYTE RET
90. le error The default assignment of densities in the production CP M disk is and D drives Double Density B drive Single Density To change this arrangement temporarily type DENSITY and follow the prompts To make a permanent change follow the instructions Contained in the ASM file TTUSER FORMATTING A DISKETTE The two command programs FORMATID and FORMAT2D will format diskette in single and dual density respectively FORMATID will write sector headers for 26 sectors per track 128 bytes per sector FORMAT2D will write sector headers for 26 sectors per track 256 bytes per sector disk can be formatted in either density regardless of the density assigned to the formatting drive under CP M however the drive will not be able to read the disk it has just formatted unless the drive has been assigned the proper density USER and TTUSER 2D CP M dedicates the equivalent of three single density sectors or one and a half pages of memory for user I O single density CP M this was subsumed under the CBIOS a 24K system locations 5E86 to 5FFF contain user 1 0 To alter CP M size or change the I O routines or both from the original production configuration the USER or TTUSER file must be edited to reflect the desired changes and re assembled to create a HEX file of the new I O active I O on production diskettes was assembled from the file called TTUSER while a simpler file called USER provides an alte
91. lly selects a drive loads the head s and selects a side if the drive is double sided If the head load time out bit is set a 40 millesecond delay occurs to allow for the head to settle after loading Next the ready line from the drive is tested If the drive is not ready the head is unloaded and the routine returns to the calling program with the carry bit set and an 80H in the A register If the drive is ready the head is positioned in accordance with the most recent seek operation Head motion including head load or a change of disk drive will cause the firmware to verify the track position by doing a read header operation The correct density of the track is also determined during this operation and the density mode is changed if necessary If the 1791 controller cannot read the header information in either density the head is moved to track zero the carry is set and the read operation is terminated with an 11H in the A register If the head is correctly positioned the Size of the sectors on the current track is encoded the Disk Jockey RAM The firmware uses this information to find the value of the highest addressable sector This value is compared to the that specified by the most recent set sector operation If the desired sector has a value too large for the present track the head 15 unloaded the carry flag is set and the routine returns ith a 10H in the register If the value is acceptable the data fro
92. m Weller and Unger and should be part of electronics shop There are three important soldering requirements for building this kit 1 Do not use an iron that is too cold less than 608 degrees F or too hot more than 750 degrees F 2 Do not hold the iron against a pad for more than about six seconds 3 Do not apply excessive amounts of solder The recommended procedure for soldering components to the circuit board is as follows 1 Bring the iron in contact with BOTH the component lead AND the pad 2 Apply a SMALL amount of solder at the point where the iron component lead and pad ALL make contact 3 After the initial application of solder has been accomplished with the solder flowing to the pad and component lead the heat of the iron will have transferred to BOTH the pad AND lead Apply a small amount of additional solder to cover the joint between the pad and the lead DO NOT PILE SOLDER ON THE JOINT EXCESSIVE HEAT AND SOLDER CAUSE PADS AND LEADS TO LIFT FROM THE CIRCUIT BOARD EXCESSIVE SOLDER IS THE PRIMARY CAUSE FOR BOARD SHORTS AND BRIDGED CONNECTIONS 50 PARTS INSTALLATION Install and solder the four signal diodes 1N914 or equivalent and clip the excess leads from the parts sure that black bands of the diodes are positioned to match the arrow points of the white legend of the circuit board PROTECT YOUR EYES WHEN YOU CLIP COMPONENT LEADS AFTER SOLDERING 1 In
93. m diskette into Drive A Do not lower the drive door but push the diskette into the drive far enough so that it locks into place the higher the drive door the easier for the diskette to lock into place Wait for the red LED on the diskette release button to flash on and off and when it goes off close the drive door The diskette will boot the next time the LED goes on 46 FAST REFERENCE FOR DJ2D DIP SWITCHES Power on jump UART Switch Switch off on on on e g 1 ADDR 15 selects 1 all off address 19 200 Baud 2 ADDR 14 bit if 2 246 s Baud Rate 3 ADDR 13 3 Selection off 4 ADDR 12 selects 41 1 SWl bit if SW Stop bits 5 ADDR 11 244 s 5 on z1 off z2 6 on 244 off 240 6 on Parity off no 7 on enables 7 7 bits off 8 8 on enables 8 on odd parity off zeven parity 4D 13D Setting for some paddles on SWl at 4D depend upon whether 74LS240 s or 74LS244 s are used in locations 5D and 6D oM x 7 X X X G X 6 47 ASSEMBLY INSTRUCTIONS WARNING IMPROPER ASSEMBLY OF THIS KIT WILL VOID THE WARRANTY READ THESE INSTRUCTIONS CAREFULLY BEFORE ATTEMPTING TO CONSTRUCT THIS KIT INVENTORY Make sure that all parts listed in the Parts List have been included Notify Thinke
94. m this sector is transfered to memory starting at the address specified by the most recent set DMA operation The length of this transfer is Programming Specification ROM Subroutines determined the length of the sectors on the current track The last two bytes of data on the sector are not read into memory These are the CRC check sum bytes and are used to detect data transfer errors The 1791 chip processes these bytes and then updates its status register The last operation that the routine performs is to place the status information in the A register and conditionally set the carry flag The details of these Status bits are illustrated below DREAD REGISTER A ERROR BITS 7 6 5 4 3 2 1 0 e NOT READY KNEW BAD DATA FORMAT a REQUEST LOST DATA ILLEGAL SECTOR RECORD NOT FOUND ERROR DWRITE The flow of logic for this routine is exactly the same as described above in the read data operation up to the point where the information transfer is to take place all the conditions for a data transfer as described above are satisfied a write sector command is issued to the 1791 controller and information is transfered from memory to the disk drive starting at the memory address specified by the most recent DMA operation This data is written the sector specified by the most recent set sector operation and the head is positioned over the track specified by the m
95. me to close the door is just AFTER the activity light has flashed Shortly after the door is closed the drive signals the controller that it is ready and a loader program on sector one of track zero is read into the Disk Jockey RAM When DBOOT is finished transfers control to this secondary loader 23 I O CONNECTORS Jl AND 22 Illustrated below are the details of the pin connections Jl and J2 are numbered In both illustrations is to the right of the drawing that all disk interface signals are active low RS232 GROUND RS232 INPUT RS232 OUTPUT TTY INPUT TTY INPUT OUTPUT TTY OUTPUT OY OU m DISK DATA WRITE PROTECT TRACK ZERO WRITE GATE WRITE DATA STEP DIRECTION DRIVE SELECT 4 DRIVE SELECT 3 DRIVE SELECT 2 DRIVE SELECT 1 SECTOR READY INDEX LOAD HEAD IN USE TWO SIDED 24 48 46 44 42 40 38 Cy FF FF E 3 39 3 3 89 M 39 0 C XR 3 N Ob 3 XR 39 39 XR B XR the top of the circuit board The end pins of both connectors on the silk screen legend of the PC board Note GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND PATCHES FOR CP M General This section is included for those users of the Disk Jockey 2D who have purchased a copy of CP M Vers 1 4 from a source OTHER than Thinker Toys Copies of CP M sold through Thinker
96. n k K k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k Iobyte allows selection of different I O devices It can be initialized in any way by changing the equate bellow Initial iobyte is currently defined as console tty reader tty punch tty list tty EQU 0 initial iobyte K k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k kk k The following equates reference the disk jockey 2d controller board If your controller is non standard then all the equates can be changed by re assigning the k value of ORIGIN to be the starting address of your controller K k k k k k k k k k k k k K k k k k k k k k k k k k k K k k k k k k kk k k k kk kk k k kk k ik ORIGIN EQU 0E900H disk jockey 2d beginning address INPUT EQU ORIGIN 3 serial input routine OUTPUT EQU ORIGIN 6 serial output routine TSTAT EQU ORIGIN 21H serial device status routine ACR EQU DH carriage return ALF EQU AH line feed COTTY EQU OUTPUT default character output CITTY EQU INPUT default character input k k K k k k k k k k k k k k k k k k k k k k k k k k k k k k k ke ke k kk kk k kk ke kk kk ck kk k kk ke
97. nd moves the read write head one track towards the center of the disk Step out command moves the head one track away from the center of the disk The numbering of the tracks is arranged so that track zero 15 the farthest from the center of the disk One of the responsibilities of the Western Digital 1791 controller is to know the current track number over which the read write head 15 located and to calculate how many step in or step out commands are necessary to move the head to a desired new track i Once the read write head has been moved to the desired track the rotation of the disk will move a circle of magnetic material beneath the head Within this circle of material data 15 recorded distinct regions called sectors The sector is the smallest amount of information that can be separately read from or written to the disk There are three different sector formats that currently supports The table below details the relationship between the size of a sector and the number of sectors that can fit on a single track bytes of data per sector sectors per track SINGLE DENSITY 128 26 256 15 512 8 DOUBLE DENSITY 256 26 512 15 1024 l 8 In the header field which preceeds the data field of sector the track number the side the sector number and the sector length are recorded During read or write commands this header is read before data transfers take place
98. ngth of the terminal and controller so that they match Step XVIII Inspect the diskette which was removed in step XVI Be sure that the write protect notch is NOT covered Insert the diskette in the drive once again Initialize the CPU S program counter to 340 0000 EZZOH and start the machine After a few seconds the terminal should print 16K CP M VERS 1 4 After a few more seconds the prompt should appear A gt A Disk Jockey version of CP M is now up and running After this new version of CP M has been tested as documentated in the CP M manual Steps I through XVII can be used to alter the original CP M diskette if desired f 29 HARDWARE LEVEL REGISTERS Users desiring greater level of control over the floppy disk or serial interface may wish to refer directly to the I O device registers on the DJ from their 8080 280 program There are thirteen one byte registers five of them read only five write only and three read write The registers have eight memory addresses on the 5 100 bus with a different register being selected during a read operation and a write operation when the addressed register is read only or write only The 1791 controller comprises one of the read only registers status register write only register command register and all three of the read write registers track sector data registers uses of these registers will be touched only briefly here as there is include
99. on taken If the value in C is between zero and three this data is written in the Disk Jockey RAM at the location specified by the label DISK The carry flag is cleared and the routine returns to the calling program Double sided floppy disk drives have two read write heads so that information can be stored and retrieved from both sides of the diskette The two heads Programming Specification ROM Subroutines SETDEN TKZERO positioned so that they are both on the same track one directly below the other They also share common read write electronics Therefore only one of these heads can be selected at a time Bit 0 of the register 15 used to select which of the two heads on double sided drive will be used during the next disk transfer operation A zero in bit 0 will select the bottom head and l will select the top head Selecting side and selecting a disk are independent operations If side zero is selected then regardless of the disk Selected side zero will always be accessed until SETSID is called Finally if the selected disk is single sided side zero will always be selected regardless of the results of the SETSID routine The 1791 Floppy Disk Controller operates in two modes single density FM Frequency Modulation mode or double density Modified Frequency Modulation mode Bit 0 of the C register determines what density the 1791 will be operating in when the next disk transfer operation is
100. or red yellow brown 330 Ohm 1 4 watt 5 resistors orange orange brown 470 Ohm 1 4 watt 5 resistors yellow purple brown 750 Ohm 1 2 watt 5 resistors purple green brown lk Ohm 1 4 watt 5 resistors brown black red 1 5k Ohm 1 4 watt 5 resistor brown green red 3 3k Ohm 1 4 watt 5 resistors orange orange red 4 7k Ohm 1 4 watt 5 resistors yellow purple red 5 36k Ohm 1 8 watt 1 resistors These two parts replace the 6 19k 1 resistors which appear on the parts legend of the circuit board lk Ohm 1 4 watt 5 resistors brown black orange 11 0k Ohm 1 8 watt 1 resistor This part replaces 13 0 1 resistor which appears on the parts legend of the circuit board 27k Ohm 1 4 watt 5 resistors red purple orange 47k Ohm 1 4 watt 5 resistors yellow purple orange 1 Megohm 1 4 watt 5 resistors brown black green 180 Ohm 1 8 watt 5 9 resistor array 3 3k Ohm 1 8 watt 5 9 resistor SIP array 33 picofarad 5 silver mica capacitors Two of these parts replace the 100 picofarad capacitors which appear on the parts legend of the circuit board 47 picofarad 2 or 1 silver mica capacitors 112 picofarad 2 or 1 silver mica capacitor 470 picofarad 5 silver mica capacitor 001 microfarad disk capacitor 01 microfarad mylar capacitor 37 DJ2D Revision 4 Parts List J 19 LI 1 a a 2 a 4 O 4 1 E 1 2 ti 4 a 1 1 1 E 2 D 2 a 1 1 15 1 16 5 La 4 ta 2 1 5 microfarad dipped tantalum capac
101. or the DJ WORD LENGTH SELECTION SW2 7 WORD LENGTH on 7 BITS off 8 BITS 42 Serial I O Switch Settings STOP BIT COUNT SW2 5 controls the number of stop bits either one or two which the UART sends after each data word The off position will set the device to two stop bits and the on position to one Most devices are extremely tolerant concerning stop bit setting As general rule if a device fails to communicate with the Disk Jockey it is not because the stop bit setting is incorrect STOP BIT COUNT SELECTION SW2 5 STOP BIT COUNT 1 STOP BIT off 2 STOP BITS PARITY If paddle 6 of switch 2 is in the off position the UART will not generate any parity bits at the end of the serial word If the paddle is in the on position refer to the table below for the proper parity setting via paddle 8 PARITY SWITCH SETTING SW2 8 PARITY on ODD PARITY off EVEN PARITY 43 POWER ON JUMP TABLE WITH 74LS248 S 5D AND 6D REV 3 BOARDS SHOULD USE 244 S ONLY PADDLE 6 OF SWI TO off FOR 74LS24 S SET PADDLE 7 OF SWI1 TO on TO ENABLE POWER ON JUMP 5 1 is the switch to the LEFT JUMP ADDRESS SWITCH SETTING Octal Hex SW1 1 SW1 2 SW1 3 SW1 4 SW1 5 A15 A14 A13 A12 A11 000 000 0000 off off off off off 010 000 0800 off off off off on 020 000 1000 off off off on off 03
102. ore the Disk Jockey can correctly transfer data to or from the floppy disk drive this bit must be zero so that the CPU can synchronize its data transfers to the 1791 controller When this bit is a one the DJ board will read write data to and from the disk in single density When this bit is a zero reads and writes performed in double density 34 Hardware level registers HD0 HD1 These two bits control the loading of the read write head Their functional character is detailed in the table below HD1 Read write head function 0 10 not ailowed 6 1 head is loaded 1 9 head is unloaded 1 1 1791 may unload head Register 3 Not currently used Location 343 373 E3FB hex standard Disk Jockey Register 4 1791 controller command register Location 343 374 hex standard Disk Jockey This is the command register of the 1791 controller There are four different classes of commands and within each class there a number of separate commands that the controller execute See the 1791 data document for a detailed discussion of this register and its use READ WRITE REGISTERS Register 5 1791 track register Location 343 375 E3FD hex standard Disk Jockey The 1791 controller uses this register as a reference to where the read write head of the disk drive is positioned Extreme care should be exercised when writing in thi
103. oriented in the place of 283904 and vice versa The black band at one end of the diodes marks the cathode and should correspond to the white arrow point on the legend of the circuit board Placing the 58 pin flat cable connector Jl upside down is disaster The angled pins should go through the circuit board Only the longer straight pins are long enough to accept the ribbon cable to the disk drive The I O connector J2 should be positioned so that the longer angled pins point toward the top of the board while the shorter straight pins go through the circuit board 49 Assembly Instructions EXAMINE THE BOARD Visually examine the circuit board for any trace opens or shorts concentrated five minute scrutiny will uncover most trace defects Several hours of scattered unconcentrated scrutiny generally won t reveal anything Take special care that no shorts or opens exist on those areas of the circuit board that will be covered by IC sockets Ohm out any suspicious looking traces for either shorts or discontinuity as appropriate Return immediately any bare board found to be flawed Such boards will be replaced under warranty SOLDERING AND SOLDER IRONS The most desirable soldering tool for complex electronic kits is constant temperature iron with an element regulated at 650 degrees F The tip should be fine so that it can be brought into close contact with the pads of the circuit board Such irons are available fro
104. ost recent seek operation As the controller writes data on the disk it is continually computing two CRC check sum bytes After the last byte of data has been written on the diskette the two check sum bytes are appended to the sector by the controller for later use when the sector is read back into memory As with the read operation the controller updates its Status register after the last CRC byte has been written on the diskette These status bits are placed in the A register just before control is returned to the calling program The carry flag is conditionally set from these bits The details of this status information can seen below 10 Programming Specification ROM Subroutines DWRITE REGISTER A ERROR BITS 7 6 5 4 32 7 2 1 0 kol NOT READY BAD DATA FORMAT WRITE PROTECTED DATA REQUEST LOST DATA ILLEGAL SECTOR RECORD NOT FOUND CRC ERROR DBOOT Branching to this routine will initiate a bootstrap load DMAST STATUS operation from the floppy disk 128 bytes of data will be read single density mode into the first half of the 3rd of the Disk Jockey RAM normally 340 0000 or 000 The bootstrap routine terminates with a branch to the first location of this block Typically sector 1 of track zero will contain another bootstrap program whose job it is to load a Disk Operating System DOS such as Disk ATE or CP M If the bootstrap read is not successful control
105. r Toys immediately if any are missing Also quickly return all extra parts USE BENDING BOARD With the exception of the axial tantalum capacitors and the 1 2 watt 750 Ohm resistors 11 the resistor and diode leads should be bent to 5 inches The leads of the 758 Ohm resistors Should have spacing of 6 inches The axial lead tantalum capacitors should be bent to 7 inches Use of a bending block will give your finished kit a more professional look USE SOCKETS Sockets are provided for every IC on the Disk Jockey NO REPAIR WORK WILL BE ATTEMPTED ON ANY RETURNED BOARD WITH ANY IC SOLDERED DIRECTLY TO THE CARD ev s ame s ORIENTATION When this manual refers to the bottom of the circuit board it means the side with the gold S 100 edge connectors Right and left assume a view from the component side of the board which has the silk screen legend All IC sockets will either have their pins numbered or have a 45 degree angle across the corner of pin On the Disk Jockey all sockets and all IC s have pin 1 closest to the bottom right corner of the board 48 Assembly Instructions tantalum capacitors are polarized The dipped tantalum cap has a red dot at its positive lead This lead should be inserted the bottom of the oval legend where the sign 15 located The 1 8 microfarad capacitor s positive lead is identified by a circular tit where it enters the body of th
106. r bit mask no error 1791 control reg flip the density bit update and change density dec retry count and try agaln there is a hard seek error number of retrys D DATREG data register li TRACK 1 storage area CMDREG D M A L RHL1 H CSTAT BUSY A CHKSEC B RHLOOP SERROR B 9 do the read header command get a data byte store in memory inc mem pointer test for more data wait for 1791 to finish test for errors transfer OK dec retry count test for hard error get the sector size and setup the offset H STABLE sec size tbl 342 322 342 323 382 326 342 327 342 330 312 332 342 333 338 342 335 312 310 312 313 342 353 382 384 342 315 342 346 342 317 342 350 342 353 342 353 342 358 342 355 342 356 342 357 342 357 382 362 342 363 382 364 342 365 342 366 342 367 342 370 392 371 342 372 392 371 342 375 343 000 343 001 34 3 003 383 004 343 005 34 3 006 343 011 34 3 012 343 013 343 016 343 017 343 020 343 021 343 022 34 3 023 344 028 343 027 34 3 030 18 3 031 383 032 343 038 011 072 107 206 076 330 341 170 062 041 015 124 135 370 051 303 345 345 360 367 041 116 043 161 043 173 211 176 066 043 312 345 026 102 031 031 072 167 043 021 032 167 341 011 011 176 062 043 176 022 076 370 020 376 100 383 353 004
107. r have Significance The meaning of these bits is presented below The 1602 data sheet should be referred to for a more detailed discussion of these bits We shall list these signals using 30 Hardware level registers their positive logic mnemonics with the understanding that the actual signals read will be the negation of these mnemonics INVERTED UART STATUS BITS 4 3 2 1 0 FE PE TBRE DR FE Framing Error TBRE Transmitter Buffer Register Empty Data Ready Overrun Error Parity Error REGISTER 2 Disk Jockey status register Location 343 372 E3FA hex standard Disk Jockey This register contains bits that identify the current status of the Disk Jockey and the currently selected drive Only the Six low order bits have any significance in this register The meanings of these bits are presented below DISK JOCKEY STATUS REGISTER 5 4 3 2 0 NREADY INTRO NINDEX DATARQ N2SIDED HEAD Bits marked with an asterisk reflect the current state of the status lines from the currently selected floppy disk drive For a detailed specification of these signals see the documentation that accompanys the floppy disk drive If no drive is currently selected or if the head is not loaded these bits are all high NREADY This bit is a 0 when the currently selected drive is powered up with a diskette in place and the door closed NINDEX This line reflects the
108. rator If everything is OK power down and proceed to the next step IC INSERTION If IC insertion tool is not available leads should be straightened ROW at time not by the individual PIN edge of a straight sided table is an excellent device for this operation Hold the IC by the plastic case place one row of legs against a flat surface and push very slightly Repeat with the opposite row Continue this procedure until the legs of the IC can be inserted with minimum effort into its socket When inserting an IC into its socket take care that you DO NOT BEND THE IC S LEGS UNDERNEATH ITS PLASTIC PACK This is an extremely common error and can escape even a fairly careful visual inspection 55 Parts Installation If pins become bent under during insertion use a long nose pliers to straighten them and try again When removing IC from its socket use IC remover IC test clip another must for any electronics shop or a miniature screw driver DO NOT ATTEMPT TO REMOVE AN IC WITH YOUR FINGERS You will bleed on severely bent pins Once all IC s have been inserted re check for bent pins Then check twice for proper orientation Upside down IC s are generally destroyed upon power up IF FOR ANY REASON BECOMES NECESSARY TO REMOVE COMPONENT WHICH HAS BEEN SOLDERED TO THE CIRCUIT BOARD CLIP LEADS BEFORE REMOVING THIS WILL REDUCE THE CHANCE OF LIFTING PADS OFF TRACES
109. rnative specimen which does not implement I O byte Both source files are amply commented It should be noted that to retain the file TTUSER as the actual I O driver after a MOVCPM command only the EQUATE labeled MSIZE need be changed in the edit prior to re assembly However after re assembly the PRN file of TTUSER should be examined in order to find the new OFFSET variable which will be needed in order to overlay the driver onto the new CP M system A simple MOVCPM N command will create a new CP M of N K size with only the console driver implemented Thus no overlay is necessary if the only device CP M is to be aware of is the console terminal RECONFIGURING A SYSTEM Once the USER or TTUSER file has been edited and re assembled the following procedure may used to incorporate the new drivers into CP M Note the OFFSET of the new CP M from the PRN file of USER or TTUSER Type MOVCPM N where N represents the memory size in kilobytes The smallest CP M size is 17K Type SAVE 35 CPMN COM with as above Type DDT CPMN COM with N as above Type IUSER HEX or ITTUSER HEX Type ROFFSET where OFFSET is the value obtained from the PRN file USER or TTUSER For a 24K system one would type RC380 for a 32K System RA380 etc Tm 750 Type control C SYSGEN CP M will request for the source drive Type Return the source for the new system is already in memory Type the destination dr
110. s in all six bits The specific funciton of the various bits is detailed below VCOFF CLRFDC AENBL SINGLE DISK JOCKEY FUNCTION REGISTER 5 4 3 2 1 SINGLE fou AENBL HDO _ CLRFDC This bit controls the voltage controlled oscillator VCO written in this bit will turn the VCO off while a zero will turn the VCO on The VCO must be on to read data from the disk A one written in this bit will reset the 1791 controller The chip will remain in the reset state until this bit is changed to a zero When the reset Signal is removed the 1791 executes a restore seek to track zero During data transfers when the CPU references the 1791 5 data register the PREADY line 5 100 bus line 72 15 brought low which puts the processor in wait state The CPU remains in this state until the 1791 raises its DATA REQUEST line This mode of operation dispenses with the usual status test during data transfers and makes it possible for the Disk Jockey to run double density speeds without having to use DMA channel However there are times when the CPU needs access to this register when the DATA REQUEST is low before a seek command is issued for example When the AENBL bit is a one the stall logic that usually governs accesses to the 1791 s data register is disabled This allows the CPU to have access to this register as if it were a normal memory location However bef
111. s loads different symbol table from the disk overwrites the previously known symbols 5 Type BEGIN END The two parameters typed back represent the extent of ATE except for disk buffers Make a note of these two values also 6 Type GO FMT128 to format single density GO FMT256 to format double density with 256 byte sectors GO FMT512 to format double density 512 byte sectors GO 1024 to format double density 1024 byte sectors This loads and executes the desired format program The purpose of this routine is to write the standard sector header and data marks out on the disk and to put a bootstrap on track zero 2 7 The selected format program prompts the user through the necessary steps to format a diskette and automatically returns to Disk ATE when the operation is complete 8 IO2D and ATE must now be saved on the new diskette 1020 must be the first file on the disk ATE must be the second j 9 Using the values for SYSIO and IOEND obtained from step 3 above Type 5 IO2D SYSIO value here H IOEND value here H The H suffix 15 necessary to force ATE to interpret the preceding number as a hexidecimal number 10 Using the values for BEGIN and END obtained in step 55 Type S ATE BEGIN value here H END value here H 11 Disk ATE has now been copied on the fresh diskette Files may now be transferred from the original diskette as required Backing up other files Once 10 and ATE
112. s register If care is not exercised seek errors may likely occur See the 1791 data document for a more detailed discussion Register 6 1791 sector register Location 343 376 E3FE hex standard Disk Jockey This is the sector register of the 1791 controller Only one of the commands will cause the 1791 to write in this register Generally the 1791 uses this register to determine which sector is to be read or written See the 1791 data document for a more detailed discussion Register 7 1791 data register Location 343 377 E3FF hex standard Disk Jockey This 15 the data register of the 1791 controller Data 15 written into this register when the controller is writing to the disk Data is read from this register when the controller 15 35 Hardware level registers reading from the disk desired track number is also written in this register when seek commands are issued to the controller before the 1791 data document should be refered to for a more complete discussion FINAL NOTE The Disk Jockey firmware contains numerous examples illustrating the use of the hardware registers listed above comprehensive study of the two Western Digital data documents along with a careful examination of the Disk Jockey firmware will equip the interested user with enough knowledge to control the disk drive at the hardware level 36 DJ2D REVISION 4 PARTS LIST 5 x 10 printed circuit board 240 Ohm 1 4 watt 5 resist
113. sin residue Examine the circuit board carefully for shorts solder bridges or missed pins HOW TO FIND WHERE TO PLACE PARTS For parts placement please see the silk screened legend on the printed circuit board When placing IC s in their sockets which you should NOT do at this time be aware of the following deviations from or options to the IC numbers marked on the silk screened legend Where the silk screened legend calls for a 6 19 K resistor use a 5 36K precision resistor Where the silk screened legend calls for 13 0 K resistor use an 11 0 precesion resistor Though the silk screened legend says IP for the lower two Silver mica caps 33 picofarad caps should be used at these two locations Though the silk screened legend says LS240 at 5D and 60 74LS244 s may also be used here Only 248 5 should be used at 9D and 1001 Only 7404 should be placed in location B3 indicated the legend An LS part either a 74LS04 or a 74LS14 must not be substituted Location which which is marked 1500 should have 74LS132 741 500 With the exception of those parts listed above IC s may vary from those marked on the silk screened legend if they are listed as alternate IC s following a slash in the Parts List on pages 29 31 53 Parts Installation l DO NOT INSERT ANY IC S IN THEIR SOCKETS AT THIS TIME 54 Parts Installation INITIAL CHECK OUT AN
114. software which is supplied with the Disk Jockey is designed to let CP M run when eight inch full sized floppy disk is attached to the Disk Jockey controller that is plugged into an 5 100 main frame Patching CP M Before actually performing any of the steps below the Disk Jockey should be plugged into an 5 100 bus mainframe and an 8 disk drive should be connected to the controller Be sure to observe correct cable orientation You should have on hand two diskettes one with CP M and a blank one that has been formatted copy of CP M which will run on the Disk Jockey will constructed on the blank disk before any changes are attempted on the original CP M disk As a precaution the diskette with the CP M binary should have a write protect notch and this notch should NEVER be covered during the following steps Step I Plug in the controller Connect the disk to the controller turn on the the CPU and the disk drive Do NOT put a diskette in the drive at this time 26 Patches for CP M Step II Be sure the drive is on and the door is OPEN Initialize the CPU s program counter to 340 0000 and start the machine After several second delay the LED at the top of the controller should turn and the activity light if one is present on the front of the drive should flash briefly every several seconds Various memory locations in the Disk Jockey RAM are now initialized and the firmware is ready to perform disk tr
115. sses would conflict with some other device on the system bus PROM burned with non standard addresses can be substituted The DISK JOCKEY 2 D uses 2048 bytes of memory starting at 340 000 or EZZGH standard version The first 1016 bytes occupied PROM the next 8 bytes constitute the memory mapped I O and the last 1024 bytes contain the RAM buffer PROGRAMMING SPECIFICATIONS ROM JUMP TABLE Most users will wish to take advantage of the standard I O subroutines supplied in PROM on the DJ The user should branch to the appropriate address in a jump table in the first few words of the system ROM Since each subroutine ends with a RET instruction a CALL instruction should be used to branch to the subroutine The jump table contains jump instructions to the true address of the allows t within routines ROM In are then ADDRESS 3 6 9 12 A 15 A 18 A 21 A 24 A 27 A 39 A 33 A 36 A 39 A 42 A 45 A 48 utility routines within the ROM he individual routines to be updated and moved the ROM without having to change software that calls Let boards 340 0000 E OH STANDARD VALUE Octal 340 000 340 003 340 006 340 011 340 014 340 017 340 022 340 025 340 030 340 033 340 036 340 041 340 044 340 047 340 052 340 055 340 060 with Hex E909 E9903 E8606 2009 EBC EOOF 2012 E915 EO18 E 1B 1 E021 EO24 E8027 2 020 E239 SYMBOLIC VALUE
116. stall and solder all the 1 4 watt resistors in place Do this in sections so that the leads can be conveniently clipped Install solder and trim the leads of the 1 precision resistors 1 Install solder and trim the lead of the 1 751 Zener diode Be sure that the black band of the diode is to the left as indicated by the white arrow point Next install solder and trim the leads of the 758 Ohm 1 2 watt resistors 1 Install and solder the 40 pin sockets first then the 20 18 16 and 14 pin sockets in that order Finally install and solder the 8 pin socket By installing the sockets in this order smaller sized socket will never be placed in a larger sized position Install and solder the SIP resistor pack arrays The top pack should have its white dot to the right while the bottom packs will have their white orientation dots to the bottom of the circuit board Install and solder the 5 axial lead 1 8 microfarad capicators The top two have their leads to the right while the bottom three have their leads to the left Clip the excess leads from the parts Install solder and clip the leads of the two 39 microfarad caps The red band of these parts must point to the right Bend the leads of the 7812 and 7912 regulators skipping the 7805 s for now Placing a nut on top of the regulator insert a Screw from the bottom of the circuit board through the hole of the board and through the hole
117. status of the INDEX line from the floppy disk drive It goes to 0 once per revolution of the diskette N2SIDED This line is a 0 when a double sided drive is connected to the controller AND there is a double sided diskette in place in the drive with the door closed 31 Hardware level registers HEAD When this line is a 1 the head of the currently selected floppy disk drive is loaded DATARQ When this line is a 1 the data request line from the 1791 controller is high and the controller is requesting that its data register be read from or written to When the data register is referenced this line will change to a 0 INTRO The 1791 controller sets this line to a one whenever it has completed a command and is no longer busy This line is reset by a reference to the command register or the Status register of the 1791 controller Register 3 Not currently used Location 343 373 E3FB hex standard Disk Jockey Register 4 1791 controller status register Location 343 374 E3FC hex standard Disk Jockey This the status register of the 1791 controller The meaning of the bit patterns of this register varies depending upon the command that the controller is executing or has executed See the 1791 data document for a detailed discussion of this register WRITE ONLY REGISTERS Register 0 The inverted UART data input register location 343 370 E3F8 hex standard Disk Jockey Inverted data 15 stored is this register b
118. t trim excess bits move the bit to the side select bit position Save time out delay decrement test for count zero long NOP DBOOT 256 backward 0 jump instruction RAM 2 3140 31Q 3J 0NNQ head load time dma address read header fls 346 352 386 353 386 354 346 355 346 356 386 357 346 360 386 361 346 362 316 363 385 36 386 365 346 366 346 367 386 370 386 371 316 372 316 373 386 374 346 375 346 376 386 377 376 000 010 000 003 317 003 377 003 377 003 003 000 000 000 000 000 000 000 000 000 DRVSEL DISK CDISK TZFLAG DOPRAM DOTRK D1PRAM DITRK D2PRAM D2TRK D3PRAM D3TRK DCREG SIDE SECTOR TRACK TRKNO SIDENO SECTNO SECLEN CRCLO CRCHI drive select constant drive current drive track zero indicator drive 0 parameters drive 0 track no drive 1 parameters drive 1 track no drive 2 parameters drive 2 track no drive 3 parameters drive 3 track no current parameters new side select new seotor new track disk sector header data buffer INTRQ DATA RQ PAUSE UNTL A15 BOARD STATUS BUS SELECT CONTROL LOGIC PSYNC PDBIN MWRITE PUR Ap A9 ADDRESS BUFFERS 1 K BYTE ROM ROM SELECT fi TK BYTE RAM RAM SELECT WRITE DISK STATUS BUS DISK CONTROLLER TRI STATE HEAD LOADED STATUS BUFFER DATA RQ INTRQ STATUS SELECT TRI
119. tant do the home command track zero bit head ready error error flag test for sector zero error flag test for Sector too large save test for track too large Save 3413251 341 251 341 254 341 255 311 257 3 1 260 341 263 341 264 341 265 381 266 381 267 341 270 341 271 341 278 341 276 341 301 341 302 381 302 341 303 341 304 3443305 341 306 341 311 381 312 311 315 381 316 341 317 341 322 341 323 311 324 341 324 341 325 381 326 381 327 341 330 341 331 341 332 341 333 341 338 341 335 341 3180 341 3441 341 312 341 345 341 350 341 350 341 351 341 352 311 355 341 357 381 362 341 362 341 363 311 364 311 365 481 366 11 371 315 076 211 312 345 031 031 345 371 035 041 016 062 106 116 305 106 035 302 025 362 116 305 061 341 321 053 106 032 167 170 022 023 175 213 302 174 272 302 303 007 111 021 076 062 032 167 043 015 302 103 065 100 350 377 200 374 302 302 306 324 324 030 377 200 374 362 010 342 381 343 383 341 341 386 341 341 342 343 343 299 300 301 302 303 304 305 382 343 344 345 SINGLE 346 347 348 349 350 351 5 352 353 354 355 356 357 58 READ RLOOP ALOOP CALL POP MVI CMP PUSH DAD DAD PUSH SPHL DCR LXI MVI STA MOV MOV PREP H A 100Q
120. the circuit board 741 5240 octal tri state buffer 90 10 74LS240 244 tri state buffer 5D 6D 74LS365 74LS367 hex tri state buffer 10A 7D 8D 74LS366 74LS368 hex tri state inverter buffer 12 74366 74368 hex tri state inverter buffer 11B 13B 74390 741 5390 dual decade counter 1C 6300 6301 825129 745287 4 x 256 PROM 5 16331 741 5288 8 x 32 PROM 8A MM6353 829137 PB426 4 X 1024 PROM 8C 11C 2114 3L 4 X 1024 low power 300 5 static RAM 9 10 BR1941 2941 COM5016 dual baud rate generator 12D TR1602 UART 13D FD1791 dual density floppy disk controller 13A 39 DJ2D Revision 4 Parts List l 1458 4558 dual op amp 1 2 7885 monolithic 5 volt regulator 1 7812 monolithic 12 volt regulator 1 7912 monolithic 12 volt regulator 40 4 CABLE CONNECTIONS Drives on Discus systems are connected in daisy chain fashion to the controller board as illustrated below Optionall Optionall Optional Drive Controller Drive D Drive C Drive B Terminated an n on n am nan aw owe n oo aeaa As can be seen from the above figure Drive A is located at one end of the cable and is the only terminated drive on the cable The location of any additional drives on the cable is not important as long as they are not at the end of the cable Again extra drives are not terminated Aside from termination the only physi
121. trcller bcard If ycur centrcller is ncn standard then all the equates can be changed by re assigning the value cf ORIGIN tc be the starting address of ycur s ccntrcller 8 020 ORIGIN 050008 disk jeckey 2d beginning address 2023 INPUT EQU 08 214 gt 3 serial input rcutine 2095 OUTPUT EQU 98ISGIN 5 serial cutput rcutine 909 TKZERO EQU ORIGIN JH track seek rcutine 92 SEEK EQU ORIGIN ICH regular track seek rcutine EOQF SECTOR Fau 3RISINSJFH set sectcr rcutine 2012 DMA ESU ORIGIN 12H gread write beginning address set 015 DISKA QU SRISTIN 1SH disk read rcutine 218 DISK2 QU 981314134 disk write rcutine 2013 SELECT EQU ORIGINS IB disx selecticn reutine 021 TSTAT EQU GRIGIZ 21H sserial device status rcutine 25 5 EGU JRIZINeGEEH disk jeckey 2d ran area fcr beet enly 9579 SEKERR gad seek errcr bit mask VIFF RWERR 230 OF FR gread write errer bit 2323x 9222 ACR Ecu carriage return 29924 ALF ERI sline feed 252 s 25171 33 default character cutout fuss 2 CITTY 2 199 stefgult character input The jump table immediately belcw must nct be altered It ck tc make the jumps to cther address but the functicn perfermed must be the sane Lj KOC
122. urrently SWITCHBOARD serial port 1 tty currently assigned by intioby output to 2d crt currently SWITCHBOARD serial port 1 list device depends on bits 6 amp 7 of iobyte user console 1 currently SWITCHBOARD serial port 1 tty currently assigned by intioby output to 2d crt currently SWITCHBOARD serial port 1 line printer currently SWITCHBOARD serial port 1 user line printer 1 currently SWITCHBOARD serial port 1 the tty currently assigned by intioby output to 2d paper tape punch currently SWITCHBOARD serial port 1 user punch 1 currently SWITCHBOARD serial port 1 user punch 2 currntlly SWITCHBOARD serial port 1 SEFC SEFE 5 00 5 02 5F04 5F06 5F08 5F0A 5F0C 5F0E 5F10 5F12 5F14 5F14 5F14 5F14 5F14 lF5F lF5F lF5F 2B5F 335F 9E5E 335F 2B5F 335F 335F 335F 5F14 5F14 5F16 5F18 5F1B 5F1c 5F1E reader device input table RTBLE DW DW DW DW CSTBLE DW DW DW DW CITTY input CIPTR input CIUR1 input CIUR2 input console status table CSTTY status CSCRT status CSREADR status CSUC1 status status fromreader device CSRTBLE DW DW DW DW CSTTY Status CSPTR status CSUR1 status CSUR2 status from from from from of t from from from from from from of u tty currently assigned by intioby input from 2d paper tape reader currently SWITCHBOARD serial port 1 user reader 1 currently SWITC
123. xceeds the maximum number of sectors the transfer operation 15 aborted and error information is reported During disk transfer operations blocks of data are moved to and from the disk These blocks can be 128 256 512 or 1024 bytes long starting address of a data block that will be involved in the next disk transfer operation is specified by the B C register pair when the SETDMA subroutine is called Since the disk registers are memory mapped the firmware has been designed to try to protect them from being written into or read from during disk transfer operations Accordingly a bounds check is performed before the DMA address is recorded in the Disk Jockey RAM If 1024 byte data transfer to or from the disk would cause memory references to the 1 0 resgisters of the disk controller the carry flag is set and the routine returns with no action taken If the value of the B C pair is such that there could not any memory references to the last eight locations of the Disk Jockey ROM during a subsequent disk operation the contents of the B C pair are written into the memory location of the Disk Jockey RAM specified by the label DMAADR The carry flag is cleared and the routine ends The value of the C register determines which of 4 disk drives will be selected for the next disk transfer operation A bounds check is performed on C If the value in C is greater than 3 the carry flag is set and the routine returns with no acti
124. y the CPU for serial output by the UART The UART transfers the data from this register to an internal parallel load serial output register where the start bit optional parity bit and the stop bits are appended to the data Whenever the UART empties register 0 the TBRE status bit is raised to inform the CPU that it is possible to output more data to the UART Register 1 Disk Jockey drive control register location 343 371 E3F9 hex standard Disk Jockey This is a six bit register that is used by the Disk Jockey to select one of four drives select side one or two for double sided drives and to turn on and off the error flag LED built into the board near the serial connector J2 Only the low order Six bits of this register have any significance The meanings of these bits are presented below 32 Hardware level registers DRIVE CONTROL REGISTER 5 4 3 2 1 0 LED OFF I NDRIVEA SIDE 0 NDRIVEB NDRIVED NDRIVEC LED OFF When zero is stored in this bit the LED at the top of the board near 22 is turned on A one stored in this bit turns off the LED When a double sided drive is connected to the Disk SIDE Jockey a one stored in this bit selects head 0 while a zero selects head 1 When a single sided drive is connected to the Disk Jockey this bit has no effect on the drive NDRIVED When this bit is a zero and the head is loaded the fourth last drive is selected one written this bit w

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