MEN Mikro P511 Manual
Contents
1. in Differential pair of receive data lines chan nel 1 TX1 out Differential pair of transmit data lines channel 1 RX2 in Differential pair of receive data lines chan nel 2 TX2 out Differential pair of transmit data lines channel 2 MEN Mikro Elektronik GmbH 20P511 00 E1 2009 06 16 59 hes eee th tees Connecting the PMC Module 2 2 Host PCI Interface The P511 PMC supports the following signals of the 64 pin carrier board interface connectors Table 4 Pin assignment of 64 pin board to board connector Pn1 1 2 3 GND 4 INTA 5 INTB 6 INTC 7 3 8 5V 9 INTD 10 11 GND 12 13 PCI CLK 14 GND 15 GND 16 GNT O 17 REQ O 18 5V 19 20 ADIS1 21 AD 28 22 AD 27 23 AD 25 24 GND 25 GND 26 C BE 3 27 AD 22 28 AD 1 29 AD 19 30 5V 31 32 AD 7 33 FRAME 34 GND 35 GND 36 IRDY 37 DEVSEL 38 5V 39 GND 40 41 2 42 43 PAR 44 GND 45 46 AD 15 47 ADHA 48 AD 49 AD 9 50 45V 51 GND 52 C BE O K 53 AD 6 54 AD 5 55 AD 4 56 GND 57 58 AD 3 59 AD 2 60 AD 1 61 AD O 62 45V 63 GND 64 MEN Mikro Elektronik GmbH 19 20P511 00 E1 2009 06 16 Connecting the PMC Module 1 2 i 3 4 5 6 GND 7 GND 8 9 10 11 12 3 3V 13 RST 14 15 3 3V 16 z 17 18 GND 19 AD 30 20 AD 29 21 GND 22 AD 26 23 AD 24 24 3 3V 25 IDSEL O 26 AD 23 27 3 3V 28 AD 20 29 AD 18 30 GND 31 AD 162. precautions whenever you work on your computer Power down and unplug your computer system when working on the inside Hold components by the edges and try not to touch the IC chips leads or cir euitry Use a grounded wrist strap before handling computer components Place components on a grounded antistatic pad or on the bag that came with the component whenever the components are separated from the system Store the board only in its original ESD protected packaging Retain the original packaging in case you need to return the board to MEN for repair MEN Mikro Elektronik GmbH 8 20P511 00 E1 2009 06 16 About this Document About this Document AN This user manual describes the hardware functions of the board connection of peripheral devices and integration into a system It also provides additional information for special applications and configurations of the board The manual does not include detailed information on individual components data sheets etc A list of literature is given in the appendix History Issue Comments Date of Issue E1 First issue 2009 06 16 Conventions This sign marks important notes or warnings concerning proper functionality of the product described in this document You should read them in any case italics Folder file and function names are printed in italics bold Bold type is used for emphasis monospace A monospaced font type is used for hexadecimal numbers
3. uses a twisted pair cable with maximum lengths of 100 meters The cable is thinner and more flexible than the coaxial cable used for the 10Base 2 or 10Base 5 standards Since it is also cheaper it is the preferable solution for cost sensitive applications Cables in the 10Base T system connect with RJ45 connectors A star topology is common with 12 or more computers connected directly to a hub or concentrator The 10Base T system operates at 10 Mbits s and uses baseband transmission methods 3 3 6 100Base T The 100Base T networking standard supports data transfer rates up to 100 Mbits s 100Base T is actually based on the older Ethernet standard Because it is 10 times faster than Ethernet it is often referred to as Fast Ethernet Officially the 100Base T standard is IEEE 802 3u There are several different cabling schemes that can be used with 100Base T e g 100Base TX with two pairs of high quality twisted pair wires MEN Mikro Elektronik GmbH 25 20P511 00 E1 2009 06 16 Functional Description 3 4 GPIO The P511 provides six GPIO lines which can be used as debug outputs e g for timing measurement in real time Ethernet applications The lines are controlled via the 162034 GPIO IP core in the FPGA See Chapter 4 FPGA on page 27 The direction and state of each GPIO can be controlled and read by software MEN Mikro Elektronik GmbH 26 20P511 00 E1 2009 06 16 FPGA 4 FPGA The P511 is based on the USM conc
4. 33 z 34 a GPIO1 35 GPIO2 36 GPIOS 37 GPIO4 38 GPIO5 39 GPIO6 40 41 z 42 5 43 44 RX1 45 RX1 21 46 TX1 22 47 TX1 23 48 24 49 25 50 BO Bg Bg Bag BOA Bg GB BOA GB BOB BOA BOB Bg E E Bg Bag Bg Bg BOA GB Bg E E Bag E EB BBA MEN Mikro Elektronik GmbH 16 20P511 00 E1 2009 06 16 2 1 2 Conduction Cooled Version Optional Connecting the PMC Module Peripherals can only be connected via the 64 pin Pn4 rear I O on board connector Connector types 64 pin SMT plug connector according to IEEE P1386 Mating connector 64 pin SMT receptacle connector according to IEEE P1386 Table 2 Pin assignment of 64 pin plug connector Pn4 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 GND GND GND GPIO1 GPIO2 GPIOS GND GPIO4 GPIO5 GPIO6 GND GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 GND GND RX2 Rx2 TX2 TX2 GND GND GND RX1 RX1 TX1 TX1 GND GND MEN Mikro Elektronik GmbH 20P511 00 E1 2009 06 16 Table 3 Signal mnemonics Connecting the PMC Module Signal Direction Function GND Ground GPIO 6 1 in out General purpose input output lines 1 6 RX1
5. board MEN Mikro Elektronik GmbH 14 20P511 00 E1 2009 06 16 Getting Started 1 2 Integrating the Board into a System You can use the following check list to install the PMC on a carrier board for the first time and to test proper functioning of the board M Power down the system and remove the PMC carrier board M Install the PMC in a suitable front panel slot of the carrier board as described in the carrier board s user manual M Insert the carrier board into the system again E Power up the system If there is a system crash or other abnormal behavior at start up check if the PMC is plugged properly M You can now install driver software for the P511 1 3 Installing Driver Software For a detailed description on how to install driver software please refer to the respective documentation You can find any driver software available for download on MEN s website MEN Mikro Elektronik GmbH 15 20P511 00 E1 2009 06 16 Connecting the PMC Module 2 Connecting the PMC Module 2 1 Peripheral Interfaces 2 1 1 Standard Version Peripherals can only be connected via the 50 pin half pitch D Sub connector Connector types 50 pin half pitch D Sub receptacle with latch block 1 27 mm pitch Mating connector 50 pin half pitch D Sub plug with latch 1 27 mm pitch Table 1 Pin assignment of 50 pin HP D Sub front connector 1 26 27 28 RX2 29 RX2 30 TX2 31 TX2 s 32 z
6. however no responsibility is assumed for inaccuracies MEN will not be liable for any consequential or incidental damages arising from reliance on the accuracy of the circuit diagrams The information contained therein is subject to change without notice 3 Responsibilities of Recipient The recipient obtaining confidential information from MEN because of this Agreement is obliged to pro tect this information The recipient will not pass on the circuit diagrams or parts thereof to third parties neither to individuals nor to companies or other organizations without the written permission by MEN The circuit diagrams may only be passed to employees who need to know their content The recipient protects the confiden tial information obtained through the circuit diagrams in the same way as he protects his own confiden tial information of the same kind 4 Violation of Agreement The recipient is liable for any damage arising from violation of one or several sections of this Agreement MEN has a right to claim damages amounting to the damage caused at least to 100 000 5 Other Agreements MEN reserves the right to pass on its circuit diagrams to other business relations to the extent permitted by the Agreement Neither MEN nor the recipient acquire licenses for the right of lectual possession of the other party because of this Agreement This Agreement does not result in any obligation of the parties to purchase services or products fr
7. 2 1 DRAM System Memory ete Rm eR we 21 SPP MENS EFI Rn aE e 4s ene eames 21 3 3 Ethernet InterfdeeS cess Re ee Reg sees eas x EA os 21 323 1 Ethernet MAC Addresses 2 Locus secre eoe 22 3 3 2 Ethernet Status LEDS 2552 cag aden ong dau omg erem 22 33 39 ICONNECHON PVP D PET 24 3 34 General cinta Dewi Sore DR Hato eR Oque 25 3 39 ELI PL a a a ee ee 25 33 0 IODBaserR ern EUN PEU ENU ees 25 3 4 GPIO spresnenie eain Dae pud ce opu ae Slo ee 26 gucowe cem 27 4 1 FPGA Configuration Table rss ker eth He 28 5 Appendix ne Rr RR nen 29 54 PCI Confiputationi cer ea 29 5 2 Literature and Web Resources soe eme heme nr 29 5 3 Finding out the Board s Article Number Revision and Serial Number eb pb Ed De ae Ba S G ds 29 MEN Mikro Elektronik GmbH 11 20P511 00 E1 2009 06 16 Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 MEN Mikro Elektronik GnbH 20P511 00 E1 2009 06 16 Map of the board bottom view standard version 14 Map of the board bottom view optional conduction cooled version 14 Position of Ethernet status LEDs sus ERREUR 23 Block Diagram 4 2e CS 00a an heri pere ER es 28 Labels giving the board s article number revision and serial number 29 Tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 MEN Mikro Elektronik GnbH 20P511 00 E1 2009 06 16 Pin assignment of 50 pin HP D Sub fr
8. 20P511 00 E1 2009 06 16 P511 Dual Fast Ethernet PMC Configuration example User Manual man mikro elektronik gmbh n rnberg P511 Dual Fast Ethernet PMC P511 Dual Fast Ethernet PMC The P511 is a 32bit 33MHz PMC with dual Ethernet functionality The two channels can be accessed via two RJ45 connectors which are led to the front via an adapter cable from a SCSI connector They support half duplex and full duplex operation The PMC offers the possibility to buffer all receive and transmit Ethernet frames either in a local or in an external data buffer This makes it possible to provide a Worst Case Execution Time analysis which makes it particularly well suited for safety critical applications Up to 6 GPIO lines can be used on the module for additional functionality The P511 is based on the USM concept USM Universal Submodules make PMC modules more flexible than ever The Ethernet functionality is realized via an IP core implemented inside its on board FPGA This function can be changed at any time through implementation of different IP cores The corresponding line drivers are realized on the USM M which is simply plugged on the P511 One alternative function is the combination of an Ethernet core with a fieldbus interface to build gateways The module is suitable for any PMC compliant host carrier board in any type of bus system i e CPCI VME or on any type of stand alone SBC in telecommunic
9. 32 C BE 2 K 33 GND 34 35 TRDY 36 3 3V 37 GND 38 STOP 39 PERR 40 GND 41 3 3V 42 SERR 43 C BE 1 44 GND 45 ADM 46 AD 13 47 M66EN 48 AD 10 49 AD 8 50 3 3V 51 AD 7 52 53 3 3V 54 55 gt 56 GND 57 2 58 59 GND 60 61 62 3 3V 63 GND 64 Connector types of Pn1 and Pn2 64 pin SMT plug connector according to IEEE P1386 Mating connector 64 pin SMT receptacle connector according to IEEE P1386 MEN Mikro Elektronik GmbH 20 20P511 00 E1 2009 06 16 Functional Description 3 Functional Description 3 1 Power Supply Power supply to the logic part is done via the carrier board connectors Pn1 Pn2 The necessary voltages are 5V and 3 3V 3 2 Memory 3 2 1 DRAM System Memory The board is equipped with 32 MB soldered DDR2 SDRAM memory which is controlled by the FPGA The memory bus frequency is 132 MHz 3 2 2 Flash The board is equipped with 2 MB non volatile Flash controlled by the FPGA 3 3 Ethernet Interfaces The P511 provides two Fast Ethernet interfaces which are controlled via two MEN standard IP cores in the FPGA which are called 162087 ETH see Chapter 4 FPGA on page 27 They support full duplex operation and speed autonegotiation The Ethernet controllers can be configured in such a way that they can buffer all receive and transmit Ethernet frames in the host memory i e by transmitting the frames via bus master DMA over PCI or in the PMC local SD
10. 4 IDEPROM EEPROM controller MEN Mikro Elektronik GmbH 27 20P511 00 E1 2009 06 16 FPGA Figure 4 Block Diagram Wishbone Bus 162043 DDR2 SDRAM controller 162052 GIRQ 1 LED is used to Interrupt controller indicate correct FPGA configuration DDR2 SDRAM EEPROM Ethernet PHY Ethernet PHY 162084 IDEPROM ID EEPROM Controller 162034 GPIO GPIO controller 0 16Z001_SMB SMBus controller 16Z014 PCI PCI to Wishbone 162087 ETH Ethernet Controller Chameleon table V2 162087 ETH 162045 FLASH Ethernet Controller Flash interface Configuration CPLD 4 1 FPGA Configuration Table The resulting configuration table of the standard FPGA is as follows Table 9 FPGA Factory standard configuration table for P511 preliminary cro s eee Device Variant Hevisiornterrupt Group instance BAR Offset Size 1 1 3F Sees SU m 62001 SMB 1 X 0j 8 0 0 0 0 200 100 16209 GPIO 34 of 10 1 0 0 of oof 100 n c 1162084 iDEPROM 84 o 2 3r 0 0 of 400 100 16Z052 GIRO 52 o ef 3r ofl op o 500 100 rezoa SORTE gf af aro A ETH 8 of e aA o op f 9 opp 100 162088 ETH 8f o ef 53 ol afl 23 of 100 c co oO Fora detailed description of the IP Cores please see the respective IP Core reference manuals There might be ch
11. EN Mikro Elektronik amp ESMexpress and the MEN logo are registered trademarks of MEN Mikro Elektronik GmbH COM Express is a trademark of PCI Industrial Computer Manufacturers Group CompactPCI is a registered trademark of PCI Industrial Computer Manufacturers Group Microsoft and Windows are registered trademarks of Microsoft Corp Windows Vista is a trademark of Microsoft Corp PXI is a trademark of National Instruments Corp QNX is a registered trademark of QNX Ltd Tornado and VxWorks are registered trademarks of Wind River Systems Inc All other products or services mentioned in this publication are identified by the trademarks service marks or product names as designated by the companies who market those products The trademarks and registered trademarks are held by the companies producing them Inquiries concerning such trademarks should be made directly to those companies All other brand or product names are trademarks or registered trademarks of their respective holders Information in this document has been carefully checked and is believed to be accurate as of the date of publication however no responsibility is assumed for inaccuracies MEN Mikro Elektronik accepts no liability for consequential or incidental damages arising from the use of its products and reserves the right to make changes on the products herein without notice to improve reliability function or design MEN Mikro Elektronik does not assume any l
12. RAM memory The buffer memory host memory or PMC local SDRAM memory selection depends on the highest address bit of the Wishbone Bus This bit can be set in the Transmit Buffer Location Register TXBD_LOC and the Receive Buffer Location Register RXBD LOC of the 1672087 ETH IP core You can find a detailed description of these and the other registers in the IP core s Reference Manual When the highest address bit of these registers are set to 1 the frames are stored in the DDR2 memory When the highest address bits are 0 the frames are stored in the host memory MEN offers software which can control this function See MEN s website MEN Mikro Elektronik GmbH 21 20P511 00 E1 2009 06 16 Functional Description 3 3 1 Ethernet MAC Addresses The MAC addresses of the Ethernet interfaces are stored in an onboard EEPROM The unique MAC addresses are set at the factory and should not be changed Any attempt to change these addresses may create node or bus contention and thereby render the board inoperable The MAC addresses on the P511 are LANI 00 C0 3A 9C Cx xx LAN2 00 C0 3A 9C Dx xx where 00 CO 3A is the MEN vendor code and 9C is the MEN product code The last four digits depend on the interface and the serial number of the product The serial number is added to the offset for example for LANI e Serial number 0042 0x xx xx 0xC000 0x002A Ox CO 2A See also Chapter 5 3 Finding out the Board s Article Number
13. Revision and Serial Number on page 29 3 3 2 Ethernet Status LEDs There are three status LEDs for each Ethernet channel which show the connection speed whether a link is established and whether there is transmit or receive activity See Table 6 Ethernet status LEDs on page 22 for the functionality of the LEDs See Figure 3 Position of Ethernet status LEDs on page 23 for their position Table 6 Ethernet status LEDs LED Function Connection speed of Ethernet interface 1 Link status of Ethernet interface 1 Receive transmit activity of Ethernet interface 1 Connection speed of Ethernet interface 2 Link status of Ethernet interface 2 o c BR wo N Receive transmit activity of Ethernet interface 2 MEN Mikro Elektronik GmbH 22 20P511 00 E1 2009 06 16 Functional Description 6 5 4 LEDs for Ethernet 50 pin interface 2 HP D Sub SCSI2 connector 3 2 1 LEDs for Ethernet interface 1 MEN Mikro Elektronik GmbH 23 20P511 00 E1 2009 06 16 Functional Description 3 3 3 Connection The two Ethernet interfaces which are accessible at the 50 pin front connector can be led to two RJ45 connectors via an adapter cable which is provided by MEN See MEN s website for ordering information TA Connector types e Modular 8 8 pin mounting jack according to FCC68 Mating connec
14. anges in the table in the future MEN Mikro Elektronik GmbH 28 20P511 00 E1 2009 06 16 Appendix 5 Appendix 5 1 PCI Configuration The P511 has the following IDs on the PCI bus PCI Device ID 0x4D45 PCI Vendor ID 0x1172 Subsystem Device ID 0x5A14 Subsystem Vendor ID 0x006F e 5 2 Literature and Web Resources P511 data sheet with up to date information and documentation www men de products 15P511 html 5 3 Finding out the Board s Article Number Revision and Serial Number MEN user documentation may describe several different models and or hardware revisions of the P511 You can find information on the article number the board revision and the serial number on two labels attached to the board Article number Gives the board s family and model This is also MEN s order ing number To be complete it must have 9 characters Revision number Gives the hardware revision of the board Serial number Unique identification assigned during production If you need support you should communicate these numbers to MEN Figure 5 Labels giving the board s article number revision and serial number Complete article number 15P511 00 O Ng p 00 00 00 i 641517 Revision number Serial number MEN Mikro Elektronik GmbH 29 20P511 00 E1 2009 06 16 You can request the circuit diagrams for the current revision of the product described in this manual by completely filling out and signing the followi
15. ation industrial medical transportation or aerospace applications It offers long term availability for at least 10 years and is qualified for operation in the extended temperature range MEN Mikro Elektronik GmbH 2 20P511 00 E1 2009 06 16 Technical Data Technical Data Ethernet Interface Two 10 100Base T Ethernet channels Accessible on two RJ45 connectors via adapter cable Half duplex full duplex support Memory 32MB SDRAM memory Soldered DDR2 132MHz memory bus frequency FPGA controlled 2MB non volatile Flash For FPGA data and Nios firmware FPGA controlled GPIO Up to six lines controlled via software FPGA e Standard factory FPGA configuration Main bus interface Interrupt controller SMBus controller 167087 ETH Ethernet MAC IP core 2 IP cores for the 2 channels 162043 SDRAM SDRAM controller 1672045 FLASH Flash interface 1672034 GPIO GPIO controller The FPGA offers the possibility to add customized I O functionality See FPGA PMC Characteristics PCI Compliant with PCI Specification 2 2 32 bit 33 MHz 3 3V V I O Target and initiator Peripheral Connections Via front panel on a shielded 50 pin HP D Sub SCSI 2 receptacle connector Adapter cable to two RJ45 connectors included in the delivery Electrical Specifications solation voltage 1500 VAC Supply voltage power consumption 5V 3 5 0 2W 3 3V 5 5 0 46W MEN Mi
16. ept USM Universal Submodules make PMC modules more flexible than ever The functionality is realized via an IP core implemented inside its on board FPGA The corresponding line drivers are realized on the USM M which is simply plugged on the P511 The FPGA represents an interface between a configuration of I O modules IP cores and the PCI bus The PCI core included in the FPGA is a PCI target It can be accessed via memory single burst read write cycles The Wishbone bus is the uniform interface to the PCI bus The implementation contains basic system functions such as reset and interrupt control etc and the system library which are also IP cores A configuration table provides the information which modules are implemented in the current configuration Furthermore the revision the instance number one module can be instantiated more than one time the interrupt routing and the base address of the module are stored At initialization time the CPU has to read the configuration table to get the information of the base addresses of the included modules The factory FPGA configuration for the standard P511 comprises the following FPGA IP cores Main bus interface 1672024 01 Chameleon Chameleon V2 table 167087 ETH Ethernet controller 10 100Base T 2 cores 162052 GIRQ Interrupt controller 162045 FLASH Flash controller e 167034 GPIO GPIO controller 6 lines 1672043 SDRAM Additional SDRAM controller 167208
17. iability arising out of the application or use of the products described in this document Copyright 2009 MEN Mikro Elektronik GmbH All rights reserved s Please recycle Germany France USA MEN Mikro Elektronik GmbH MEN Mikro Elektronik SA MEN Micro Inc Neuwieder Stra e 5 7 18 rue Rene Cassin 24 North Main Street 90411 Nuremberg ZA de la Ch telaine Ambler PA 19002 Phone 49 911 99 33 5 0 74240 Gaillard Phone 215 542 9575 Fax 49 911 99 33 5 901 E mail info men de www men de Phone 33 0 450 955 312 Fax 33 0 450 955 211 E mail info men france fr www men france fr Fax 215 542 9577 E mail sales menmicro com www menmicro com MEN Mikro Elektronik GmbH 10 20P511 00 E1 2009 06 16 Contents Contents 1 Getting Started su 2 u XUL ORI RD OR ire dena 14 LI Map Of the Board 245i sudo 21120 21a 14 1 2 Integrating the Board into a System 0 000 4 15 1 3 Installing Driver Sollware sus cx boddane rrien ac 15 2 Connecting the PMC Module eeeeeeeeen ernennen 16 2 1 Peripheral Interfaces esses ee nr RR hRSRPRL tenie R hdd 16 2 1 1 Standard Version uou ow unse 16 2 1 2 Conduction Cooled Version Optional 17 2 2 Host POMME s ensaes seien nie dau gine T9 3 Functional Description 0 ccc ccc ccc cece cece eee nn 21 3 1 Power Supplys 43 tine iu 54 RR ana d oan a 21 3 2 Memory ora e od a anna odd les ates ges rte dentaba ca rpg d 21 3
18. kro Elektronik GmbH 3 20P511 00 E1 2009 06 16 Technical Data Mechanical Specifications Dimensions conforming to IEEE 1386 1 Weight 78g Environmental Specifications Temperature range operation 40 85 C qualified components Airflow min 1 0m s Temperature range storage 40 85 C Relative humidity operation max 95 non condensing Relative humidity storage max 95 non condensing Altitude 300m to 3 000m Shock 15g 11ms Bump 10g 16ms Vibration sinusoidal 1g 10 150Hz Conformal coating on request MTBF tbd 40 C according to IEC TR 62380 RDF 2000 Safety PCB manufactured with a flammability rating of 94V 0 by UL recognized manu facturers EMC Conforming to EN 55022 radio disturbance IEC1000 4 2 ESD and IEC1000 4 4 burst Software Support Windows in preparation Linux T e For more information on supported operating system versions and drivers see online data sheet MEN Mikro Elektronik GmbH 4 20P511 00 E1 2009 06 16 Block Diagram Block Diagram Adapter cable to two RJ45 Connectors Ethernet PHY Ethernet MAC Transceivers Layer 50 pin front connector PCI Interface 32 bit Memory 33 MHz Controller MEN Mikro Elektronik GmbH 5 20P511 00 E1 2009 06 16 Configuration Options Configuration Options CPU Nios soft core implementation possible e g for real time Ethernet Rear I O Via Pn4 rear I O con
19. listings C function descriptions or wherever appropriate Hexadecimal numbers are preceded by Ox hyperlink Hyperlinks are printed in blue color The globe will show you where hyperlinks lead directly to the Internet so you can look for the latest information online IRQ Signal names followed by or preceded by a slash indicate that this signal is IRQ either active low or that it becomes active at a falling edge in out Signal directions in signal mnemonics tables generally refer to the corresponding board or component in meaning to the board or component out meaning coming from it MEN Mikro Elektronik GmbH 9 20P511 00 E1 2009 06 16 About this Document Legal Information MEN Mikro Elektronik reserves the right to make changes without further notice to any products herein MEN makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does MEN assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters can and do vary in different applications All operating parameters including Typicals must be validated for each customer application by customer s technical experts MEN does not convey any license under its patent rights nor the rights of others Unless agreed otherwise MEN products are no
20. nector Cooling Conduction Cooling Please note that some of these options may only be available for large volumes Please ask our sales staff for more information For available standard configurations see online data sheet d MEN Mikro Elektronik GmbH 6 20P511 00 E1 2009 06 16 FPGA Flexible Configuration This MEN board offers the possibility to add customized I O functionality in FPGA t depends on the board type pin counts and number of logic elements which IP cores make sense and or can be implemented Please contact MEN for informa tion on feasibility Youcan find more information on our web page User I O in FPGA FPGA Capabilities FPGA Altera Cyclone II EP2C35 33 216 logic elements 483 840 total RAM bits Supports Nios II soft processor Connection Functions can be linked to Wishbone or Avalon bus Available pin count 46 pins FPGA to USMTM Functions available via USM at front I O connector MEN offers a USM development kit and an FPGA Development Package as well as Flash update tools for different operating systems MEN Mikro Elektronik GmbH 7 20P511 00 E1 2009 06 16 Product Safety Product Safety A Electrostatic Discharge ESD Computer boards and components contain electrostatic sensitive devices Electrostatic discharge ESD can damage components To protect the board and other components against damage from static electricity you should follow some
21. ng non disclosure agreement Please send the agreement to MEN by mail We will send you the circuit diagrams along with a copy of the completely signed agreement by return mail o MEN reserves the right to refuse sending of confidential information for any reason that MEN may consi mikro elektronik der substantial gmbh n rnberg Non Disclosure Agreement for Circuit Diagrams provided by MEN Mikro Elektronik GmbH between MEN Mikro Elektronik GmbH Neuwieder Stra e 5 7 D 90411 N rnberg MEN and Recipient We confirm the following Agreement MEN Recipient Date Date Name Name Function Function Signature Signature MEN Mikro Elektronik GmbH Neuwieder Strafe 5 7 90411 N rnberg Deutschland The following Agreement is valid as of the date of the MEN signature Tel 49 911 99 33 5 0 Fax 49 911 99 33 5 901 E Mail info 9 men de Non Disclosure Agreement for Circuit Diagrams page 1 of 2 www men de 1 Subject The subject of this Agreement is to protect all information contained in the circuit diagrams of the follo wing product A Article Number filled out by recipient MEN provides the recipient with the circuit diagrams requested through this Agreement only for informa mikro elektronik tion gmbh n rnberg 2 Responsibilities of MEN Information in the circuit diagrams has been carefully checked and is believed to be accurate as of the date of release
22. om the other party 6 Validity of Agreement The period after which MEN agrees not to assert claims against the recipient with respect to the confi dential information disclosed under this Agreement shall be months filled out by MEN Not less than twenty four 24 nor more than sixty 60 months 7 General If any provision of this Agreement is held to be invalid such decision shall not affect the validity of the remaining provisions and such provision shall be reformed to and only to the extent necessary to make it effective and legal This Agreement is only effective if signed by both parties Amendments to this Agreement can be adopted only in writing There are no supplementary oral agree ments This Agreement shall be governed by German Law MEN Mikro Elektronik GmbH The court of jurisdiction shall be Nuremberg Neuwieder Strafe 5 7 90411 N rnberg Deutschland Tel 49 911 99 33 5 0 Fax 49 911 99 33 5 901 E Mail info 9 men de Non Disclosure Agreement for Circuit Diagrams page 2of2 www men de
23. ont connector 16 Pin assignment of 64 pin plug connector Pn4 17 Signal MNEMONIC een 18 Pin assignment of 64 pin board to board connector Pnl 19 Pin assignment of 64 pin board to board connector Pn2 20 Ethernet status LEDS 222r ti eo nicat aan 22 Pin assignment of the 8 pin RJ45 Ethernet 10Base T 100Base T CONHESIOFS ica veio areas Team ERR S 24 Signal mnemonics for Ethernet 10Base T 100Base TX interface 24 FPGA Factory standard configuration table for P511 preliminary 28 Getting Started 1 Getting Started This chapter gives an overview of the board and some hints for first installation in a system 1 1 Map of the Board Figure 1 Map of the board bottom view standard version zu Bl 6 5 4 LEDs for Ethernet 50 pin interface 2 HP D Sub SCSI2 UV PCI bus connector 3 2 1 SS connectors LEDs for Ethernet Pn1 Pn2 interface 1 H FPGA Ll 2 D Components marked in gray are located on the top of the board Figure 2 Map of the board bottom view optional conduction cooled version ESI a Pni Pn2 6 5 4 LEDs for Ethernet interface 2 amp PCI bus connectors 18 2 1 LEDs for Ethernet 4 interface 1 FPGA Pn4 Components marked in gray are located on the top of the
24. t designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the MEN product could create a situation where personal injury or death may occur Should Buyer purchase or use MEN products for any such unintended or unauthorized application Buyer shall indemnify and hold MEN and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that MEN was negligent regarding the design or manufacture of the part Unless agreed otherwise the products of MEN Mikro Elektronik are not suited for use in nuclear reactors or for application in medical appliances used for therapeutical purposes Application of MEN products in such plants is only possible after the user has precisely specified the operation environment and after MEN Mikro Elektronik has consequently adapted and released the product ESM ESMini MDISTM MDIS4 MENMON M Module M Modules SA Adapter SA Adapters UBox USM and the MBIOS logo are trademarks of MEN Mikro Elektronik GmbH PC MIP is a registered trademark of MEN Micro Inc and SBS Technologies Inc M
25. tor Modular 8 8 pin plug according to FCC68 Table 7 Pin assignment of the 8 pin RJ45 Ethernet 10Base T 100Base T connectors 1 TX 2 TX 3 RX 4 a 6 RX 7 8 Table 8 Signal mnemonics for Ethernet 10Base T 100Base TX interface Signal Direction Function RX in Differential pair of receive data lines TX out Differential pair of transmit data lines MEN Mikro ElektronikGmbH 24 20P511 00 E1 2009 06 16 Functional Description 3 3 4 General Ethernet is a local area network LAN protocol that uses a bus or star topology and supports data transfer rates of 100 Mbits s and more The Ethernet specification served as the basis for the IEEE 802 3 standard which specifies the physical and lower software layers Ethernet is one of the most widely implemented LAN standards Ethernet networks provide high speed data exchange in areas that require economical connection to a local communication medium carrying bursty traffic at high peak data rates A classic Ethernet system consists of a backbone cable and connecting hardware e g transceivers which links the controllers of the individual stations via transceiver transmitter receiver cables to this backbone cable and thus permits communication between the stations 3 3 5 10Base T 10Base T is one of several adaptations of the Ethernet IEEE 802 3 standard for Local Area Networks LANs The 10Base T standard also called Twisted Pair Ethernet
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