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PCISA-MARK User Manual

1. 109 List of BIOS Menus BIOS Menu 1 AwardBIOS CMOS Setup Utility 110 BIOS Menu 2 Standard CMOS Features ie 112 BIOS Menu 3 IDE Primary Master ie 115 BIOS Menu 4 Advanced BIOS Features sese 118 BIOS Menu 5 Advanced Chipset 127 BIOS Menu 6 Integrated 136 BIOS Menu 7 Power Management Setup eese 144 BIOS Menu 8 Power 148 BIOS Menu 9 Wake Up Events KAKA KA KA KAKA 151 BIOS Menu 10 IRQs Activity Monitoring 155 BIOS Menu 11 PnP PCI Configurations 2 156 BIOS Menu 12 IRQ 158 BIOS Menu 13 159 BIOS Menu 14 PC Health Status rie 161 BIOS Menu 1
2. 94 4 5 PERIPHERAL DEVICE CONNECTION 96 4 5 1 IDE Disk Drive Connectors 96 4 5 2 COMI COM2 15 232 Serial Port Installation i 98 4 5 3 LCD Backlight Installation 98 LEE Nu der ccs NE 98 4 5 5 TFT LVDS LCD Installation ewe 98 4 5 6 TFT TTL LCD Installation CT 99 MIP SET TUN GS o rrr 99 4 6 1 CF Card 101 4 6 2 Clear CMOS inline 101 4 6 3 Flat Panel Power rilievo 102 4 6 4 PCI VIO Voltage Select i 103 4 7 INSTALLING A COMPACT FLASH CARD 103 4 8 INSERTING THE CPU CARD lea 104 4 9 REAR PANEL CONNECTORS 105 4 9 1 Keyboard and Mouse 201111618011 105 4 9 2 Ethernet Connection 105 49 3 USB Connection 105 4 9 4 VGA Port Installation PRI 105 uniti 001010101018 107 5 INTRODUCTION M 108 SEM TT UN 108 3 1 2 Using SOD Tr 108 AE III 109
3. 86 Figure 4 1 DIMM Module 95 Figure 4 2 Connection of 44 Pin 97 Figure 4 3 Connection of 40 Pin Connector eese 97 Figure 4 4 Jumper Locations ini 100 Figure 4 5 CompactFlash Card ettet 104 Figure 6 1 Access the 1 4in1 nnn 167 Figure 6 2 Setup Utility 167 Figure 6 3 Chipset Driver Installation Welcome Screen 168 Figure 6 4 Readme Information KAKA A 169 Figure 6 5 Chipset Driver Installation 170 Figure 6 6 Driver Selection 171 Figure 6 7 VIA PCI IDE Bus Driver 172 Figure 6 8 AGP Driver Selection eese 173 Figure 6 9 Restart the Co
4. 66 Figure 3 15 Parallel Port Connector Location 67 Figure 3 16 Power Button Connector Location 69 Figure 3 17 Power Connector 70 Figure 3 19 PS ON Signal Connector Location essen 72 Figure 3 20 Reset Button Connector Location essen 74 Figure 3 21 55 232 Serial Port Connectors Location 76 Figure 3 23 SATA Drive Connector Locations 77 Figure 3 24 TFT LCD TTL Connector 78 Figure 3 25 8 pin USB Connector Location esee 81 Figure 3 26 External Peripheral Interface Connector Panel 82 84 Figure 3 27 RJ 45 Ethernet Connector Figure 3 28 Mini DIN 6 25 2 Connector KAKA 85 Figure 3 29 VGA Connector
5. essent 43 Figure 3 4 Battery Connector Location essent 45 Figure 3 5 Compact Flash Connector Location 0 46 Figure 3 6 CPU Fan Connector Location 48 Figure 3 7 Digital Connector 50 Figure 3 8 DIMM Socket Location 52 Figure 3 9 External LED Connector Location eese 53 Figure 3 10 34 FDD Connector Location eese 55 Figure 3 11 Primary IDE Device Connector 57 Figure 3 22 Secondary IDE Device Connector Location 59 Figure 3 11 Inverter Connector Location sese 61 Figure 3 12 IrDA Connector Location 62 Figure 3 13 Keyboard Mouse Connector 64 Figure 3 14 LVDS LCD Connector Location
6. eerte 47 Table 3 8 CPU Fan Connector Pinouts essent 49 Table 3 9 Digital Connector Pinouts in 50 Table 3 10 External Connector Pinouts eee 54 Table 3 11 34 pin FDD Connector PinNOUts 56 Table 3 12 Primary IDE Connector Pinouts eese 58 Table 3 23 Secondary IDE Connector Pinouts esee 60 Table 3 12 Inverter Connector Pinouts 61 Table 3 13 IrDA Connector 63 Table 3 14 Keyboard Mouse Connector Pinouts rina 64 Table 3 15 LVDS LCD Connector Pinout 66 Table 3 16 Parallel Port Connector Pinouts eese 68 Table 3 17 Power Button Connector Pinouts eene 69 Table 3 18 Power Connector 71 Table 3 19 Primary IDE Connector Pinouts essent 71 Table 3 20 PS ON Signal Connector Pinouts 73 Table 3 21 Reset Button Connector Pinouts eese 74 T
7. When two EIDE disk drives are connected together back end jumpers the drives must be used to configure one drive as a master and the other as a slave PCISA MARK CPU 4 5 2 COM1 COM2 RS 232 Serial Port Installation The cable used to connect the CPU card to an RS 232 serial port is a 10 pin header to male D sub 9 connector To connect an RS 232 serial port to the CPU card follow the instructions below Step 1 Find the RS 232 cable in the kit that came with the CPU card Step 2 Connect the 10 pin connector end of the cables to the COM1 2 box headers on the CPU card Be sure to align the red wire on the connector to pin 1 on the box header Step 3 Connect the other end of the cables to standard female D sub 9 connectors 4 5 3 LCD Backlight Installation To connect an LCD backlight inverter to the CPU card follow the instruction below Step 1 Connect the 5 pin connector end of the LCD backlight cable to the CN6 header on the CPU card A keyed pin on the connector prevents it from being connected incorrectly 4 5 4 Power Connection To connect the CPU card to a power supply follow the instruction below Step 1 Connect 4 AT ATX power connector from a power supply to the CN1 power connector on the CPU card 4 5 5 TFT LVDS LCD Installation To connect a TFT LVDS LCD to the CPU card follow the instructions below Step 1 Connect the 20 pin connector end of
8. D 1 Introduction The motherboard comes with an onboard Realtek ALC655 CODEC Realtek ALC655 is a 16 bit full duplex AC 97 Rev 2 3 compatible audio CODECwith a sampling rate of 48KHz D 1 1 Accessing the AC 97 CODEC The CODEC is accessed through three phone jacks on the rear panel of the motherboard The phone jacks include ALINE input shared with surround output AMIC input shared with Center and LFE output ALINE output AMIC input line 0 1 2 Driver Installation The driver installation has been described in Chapter 6 After rebooting the sound effect configuration utility appears in the Windows Control Panel see Figure D 1 If the peripheral speakers are properly connected sound effects should be heard 200 IEI Technology Corp PCISA MARK CPU file Yew Favontes Joods O Psa dress Be Control Panel amp E da gt nt rol Pane eer Add Hardware re Date and Time See Also 2 H 9 Fonts Game IntekR Internet Keyboard rds Update Controllers Extreme Options scali e e 9 Phone and Power Options Printers and Regional Scanners and Modem Faxes anguage Cameras Taskb r and User Accounts Start Mery Figure D 1 Sound Effect Manager con D 2 Sound Effect Configuration D 2 1 Accessing the Sound Effects Manager To access the Sound Effects Manager please do the following Step 1 Install the aud
9. 143 MPU 401 Disabled i 143 MPU 401 I O Address 330 144 ACPI Function 145 Power Management Press 145 ACPI Suspend Type 51 5 145 Control by APM 145 Video Off Option Suspend gt 145 Video Off Method Suspend gt 146 gt Modem Use of IRQ eoe eet ope 146 Soft Off by PWR BTN Instant Off eese 147 Wake Events Press Enter eene 147 Power Management rin nnn rin nnne 148 HDD Power Down 0 149 1 1 149 Suspend Mode 150 gt VGA OFF rr Ea Day a cane nc cerva Cede 151 D gt LPT amp COM EPT COM 0000 151 HDD amp FDD ON eere niea
10. Driving Value DA ri 131 gt Panel 1024 x 768 132 Boot Device 132 187 PCISA MARK CPU Power Supply Type ATX iii 132 OnChip USB 1 2222 1121 133 USB Keyboard Support 0 133 OnChip Sound 133 OnChip Modem 133 to PCI Write Buffer 133 PCI Dynamic Bursting 134 PCI Master 0 WS Write 134 PCI Delay Transaction Disabled eese 134 2 Access 1 Retry Enabled eene 135 Master 1 WS Read 0 135 Master 1 WS Write 135 On Chip IDE Channel 0 1 Enabledq esee 137 IDE Prefetch Mode 137 Dr
11. 222 2 123 Typematic Rate Chars sec 6 eere 123 Typematic Delay Msec 250 eese 124 Security Option 124 OS Select For DRAM gt 64MB 2 125 Video BIOS Shadow Enabledg eese 125 XXXXX YYYYY Shadow Disabled 125 Small Logo EPA Show 0 126 DRAM Timing by SPD 128 DRAM Clock Host 1 128 SDRAM Cycle Length 3 eese 129 Bank interleave Disableq eene 129 Memory Hole 129 P2C C2P Concurrency 129 System BIOS Cacheable 130 Video RAM Cacheable Disabled iii 130 gt Frame Buffer Size 16 130 Aperture Size 64 1 k an kbk kake j aka e 131 AGP 4X Mode 131 Driving 131
12. Technology MODEL PCISA MARI User Manual Rev 1 1 December 2006 ad M t 111 REVISION HISTORY Model Name PCISA MARK CPU Card Revision Number Description Date of Issue 1 0 Initial release November 2006 1 1 Model name changed December 2006 COPYRIGHT NOTICE The information in this document is subject to change without prior notice in order to improve reliability design and function and does not represent a commitment on the part of the manufacturer In no event is the manufacturer liable for direct indirect special incidental or consequential damages arising out of the use or inability to use the product or documentation even if advised of the possibility of such damages This document contains proprietary information protected by copyright rights are reserved No part of this manual may be reproduced by any mechanical electronic or other means in any form without prior written permission of the manufacturer TRADEMARKS Product names mentioned herein are used for identification purposes only and may be trademarks and or registered trademarks of their respective owners PCISAI MARK CPU Card Table of Contents 1 JUN TIRODUC LO e 15 1 1 PCISA MARK CPU CARD OVERVIEW 16 1111211 lt Models crm 16 11 2 PCISA MARK Benefits PE 16 PCOUISA MARK Features E H l H lee A VA ban ME
13. hak ark b a k k KEKE EBE HEKA 117 gt 03 115006 17 117 gt a nE E 117 gt 2 aaae kaka ke 00200 117 gt Landing Zone MA ARA iii 117 e Eo 1 11011 117 gt Virus Warning 119 CPU Internal Cache Enabledq serene 119 External Cache 119 CPU L2 Cache ECC Checking 120 Page 186 Technology Corp PCISA MARK CPU 2 Quick Power On Self Test 120 Boot From LAN 120 SATA Boot ROM Control Disabled eene 121 gt Boot Device 000010212 aaa ii 121 Boot Other Device 122 Swap Floppy Drive Disabled esee 122 Boot Up Floppy Seek 122 Boot Up Numlock Status On 123 Gate A20 Option 5351 6 6666 123 Typematic Rate Setting
14. PC Health Status Exit without Saving Esc Quit 9 Menu in BIOS gt Select Item 10 Save amp Exit Setup Time Date Hard Disk Type BIOS Menu 1 AwardBIOS CMOS Setup Utility The following sections will completely describe the menus listed below and the configuration options available to users The following menu options are seen in BIOS Menu 1 m Standard CMOS Features Changes the basic system configuration m Advanced BIOS Features Changes the advanced system settings m Advanced Chipset Features Changes the chipset configuration features m Integrated Peripherals Changes the settings for integrated peripherals m Power Management Setup Configures power saving options m PnP PCI Configurations Changes the advanced PCI PnP settings m Health Status Monitors essential system parameters PCISA MARK CPU _ 2 The following user configurable options are also available BIOS Menu 1 5 Load Fail Safe Defaults Select this option to load failsafe default values for each BIOS parameter in the setup menus Press F6 for this operation on any page Load Optimized Defaults Select this option to load optimal default values for each BIOS parameter in the setup menus Press F7 for this operation on any page Set Supervisor Password By default no supervisor password is set To install a supervisor password select this field and enter the passwor
15. Typematic Delay Msec 250 The Typematic Rate option can only be configured if the Typematic Rate Setting is enabled Use the Typematic Delay option to specify the delay time between when a key is first pressed and when the acceleration begins gt 250 DEFAULT 250 milliseconds gt 500 500 milliseconds gt 750 750 milliseconds gt 1000 1000 milliseconds Security Option Setup Use the Security Option to limit access to both the system and Setup or just Setup gt Setup DEFAULT The system does not boot and access to Setup is denied if the correct password is not entered at the prompt gt System The system boots but access to Setup is denied if the correct password is not entered at the prompt Page 124 Technology Corp PCISA MARK CPU To disable security select the password setting in the Main Menu When asked to enter a password don t type anything press ENTER and the security is disabled Once the security is disabled the system boots and Setup can be accessed OS Select For DRAM gt 64MB Non OS2 Use the OS Select For DRAM gt 64MB option to specify the operating system gt 052 Specifies the operating system used as OS 2 Non OS2 DEFAULT Select this option when not using the 05 2 operating system Video BIOS Shadow Enabled Use the Video Bios Shadow option to enable video BIOS to be copied to the shadow RAM Disabled Video BIOS
16. 0CO ODF DMA Controller OFO OFF Numeric data processor 1 0 1 7 IDE Channel 2F8 2FF Serial Port 2 COM2 378 37F Parallel Printer Port 1 3B0 3BB VT82C686B Graphics Controller 3C0 3DF VT82C686B Graphics Controller 3F6 3F6 Primary IDE Channel 3F7 3F7 Standard floppy disk controller 3F8 3FF Table C 1 IO Address Map Serial Port 1 COM1 C 2 1st MB Memory Address Map System memory A0000 BFFFF VGA buffer FOOOO FFFFF System BIOS 1000000 Extend BIOS Table C 2 1 MB Memory Address Page 196 IEI Technology Corp PCISA MARK CPU ses C 3 IRQ Mapping Table System Timer RTC clock Keyboard ACPI Available LAN COM2 IRQ11 LAN USB2 0 SATA 1 IRQ12 PS 2 mouse SMBus Controller IRQ13 FPU FDC IRQ14 Primary IDE Available IRQ15 Secondary IDE Table C 3 IRQ Mapping Table C 4 DMA Channel Assignments Available Available Floppy disk 8 bit transfer Available Cascade for DMA controller 1 Available Available 0 1 2 3 4 5 6 7 Available Table C 4 IRQ Mapping Table 197 PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 198 IEI Technology Corp PCISA MARK CPU Appendix External AC 97 Audio CODEC Page 199 PCISA MARK CPU
17. 2 serial port connector 10 pin header CN14 Secondary IDE connector 44 pin box header CN8 Serial ATA connector 7 SATA connector CN20 Serial ATA connector 7 SATA connector CN21 TFT LCD connector 40 pin crimp connector CN27 USB 1 1 connector 8 pin header CN23 USB 1 1 connector 4 pin header CN24 Table 3 1 Peripheral Interface Connectors 3 1 3 External Peripheral Interface Connectors Table 3 2 lists the external peripheral interface connectors on the PCISA MARK Detailed descriptions of these connectors can be found in Section 3 3 Connector Type Label Ethernet connector RJ 45 connector CN25 Ethernet connector RJ 45 connector CN29 Keyboard mouse connector MINI DIN connector CN30 USB connector USB 2 0 connector CN22 connector HD D sub 15 female connector CN19 Table 3 2 External Peripheral Interface Connectors Technology Corp PCISA MARK CPU es eee 3 1 4 On board Jumpers Table 3 3 lists the on board jumpers Detailed descriptions of these jumpers can be found in Section 4 6 Description Label Type CF card function setup JP2 2 pin header Clear CMOS JP3 3 pin header Flat panel power select JP4 3 pin header PCI VIO voltage select JP5 3 pin header Table 3 3 On board Jumpers 3 2 Internal Peripheral Connectors Internal peripheral connectors are found on the CPU card and are only accessible when the CPU card i
18. DEFAULT 2 88M 3 5 in Drive B None Use the Drive B configuration option to specify the floppy drive type installed in the system The floppy drive configuration options are m None DEFAULT 360K 5 25 in 12M 5 25 in m 720K 3 5 1 44M 3 5in 2 88M 3 5 in 113 PCISA MARK CPU gt Video Use the Video option to select the CRT screen type the system connects to The video configuration options are EGA VGA DEFAULT m CGA40 m CGA80 m MONO Halt On All But Keyboard Use the Halt On option to specify what errors detected during the power up process stop the system Errors Whenever BIOS detects non fatal error the system is stopped and the user prompted NoErrors The system boot is not stopped for any errors that may be detected But Keyboard DEFAULT The system boot does not stop for a keyboard error it stops for all other errors gt But Diskette The system boot does not stop for a disk error it stops for all other errors gt But Disk Key The system boot does not stop for a keyboard or a disk error it stops for all other errors Base Memory The Base Memory is NOT user configurable The POST determines the amount of base or conventional memory installed in the system The value of the base memory is typically 512K for systems with 512K memory installed or 640K for systems with 640K o
19. ESC Exit Fl General Help F7 Optimized Defaults Phoenix AwardBIOS CMOS Setup Utility Integrated Peripherals Init Display First IDE HDD Block Mode Onboard FDD Controller Onboard Serial Port 1 Onboard Serial Port 2 x UART 2 Mode x IR Function Duplex X TX RX inverting enable Onboard Parallel Port Onboard Parallel Mode ECP Mode Use DMA Parallel Port EPP Type Onboard Legacy Audio sound Blaster SB I O Base Address SB IRQ Select SB DMA Select MPU 401 MPU 401 I O Address Slot Enabled Enabled 3F8 IRQ4 Disabled Standard Half No Yes 378 IRQ7 Normal 3 EPP1 9 Enabled Disabled 220H IRQ 5 1 Disabled 330 333H Item Help Tl2 Move Enter Select PU PD Value Fail Safe Defaults F5 Previous Values BIOS Menu 6 Integrated Peripherals ESC Exit F1 General Help F7 Optimized Defaults PCISA MARK CPU tees On Chip IDE Channel 0 1 Enabled Use the On Chip IDE Channel 0 1 option to specify if the system uses the integrated primary IDE channel or not Disabled The primary IDE channel is not used Enabled DEFAULT The primary IDE channel is used IDE Prefetch Mode Enabled Use the IDE Prefetch Mode option enable IDE pre fetching for faster drive access Disabled Disable this option if the system IDE devices do not support IDE pre fetching Enabled DEFAULT Retain the default for faster IDE drive access Drive P
20. See Figure 3 21 CN Pinouts See Table 3 23 The reset button connector is connected to the reset button on the external chassis PCISA MARK CPU RST_SW Figure 3 21 Reset Button Connector Location Table 3 23 Reset Button Connector Pinouts Page 74 Technology PCISA MARK CPU EEE N DK r KEN 3 2 21 RS 232 Serial Port COM1 amp COM2 Connectors CN Label CN13 and CN14 CN Type 10 pin header CN Location See Figure 3 22 CN Pinouts See Table 3 24 The serial port connectors connect to RS 232 serial port devices CN13 Page 75 PCISA MARK CPU Figure 3 22 RS 232 Serial Port Connectors Location PIN DESCRIPTION PIN DESCRIPTION DATA CARRIER DETECT DCD 2 DATA SET READY DSR 1 RECEIVE DATA RXD EN TRANSMIT DATA TXD DATA TERMINAL READY GROUND GND o Table 3 24 RS 232 Serial Port Connectors Pinouts 3 2 22 Serial ATA Drive Connectors CN Label CN20 and CN21 CN Type 7 pin SATA drive connector CN Location See Figure 3 23 CN Pinouts See Table 3 25 The two SATA drive connectors are connected to two first generation SATA drives First generation SATA drives transfer data at speeds as high as 150Mb s Technology Corp PCISA MARK CPU Figure 3 23 SATA Drive Conn
21. Technology Corp PCISA MARK CPU _ 1 1111frr 2 21 Packaged Contents and Optional Accessory Items 2 21 1 Package Contents When you unpack the PCISA MARK CPU card you should find the following components 1 PCISA MARK single board computer 1x ATA66 100 HDD cable 2 SATA cable n 1 x SATA Power cable n 1 x KB MS Y cable n 1 x RS232 cable n 1 x Audio cable n 1 x Mini jumper pack n 1 x Utility CD 1 x QIG quick installation guide 2 21 2 Optional Accessory Items The following are optional accessory items purchased separately m cable m LPT cable Page 35 PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 36 IEI Technology Corp PCISA MARK CPU Chapter 3 Connectors and Jumpers Page 37 PCISA MARK CPU Card 3 1 Peripheral Interface Connectors Section 3 1 1 shows peripheral interface connector locations Section 3 1 2 lists all the peripheral interface connectors seen in Section 3 1 1 3 1 1 PCISA MARK Layout Figure 3 1 shows the on board peripheral connectors and on board jumpers w 2 0000 CN17 2 CN11 CN22 CN14 1 liiiiiiiliiiiiiiiiliiiilliliil CN13 88888 88888 CN28 is a8 8 CN10 VIA VT82C686B CN23 CN24 CN16 CN9 VIA MARK 533 800 MHZ CN8 N 2 CN7 CN6 g
22. The integrated infrared IrDA connector supports both Serial Infrared SIR and Amplitude Shift Key Infrared ASKIR interfaces 5 IRRX lt IRTX lt Figure 3 14 IrDA Connector Location Page 62 Technology Corp PCISA MARK CPU DESCRIPTION vcc N C IR RX Ground IR TX Table 3 15 IrDA Connector Pinouts 3 2 14 Keyboard Mouse Connector CN Label CN31 CN Type 6 pin wafer connector CN Location See Figure 3 15 CN Pinouts See Table 3 17 The keyboard and mouse connector can be connected to a standard PS 2 cable or PS 2 Y cable to add keyboard and mouse functionality to the system PCISA MARK CPU VCCKM DESCRIPTION 5V MOUSE DATA MOUSE CLOCK KEYBOARD DATA KEYBOARD CLOCK GROUND Table 3 16 Keyboard Mouse Connector Pinouts Page 64 Technology PCISA MARK CPU Sess 3 2 15 LVDS LCD Connector CN Label CN26 CN Type 30 pin crimp connector CN Location See Figure 3 16 CN Pinouts See Table 3 17 This connector is connected to a TFT LCD LVDS display device Page 65 PCISA MARK CPU 31 l YOM Y1M 20 Y2M 20 c 1 3 ZCM i x LCD 1 5 33 LCD YOF YAF Y2F YCP ZOP Z1P Z2P ZCP D LCD SDATA L
23. The power button connector is connected to the power button on the external chassis Technology Corp PCISA MARK CPU Table 3 19 Power Button Connector Pinouts Page 69 PCISA MARK CPU 3 2 18 Power Connector CN Label CN1 CN Type 4 pin wafer connector CN Location See Figure 3 19 CN Pinouts See Table 3 20 The power connector is connected to a power source that powers the system CN1 u ooo S 1 Figure 3 19 Power Connector Location Technology Corp PCISA MARK CPU Table 3 20 Power Connector Pinouts PIN DESCRIPTION DESCRIPTION IDERST GROUND ENE SEREN He mos 6 Pope as soron mem PIORDY 28 PULL LOW GND Table 3 21 Primary IDE Connector Pinouts Page 71 PCISA MARK CPU 3 2 19 PS ON Connector CN Label CN2 CN Type 3 pin wafer connector CN Location See Figure 3 20 CN Pinouts See Table 3 22 The PS ON connector connects to an ATX power supply 5VSB VCC PSO GND Figure 3 20 PS ON Signal Connector Location Page 72 Technology Corp PCISA MARK CPU o DESCRIPTION 5V Standby Table 3 22 PS ON Signal Connector Pinouts 3 2 20 Reset Button Connector CN Label CN4 CN Type 2 pin wafer connector CN Location
24. can then be run to locate and remove the virus before any damage is done Enabled Activates automatically when the system boots up causing a warning message to appear when anything attempts to access the boot sector or HDD partition table Disabled DEFAULT No warning message appears when there is an attempt to access the boot sector or HDD partition table CPU Internal Cache Enabled Use the CPU Internal Cache option to enable or disable the internal CPU cache Disabled The internal CPU cache is disabled Enabled DEFAULT The internal CPU cache is enabled External Cache Enabled Use the External Cache option to enable the system to transfer data from the main DRAM into the cache memory when the CPU requests the transfer 119 PCISA MARK CPU Disabled The CPU cannot access external DRAM gt Enabled DEFAULT The CPU access external DRAM CPU L2 Cache ECC Checking Enabled Use the CPU L2 Cache ECC Checking option to enable memory checking when the external cache contains ECC SRAM Static Random Access Memory gt Disabled Memory checking disabled Enabled DEFAULT Memory checking enabled Quick Power On Self Test Enabled Use the Quick Power On Self Test option to speed up the POST after the computer is turned on If enabled BIOS shortens or skips some POST check items Disabled Normal POST occurs after the computer is turned on Enabled D
25. female VGA connector labeled number 4 1 2 3 4 e Figure 3 26 External Peripheral Interface Connector Panel Technology Corp PCISA MARK CPU tees 3 3 1 LAN Connectors CN Label CN Type CN Location CN Pinouts The PCISA MARK is equipped with two built in GbE Ethernet controllers The controllers can connect to the LAN through two RJ 45 LAN connectors There are two LEDs on the connector indicating the status of LAN The pin assignments are listed in the following CN25 and CN29 RJ 45 See Table 3 29 See Figure 3 26 labeled number 2 table PIN NO DESCRIPTION PIN NO DESCRIPTION 1 TX 8 N C 2 GROUND 9 ACT_LED 3 TX 10 4 RX 11 LINK_LED 5 GROUNG 12 LINK_LED 6 RX 13 GROUND 7 N C 14 GROUND Table 3 29 LAN Pinouts PCISA MARK CPU ACT LNK LED LED Figure 3 27 RJ 45 Ethernet Connector The RJ 45 Ethernet connector has two status LEDs one green and one yellow The green LED indicates activity on the port and the yellow LED indicates the port is linked See Table 3 30 STATUS DESCRIPTION STATUS DESCRIPTION Table 3 30 RJ 45 Ethernet Connector LEDs 3 3 2 Mini DIN 6 PS 2 Connector CN Label CN30 CN Type Mini DIN 6 PS 2 CN Location See Figure 3 26 labeled number 1 CN Pinouts See Table 3 31 The PCISA MARK CPU card has a mini DIN 6 PS 2 connector on the mounting br
26. 2 Open the PCISA MARK folder Open the LAN subfolder See Figure 6 19 4 Audio 5 5 Manual Figure 6 19 Access the LAN Driver Folder Step 3 Click the Setup utility icon shown in Figure 6 20 Figure 6 20 Setup Utility Icon Page 182 IEI Technology Corp PCISA MARK CPU Step 4 Once the Setup icon is double clicked a Welcome screen shown in Figure 6 21 appears REALTEK Gigabit and Fast Ethernet NIC Driver Setup LanSetup Welcome to the InstallShield Wizard for REALTEK Gigabit and Fast Ethernet NIC Driver The InstallShield Wizard will install REALTEK Gigabit and Fast Ethernet NIC Driver on your computer To continue click Next Cancel Figure 6 21 LAN Driver Welcome Screen 183 PCISA MARK CPU Step 5 To continue installing click Next The driver is installed and a confirmation screen at the end of the installation appears See Figure 6 22 REALTEK Gigabit and Fast Ethernet NIC Driver Setup LanSetup InstallShield Wizard Complete Setup has finished installing REALTEK Gigabit and Fast Ethemet NIC Driver on your computer Figure 6 22 LAN Driver Installation Complete Step 6 Click Finish to complete the installation 184 IEI Technology Corp PCISA MARK CPU Appendix A BIOS Menu Options Page 185 PCISA MARK CPU A 1 BIOS Configuration Op
27. 4 Compact Flash Standard CF II cards can be inserted into the compact flash slot on the solder side of the PCISA MARK PCB Technology Corp PCISA MARK CPU es 2 12 Serial Ports The PCISA MARK has two high speed UART serial ports configured as CN13 and CN14 Both ports can be configured as RS 232 The serial ports have the following specifications m 16 550 UART with 16 byte FIFO buffer m 115 2Kbps transmission rate 2 13 Audio Codec 2 13 1 Audio Codec Overview The PCISA MARK has an integrated REALTEK ALC655 CODEC The ALC655 CODEC is a 16 bit full duplex AC 97 Rev 2 3 compatible six channel audio CODEC designed for PC multimedia systems including host soft audio and AMR CNR based designs 2 13 2 Audo Codec Features Some of the features of the REALTEK ALC655 CODEC are listed below Meets performance requirements for audio PC99 2001 systems Meets Microsoft WHQL WLP 2 0 audio requirements m 16 bit Stereo full duplex CODEC with 48KHz sampling rate m Compliant with 97 Rev 2 3 specifications m Front Out Surround Out MIC In and LINE In Jack Sensing m 14 318MHz gt 24 576MHz PLL to eliminate crystal m 12 288 2 BITCLK input m Integrated PCBEEP generator to save buzzer m Interrupt capability Three analog line level stereo inputs with 5 bit volume control LINE IN CD AUX m High quality differential CD input m Two analog line level mono inputs PCBEEP PHONE IN
28. A WARNING When installing electronic components onto the PCISA MARK always take anti static precautions in order to prevent ESD damage to the PCISA MARK and other electronic components like the CPU and DIMM modules 4 4 1 Preinstalled Component The component listed below is preinstalled on the PCISA MARK m CPU 4 4 2 Components to Install To install the PCISA MARK the following components must be installed or connected to the PCISA MARK DIMM module m Peripheral devices PCISA MARK CPU 4 4 3 DIMM Module Installation 4 4 3 1 Purchasing the Memory Module When purchasing DIMM modules the following considerations should be taken into account m The DIMM module can support 168 pin PC 100 133 MHz SDRAM with maximum size of 512MB DIMM can be either single sided or dual sided 4 4 3 2 DIMM Module Installation The PCISA MARK CPU card has one DDR SDRAM DIMM socket To install a DIMM module follow the instructions below and refer to Figure 4 1 Step 1 Pull the two white handles on either side of the DIMM socket down Step 2 Align the DIMM module with the DIMM socket making sure the matching pins are correctly aligned Step 3 Insert the DIMM module slowly Once it is correctly inserted push down firmly The white handles on either side of the socket move back up and lock the module into the socket Technology Corp PCISA MARK CPU Locked Retaining C
29. AGP bus master are speeded up Disabled DEFAULT AGP Master 1 WS Read is not in effect gt Enabled AGP Master 1 WS Read is in effect Master 1 WS Write Disabled Use the AGP Master 1 WS Write option to reduce the time the AGP bus mastering device waits initiating a write command to only one wait state All system memory writes made by the AGP bus master are speeded up Disabled DEFAULT AGP Master 1 WS Write is not in effect gt Enabled AGP Master 1 WS Write is in effect Page 135 5 5 Integrated Peripherals Use the Integrated Peripherals menu BIOS Menu 6 to change the configuration options for the attached peripheral devices Phoenix AwardBIOS CMOS Setup Utility Integrated Peripherals Onchip IDE 10 Onchip IDE Channell IDE Prefetch Mode Primary Master PIO Primary Slave PIO secondary Master secondary Slave Primary Master UDMA Primary Slave UDMA Secondary Master UDMA Secondary Slave UDMA Init Display First IDE HDD Block Mode Onboard FDD Controller Onboard Serial Port 1 Onboard Serial Port 2 UART 2 Mode x IR Function Duplex X TX RX inverting enable Enabled Enabled Enabled Auto Auto Auto Auto Auto Auto Auto Auto PCI Slot Enabled Enabled 3F8 IRQ4 Disabled Standard Half No Yes Item Help Menu Level 115 Enter Select PU PD Value Fail Safe Defaults F5 Previous Values
30. One 40 pin primary IDE device connector on the PCISA MARK CPU card supports connectivity to Ultra ATA 133 IDE devices with data transfer rates up to 133MB s CN10 Technology Corp PCISA MARK CPU IDERST a PDD 4 08 PDD6 4116 PDD5 stg PODI0 PDD4 o Le 10 Poot PDD3 ell 12 PDDI2 PDD2 14 PDD e 16 172051 PDDO o 18 POD15 ELE pete 24 PDIOR 25 26 PIORDY PIORDY 27 jl 28 PDDACK 2o 30 IRQ14 E gt PDA1 Bo of 34 EDAD 35 000036 22 PDCS1 3a PDCS3 HD LEDI J 39 ali o E Figure 3 11 Primary IDE Device Connector Location DESCRIPTION DESCRIPTION IDERST GROUND PCISA MARK CPU Table 3 12 Primary IDE Connector Pinouts 3 2 11 IDE Connector Secondary CN Label CN8 CN Type 44 pin box header CN Location See Figure 3 12 CN Pinouts See Table 3 13 One 44 pin secondary IDE device connector on the PCISA MARK CPU card supports connectivity to Ultra ATA 133 IDE devices with data transfer rates up to 133MB s Technology Corp PCISA MARK CPU EEE A DK r rr LESTER DD 3008 TA TEW 5005 ita 150010 v To 500 5777 1112 1557 0062 HAT S0013 55 Tig 1 5000 Tig zm SDDREQ 53 BIXOR 28 SIOR
31. S PDI Sony Philips Digital Interface SDRAM Synchronous Dynamic Random Access Memory SIR Serial Infrared UART Universal Asynchronous Receiver transmitter USB Universal Serial Bus VGA Video Graphics Adapter PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 14 IEI Technology Corp PCISA MARK CPU Chapter 1 Introduction Page 15 PCISA MARK CPU 1 1 PCISA MARK CPU Card Overview The PCISA form factor PCISA MARK is fully equipped with advanced multi mode I Os The PCISA MARK is designed for system manufacturers integrators and VARs that want performance reliability and quality at a reasonable price 1 1 1 PCISA MARK Models The PCISA MARK series has two models m PCISA MARK 533 R10 m PCISA MARK 800 R10 The specifications for the two models are shown in Table 1 1 PCISA MARK 533 R10 800 R10 CPU Speed 533MHz 800MHz 128 MB PC133MHz onboard memory YES YES CRT TFT LVDS YES YES Dual LAN YES YES Audio YES YES Dual SATA 150 YES YES Table 1 1 PCISA MARK Model Specifications 1 1 2 PCISA MARK Benefits Some of the PCISA MARK benefits include m High performance cost effective energy efficient Flexible display options m Multiple storage option integration including O 40 pin or 3 5 HDD O 34 pin floppy disk drive FDD support O IDE channel CFII socket for embedded OS O Dual SATA ports with ALI M5283 RAID 0 and RAI
32. enabled 143 MPU 401 I O Address 330 333H Use the MPU 401 I O Address option to select the base address for the sound blaster Address options are listed below m 300 303H 310 313H m 320 323H 330 333H DEFAULT 5 6 Power Management Setup Use the Power Management Setup menu BIOS Menu 7 to set the BIOS power management and saving features Phoenix AwardBIOS CMOS Setup Utility Power Management Setup Power Management Press Enter ACPI Suspend Type S1 POS Menu Level Control by APM Yes Video Off Option Suspend gt off Video Off Method V H SYNC B lank MODEM Use IRQ 3 501 011 PWRBTN Instant Off wake Up Events Press Enter 1 Enter Select PU PD Value 10 5 ESC Exit Fl General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 7 Power Management Setup PCISA MARK CPU _ 2 ACPI Function Enabled Use the ACPI Function to enable the ACPI Advanced Configuration and Power Interface function Disabled ACPI function disabled Enabled DEFAULT ACPI function enabled Power Management Press Enter Use the Power Management option to open new power management menu For more details see Section 5 6 1 Suspend Type S1 POS Use the ACPI Suspend Type BIOS option to specify the sleep state the system enters when not being used 51 5 DE
33. g u u u Figure 3 1 Connector and Jumper Locations Technology Corp 3 1 2 Peripheral Interface Connectors Table 3 1 shows a list of the peripheral interface connectors on the PCISA MARK Detailed descriptions of these connectors can be found in Section 3 2 PCISA MARK CPU Card ED DD Se sf Connector Type Label Audio CD In connector 4 pin header CN17 Audio connector 10 pin box header CN15 Line out Line in amp MIC in Battery connector 2 pin wafer connector CN28 Compact Flash connector solder side 50 pin header CN32 CPU Fan connector 3 pin wafer connector CN7 Digital I O connector 10 pin box header CN11 DIMM socket 168 pin DIMM socket CN16 External LED connector 6 pin wafer connector CN5 Floppy connector 34 pin box header CN12 Inverter connector 5 pin wafer connector CN6 IrDA connector 5 pin header CN18 Keyboard Mouse connector 6 pin wafer connector CN31 LVDS LCD connector 30 pin crimp connector CN26 Parallel Port connector 26 pin box header CN9 Power button switch 2 pin wafer connector CN3 Power connector 4 pin wafer connector CN1 Primary IDE connector 40 pin box header CN10 PS ON connector 3 pin wafer connector CN2 Reset button switch 2 pin wafer connector CN4 PCISA MARK CPU Connector Type Label RS 232 COMI serial port connector 10 pin header CN13 RS 232
34. ra 152 gt PCI Master OFF 010101010101 inte nior 152 gt Master OFF teenie rete ce na Cl ces 153 Wake On LAN 153 Modem Ring Resume 0 153 RTC Alarm Resume Disabled eene 154 gt Date of Month ici 154 Resume Time 2 ennt k na k kina Raa N R 154 gt Primary INTR 1 1 1 1 1 1 12 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 hi 154 IRQs Monitoring Activity Press 154 PNP OS Installed No 156 Reset Configuration Data Disabled eee 157 Resources Controlled By Auto ESCD 157 x IRQ Resources Press 157 189 PCISA MARK CPU x DMA Resources Press Enter 159 PCI VGA Palette Snoop Disabled eene 160 Assign IRQ for VGA Enabled eere 160 Assign IRQ for USB Enabled 161 gt i ea 162 gt Fan S o si 1 1 1 1 1 1 1 1 1 kd 12 2 2 2 2 2 2 2 2 162
35. rar rra tt P a 63 3 213 LVDS LCD Connector uaar 65 3 2 16 Parallel Port Connector iaia 67 3 2 17 Power Button Connector enne 66 3 2 18 Power Connector iii 70 PCISAI MARK CPU Card 3 2 19 PS ON 601111611 sia 72 3 2 20 Reset Button Connector ii ti V a vete E 73 3 2 21 RS 232 Serial Port COMI amp COM2 Connectors 9 75 3 2 22 Serial ATA Drive Connectors iaia 76 3223 TRT LCD COMM 78 3 2 24 USB Connectors 8 and cina 80 3 3 EXTERNAL PERIPHERAL INTERFACE CONNECTOR PANEL 82 3 3 I LAN 83 3 3 2 Mini DIN 6 25 2 Connector J EA EEE Pru RE e sevi 84 3 USB CONNEC OF ibi 85 dod AL uiui 9 5 1 86 4 INSTALLATION iui 89 4 1 ANTI STATIC PRECAUTIONS scali 90 4 2 INSTALLATION CONSIDERATIONS aue k UA nA m UK 90 4 2 1 Installation AE AA Ku za 90 an A N 91 4 3 1 Unpacking 27601111011 alia 91 SIZE culle elena 92 4 4 PCISA MARK CPU CARD INSTALLATION 93 4 4 1 Preinstalled COMPIE Em 93 4 4 2 Components to Install ili 93 4 4 3 DIMM Module Installation vv rite
36. roused from a suspended state Disabled DEFAULT The real time clock RTC cannot generate a wake event Enabled If selected the following options become configurable Date of Month Resume Time hh mm ss After setting the alarm the computer will turn itself on from a suspend state when the alarm goes off Primary INTR ON Use the Primary INTR option to enable IRQs to be monitored for activity and to be able to rouse the system from a suspend or doze state if the activity is detected gt IRQs not monitored gt On DEFAULT IRQs are monitored IRQs Monitoring Activity Press Enter To view the IRQs Monitoring Activity options BIOS Menu 10 press ENTER If the Primary INTR was selected as ON the IRQs can be monitored and used to generate wake events Page 154 Technology Corp Phoenix AwardBIOS CMOS Setup Utility IRQs Activity Monitoring EXIT 1 Enabled 2 Enabled Menu Level gt gt gt Floppy Disk Enabled LPT 1 Enabled RTC Alarm Disabled IRQ2 Redir Disabled Reserved Disabled Disabled PS 2 Mouse Enabled Coprocessor Enabled Hard Disk Enabled Reserved Disabled 1 Enter Select PU PD Value F10 Save ESC Exit Fl General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 10 IRQs Activity Monitoring The following IRQ
37. the original PC AT bus specification PCI ISA PnP for devices compliant with the Plug and Play standard whether designed for PCI or ISA bus architecture 1 Enter Select PU PD Value 10 5 ESC Exit Fl General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 12 IRQ Resources The IRQ Resources menu has the following options 9 assigned to PCI ISA PnP 10 assigned to PCI ISA PnP m 11 assigned to PCI ISA PnP m IRQ 12 assigned to PCI ISA PnP 14 assigned to PCI ISA PnP 15 assigned to PCI ISA PnP The above options all have the following default options gt PCIISAPnP DEFAULT The IRQ is assigned to legacy ISA for devices compliant with the original PC AT bus specification PCI ISA PNP for devices compliant with the Plug and Play standard whether designed for PCI or ISA bus architecture gt Legacy ISA The IRQ is reserved by BIOS for legacy ISA devices x DMA Resources Press Enter The DMA Resources menu BIOS Menu 13 can only be accessed if the Resources Controlled By option is set to Manual dBIOS CMOS Setup Utility DMA Resources assigned PCI ISA assigned PCI ISA Menu Level 44 assigned PCI ISA assigned PCI ISA Legacy ISA for devices assigned PCI ISA compliant with the original PC AT bus specification PCI ISA PnP for devices compliant with the Plug and Play standard whether d
38. the system uses a second or third boot device if the first boot device is not found Disabled The system does not look for second and third boot devices if the first one is not found gt Enabled DEFAULT The system looks for second and third boot devices if the first one is not found Swap Floppy Drive Disabled The Swap Floppy Drive option is effective only in systems with two floppy drives Selecting Enabled assigns physical drive B to logical drive A and physical drive A to logical drive B Enabled Assigns physical drive B to logical drive A and physical drive A to logical drive B Disabled DEFAULT Default physical logical drive assignments Boot Up Floppy Seek Enabled Use the Boot Up Floppy Seek option to enable the BIOS to determine if the floppy disk drive installed has 40 or 80 tracks during the POST 360K FDDs have 40 tracks while 760K 1 2M and 1 44M FDDs all have 80 tracks Disabled BIOS does not search for the type of FDD drive by track number Note that there is no warning message if the drive installed is 360K Enabled DEFAULT BIOS searches for a FDD to determine if it has 40 80 tracks Note that BIOS cannot tell the difference between 720K 1 2M or 1 44M drives as they all have 80 tracks 122 Technology Corp PCISA MARK CPU es Boot Up Numlock Status On Use the Boot Up Numlock Status option to s
39. transfer mode up to mode 6 and SATA 1 disk drives The ALi M5283 also has a cost effective RAID functionality that can increase the data read write speed and provide protection to data by distributing mirrored duplicates of data onto two disk drives RAID 1 A CAUTION A configured RAID volume which may consist of multiple hard drives appears to an operating system as a contingent storage space The operating system will not be able to distinguish the physical disk drives contained in a RAID configuration E 1 1 Precautions One key benefit a RAID configuration brings is that a single hard drive can fail within a RAID array without damaging data With RAID1 array a failed drive can be replaced and the RAID configuration restored WARNING Irrecoverable data loss occurs if a working drive is removed when trying to remove a failed drive It is strongly recommended to mark the physical connections of all SATA disk drives Drive locations can be identified by attaching stickers to the drive bays If a drive member of a RAID array should fail the failed drive can then be correctly identified Page 208 Technology Corp PCISA MARK CPU CAUTION Do not accidentally disconnect the SATA drive cables Carefully route the cables within the chassis to avoid system down time E 2 Features and Benefits m Supports RAID levels 0 1 and JBOD Supports connectivity to two disk drives m Supported O
40. works correctly with Windows Realtek AC 97 Audio If you want to search for Microsoft digitally signed software visit the Windows Update Web site at http windowsupdate microsoft com to see if one is available Do you want to continue the installation No More Info Figure 6 16 Audio Driver Digital Signal 179 PCISA MARK CPU Step 8 The installation of the driver begins See Figure 6 17 Realtek AC 97 Audio Setup 5 18 Setup Status Realtek 97 Au wr Installed Cancel n Figure 6 17 Audio Driver Installation Begins Page 180 IEI Technology Corp Step 9 After the driver installation process is complete a confirmation screen shown in Figure 6 18 appears Realtek 97 Audio Setup 5 18 InstallShield Wizard Complete Setup has finished installing Realtek AC 97 Audio on your computer Qi Yes 1 want to restart my computer now No will restart my computer later Remove any disks from their drives and then click Finish to complete setup Installs Figure 6 18 Audio Driver Installation Complete Step 10 Select when the system should be restarted now or later see Figure 6 18 Step 11 Click FINISH to complete the installation PCISA MARK CPU 6 3 1 LAN Driver Installation To install the LAN driver follow the steps below Step 1 Insert the CD into the system that contains the PCISA MARK board Step
41. 0 NC Table 3 5 Audio Connector Pinouts 3 2 3 Battery Connector CN Label CN28 CN Type 2 pin wafer connector CN Location See Figure 3 4 CN Pinouts See Table 3 6 IEI Technology Corp PCISA MARK CPU FP JO Figure 3 4 Battery Connector Location PIN NO DESCRIPTION 1 Battery 2 Battery Table 3 6 Battery Connector Pinouts 3 2 4 Compact Flash Connector CN Label 2 solder side CN Type 50 pin header CN Location See Figure 3 5 CN Pinouts See Table 3 7 Page 45 PCISA MARK CPU c Figure 3 5 Compact Flash Connector Location IEI Technology Corp PCISA MARK CPU er rr ee eters PIN NO DESCRIPTION PIN NO DESCRIPTION 1 GROUND 26 CFD2 2 SDD3 27 50011 3 5004 28 50012 4 5005 29 50013 5 5006 50014 6 5007 31 50015 7 SDCS1 32 SDCS3 8 GROUND 33 N C 9 GROUND 34 SDIOR 10 GROUND 35 SDIOW 11 GROUND 36 vcc 12 GROUND 37 IRQ15 13 vcc 38 vcc 14 GROUND 39 MASTER SLAVE 15 GROUND 40 N C 16 GROUND 41 RESET 17 GROUND 42 SIORDY 18 SDA2 43 SDDREQ 19 SDA1 44 SDDACK 20 SDAO 45 HD_LED2 21 SDDO 46 PDIAG 22 SDD1 47 SDD8 23 SDD2 48 SDD9 24 N C 49 SDD10 25 CFD1 50 GROUND Table 3 7 Compact Fl
42. 3MHz SDRAM up to 512MB CN16 51 PCISA MARK CPU CAS1 DQM1 CAS2 DAM2 CAS3 DQM3 CAS4 DQM4 5 5 CAS6 DQM6 CAS7 DQM7 62 RASO RAS1 RAS2 Figure 3 8 DIMM Socket Location Technology Corp PCISA MARK CPU Sees 3 2 8 External LED Connector CN Label CN5 CN Type 6 pin wafer connector CN Location See Figure 3 9 CN Pinouts See Table 3 10 Figure 3 9 External LED Connector Location Page 53 PCISA MARK CPU PIN NO DESCRIPTION Ou 5 U N 9 2 LED Table 3 10 External LED Connector Pinouts 3 2 9 Floppy Disk Connector CN Label CN12 CN Type 34 pin box header CN Location See Figure 3 10 CN Pinouts See Table 3 11 The floppy disk connector connects to a floppy disk drive IEI Technology Corp PCISA MARK CPU DISKSEL1 DISKSELO WDATA a WETPRT Figure 3 10 34 pin FDD Connector Location DESCRIPTION DESCRIPTION s pw TT ao me ie fom re m wk wee 7 mee 7 PCISA MARK CPU Table 3 11 34 pin FDD Connector Pinouts 3 2 10 IDE Connector Primary CN Label CN10 CN Type 40 pin box header CN Location See Figure 3 11 CN Pinouts See Table 3 12
43. 5 Frequency Voltage Control eese 163 PCISAI MARK CPU Card Glossary 97 ASKIR ATA BIOS CFII CMOS CPU Codec COM DAC DDR DIMM DIO DMA EIDE EIST FDD FDC FFIO FIFO FSB HDD IDE I O Audio Codec 97 Advanced Configuration and Power Interface Advanced Power Management ATAPI Removable Media Device Amplitude Shift Keyed Infrared Advanced Technology Attachments Basic Input Output System CompactFlash Type 2 Complementary Metal Oxide Semiconductor Central Processing Unit Compressor Decompressor Serial Port Digital to Analog Converter Double Data Rate Dual Inline Memory Module Digital Input Output Direct Memory Access Enhanced IDE Enhanced Intel SpeedStep Technology Floppy Disk Drive Floppy Disk Connector Flexible File Input Output First In First Out Front Side Bus Infrared Data Association Hard Disk Drive Integrated Data Electronics Input Output ICH4 Controller Hub 4 L1 Cache Level 1 Cache L2 Cache Level 2 Cache LCD Liquid Crystal Display LPT Parallel Port Connector LVDS Low Voltage Differential Signaling MAC Media Access Controller OS Operating System Peripheral Connect Interface PIO Programmed Input Output PnP Plug and Play POST Power On Self Test RAM Random Access Memory SATA Serial ATA S M A R T Self Monitoring Analysis and Reporting Technology SPD Serial Presence Detect
44. 5 1 4 Unable to Reboot After Configuration Changes ii 109 3 1 3 din BIOS iris 110 5 2 STANDARD CMOS FEATURES 112 5 2 1 IDE Primary Master Slave lia 115 5 3 ADVANCED BIOS FEATURES 001010100000 118 3 ADVANCGED CHIPSET FEATURE Sla 127 5 5 INTEGRATED PERIPHERALS circle aaa 136 5 6 POWER MANAGEMENT SETUP oca peace etna Reo nn on OA CY tn aA Rd eR EE Y Nt A e REO CER 144 5 6 1 FORM 147 Rella 150 3 7 PNP PCI CONFIGURATIONS iaia 156 POOH licia 161 5 9 FREQUENCY VOLTAGE CONTROL i 163 6 DRIVER INSTALLATIGQN 1 0101000 165 6 1 AVAILABLE SOFTWARE DRIVERS 166 6 2 VIA 4 IN 1 CHIPSET DRIVER INSTALLATION VIA SERVICE PACK V4 3 166 6 3 REALTEK AUDIO DRIVER INSTALLATION 174 6 3 1 LAN Driver Installation 192 AH 6FH 8 22 22 120202 0000000000000000000000 192 PCISAI MARK CPU Card List of Figures Figure 1 1 PCISA MARK 18 Figure 1 2 PCISA MARK Overview Solder Side esses 19 Figure 2 1 Data Flow Block Diagram eene nennen 26 Figure 3 1 Connector and Jumper Locations eee 38 Figure 3 2 Audio CD In Connector Location eese 42 Figure 3 3 Audio Connector Location
45. B Keyboard Support Disabled Use the USB Keyboard Support option to enable or disable the use of a USB keyboard Disabled DEFAULT USB keyboard cannot be used Enabled USB keyboard can be used OnChip Sound Auto Use the OnChip Sound option to enable or disable the chipset codec gt Auto DEFAULT chipset codec is automatically detected by BIOS Disabled The chipset codec is disabled Modem Auto Use the OnChip Modem option to enable or disable the chipset modem controller gt Auto DEFAULT The chipset modem is automatically detected by BIOS gt Disabled The chipset modem is disabled to PCI Write Buffer Enabled Use the CPU to PCI Write Buffer option to enable buffered writes from the CPU to the PCI bus to compensate for the speed differences between the CPU and the PCI bus Page 133 PCISA MARK CPU When disabled the writes are not buffered and the CPU must wait until the write is complete before starting another write cycle Disabled No buffering when writes from the CPU to the PCI bus occurs Enabled DEFAULT Buffering when writes from the CPU to the PCI bus occurs PCI Dynamic Bursting Enabled Use the PCI Dynamic Bursting option to enable every write transaction to go to the write buffer and then allow burstable transactions then burst on the PCI bus and nonburstable transactions do not gt Disabled PCI dynamic burstin
46. CD Figure 3 16 LVDS LCD Connector Location PIN NO DESCRIPTION PIN NO DESCRIPTION 1 GROUND 2 GROUND 3 LVDSA_YO 4 LVDSA_YO 5 LVDSA_Y1 6 LVDSA_Y1 7 LVDSA_Y2 8 LVDSA_Y2 9 LVDSA_CLK 10 LVDSA_CLK 11 N C 12 N C 13 GROUND 14 GROUND 15 LVDSB_YO 16 LVDSB_YO 17 LVDSB_Y1 18 LVDSB_Y1 19 LVDSB_Y2 20 LVDSB_Y2 21 LVDSB_CLK 22 LVDSB_CLK 23 N C 24 N C 25 GROUND 26 GROUND 27 VCC_LVDS 28 VCC_LVDS 29 VCC_LVDS 30 VCC_LVDS Table 3 17 LVDS LCD Connector Pinouts Technology Corp PCISA MARK CPU ls 3 2 16 Parallel Port Connector CN Label CN9 CN Type 26 pin box header CN Location See Figure 3 17 CN Pinouts See Table 3 18 The 26 pin box header can be connected to a parallel port connector interface or some other parallel port device such as a printer Figure 3 17 Parallel Port Connector Location Fino DESCRIPTION enno x avroronmeero 7 em PCISA MARK CPU EN DATA 2 PRINTER SELECT LN mms fe oms fe om fe 20 s a meme _ Table 3 18 Connector Pinouts 3 2 17 Power Button Connector CN Label CN3 CN Type 2 pin wafer connector CN Location See Figure 3 18 CN Pinouts See Table 3 19
47. CN Pinouts See Table 3 27 for CN23 pinouts See Table 3 28for CN24 pinouts The 8 pin and 4 pin USB connectors provide connectivity to USB 1 1 ports The 8 pin USB connector can support two USB devices The 4 pin USB connector can support one USB device An additional USB port is found on the rear panel The USB ports are used for I O bus expansion Technology Corp PCISA MARK CPU Figure 3 25 8 pin USB Connector Location DESCRIPTION DESCRIPTION 1 vcc 2 GROUND 3 DATA3 4 DATA4 5 DATA3 6 DATA4 7 GROUND 8 vcc Table 3 27 CN23 USB Port Connector Pinouts PIN DESCRIPTION PIN NO DESCRIPTION 1 N C 2 GROUND 3 N C 4 DATA2 5 N C 6 DATA2 7 N C 8 vcc Table 3 28 CN24 USB Port Connector Pinouts PCISA MARK CPU 3 3 External Peripheral Interface Connector Panel Figure 3 26 shows the PCISA MARK external peripheral interface connector panel The peripheral connectors are connected to external devices when the PCISA MARK is installed in a chassis The peripheral connectors on the panel are m 1 x PS 2 keyboard and mouse mini DIN connector m 2x 45 GbE connectors m 1x USB connector m 1xVGAconnector Figure 3 26 shows the PCISA MARK external peripheral interface connector panel with a standard HD D sub 15
48. Create RAID 0 Striping for Performance All data previously stored on the member drives of RAID configuration are destroyed during the RAID initialization process If used drives are used to create a RAID array make sure the data has been moved or backed up before creating a RAID array out of the disk drives Step 1 Select Create RAID 0 Striping for Performance Use the arrow keys to Page 211 PCISA MARK CPU highlight Create RAIDO Striping for Performance and press ENTER A flashing S appears on the Drive Menu where the member drives to be included in the RAID 0 array can be chosen Step 2 Select RAID array drive members Use the space bar to select members of the RAID array The flashing cursor changes to a lower case s once any of the connected disk drives has been selected Follow the same method to select another member drive Step 3 Confirm The Create RAIDO Y N confirm box appears Press Y Step 4 Name the array Enter a nickname for the created array Upper and lower case alphabetic numeric space and underscore characters are all applicable for naming an array Page 212 IEI Technology Corp PCISA MARK CPU amp NOTE 1 To reduce the chance of losing data ALi imposes certain limitations on the RAID configuration options PATA drives connected on the same IDE channel cannot be selected as the members of a RAID 0 array Av
49. D 1 support Technology Corp PCISA MARK CPU es Se es 1 1 3 PCISA MARK Features Some of the PCISA MARK features are listed below Complies with PCISA form factor m Complies with RoHS m Contains an embedded Mark CoreFusion processor m Contains onboard 128MB PC133MHz memory m Supports a 168 100 133 2 SDRAM DIMM with a maximum capacity of 512MB m Supports CRT 24 bit TFT 18 bit LVDS displays m Supports IDE dual LAN five USB 1 1 devices and two RS 232 serial port connectors m Supports two SATA channels with transfer rates up to 150Mb s PCISA MARK CPU 1 2 PCISA MARK Overview 2 x SATA 150 10 100 Mbps Ethernet VGA RS 232 IDE LPT TTL LVDS 168 pin DDR DIMM socket IDE Figure 1 1 PCISA MARK Overview Technology Corp PCISA MARK CPU CFII Onboard 128MB Memory Figure 1 2 PCISA MARK Overview Solder Side PCISA MARK CPU 1 2 1 PCISA MARK Connectors The PCISA MARK has the following connectors onboard m 1x 4 pin AT ATX power connector m 1 168 pin DDR DIMM socket m 1xAudio CD In connector m 1 x Audio connector m 1 x Battery connector m 1 Compact Flash card socket m 1 CPU fan connector m 1x Digital I O connector m 1 x External connector m 1 Floppy connector m 2 IDE interface connectors 1 x 40 pin and 1 x 44 pin m 1x Inverter connector m 1 x Inf
50. DEFAULT m 278 IRQ5 Onboard Parallel Mode Normal Use the Onboard Parallel Mode option to select parallel port operation mode gt Normal DEFAULT EPP ECP ECP EPP The parallel port operates in the standard parallel port SPP mode This parallel port mode works with most parallel port devices but is slow The parallel port operates in the enhanced parallel port mode EPP The EPP mode supports bi directional communication between the system and the parallel port device and the transmission rates between the two are much faster than the SPP mode The parallel port operates in the extended capabilities port ECP mode The ECP mode supports bi directional communication between the system and the parallel port device and the transmission rates between the two are much faster than the SPP mode The parallel port is compatible with both ECP and EPP devices Page 141 PCISA MARK CPU x ECP Mode Use 3 The ECP Mode Use DMA option is only available if the Parallel Port Mode option is set to ECP mode Use the ECP Mode Use DMA option to specify the DMA channel the parallel port must use in the ECP mode gt 1 The parallel port uses DMA Channel 1 in ECP mode gt 3 DEFAULT The parallel port uses DMA Channel 3 in ECP mode x Parallel Port EPP Type EPP1 7 The EPP Mode Select option is only available if the Parallel Port Mode option is set to EPP mode Use the E
51. DY 4 SDDACK 4 SDAI 6033 86 SPESI gt 5 508 29 spcsa Figure 3 12 Secondary IDE Device Connector Location PIN NO DESCRIPTION PIN NO DESCRIPTION 1 RESET 2 GROUND 3 DATA 7 4 DATA 8 5 DATA 6 6 DATA 9 7 DATA 5 8 DATA 10 9 DATA 4 10 DATA 11 11 DATA 3 12 DATA 12 13 DATA 2 14 DATA 13 15 DATA 1 16 DATA 14 17 DATA 0 18 DATA 15 19 GROUND 20 N C 21 DRQ 22 GROUND 23 IOW 24 GROUND 25 IOR 26 GROUND 27 CHRDY 28 PULL LOW TO GND PCISA MARK CPU 29 DACK 30 GROUND 31 INTERRUPT 32 N C 33 SA1 34 N C 35 SAO 36 SA2 37 CS1 38 HDC CS3 39 HDD ACTIVE 40 GROUND 41 5V 42 5V 43 GROUND 44 N C Table 3 13 Secondary IDE Connector Pinouts 3 2 12 Inverter Connector CN Label CN6 CN Type 5 pin wafer connector CN Location See Figure 3 13 CN Pinouts See Table 3 14 The inverter connector is connected to the LCD backlight Technology Corp PCISA MARK CPU Figure 3 13 Inverter Connector Location PIN NO DESCRIPTION 1 Ground 2 Ground 3 12V 4 Ground 5 LCD Enable Table 3 14 Inverter Connector Pinouts PCISA MARK CPU 3 2 13 IrDA Interface Connector CN Label CN18 CN Type 5 pin header CN Location See Figure 3 14 CN Pinouts See Table 3 15
52. Delete RAID Setting amp Partition WARNING If a RAID configuration is deleted all data previously stored on the member drives of the RAID configuration will also be deleted Step 1 Delete a RAID setting Use the arrow keys to highlight Delete RAID Setting amp Partition and press ENTER A flashing E appears at the Drive Menu where the member drives to be removed can be chosen Step 2 Confirm Delete The Data on RAID drives will be erased Y N confirm box appears Press Y Page 217 PCISA MARK CPU E 4 6 Delete All RAID Setting amp Partition Step 1 2 If a RAID configuration is deleted all data previously stored the member drives of the RAID configuration will also be deleted Delete RAID Settings Use the arrow keys to highlight Delete All RAID Setting amp Partition and press ENTER Confirm delete The Data on RAID drives will be erased Y N confirm box appears Press Y E 4 7 Rebuild RAID Array The Rebuild RAID Array option can rebuild a RAID array if a member of a RAID configuration should fail Neither RAID 0 nor JBOD provides data redundancy The Rebuild RAID Array option only applies to RAID1 arrays and is applicable when a member of a RAID1 configuration has failed Step 1 Step 2 Page 218 Select Rebuild Array Use the arrow keys to highlight Rebuild RAID Array and press ENTER A flashing R appears in the li
53. Disabled Use the Suspend Mode option to specify the amount of time the system can be inactive before the system enters suspend mode The Suspend Mode options are m Disabled DEFAULT m 1Min m 2 Min m 4 Min m 6Min m 8Min 10 Min 20Min m 30 Min m 40 Min m 1 Hour 5 6 2 Wake Up Events Use the Wake Up Events menu BIOS Menu 9 to specify what components can rouse the system from a suspend or doze state when there is activity on the components Page 150 IEI Technology Corp Phoenix AwardBIOS CMOS Setup Utility wake Up Events ve LPT amp COM LPT COM HDD amp FDD ON Menu Level Pb PCI Master OFF Wake Up On LAN Disabled Modem Ring Resume Disabled RTC Alarm Resume Disabled Date of Month 0 lt Resume Time hh mm ss Or 37 5 0 Primary INTR ON gt IRQS Activity Monitoring Press Enter 1 Enter Select PU PD Value 10 5 ESC Exit Fl General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 9 Wake Up Events VGA OFF Use the VGA option to enable the system to monitor activity on the VGA display and rouse the system from a suspend or doze state when activity on the VGA is detected gt Off DEFAULT The system is not roused from a doze state or suspend state when activity is detected on the VGA gt On The system is roused from a doze state or suspend state when activity is detected on the VGA
54. EFAULT Quick POST occurs after the computer is turned on Boot From LAN Control Disabled Use the BOOT From LAN Control option to enable the system to be booted from a remote system Disabled DEFAULT The system cannot be booted from a remote system through the LAN Enabled The system can be booted from a remote system through the LAN Page 120 IEI Technology Corp PCISA MARK CPU ls SATA Boot ROM Control Disabled Use the SATA Boot ROM Control option to configure SATA IDE use in DOS mode Disabled DEFAULT Disables SATA IDE use DOS mode Enabled Enables SATA IDE use in DOS mode 5 Boot Device Use the Boot Device options to select the order of the devices the system boots from There are three boot device configuration options First Boot Device Default Floppy m Second Boot Device Default HDD 0 m Third Boot Device Default LS120 Using the default values the system first looks for a floppy disk to boot from If it cannot find a floppy disk it boots from an HDD If both the floppy and the HDD are unavailable the system boots from a CDROM drive Boot Device configuration options are Floppy m 15120 m 00 0 SCSI CDROM HDD 1 ZIP100 USB FDD m USB ZIP USB CDROM USB HDD m LAN m Disabled Page 121 PCISA MARK CPU Boot Other Device Enabled Use the Boot Other Device option to determine whether
55. FAULT System appears off The CPU is stopped RAM is refreshed the system is running in a low power mode S3 STR System appears off The CPU has no power RAM is in slow refresh the power supply is in a reduced power mode Control by APM Yes Use the PM Control by APM option to activate the Advanced Power Management No APM activated gt Yes DEFAULT APM activated Video Off Option Suspend gt Off Use the Video Off Option option to specify the status of the system display when the system is in a sleep or suspend state Page 145 PCISA MARK CPU Always On Display never turned off by system BIOS Suspend Off DEFAULT Display is off during when the system is in the suspend mode All Modes gt Display is off when the system is in the doze standby or suspend mode Video Method Suspend gt Off Use the Video Off Method option to specify what display components are powered off when the system enters a sleep or suspend stat Method Blank Screen The display screen goes blank when the video is disabled VIH SYNC Blank DEFAULT The display screen goes blank and the V SYNC and H SYNC signals from VGA cards to the display are turned off when the video is disabled gt DPMS Support If the system supports the VESA Video Electronics Association DPMS Display Power Management Signaling select this option Power management softwa
56. HA Wu y 17 1 2 PCISA MARK OVERVIEW ella 18 1 2 1 PCISA MARK EEE e ERR ennemis CENA 20 1 2 2 Technical Olii 21 2 DETAILED SPECIFICATIONS lt css s ss esacesesesesoeeseeeseeseene cene ari 23 PAGES Ug ae 24 2 2 COMPATIBLE BACKPLANES 1 0000001 24 2 3 BOARD DIMENSIONS leer 24 24 2 5 VIA 1718206868 SYSTEM CHIPSET 25 20 DATAFLOW serie lalla 26 2 7 LCD AND PLAT PANEL DISPLAY SUPPORT 27 2 7 1 High Screen Resolution Display Support ii 27 2 8 rela 28 2 9 PCI BUS INTERFACE SUPPORT agile lic leoni 28 2 10 ETHERNET selle 28 2 10 1 Ethernet Controller Overview 28 2 10 2 Ethernet Controller Features sis P 29 0 00 30 dg 30 20100000010012 30 2 11 3 Floppy Disk Drive FDD Em 30 2 1 4 Compael ES 30 2 12 SERITAL PORTS screen 31 PARTIRE 31 2 13 1 Audio Codec CROCI kek 31 2 13 2 Audo Codec Features 31 HK 32 606666606 010016066666666 REAL TIME 2 14 2 15 SYSTEM 32 2 16 danek 33 2 17 INFRARED DATA AS
57. IO Mode Auto Use the Drive PIO Mode options below to select the Programmed Input Output PIO mode for the following HDDs m Primary master m Primary slave m Secondary master m Secondary slave gt Auto DEFAULT The computer selects the correct mode gt Mode 0 PIO mode 0 selected with a maximum transfer rate of 3 3MBps gt Model PIO mode 1 selected with a maximum transfer rate of 5 2MBps 2 mode 2 selected with a transfer rate of 8 3MBps 137 PCISA MARK CPU 3 mode 3 selected with transfer rate of 11 1MBps Mode 4 PIO mode 4 selected with a maximum transfer rate of 16 6MBps gt IDE UDMA Auto Use the IDE UDMA option below to select the Ultra DMA UDMA mode for the following HDDs master slave m Secondary master m Secondary slave gt Auto DEFAULT The computer selects the correct UDMA Disabled The UDMA for the HDD device is disabled Init Display First PCI Slot Use the Init Display First option to select the primary display device PCI Slot DEFAULT The display connected to the PCI slot is the primary display gt AGP The AGP display is the primary display gt IDE HDD Block Mode Enabled If the drive connected to the system supports block mode use the IDE HDD Block Mode option to enable the system to detect the optimal number of block read writes pe
58. ISA MARK CPU Step 5 The Readme in Figure 6 4 appears Click YES to continue Service Pack 1 README Service Pack 1 README Press PAGE DO WN key to see the rest of document VIA Service Pack 41n1 README TXT Service Pack 4 In 1 is Copyright C 1999 VIA Technologies Inc Table of Contents About VIA 4 In 1 Setting Update Technical Support Special Note WinFast AGP VGA users only Clicking Yes means you have read and agreed with the license agreement and README Click No to decline and Exit lt Back Yes No Figure 6 4 Readme Information 169 PCISA MARK CPU Step 6 Select Normal Installation or Quick Installation See Figure 6 5 Click to continue 4in1 Setup Mode Option VIA Click to enable Normal or Quick Installation 4 IN 1 Driver Normal Installation Quick Installation gt Back Cancel Figure 6 5 VIA Chipset Driver Installation 170 Technology Corp PCISA MARK CPU EEE lt 20 Step 7 Select the setup components see Figure 6 6 that must be installed in the system There are setup components VIA PCI IDE Bus Driver AGP Driver AGP3 0 Supported VIA INF Driver 1 70A Click NEXT to continue the installation Se
59. LPT amp COM LPT COM Use the LPT amp COM option to enable the system to monitor activity on the LPT display and serial ports and rouse the system from a suspend or doze state when activity on the LPT display and serial ports is detected gt None DEFAULT The system is not roused from a doze state or suspend state when activity is detected on the LPT display and serial ports PCISA MARK CPU gt LPT The system is roused from a doze state or suspend state when activity is detected on the LPT port gt The system is roused from a doze state or suspend state when activity is detected on the COM port gt LPT COM The system is roused from a doze state or suspend state when activity is detected on the LPT port or the COM port gt HDD ON Use the HDD amp FDD option to enable the system to monitor activity on the HDD and FDD and rouse the system from a suspend or doze state when activity on the HDD and FDD is detected gt Off The system is not roused from a doze state or suspend state when activity is detected on the HDD and FDD gt DEFAULT The system is roused from a doze state or suspend state when activity is detected on the HDD and FDD PCI Master OFF Use the PCI Master option to enable the system to monitor activity on the PCI master and rouse the system from a suspend or doze state when activity on the PCI master is detected 152 T
60. M 3 5 in None Drive A Drive B Video EGA VGA Halt On All But Keyboard Base Memory 640K Extended Memory 65472K Total Memory 1024 Item Help Menu Level change the day month year and century 11 Enter Select PU PD Value F10 Save F5 Previous Values F6 Fail Safe Defaults BIOS Menu 2 Standard CMOS Features gt Date Day mm dd yyyy The Date option sets the system date gt Time hh mm ss The Time option sets the system time ESC Exit 1 Help F7 Optimized Defaults PCISA MARK CPU IDE Master and Slave When entering setup BIOS auto detects the presence of IDE devices The Standard CMOS Features menu shows the status of the auto detected IDE devices The following IDE devices are detected and shown in the Standard CMOS Features menu m IDE Primary Master m IDE Primary Slave m IDE Secondary Master m IDE Secondary Slave IDE device configurations are changed or set in the IDE Configuration menu BIOS Menu 3 If an IDE device is detected and one of the above listed two BIOS configuration options is selected the IDE configuration options shown in Section 5 2 1 appear Drive A 1 44M 3 5in Use the Drive A configuration option to specify the floppy drive type installed in the system The floppy drive configuration options are m None m 360K 5 25 in m 12M 5 25 in m 720K 3 5 in 1 44M 3 5in
61. PP Mode Select option to select the parallel port mode standard for the parallel port 9 1 9 is selected as standard 1 7 DEFAULT EPP 1 7 is selected the EPP standard Onboard Legacy Audio Enabled Use the Onboard Legacy Audio option to enable any legacy audio devices in the system Disabled Legacy audio devices disabled Enabled DEFAULT Legacy audio devices enabled Sound Blaster Disabled Use the Sound Blaster option to enable the onboard sound blaster gt Disabled DEFAULT Sound blaster disabled Enabled Sound blaster enabled Page 142 Technology Corp PCISA MARK CPU SS SBI O Base Address 220H Use the SB I O Base Address option to select the base address for the sound blaster Address options are listed below 220 DEFAULT m 240 m 260 m 280 SB IRQ Select IRQ5 Use the SB IRQ Select option to select the IRQ address for the sound blaster Address options are listed below m 5 DEFAULT m 7 m m IRQ10 gt SBDMA Select 1 Use the SB DMA Select option to select the sound blaster DMA direct memory access address DMA address options are listed below m DMAO wm DMA 1 DEFAULT m DMA2 m DMA3 lt MPU 401 Disabled Use the MPU 401 option to enable the MPU 401 MIDI Processing Unit Disabled DEFAULT MPU 401 disabled Enabled MPU 401
62. Panel 202 Figure D 4 Sound Effects Manager ALC655 203 List of Tables Table 1 1 PCISA MARK Model Specifications 16 Table 1 2 Technical Specifications kk KK KAK 22 Table 2 1 CRT and Panel Screen Resolutions Supported 28 Table 2 2 Power Consumption for VIA Mark 800 2 34 Table 2 3 Power Consumption for VIA Mark 533 2 34 Table 3 1 Peripheral Interface 40 Table 3 2 External Peripheral Interface Connectors ennen 40 Table 3 3 On board KAKA KA KA KA 41 Table 3 4 Audio In Connector Pinout 42 Table 3 5 Audio Connector 44 Table 3 6 Battery Connector KA KAW AR 45 Table 3 7 Compact Flash Connector Pinouts
63. RK Power Support AT ATX power support PCISA MARK CPU SPECIFICATION DESCRIPTION Power Consumption 5V 2 52A Mark 533MHz PC133MHz 512MB 5V 2 94A VIA Mark 800MHz PC133MHz 512MB 3D Mark Watchdog Timer Software programmable 1 255 sec system reset IrDA One integrated IrDA connector supports either a Serial Infrared SIR or an Amplitude Shift Keyed IR ASKIR interface IDE Interface Two IDE channels support four Ultra ATA 100 66 33 devices Serial ATA SATA Two SATA channels with 150Mb s transfer rates Supports RAID 0 1 with ALI M5283 Floppy Disk Drive FDD Supports one FDD SSD Compact Flash CF II USB Interfaces Supports four USB 1 1 devices Serial Ports Two RS 232 COM ports Audio Interface Realtek ALC655 with AC 97 codec Ethernet Dual Realtek 10 100 Base T RTL8100C BIOS AWARD Physical Dimensions 185mm x 127 6mm Operating Temperature Minimum 0 C 32 F Maximum 60 C 140 F Operating Humidity Minimum 5 Maximum 95 non condensing Weight GW 1 0Kg Table 1 2 Technical Specifications Technology Corp PCISA MARK CPU Chapter 2 Detailed Specifications Page 23 PCISA MARK CPU 2 1 Overview This chapter describes the specifications and onboard features of the PCISA MARK CPU car
64. S CMOS Setup Utility Advanced BIOS Features Third Boot Device Boot Other Device Swap Floppy Drive Boot Up Floppy Seek Boot Up NumLock Status Gate A20 Option Typematic Rate Setting LS120 Enabled Disabled Enabled on Fast Disabled Typematic Rate Chars Sec 6 Typematic Delay Msec Security Option 05 Select For DRAM gt 64MB Video BIOS Shadow C8000 CBFFF Shadow CCOOO CFFFF Shadow D0000 D3FFF Shadow D4000 D7FFF Shadow D8000 DBFFF Shadow DCOOO DFFFF Shadow Small LogoCEPA Show 250 Setup Non 0s2 Enabled Disabled Disabled Disabled Disabled Disabled Disabled Disabled Item Help Menu Level 3 11 F5 Previous Values F6 Enter Select PU PD Value Fail safe Defaults BIOS Menu 4 Advanced BIOS Features ESC Exit 1 Help F7 Optimized Defaults PCISA MARK CPU Virus Warning Disabled Many disk diagnostic programs can cause the above warning message to appear when the program attempts to access the boot sector table If you are running such a program it is recommended that the virus protection function be disabled beforehand Use the Virus Warning option to enable BIOS to monitor the boot sector and partition table of the HDD for any attempted modification If a modification attempt is made the BIOS halts the system and an error message appears If necessary an anti virus program
65. SA MARK jumper locations els EZ u u Figure 4 4 Jumper Locations 100 Technology Corp PCISA MARK CPU cc 4 6 1 Function Setup Jumper Jumper Label JP2 Jumper Type 2 pin header Jumper Settings See Table 4 2 Jumper Location See Figure 4 4 The CF Card Setup jumper sets the compact flash card as either the slave device or the master device Open 1 2 Default Slave Normal Operation Table 4 2 CF Card Function Setup Jumper Settings 4 6 2 Clear CMOS Jumper Jumper Label JP3 Jumper Type 3 pin header Jumper Settings See Table 4 3 Jumper Location See Figure 4 4 If the PCISA MARK fails to boot due to improper BIOS settings use this jumper to clear the CMOS data and reset the system BIOS information To do this use the jumper cap to close pins 2 and 3 for a few seconds then reinstall the jumper clip back to pins 1 and 2 If the CMOS Settings Wrong message is displayed during the boot up process the fault may be corrected by pressing the F1 to enter the CMOS Setup menu Do one of the following Enter the correct CMOS setting m Load Optimal Defaults m Load Failsafe Defaults Page 101 PCISA MARK CPU Short 1 2 Default Keep CMOS Setup Normal Operation Table 4 3 Clear CMOS Jumper Settings 4 6 3 Flat Panel Power S
66. SOCIATION IRDA 33 2 18 USB INTERFACES iran 33 2 19 OPERATING TEMPERATURE AND TEMPERATURE CONTROL eee 33 2 20 POWER CONSUMBTION 33 2 21 PACKAGED CONTENTS AND OPTIONAL ACCESSORY 35 PROCREARE I 35 2 21 2 Optional Accessory BONES cia 35 CONNECTORS AND JUMPERS sscicscssscesssesiocconcosnssnccnsssesenscocsecesioonsacsnsseesocscecsens 37 3 1 PERIPHERAL INTERFACE CONNECTORS 38 3l PCKA MARK 1 1 raid 38 3 1 2 Peripheral Interface Connectors prio 39 3 1 3 External Peripheral Interface Connectors 40 011 1 111 rana 41 3 2 INTERNAL PERIPHERAL CONNECTORS 41 3 2 1 Audio CD In Connector 41 3 2 2 Audio Connector Line out Line in amp MIC 43 3 2 3 grid cio EET 44 3 2 4 Compact Flash Connector ettet 45 32 9 CPU Fan CON rta 48 3 2 6 Digital Input Output DIO Connector ii 49 PANE INE E 51 3 2 6 External 53 3 2 9 Floppy Disk 222 000000000000 54 3 2 10 IDE Connector Primary ia 56 3 2 11 IDE Connector SECONDI 58 ISARCO 60 3 2 13 IrDA Interface Connector licia 62 3 2 14 Keyboard Mouse 1 20117126 suse eri
67. UART 2 Mode Select to select the UART mode for the system Standard DEFAULT RS 232C serial port gt IrDA compliant serial infrared port ASKIR Amplitude shift keyed infrared port IR Function Complex Half Use the IR Function Complex option to enable bi directional communication between the system infrared port and the external device The IR Function Complex option can be configure if 2 Mode Select is set to either HSPIR or ASKIR gt Full Bi directional communication between system infrared port and the external compliant devices occurs 2 Half DEFAULT Communication between the system infrared port and the external compliant devices occurs is a single direction at a time only TX RX inverting enable No Yes Use the TX RX Inverting enable option to invert the transmitted and received signals The table below lists the configuration options BIOS Option TX Transmitted RX Received Default No No Not inverted Not Inverted DEFAULT No Yes Not Inverted Inverted Yes No Inverted Not Inverted Yes Yes Inverted Inverted Page 140 Technology Corp PCISA MARK CPU a Onboard Parallel Port 378 IRQ7 Use the Onboard Parallel Port option to specify a logical LPT port address and corresponding interrupt for the physical parallel port The Onboard Parallel Port options are m Disabled m 3BC IRQ7 m 378 IRQ7
68. a TTL LCD cable to the CN26 miniature crimping connector on the CPU card A keyed pin on the connector prevents it from being connected incorrectly Technology Corp PCISA MARK CPU ee 4 5 6 TFT TTL LCD Installation To connect a TFT TTL LCD to the CPU card follow the instructions below Step 1 Connect the 40 pin connector end of a TFT TTL LCD cable to the CN27 miniature crimping connector on the CPU card A keyed pin on the connector prevents it from being connected incorrectly 4 6 Jumper Settings jumper is metal bridge that is used to close electrical circuit It consists of PLASTIC CLIP OPEN CLOSED 1 2 3 2 3 CLOSED two metal pins and a small metal clip often protected by a plastic cover that slides Jumper over the pins to connect them CLOSE SHORT jumper means connecting the pins of the jumper with the plastic clip and to OPEN a jumper means removing the plastic clip from a jumper PCISA MARK CPU Before the PCISA MARK is installed in the system the jumpers must be set in accordance with the desired configuration The PCISA MARK CPU card has four on board jumpers Description Label Type CF card function setup JP2 2 pin header Clear CMOS JP3 3 pin header Flat panel power select JP4 3 pin header PCI VIO voltage select JP5 3 pin header Figure 4 4 shows the PCI
69. able 3 22 RS 232 Serial Port Connectors 76 PCISAI MARK CPU Card Table 3 24 SATA Drive Connector 77 Table 3 25 TFT LCD TTL Connector Pinouts 79 Table 3 26 CN23 USB Port Connector Pinouts eese 81 Table 3 27 CN24 USB Port Connector Pinouts eese 81 Table 3 28 LAN EE Preis 83 Table 3 29 RJ 45 Ethernet Connector 84 Table 3 30 Mini DIN 6 PS 2 85 Table 3 31 USB Port Pinout 86 Table 3 32 VGA Connector 87 Table 4 1 IEI Provided Cables entente niti reet heute Kak We HH KB eset 96 Table 4 2 CF Card Function Setup Jumper Settings 101 Table 4 3 Clear CMOS Jumper Settings sese 102 Table 4 4 Flat Panel Select Jumper Settings serene 102 Table 4 5 PCI VIO Voltage Jumper Settings sees 103 Table 5 1 BIOS Navigation
70. acket for easy connection to a PS 2 keyboard or PS 2 mouse The card comes with a cable to convert the mini DIN 6 PS 2 into two mini DIN 6 PS 2 connectors for keyboard and mouse connection Technology Corp PCISA MARK CPU Figure 3 28 Mini DIN 6 PS 2 Connector PIN NO DESCRIPTION 1 KEYBOARD DATA 2 MOUSE DATA 3 GROUND 4 5V 5 KEYBOARD CLOCK 6 MOUSE CLOCK Table 3 31 Mini DIN 6 PS 2 Connector 3 3 3 USB Connector CN Label CN22 CN Type USB port CN Location See Figure 3 26 labeled number 3 CN Pinouts See Table 3 32 The PCISA MARK has a one rear panel USB port This port connects to USB 1 1 devices PCISA MARK CPU PIN NO DESCRIPTION 1 vcc 2 DATA1 3 DATA1 4 GROUND Table 3 32 USB Port Pinouts 3 3 4 VGA connector CN Label CN19 CN Type HD D sub 15 female connector CN Location See Figure 3 26 labeled number 4 CN Pinouts See Table 3 33 A 15 pin VGA connector connects to standard displays 5 15 11 Figure 3 29 VGA Connector IEI Technology Corp PCISA MARK CPU PIN NO DESCRIPTION PIN NO DESCRIPTION 1 RED 2 GREEN 3 BLUE 4 N C 5 GROUND 6 GROUND 7 GROUND 8 GROUND 9 N C 10 GROUND 11 N C 12 DDC DAT 13 HSYNC 14 VSYNC 15 DDCCLK TEEN Tab
71. ale HD D sub 15 connector To connect a port to the motherboard follow the instructions below Step 1 Connect a standard male HD D sub 15 connector end to the VGA connector on the rear panel Step 2 Connect the other end to a display device 105 PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 106 IEI Technology Corp PCISA MARK CPU Chapter 5 BIOS Settings Page 107 PCISA MARK CPU 5 1 Introduction A licensed copy of Phoenix Award BIOS is preprogrammed into the ROM BIOS The BIOS setup program allows users to modify the basic system configuration This chapter describes how to access the BIOS setup program and the configuration options that may be changed 5 1 1 Starting Setup The Phoenix Award BIOS is activated when the computer is turned on The setup program can be activated in one of two ways 1 Press the DELETE key as soon as the system is turned on or 2 Press the DELETE key when the Press Del to enter SETUP message appears on the screen If the message disappears restart the computer and try again 5 1 2 Using Setup Use the arrow keys to highlight items press ENTER to select use the PAGEUP and PAGEDOWN keys to change entries press F1 for help and press Esc to quit Navigation keys are shown below Key Up arrow Move to the item above J Down arrow Move to the item below lt Left arrow Move to the item on the lef
72. and 16MB for ISA expansion cards that require a specified area of memory to work properly If an older ISA expansion card is used please refer to the documentation that came with the card to see if it is necessary to reserve the space gt Disabled DEFAULT Memory is not reserved for ISA expansion cards gt 15 16 Memory is reserved for ISA expansion cards P2C C2P Concurrency Enabled Use the P2C C2P Concurrency option to enable bi directional data transmission between the PCI bus and the CPU 129 PCISA MARK CPU Disabled Data between the PCI and CPU can only be transferred in one direction at a time Enabled DEFAULT Data between the PCI and CPU can be transferred in both directions at the same time System BIOS Cacheable Disabled Use the System BIOS Cacheable option to enable caching of the system BIOS ROM at F0000h FFFFFh resulting in better system performance However if any program writes to this memory area a system error may result Disabled DEFAULT System BIOS not written to FO000h FFFFFh Enabled System BIOS is written to FO000h FFFFFh Video RAM Cacheable Disabled Use the Video RAM Cacheable option to enable caching of the video BIOS ROM at C0000h C7FFFh via the L2 cache Disabled DEFAULT Video BIOS not written to CO000h C7FFFh Enabled Video BIOS is written to FOOOOh FFFFFh Frame Buffer Size 16M Use the Frame Buffer Size opt
73. applicable for naming an array Step 5 View the array A prompt appears to proceed with drive copy The Source and RE Destination drives are indicated as M and m in the Drive Menu 214 Technology Corp PCISA MARK CPU 1 reduce the chance of losing data ALi imposes certain limitations on the RAID configuration options PATA drives connected on the same IDE channel cannot be selected as the members of a RAID 1 array Avoid mixing PATA and SATA disk drives in a RAID 1 array 2 Always use disk drives of the same capacity to create a RAID array The excessive capacity of a larger disk drive cannot be utilized because data stripes are equally distributed across all members of a RAID array Logical RAID Volume Physical Disks Mirroring E 4 3 Create JBOD for Integrated Capacity JBOD is defined as Just a Bunch of Drives JBOD provides neither performance gains nor data redundancy Page 215 PCISA MARK CPU WARNING Step 1 Step 2 Step 3 Step 4 Page 216 All data previously stored on the member drives of a RAID configuration is destroyed during the RAID initialization process If used drives are used to create a RAID array make sure the data has been moved or backed up before creating a RAID array out of the disk drives Select Create JBOD for Integrated Capacity Use the arrow keys to
74. ash Connector Pinouts PCISA MARK CPU 3 2 5 CPU Fan Connector CN Label CN7 CN Type 3 pin wafer CN Location See Figure 3 6 CN Pinouts See Table 3 8 The cooling fan connector provides a 5V 500mA current to a CPU cooling fan The connector has a rotation pin to get rotation signals from fans and notify the system so the system BIOS can recognize the fan speed Please note that only specified fans can issue the rotation signals oom Jmm JO Figure 3 6 CPU Fan Connector Location Technology Corp PCISA MARK CPU ls PIN NO DESCRIPTION 1 GROUND 2 5V 3 Rotation Signal Table 3 8 CPU Fan Connector Pinouts 3 2 6 Digital Input Output DIO Connector CN Label CN11 CN Type 10 pin header CN Location See Figure 3 7 CN Pinouts See Table 3 9 The digital IO port of PCISA MARK is 5V CMOS level Internal pull up exists on the output Page 49 PCISA MARK CPU DESCRIPTION GROUND OUTPUT 0 OUTPUT 2 INPUT 0 INPUT 2 Table 3 9 Digital I O Connector Pinouts Technology Corp PCISA MARK CPU EEE DR DD KK 3 2 7 DIMM socket CN Label CN16 CN Type 168 pin DIMM socket CN Location See Figure 3 8 PCISA MARK has 168 DIMM socket that supports 3 3V non buffered PC100 13
75. ay strobe and bank cycle time as well as valid settings for the module and the manufacturer s code The SPD enables the BIOS to read the spec sheet of the DIMM on boot up and then adjust the memory timing parameters accordingly gt Disabled DRAM timing parameters can be manually set using the DRAM sub items Enabled DEFAULT DRAM timing parameter are set according to the DRAM Serial Presence Detect SPD If the Configure DRAM Timing by SPD option is disabled the following configuration options appear wm Clock m SDRAM Cycle Length m Bank Interleave gt DRAM Clock Host CLK Use the DRAM Clock option to select the RAM FSB Host CLK DEFAULT RAM FSB is 100MHz gt HCLK 133M RAM FSB is 133MHz Page 128 Technology Corp PCISA MARK CPU ee mi SDRAM Cycle Length 3 Use the SDRAM Cycle Length option to specify the time delay in clock cycles the system must wait before the SDRAM starts to carry out a read command after the read command is received m 2 m 3 Default Bank Interleave Disabled Use the Bank Interleave option to specify how multiple modules communicate with each other Interleaving enables access to a second memory bank when the first memory bank is being accessed The following configuration options are available m Disabled m 2 Bank 4 Bank DEFAULT Memory Hole Disabled Use the Memory Hole option to reserve memory space between 15MB
76. ble easy audio range settings Ten frequency bands can be configured m Speaker Configuration Multi channel speaker settings are configured in this menu Configurable options include 0 O O O 0 Headphone Channel mode for stereo speaker output Channel mode for 4 speaker output Channel mode for 5 1 speaker output Synchronize the phonejack switch with speakers settings m Speaker Test Each speaker connected to the system is tested individually to see if the 4 channel or 6 channel audio operates properly S PDIF In amp S PDIF Out These functions are currently not supported m Connector Sensing Realtek ALC655 detects if an audio device is plugged into the wrong connector If an incorrect device is plugged in a warning message appears HRTF Demo Adjust HRTF Head Related Transfer Functions 3D positional audio here before running 3D applications m Microphone Microphone noise suppression is enabled in this menu m General information about the installed AC 97 audio configuration utility is listed here 205 PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 206 IEI Technology Corp PCISA MARK CPU Appendix RAID Setup 207 PCISA MARK CPU E 1 Introduction The ALi M5283 SATA RAID chipset can control parallel ATA PATA and serial ATA SATA disks The ALi controller supports PATA UDMA
77. d After this option is selected a red dialogue box appears with Enter Password Type the password and press ENTER Retype the original password into the Confirm Password dialogue box and press ENTER To disable the password simply press ENTER in the Enter Password dialogue box then press any key in the Password Disabled dialogue box Set User Password By default no user password is set To install a user password select this field and enter the password After this option is selected a red dialogue box appears with Enter Password Type the password and press ENTER Retype the original password into the Confirm Password dialogue box and press ENTER To disable the password simply press ENTER in the Enter Password dialogue box then press any key in the Password Disabled dialogue box gt Save amp Exit Setup Select this option to save any configuration changes made and exit the BIOS menus Exit Without Saving Select this option exit the BIOS menus without saving any configuration changes Page 111 5 2 Standard Features Use the Standard CMOS Features BIOS menu BIOS Menu 2 to set basic BIOS configuration options Phoenix AwardBIOS CMOS Setup Utility Standard CMOS Features Date mm dd yy Sun Oct 17 1999 Time Chh mm ss 16 49 47 IDE Primary Master IDE Primary Slave IDE Secondary Master IDE Secondary Slave 1 44
78. d in detail 2 2 Compatible IE Backplanes The PCISA MARK CPU card is compatible with all backplanes For more information on these backplanes please visit the website or contact your CPU card reseller or vendor 2 3 Board Dimensions The dimensions of the board are listed below m Length 185mm m Width 127 6mm 2 4 CPU Support PCISA MARK has a preinstalled 800MHz or 533MHz ultra low voltage ULV VIAG MARK processor The VIA Mark CoreFusion processor platform offers power efficiency native x86 performance and advanced hardware based security combined with legacy support Based on the Nehemiah core and 0 13u process technology the VIA Mark CoreFusion processor platform is scalable to 800MHz with a maximum TDP of just 8 watts facilitating silent fanless designs Some of the VIA MARK features are listed below m Rich Integration Combining the VIA Nehemiah processor core architecture with a feature rich Northbridge in a single package the VIA Mark CoreFusion processor platform has rich x86 integration offers full legacy support advanced integrated graphics a military grade hardware security engine and unparalleled connectivity m 53 Graphics Unichrome Pro Graphics Core Integrating the S3 Graphics ProSavage4 graphics core the Mark CoreFusion processor platform boasts dual independent display support an integrated LVDS DVI transmitter a video capture port and display r
79. echnology Corp PCISA MARK CPU e Off DEFAULT The system is not roused from a doze state or suspend state when activity is detected on the PCI master The system is roused from a doze state or suspend state when activity is detected on the PCI master PCI Master OFF Use the PCI Master option to enable the system to monitor activity on the PCI master and rouse the system from a suspend or doze state when activity on the PCI master is detected gt Off DEFAULT The system is not roused from a doze state or suspend state when activity is detected on the master gt The system is roused from a doze state or suspend state when activity is detected on the PCI master Wake Up On LAN Disabled Use the Wake Up On LAN option to enable activity on the LAN to rouse the system from a suspend or doze state Disabled DEFAULT Wake event not generated by LAN activity Enabled Wake event generated by LAN activity Modem Ring Resume Disabled Use the Modem Ring Resume option to enable activity on the modem to rouse the system from a suspend or doze state 153 PCISA MARK CPU Disabled DEFAULT Wake event not generated by modem activity Enabled Wake event generated by modem activity RTC Alarm Resume Disabled Use the RTC Alarm Resume option to specify when the computer is
80. ector Locations PIN NO DESCRIPTION 1 GND 2 5 3 5 4 5 S RXN 6 S RXP 7 GND Table 3 25 SATA Drive Connector Pinouts PCISA MARK CPU 3 2 23 TFT LCD Connector CN Label CN27 CN Type 40 pin crimp connector CN Location See Figure 3 24 CN Pinouts See Table 3 26 This connector is connected to a TFT LCD TTL display device 42 LCD o LCD i LCD EURO LCD 0 P FPS 20 FPIO 26 FP16 zs l FP23 FP22 m FPHS 38 4 9 ED mmm i Figure 3 24 TFT LCD TTL Connector Location Technology Corp PCISA MARK CPU PIN NO DESCRIPTION PIN NO DESCRIPTION 1 2 3 GROUND 4 GROUND 5 vcc_FP 6 vcc_FP 7 I2CDATA 8 GROUND 9 10 1 11 FPD2 12 13 4 14 FPD5 15 FPD6 16 FPD7 17 FPD8 18 FPD9 19 FPD10 20 FPD11 21 FPD12 22 FPD13 23 FPD14 24 FPD15 25 FPD16 26 FPD17 27 FPD18 28 FPD19 29 FPD20 30 FPD21 31 FPD22 32 FPD23 33 GROUND 34 GROUND 35 FPCLK 36 FPVS 37 FPDEN 38 FPHS 39 12CCLK 40 ENVEE Table 3 26 TFT LCD TTL Connector Pinouts PCISA MARK CPU 3 2 24 USB Connectors 8 pin and 4 pin CN Label CN23 and CN24 CN Type 8 pin and 4 pin header CN Location See Figure 3 25
81. ed Disabled Disabled 16M 64M Enabled Auto DA 1024x768 TFT Auto ATX Enabled Disabled Auto Item Help Bn 115 Enter Select PU PD Value 10 5 ESC Exit Fl General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults Phoenix AwardBIOS CMOS Setup Utility Advanced Chipset Features Frame Buffer Size AGP Aperture Size 4 Mode AGP Driving Control x AGP Driving Value Panel Type Boot Device Select Power Supply Type Onchip USB USB Keyboard Support Onchip Sound onchip Modem CPU to PCI write Buffer PCI Dynamic Bursting PCI Master O WS Write PCI Delay Transaction PCI 2 Access 1 Retry AGP Master 1 WS Write AGP Master 1 WS Read 16M 64M Enabled Auto DA 1024x768 Auto ATX Enabled Disabled Auto Auto Enabled Enabled Enabled Disabled Enabled Disabled Disabled Item Help B 115 Enter Select PU PD Value Fail Safe Defaults F5 Previous Values BIOS Menu 5 Advanced Chipset Features F10 Save ESC Exit F1 General Help F7 Optimized Defaults PCISA MARK CPU DRAM Timing by SPD Enabled Use the DRAM Timing by SPD option to enable the system to use the SPD Serial Presence Detect EEPROM to configure the DRAM timing The SPD EEPROM contains all necessary DIMM specifications including speed of the individual components such as CAS column arr
82. ed copy of Phoenix Award BIOS The features of the flash BIOS used are listed below SMIBIOS DMI compliant Console redirection function support m PXE Pre Boot Execution Environment support USB booting support 2 17 Infrared Data Association IrDA Interface The PCISA MARK IrDA supports the following interfaces Serial Infrared SIR m Shift Keyed Infrared ASKIR 2 18 USB Interfaces The PCISA MARK has one external USB interface and two internal USB connectors The board supports a total of five USB devices The USB interfaces support USB 1 1 2 19 Operating Temperature and Temperature Control The maximum and minimum operating temperatures for the PCISA MARK CPU card are listed below m Minimum Operating Temperature 0 C 32 F Maximum Operating Temperature 60 C 140 F A cooling heat sink is installed on the CPU Thermal paste is smeared on the lower side of the heat sink before it is mounted on the CPU 2 20 Power Consumption Table 2 2 shows the power consumption parameters for the PCISA MARK for the VIA Mark 800 2 when 512MB of PC133MHz SDRAM is installed in the system PCISA MARK CPU 5V 2 52A Table 2 2 Power Consumption for VIA Mark 800 MHz Table 2 2 shows the power consumption parameters for the PCISA MARK for the VIA Mark 533MHz when 512MB of PC133MHz SDRAM is installed in the system 5V 2 94A Table 2 3 Power Consumption for VIA Mark 533 MHz IEI
83. elect WARNING Making the wrong setting on this jumper may cause irreparable damage to both the CPU card and the LCD screen connected to the on board connector Jumper Label JP4 Jumper Type 3 pin header Jumper Settings See Table 4 4 Jumper Location See Figure 4 4 This jumper allows the user to set the voltage for the LCD panel Before setting this jumper refer to the LCD panel user guide to determine the required voltage After the required voltage is known make the necessary jumper setting in accordance with the settings shown in Table 4 4 Description Table 4 4 Flat Panel Select Jumper Settings Page 102 Technology Corp PCISA MARK CPU es Sees 4 6 4 PCI VIO Voltage Select Jumper Jumper Label JP5 Jumper Type 3 pin header Jumper Settings See Table 4 5 Jumper Location See Figure 4 4 Use the JP5 jumper to select the voltage of the PCI connector Table 4 5 PCI VIO Voltage Jumper Settings 4 7 Installing a Compact Flash Card A Compact Flash 2 card slot is located on the solder side of the CPU card When appropriately formatted a CFII card can serve as a bootable hard drive in applications where installation space is limited The card occupies a secondary IDE channel Configuration options can be found through the BIOS configuration utility To install a CFII card follow the instructions below Step 1 the PCISA MARK over so that
84. ered The 131 PCISA MARK CPU higher the hexadecimal number is the stronger the AGP bus transmission signal is The maximum and minimum hexadecimal numbers are shown below MIN 0000 m MAX OOFF Panel 1024 x 768 TFT Use the Panel Type option to specify the type of panel connected to the system Configuration options are below 640 x 480 TFT m 800 x 600 TFT m 1024 x 768 TFT m 1280 x 1024 TFT DEFAULT 640 x 480 DSTN 800 x 600 DSTN m 1600 x 1200 DSTN 1400 x 1050 TFT 1024 x 768 DSTN 1280 x 1024 DSTN Boot Device Select Auto Use the Boot Device Select option to specify the type of display device to use Keep the default setting Auto to let the BIOS automatically select the display device gt Auto DEFAULT The BIOS selects the display device to use gt CRT Use a CRT device gt LCD Use an LCD device Power Supply Type ATX Use the Power Supply Type option to specify whether an AT or ATX power supply is connected to the system Page 132 Technology Corp PCISA MARK CPU _ gt power used gt DEFAULT power supply is used gt OnChip USB Enabled Use the OnChip USB option to enable or disable the chipset USB controller Disabled Chipset USB controller disabled Enabled DEFAULT Chipset USB controller enabled US
85. ery sensitive to static electricity and can be damaged by a sudden rush of power To protect it from being damaged during the unpacking process follow these precautions PCISA MARK CPU m Users should ground themselves to remove any static charge before touching the PCISA MARK To ground themselves users can wear a grounded wrist strap at all times or frequently touching any conducting materials that is connected to the ground m Handle the PCISA MARK by its edges Do not touch the IC chips leads or circuitry unnecessarily Do not place a PCB on top of an anti static bag Only the inside of the bag is safe from static discharge 4 3 2 Checklist When PCISA MARK is unpacked make sure the package contains the following items n 1 x PCISA MARK single board computer n 1 x ATA66 100 HDD cable n 2 SATA cable n 1 x SATA Power cable n 1 x KB MS Y cable n 1 x RS232 cable n 1 x Audio cable n 1 x Mini jumper pack n 1 x Utility CD 1 QIG quick installation guide If one or more of these items are missing contact the reseller or vendor PCISA MARK was purchased from and do not proceed any further with the installation Technology Corp PCISA MARK CPU 4 4 PCISA MARK CPU Card Installation A WARNING Note that the installation instructions described in this manual should be carefully followed in order to avoid damage to the PCISA MARK components and injury to the user
86. esigned for PCI or ISA bus architecture 1 1 Enter Select PU PD Value 10 5 ESC Exit F1 General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 13 DMA Resources The configurable options are m DMA 0assignedto PCI ISA PnP DMA 1assignedto PCI ISA PnP m DMA 3assignedto PCI ISA PnP m 5 assigned to PCI ISA PnP m 6 assigned to PCI ISA PnP 7 assigned to PCI ISA PnP PCISA MARK CPU The above options all have the following default options PCIISAPnP DEFAULT The DMA is assigned to legacy ISA for devices compliant with the original PC AT bus specification PCI ISA PNP for devices compliant with the Plug and Play standard whether designed for PCI or ISA bus architecture gt Legacy ISA The DMA is reserved by BIOS for legacy ISA devices PCI VGA Palette Snoop Disabled Use the PCI VGA Palette Snoop option to enable the system to determine whether or not some special VGA cards high end hardware MPEG decoders and other similar devices are allowed to look at the VGA palette on the video card so these devices can determine what colors are in use This option is needed very rarely and should be left Disabled unless a video device specifically requires the setting to be enabled upon installation Disabled DEFAULT Does not allow the graphics devices to examine the VGA palette on the graphics card Enab
87. esolutions of up to 1600 x 1200 pixels Technology Corp PCISA MARK CPU ED DD HH n RR DDKD KA m VIA PadLock Security Engine Utilizing the advanced native security feature set of the VIA Nehemiah processor core architecture named the VIA PadLock Security Engine the VIA Mark CoreFusion processor platform offers developers a real time military grade security engine that integrates a AES cipher engine and quantum based random number generator to help protect data exchanged and stored 2 5 VIA VT82C686B System Chipset The system chipset is the VIA VT82C686B For more information on the VIA VT82C686B refer to the VIA website PCISA MARK CPU 2 6 Data Flow Figure 2 1 shows the data flow between the system chipset the CPU and other I O interfaces that can connect to the PCISA MARK CPU card CRT CLOCK OUTPUT SYNTHESIZER VIA MARK CoreFusion TTL VIDEO SDRAM d SODIMM WEE u LVDS VIDEO OUTPUT SATA M5283 LAN1_RTL8100C PCI BUS USB1 1 LAN2_RTL8100C IDE1_40P_P 2 54 97 CODEC PCISA IDE2 44 P 2 00 COMPACT FLASH COM 1 RS 232 2 RS 232 PARALLEL Figure 2 1 Data Flow Block Diagram ipi Technology Corp PCISA MARK CPU ED DD DD DD E DK E KK RD KA 2 7 LCD and Flat Panel Displa
88. fe Defaults F7 Optimized Defaults BIOS Menu 8 Power Management Power Management Use the Power Management to specify the power management selection methods User Defined DEFAULT User must define when the system goes into a sleep state or a suspend state gt Min Saving The longest period of time that can be specified before the system enters either the Doze mode or the suspend state The longest time for either of these is one hour gt Max Saving The shortest period of time that can be specified before the system enters either the Doze mode or the suspend state The shortest time for either of these is one minute PCISA MARK CPU es Sees gt HDD Power Down Disabled Use the HDD Power Down option to specify how long the computer must wait for no activity before the HDD powers down If this option is disabled the HDD does not power down The following settings can be made m Disable DEFAULT m 1 Min m 2 Min m 3 Min m 4 Min m 5 Min m 6Min m 7 Min m 8Min m 9 Min m 10 Min m 11 Min m 12 Min m 13 Min m 14 Min m 15 Min Doze Mode Disabled Use the Doze Mode option to specify the amount of time the system can be inactive before the system enters suspend mode The Doze Mode options are Disabled DEFAULT m 1Min m 2Min m 4 Min 6Min m 8Min m 10 m 20 Min 149 PCISA MARK CPU m 30 Min m 40Min m 1 Hour Suspend Mode
89. g does not occur Enabled DEFAULT PCI dynamic bursting does occur PCI Master 0 WS Write Enabled Use the PCI Master 0 WS Write option to enable zero wait states when writes to the PCI occur gt Disabled There are no zero wait states when there are writes to the PCI bus Enabled DEFAULT There are zero wait states when there are writes to the PCI bus PCI Delay Transaction Disabled Use the PCI Delay Transaction option to support compliance with PCI specification version 2 1 The chipset has an embedded 32 bit posted write buffer to support delay transactions cycles Page 134 Technology Corp PCISA MARK CPU ls Disabled DEFAULT System not compliant with PCI specification version 2 1 Enabled System is compliant with PCI specification version 2 1 2 Access 1 Retry Enabled Use the PCI 2 Access 1 Retry option to enable the buffer to continue to attempt to write to the buffer until it is successful Disabled If the buffer is unable to write to the PCI bus on the first attempt the buffer is wiped clean and the transaction registered as failed Enabled DEFAULT The buffer continues to write to the PCI bus until it is successful Master 1 WS Read Disabled Use the AGP Master 1 WS Read option to reduce the time the AGP bus mastering device waits initiating a read command to only one wait state All system memory reads made by the
90. gins Landing Zone The Landing Zone specification indicates where the disk head will park itself after the system powers off Sector The Sector specification indicates how many logical sectors the HDD has been divided into Page 117 5 3 Advanced BIOS Features CPU and peripheral device configuration options are accessed in the Advanced BIOS Features menu BIOS Menu 4 Phoenix AwardBIOS CMOS Setup Utility Advanced BIOS Features Virus Warning CPU Internal Cache External Cache CPU 12 Cache Checking Quick Power On Self Test Boot From Lan Control SATA Boot Rom control First Boot Device Second Boot Device Third Boot Device Boot Other Device Swap Floppy Drive Boot Up Floppy Seek Boot Up NumLock Status Gate A20 Option Typematic Rate Setting Disabled Enabled Enabled Enabled Enabled Disabled Disabled LS120 Enabled Disabled Enabled on Fast Disabled x Typematic Rate Chars Sec 6 x Typematic Delay Msec 250 Item Help Menu Level Allows you to choose the VIRUS warning feature for IDE Hard Disk boot sector protection If this function is enabled and someone attempt to write data into this area BIOS will show a warning message on screen and alarm beep 115 Enter Select PU PD value F5 Previous Values F6 Fail Safe Defaults ESC Exit 1 Help F7 Optimized Defaults Phoenix AwardBIO
91. gt Voltages iii ia 162 Auto Detect DIMM PCI Enabled 163 Spread Spectrum 163 Host PCl Clock 164 190 IEI Technology Corp PCISA MARK CPU Appendix B Watchdog Timer Page 191 PCISA MARK CPU The following discussion applies to DOS environment Contact IEI support or visit the IEI website for specific drivers for more sophisticated operating systems 0 Windows and Linux The Watchdog Timer is provided to ensure that standalone systems can always recover from catastrophic conditions that cause the CPU to crash This condition may have occurred by external EMI or a software bug When the CPU stops working correctly Watchdog Timer either performs a hardware reset cold boot or a Non Maskable Interrupt NMI to bring the system back to a known state A BIOS function call INT 15H is used to control the Watchdog Timer INT 15H AH 6FH Sub function AL 2 Sets the Watchdog Timer s period BL Time out value Its unit second is dependent on the item Watchdog Timer unit select in CMOS setup Table B 1 AH 6FH Sub function Call sub function 2 to set the time out period of Watchdog Timer first If the time out value is not zero the Watchdog Timer starts counting down While t
92. he timer value reaches zero the system resets To ensure that this reset condition does not occur calling sub function 2 must periodically refresh the Watchdog Timer However the Watchdog timer is disabled if the time out value is set to zero A tolerance of at least 1096 must be maintained to avoid unknown routines within the operating system DOS such as disk that can be very time consuming 192 IEI Technology Corp PCISA MARK CPU Ai NOTE When exiting a program it is necessary to disable the Watchdog Timer otherwise the system resets Example program INITIAL TIMER PERIOD COUNTER 7 W_LOOP MOV AX 6FO2H setting the time out value MOV BL 30 time out value is 48 seconds INT 15H ADD THE APPLICATION PROGRAM 4 EXIT 1 is the application over JNE W LOOP restart the application MOV 6F02H disable Watchdog Timer MOV BL O F INT 15H EXIT 193 PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 194 IEI Technology Corp PCISA MARK CPU Appendix C Address Mapping Page 195 PCISA MARK CPU 0 1 10 Address Map 000 01F DMA Controller 020 021 Interrupt Controller 040 043 System time 060 06 Keyboard Controller 070 07F System CMOS Real time Clock 080 09F DMA Controller 0A0 0A1 Interrupt Controller
93. highlight Create JBOD for Integrated Capacity and press ENTER A flashing J appears on the Drive Menu where the member drives to be included in the JBOD array can be chosen Select RAID array drive members Use the space bar to select members of the RAID array The flashing cursor changes to a lower case s once any of the connected disk drives has been selected Follow the same method to select another member drive Confirm The Create RAID 0 Y N confirm box appears Press Y Name the array Enter a nickname for the created array Upper and lower case alphabetic numeric space and underscore characters are all applicable for naming an array NOTE To reduce the chance of losing data ALi imposes certain limitations on the RAID configuration options Parallel ATA drives connected on the same IDE channel cannot be selected as the members of a RAID1 array Avoid mixing Parallel ATA and Serial ATA disk drives in a RAID1 array Technology Corp PCISA MARK CPU es E 4 4 Stripe Size Changing the stripe size effects RAID 0 arrays Configurable options are 64K default m 32K m 16K m m 4K Select a small stripe size if the I Os to the hard drives are small and occur randomly Choose a larger stripe size if the I Os are mostly large and come in sequential orders e g playback and editing applications The default value should be appropriate for most applications E 4 5
94. io CODEC driver Step 2 Click either m The Sound Effect Manager icon the Notification Area of the system task bar see Figure D 2 or m The Sound Effect Manager icon in the Control Panel Figure D 3 O Sound Effect Manager 201 PCISA MARK CPU Figure D 2 Sound Effect Manager Icon Task Bar Sounds Speech and Audio Devices Edit View Favorites Tools Pick a task gt Adjust the system volume gt Change the sound scheme 3 Change the speaker settings or pick a Control Panel icon Sound Effect Manager J Sounds and Audio Devices Speech Figure D 3 Sound Effect Manager Icon Control Panel Page 202 IEI Technology Corp PCISA MARK CPU 3 The sound effect manager Figure D 4 AC97 Audio Configuration S PDIF Qut Connector Sensing HRTF Demo Microphone Effect General Sound Effect Equalizer Speaker Configuration Speaker Test S PDIF In Environment Padded Cell Karaoke Voice Cancellation KEY m r bd Figure D 4 Sound Effects Manager ALC655 NOTE The Sound Effect Manager shown in Figure D 4 is for the Realtek ALC655 audio CODEC Different CODECs may have different sound manager appearances The following section describes the different configuration options in the Sound Effect Manager D 2 2 Sound Effect Ma
95. ion to specify the amount of memory allocated to the integrated graphics processor when the system boots up Configuration options are m 2M m 4M m 16M DEFAULT m 32M 130 Technology Corp PCISA MARK CPU a Aperture Size 64M Use the AGP Aperture Size option to select the size of the AGP aperture The aperture is a portion of the memory address range dedicated for graphics memory address space Host cycles that hit the aperture range are forwarded to the AGP without any translation AGP Aperture Size configuration options are m 128M 64M DEFAULT m 32M m 16M m 8M m 4M AGP 4X Mode Enabled Use the AGP 4X Mode to enable AGP 4x support on the system Disabled AGP only uses the AGP 1x or AGP 2x transfer protocol Enabled DEFAULT AGP uses the AGP 4x Driving Control Auto Use the AGP Driving Control option to enable manual or automatic selection of the AGP bus signal strength gt Auto System automatically sets the AGP bus signal strength gt Manual DEFAULT The AGP bus signal strength is set manually in the next BIOS configuration option Driving Value DA The AGP Driving Value option can only be configured if the AGP Driving Control option is set to manual Use the AGP Driving Value option to manually set the strength of the AGP bus signal If this option is selected a hexadecimal number must be ent
96. is not copied to the shadow RAM Enabled DEFAULT Video BIOS is copied to the shadow RAM XXXXX YYYYY Shadow Disabled Use the Shadow option to write the contents of the ROM area XXXXX YYYYY to the same address in the system RAM Disabled DEFAULT Contents from ROM area XXXXX YYY YY are not written to the RAM Enabled Contents from ROM area XXXXX YYYYY are written to the RAM Page 125 PCISA MARK CPU Small Logo EPA Show Disabled Use the Small Logo EPA Show option to specify if the Environmental Protection Agency EPA logo appears during the system boot up process If enabled the boot up process may be delayed Disabled DEFAULT 1000 does not appear during boot up Enabled EPA logo appears during boot up Page 126 IEI Technology Corp 5 4 Advanced Chipset Features Use the Advanced Chipset Features menu BIOS Menu 5 to change chipset configuration options Phoenix AwardBIOS CMOS Setup Utility Advanced Chipset Features DRAM Timing By SPD DRAM Clock SDRAM Cycle Length Bank Interleave Memory Hole P2C C2P Concurrency system BIOS Cacheable Video RAM Cacheable Frame Buffer Size AGP Aperture Size AGP 4X Mode AGP Driving control Driving Value Panel Type Boot Device Select Power Supply Type OnChip USB USB Keyboard Support Onchip Sound Enabled Host CLK 5 Disabled Disabled Enabl
97. ive Capacity Press Ctrl Ato enter ALi RAID BIOS setup utility Figure E 1 Accessing ALi RAID BIOS Utility Step 6 Delete RAID settings and partitions The RAID BIOS Setup Utility in Figure E 2 appears Before configuring the array select the Delete RAID Setting amp Partition 210 IEI Technology Corp PCISA MARK CPU ED DE DE DD DD KA RAID BIOS Setup Utility 62006 ALi Corporation Create RAID 0 Striping for Performance Create RAID 1 Mirroring for Reliability Create JBOD for integrate Capacity Stripe Size Delete RAID Settings and Partition Delete All RAID Settings and Partition Rebuild RAID Array Channel 1 Master Channel 1 Slave Channel 2 Master Channel 3 Master Drive Model None None Drive Brand Name Drive Brand Name www ali com tw Select Moving Cursor Finish Exit Mode Capacity RAID Array Type SATA1 SATA1 Drive ID number Drive Capacity Drive ID number Drive Capacity RAID Type Stripe Size RAID Name RAID Array A RAID Array B RAID Array C Figure E 2 RAID BIOS Setup Utility Step 7 Configure the RAID settings Use the RAID BIOS Setup Utility in Figure E 2 to configure the RAID array Brief descriptions are given below Step 8 Install the OS After the RAID array has been configured see below install the OS To do this refer to the documentation that came with the OS E 4 RAID Options E 4 1
98. ive PIO Mode 137 gt IDEUDMA J Auto 5 eror een ect pe ca iia s 138 Init Display First PCI Slot iii 138 IDE HDD Block Mode Enabled 138 Onboard FDD Controller Enabled eene 139 Onboard Serial Port 1 8 41 22 2 139 Onboard Serial Port 2 2F8 IRQ3 essere 139 UART 2 Mode Select Standarq eese 140 IRFunction Complex Half nene 140 TX RX Inverting enable No 140 Onboard Parallel Port 378 141 Onboard Parallel Mode Normal eene 141 x ECP Mode Use 31 142 x Parallel Port EPP Type 1 7 142 Onboard Legacy Audio Enabled eese 142 Sound Blaster Disabled eese 142 SB I O Base Address 220 2 20 44 2 22 2 1 1 4 4 4 1 4 143 gt SBIRG 000 143 Page 188 Technology Corp PCISA MARK CPU 2 SB DMA Select
99. le 3 33 VGA Connector Pinouts Page 87 PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 88 IEI Technology Corp PCISA MARK CPU Chapter 4 Installation Page 89 PCISA MARK CPU 4 1 Anti static Precautions Electrostatic discharge ESD can cause serious damage to electronic components including the PCISA MARK Dry climates are especially susceptible to ESD It is therefore critical that whenever the PCISA MARK or any other electrical component is handled the following anti static precautions are strictly adhered to m Wear an anti static wristband Wearing a simple anti static wrist band can help to prevent ESD from damaging the board m Self grounding Before handling the board touch any grounded conducting material During the time the board is handled frequently touch any conducting materials that are connected to the ground 4 2 Installation Considerations following installation notices and installation considerations should be read and understood before the CPU is installed All installation notices pertaining to the installation of the CPU card should be strictly adhered to Failing to adhere to these precautions may lead to severe damage of the CPU card and injury to the person installing the CPU card 4 2 1 Installation Notices Before and during the installation of the PCISA MARK CPU card do the following
100. led Allows the graphics devices to examine the VGA palette on the graphics card Assign for VGA Enabled Use the Assign IRQ for VGA option to enable the system to allocate an interrupt address to the system display Disabled No IRQ is assigned to the VGA Enabled DEFAULT An IRQ is assigned to the VGA Page 160 IEI Technology Corp Assign IRQ for USB Enabled Use the Assign IRQ for USB option to enable the system to allocate an interrupt address to the system USB display Disabled No IRQ is assigned to the USB Enabled DEFAULT An IRQ is assigned to the USB 5 8 PC Health Status The PC Health Status menu BIOS Menu 14 has two user configurable options and shows system operating parameters that are essential to the stable operation of the system Phoenix AwardBIOS CMOS Setup Utility PC Health Status Current CPU Temp Item Help current System Temp Current CPUFAN1 Speed Menu Level gt Current CPUFAN2 Speed Vcore 1 Enter Select PU PD Value 10 5 ESC Exit Fl General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 14 PC Health Status PCISA MARK CPU The following system parameters are monitored by the PC Health Status menu Temperature The following fan temperature is monitored Current CPU Temperature m Current System Temperature Fan Speed The following fan speed is mo
101. lip Figure 4 1 DIMM Module Installation Page 95 PCISA MARK CPU 4 5 Peripheral Device Connection Cables provided by IEI that connect peripheral devices to the board are listed in Table 4 1 Cables not included in the kit must be separately purchased Quantity Type 1 66 100 HDD cable 1 Audio cable 1 RS 232 cable 1 KB MS Y cable 2 SATA cables 1 SATA power cable Table 4 1 IEI Provided Cables 4 5 1 IDE Disk Drive Connectors The cable used to connect the CPU board to the IDE HDD is a standard 44 pin or 40 pin ATA flat cable To connect an IDE HDD to the motherboard follow the instructions below 44 pin IDE cable connection is illustrated in Figure 4 2 and 40 pin cable connection is illustrated in Figure 4 3 Step 1 Find the ATA 66 100 flat cable in the kit that came with the motherboard Step 2 Connect one end of the cable to the PIDE1 connector on the motherboard A keyed pin on the IDE connectors prevents it from being connected incorrectly Step 3 Locate the red wire on the other side of the cable that corresponds to the pin 1 connector Step 4 Connect the other side of the cable to the HDD making sure that the pin 1 cable corresponds to pin 1 on the connector Technology Corp PCISA MARK CPU er rr EEE Figure 4 2 Connection of 44 Pin IDE Connector Figure 4 3 Connection of 40 Pin IDE Connector
102. m Read the user manual user manual provides a complete description of the PCISA MARK CPU card installation instructions and configuration options m Wear an electrostatic discharge cuff ESD Technology Corp PCISA MARK CPU ED DD DD ur ll Electronic components are easily damaged by ESD Wearing an ESD cuff removes ESD from the user s body and helps to prevent ESD damage m Place the CPU card on an antistatic pad When the CPU card is installed and configured place it on an antistatic pad This helps to prevent potential ESD damage m Turn off all power to the PCISA MARK CPU When working with the CPU card make sure that it is disconnected from all power supplies and that no electricity is being fed into the system Before and during the installation of the PCISA MARK CPU card DO NOT remove any of the stickers on the PCB board These stickers are required for warranty validation m use the product before all the cables and power connectors are properly connected m allow screws to come in contact with the PCB circuit connector pins or its components 4 3 Unpacking If any of the items listed below missing when the PCISA MARK is unpacked do not proceed with the installation Contact the reseller or vendor the CPU card was purchased from 4 3 1 Unpacking Precautions Some components on PCISA MARK are v
103. m Two software selectable MIC inputs m Dedicated Front MIC input for front panel applications software selectable m Boost preamplifier for MIC input PCISA MARK CPU m LINE input shared with surround output MIC input shared with Center and LFE output m Built in 50mW 20ohm amplifier for both Front out and Surround Out m External Amplifier Power Down EAPD capability m Power management and enhanced power saving features m Supports Power Off CD function m Adjustable VREFOUT control m Supports 48KHz S PDIF output complying with AC 97 Rev 2 3 specifications m Supports 32K 44 1K 48KHz S PDIF input Power support Digital 3 3V Analog 3 3V 5V m Standard 48 pin LQFP package m EAX 1 0 amp 2 0 compatible m Direct Sound 3D compatible m A3D compatible m 13012 compatible m 3D positional audio m 10 band software equalizer m Voice cancellation and key shifting in Karaoke mode m AVRack Media Player m Configuration Panel for improved user convenience 2 14 Real Time Clock 256 byte battery backed CMOS RAM 2 15 System Monitoring The PCISA MARK CPU card is capable of self monitoring various aspects of its operating status including m CPU chipset and battery voltage 3 3V 5V and 12V m CPU and board temperatures by the corresponding embedded sensors Technology Corp PCISA MARK CPU _ _ _ _ 2 16 5 PCISA MARK uses licens
104. mory up to 512MB 2 9 PCI Bus Interface Support The PCI bus on the PCISA MARK has the following features m PCI 2 2 compliant 32 bit 3 3V PCI interface with 5V tolerant inputs m Supports up to five PCI masters m PCI to system memory data streaming support m Delay transaction from PCI master accessing DRAM m Symmetric arbitration between Host PCI bus for optimized system performance 2 10 Ethernet 2 10 1 Ethernet Controller Overview The RTL8100C is enhanced with an ACPI Advanced Configuration Power Interface management function for PCI in order to provide efficient power management for advanced operating systems with OSPM Operating System Directed Power Management The RTL8100C also supports remote wake up including AMD Magic Packet and Microsoft Wake up frame to increase cost efficiency in network maintenance and management Technology Corp PCISA MARK CPU ls 2 10 2 Ethernet Controller Features The Realtek RTL8100C Ethernet controller features are listed below 128 pin PQFP LQFP PQFP package pin to pin compatible with Realtek RTL8110S 32 Single Chip Gigabit Ethernet Controller Supports PCI mini PCI interfaces Integrates Fast Ethernet MAC physical chip and transceiver onto a single chip 10Mbps and 100Mbps operation Supports 10Mbps and 100Mbps N way auto negotiation Supports 25MHz Crystal or 25MHz OSC as the internal clock source Complies with PC99 PC2001 standards Supports ACPI
105. mputer eese 174 Figure 6 10 Access the Audio Driver Folder een 175 Figure 6 11 Setup Utility ICON 2 175 Figure 6 12 Audio Driver Install Shield Wizard Starting 175 Figure 6 13 Audio Driver Setup 176 Figure 6 14 Audio Driver Welcome Screen eene 177 Figure 6 15 Audio Driver Software Configuration 178 Figure 6 16 Audio Driver Digital 179 Figure 6 17 Audio Driver Installation 180 Figure 6 18 Audio Driver Installation Complete 1 181 Figure 6 19 Access the LAN Driver Folder eee 182 Figure 6 20 Setup Utility ICON iii 182 Figure 6 21 LAN Driver Welcome Screen tre 183 PCISAI MARK CPU Card Figure 6 22 LAN Driver Installation Complete eene 184 Figure D 1 Sound Effect Manager con esee 201 Figure D 2 Sound Effect Manager Icon Task Bar 202 Figure D 3 Sound Effect Manager Icon Control
106. n VIA Service Pack v4 3 To install the chipset driver follow the steps below Step 1 Insert the CD into the system that contains the PCISA MARK board 166 Technology Corp PCISA MARK CPU Step 2 Open the PCISA MARK folder Open the 1 4in1 subfolder See Figure 6 1 e Via 3 LAN 4 Audio 5 5 Manual Figure 6 1 Access the 1 4in1 Folder Step 3 Click the Setup utility icon shown in Figure 6 2 Setup Figure 6 2 Setup Utility Icon Page 167 PCISA MARK CPU Step 4 The installation program begins to initialize After the initialization process welcome screen shown in Figure 6 3 appears Click NEXT to continue Welcome x Welcome to the VIA Service Pack Setup program This program will install VIA Service Pack on your computer It is strongly recommended that you exit all Windows programs before running this Setup program Click Cancel to quit Setup and then close any programs you have running Click Next to continue with the Setup program WARNING This program is protected by copyright law and international treaties Unauthorized reproduction or distribution of this program or any portion of it may result in severe civil and criminal penalties and will be prosecuted to the maximum extent possible under law Figure 6 3 VIA Chipset Driver Installation Welcome Screen Page 168 IEI Technology Corp PC
107. nager Configuration Options The Sound Effects Manager enables configuration of the items listed below To configure these items click the corresponding menu tab in the Sound Effects Manager in Figure D 4 Page 203 PCISA MARK CPU di NOTE The Karaoke Mode is configured in the Sound Effect menu To access Karaoke configuration settings click on the Sound Effect menu tab Sound Effect m Karaoke Mode m Equalizer Speaker Configuration m Speaker Test m S PDIF In m S PDIF Out m Connector Sensing m HRTF Demo Microphone Effect m General Not RealTek Sound Effect Managers have the above listed options The Sound Effect Manager loaded onto the system may only have some of the options listed above Below is a brief description of the available configuration options in the Sound Effects Manager Sound Effect Select a sound effect from the 23 listed options in the drop down menu Selected sound effect properties can be edited To edit the sound effect click EDIT Page 204 Technology Corp PCISA MARK CPU m Karaoke The Karaoke Mode is accessed in the Sound Effect window The Voice Cancellation disables the vocal part of the music being played The Key adjustment up or down arrow icons enables users to define a key that fits a certain vocal range m Equalizer Selection Preset equalizer settings ena
108. nitored m CPU 1 Speed m CPU 2 Speed Voltages The following voltages are monitored Vcore m 25 m 3 3V 5V m 12V 162 IEI Technology Corp 5 9 Frequency Voltage Control Use the Frequency Voltage Control menu BIOS Menu 15 to set the frequency options for the DIMM PCI and CPU host Phoenix AwardBIOS CMOS Setup Utility Frequency Voltage Control Auto Detect DIMM PCI Clk Enabled Spread Spectrum Disabled CPU Host PCI Clock Default Menu Level gt 1 Enter Select PU PD Value 10 5 ESC Exit Fl General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 15 Frequency Voltage Control Auto Detect DIMM PCI Clk Enabled Use the Auto Detect DIMM PCI Clk option to actively reduce EMI Electromagnetic Interference and reduce power consumption by turning off unoccupied or inactive expansion slots gt Disabled AGP PCI and memory slots are not monitored gt Enabled DEFAULT AGP PCI and memory slots are monitored and clock signals to all unoccupied and inactive slots are turned off Spread Spectrum Disabled Use the Spread Spectrum option to reduce the EMI Excess EMI is generated when the system clock generator pulses have extreme values Spreading the pulse spectrum modulates changes in the extreme values from spikes to flat curves thus reducing the PCISA MARK CPU EMI Thi
109. ns 100 K Keyboard Mouse Connector 63 L LAN Connectors 83 LVDS LCD Connector 65 M Mini DIN 6 PS 2 Connector 84 O onboard memory 21 Operating Humidity 22 Operating Temperature 22 P Parallel Port Connector 67 PC100 133MHz 17 PCISA form factor 16 17 Power Connector 70 Power consumption 33 Primary IDE 56 R Realtek Audio Driver 174 Reset Button Connector 73 RoHS 17 Page 222 IEI Technology Corp PCISA MARK CPU 20 RS 232 Serial Port COM1 amp 2 Connector 78 75 U 5 USB Connector 85 80 Secondary Connector 58 Serial ATA Drive Connectors 76 Serial Ports 31 VGA connector 86 SIR 33 VIA Mark CoreFusion processor 17 VIA VT82C686B 21 1 Technical Specifications 21 Page 223 PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 224 IEI Technology Corp
110. oid mixing PATA and SATA disk drives in a RAID 0 array 2 Always use disk drives of the same capacity to create a RAID array The excessive capacity of a larger disk drive cannot be utilized because data stripes are equally distributed across all members of a RAID array Logical RAID Volume Physical Disks Disk 1 Disk 2 Page 213 PCISA MARK CPU E 4 2 Create RAID 1 Mirroring for Reliability All data previously stored on the member drives of a RAID configuration is destroyed during the RAID initialization process If used drives are used to create a RAID array make sure the data has been moved or backed up before creating a RAID array out of the disk drives Step 1 Select Create RAID 1 Striping for Reliability Use the arrow keys to highlight Create RAID 1 Striping for Reliability and press ENTER A flashing S appears on the Drive Menu where the member drives to be included in the RAID 0 array can be chosen Step 2 Select RAID array drive members Use the space bar to select members of the RAID array The flashing cursor changes to a lower case s once any of the connected disk drives has been selected Follow the same method to select another member drive Step 3 Confirm The Create RAIDO Y N confirm box appears Press Y Step 4 Name the array Enter a nickname for the created array Upper and lower case alphabetic numeric space and underscore characters are all
111. on Once set this IDE channel becomes inaccessible and any drives attached to it are undetected Setting this option allows the device to be automatically detected by the BIOS Selecting this option allows manual configuration of the device on the IDE channel in BIOS The Access Mode option can only be configured if the IDE Primary Master is set to either Manual or Auto Use the Access Mode option to determine the hard disk BIOS translation modes Most systems now use hard drives with large capacities and therefore either the LBA translation mode or auto mode should be selected gt CHS 116 Select this mode if the HDD capacity is less than 504MB Select this mode if the HDD capacity is more than 8 4GB Technology Corp PCISA MARK CPU gt Large This mode is an extended ECHS mode and while it supports HDDs larger than 504MB it is not recommended gt Auto DEFAULT f you are unsure of what access mode to set select this option gt Capacity The Capacity specification indicates the storage capacity of the HDD installed in the system Cylinder The Cylinder specification indicates how many cylinders tracks are on the HDD installed in the system gt Head The Head specification indicates how many logical heads are on the HDD installed in the system gt Precomp The Precomp specification indicates on what track the write precompensation be
112. pecify the default state of the numeric keypad gt Off The keys on the keypad are not activated gt On DEFAULT Activates the keys on the keypad Gate A20 Option Fast Use the Gate A20 Option option to set if the keyboard controller or the chipset controls the Gate A20 switching gt Normal The keyboard controller does the switching Fast DEFAULT The chipset does the switching Typematic Rate Setting Disabled Use the Typematic Rate Setting configuration option to specify if only one character is allowed to appear on the screen if a key is continuously held down When this option is enabled the BIOS reports as before but it then waits a moment and if the key is still held down it begins to report that the key has been pressed repeatedly This feature accelerates cursor movement with the arrow keys Disabled DEFAULT Disables the typematic rate Enabled Enables the typematic rate Typematic Rate Chars sec 6 The Typematic Rate option can only be configured if the Typematic Rate Setting is enabled Use the Typematic Rate option to specify the rate keys are accelerated 123 PCISA MARK CPU gt 6 DEFAULT 6 characters per second gt 8 8 characters per second gt 10 10 characters per second gt 12 12 characters per second gt 15 15 characters per second gt 20 20 characters per second gt 24 24 characters per second gt 30 30 characters per second
113. perating Systems include Windows 98 Windows 2000 and Windows XP Windows based software for RAID management E 3 Accessing the ALi RAID Utility To access the Ali RAID Utility follow the steps below Step 1 Connect SATA drives to the system Connect two SATA drives to the system Make sure the drives have the same capacity are the same type and have the same speed Make sure the SATA drives EXACTLY the same when they are configured in a RAID configuration JBOD RAID 0 or RAID 1 If they are not the same size disk drive capacity is sacrificed and overall performance affected Step 2 Enable SATA drives in BIOS Start the computer and access the Award BIOS setup program Next open the Advanced menu Enable the SATA ROM Support BIOS option see Section 5 3 Page 209 PCISA MARK CPU Step 3 Save and Exit BIOS After the SATA ROM Support BIOS option is enabled save and exit the BIOS Step 4 Reboot the system Reboot the system after saving and exiting the BIOS Step 5 Press Ctrl A When the screen in Figure E 1 appears press Ctrl A to enter the ALi RAID BIOS setup program ALi RAID BIOS V1 XX c ALi Corporation 2005 All Rights Reserved Identifying IDE drives Channel 1 Master None Channel 1 Slave None Channel 2 Master Drive Brand Name Drive ID number SATA 1 Drive Capacity Channel 3 Master Drive Brand Name Drive ID number SATA 1 Dr
114. power management Provides PCI bus master data transfer Provides PCI memory space or I O space mapped data transfer Supports PCI clock speed of 16 75MHz 40MHz Advanced power saving mode Supports Wake on LAN and remote wake up AMD Magic Packet Link Change and Microsoft Wake up frame Half Full duplex capability Supports Full Duplex Flow Control IEEE 802 3x Provides interface to 93 46 EEPROM to store resource configuration and ID parameters Provides PCI clock run pin Provides LED pins for network operation status indication 2 5 3 3V power supply with 5V tolerant I Os 0 25um CMOS process PCISA MARK CPU 2 11 Drive Interfaces The PCISA MARK can support the following drive interfaces m 2x SATA drives m 4 IDE devices m 1xFDD m 1x Compact Flash CF card 2 11 1 SATA Drives The PCISA MARK supports two first generation SATA drives with transfer rates of up to 150Mb s 2 11 2 IDE HDD Interfaces The PCISA MARK system chipset IDE controller supports up to four HDDs with the following specifications Supports PIO IDE transfers up to 16MB s Supports the following Ultra ATA devices O Ultra ATA 133 with data transfer rates up to 133MB s O Ultra ATA 100 with data transfer rates up to 100MB s 2 11 3 Floppy Disk Drive FDD The PCISA MARK supports a single FDD The following FDD formats are compatible with the board m 5 25 360KB 1 2MB 3 5 720KB 1 44MB and 2 88MB 2 11
115. r more memory installed Page 114 Technology Corp gt Extended Memory The Extended Memory is NOT user configurable The BIOS determines how much extended memory is present during the POST This is the amount of memory above 1MB located in the memory address map of the CPU Total Memory The Total Memory is NOT user configurable 5 2 1 IDE Primary Master Slave Use the IDE Primary Master Slave menu BIOS Menu 3 to set or change the master slave IDE configurations Phoenix AwardBIOS CMOS Setup Uti lity IDE Primary Master IDE HDD Auto Detection Press Enter Item Help IDE Primary Master Auto Access Mode Auto 14 Enter Select PU PD Value F10 Save ESC Exit Fl General Help FS Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 3 IDE Primary Master IDE HDD Auto Detection Press Enter Use the IDE HDD Auto Detection option to enable BIOS to automatically detect the IDE settings Select IDE HDD Auto Detection and press ENTER BIOS automatically detects the HDD type Do not set this option manually IDE Primary Master Auto PCISA MARK CPU Card Use the IDE Primary Master option to activate or deactivate the following drive channels Channel 0 Master m Channel 0 Slave m Channel 1 Master m Channel 0 Slave gt None gt Auto DEFAULT gt Manual Access Mode Auto If no drives are connected to the IDE channel select this opti
116. r sector the system IDE drive can support Block mode is also called block transfer multiple commands or multiple sector read write Page 138 IEI Technology Corp PCISA MARK CPU _ Disabled Block mode is not supported Enabled DEFAULT Block mode is supported Onboard FDD Controller Enabled Use the Onboard FDC Controller option to enable or disable the onboard floppy controller If the system is not connected to a floppy disk or uses an adapter for the FDD this option can be disabled Disabled The FDD controller is disabled Enabled DEFAULT The FDD controller is enabled Onboard Serial Port 1 3F8 IRQ4 Use the Onboard Serial Port 1 option to select the I O address and for the onboard serial port 1 The serial port can be disabled or the address and the IRQ can be automatically selected by the BIOS The Onboard Serial Port 1 options are m Disabled m 3F8 IRQ4 DEFAULT m 2F8 IRQ3 m 3E8 IRQ4 m 2E8 IRQ3 Onboard Serial Port 2 2F8 IRQ3 Use the Onboard Serial Port 2 option to select the I O address and for the onboard serial port 2 The serial port can be disabled or the address and the IRQ can be automatically selected by the BIOS The Onboard Serial Port 2 options are m Disabled m 3F8 IRQ4 m 2F8 IRQ3 DEFAULT m 3E8 IRQ4 m 2E8 IRQ3 Page 9 PCISA MARK CPU UART 2 Mode Select Standard Use the
117. rared connector m 1 Keyboard mouse connector m 1xLCDLVDS interface connector dual channel m 1xLCDTTL interface connector m 1 x Parallel port connector m 1xPS ON connector m 1 x Power button switch m 1 Reset button switch m 2 x RS 232 serial port connectors m 2 Serial ATA connectors m 2xUSB 1 1 connectors The PCISA MARK has the following external peripheral interface connectors m 2 x Ethernet connectors m 1 x PS 2 keyboard mouse connector m 1 USB 1 1 connector m 1 x VGA connector Technology Corp PCISA MARK CPU es Se es The PCISA MARK has the following onboard jumpers m CF card function setup m Clear CMOS Flat panel power select m PCI VIO voltage select The location of these connectors on the CPU card can be seen in Figure 1 1 These connectors are fully described in Chapter 3 1 2 2 Technical Specifications PCISA MARK technical specifications are listed in Table 1 2 Detailed descriptions of each specification can be found in Chapter 2 SPECIFICATION DESCRIPTION CPUs Supported VIA MARK 533 800 MHz FSB 133 MHz North Bridge Chipset VIA MARK South Bridge Chipset VIA VT82C686B Memory 128MB PC133 MHz onboard memory One 168 pin PC133 100MHz SDRAM DIMM up to 512 MB Supports 640 maximum memory Digital I O 4 input 4output by super I O Super I O VIA VT82C686B Display CRT 24 bit TFT dual channel 18 bit LVDS integrated in VIA MA
118. re comes with the display Use this software to specify the power management options for the display Modem Use of IRQ Use the Modem Use of IRQ to select the IRQ address for the system modem The following IRQ addresses are available m m 3 DEFAULT Page 146 Technology Corp PCISA MARK CPU eee a 4 m 5 m 7 m 9 m 10 m 11 501 01 by PWR BTN Instant Off Use the Soft Off by PWR BTN option to enabled the system to enter a very low power usage state when the power button is pressed Instant Off DEFAULT When the power button is pressed the system is immediately shutdown gt Delay 4 sec To shutdown the system the power button must be held down longer than four seconds otherwise the system enters a low power usage state Wake Up Events Press Enter Use the Wake Up Events option to access the menu that selects the components the system monitors for activity to rouse the system from a suspend or a sleep state See Section 5 6 2 5 6 1 Power Management Use the Power Management menu BIOS Menu 8 to set the BIOS power management parameters 147 Phoenix AwardBIOS CMOS Setup Utility Power Management Power Management User Define HDD Power Down Disable Doze Mode Disable Menu Level Pb Suspend Mode Disable 1 Enter Select PU PD Value 10 5 ESC Exit Fl General Help FS Previous Values F6 Fail Sa
119. s are monitored m IRQ3 m IRQ4 m IRQS m IRQ6 COM 2 Enabled COM 1 Enabled LPT 2 Enabled Floppy Disk Enabled m Enabled m IRQ8 RTC Alarm Disabled m 9 2 Disabled 10 Reserved Disabled m Reserved Disabled m 12 PS 2 Mouse Enabled m IRQ13 Coprocessor Enabled m IRQ14 IRQ15 Hard Disk Enabled Reserved Disabled 5 7 PnP PCI Configurations Use the PnP PCI Configurations menu BIOS Menu 11 to set the plug and play and PCI options Phoenix AwardBIOS CMOS Setup Utility PnP PCI Configurations Disabled Reset Configuration Data Menu Level gt Resources Controlled By Auto ESCD IRQ Resources Press Enter Select Yes if you are DMA Resources Press Enter using a Plug and Play capable operating PCI VGA Palette Snoop Disabled system Select No if Assign IRQ For VGA Enabled you need the BIOS to Assign IRQ For USB Enabled configure non boot devices 1 Enter Select PU PD Value 10 5 ESC Exit Fl General Help F5 Previous Values F6 Fail Safe Defaults F7 Optimized Defaults BIOS Menu 11 PnP PCI Configurations PNP OS Installed No The PNP OS Installed option determines whether the Plug and Play devices connected to the system are configured by the operating system or the BIOS gt DEFAULT If the operating system does not meet the Plug and Play specifications BIOS configures all
120. s benefit may in some cases be outweighed by problems with timing critical devices such as a clock sensitive SCSI device Disabled DEFAULT not reduced gt Enabled EMI reduced CPU Host PCI Clock Disabled Use the CPU Host PCI Clock option to select a timing combination for the CPU and the PCI bus When set to Default the BIOS uses the actual CPU and PCI bus clock values Configuration options are below m Default DEFAULT m 66 33 MHz m 68 34 MHz m 75 37 MHz m 83 41 MHz 95 31 MHz m 100 33 MHz m 103 34 MHz m 112 37 MHz 124 31 MHz m 133 33 MHz m 138 34 MHz m 140 35 MHz m 150 37 MHz Page 164 IEI Technology Corp PCISA MARK CPU Chapter 6 Driver Installation Page 165 PCISA MARK CPU 6 1 Available Software Drivers content of the vary throughout the of the product is subject to change without prior notice Visit the IEI website or contact technical support for the latest updates The PCISA MARK motherboard has four software drivers VIA 4 in 1 Chipset Driver Installation VIA Service Pack v4 3 m RealTek Audio Driver m RealTek LAN Driver m The ALi RAID driver is fully described in Appendix All four drivers can be found on the CD that came with the motherboard To install the drivers please follow the instructions in the sections below 6 2 VIA 4 in 1 Chipset Driver Installatio
121. s outside of the chassis This section has complete descriptions of all the internal peripheral connectors on the PCISA MARK 3 2 1 Audio CD In Connector CN Label CN17 CN Type 4 pin header CNLocation See Figure 3 2 CN Pinouts See Table 3 4 The AC 97 codec supports several audio functions The audio CD in connector facilitates CD in audio connections PCISA MARK CPU CDGND CDR mema JO Figure 3 2 Audio CD In Connector Location PIN NO DESCRIPTION 1 CD SIGNAL Left 2 GROUND 3 GROUND 4 CD SIGNAL Right Table 3 4 Audio CD In Connector Pinouts Page 42 Technology PCISA MARK CPU _ 3 2 2 Audio Connector Line out Line amp MIC CN Label CN15 CN Type 10 pin box header CN Location See Figure 3 3 CN Pinouts See Table 3 5 The 10 pin audio connector is connected to external audio devices including speakers and microphones for the input and output of audio signals to and from the system CN15 LINEOUTR LINEOUTL MARIE RR Figure 3 3 Audio Connector Location PCISA MARK CPU PINNO DESCRIPTION DESCRIPTION 1 Line Out Right 2 Line In Right 3 GROUND 4 GROUND 5 Line Out Left 6 Line In Left 7 GROUND 8 GROUND 9 MIC In 1
122. st of existing arrays The source and destination drives will be displayed Confirm rebuild array Press Y to begin the rebuild process Technology Corp PCISA MARK CPU NOTE A status bar will indicate the rebuild progress Rebuild consumes considerable system resources and the time required for rebuilding a RAID array may vary depending on the size of stored data disk drive capacity and drive performance E 4 8 Select Boot Drive Step 1 Select the Boot Drive Use the arrow keys to highlight Select Boot Drive and press ENTER A flashing appears at the Drive Menu where the boot drive can be chosen Step 2 Press ENTER Press ENTER or the space bar to finish the configuration 219 PCISA MARK CPU THIS PAGE IS INTENTIONALLY LEFT BLANK Page 220 IEI Technology Corp PCISA MARK CPU 221 PCISA MARK CPU 24 bit TFT 21 ASKIR 33 Audio CD In Connector 41 Audio Codec 31 Audio Connector 43 B Battery connector 44 Compact Flash Card 103 Compact Flash Connector 45 CPU Fan Connector 48 CRT 21 Data Flow 26 Digital Input Output DIO Connector 49 Dimensions 24 DIMM socket 51 Display Support 27 dual channel 18 bit LVDS 21 E Ethernet Controller 28 External LED Connector 53 F Floppy Disk Connector 54 30 IDE HDD 30 IrDA 22 62 J Jumper Locatio
123. stallShield Wizard Preparing Setup Please wait while the InstallShield Wizard prepares the setup Realtek 97 Audio Setup is preparing the InstallShield Wizard which will guide you through the rest of the setup process Please wait Install s Figure 6 13 Audio Driver Setup Preparation Step 6 welcome screen shown in Figure 6 14 appears Click the NEXT button to continue the installation The install shield starts to configure the new software as shown in Figure 6 15 Realtek 97 Audio Setup 5 18 Welcome to the InstallShield Wizard for Realtek AC 97 Audio The InstallShield Wizard will install Realtek AC 97 Audio on your computer To continue click Next 1119101197610 Figure 6 14 Audio Driver Welcome Screen Realtek AC 97 Audio Setup 5 18 Setup Status Realtek 97 Audio is configuring your new software installation Installed Cancel Figure 6 15 Audio Driver Software Configuration PCISA MARK CPU Step 7 The Digital Signal Not Found screen shown in Figure 6 16 appears Click YES to continue the installation Digital Signature Not Found The Microsoft digital signature affirms that software has been tested with Windows and that the software has not been altered since it was tested The software you are about to install does not contain Microsoft digital signature Therefore there is no guarantee that this software
124. t hand side Right arrow Move to the item on the right hand side Page up Increase the numeric value or make changes Page down Decrease the numeric value or make changes 108 Technology Corp PCISA MARK CPU Main Menu Quit and do not save changes into CMOS Status Page Setup Menu and Option Page Setup Menu Exit current page and return to Main Menu General help only for Status Page Setup Menu and Option Page Setup Menu Table 5 1 BIOS Navigation Keys 5 1 3 Getting Help When F1 is pressed a small help window describing the appropriate keys to use and the possible selections for the highlighted item appears To exit the Help Window press Esc or the F1 key again 5 1 4 Unable to Reboot After Configuration Changes If the system cannot be booted after changes are made restore the CMOS defaults To restore CMOS defaults follow these steps Step 1 Unplug the battery connector Step 2 Remove the battery Step 3 Plug in the battery connector 109 5 1 5 BIOS Menu Once the BIOS opens the main menu BIOS Menu 1 appears Phoenix AwardBIOS CMOS Setup Utility Standard CMOS Features Frequency Voltage Control Advanced BIOS Features Load Fail Safe Defaults Advanced Chipset Features Load Optimized Defaults Integrated Peripherals Set Supervisor Password Power Management Setup Set User Password Configurations Save amp Exit Setup
125. the CFII card socket is facing up Step 2 Carefully insert the CFII card into the socket Page 103 PCISA MARK CPU Figure 4 5 CompactFlash Card Installation 4 8 Inserting the CPU Card After the DIMM module has been installed and after the internal peripheral connectors have been connected to the peripheral devices and the jumpers have been configured the PCISA MARK can be inserted onto a PCISA slot on the backplane To insert the CPU card to a backplane follow the instructions below Step 1 Align the PCISA connector on the CPU card with the corresponding PCISA slot on the backplane Step 2 Gently push the CPU down to ensure the connectors are properly connected 104 IEI Technology Corp PCISA MARK CPU EEE eters 4 9 Rear Panel Connectors 4 9 1 Keyboard and Mouse Connection A PS 2 keyboard and a PS 2 mouse can be connected to the appropriate PS 2 connector on the rear panel 4 9 2 Ethernet Connection The rear panel RJ 45 connectors can be connected to an external LAN and communicate with data transfer rates up to 10Mbps and 100Mbps 4 9 3 USB Connection The rear panel USB connectors provide easier and quicker access to external USB devices The rear panel USB connector is a standard connector and can easily be connected to other USB devices 4 9 4 VGA Port Installation The cable used to connect the motherboard to a VGA port is a 10 pin header to fem
126. the computer now or later See Figure 6 9 Select when the computer must be restarted Click OK to exit the installation program Restarting Windows Setup has finished copying files to your computer Before you can use the program you must restart Windows or your computer Choose one of the following options and click OK to finish setup A No will restart my computer later Figure 6 9 Restart the Computer The following sections fully describe the driver installation procedures for the PCISA MARK CPU card 6 3 Realtek Audio Driver Installation To install the Realtek AC 97 Audio driver please follow the steps below Step 1 the CD into the system that contains the PCISA MARK board Step 2 Open the PCISA MARK folder Open the Audio subfolder See Figure 6 10 Page 174 Technology Corp PCISA MARK CPU e Via 3 LAN S SATA Manual Figure 6 10 Access the Audio Driver Folder Step 3 Click the Setup utility icon shown in Figure 6 11 Figure 6 11 Setup Utility Icon Step 4 The install shield wizard for the audio driver starts See Figure 6 12 Figure 6 12 Audio Driver Install Shield Wizard Starting Page 175 Step 5 RealTek Audio Setup prepares the install shield to guide you through the rest of the setup process See Figure 6 13 Realtek AC 97 Audio In
127. the devices in the system gt Yes Set this option if the system is running Plug and Play aware operating systems The operating system changes the interrupt I O and DMA settings PCISA MARK CPU a Reset Configuration Data Disabled Use the Reset Configuration Data option to reset the Extended System Configuration Data ESCD when exiting setup if booting problems occur after a new add on is installed Disabled DEFAULT ESCD will not be reconfigured Enabled ESCD will be reconfigured after you exit setup Resources Controlled By Auto ESCD Use the Resources Controlled By option to either manually configure all the boot and plug and play devices or allow BIOS to configure these devices automatically If BIOS is allowed to configure the devices automatically IRQs DMA and memory base address fields cannot be set manually gt Auto ESCD DEFAULT BIOS automatically configures plug and play devices as well as boot devices gt Manual Manually configure the plug and play devices and any other boot devices x IRQ Resources Press Enter The IRQ Resources option BIOS Menu 12 can only be selected if the Resources Controlled By option is set to Manual Page 157 Phoenix AwardBIOS CMOS Setup Utility IRQ Resources assigned PCI ISA assigned PCI ISA Menu Level gt gt assigned PCI ISA assigned PCI ISA Legacy ISA for devices assigned PCI ISA compliant with
128. tions Below is a list of BIOS configuration options described in Chapter 5 Load Fail Safe 4 1 2 2 1 111 Load Optimized Defaults 22224 22121 111 Set Supervisor Password rei 111 gt User Password 111 gt Save amp Exit Setup 1 re 1 1 12 1 1 2 ceteris 111 gt Exit Without Saving 111 Date Daymm dd yYyYyY ii 112 gt nmej hh mm ss 5 eerie ee Z n Ek n k lekan 112 IDE Master and IDE 1 113 D gt Drive A 1 44M 3 51 kk kek ke kk k 113 Drive Bi NOMe i sika sini naga senan SERWER R ER EA A RR SR 113 gt ka a K N A Ka Ba r w d ka 114 Halt On AII But 114 gt Base Memory iii 114 gt Extended Memory 1 1 1 1 1 1 121 1 12 2 1 121 12 2 12 2 2 rere sky aka R K R 115 gt Total Memory cisco 115 IDE HDD Auto Detection Press Enter 115 gt IDE Primary Master 116 gt Access Mode Auto iii 116 gt 000000000 1
129. tup Components This setup program will install the following drivers If you don t want to install them you can uncheck the associated check box 4 IN 1 Driver VIA PCI IDE Bus Driver AGP Driver AGP3 0 Supported VIA INF Driver 1 70a Back Cancel Figure 6 6 Driver Selection 171 PCISA MARK CPU Step 8 The setup then prompts the user see Figure 6 7 if the VIA PCI IDE Bus Driver must be installed on the system Select install or uninstall Click NEXT to continue PCI IDE Bus Driver 1 20 xi 4 D s Install Uninstall VIA PCI IDE Bus Driver Uninstall PCI IDE Bus Driver lt Back Cancel Figure 6 7 VIA PCI IDE Bus Driver Selection Page 172 Technology Corp PCISA MARK CPU ED DD Dk es Step 9 The setup then prompts the user see Figure 6 8 if the AGP driver must be installed on the system Select install or uninstall Click NEXT to continue AGP Driver 4 30a x epe Setup program will install uninstall AGP driver for you Install AGP driver Uninstall AGP driver lt Back Cancel Figure 6 8 AGP Driver Selection 173 PCISA MARK CPU Step 10 The drivers are then installed onto the system After the installation is complete the user is prompted to restart
130. y Support Mark CoreFusion processor supports a wide variety of DSTN or TFT panels through 36 bit CMOS interface This includes support for VGA SVGA XGA and SXGA TFT color panels with 9 bit 12 bit 18 bit both 1 pixel clock and 2 pixels clock and 24 bit CMOS interfaces Enhanced STN hardware with 256 gray scale support and advanced frame rate control to provide up to 16 7 million colors In addition the integrated 2 channel LVDS interface can support 18 bit color panels All resolutions are supported up to SXGA 1400x1050 The integrated ZV Port allows display of video from an external source 2 7 1 High Screen Resolution Display Support Table 2 1 shows the CRT and panel screen resolutions supported by the VIA Mark CoreFusion processor SYSTEM MEMORY FRAME BUFFER SIZE 194 16 32 v RESOLUTIONS SUPPORTED 8 640x480x8 16 32 800x600x8 16 32 1024x768x8 16 32 1280x1024x8 1280x1024x16 1280x1024x32 1600x1200x8 SIS CS 5 55515 2 lt lt lt lt 1600 1200 16 PCISA MARK CPU SYSTEM MEMORY FRAME BUFFER SIZE RESOLUTIONS SUPPORTED 8 MB 16 32 MB 1600x1200x32 1920 1440 8 7 1920 1440 16 Table 2 1 CRT and Panel Screen Resolutions Supported 2 8 Memory Support The PCISA MARK features onboard 128 PC133MHz memory and a 168 SDRAM DIMM socket that supports PC100 133MHz me

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