FIP Bus Controller, IC687BEM742, GFK
Contents
1. Controller FIP Bus Controller Controller connected to an IC693 Remote I O Scanner which allows IC693 I O modules to be on the FIP Bus The 1C693 Remote I O Scanner and the modules it serves are referred to as a FIP I O Nest For detailed information on the IC693 Remote I O Scanner refer to the Remote I O Scanner User s Manual a45702 VME Integrator Rack FIP I O Nest Expansion Cable gt up to 50 feet 15 Meters Figure 1 Example of FIP Bus Controller In a System Installing a FIP Bus Controller m Installation should not be attempted without refer ring to the applicable Programmable Controller Installation Manual and the FIP Bus Controller User s Manual Be sure that rack is powered down m Position the FIP Bus Controller at its intended slot location in the VME Integrator rack m Slide the FIP Bus Controller into the card guide until it is aligned with the connector on the rack backplane m Push the module into the connector until it clicks onto the rack rails Be sure that the board has seated properly in the connector Tighten screws to hold module in place m Bus connections to the connectors on the front of the module can now be made Programmable Controller FIP Bus Controller a45703 MODULE OK LED RUN LED CARRIER DETECT CH 1 LED TRANSMIT ENABLE CH 1 LED CARRIER DETECT CH 2 LED TRANSMIT ENABLE CH 2 LED BEM 7422. cycle once configured never varies Therefore the bus scan is fixed During the bus scan the FIP Bus Controller m Broadcasts all output data to each device m Independently tests the presence of any remote devices optional 5 GFK 1450 M arch 2010 m Allows the broadcast of any aperiodic I O data by any 3rd Party device but only for the maximum time configured optional Allows the transmission of any messages by any device but only for the maximum time configured m Receives a diagnostic message from each IC6 device m Receives all input data sent by each device Diagnostics FIP devices on the bus will automatically report faults alarms and certain other predefined conditions to the PLC The Bus Controller stores any diagnostic messages it receives They are read automatically by the IC697 CPU Faults can then be displayed in the fault table using the IC641 programming software and cleared from the programmer Detailed information on faults on the FIP bus can be found in Chapter 7 of the FIP Bus Controller User s Manual In addition to the built in diagnostics capabilities of FIP devices the IC641 programming software applica tion program can make use of additional diagnostics mechanisms provided by the IC697 PLC m System Status References that have been defined for FIP use m Fault and No Fault contacts that can be used to detect fault and lack of fault conditions m Alarm contacts that c
3. za no connection a froconnecion 9 roconnestion 5 noconnection Shell__ Signal Ground The connector shell is capacitively coupled to the board frame ground Note that if cables with plastic shell connectors are not connected to both ports the provided plastic connector cover and nylon screws should be used to cover the exposed metal connector of the FIP communication port not used The FIP Bus The FIP bus is a shielded twisted pair wire Proper cable selection is critical to successful operation of the Programmable Controller FIP Bus Controller system Suitable cable types are listed in the FIP Bus Controller User s Manual Conservative wiring practices as well as national and local codes require physical separation between control circuits and power distribution or motor power Refer to sections 430 and 725 of the National Electric Code Table 3 FIP Bus Characteristics Single twisted pair plus shield Fiber optics cable and modems can also be used Baud Rate 1 0 Mbaud MaximumBusLength 3280 feet 1000 meters per section 13123 feet 4000 meters with amaximum of 3 repeaters Maximum Numberof 32 devices per section Devices DataEncoding Manchester II Encoding Connecting the Serial Bus For information about bus selection and installation you should refer to the FIP Bus Controller User s Manual Connect the bus cable to the connector s on the front of the Bus Controller Whe
4. FIP FIELDBUS RESTART BeO DUAL PUSHBUTTON CHANNEE CONTROLLER FIP CH S2 1 MHZ PUSH TO RESET SERIAL PORT o RS 485 COMPATIBLE MODULE IC687BEM742 LABEL 44A739865 001 Rot FIP BUS 2 CHANNEL 1 CONNECTOR es FIP BUS CHANNEL 2 CONNECTOR A oooo ooo BEM 742 O Figure 2 FIP Bus Controller Module User Features FIP Bus Controller Description Following is a basic description of the module features refer to Figure 2 for location of hardware features 3 GFK 1450 M arch 2010 Status LEDs The six LEDs located on the front of the FIP Bus Con troller display module status and communications activity The top two LEDs indicate module health The bot tom four LEDs indicate communications activity on the FIP bus Two LEDs are dedicated to each of the FIP channels MODULE OK Shows the status of the FIP Bus Controller This LED blinks during power up diagnostics and should re main on as long as power is applied to the Bus Con troller RUN Shows the operational status of the FIP Bus Control ler This LED turns ON when the module is actively scanning O CARRIERDETECT CH 1 This LED is ON when detecting a carrier signal on the FIP bus attached to channel 1 TRANSMIT ENABLE CH 1 This red LED is ON when the FIP Bus Controller transmits data on the FIP bu
5. GFK 1450 M arch 2010 Features m Interfaces FIP or World FIP I O serial bus to IC697 PLC m Installs in VME Integrator Rack has 2 Megabytes of RAM and 2 Megabytes of Flash memory Four FIP Bus Controllers per PLC system m Two FIP bus channels provide redundant bus ca pability m RS 485 serial port attaches to PC for easy in system firmware upgrade no PROMS to change m Pushbutton for resetting Bus Controller and enab ling Bus Controller to accept upgrades m FIP bus faults managed by PLC Alarm processor Function m Sixstatus LEDs m Software configuration no DIP switches or jump ers to set Functions This FIP Bus Controller FBC is a two channel bus controller that occupies a single half slot in an IC697 PLC VME Integrator rack The FBC is configured with MS DOS or Windows based programming software I O devices on the FIP bus are scanned asynchronously by the bus controller and I O data is transferred to the CPU once per scan Up to 31 Bus Controllers of any kind can be included in an IC697 PLC system Of the 31 Bus Controllers a maximum of four can be FIP Bus Controllers A FIP bus may serve m Remote Drops IC693 I O racks that are interfaced to the bus through Remote I O Scanner Modules Each remote drop can include any mix of discrete and analog I O modules Field Control Stations Field ControlI O modules that are interfaced to the bus via a FIP Bus Interface Unit BIU Program
6. an be used to indicate when an analog value has reached an assigned alarm limit Table 4 Applicable Manuals Reference HDi ny ALSIN e FIP Bus Controller User s Manual FIP Remote I O Scanner User s Manual FIP Bus Interface Unit User s Manual Programmable Controller Installation Manual Programming Software User s Manual Programmable Controller Reference Manual Title 6 Programmable Controller GFK 1450 FIP Bus Controller M arch 2010 Table 5 Specifications for IC687BEM742 OperatingConditions AtmosphericPressure 80 kPa to 108 kPa Storage and TransportCharacteristics AtmosphericPressure 66 kPa to 108 kPa Free Fall 250mm 9 84inches GeneralSpecifications Module Operating Voltage 5 VDC from backplane ModuleCurrent Drain 1 4Amps typical Memory 2 Megabytes of RAM 2 Megabytes of Flash LEDs OK Module OK RUN Module Operational Status CD1 Carrier Detect Channel 1 TEN1 Transmit Enable Channel 1 CD2 Carrier Detect Channel 2 TEN2 Transmit Enable Channel 2 DataRate IMbit second Protocol FIP VW rld FIP VME System designed to support the VME standard C 1 Refer to GFK 0867B or later for product standards and general specifications Table 6 Ordering Information Description Catalog Number FIP Bus Controller Module 2 Mbytes of RAM and 2 Mbytes of Flash Memory 1C687BEM742
7. mable Controller 1C687BEM742 FIP Bus Controller m Generic Devices such as general purpose computers that are interfaced to the bus via a 3rd Party FIP Module A FIP bus is used primarily for I O control It is also used to store configuration data to remote devices and to report faults a45701 olo olololo BEM 742 FIP FIELDBUS is DUAL FIELDBUS CHANNEL CONTROLLER CONTROLLER H FIP CH S2 1 MHZ O PusH To RESET O Q 0 Lo oo0o000000 O O000000 ODULE IC687BEM742 LABEL 44A739865 001 Rot Oro oo O ooo0oo0oo0o Ohn O eese Olie oas O 00000 OEO MS DOS and Windows are registered trademarks of Microsoft Corporation 2 GFK 1450 M arch 2010 Location in a System A FIP Bus Controller module can be installed in any I O slot in the CPU rack VME Integrator rack IC697CHS782 or IC697CHS783 of an IC697 PLC system The following figure shows a typical installation with a FIP Bus P S IC687 FIP Bus Controller Host CPU FIV vo vo vo vojyY yiv yjy y B M M M M M M M c E EJE JE E E E ATT T T IC693 Remote I O Scanner arh E e i Up to 128 devices Remote Drops Field Control Stations Generic Devices ae Programmable
8. n installed in a single me dia or simplex configuration either connector can be used When installed in a dual media or redundant configuration both the Channel 1 and 2 connectors must be used Both connectors accept a standard 9 pin D type male connector a45704 D 1 D 3 Channel 1 4 5 OONO oo0oo0o0 o0o000 0 O 00 vy COND ooo0oo oo0oo0o0o0 1 2 3 Channel 2 5 Figure 3 FIP Bus Connectors Programmable Controller FIP Bus Controller Bus Controller Operation The Bus Controller handles all data transfer between the PLC and the devices on its bus In order to do this the Bus Controller must interface two completely separate and asynchronous activities A The FIP bus scan a cycle of communications between the devices on a bus including the Bus Controller itself B The CPU sweep the cycle of actions that includes communications between the CPU and the Bus Controller The Bus Controller manages data transfer between the bus and the CPU by maintaining two separate on board RAM memories One interfaces with the bus and the other interfaces with the CPU The Bus Controller automatically transfers data between these two memories making data available to the bus or to the CPU when it is needed The FIP Bus Scan AFIP bus scan also referred to as a macro cycle con sists of a fixed set of operations that are repeated as long as the RUN LED of the FIP Bus Controller is ON The length of the macro
9. s attached to channel 1 CARRIERDETECT CH 2 This LED is ON when detecting a carrier signal on the FIP bus attached to channel 2 TRANSMIT ENABLE CH 2 This red LED is ON when the FIP Bus Controller transmits data on the FIP bus attached to channel 2 Pushbutton A pushbutton located directly below the LEDs is pro vided as a means to enable the Bus Controller to ac cept an upgrade of its operating firmware It is also used to locally reset the Bus Controller in the event of a watchdog timeout 4 GFK 1450 M arch 2010 Serial Connector The 15 pin Serial Connector on the FIP Bus Controller provides for attachment of a PC computer to perform an upgrade of the operating firmware of the Bus Con troller The port supports the RS 485 electrical standard Table 1 RS 485 Serial Port Pin Assignments 1 Shield Ground Termination Resistor 2 rocomeion 10D 3 roconesion DT ach a EL CTS Shell Board Frame Ground A 120 ohm resistor is capacitively coupled to the board frame ground FIP Bus Connectors Channel 1 and 2 Two 9 pin connectors on the FIP Bus Controller pro vide for attachment of one or two FIP busses The top 9 pin connector is for FIP bus Channel 1 and the bot tom 9 pin connector is for FIP bus Channel 2 Since signals on both busses are identical the two busses provide a redundant bus capability Table 2 FIP Bus Connector Pin Assignments recommen 6 Oe roconneston 7 f no connection
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