Renesas VP User Manual Rev7
Contents
1. StartSimulation button Switching waveform Home Renesas Virtual Power Lab Renesas VP Buck Designer Converter Design ownload S matic Requirements SYSTEM SCHEMATIC Recommend FETS System Switching Lin IBAT Efficiency 200u Q Design Summary i 4 VBAT i ccC1 02 My Designs 56p F 5w m miria pse EJ tees RF1 RF2 cc2 a d 1 00k Q FB 249k Q 12n F COMP a a z G F 5v ccC3 5 4 Efficiency Curve The efficiency curve of switching circuit is appeared by clicking the tab of EFFICIENCY CALUCULATION This simulation is calculated at the value on set Tch Therefore when you can not ignore a rise in temperature by the loss you need to simulate again with adding a resultant rise by multiplying the thermal resistance to a resultant loss of power MOSFET to the initial set values Converter Design EIKI nS Danese mary FNAME i eee BT Femimend Te EPP CALC LALA oe Curria Derg arnis LL ini Excel Data hip Darij Cifcierecy ij E 6 U8 LI a i Hi OI ER aia Efficiency loa A Pan Cue ee gee Tick aed of cece 1 kT h onl F sgp r I p TETH TITA SEET Eiee j Click Download button to download the numerical data in Excel format Rev 7 0 Page 10 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 6 Buck Designer Custom Solutions 6 1 Condition Setting The Requirements screen to s2. http www renesas com vp Renesas Virtual Power Lab 8 6 Losses amp Efficiency You can compare the losses and efficiency of DrMOS solution with discrete solution Home Renesas Virtual Power Lab Renesas VP Performance Analyzer Performance Analysis DrMOS R2J20658NP Discrete HS Fet RJKO365DPA_02 LS Fet RJKOSE4DPA Losses amp Efficiency Requirements Recommended DrMOS Performance Analysis DrMos MOSFETs PCB Design Thermal Analysis Design Summary My Designs 20 5A O DrMOS Calculated Power Losier Efficiency Plot 40 104 Gam Capacitor Losses Gis Inductor Losses Gam Snubber Resistor Losses Main Power Values PIN PYCIN POUT Efficiency Losses Capacitor Losses 47 Imi Power C VIN Power CVCIN Power CReg5V Power CBOOT Power COUT Power Csnb Inductor Losses 2114 mv Power L IN Power LYCIN Power LOUT Snubber Resistor Losses ovy Power Rsnb Parasitic Losses 168m Power LGH Power LPCB_ Power LSH Power LGL Power LDL Power LPCB_G LSL Comparison Components DrMOS 35 9 91 7mvv 32 5 90 4 43 5mm 123 312m 1 09m 9 07m 33 9 202m 3 03 60 O 80 O 100 154 204 O 254 Discrete MOSFETs Calculated Power Lowes Go Capacitor Losses Ga Inductor Losses Gam Snubber Resistor Losses Parasitic Losses Gam HS MOSFET Losses IFP 85 00m 32 5 86 6 51 6m 431m 110 96 2 4 03m 4 23m 213mv 9 88m 29 0 203m 64
3. Reset Zoom W Print Waveforms Move the position of M1 and M2 with dragging vertical lines Mien foer Phigiiearrs E le vid 8 E vera TES nia na Ey 18 5 a z na wga 60 A oes sym ENT opened in a viewer by clicking these thumbnails FET Selection Analysis SUMMA Typical Output Transfer Y gsh WE Yas R gH We lgs Rath ve Temp Capacitance Dynamic Input Reverse Output Roti WE Yas Ss Switching Go back one zoomed level Go forward one zoomed level Reset the zoomed mode to its default Print the waveforms ziee E The page of blue colored text is displayed GS Y Display all charts Output characteristic typ Transfer characteristic VGS characteristic of VDSON Drain current characteristic of RDSON Temp characteristic of RDSON VDS characteristic of capacitance Capacitance change by VGS Reverse current characteristic by VSD RDSON characteristic by VGS Switching characteristic Coss Ciss Crss Move the waveform according to the mouse movement in zoomed mode Enlarges the waveform displayed stepwise by x Shrinks the waveform displayed stepwise by x Enlarges the waveform in the selected area to the full size of the screen area zoom Move a selected waveform up Move a selected waveform down iw Select all waveforms Deselect all waveforms Cli k an item name to select Display the values of M1 and M
4. power MOSFETs and later furthermore it will be expanded by adding newly developed products There are some exceptions Precautions e Although the simulation result was confirmed whether it fits an observation result on our test board it may not get the same results depending on your implementation conditions Therefore please check the compatibility with customer s board by adjusting setup conditions or parameters of a model circuit And this will help to check which parameter works for interested characteristics of customer e Please use SWITCHING CIRCUIT that simulates only a switching part in view of detailed parameters such as parasitic impedance of boards to check switching a waveform meanwhile use SYSTEM SCHEMATIC that simulates the whole circuit although detailed parameters are omitted to check loop gains e The downloadable simulation tool for off line fulfils its original functions when a downloaded circuit schematic on this site is combined with Renesas power MOSFETs Please note that it does not fulfill one in case of other combinations by using other manufacturer s circuit schematics or power MOSFETs e Please check the latest product status of Power MOSFETs on our website e If there is no action for over half an hour during simulations the system makes a time out error e The specifications in this system are subject to change without notice Contact Pease contact Renesas sales offices in your region or use the fol
5. Beer ees Getler la bide Pen ceed ell ite alee A ia a Prrram berm nsaan nia Pe bee rdar Te Waa er Tey ee peate ape ees cree oo bee yp ie ar eg E Piles oldie Ge fee bie Th ioe Cel Perren pmj epee eee es EF ja eer be se beer Eill Fn mailr bab ihein Di rel el ET Es Hrabre siki Errira are Tria Fabi iii Heii Oe i Fi FLY Pe abi wees Prvu ru be meris epee ber epi ee nil te id mm i Ee Ta Madd Es frees P emeh bea brem E eed Soe be eed ee bo eee eee of er pees HUI l roo 1 ee eed ee ees See ie ae i eee er el eed i eee E anes a goers FE ih lha mam meee ee eed eel oe Bi eee poe bee ed ee eed oo he m ibe pee eee li oe m hl br ee eee eee ee a M fim Aa Yr cour oor BT gn Tod pH ore Online BGEFET Design Tom Login Please login to proceed the process EEN hE ee ey ee Ee Poe a PPPS Pees we peers oo peed feels ela Email address Password Cancel Close Submit Forgot your password New user Click here to register now Additionally it allows to access directly particular Active Datasheet pages from parametric search and product specification pages i npor as CL TETE CETS lt BJKEIHEGRE See BPS Fee Se FP Se eee eee le oi ee cl ee a ad Sect r pm bamn ee ee es he ie ee ee eee Set eet eee Ce A Particular Active Datasheet Product Specification EEJ a Le N wrer r ibe Ee a a M N Pake eem Pe i A aa
6. building an aniution beard E DrMOS Performance Analyzer MBUCK DESIGNER MACTIVE DATASHEET mene wn m menm memes a gio a Prete et are ay poeme a ncn an a gt sen o ee E ee oe namme Tat ts ieee nasi oo whee ERON Sian ema piai Tay Es cee eee 1k CET Tes EEJ gol g a T OE E M es su Eo Rev 7 0 Page 5 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 4 Active Datasheet 4 1 Product Search The product selection filter and product lineup of power MOSFET is appeared At first input search conditions Part Number Package Channel Rds on and Vdss After that clicking Apply button the product lineup is narrowed down by your conditions Rds on Slider selection Vgs condition selection Any Vdss Slider selection 4 5V 8Vori10V Channel H channel a i F D 2 6 18 20 30 100150 200250 yg 2 a 75 gp 100 120 imil i Apply button Reset button Select the check box and click Apply button Package Selecion 7 All Packages Package dimensional drawing Dual Chip J WPAK DC3 HWSONI046 8 PWV DNOUO GLD 5 JLA 1X0 953 JAGUL S Emm x mm J WPAR S LFPAK FP 8DA SOP 9 Soin SOP SOP 8 PWSNOOOEDC 8 PTZZ0005DA A PRSPOOOSDD D 1 6 1 0 85 4 9 6 1 1 1 4 9 6 1 1 75 37 6 0 1 6 ki i Apply
7. button gt JE l Rev 7 0 Page 6 of 21 2013 07 RENESAS http www renesas com vp Renesas Virtual Power Lab 4 2 Product Selection Select the product you would like to simulate on this page by reference to parameters or static datasheets Selection Filter Active Datasheet a Package SPIN pasion HVSON 3333 Pte cde es RJKO2220N S L HWSON3046 8 RJKO2230N S L HWSON3046 8 RJKO2220N S H HWSON3046 8 RJKO2230N S H HWSON3046 8 RJKOZ400N HWSON 2 RJKOZ060PA WPAK 3 Select button 4 3 Simulation of Each Chart 10 20 30 100150 200250 25 30 40 8 T75 80 100 120 mo v A Ro sion Ro s On mf mi Recommend 40 25 2 3 ev 3 4 4 5 42700 Low side on 35 25 5 8 aW 6 8 45W 1050 High side 16 25 5 9 bv 28 1 4 5V 1880 Dusl Low sige 16 25 6 5 10V 10 1 4 57 1243 Dual Low sige 14 25 9 2 10V 13 7 4 5 810 Dual High si 14 25 3 2 10W 13 7 4 5V 810 Dual High si a0 25 46 10V 8 1 45W 1850 Low side on 1 8 10V 25 4 5 er Low side on Link to the static datasheet The analysis page of default values is appeared If you want to continue the simulation by default values the simulation of all charts starts by clicking RUN ALL TEST If you would like to change the values please change it by overwriting on the setting page which is appeared by clicking EDIT button under each setting table And start a simulation by cl
8. to Renesas VP powered by SIMetrix SIMPLIS Simulator SIMPLIS Graphs and Data Help For help using this application please use t 5 Although there are some limitations in function this tool allows to simulation on the screen Fig 6 by making other circuit data Note This tool fulfills its original function when a downloaded circuit schematic on this site is combined with Renesas power MOSFETs 7 3 My Designs Save or load to use again the personal designed data by Buck Designer Home Renesas Virtual Power Lab Renesas VP Buck Designer My Designs Requirements SAVE CURRENT DESIGN Recommend FETs Design Name ConverterDesign MyDesi n o O j System Enter a design name Switching Design Description Efficiency Design Comments MyDesigns Note a additional explanations or comments LOAD DESIGN Design Hame High Side FET Low Side FET Description Saved Note PC for KXKX RJKO365DP4 02 RJKO391DPA Apr 18 2010 9 57PM Saved designs are listed here Rev 7 0 Page 13 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 8 DrMOS Performance Analyzer Enable to simulate the operation of DrMOS which offers superior performance over discrete solution Beside SPICE simulation you can also simulate thermal analysis 8 1 Condition Setteing On landing page select DrMOS Performance Analyzer at first the condition setting page Requirements is displayed Please inpu
9. 2 Use functions such as RSM average and peak values Checking or un checking the checkbox in front of the waveform name will turn the display on or off Rev 7 0 2013 07 stENESAS Page 8 of 21 http www renesas com vp Renesas Virtual Power Lab 5 Buck Designer Recommended FETs 5 1 Condition Setting and Combination Selection The Requirements screen to set conditions is appeared Set the values of DC DC converter such as input voltage output voltage and phases at first After that recommended combinations of power MOSFETs which are selected based on your requirements are displayed by clicking Next button Then select the combination you would like to check by clicking Select button Change the values Select the combination REC CEM ETS EC LTS ee P anil Tal a Requirements i I j Eigh Gide FET Gig OG ee da FED O ES fem Repre menin m Tep HEAR TETTA Ca Sep HEGRE ET Cerarirr eee nod singe Pieter ua hanes ae Dapa Cane ra Peg FELEL TI aren er Click button to sort the product list TI sarmer D Pau i Hover the mouse cursor over to show TAAN i explanation of each item a a Eg ml eee ee Brimi 5r 5 2 System Schematic and Switching Circuit The system schematic is appeared by selecting one of recommended combinations at first It allows to edit values in the dialogue box by clicking blue colored one Note System c
10. 5mvy 1 47mi T3 EmA 24 Omvv B53 48 6m 496m MOSFETs and Drivers 4 11 Power QH2 Gate 6 99mvy Power QH2 Drain TAN Power QL2 Gate 44 5mvV Power QL2 Drain 2 270 Power Driver 64 9mvy amp Print this page Current Design not sawed The red line represents DrMOS and the blue line represents discrete DrMOS has advantage over discrete The DrMOS and discrete losses are broken down into components These numerical data are the components of losses Rev 7 0 2013 07 stENESAS Page 17 of 21 http www renesas com vp Renesas Virtual Power Lab 8 7 PCB Design for DrMOS Board Layout In 8 7 to 8 11 sections the operation of thermal analysis is explained This section is about DrMOS board layout design The heat values of each parts are calculated in aforementioned circuit simulation and these valued are automatically inputted Home Renesas Virtual Power Lab Renesas VP Performance Analyzer PCB Design Current Design not saved Requirements DrMOS Board Layout Recommended DrMG Status boardFront dimensions updated Performance Analysis DrMOs Overflow Board Primary Side Secondary Side MOSFETs Primary Overflow Losses amp Efficiency Secondary Overflow Theal Ansipi Click Thermal Analysis to jump to Design Summary thermal analysis My Designs C PUREED a i You can move components by drag and drop ACTIVE i NOT PLACED ONBOARD p COLLISION KEE
11. A Dosign Simmu y L win hy Dasigns Let Thu C aii T kzi DOE E OE E R S A E OE ee O O ee ee z imi aT E E OTRE OTE Ee Eg 3 a 5 l pt ae A a i oo ARRrD Rev 7 0 2013 07 stENESAS Click Switching button to show the diagram below You can zoom waveform and read numerical data by marker DOHI OO530 6 6 OEST 6 O96 Pia E 0 O2S0 8 Time nh Page 15 of 21 http www renesas com vp 8 5 Discrete MOSFETs Solution Circuit You can also simulate the discrete MOSFETs solution This MOSFET combination are equal in Rds on to the DrMOS Home Renesas Virtual Power Lab Renesas VP Performance Analyzer Performance Analysis Discrete HS Fet RJKO3 Requirements Recommended DrMOS Performance Analysis DrMos MOSFETs gt Losses amp Efficiency PCB Design Thermal Analysis Design Summary My Designs Rev 7 0 2013 07 MOSFETs Fa UL lu H rR lcin CVCIN E rl e 356n H ICIN 9m Q 106 Q VCC PVCC BOOT E HGATE i amp Print this page Current Design not sawed LVIH imQ Vin 20n H IIN CVIN zE u F Vin gt LPCB_ F 130p H iy 600u A i 600u Q 300p H 106 Q 940m Q JKO365DPA_02 LSH 200u Q 100p H 310m Q 2 a QH J J 2 LDL 400u A 200p H Lo emo VSWHC Sabu ISW ILOUT VV QL2 RJKO3S0DPA L LSL 60u Q 3 350p H 3 1 1 2 stENESAS Renesas Virtual Power Lab WebsSIM Page 16 of 21
12. P 21 Rev 7 0 Page 2 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 1 User Registration The registration to MyRenesas is necessary to use Renesas VP MyRenesas is a subscription service provides convenient e mail updates and additional supports such as tool download And Renesas VP is provided as one of its premium services Therefore please confirm the checked Renesas VP in the premium service when you register and set up your subscription alerts If you are already MyRenesas member you need to edit your content subscription and add this service after logging in Renesas website Products MUTOMOTIVE a oe Take a step toward the futur The world s highest perforn Stress free response and graphics more ex A single chip covers navigation and advance Pick a Pari Products Overview 1 1 New Registration 1 Enter you name and e mail address Provisional registration 2 Receive confirmation e mail and click the link 3 Create your profile 4 Subscribe to services Registration complete 1 2 Edit Subscriptions 1 Login to MyRenesas 2 Click Edit Subscriptions in your profile page 3 Add a check to Renesas VP in subscription page 4 Click Next and your profile page will be appeared again Change complete Dereoanent Tonks gin Sernices Prowiged Dy Tour ity Renesas Account E F Alert fare Calig Service Ing Lint ie Registratio
13. POUT ial a E a Fi Disable Wamings Messages 8 8 PCB Design for Discrete Solution Board Lyout Below is a operation screen of discrete solution board layout Home Renesas Virtual Power Lab Renesas VP Performance Analyzer PCB Design Discrete HS Fet RJUKO3 Ciida Current Design not saved Click Discrete Board Layout to jump to Status boardFront dimension this screen Recommended DrMOS Performance Analysis aaa z EEP ET TE DrMOS verfiow Boar Primary Side Secondary Side MOSFETs Primary Overflow Losses amp Efficiency Secondary Overflow Thermal Analysis Design Summary My Designs BEREREGI E L J ACTIE JI NOT PLACED ON BOARD g CoLlision Jj KEEPOUT go Disable Wamings Messages Rev 7 0 Page 18 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 8 9 PCB Design for Board Specification Below is a operation screen for setting board size thickness and number of layers Home Renesas Virtual Power Lab Renesas VP Performance Analyzer PCB Design DrMOS R2J2065 NP Discrete HS Fet RJKO365DPA_02 LS Board Definition eee Board Definition Recommended DrMOS Width Performance Analysis DrMOs MOSFETs Number of layers Losses amp Efficiency Height PCB Design PCB Layers ID Thickness Material Coverage 0 07 Copper 90 0 4 FR 4 Glass Laminate My Designs 0 07 Copper 0 4 FR 4 Glass Laminate 0 07 Copper 0 4 FR 4 Glass Laminate 0 07 Coppe
14. RENESAS Lab wP iisa a a WebSIM Renesas VP User Manual The Simulation Site for Renesas Power MOSFETs Rev 7 0 2013 07 Overview Renesas VP stands for Renesas Virtual Power Lab and it is the site to simulate the power MOSFET operations of synchronous rectified buck converters This site enables to calculate a waveform of buck converters or a loss of power MOSFETs of the power supply in a board around MCUs or SoCs such as POL Therefore you can select suitable power MOSFETs when you start to design and also it supports to speed up the evaluation Before Use The registration to MyRenesas is necessary to use this site When you register for the first time please enter your information in the registration page and confirm the checked Renesas VP in the content subscription page You can access Renesas VP from your profile page of MyRenesas or logos banners on our website after you have completed the registration If you are already MyRenesas member please edit your content subscription and add this service This site consists of two sections One is ACTIVE DATASHEET to simulate the characteristic of power MOSFET itself the other one is BUCK DESIGNER to simulate the operation of buck converters in a model circuit And the viewer with common functions for a simulated graph allows to scale move and read the value by its marker Please refer to the help in a viewer for further information The target product is mainly the 10
15. e HS Fet RJKIIGSOPA 02 LS Fet RJKTIMIOPA Top ot toas Ban of howe DOS Cae Hag Ceos Cee Low DMOS Con rag Temperatures Temperatures PART TEMP PART TEMP Max Surface Temp x Max Surface Temp 67 8 PAEPAE sere Display the temperatures of a a each components Discrete FETs and Parasistics Driver Rev 7 0 Page 20 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 8 12 DrMOS Design Summary View the summary of a simulation by DrMOS Performance Analyzer As well as Back Designer you can download the page by PDF format and BOM by Excel format feng d Feu Sheed Psn Let lena bhy Paes Seiya Design Summary GMOS FGUADGSTAP Dieerete HS Fee FURDSDPA 07 LS Fee FUR m a ee n direm PDF file download Demag Perpa treet Fup aa Partonmance ARAE AN aije ay hae tat Taig wi i yI a oe i Beiling f guriin 600 wu Losser L pricey Yona Ter pares LE Desig herie Jae 5150 hig Waimea 0 a0 3S eo Phetemal Anahi phage Mr bes y are on w You can save your circuit conditions Di apes pi O08 af Geipel Capacities a My signa wis EER zi inpri Canaris Ta Doar d Detiremon Wgt e ahh aight e E Ew W E eh LT Leiti CS LS MOEFET kiiit E ii Loree Rev 7 0 Page 21 of 21 2013 07 stENESAS
16. en it My Renesas 4 a ia E XN Login 1 r aS Ger N g N Please login to proceed the process eh cen Sees ie Ee a es ed mop ee ar w E Tr i a Email address re i J z7 Password tA T 1 a e LASU Hinna ae SI W a E Ta i A m me 1 T g I ee ii L Forgot your password Foe T of ae New user Click here to register now E Ti p Se Ee If your login authentication cash is left login page is displayed Rev 7 0 Page 4 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 3 Landing Page This is the first page of Renesas VP Two menus and outlines are described ACTIVE DATASHEET Enable to grasp the further characteristics with adjusting each parameter compared to a static datasheet BUCK DESIGNER Enable to simulate the operation of power MOSFET of synchronous rectification method buck converters DrMOS PERFORMANCE ANALYZER Enable to simulate the operation of DrMOS which offers superior performance over discrete solution HE RENESAS Renesas Virtual Power Lab Renesas WF DrMOS Discrete MOSFET Oreos Performance Analy rer Buck Desagner Active Datasheet See M S Panaman e Aralyzer Delis offers sapar ka Pere yee Tha Geck Cheeky bees eee i Provides graphical chars sa eo nilel discnese MHIS E I solpiioma generate a buck desi Gage on wee iniwan Gor ee hescied IS E Is mpi and ewalugie peciomance belme
17. et conditions is appeared Set the values of DC DC converter such as input voltage output voltage and phases at first After that recommended combinations are displayed by clicking Next button However if you want to try custom solutions click the tub of CUSTOM SOLUTIONS at this time Edit the values Click CUSTOM SOLUTIONS E Ea wd ol Gon Le Requirements REC Ce RET EC LTS td ieee z G hap HEGRERE me rT Teini b Maire y iter fp Racor Fe Ta tne Auta Buccs F g ii T _ o a o Corverier mpn ra singu I T B40 igh Side PET Gy DE breda PET ey ral EE en Fe Erro i pem fp aeT el rer Tipa ae dep can Diem z fp Demigns Tate Dome Cera P inten 2 in i i tT Tekin MECE hr s aan en oi aka ETET T Eip i nT eked fier Or See Haisan a m Beisa Teea Sraa kE E E PERE chid Piai Targa Sab oe z dn er tert Eg ile a 6 2 Custom Combination Setting Set a combination you would like to simulate as below and start a simulation as in case of recommend combinations 1 Select both high side FET and low side FET and set each parallel numeric values 2 Set combinations are listed here 3 Display an estimate of loss by clicking Calculate button Home Renesas Virtual Power Lab Renesa e F Buck Desigir Recommended FETs Requirements RECOMMENDED SOLUTION CUSTOM SOLUTIONS Recommend FETS Converter Design SOLUTIONS System i S
18. icking RUN TEST after that Herve J Metesat Vitusl Powar Analysis FET Selection RJKO204DPA Amatysis Dii Vor U Vere VP Rogan IV im Ramou ASV imi Simulate all charts Switching TRANSFER CHARACTERISTICS 6 VocO8 vs Vee SJ yt eopPaese2 thy lL e532 7h tes IHETAT Hi bea He 01 CLE FSP C RWEC SOLLES pascrauess POF SD GRAPE J l sxipa aune pecestscance L oazaphtecs Cabpus cove cL FARAR Yis lee big YHEKS PakaAM Se BIH Pole Download spice data a iP m4 Rec VS JBCKT REKESAS_TaST TRAIK GATE SOU7 TE Dewnleed SPICE Medel Plat A07BCE 3 35 56 1 34 FLL io u Jul PIS T 4 545s50 a0g 3055 Ths 0 75 Foo a J OLL FL 3 3 7 00 159852 TE 9 00S 337S550340 3509 1 95952 ITT 3de 15 FED 9 4 OCT LLOAS S522 736253 TO DO SSSA TSO aiot 79 fa GL La bE PLI Y 5 OLL 5 0 II Vos BOP Y a RJKODMOPA Pakas Bp Pog ith Yapti jSiliiests Co oP Bie a Dimberin lp Mendrmum A Yos Vos Mrnm Vos Mesaun y za T i Overwrite the value in the BOX Rev 7 0 2013 07 Page 7 of 21 stENESAS http www renesas com vp Renesas Virtual Power Lab 4 4 Characteristics Ma Thumbnails of each chart are appeared after you click RUN ALL TEST The detailed characteristics map is Analysis Click a thumbnail and open a viewer 4 5 Operation of Viewer Zoom In Q Zoom Out Marquee Zoom Go back one zoom level lt Go forward one zoom level a
19. ircuit and switching circuit are prepared in this converter design page and blue colored parameters of both circuits are editable However please check the switching circuit to get accurate characteristics because system circuit is omitted some parameters such as floating impedances to keep the calculation scale within its reasonable values System schematic Switching circuit Efficiency calculation Home t Renesas Virtual Power Lab Renesas V j Buck Designer Converter Design amp Print this pe Saran Download schematic Recommend FETs Converter Design Select Analysis Transient v Results Waveforms will be available MA system Switching Efficiency VIN IIN LIN KIBAT ICIN 200u Q C1 Design Summary cca i IDQ1 vee uF 100 TA My Designs 5 p F 01 s00uo RJKO365DPAD2 1 as 1X RF1 RF2 CC2 at 100k fp 249kQ 12nF COMP Edit LOUT1 Inductor cc3 a 18n F J Pig DC Winding Resistance 950u Dialogue box 1 pai i to change parameters Cancel ICOUTX ICOUTY COUTY 800u F 260u Q Rev 7 0 Page 9 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 5 3 Waveform Chart of Each Point Buttons to show each waveform are appeared in a result space by clicking Start Simulations button Every waveform allows to scale move and read the value in an original viewer Gate drive waveform Voltage waveform of control IC Current waveform of inductance Input waveform Output waveform
20. lect button to jump to a simulation page ai Click to show the product i feature l Highest performance Built in SY Double Thermal Protection 3 3 5V PAM interface Page 14 of 21 http www renesas com vp Renesas Virtual Power Lab 8 3 DrMOS Solution Circuit The selected DrMOS circuit diagram is displayed Home Renesas Virtual Power Lab Renesas VP Performance Analyzer Performance Analysis B Print this page DrMOS R2J20657NP Current Design not sawed Requirements DLE Start Simulation Recommended DrMOS Performance Analysis rMOS gt MOSFETs Losses amp Efficiency PCB Design Vin IIN Thermal Analysis 7 Nae Design Summary LPCB_V CvIN 264p H 130p H all 153 0 600u Q My Designs 1060 g DISBL VCIN RegSV VIN VSWH R2J20657 NP THWN PWM PGND CGND LSDBL GH GL 8 4 DrMOS Solution Circuit after Simulation Click Start Simulation button to start the operation waveform simulation Click peripheral parts to change parameters blue text After simulation Input Output and Switching button are displayed Click each button to show the operation waveform hieme f Manarar Virtual Press Lab ange pe Parea anpa Anatra Performance Analysis m Pr his page Chios Runes AP Currend Design nol mayad D aos Roguiromanta l Aired A k he Scene WebSIM Lo MOSFETa Liss Eafe LW POR Design j kalen ti E ORA
21. lowing contact form Renesas Electronics Corporation Customer support contact form http www renesas com contact Rev 7 0 Page 1 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab Index 1 User Registration wa PL3 1 1 New Registration P 3 1 2 Edit Subscriptions P 3 2 Login rm P 4 3 Landing Page a PS 4 Active Datasheet P 6 4 1 Product Search P 6 4 2 Product Selection P 7 4 3 Simulation of Each Chart P 7 4 4 Characteristics Map P 8 4 5 Operation of Viewer P 8 5 Buck Designer Recommended FETs P 9 5 1 Condition Setting and Combination Selection P 9 5 2 System Schematic and Switching Circuit P 9 5 3 Wavaform Chart of Each Point P 10 5 4 Efficiency Curve P 10 6 Buck Designer Custom Solutions P11 6 1 Condition Setting P 11 6 2 Custom Combination Setting P 11 7 Buck Designer Other Functions sv P 12 7 1 Design Summary P 12 7 2 Downloadable Simulation Tool P 13 7 3 My Designs P 13 8 DrMOS Performance Analyzer P 14 8 1 Condition Setting P 14 8 2 Product Selection P 14 8 3 DrMOS Solution Circuit P 15 8 4 DrMOS Solution Circuit after Simulation P 15 8 5 Discrete MOSFETs Solution Circuit P 16 8 6 Losses amp Efficiency P 17 8 7 PCB Design for DrMOS Board Layout P 18 8 8 PCB Design for Discrete Solution Board Layout P 18 8 9 PCB Design for Board Specification P 19 8 10 Airflow Setting P 19 8 11 Thermal Analysis Results P 20 8 12 DrMOS Design Summary
22. n Process a So Boo EL annie ii bipm sie fiat E a z maitari Profile page of MyRenesas My Renesas Your current profile and subscription information are shown below Title Given Name First Name Family Name Last Name Email address Country Region Postal Code Phone Number Permission to supply information to authorized distributors Edit Content Subscription Edit Subscriptions Button to access MyRenesas Permission to Email marketing promotions and news updates Renesas Sales can contact me Registration Agreement Edit Profile Change Password Renesas WP Rev 7 0 2013 07 stENESAS Page 3 of 21 http www renesas com vp Renesas Virtual Power Lab 2 Login Click the banners or logos of Renesas VP on the power MOSFET related pages of Renesas website or visit http www renesas com vp directly Of course you can access from the profile page of MyRenesas Ex Power Devices category page Power ISET O P misiba lar a raira rloare aach nn prere IRELE EAH ed PP NERANG ee il net ee ee eee lir harr prebe ie bor ruri tidi H jil E Da el al ia he ee reris Er gne Pm ee eee hpa ee LEJE bitami Ea hh eee i ed l Pee ras arem LF ee te l Keg ENT Hina hN sees cope od ed de ee eee ia T WnTr E Reto A ee ged UF jm he P i Li i a ae m Le Tir mp es y Mem a l ee a al aan i Dmdi Erih bai inh a aadal alai Poe Si preglige Pej eyTE nE eres
23. r Update gt Thermal Analysis Design Summary 8 10 Airflow Setting below is a operation screen for airflow setting Home Renesas Virtual Power Lab Renesas VP Performance Analyzer Thermal Analysis Thermal Analysis RJKO365DPA_02 LS Fet RJKO380DPA Current Design not saved Click Start Simulation to start Recommended DrMOS l E thermal analysis Performance Analysis Alr Temperature s yka Disable Air Flow Air Speed 100 itm Air Direction Left gt Right Losses amp Efficiency DrMos Discrete PCB Design Primary Side Secondary Side Primary Side Secondary Side Cl ick Therm al An alys i Ss to ju m p Thermal Analysis to this screen Design Summary My Designs i Components with power losses E Components with power losses Scale 5 Pixels 1 mm Scale 5 Pixels 1 mm Rev 7 0 Page 19 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 8 11 Thermal Analysis Results You can compare the thermal distribution of DrMOS solution with discrete solution mame Marsan Viha Peat Lab Basan AP F aes darem For thermal distribution on board you can change point of sight top side bottom side front side and back side homa Renesas Aise Paa Lah Ponasss YPS Fedtremenne An sipman DMOS RZ20657 8 Discret
24. r Capacitor Capacitor Capacitor Capacitor Capacitor Inductor e Inductor 1 RJKOS65DPA 02 MOSFET 1 RJK0391DPA MOSFET 1 1 00kOhm Resistor 1 2 49kOhm Resistor 1 34 80hm Resistor 1 10 0kOhm Resistor OUTPUT LOAD a ht woerl Capericer Pw iiri oP setulae bo bere your T oire Peerered amp Renesas Lan VP Snare Son Cownined Vernon 40e Undated December 10th 2008 See Sy nies eo erate Corer aca b aiey oherat Rev 7 0 Page 12 of 21 2013 07 stENESAS http www renesas com vp Renesas Virtual Power Lab 7 2 Downloadable Simulation Tool The simulation tool for off line 1s available after a simulation 1 Download a simulation tool the data of a system schematic and a switching schematic from the bottom of Design Summary page Fig 1 and save them to your Renesas Virtual Power Laboratory SIMetrix SIMPLIS own PC Please note that the file may be a large size RENESAS Lab Powered By Download System Schematic Download Switching Schematic Fig 2 Fig 3 2 Double click on the simulation tool Fig2 Renesas VP exe to install The menu of Renesas VP is added to a start menu of your PC Fig 3 when the installs are done 3 Click the menu and click OK on the screen Fig 4 to Start Pe mi ha eume mr iminy aia ee aes mr m 4 Start a simulation by selecting downloaded data such as a circuit data and a spice data online on the next screen Fig 5 welcome
25. t operation conditions Home Renesas Virtual Power Lab Renesas VP Performance Analyzer Requirements Design Requirements gt Recommended DrMOS Input Voltage Output Voltage Performance Analysis DrMos Max Load Current MOSFETs Frequency Losses amp Efficiency VCIN Driver IC Voltage Ambient Temperature Simulated Junction Temperature QHS 50 Design Summary Output Inductor My Designs Package Size Snubber Advanced Requirements 8 2 Product Selection Recommended Output Inductor cals 60 0 32 0 32 i mo n ma O Emm x 6mm O 8mm x 8mm Both Oves No Input power supply conditions Decide package size of DrMOS Click Find Parts gt gt button to jump to the recommended DrMOS list Show Display the recommended DrMOS product list Please select part number for simulation Home Renesas Virtual Power Lab Renesas VP Performance Analyzer Recommended DrMOS Requirements Part Number gt R2J20657 NP Performance Analysis R2J20653NP DrMos A p 220605 ANP MOSFETs Losses amp Efficiency R2J20655NP R2J20651ANP R2J20652ANP 6 R2J20653ANP Design Summary My Designs Ya be OOOO Rev 7 0 2013 07 Package 6mm 6mm x Smmx amp mm x mm x mm x6 xmm 6mm smm mm mm lout Max 40 40 Loss WV stENESAS Efficiency lout Max 91 18 90 24 Efficiency 1 2 lout Max Click Se
26. witching High Side GET Oty Low Side FET Oty Toil Loss Analyze eee RIKO204D P 1 RIKOZ04D PA 1 3 98 My Designs RJKOZ06 DF 1 RJKOZD4CFA 2 Calculate High Side Low Side Ras On Ras On DS FET Oty Pkg imOhm DS FET ty Pkg inmh DS RJKO204DPA WPAK 27 DS RJKO204DPA WPAK 927 DS RJKOZOBDPA 1 a wPAK 18 DS RJKOZOBDPA 1 laal wraKk 18 pasantaa inane A A F A t 5 bs RJKO208DFA eae 4 Start a simulation by clicking Analyze button of a good combination after testing some patterns DS RJKO301DFB LFPAK 28 yee eee eee 1 U DS RJKOZO2DFB 1 e LFPAK 3 1 DS RJKOZOZDPE LFPAK 3 1 DS RJKOZ03DFB LFPAK 3 7 DS RJKOZ03DFB LFPAK 3 7 Rev 7 0 Page 11 of 21 2013 07 RENESAS http www renesas com vp Renesas Virtual Power Lab 7 Buck Designer Other Functions 7 1 Design Summary View the summary of a simulation by Buck Designer Furthermore you can download the page by PDF format and BOM by Excel format Heston f Anemia Design 4 Prp emera Pecan al PETE Conyvetter leek Fetch iasi Detiga Siih y Bhe Lie nian a he zs v amp ha ahd oe Ee hi aur Ci el omer Ib apd T a EL nbs mat Coe trea Be al LE P 2H ep 04 mb F liz a at LE Ds Teie Mersin Meus Any snp Boe T Eia Hak Part Bis Path age Mak iwi Tee ie i ie ge Bet cnn Ta aahsene orada el del a ae FE T iih bit pe no gh WPih mi 54 reer Description Capacitor Capacitor Capacitor Capacitor Capacito
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