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LN2410SBC User`s Manual
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1. NAND Type Flash 256Mbit Flash 8bit Bus Interface NAND Flash Boot SDRAM 512Mbit SDRAM 32bit Bus Interface 256Mbitx2 4 MMC SD Interface Compact Flash Interface Storage type 4 10Mbps LAN CS8900A Sound output Built in Speaker Audio Codec Infrared sensor Remote Receiver USB Host Ich USB Device Ich Serial 3ch JTAG Port Ich HDD CD Rom Interface www clabsys com 2 ZY CLAaBsys Cyber Lab System RIC Backup Battery Status LED 4EA I O 2 LAN 2 STN TFT LCD support with optional LCD pack LVDS TFT LCD 10 4 inch support with optional LVDS pack LN2410SBC www clabsys com LN2410SBC 1 3 Function Block Diagram JTAG UARTO UART UART2 USB Host USB Device Remote Controller SPEAKER RTC Power Status LED Humek www clabsys com S3C2410X ARM 920T LCD LCD Controller DMA 5 USB Host Controller ExtMaster NAND Controller BUS Controller Arbitor Decode Interrupt Controller Power Management Memory Controller USB Device SDI MMC Watchdog Timer BUS Controller Arbitor Decode SPI O 1 A Fig 1 1 IIC IIS GPIO RTC ADC Timer PWM 0 3 4 Internal DESS CLABSYS NIT Cyber Lab System SDRAM 512Mbit NOR FLASH 16Mbit NA
2. LN2410SBC User s Manual Cyber Lab System ZY CLABsys ld LN2410SBC Eet CRT EE KEE 2 1 1 BE 2 1 2 EN 22 10 SBC SBC HAO sro a minia elati aaa 2 1 53 Function Block Dr EE 2 Board COMMSULAU ON EE F al EE Te I OI Ste E mm m ut 6 20 SDRAM Chip Select CS Gelecton 7 24 Pool Eeer tens 7 SE N EE 8 er E Nor Flash Booting e TE 8 16 NAND Flash Booting EEN 8 4 Example Code et EE 10 4 1 ORI suum ms mudilas tuu 10 4 2 EE 10 4 5 EE II CO Go 66 6 E a 10 4 4 ECH EE 11 4 5 WDT Watch Dog Timer EE 11 4 6 RTC Real Time Coe JAAMA 12 4 7 ADC Analog to Digital Converter AANER 13 SAA ile ye MAMM E ui 14 ol OOS HGS TA OTN siorse ee a avi iela 14 2 DOOR EE 14 1 www clabsys com BY CLaBsys LN 24 1 0 S BC Cyber Lab System 1 INTRODUCTION 1 1 Overview The LN2410SBC is a high performance single board computer based on ARM920T MMU included Its ultra low power consumption various built in IO ports and support for Linux WinCE RTOS make it suitable for many industry applications 266MHz clock speed STN TFT display support Compact Flash MMC NAND Flash mass storage support Ethernet and sound support These features provide an ideal develooment platform for PDA DVR image processing and network terminal 1 2 LN2410SBC Specification Size 110x78 mm 2 5 inch CPU 53C2410X ARM920T 266MHz amp Memory NOR Type Flash 16Mbit Flash 16bit Bus Interface
3. Interrupt WTCNT i GA Down Counter Reset E gnal Generator RES WT CON 15 8 WTCON 4 3 WTCON 2 WWTCONID m Fig 4 3 Watch Dog Timer Block Diagram 4 6 RTC Real Time Clock The S8C2410X has a Real Time Clock and Ex06 RTC displays the clock to the serial console The RTC registers are programmed from Rtc_Set function in BCD format An external 32 768 KHz crystal is used for RTC to create 1 second time tick A backup battery on LN24105BC supplies power when the system power is off Figure 6 4 shows power switching between backup battery and external power supply With external power 1 8 volt is applied to VCCRTC VCC1 8 R5 1K R6 1K VCC3 3 VCCRTC xt A 32 768kHz ECH Cu C8 C10 104 22pF 0 22F SupurCap www clabsys com 12 ZY CLaBsys Cyber Lab System LN 24 1 OS BC 4 7 ADC Analog to Digital Converter The 53C2410X has 8 channel 10 bit CMOS ADC built in The analog signals AINO 1 2 3 4 5 6 7 are to be provided through extension connector J6 The AIN5 7 are dedicated to touch screen interface therefore shouldn t be used for other purpose Ex07 ADC reads ADC DATA of each channel and displays them on the serial terminal Ex21 Touch shows how to implement touch screen using ADC 13 www clabsys com ZY CLABSYS L N 24 1 0 S B C Cyber Lab System 5 5 1 9 9 9 5 2 Reference Documentations ArmDown User s Manual Samsung 53C2410X User s Manual
4. samsung S38C2410X Application Note ARM920T Technical Reference Manual ARM Developer Suite User s Manual Books ARM System On Chip Architecture Second Edition By S Furber Addison Wesley ARM Architecture Reference Manual Second Edition By David Seal Addison Wesley ARM System Developer s Guide First Edition By Andrew Sloss Dominic Symes Chris Wright Morgan Kaufmann System Developers wide www clabsys com 14 15 www clabsys com
5. ND FALSH 256Mbit MMC SD I F CF I F il LAN HDD CD ROM I F Extension Header d ZY cLaBsys Cyber Lab System LN 24 1 0 S BC 2 Board Configuration Fig 2 1 2 1 Main Power Selection The main power of LN2410SBC can be provided selectively Jumper Description ja USB supplied from USB host supplied from external power connector J1 or J3 Table 2 1 Main Power selection Shaded is Default Setting Value 4 If pins 1 2 of J2 are connected power will be supplied from PC USB host port Due to its limitation to 500mA an external power supply should be used for optional LCD pack 5 www clabsys com LN2410SBC GY wie Cyber Lab System f pins 2 3 of J2 are connected power will be supplied from external power supply through J1 or J3 connector Through J1 connector As show in Fig 2 2 5 volt should be provided through the hall of which diameter is 2 1mm A SMPS supplying 5V 1A DC can be used Through J3 connector The J3 was designed to provide power to external devices However it can be used as an input power terminal to the board as well Its description is shown in Fig 2 3 and Table 2 2 Pin Number Description Table 2 2 J3 Pin Description 2 2 Sound Selection The sound output is selected by J7 www clabsys com 6 ZY CLAaBsys Cyber Lab System LN 24 1 OS BC Pin Number Using TIMER IIS SOUND Using CODEC Table 2 3 So
6. ode the 4KB of the Flash memory is copied to SRAM starting 0x0000 0000 before booting Therefore NOR flash memory can be accessed from 0x0000 0400 www clabsys com 8 ae uku 0x4000 0000 nGCS7 ku m a i eee 0x3800 0000 nGOS6 EE 0x3000 0000 NGCS5 OE EE RN AE AE 0x2800 0000 NGCS4 erte 0x2000 0000 nGCss EEN 0x1800 0000 nGCs2 i ul Ox 1 000 0000 nGOSI Ja a 0x0800 0000 nGCso ee SAA 0x0000 0000 Fig 3 2 Memory Map NAND Booting Mode 9 www clabsys com ZY CLABSYS Cyber Lab System LN2410SBC 4 Example Code Tutorials 4 1 Overview Each example folder consists of project file C or assembly file library and binary image They were built under CodeWarrior for ARM Embedded System Rev 1 2 from Metrowerks 4 2 IO Port This example tests I O ports using Status LED D2 D3 Fig 4 1 1 0 Port status LED D2 D3 are connected to GPB5 GPB6 of 53C2410X respectively After setting GPB5 and GPB6 as output port write 1 to turn on the LED and 0 to turn off The code provided was designed to flash the LEDs The ports initialization is done in boot code and LED_Display in myLIB C is called from Main c 4 3 UART Port The S8C2410X UART Universal Asynchronous Receiver and Transmitter provides three serial I O ports Uart 0 1 2 Among them RxDO TxDO nRTSO nCTSO for UartO are connected to the serial connector The signals for Uart 1 2 RxD1 TxD1 RxD2 TxD2 are available through J6 c
7. onnector Ex02 Uart shows the UART usage by displaying variables on the serial terminal The UART related functions are defined in myLIB c and called from Main c Ex03 Calc is a simple calculator which gets the input 1 2 for example and displays its result 3 to serial terminal The ARMDown built in serial console or Hyperterminal can be used for serial terminal www clabsys com 10 ZY CLAaBsys Cyber Lab System LN 24 1 OS BC 4 4 TIMER The 53C2410X has five 16 bit timers as shown in Fig 6 2 TEMP BO TCNTBO Dead Zone Generator Control Dead Zone LogicO PCLK Bit Prescaler Control Logici Divider Dead Zone Control Logic TOUT2 Bit Prescaler TOUTS Control Logics Clock Divider 3 7 LU GA CH LO e Control Logic No ee Fig 4 2 16 bit Timer Block Diagram The timer input clock PCLK which of main clock MCLK 266MHz goes through 8bit orescaler and 4bit clock divider before being counted Ex04 TIMER was designed to flash LED in every second using Time It also displays timer count register rTCNTOO on the serial terminal Other timers can be programmed in Similar way 4 5 WDT Watch Dog Timer The 53C2410X watchdog timer is used to generate the reset signal when the system malfunctions It can be used as a normal 16bit interval timer as well 11 www clabsys com ZY CLABSYS Cyber Lab System LN2410SBC MUX WTDAT
8. und Selection Shaded is Default Setting Value When IIS SOUND is selected mono CODEC signal will be amplified by built in audio amplifier and drive the built in speaker Non amplified audio signal is available through J6 for external speaker or headphone 2 3 SDRAM Chip Select CS Selection By connecting 22 ohm register to R13 or R14 the SDRAM can be located either Bank 6 or Bank 7 respectively 2 4 Boot ROM Selection The S38C2410X can boot from internal NAND flash memory as well as external boot ROM or flash memory The LN2410SBC has 16Mbit NOR type Flash AM29LV160D as an external flash And the selection between the two flash memory is made by R9 and R10 when power up Description Boot from NOR Flash U5 AM29LV160D NAND Flash 3 Step Address Boot from NAND Flash U10 K9F5608 0 Q 3 Step Address Boot from NAND Flash U10 K9F5608 x 4 Step Address Boot from NOR Flash U5 AM29LV160D NAND Flash 4 Step Address Table 2 4 Boot ROM Selection x Shaded is Default Setting Value 7 www clabsys com 3 Memory Map 3 1 Nor Flash Booting Mode The LN2410SBC has 16Mbit NOR type Flash AM29LV160D memory which contains bootstrap code for ARMDown User application can be placed from 0x0001 0000 0x4000 0000 0x3800 0000 0x3000 0000 0x2800 0000 0x2000 0000 0x1800 0000 0x1000 0000 0x0800 0000 0x0000 0000 Fig 3 1 Memory Map NOR Booting Mode 3 2 NAND Flash Booting Mode In NAND boot m
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