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JUL 182005

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1. ne alan 66 4 2 THE PARAMETER FEST SUBV US 66 4 2 1 SNDE ese recess 66 4 2 2 Ihe TESEPSERR eoi Ee t C DE eds 67 4 2 3 Fhe CMRR SUD s eee et eta ree eee 68 S24 he Test IO SUDE T aot rico oi tei 69 4 2 5 The Test IH TR He Hie se re TEENS 70 4 2 6 The eee d eo EE c e to eee ken ee ute o rotat en evo eoe 72 4 2 7 Ihe Test GERR Subli ava aa ie oai ua 74 4 3 THE SINGLE CHANNEL INSTRUMENTATION AMPLIFIER TEST PROGRAM 75 5 SYSTEM PERFORMANCE 5 5 1 1 78 5 1 THE ANALYSIS CRITERIA 78 5 2 ANALYSIS OF VOS 8 6 2 1 1 0 60 nnn a 81 5 3 ANALYSIS PSRR 8 0 122 02 2000 82 5 4 ANALYSIS OF CMRR 5 6 84 5 5 ANALYSIS OF Q MEASUREMENTS 85 5 6 ANALYSIS OF IB IB AND IOS 86 5 7 ANALYSIS OF SW AND SW
2. 22 2 4 MEASURING LO PE 24 2 5 MEASURING AND TOS Usu 25 2 6 WIEASURING 26 2 7 MEASURING GERR 27 CHAPIERS SYSTEM HARDWARE 28 3 1 RESOURCE HARDWARE Leser de Lade 29 SLi 2 EE 29 2252 Dipu VO Mod le tpm I 29 3 1 3 Analog Output Module eit decr iov s d Pane 30 21 4 INS iets ices 30 3 1 5 Digital Multimeter 31 ILO Powe Supplies noscere uela eua Rens 31 Sie Resource Interface Board 31 3 2 TEST CONFIGURATION BOARD 33 3 2 1 Resource Interface 36 S2 ud 36 3 223 ANPE CUCU o 37 nma MEMINI UIDI e PER 41 3 2 5 Output Measurement 43 3 3 DUF SOCKET ADAPTERS ito e e ad es idend 45 3 4 DESKTOP COMPUTER 45 CHAPTER4 SYSTEM SOFTWARE 425525250500
3. 58 Figure 31 Program flow for the Output MDAC Voltage 06 59 Figure 32 Program flow for the IA Select MUXN Output subVI 60 Figure 33 Program flow for the Enable MUXN subVL 62 Figure 34 Program flow for the IA Select Voltage Amplifier subVI 63 Figure 35 Program flow for the IA Select PGA Gain 64 Figure 36 Program flow for the Measure EA VOUT subVI 65 Figure 37 Program flow for the Test VOS 6 ener 67 Figure 38 Program flow for the Test PSRR subVI 68 Figure 39 Program flow for the Test CMRR SubVI 69 Figure 40 Program flow for the Test IQ 1 2220000000 0 70 Figure 41 Program flow for the Test subV1 7 Figure 42 Program flow for the Test SWING 73 Figure 43 Program flow for the Test GERR SUDVL iier ne ee ro Poeta tah 74 Figure 44 The graphical user interface for the Single Channel INA Test Program 76 Figure 45 Program flow for the Single Channel INA Test Program subVI 14 Figure 46 A normal Gaussian distribution has 99 73 of its probability within a 6 Sipma Tange centered on THO TE o eo aot bx ip ea ion sexto ue aeu 79 List of Tables Table 1 Specifications for the direct current parameters of the INA126P amplifier 17 Table 2 Bill of mater
4. 8 1 6 6 88 5 8 ANALYSIS OF GERR 5 666 88 5 9 TEST DURATION TE 89 CHAPTER6 FUTURE WORK AND 5 85 1 90 6 1 MEASURING RESISTORS a duin ioa Pe t 90 6 2 RESULT AVERAGING 91 6 3 OPTIMIZATION DE DELAYS 9 6 4 CORRELATION TO MANUAL BENCH READINGS 2 22 2221 91 List of Figures Figure 1 The functional model of an instrumentation amplifier 12 Figure 2 The internal topology of a difference amp type instrumentation amplifier 13 Figure 3 The internal topology of the 3 op amp type instrumentation amplifier 14 Figure 4 The internal topology of the 2 op amp type instrumentation amplifier 14 Figure 5 Connections between components of AutoBench system indicate signal TOW Sio oo odes at 19 Figure 6 The first step of the test configuration used to measure 21 Figure 7 The second step of the VOS measurement is a reading of the error contributed by the output amplification Fe Cha ta a Sae vn 21 Figure 8 The test configuration for measu
5. 86 Table 20 The accuracy Of the IO T tes eem iei De o 86 Table 21 Statistical data for the IB and IOS 1 56 86 Table 22 The precision of the input offset current 87 Table 23 The accuracy of the input offset current 87 Table 24 Statistical data for the GERR TESE aacr Pat e e 88 Table 25 The precision ot tie GERR uote escis ae o t deret vata 89 Table 26 Ine accuracy of the GERR S6SL 89 Chapter 1 Introduction 1 1 Motivation for an Automated Bench Testing System Electrical testing 15 a routine and essential task performed at multiple stages in the production of integrated circuits ICs Manufacturing involves the probing of individual dies for critical electrical parameters at the wafer stage This probing permits the manufacturer to monitor yields and to avoid wasting assembly time on bad die In later stages of manufacturing when the ICs have been assembled into packages a final test of select electrical parameters is usually performed again in order to ensure that only devices that meet product data sheet specifications are shipped out Outside manufacturing engineers need to be able to electrically test ICs for the purposes of investigating device failures or for the qualification of new integrated circuit products It 15 in this other kind of testing which usually involves a fe
6. 47 4 1 THE AUXILIARY SUBV Ee exortu sos Das deetoa udi Se IR vo CI INE ha 49 4 1 1 Power to Board Regulators ON esses eee eee nne eren enne 49 4 1 2 Power to Board Regulators 20200022 22 00010010000000000000200 50 413 14 Ser DUT Supplies EE LEE EID E 51 41 44 Supplies OFE ae N 52 S15 dTASET Selected Relays 53 E160 TA RESET Selected Kelays 55 TARESETALL Relays ic nates 56 4 18 Output CM Voltage 3 2202022222 2 11 2000000001300000000000000040000 8 ns 57 31 9 AA OuputWHMDAC oma 58 4 1 10 59 4 1 11 EA Select MU XP 61 4 1 12 TA Ele casas castes 61 4 1 13 Enable MOA A 62 4 1 14 TA Disable MUX N e 62 4 1 15 TA Disable MUXP a 62 4 1 16 Select Lend fare net sen Idus uM 63 4 1 17 Select 63 4 1 18 Measure EAT VOUT a 64 4 1 19 Meusure LAL OUT
7. Select Summing Amp PG Amp gain of 1 1 Configure Amp inputs MUXN DUT_OUT_BUF MUXP MDAC Vref 2 Enable MUXN MUXP Figure 43 Program flow for the Test GERR subVI 74 4 3 Single Channel Instrumentation Amplifier Test Program The top level instrumentation amplifier test program appears as the graphical user interface GUI shown Figure 44 The user interacts with the test system via this GUI by changing the DUT identifier in the appropriate box changing the test temperature to be recorded and clicking on the TEST button when the device has been placed into the interface The instrumentation amplifier tests are executed sequence and results of the test are shown in the GUI The GUI displays the value measured for each test parameter the test limits for each parameter the units the pass fail status for each parameter and the cumulative pass fail result for the device The cumulative result 1s a pass only if all parameters are passes The results are also written into an output spreadsheet file whose name and path can be specified the GUI window The results are appended to previous data if the output file already exists otherwise a new files in created The top level test program is written as a Single Channel INA Test Program subVI which performs the reading and writing of input and output files global variables and GUI variables With this subVI there exists a Single Cha
8. 1 input Gain resistor pin 1 Output Gain resistor pin 2 Output Non inverting reference input Figure3 The internal topology of the 3 op amp type instrumentation amplifier Figure 4 shows the two op amp instrumentation amplifier topology which 15 used in the TI device INA126 RG Gain resistor pin 2 Gain resitor 1 Reference Inverting input Output Non inverting input Figure 4 The internal topology of the 2 op amp type instrumentation amplifier 1 3 1 The Ideal Instrumentation Amplifier A perfect instrumentation amplifier has no offset voltage at its inputs Consequently it has a zero voltage output when the same voltage is applied to both of its 14 inputs This characteristic is constant over entire specified power supply voltage and common mode input voltage ranges It draws no current from its supplies when it is not loaded and no current flows into or out of its inputs Its gain is perfectly linear and accurately defined by a characteristic gain equation Its output voltage is capable of rising as high as the positive power supply voltage and dropping as low as the negative supply voltage In reality however the above properties do not hold Quantification of the limitations of the above mentioned properties in a real amplifier give rise to the parameters defined in the next section 1 3 2 The Real Instrumentation Amplifier The parameters meas
9. to 10V which is configurable via a serial interface through digital This path made available for two reasons First to provide higher precision voltage signals Second to provide a differential input signal centered at OV to the inputs of the DUT The single ended output of the DAC 15 passed through a buffer op amp and a copy of the resulting voltage is channeled through an inverting amplifier configured to provide gain of 1 The resulting positive and negative voltages have the same magnitude and provide the differential input signals with 0 common mode that is required for tests GERR This 38 method allows for decoupling of common mode rejection limitations of the DUT from the errors due to gain nonlinearity This input source 1s called the Precision Differential Voltage PDV generator and 1s shown in Figure 15 910 2 8 i ticom vour 001010 15V lt PDv Rfb PXI DAC 8 t 4 PXI DATA gHr PXI DAC LD R39A 15 R39B sa PDV NA 1 C13 C14 a 0 14 L 0 1uF 7 15 15V Figure 15 A 16 bit DAC is used to generate the Precision Differential Voltage PDV resource 39 3 2 3 3 Grounding Inputs Relays provide the ability to connect each DUT input to the ground signal either directly or through a 10 resistor resistors R80 R81 R82 and R83 in Figure16 This capability 1s necessary for performing the
10. UC pup un DI ME DESDE NEA DANCE UTEM CU attire S LaL 3 iat MC re le US Inputs DUT Gain PGAmp _ Apply VINhi voltageto TU Gain Execute ie DUTinputsininvering DUE configuration Set relays to connect load yc 1 Configure Amp inputs MUXN DUT_OUT_BUF Configure DUT power DUT_REFB 2 Enable MUXN MUXP Apply VINIo voltage to DUT inputs in inverting configuration Measure 1 VOUT VOUThi Select PG Amp configure amp gain 1 Disable MUXN MUXP 2 Reset SEV to 0V 1 Configure Amp inputs 3 Reset all relays MUXN DUT OUT BUF 4 DUT power off MUXP DUT REFB 2 Enable MUXN MUXP Calculate CMRR from the 2 Measure VOUT readings VOUThi VOUTIo Output CMRR Disable MUXN MUXP Figure 39 Program flow for the Test CMRR subVI 4 2 4 The Test IQ SubVI The Test IQ subVI is used to perform the system configurations and measurements needed to calculate the quiescent current for the positive and negative supplies of an instrumentation amplifier under test This is a single channel amplifier test performed on the Channel B pins of the DUT interface The subVI outputs two numbers one value for each supply Figure 40 shows the program flow for the Test IQ subVI 69 p Ll pan cet 3 Input Execute x 1 Configure Amp inputs 1
11. 2 Reset all relays 3 DUT power off 4 2 2 The Test PSRR SubVI The Test PSRR subVI is used to perform the system configurations and measurements needed to calculate the power supply rejection ratio of an instrumentation amplifier under test This is a single channel amplifier test performed on the Channel B pins of the DUT interface Figure 38 shows the program flow for the Test PSRR subVI 67 Inputs DUT Gain PGAmp Confgure DUT power VSrange2 1 Configure Amp inputs Set relays to connectload DUT OUT BUF and ground DUT inputs wUXP DUT REFB TE E 2 Enable MUXN MUX P Select PGAmp configure amp gain ee TE Measure 1 VOUT V2 Configure DUT power VSrangel 1 Disable MUXN MUXP 2 Reset all relays MUXN DUT OUT BUF 3 DUT power off MUXP DUT REFB 2 Enable MUXN MUXP 1 Configure Amp inputs Calculate PSRR from the 2 readings V1 V2 Measure EAl VOUT V1 Output PSRR Disable MUXN MUXP Figure 38 Program flow for the Test PSRR subVI 4 2 3 The Test CMRR SubVI The Test CMRR subVI is used to perform the system configurations and measurements needed to calculate the common mode rejection ratio of an instrumentation amplifier under test This is a single channel amplifier test performed on the Channel B pins of the DUT interface Figure 39 shows the program flow for the Test CMRR subVI 68 I Tf tig APS THE CRDUDQ RES CUN EID
12. 2 Power Supply Rejection Ratio PSRR The power supply rejection PSR is an indication of how the VOS of an instrumentation amplifier changes with respect to variations in the power supply voltages PSRR is defined as the ratio of the change in VOS to causative change power supply voltages The parameter 1s determined by measuring VOS with inputs grounded at each of the extremes of the power supply range and calculating the desired ratio PSRR is reported in units of V V or as PSR in units of dB 1 3 2 3 Common Mode Rejection Ratio CMRR Common mode rejection CMR is an indication of how the VOS of an instrumentation amplifier changes with respect to variations in the common mode voltage at the inputs of the amplifier CMRR is defined as the ratio of the change in VOS to the causative change in common mode voltage The parameter is determined by simultaneously connecting both inputs of the amplifier to different voltages within the acceptable range of common mode inputs defined for the device and measuring the output voltage Essentially this is a measure of VOS with both inputs connected to non zero voltages The power supplies and all other factors are kept constant for all measurements CMRR is reported in units of V V or as CMR in dB 1 3 2 4 Quiescent Current IQ Quiescent current is the current drawn by the instrumentation amplifier when its output is not loaded and the inputs are both grounded This parameter is an indi
13. MUXN VIQneg_VS x CIO pl ibn MUXP VIQneg_VS P Setrelaysto ground 2 Enable MUXN MUXP 3 inputs leave output to float 0818 00000000 a 1 MeasureEA2 VOUT x Configure DUT power IQ zero reading through IQ resistors 2 Disable MUXN MUXP Configure input MUXN VIQneg 5 MUXP VIQpos_V5 1 Configure Amp inputs 2 Enable MUXN MUXP MUXN VIQneg V5 VIQneg_VS 2 Enable MUXN MUXP 1 Measure EA2 VOUT IQ reading 1 Measure 2 VOUT 2 Disable MUXN MUXP zero reading 2 Disable MUXN MUXP 1 Disable MUXN MUXP 1 Configure Amp inputs 2 Reset all relays MUXN VIQneg_VS 4 DUT power off MUXP 1 5 2 Enable MUXN MUXP Calculate 10 and IQ from 1 Measure 2 VOUT the readings and output IQ reading p 2 Disable MUXN MUXP Figure 40 Program flow for the Test IQ subVI 4 2 5 The Test IB Sub VI The Test IB subVI is used to perform the system configurations and measurements needed to calculate the input bias and input offset currents of an instrumentation amplifier under test This is a single channel amplifier test performed on 70 the Channel pins of the interface Figure 41 shows program flow for IB subVI Execute x VOUTbias 2 Disable MUXN MUXP PES DUET 3 Reset all relays 5 ays to DUT ires rm m 1 1 Configur
14. VOS PSRR IB and IQ tests GNDB GNDB GNDA GNDA BUF GND BUF GND Figure 16 Direct ground paths and resistive paths to the ground signal are available for the inputs of the DUT 3 2 3 4 DUT Supply Inputs The DUT is powered through high voltage high current op amp buffers that can be bypassed 1000 resistor R17 and R19 in series with each of the DUT power supply pins permits supply current measurement by measuring the voltage drop across the known resistances and applying Ohm s law The circuit is shown in Figure 17 40 EXTERNAL 5 gt lt lt VS OPAS47T E 4 VS PXI U8 Enable p C27 2 0 01uF C28 O 1uF 20V Figure 17 The DUT power is supplied through a resistor to enable measurement of the current flowing into the DUT supply pins 3 2 4 DUT Interface The DUT Interface consists of 16 pin connector in the middle of the INA TCB and provides support for the testing of both 8 pin single amplifier ICs and 16 pin dual amplifier ICs A signal hardwired interface is presented on the INA TCB but this can be adapted to suit the pin out of different instrumentation amplifiers using Socket Adapter Boards The DUT Interface consists of ground drivers for the DUT reference pins gain resistor connections load connections relays for selecting which amplifier channel to apply inputs and measure outputs from and the DUT socket itself Two loads per amplifier channel are supported Four ga
15. calibrated on the Test Configuration Board 3 1 5 Digital Multimeter Module The PX1 4070 is digit digital multimeter capable of measuring voltages of magnitudes up to 300V and currents as large as to varying resolutions The resolution is software configurable from 10 bits to 23 bits depending on the range of the input signal The multimeter is also capable of performing 2 wire and 4 wire resistance measurements 9 The AutoBench system makes use of the resistance and voltage measuring capabilities of the PX1 4070 to calibrate resistor values and for measuring voltages in the test procedures The digital multimeter inputs are multiplexed to multiple signals that need to be measured by means of the 2503 signal muxes The function of the digital multimeter is determined by the control software depending on the test being performed 3 1 6 Power Supplies Two Agilent E3631A power supplies are used in the AutoBench system Each E3631A power supply has three outputs a 6V output capable of sourcing up to 5A of current 25V and 25V outputs with a common ground capable of sourcing up to each The 6V ground is isolated from the 25V ground three output channels can be configured individually 10 The AutoBench system makes use of the 25V power supply channels One power supply unit is used to provide the configurable dual supplies to the device under test DUT The other is used to provide a 25V signal and a 25V signa
16. in IOS measurements occupies over 5096 of the tolerance The results show that the system measurements are poorly correlated with the ATE measurement used as the gold standard 212 Values Desired Status Correlation Criterion for IB IB and IOS IB IB 1OS IOS lt 1 Upper Bound HABE uDELTA 13 38 1 08 Bound uDELTA 13 56 46 uDELTA 30DELTA UTL LTL 0 1 Table 23 The accuracy of the input offset current test 87 AutoBench IOS test is shown be inadequately precise and inadequately accurate since neither the Repeatability nor the Correlation Criteria fully hold Suggestions for improving the AutoBench capability are discussed in the concluding section 5 7 Analysis of SW and SW Measurements The performance of the SW and SW tests is not analyzed using the Repeatability and Correlation Criteria as with the other tests A full analysis is omitted as this is not a test performed on the ATE system used and therefore there was no correlation to be performed Rather a test 1s done to ensure that the output of the amplifier being tested was capable of swinging to within the desired range of the rail voltage 5 8 Analysis of GERR Measurements The statistical parameters for the GERR test are derived from the analysis experiments and shown Table 24 The upper an
17. multiple loads Support for dual channel amplifier packages is included Relays are used to swap between the possible configurations 42 Figure 19 The output measurement circuitry includes multiple amplification paths to support signals of different characteristics The output signals are measured differentially Analog multiplexers are used to select the signals for the amplification 44 Figure 20 A PCB diagram for DUT socket 4404220 24 2 45 Figure 21 The front panel for a LabVIEW virtual instrument eene 47 Figure 22 The block diagram for a LabVIEW virtual instrument 48 Figure 23 Program flow for the IA Power to Board Regulators ON subVI 50 Figure 24 Program flow for the IA Power to Board Regulators OFF subVI 51 Figure 25 Program flow for the Set DUT Supplies subVI 52 Figure 26 Program flow for the DUT Supplies OFF subVI 53 Figure 27 Program flow for the IA SET Selected Relays subVI 55 Figure 28 Program flow for the RESET Selected Relays subVI 56 Figure 29 Program flow for the IA RESET ALL Relays 57 Figure 30 Program flow for the Output CM Voltage Gain3
18. the effects of sporadic environmental noise that has a good chance of corrupting a single reading 6 3 Optimization of Delays Time delays are used in many of the software subVIs written for the system to allow for signals to attain steady states before they are measured The time delays are used to avoid measuring unwanted transient effects since we are interested in the direct current parameters that describe an instrumentation amplifier in steady state operation Generally longer time delays are used in the subVIs than necessary for the sake of caution The longer delays increase the execution time for performing the parameter tests Optimizing the delays and removing the unnecessary ones could speed up the time for testing a device 6 4 Correlation to Manual Bench Readings The AutoBench system s accuracy could be better described by correlating results with readings obtained by manual bench testing of devices This is however a time consuming process and the improvement in the accuracy specification is not necessarily assured 91 References 1 2 3 4 5 6 7 8 9 10 11 92 S I Bouchez Direct Current Automated Bench Solution for a Dual Operational Amplifier in Chip Scale Package thesis Texas Tech University May 2003 N P Albaugh Instrumentation Amplifier Handbook Tucson AZ Burr Brown Corporation 2000 Texas Instruments Incorporated Micropower Instrume
19. 631 90002 pdf C T Robertson Printed Circuit Board Designer s Reference Basics Prentice Hall Modern Semiconductor Design Series 2004 12 National Instruments Corporation LabVIEW User Manual July 2000 13 M Burns and G W Roberts Introduction to Mixed Signal IC Test and Measurement Oxford University Press 2001 14 D S Luppold Precision DC Measurements and Standards Reading MA Addison Wesley Publishing Company 1969 93
20. An Automated Bench Testing System for Direct Current Parameters of Instrumentation Amplifiers by Arthur Musah Submitted to the Department of Electrical Engineering and Computer Science in Partial Fulfillment of the Requirements for the Degrees of Bachelor of Science in Electrical Computer Science and Engineering and Master of Engineering in Electrical Engineering and Computer Science Author Certified by Certified by Accer at the Massachusetts Institute of Technology May 18 2005 Copyright 2005 Arthur Musah rights reserved MASSACHUSETTS INSTITUTE OF TECHNOLOGY JUL 18 2005 LIBRARIES The author hereby grants to M I T permission to reproduce and distribute publicly paper and electronic copies of this thesis and to grant others the right to do so VI Cama om cam ath a po JA Department of Electrical Engineering and Computer Science May 17 2005 S 6 05 Mark Irwin Thacic Gunovyisor 7 en K Burns Supervisor PN E Smith iduate Theses An Automated Bench Testing System for Direct Current Parameters of Instrumentation Amplifiers by Arthur Musah Submitted to the Department of Electrical Engineering and Computer Science May 18 2005 In Partial Fulfillment of the Requirements for the Degree of Bachelor of Science in Computer Electrical Science and
21. ELTA the mean of differences in the value of a test parameter for measurements made on the ATE and on the AutoBench system oDELTA the standard deviation of the differences in the value of a test parameter for measurements made on the ATE and the AutoBench system R the mean of 34 readings of a test parameter performed on the same device on the AutoBench system e R the standard deviation of 34 readings of a test parameter performed the same device on the AutoBench system range of 6 standard deviations centered on the mean in a Gaussian distribution accounts for 99 73 of the area of the distribution In other words the standard deviation of a Gaussian distribution 1s roughly equal to one sixth of the total variation from the minimum value to the maximum value Therefore it is reasonable to assume that a good test system will mostly yield results in the range of the mean 3sigma to mean 3sigma 13 Figure 46 A normal Gaussian distribution has 99 73 of its probability within a 6 sigma range centered on the mean 79 The variation in value of a parameter for different devices yields a distribution within 3 cABE to In addition the repeatability limitations i e the errors due to the measurement system introduce a variation of 6 4 R to each of the values in the range defined above Hence the total resulting range of a measurement on the AutoBench s
22. Engineering and Master of Engineering in Electrical Engineering and Computer Science ABSTRACT Electrical testing is performed at multiple stages in the production of analog integrated circuits ICs An efficient system for low volume IC testing is one that automates bench tests and provides good measurement precision and accuracy while costing far less than the standard automated test equipment ATE used for high volume manufacturing purposes This thesis describes the design and implementation of an automated bench system for measuring the important direct current parameters associated with analog instrumentation amplifiers voltage offset input bias currents input offset current output swing common mode rejection power supply rejection quiescent current and gain error The system is developed on the PXI platform and consists of measurement and signal generating hardware modules a Windows based computer a resource printed circuit board PCB a test configuration PCB and LabVIEW based software The system 15 versatile and supports the testing of different instrumentation amplifier types and pin outs The performance of the system is characterized with respect to ATE results for the Texas Instruments instrumentation amplifier INA 126 Thesis Supervisor Stephen K Burns Title Senior Lecturer Harvard MIT Division of Health Sciences amp Technology Acknowledgements I am grateful to my supervisors Mark Irwin and Stephen Burns for thei
23. U11 028 U12 U14 TI U13 015 U17 U18 16 channel analog mux ADI U19 LTC U21 U22 U23 U24 U25 TI U27 16 socket 16 pin DUT socket C2 C14 C15 C19 C22 014 ___ Ceramic chip capacitors C25 C28 C30 C33 C35 C36 Ceramic chip capacitors C37 C38 C39 C40 C41 C42 C20 C27 C32 C43 C44 C45 C46 C55 C4 C6 C8 C10 C16 C17 tantalum 25V C3 C5 C7 C9 C18 C21 C26 C29 C31 C34 R2 R6 Resistor R4 R8 23 129 13 14 23 R15 R16 R18 R20 R17 R19 R21 R22 10K R80 R81 R82 R83 R100 to R103 R300 to R331 R39 R40 10K pair matched to 0 1 Table 2 Bill of materials for the INA Test Configuration Board R 35 3 2 4 Resource Interface Connectors The BTE BSE complementary pair of high density surface mount connectors from SAMTEC is used to channel the signals available on the Resource Board to the INA TCB The BSE connectors are located on the INA TCB 3 2 2 Voltage Regulators The parts labeled U12 through U15 in Figure 13 are voltage regulators used to adapt the 25V and 25V external power supply signals to the operating voltages required by the active devices on the INA TCB The LM317KTER is a positive voltage regulator two of these are used to provide the 15V U14 and the 20V 012 voltages The LM337KTER is a negative voltage regulator and is used to provide the 15V U15
24. ain of the DUT The output of the 15 then compared with the appropriate supply voltage using the difference amplifier output path which has a high common mode voltage range The difference amplifier performs a subtraction of the supply voltage and the DUT output voltage multiplies the result by its gain of 101 and the result is measured using the digital multimeter The high gain of 101 proves problematic in the testing stage of the system Therefore the PGAmp in gain configuration 1 was used to perform a swing test at lower DUT supply voltages than the ones specified in the product data sheet 26 27 Measuring The gain error parameter test involves application of zero common mode differential signal of high precision to the DUT inputs and determining how close the output voltage of the amplifier is to the voltage promised by the gain equation A 10V reference voltage used by the Precision Differential Voltage generator is used as the gold standard voltage to which the DUT output voltage is compared Thus the DUT output voltage is always expected to be 10V in the GERR tests The DUT is put into the desired gain configuration The PDV generator is then used to provide input voltages whose difference equals the gold standard divided by twice the DUT gain The 10V reference and the DUT output are then fed to the output amplification circuitry where a PGA based amplifier is used to perform a subtraction of the two signal v
25. alues To improve the accuracy of the measurement the inputs to the amplification stage are flipped and another reading is taken The two readings are added and divided by 2 to remove offset voltage contributions from the output amplifiers and the GERR is calculated as shown by Equation 9 ERR 2 100 9 The hardware is set up as shown in Figure 6 for first part of the VOS test except the inputs are not grounded 27 Chapter 3 System Hardware Figure 10 The assembled instrumentation amplifier AutoBench system 28 The AutoBench system hardware consists of the following components 1 Resource Hardware 2 Test Configuration Board 3 DUT Socket Adapters 4 Desktop Computer with MXI 3 Link picture of the assembled test system is shown in Figure 10 3 1 Resource Hardware The National Instruments PXI PCI Extensions for Instrumentation platform provides a wide range of hardware modules that can be interfaced to a personal computer for control and automation of custom test solutions 4 The AutoBench system was designed on this platform and consists of the following PXI modules PXI Chassis Digital Analog Output Signal Multiplexers and a Digital Multimeter In addition two external power supplies were used to provide power to the Test Configuration Board 3 11 PXI Chassis The PXI Chassis PXI 1006 consists of a case with 18 slots for plugging in PXI hardware module cards
26. and 20V U13 voltages 20V C6 100pF Figure 13 Voltage regulators on the INA Test Configuration Board adapt the 25V external supplies to the voltages required by the active devices on the board 36 3 2 3 Input Circuitry Different parameter tests require different resolution and range of inputs To support the different requirement on inputs to the DUT the following input circuitry is implemented 1 Single Ended Voltage Inputs 2 Precision Differential Voltage Inputs 3 Grounding Inputs 4 DUT Supply Inputs 3 2 3 1 Single Ended Voltage Inputs The single ended voltage inputs path consists of a voltage channel on the Analog Output Module the high current high voltage op amp U20 with relay selectable feedback that configures gain and relays that allow for application of the voltage directly to the DUT inputs or across a source imbalance resistor This system is called the SEV or Single Ended Voltage generator and is shown in Figure 14 This input path 1s used in the CMRR and SWING tests 37 59 R14 R13 SEV Voltage 547 R16 C20 AO Module VCHO 205 2 gt 19 0 34 PXI U20 Enable NEP C18 20V 10uF Figure 14 Voltages are generated with an Analog Output channel and amplified by a high voltage op amp to produce the Single Ended Voltage SEV resource 3 2 3 2 Precision Differential Voltage Inputs This input path includes a 16 bit multiplying DAC U19 with an output range of
27. ared with the relevant DUT supply voltage It is also used in the quiescent current IQ tests to measure the potential difference across a known resistance through which the IQ is flowing In these cases the summing junction and 43 PGA cascade amplifiers do not have large enough common mode voltage ranges to be useful and the difference amplifier is thus used The circuitry 1s shown in Figure 19 R23 R24 24 2 2 MUS A9s 5 BUF GND 15 100K 01 20V ADG406 2 6 R lt VOUT2 18 2114 222 re INAI45 2 45V AGND 20V 2 25 MUX A3 L gt MUX A2 L gt MUX EN gt 20 017 BUF GND OUT st 18 DUT BER LE 52 2 54 53 5 2 gt 33154 VS 2 37 S5 ViQneg VS 56 28 ViQpos 57 BUF GN Lo 58 12 E DUT VS 52 2 15V 20V AGND lt lvoutT1 PGA AIL 2 BUF Figure 19 The output measurement circuitry includes multiple amplification paths to support signals of different characteristics The output signals are measured differentially Analog multiplexers are used to select the signals for the amplification stage 44 3 3 DUT Socket Adapters In order to use the fixed DUT interface available on the INA TCB DUT Socket Adapter boards were designed for a number o
28. at two common mode voltages at the inputs The common mode rejection test can be done either with the DUT inputs connected together and therefore at the exact same common mode voltage or with the DUT inputs connected across a source imbalance resistance or capacitor and resistor pair The latter option allows for the CMRR test to be done in a manner that simulates a real world situation where the impedances of the sources connected to the DUT inputs are often not equal The data sheets for instrumentation amplifiers usually specify a source imbalance value therefore inclusion of support for a CMRR test with source imbalance was seen to be useful In the first type of CMRR test the common mode voltage is applied to the two DUT inputs directly since they are connected together In the second type of CMRR test the common mode voltage is applied to one DUT input directly and to the other DUT input across the source imbalance The results are generally similar To perform the test the DUT is placed in the desired gain setting and load configurations The DUT is powered A common mode voltage VINIo in the negative common mode voltage range is applied to the inputs and the corresponding output voltage VOUTIo is measured A second common mode voltage VINhi this time the positive common mode voltage range is applied to the DUT inputs and the corresponding output voltage VOUThi is measured The output voltage measurements are taken by t
29. cation of the power consumption of the amplifier when it is not being used but its supplies are connected It is a useful parameter to know in the design of an application that uses an instrumentation amplifier as it allows one to determine if power to the device needs to be cut off or can be left on IQ is also a useful parameter to test if one wants to make a quick test to determine if an amplifier is functional or damaged 16 1 3 2 5 Input Bias Currents and IB and Input Offset Current IOS The input bias current IB of an instrumentation amplifier is the current flowing into or out of its input 1s used to denote the bias current associated with the inverting input of the amplifier while IB 1s used to denote the bias current associated with the inverting input The sum of B and IB 1s the input offset current IOS 1 3 2 6 Output Swing SW and SW The output swing of an instrumentation amplifier 15 the specification of how close the voltage at the amplifier output can get to the amplifier s rail i e the power supply voltage Two values are specified one for the swing to the positive rail the positive swing SW and the other for the swing to the negative rail the negative swing SW 1 3 2 7 Gain Error GERR The gain error parameter is a measure of how the actual gain of the instrumentation amplifier deviates from the ideal gain The gain error is reported as a percentage of the expected gain
30. concatenated with the rest of voltage request string required by the 631 device The command string and the name of the power supply device serving as External Power Supply 1 are passed as inputs to the VISA Write subVI in LabVIEW which writes an appropriate buffer to the device specified by the name input The hardware receives the command via the GPIB communication interface and executes it to output the voltage requested Separate write commands are issued for the positive voltage and the negative voltage Figure 25 shows a block diagram of the IA Set DUT Supplies 51 Relay Line StringG Relay Line StringK G15 Xi P06 0 0 00 P60 0 618 xOxxx KI6 P66 xOxxx 21567 22 HER et 5 4 Table 3 The mapping of the Digital I O lines to relay controls 54 StringK StingG Convert hexadecimal strings to Boolean arrays Global Variable Rel ayStates Concatenate relevant bits 0 to 18 for StringK 0 to 17 for StringG into one Boolean array DesiredStates RelayStates DesiredStates Write the result to the relay control lines of the Digital Module and to the RelayStates global variable Figure 27 Program flow for the SET Selected Relays subVI 4 1 6 IA RESET Selected Relays The IA RESET Selected Relays subVI is used to re
31. d lower test limits are obtained from the product data sheet and are also included in the table Statistical Parameters GERR ABE 24 45 E L 28 53 15 46 DELTA 15 94 T Table24 Statistical data for the GERR test The Repeatability Criterion is applied to the GERR test using the statistical parameters from Table 24 Table 25 shows that all three conditions for the Repeatability Criterion hold The system is therefore capable of measuring an instrumentation amplifier s GERR repeatedly without exceedingly the test limits 88 Repeatability Criterion GERR Value Status Upper Bound Test 24 09 Lower Bound Test 3cABE 60ABE_R 72 99 P T Ratio 6cABE R UTL LTL 000 lt 01 Table 25 The precision of the GERR test The Correlation Criterion is applied to the GERR test results as shown in Table 26 three conditions hold for the GERR test therefore the system is determined to be well correlated with the ATE measurements as the gold standard Correlation Criterion GERR Status Upper Bound Test uABE 30ABE nDELTA 3aDELTA 38 01 lt 100 Pass uABE Lower Bound Test 3cABE uDELTA 3GDELTA 86 91 P T Ratio uDELTA 30DELTA UTL LTL Table 26 The accuracy of the GERR test The AutoBench GERR test 1s hereby shown to be adequately precise and accurate 5 9 Test Durat
32. data for the VOS test 81 The Repeatability Criterion is applied to the VOS test using statistical parameters from Table 9 Table 10 shows that all three conditions for the Repeatability Criterion hold The system is therefore capable of measuring an instrumentation amplifier s VOS repeatedly without exceedingly the test limits for VOS Repeatability Criterion VOS Desired Upper Bound Test 60ABE 244 86 Lower Bound Test 60ABE_R 216 36 6 R UTL LTL Table 10 The precision of the VOS test The Correlation Criterion is applied to the VOS test results as shown in Table 11 The upper limit for the correlation distribution exceeds the specified test limit The other two conditions hold DELTA sobert uram 009 Pass Table 11 The accuracy of the VOS test The AutoBench VOS test is therefore proved to be precise but not adequately accurate Suggestions for improving the accuracy are discussed in the last part of this thesis 5 3 Analysis of PSRR Measurements The statistical parameters for the PSRR test are derived from the analysis experiments and shown in Table 12 The upper and lower test limits are obtained from the product data sheet and are also included in the table 82 Statistical Parameters PSRR HABE 0 69_ RETE 3 13 Statistical Para
33. derived from the amplifier s gain equation for the particular configuration of gain setting resistors 1 3 3 INA126P Parameter Specifications The range of values for the supported instrumentation amplifier test parameters are shown in Table 1 3 Parameter Minimum Typical Maximum Input offset voltage Lo 00 5250 Power supply rejection uV V Common mode rejection 94 B Quiescent current uA Input bias current 5 0 Positive output swing V 0 75 2 Negative output swing 95 V 0 8 0 02 Table 1 Specifications for the direct current parameters of the INA126P amplifier 25 Input offset current M05 2 0 1 17 The gain of the INA126 instrumentation amplifier 15 defined by Equation 1 Gain 5 80 000 R Eq 1 in Equation 1 15 the value of gain setting resistor connected across the two gain setting pins of the instrumentation amplifier Therefore the gain of the INA126 amplifier is 5 when there is no connection between the gain setting pins since the resistance across them 15 infinite 1 4 Overview of the Automated Bench System The automated bench AutoBench system consists of hardware and software The hardware 15 developed on the PXI platform which allows for integration of multiple instrumentation devices into a system controlled by a desktop computer Two printed circuit boards PCBs are designed for the system Resource PCB 15 used to p
34. e DUT inputs p IN through resistor to gnd iue 2 Connect DUT load Select t PGAmp gan m 1 Configure Amp inputs MUXN OUT BUF MUXP 1 Configure Amp inputs 2 Enable MUXN MUXP MUXN DUT_OUT_BUF E EE MUXP DUT REFB 2 Enable MUXN MUXP SENE it Measure VOUT 1 Measure VOUT VOUTbi as VOUTgnd 2 Disable MUXN MUXP 3 Reset all relays 1 Disable MUXN MUXP 1 Configure DUT inputs 2 Reset all relays IN to gnd 4 DUT power off IN through resistor to gnd 2 Connect DUT load 1 Configure Amp inputs Calculate IB IB and IOS MUXN DUT_OUT_BUF from the readings and MUXP DUT_REFB output the values 2 Enable MUXN MUXP Figure 41 Program flow for the Test IB subVI 71 4 2 6 SWING The Test SWING subVI is used to perform system configurations and measurements needed to calculate the output voltage swings of an instrumentation amplifier under test This is a single channel amplifier test performed on the Channel B pins of the DUT interface Figure 42 shows the program flow for the Test SWING subVI 72 Configure DUT power through IQ resistors Apply SWpos voltage to DUT inputs in non inverting configuration Select PGAmp configure ganof 1 1 Configure Amp inputs MUXN DUT_REFB MUXP DUT_REFB 2 Enable MUXN MUXP 3 Measure VOUT Verrt 4 Disable MUXN MUXP 1 Conf
35. e bias current is being determined is connected to ground via a 10 resistor while the other input is connected directly to ground The DUT output voltage is again gained up and read as VOUTbias The contribution to DUT input offset due to the bias current on the one input is then calculated as the difference in the two output voltages measured divided by the 10 resistance through which the bias current was flowing The IB corresponding to the input under consideration is then obtained by compensating for the DUT and amplification stage gains Again the errors from the amplification stage are eliminated in the subtraction and do not need to explicitly accounted for in the procedure The derivation is given by the formula in Equation 8 The setup for the IB measurements is shown in Figure 8 VOUTDias 1 10 G DUT ip Eq 8 25 Ampl Ampl Gdut gl 42 Relay Relay DUT R1 YY R2 UA GND DUTRef GND GND Figure 9 The configuration for measuring the bias and offset currents of an amplifier s inputs 2 6 Measuring SW and SW The output voltage swing test involves applying a differential signal to the DUT by applying a voltage from the SEV generator to the non inverting DUT input and grounding the inverting DUT input The value of the differential input voltage used is the value of the power supply voltage to which the output 1s to be railed attenuated by the g
36. e by applying the two signals with opposite signs thereby performing an amplification of their difference The summing junction amplifier is useful for this kind of subtraction because unlike the PGA based amplifier it introduces little additional error from its own common mode rejection limitations The output of the summing junction is then magnified by a known gain factor through the PGA based amplifier and fed to the digital multimeter The PGA based amplifier is a two stage amplifier consisting of instrumentation amplifiers with digitally configurable gain that provide good gain accuracy The first stage 15 PGA204 device with gain options of 1 10 100 and 1000 The second stage 15 a PGA205 device with gain options of 1 2 4 and 8 In cascade they provide gain options of 1 2 4 8 10 20 40 80 100 200 400 800 1000 2000 4000 and 8000 Of course depending on the initial input signal the output of the amplifier might rail and not provide the expected gain The PGA cascade amplifier 15 used for gaining up small voltages by known factors before measuring with the digital multimeter Additionally a difference amplifier statically configured in a gain of 101 is made available on the INA TCB measurement path Due to the high common mode voltage range of the 145 U3 it is used for measurements involving signals with high common modes For example in the output SWING tests the DUT output is railed and the voltage obtained is comp
37. e the DAC that is used to generate the Precision Differential Voltage on the INA TCB The subVI accepts an input number corresponding to the voltage desired converts it to the appropriate Boolean array and programs the MDAC via its serial interface using the appropriate lines of the Digital I O Module of the AutoBench system 58 Input DesiredMDACVoltage Global Variables MDAC Line Exceeds 010 10V range MDACLOADnot Line Eme Desired 65536 MDACVref Convert to Boolean array Output HIGH to LOADnot For each o 16 data bits 1 Output LOW to MDAC CLK 2 Output data bit to MDAC DATA 3 Output HIGH to MDAC CLK Output LOW to LOADnot Figure 31 Program flow for the Output MDAC Voltage subVI 4 1 10 Select MUXN Output The IA Select MUXN Output subVI is used to select which of the input signals to the analog mux U18 to pass through to the output The subVI expects a hexadecimal string input The input string is converted to a number and then to a Boolean array after which the 4 least significant bits are extracted as the switch select signals A3 A2 Al and AO for the mux The bits are written to the appropriate Digital I O Module lines to implement the selection Figure 32 shows a block diagram for the subVI The signal to 59 switch mapping and required selection signals are shown in Table 4 Table 5 shows the control signal to I O line mapping for MUXN Table4 The mapping o
38. egative supply voltage Figure 1 The functional model of an instrumentation amplifier 12 Different internal architectures or topologies exist for integrated circuit instrumentation amplifiers but all consist of networks of op amp building blocks and high precision resistors Instrumentation amplifiers are distinctly different from op amps because feedback 15 often implemented internally in the former The most common types are the difference amplifier the two op amp instrumentation amplifier and the three op amp instrumentation amplifier 2 The difference amplifier type instrumentation amplifier 15 shown in Figure 2 This consists of one op amp with high precision resistors The feedback and input resistor combination R2 and determine the amplifier gain Occasionally the end of R2 connected to the output is left unwired and brought out as a separate pin for the user to connect directly to the output for the default gain or via an extra resistor to change the gain An example of a TI instrumentation amplifier with this topology is the INA132 Output Inverting input Non inverting input Output reference Figure 2 internal topology of a difference amp type instrumentation amplifier The three op amp instrumentation amplifier has three op amps and precision resistors connected as shown in Figure 3 An example of at TI device with this topology is the INA128 instrumentation amplifier 13
39. ench testing involves manually setting up the test conditions for the device to be tested applying the inputs measuring some outputs perhaps doing a few quick calculations and recording the data obtained It is a quick avenue available for an electrical engineering probing a problem and is an extremely versatile and therefore useful method of performing electrical tests However as the number of devices increases from two to a few tens to some hundreds the need for automation of the testing arises At this point an automated test system that provides acceptable trade offs in speed and versatility for a gain in affordability and suitability becomes very attractive Marrying the most suitable ideas from the two extremes of ATE and bench testing one comes up with the concept of the automated bench testing system This thesis is concerned with the design building and characterization of an automated bench testing system for measuring the properties of instrumentation amplifiers from Texas Instruments Incorporated The overarching objective for the successful implementation of the system was to have the capability of measuring the DC parameters of a broad range of instrumentation amplifier types at speeds lower than those obtained from ATE but with comparable accuracy 1 2 Previous Work precise and accurate automated bench system for measuring the direct current parameters of operational amplifiers has previously been implemented 1 Although t
40. f amplification stage input signals to the analog multiplexer switches 60 Signal DigitalVO Module Line Table 5 The mapping of DIO lines to control signals for MUXN 4 1 11 IA Select MUXP Output The IA Select MUXP Output subVI is used to select which of the input signals to the analog 017 to pass through to the output This subVI is equivalent to the IA Select MUXN Output subVI with the data being written to the appropriate Digital Module lines Table 6 shows the control signal to I O line mapping for MUXP Digital I O Module Line MUXP EN P2 6 MUXP A0 P25 MUXP 1 2 4 2 P2 3 MUXP A3 2 2 6 The mapping of DIO lines to control signals for MUXP 4 1 12 IA Enable MUXN The IA Enable MUXN subVI is used to provide the enable signal for the selection of input to output signal for mux 018 on the INA TCB The high signal is written to the appropriate Digital I O Module line to achieve the desired effect The block diagram for the subVI 15 shown in Figure 33 61 Boolean True PU MUXN Enable Line Write bits to the appropriate Digital I O Module lines Figure 33 Program flow for the Enable MUXN subVI 4 1 13 IA Enable MUXP The IA Enable MUXP subVI is used to provide the enable signal for the selection of input to output signal for mux U17 on the INA TCB The high signal is written to the appropriate Digital I O Module line to achieve the desired effec
41. f single and dual channel instrumentation amplifiers The DUT Socket Adapter implements the rewiring necessary to make the pin out of a particular instrumentation amplifier conform to the pin out of the DUT interface on the INA TCB Figure 20 shows the Socket Adapter routing for a number of devices that could potentially be tested on the AutoBench system E desee T E 4 044 duh 5n once 5 I i EE 3 f PO 45132 GOIN Figure 20 A PCB diagram for DUT socket adapters 3 4 The Desktop Computer The desktop computer is the controller for the AutoBench system The computer provides the processor for executing code The computer also integrates all the resources 45 stores data and presents system s user interface on its monitor A Pentium 4 based desktop computer running Windows 15 used for the controller The controller computer communicates with the PXI platform resources via a high speed data bus called the MXI 3 link The MXI 3 link consists of a card that plugs into a hardware slot in the computer frame a card that plugs into the PXI chassis and a cable that connects the two systems 46 Chapter 4 System Software The software for the AutoBench system was developed in the National Instruments program development environment called LabVIEW 12 The software is written in the LabVIEW graphical program
42. f the system s measurements 5 1 The Analysis Criteria The performance of the AutoBench system is analyzed on the basis of a accuracy i e how close a measurement of an instrumentation amplifier parameter is to the actual value of the parameter as well as b precision 1 6 how consistent the measurement 15 on the system The accuracy 1s appraised by means of a Correlation Criterion that compares the measurement to a trusted value The trusted value in this case is a measurement taken from a proved ATE system Single readings are taken per device from ATE although it would have been better to obtain multiple ATE readings to insure that ATE measurements correlate with each other The precision is appraised by examining on statistical terms the distribution of repeated readings of a parameter measurement for a single device The statistical examination leads to a Repeatability Criterion The statistical parameters derived from the AutoBench performance analysis measurements are defined below ABE the mean of single measurements of a test parameter for 47 different units on the AutoBench system cABE the standard deviation of the single measurements of test parameter for 47 different units on the AutoBench system e ATE the mean of single measurements of a test parameter for 47 different units on the ATE 78 oATE the standard deviation of single measurements of a test parameter for 47 different units on the ATE uD
43. fier 1 None 10 Table 7 The mapping of amp selection relay states to output amplifier selected G16 o Jo E 1 _ HE qx B LL 4 1 17 IA Select PGA Gain The IA Select PGA Gain subVI is used to provide the selection signal for the U1 and U2 amplifiers on the INA TCB The subVI accepts a numerical input the Gain This input is mapped to a 4 bit Boolean array that is written to the appropriate Digital I O Module lines to set the control signal for the two programmable gain amplifiers The 63 block diagram is shown in Figure 35 possible gains corresponding signal and hexadecimal code are shown in Table 8 Map to 5 4 bit Boolean array representing Hexcode Write bits to the appropriate Digital I O Module lines Figure 35 Program flow for the IA Select PGA Gain subVI UNE 8 0 0 E uL D 1 uL HJ moomo fs PENNE TEA ih li EB 1 1000 1000 4 1000 4000 Table 8 mapping of control signals PGAmp gain 4 1 18 Measure EA1 VOUT The Measure VOUT subVI is used to connect the output of PGA based amplifier to the Digital Multimeter Module DMM and measure the voltage PXI 64 MUX2 is configured to operate 2 wire mode PXI MUX2 ch0 is connected to com0 and com0 is connected to ab0 This causes the PGA based amplifier output to be connected to the DMM The DMM is initialized and config
44. h voltage op amp with a relay configurable resistive feedback path This additional amplification option is used to provide a larger range of voltages 20V to 20V that can be applied as DUT inputs in performing CMRR and output swing test The resulting resolution of the voltages available from this input path is reduced from 1mA to 2mA but this is still adequate for CMRR and output swing tests The larger range 15 useful for supporting devices whose common mode voltage and output voltage magnitudes are specified to be higher than 10V For example the INA126 instrumentation amplifier used in later chapters to study the capability of the assembled AutoBench system has a minimum common mode voltage range of 11 25V 3 1 4 Signal Muxes The PXI 2503 15 an analog signal multiplexer that can be configured to operate a l wire mode with 48 input channels a 2 wire mode with 24 input channels or a 4 wire mode with 12 input channels 8 The AutoBench system uses two of these mux modules One signal mux is dedicated to operating in 2 wire mode and 15 used for multiplexing the voltage measuring functionality of the single digital multimeter available in the system across potential differences to be measured at multiple locations The second signal mux is dedicated to operating in 4 wire mode and is used for to multiplex the 4 wire resistance measuring 30 capability of the digital multimeter across multiple resistors that need to be precisely
45. he operational amplifier op amp system measures parameters similar to those of instrumentation amplifiers the circuitry and resources necessary for performing the instrumentation amplifier tests are different and demand the implementation of a unique solution The PXI hardware platform and the LabVIEW software development environment used in the op amp solution are also employed in the new test system implemented herein for instrumentation amplifiers 11 1 3 Instrumentation Amplifiers Instrumentation amplifiers are electrical devices that perform amplification of differential input signals to a high degree of accuracy Instrumentation amplifiers are also characterized by their ability to reject common mode input signals very effectively As a consequence of these two key properties instrumentation amplifiers can be used to measure very small differential voltages to a high degree of accuracy and are especially suitable for instrumentation applications hence their name An instrumentation amplifier device generally has an inverting and a non inverting input pin two power supply pins two pins across which a gain setting resistor can be connected an output pin and an output reference pin This functional model of an instrumentation amplifier is represented Figure 1 Gain setting pon d 2 Gain setting Positive supply pin voltage Inverting input Non inverting input TY AIT Output reference N
46. he digital multimeter after amplification of the voltages by the PGA based amplifier The CMRR 1s determined by calculating the ratio of the difference in output voltages to the difference in common mode input voltages and compensating for the gains of the DUT and the amplification circuitry This ratio 15 shown in Equation 6 As with the PSRR test there is no need to perform a separate error measurement for the amplification circuitry as these errors get eliminated in the subtractions T a 1 VINhi DUT Eq 6 23 2 4 Measuring IQ IQ 15 the current an amplifier draws when its output is not loaded For this test the DUT supply voltage VS is supplied from the power supply unit through a high current high voltage operational amplifier buffer with a small known resistance R at its output The voltage after the resistor labeled DUT VS in the Figure 8 is what is applied to the supply pin on the DUT The current 15 determined by measuring the voltage across the known resistance R and applying a simple Ohm s law calculation In addition an empty socket current value 15 subtracted from the current value obtained to compensate for the leakage current of this setup The empty socket current value is determined prior to the parameter test by performing an IQ test with the DUT socket empty The potential difference across the known resistance R 1s determined by applying the voltage at the two end
47. ials for the INA Test Configuration 35 Table 3 The mapping of the Digital I O lines to relay controls 54 Table 4 The mapping of amplification stage input signals to the analog multiplexer e Iob VE d 60 Table 5 The mapping of DIO lines to control signals for uses 61 Table 6 The mapping of DIO lines to control signals for 61 Table 7 The mapping of the amp selection relay states to output amplifier selected 63 Table 8 The mapping of control signals to PGAmp 64 Table 9 Siauisiical data or th VOS 1 8 55825 8 traba a iM 81 Table 0 The precision Of tie etn E E 82 Table LE The accuracy ofthe VOS test 62 Table 2 Statistical data for the PSRR etos ee eo NO ubt du gm 63 3 The precision ot the 1885 eoi eda ere vitre i Du 63 Table 14 The accuracy of the PSRR test 63 Table 15 Statistical data for the CMRR Test csc 2 Leo pute He teo tenets tics 84 Table 16 The precision of CMRR De a 84 Table 17 0 85 Table 13 Statistical data for the IOT AGS 85 19 Dheprecisionor tie TO
48. igure Amp inputs MUXN DUT_REFB DUT_OUT_BUF 2 Enable MUXN MUXP 3 Measure VOUT Vswing 4 Disable MUXN MUXP Figure 42 Program flow for the Test SWING subVI Apply 5 voltage to DUT inputs in non inverting configuration 1 Configure Amp inputs MUXN DUT_REFB DUT_REFB 2 Enable MUXN MUXP 3 Measure EAl VOUT Verr 4 Disable MUXN MUXP 1 Configure Amp inputs MUXN DUT_REFB MUXP DUT_OUT_BUF 2 Enable MUXN MUXP 3 Measure EAl VOUT swing 1 Disable MUXN MUXP 2 Reset SEV to 0V 3 Reset all relays 4 DUT power off Calculate SW and SW output values 73 4 0 7 Test GERR The Test GERR subVI is used perform system configurations and measurements needed to calculate the gain error of an instrumentation amplifier under test Figure 43 shows the program flow for the Test GERR subVI TU L 3 Inputs DUT Gain Config DUT Load Config Amp A Execute 1 Measure VOUT GERR reading 1 2 Disable MUXN MUXP 1 Configure Amp inputs MUXN MDAC Vref MUXP DUT_OUT_BUF 2 Enable MUXN MUXP 1 Reset all relays 2 Set appropriate DUT gain and load config relays Configure DUT emm Measure 1 VOUT GERR reading 2 Apply to DUT inputs 1 Disable MUXN MUXP 2 Reset PDV to 0V 3 Reset all relays 4 DUT power off Calculate GERR output value
49. in and load resistances are configured as necessary for the device being tested The output reference pin of the DUT is at ground Due to the small usually microvolt value of the VOS the output voltage at the DUT 15 gained up with the programmable gain amplifier PGA based amplification circuitry before being read with the digital multimeter The setup for the measurement is shown in Figure 6 The voltage reading obtained in this first step of the VOS measurement 1s named VoutA and its value is given by Equation 2 Errors are introduced in the VOS value of the DUT by the offset voltages of the devices in the gaining up stage Therefore an extra reading is obtained with the PGA based amplifier inputs connected to ground as shown in Figure 7 This second reading named VoutB has a value defined by Equation 3 The two readings are used to derive an accurate value for the DUT VOS in software by using Equation 4 20 DUT Ampl Ampl VOS Gdut Vl dgl 72 42 VOS Gaut VoutA GND DUTRef GND Figure 6 The first step of the test configuration used to measure VOS Ampl Ampl vi gl v2 g2 DUTRef GND Figure 7 second step of the VOS measurement is a reading of the error contributed by the output amplification circuitry VOS Gpyr gl g2 vl gl g2 v2 g2 Eq 2 VoutB vl g1 g2 v2 g2 Verr Eq 3 21 VoutA VoutB VOS m l Gy 81 82 Eq 4 2 2 Measuring PSRR Power supply
50. in resistors can be connected to both amplifier channels The DUT Interface circuitry is shown in Figure 18 41 K14 K1 K16 Q 5 G13 DUT OUT GNDB GNDB K K 15V 111 C DU Tseat 9 maoan 4 201 LOADS a KA KG KY s he CJ 15V 15V BUF GND BUF GND PDV lt REFA K JDUT REFB Figure 18 The DUT interface connections to multiple inputs multiple gain setting resistors and multiple loads Support for dual channel amplifier packages is included Relays are used to swap between the possible configurations 42 3 2 5 Output Measurement Relays are used to select the amplifier channel output that the measurements are to be taken from A pair of 16 input analog multiplexers muxes 717 and U18 are used to select the signals to be passed to the measurement amplification stage The signal selection 15 done via digital enable and select signals The amplification stage consists of three amplifier options each with different advantages and limitations A summing junction amplifier 15 implemented using the three op amps U4A U4B and U4C and the resistor network consisting of 4 R40B and R25 This option is used to perform a comparison of two voltages that are supposed to be the same such as in the gain error test The comparison is don
51. ines indicated in Table 3 The IA SET Selected Relays subVI is used to set a group of desired relays while leaving the state of the other relays unchanged The subVI accepts two hexadecimal string inputs a StringG and a StringK The two strings indicate the relays that are to be set and the ones that are to be kept in their old state Each relay on the INA TCB has a dedicated bit in the input string If the bit is 1 the corresponding relay is set If the bit is 0 the corresponding relay is left in its old state The information in StringG pertains to the relays labeled Gx while the information in StringK pertains to the relays labeled Kx The mapping of relays to bits is shown in Table 3 The relays are set by outputting a high signal on the appropriate Digital Module line The RelayStates global variable is also updated The block diagram of the flow of the IA Set Selected Relays subVI is shown in Figure 27 53 Global Variable ey S Command strings for 0V Name of External Supply 2 and Device Write buffer to specified device Figure 24 Program flow for the IA Power to Board Regulators OFF subVI 4 1 3 IA Set DUT Supplies The IA Set DUT Supplies is used to request the desired DUT supply voltages from the External Power Supply 1 resource in the AutoBench system The function accepts two number inputs a positive supply voltage and a negative supply voltage Each number input is converted to an engineering string and
52. ion The average time for testing an instrumentation amplifier was determined to be 32 seconds This time was measured from the onset of the first test routine to the end of the last test routine Although the test time is an order of magnitude larger than that of ATE the advantages of having a dedicated system for low volume testing tasks outweigh the increased cost in time 89 Chapter 6 Future Work and Conclusions The AutoBench system measurements of the PSRR IQ and GERR parameters are shown to be comparably precise and accurate to the measurements obtained from standard automated test equipment The PSRR IQ and GERR measurements are therefore the good tests The VOS test 15 shown to be adequately precise but not satisfactorily correlated with the ATE measurements The CMRR IB and IOS tests are also shown to perform marginally based on the analysis criteria The tests are still good enough for general test functions such as providing rough measurements for corroborating readings on other systems The software implemented is dedicated to testing a single channel INA126 amplifier but can be extended to support other instrumentation amplifiers available from Texas Instruments Incorporated The automated system saves engineers time in the volume testing of instrumentation amplifiers at quantities of tens to a few hundreds of devices The system is capable of performing the DC tests for a device in about 30 seconds Manual testing of an in
53. l to voltage regulators available on the Test Configuration Board The voltage regulators adapt the 25V signals to 15V 15 20V and 20V which are the voltages needed to power various active devices other than the DUT on the Test Configuration Board 3 1 7 Resource Interface Board A printed circuit board was designed to provide an organized and compact interface to the hardware resources described above 11 The various resource modules 31 are connected via cables to individual connectors on the Resource Interface Board The footprints for the connectors and the signal traces on the Resource Interface Board are shown in Figure 11 The Resource Interface Board is mounted on standoffs which allow the board to rest above the bench surface The resource signals are made available on a neat interface on the top side of the board by means of two high density connectors each with 240 pins The Test Configuration Board was designed with complimentary connectors on its bottom side and can therefore be mounted firmly onto the neat interface on the Resource Board to have access to all the resource hardware The printed circuit boards were designed using the Protel software Figure 11 PCB drawing of the Resource Interface board showing the connectors and signal traces 32 3 2 Test Configuration Board The Instrumentation Amplifier Test Configuration Board INA TCB is a printed circuit board that implements the circuits needed for
54. l variable The program flow is shown in the block diagram of Figure 29 56 Convert hexadecimal strings to Global Variable Boolean arrays RelayStates Concatenate relevant bits 0 to 18 for StingK 010 17 for StringG into one Boolean array DesiredStates Write the result to the relay control lines of the Digital Module and to the RelayStates global variable Figure 29 Program flow for the A RESET ALL Relays subVI 4 1 8 IA Output CM Voltage Gain3 The IA Output CM Voltage Gain3 subVI is used to output a third of the voltage required from the SEV generating path on the INA TCB The subVI accepts an input number equal to the voltage desired A check is performed to ensure that the requested SEV output is within the 18V to 18V range If the input is in the appropriate range the input is divided by 3 to compensate for the amplification by 3 obtained from the high voltage amplifier in the SEV generator and the voltage obtained is output on the appropriate channel of the Analog Output Module A block diagram for the Output CM Voltage Gain3 subVI is shown in Figure 30 57 Input ValueToGenerate ValueToGenerate outside of Analog Output Module ID 18V to 18V range Rex Channel ID m ValueToGenerate 3 Update Analog Output Module channel Figure 30 Program flow for the Output CM Voltage Gain3 subVI 4 1 9 IA Output MDAC Voltage The IA Output MDAC Voltage subVI is used to configur
55. meters PSRR 2 SADE LTL Table 12 Statistical data for the PSRR test The Repeatability Criterion is applied to the PSRR test using the statistical parameters from Table 12 Table 13 shows that all three conditions for the Repeatability Criterion hold The system is therefore capable of measuring an instrumentation amplifier s PSRR repeatedly without exceedingly the test limits Repeatability Criterion PSRR Upper Bound Test HABE R Lower Bound Test 60ABE 10 32 P T Ratio R UTL LTL Table 13 The precision of the PSRR test The Correlation Criterion is applied to the PSRR test results as shown in Table 14 All three conditions hold for the PSRR test therefore the system is determined to be accurate Correlation Criterion PSRR Desired Upper Bound Test uABE nDELTA 30DELTA Lower Bound Test uDELTA 10 39 gt 5 Pass P T Ratio uDELTA 3oDELTA UTL LTL 001 010 Pass Table 14 The accuracy of the PSRR test The AutoBench PSRR test 15 therefore proved to be adequately precise and accurate 83 54 Analysis of CMRR Measurements The statistical parameters for the CMRR test are derived from the analysis experiments and shown in Table 15 The upper and lower test limits are obtained from the product data sheet and a
56. ming language by means of encapsulating functional blocks in diagrams Each individual program is called a virtual instrument or VI and the programs used inside a VI are called subVIs or sub virtual instruments A VI generally consists of a front panel view and a block diagram view The front panel presents a graphical user interface through which a user can interact with the VI during program execution The control diagram view provides a graphical chart of functional components and data flow in the VI Data flows from component to component within a VI by means of diagrammatic wires between the components The order of program execution 15 determined by the flow of data An example of LabVIEW VI front panel is shown in Figure 21 and an example of a LabVIEW VI control diagram is shown in Figure 22 Figure 21 The front panel for a LabVIEW virtual instrument 47 gt IA 5 Seet P PGA Gain vi Block Diagram Data Written IA Globali 40 43 PGA one channel for all lines 7 error no error al Figure 22 The block diagram for a LabVIEW virtual instrument The LabVIEW programming environment comes with drivers for the various hardware modules available for the PXI system This availability of support for the test automation hardware makes it especially convenient to develop the AutoBench system software on the PXI LabVIEW platform Many predefined functions or VI s also make development
57. nd shown in Table 21 The upper and lower test limits are obtained from the product data sheet and are also included in the table Values Statistical Parameters 9 10 ATE 108 _ 7 32 1 07 BATE 10221 1031 09 105 0 9 2 99 8 38 0 01 0 13 LTL 0 00 25 00 Table 21 Statistical data for IB IB and IOS tests 86 The Repeatability Criterion is applied to IB and IOS tests using the statistical parameters from Table 21 Table 22 shows that all three conditions hold for the separate IB tests for the inverting and non inverting amplifier inputs However only one of the three conditions for the Repeatability Criterion hold for the combined IOS measurement The results show that the system produces IOS measurements that spread beyond the upper test limit specified for the IOS test Also the variation due to repeatability limitations of the system exceeds 10 of the tolerance range Repeatability Criterion for IB IB and IOS ep ADI ity riterion n IB4 YR IOS 3 33 Status 1OS IOS Table 22 The precision of the input offset current test The Correlation Criterion is applied to the IOS test results as shown in Table 23 Although the individual positive and negative bias current tests show acceptable correlation the combined input offset current measurement does not The upper bound of the measurement distribution is exceeded for the IOS test In addition the variation
58. nnel INA Test Sequence subVI which sequences the parameter tests times the execution of the tests and outputs the collective results Header information is written to the file each time the top level program 15 initiated The Single Channel INA Test Program subVI is described by the block diagram in Figure 45 75 Figure 44 The graphical user interface for the Single Channel INA Test Program 76 1 Parse input file 2 Write global variables 3 Write header info to output file Derive conversion factors for test measurements based on units prefix in input file Wait until TEST button 15 pressed then 1 Run Test Sequence Start timer Run Test sub 18 Package results into array Check values against limits and prepare pass fal array Generate cumulative pass fail Stop timer calculate execution time Return 2 Output results execution time pass fail per test and cumulative pass fail to GUI variables Wnte formatted results to output file Figure 45 Program flow for the Single Channel INA Test Program subVI 44 Chapter 5 System Performance Analysis For a test system to be useful to engineers its performance must be characterized The characterization allows engineers to understand the capabilities and limitations of the test system and thereby make sense of the measurements they obtain from the system The characterization of the system defines the precision and accuracy o
59. ntation Amplifier Single and Dual Versions Online document Available HTTP http focus ti com lit ds symlink ina126 pdf National Instruments Corporation PXI CompactPCI Online document Available HTTP http zone ni com devzone devzone nsf webcategories E89ABEOD15FE570986256 82 007 9 74 National Instruments Corporation 1006 User Manual Online document February 2001 Available HTTP http www ni com pdf manuals 323006a pdf National Instruments Corporation NI 6509 Low Cost Industrial Digital I O 5 TTL CMOS Datasheet Online document Available HTTP http www ni com pdf products us ni 6509datasheet with rt pdf National Instruments Corporation PCI PXI 6704 User Manual Voltage and Current Output Device for PCI PXI CompactPCI Bus Computers Online document September 1998 Available HTTP http www ni com pdf manuals 322110a pdf National Instruments Corporation Computer Based Instruments NI 2501 2503 User Manual 24 Channel Two Wire Multiplexer Online document July 1998 Available HTTP http www ni com pdf manuals 321906b pdf National struments Corporation NI 4070 4072 Specifications Online document August 2004 Available HTTP http www ni com pdf manuals 371304b pdf Agilent Technologies E3631A Triple Output DC Power Supply User s Guide Online document April 2000 Available HTTP http cp literature agilent com litweb pdf E3
60. o 3 oABE The departure of the measured value from the actual value 1 the accuracy to the gold standard or ATE 60 measurement this case 1s characterized by another Gaussian distribution with mean and standard deviation equal LDELTA and oDELTA respectively The departure or delta distribution therefore has virtually all of its distribution in the region given by UDELTA 3 oDELTA to uDELTA 3 oDELTA centered around the mean DELTA Hence the departure can add the most extreme error of u DELTA 3 oDELTA on the upper side of the measurement distribution or NDELTA 3 eDELTA on the lower side of the measurement distribution The delta distribution adds on to the distribution for the parameter and the Correlation Criterion 1s given by the following three requirements 1 Upper Bound Test ABE 3 oABE uDELTA 3 lt UTL Lower Bound Test LABE 3 oABE uDELTA 3 eDELTA gt LTL P T Ratio DELTA 3 eDELTA UTL LTL lt 0 1 The performance of the AutoBench system for each test parameters is presented in the sections that follow 52 Analysis of VOS measurements The statistical parameters for the VOS test are derived from the analysis experiments and shown in Table 9 The upper and lower test limits are obtained from the product data sheet and are also included in the table 18 27 AB AT cABE R 250 00 250 00 Table9 Statistical
61. of code in the LabVIEW environment quick The software for the AutoBench system is described in the subsequent subsections by means of representative block diagrams rather than images of the LabVIEW virtual instruments themselves Representative diagrams are chosen over the VI images as the VI images are often quite large and have complicated wiring that is not 48 visually easy to follow whereas the diagrams provide a clearer and more concise view of the software 1deas The software is organized into three hierarchical levels At the topmost level is the Single INA Channel Test Program which provides the graphical user interface GUI through which a user interacts with the test system This top level program contains the subVIs that implement the individual instrumentation amplifier tests The top level program also performs the writing of data into an appropriately formatted spreadsheet for storage At the middle level of the program hierarchy lie the subVIs that implement the individual tests Seven of these exist for executing each of the seven instrumentation amplifier DC parameter tests described in the Test Methodology section At the lowest level of the program hierarchy the auxiliary functions the subVIs that implement different aspects of the control of the hardware e g programming the MDAC voltage on the INA TCB and controlling the closing and opening of the different relays on the INA TCB 4 1 The Auxiliary SubVIs The au
62. r ideas guidance and support in this project I am thankful to Sergio Hidalgo for the many discussions we had about aspects of the system and for designing the Resource Interface Board for the system My gratitude also goes to Jerry Riddick for his discussion of instrumentation amplifier testing to Susan Madaras for performing miraculous soldering jobs on my printed circuit board to Joline Albaugh for all her help with obtaining components and to the entire High Performance Analog Product Optimization team at Texas Instruments for an incredible learning experience Contents CHAPIERT INTRODUC HON Qoia wa one up 10 1 1 MOTIVATION FOR AN AUTOMATED BENCH TESTING SYSTEM 10 1 2 E Ee dn desi lu de b ND 11 1 3 INSTRUMENTATION AMPLIFIERS 12 1 3 1 The Ideal Instrumentation 0 14 1 3 2 Real Instrumentation 15 1 33 INA126P Parameter Specifications 17 1 4 OVERVIEW OF THE AUTOMATED BENCH SYSTEM 18 CHAPTER2 TEST METHODS FOR DC 20 2 1 MEASURING YOS eerie diat 20 2 2 MEASURING o E cca aap drea densa Ce suas otov vica cated 22 2 3 MEASURING CMRR
63. re also included the table Statistical Parameters CMRR 20 77 Table 15 Statistical data for the CMRR test The Repeatability Criterion 15 applied to the CMRR test using the statistical parameters from Table 15 Table 16 shows that two of the three conditions for the Repeatability Criterion hold The results show that the system produces CMRR measurements that spread beyond the lower test limit specified for the CMRR test Repeatability Criterion CMRR Upper Bound Test HABE 3cABE 61 22 lt 70 00 Pass Lower Bound Test 60ABE 102 76 gt 70 00 Ratio 60ABE_R UTL LTL 0 01 Table 16 The precision of the CMRR test The Correlation Criterion is applied to the CMRR test results as shown in Table 17 All three bounds are exceeded for the CMRR test showing that the system measurements are poorly correlated with the ATE measurement that is used as the gold standard 84 Status uDELTA 3aDELTA UTL LTL Fail Table 17 The accuracy of the CMRR test The AutoBench system is determined to be inadequately precise and inadequately accurate for the CMRR test since neither the Repeatability nor the Correlation Criteria hold completely Suggestions for improving the AutoBench capability are discussed in the concluding section 5 5 Analysis of IQ measurements The statistical parameters for the
64. rejection ratio PSRR 15 an indication of how the VOS of an instrumentation amplifier changes with respect to changes the power supply voltages Therefore it 15 determined by varying the power supply voltages across the extremes of the specified supply range and determining the resulting variation in the VOS The DUT gain and load resistances are configured as necessary for the device being tested The inputs are grounded as in the VOS test The smallest supply range VSrangel is applied to the DUT supply pins and the voltage at the output of the amplifier is measured as V1 Then the largest supply range is applied to the DUT supply pins and the voltage at the output of the amplifier is measured as V2 PSRR 15 then calculated as the ratio of the difference in the output voltages measured to the difference in the supply voltage ranges applied as in Equation 5 There is no need for a separate error voltage reading in the PSRR determination The error voltages introduced by the amplification circuitry stay the same for the two output voltage readings and get eliminated in the subtraction PSRR oo VSrange2 VSrangel Go Oi Eq 5 2 3 Measuring CMRR The common mode rejection parameter indicates how the amplifier s VOS changes with respect to variations in the common mode voltage In measuring this 22 parameter the CMR of the amplifier is assumed to be approximately linear and a reading of the VOS 15 taken
65. ring IQ of an instrumentation amplifier 25 Figure 9 The configuration for measuring the bias and offset currents of an amplifier s E AE 26 Figure 10 The assembled instrumentation amplifier AutoBench system 28 Figure 11 drawing of the Resource Interface board showing the connectors and S o Um 32 Figure 12 diagram for INA Test Configuration Board showing signal layers and device tei 34 Figure 13 Voltage regulators on the INA Test Configuration Board adapt the 25V external supplies to the voltages required by the active devices on the board 36 Figure 14 Voltages are generated with an Analog Output channel and amplified by a high voltage op amp to produce the Single Ended Voltage SEV resource 38 Figure 15 A 16 bit DAC 15 used to generate the Precision Differential Voltage PDV 20508 6 ende co MEM Wed ua ise E tutto 39 Figure 16 Direct ground paths and resistive paths to the ground signal are available for o CS TI HP 40 Figure 17 The DUT power is supplied through a resistor to enable measurement of the current flowing into DUT supply 41 Figure 18 The DUT interface connections to multiple inputs multiple gain setting resistors and
66. rovide a compact and organized interface to the bulky resources and the many cables of the PXI devices Test Configuration PCB mounts on top of the Resource PCB and implements the circuits needed for testing instrumentation amplifiers The hardware is designed for versatility and the Resource Board interface allows for test solutions for other device families to be developed on the system Software is developed in the LabVIEW graphical programming environment which is especially conducive for PXI platform development due to the availability of device support An overview of the system 1s shown in Figure 5 18 DUT onfig PCB Resource PCB i Desktop PC with 3 PCI Card installed Power 1 Power 2 Figure 5 Connections between components of the AutoBench system indicate signal or information flows 19 Chapter 2 Test Methods for DC Parameters The procedure for measuring a parameter generally involves the configuration of appropriate gain and load the selection of inputs to the DUT the selection of the DUT channel being tested the conditioning and reading of outputs and the calculation of the parameter value The methods used to measure each of the parameters above are described in the following subsections 2 1 Measuring VOS The VOS is measured on the AutoBench system by grounding both inputs of the DUT powering the DUT and taking a reading of the voltage at the output The DUT ga
67. s for the various tests are described below 4 2 1 Test VOS SubVI The Test VOS subVI performs the configuration of DUT inputs and outputs and the reading of voltages necessary to calculate the input offset voltage of an instrumentation amplifier under test This 1s a single channel amplifier test performed on the Channel B pins of the interface The DUT Gain and PGAmp are numbers expected as inputs to the subVI In addition subVI expects an Execute input that is a Boolean The subVI calculates the VOS when the Execute input 15 True and skips the VOS routine when the input 15 False The block diagram in Figure 37 shows the program flow in the Test VOS subVI 66 Y es eR MEET AR DRE 4 54 AR m Ata a fal Se he JC SUI gr M e S al Inputs DUT Gain PGAmp Measure EA1 VOUT s Gain Execute j Verror 1 Disable MUXN MUXP Setrelaysto connectload 2 Configure Amp inputs and ground DUT inputs puc MUXN DUT OUT BUF 7 M MUXP DUT REFB a rable MUXM Confgure power Select T Configure PGAmp Gan 1 Configure Amp inputs MUXN DUT_REFB MUXP DUT_REFB Y culate 2 Enable MUXN MUXP readings Verror and VOUT Figure 37 Program flow for the Test VOS subVI TI TOUR 29 Measure VOUT VOUTI 1 Disable MUXN MUXP
68. s of the resistor to the inputs of a difference amplifier The difference amplifier INA145 has a much higher common mode voltage range 28 than the other amplification devices and accurately measures the differential voltage at 15 inputs i e the potential drop across R The PXI signal multiplexer module is then used to channel the output voltage of the difference amplifier to the digital multimeter which reads the voltage The software adjusts for the gain of the difference amplifier statically configured to 101 and calculates the current according to Equation 7 This IQ derivation procedure 15 performed in turn for the negative and positive DUT supplies in order to obtain readings for IQ and IQ respectively The other DUT supply pin 15 driven through the buffer normally while the complementary supply pin s IQ value 15 being determined Vl V2 1 10 Q R G sup 7 24 DUT VS VS V1 V2 GenericAmp NZ GND DUTRef Figure 8 test configuration for measuring IQ of an instrumentation amplifier 2 5 Measuring IB IB and IOS The bias current for each DUT input is derived from two measurements First a measurement equivalent to that performed in the first VOS step is taken The inputs to the DUT are both grounded the DUT output voltage is gained up by the PGA based amplifier and the voltage is read with the digital multimeter as VOUTgnd Second the DUT input for which th
69. set a group of desired relays while leaving the state of the other relays unchanged As with the SET subVI this subVI accepts two hexadecimal input strings whose bits map to control signals for the Gx and Kx relays on the INA TCB A control bit with value 1 results in the corresponding relay to be reset whereas a control bit with value 0 causes the corresponding relay to maintain its old state The block diagram depicting the program flow in the IA RESET Selected Relays subVI is shown in Figure 28 55 Inputs StringK StingG Convert hexadecimal strings to Global Variable Boolean arrays RelayStates Concatenate relevant bits 0 to 18 for StringK 0 to 17 for StringG into one Boolean array DesiredStates not DesiredStates RelayStates AND DesiredStates Write the result to the relay control lines of the Digital Module and to the RelayStates global variable Figure 28 Program flow for the A RESET Selected Relays subVI 4 1 7 IA RESET ALL Relays The IA RESET ALL Relays subVI is used to put all the relays on the INA TCB in their default state The subVI is generally used at the end of a parameter test program to ensure that the relays are reverted to their default states in order to avoid unexpected effects in subsequent programs The IA RESET ALL Relays subVI has no inputs and simply writes 0 bits to all Digital I O Module lines that control relays The new states of the relays are also written to the RelayStates globa
70. strumentation amplifier could take minutes per parameter The AutoBench system provides a consistent way of testing several devices The AutoBench system is designed to be extensible for potential future use to test other integrated circuit device families Although the cost of the system is roughly 2 orders of magnitude lower than the cost of ATE the potential extensibility of its functions to other device families further improves the cost savings involved with its implementation Further work could be done to improve the performance of the marginal DC tests on the automated bench system Suggestions for such improvements are discussed below 6 1 Measuring Resistors The hardware is designed to support the precision measurement of critical resistors on the INA Test Configuration Board The IQ test accuracy could be improved by calibrating the value of the DUT power supply resistors R17 and R19 and using the calibrated values in the calculation of the current flowing through the resistors The calibration could be performed by doing a 4 wire resistance measurement with the DMM 90 14 The current AutoBench implementation assumes two resistors 1000 to a high degree of accuracy which is not necessarily true 6 2 Result Averaging The accuracy of the parameter test results could be further improved by repeating each parameter test and averaging the values The averaging of multiple readings 15 generally a good way to minimize
71. such as the Digital card and Digital Multimeter card It provides a rugged and organized mechanical frame that protects the modules used in the test application The chassis also supplies the various installed modules with power 5 3 1 2 Digital Module The PXI 6509 digital I O DIO module has 96 bidirectional digital input output lines that can be controlled individually or as byte wide channels No external supply is required for outputs and 5VDC reference pins are provided 6 The digital I O module is used to provide digital signals to devices like the analog signal muxes the digitally configurable variable gain instrumentation amplifiers the serially configurable multiplying DAC that are used on the Test Configuration Board 29 The relays on the Test Configuration Board are also controlled via output lines from digital I O module 3 1 3 Analog Output Module The 6704 15 a hardware module that can be used to output analog signals The module has 16 channels for voltage capable of outputting voltages from 10V to 10 to 16 bit resolution The module also has 16 current channels capable of sourcing up to 20mA of current with values configurable to 16 bit resolution 7 The analog output module is used to supply the test voltage inputs to the DUT for the CMRR and output swing test procedures The voltage provided by the 6704 can be further amplified by a gain of 1 or 2 using a high current hig
72. t The block diagram for the subVI is similar to the one shown in Figure 33 but with the appropriate Digital I O Module line selected for MUXP Enable 4 1 14 IA Disable MUXN The IA Disable MUXN subVI disables the output of mux U18 on the INA TCB This subVI is equivalent to the A Enable MUXN subVI only the Boolean value written to the Digital I O Module line is False causing a low value to be written to the line 4 1 15 IA Disable MUXP The IA Disable MUXP subVI disables the output of mux U17 on the INA TCB This subVI is equivalent to the Enable MUXP subVI only the Boolean value written to the Digital I O Module line is False causing a low value to be written to the line 62 4 1 16 Select Voltage Amplifier The IA Select Voltage Amplifier subVI is used to connect the outputs of the MUXN and MUXP analog muxes to the appropriate amplification circuitry path Three relays are used to do this channeling of output signals A block diagram for the subVI is shown in Figure 34 The possible inputs to the subVI the corresponding amplifiers selected as well as the states of the 3 relays are shown in Table 7 9 Input Amp Number 2 E 05 54 ps 25153 Pu a guis 017 016 615 Control 5 3 Lines to 3 3 bit r ni ial Hexcode p Amp Selected Programmable Gain Amplifier Input G15 ru 1 Summing Amplifier 0 Bo Difference Ampli
73. test are derived from the analysis experiments and shown in Table 18 The upper and lower test limits are obtained from the product data sheet and are also included in the table Table 18 Statistical data for the IQ test The Repeatability Criterion is applied to the IQ test using the statistical parameters from Table 18 Table 19 shows that all three conditions for the Repeatability Criterion hold The system is therefore capable of measuring an instrumentation amplifier s 10 repeatedly without exceedingly the test limits 85 Repeatability Criterion 19 Upper Bound Test HABE 60ABE 176 09 Lower Bound Test uABE 169 31 P T Ratio 6cABE R UTL LTL Table 19 The precision of the IQ test The Correlation Criterion is applied to the 10 test results as shown in Table 20 three conditions hold for the IQ test therefore the system is determined to be accurate Correlation Criterion 10 Status Upper Bound Test uABE 3cABE uDELTA 30DELTA 182 62 Lower Bound Test uABE 3cABE uDELTA 162 78 P T Ratio uDELTA 3oDELTA UTL LTL 009 lt 0 10 Table 20 The accuracy of the IQ test The AutoBench IQ test 1s hereby shown to be adequately precise and accurate 5 6 Analysis of IB IB and IOS Measurements The statistical parameters for the IB and IOS tests are derived from the analysis experiments a
74. testing instrumentation amplifiers The circuits implemented on this board adapt the more general resources available in the AutoBench system to the particular interface of inputs loads outputs and conditions necessary for performing the various parameter tests on the instrumentation amplifier The INA TCB consists of the following parts 1 Resource Interface Connectors Voltage Regulators 2 3 Input Circuitry 4 DUT Interface 3 Output Amplification Circuitry This circuitry is implemented on a 4 layer PCB with top and bottom signal planes an internal subdivided ground plane and an internal subdivided power plane The two signal layers and the device footprints are shown in Figure 12 A bill of materials used on the INA TCB is given in Table 2 33 22 Ps Veet JA pl 5 thurs LA EU 2 4 c HE 4 dis 5 j Fitts sles A IA Board e P 6 3 ona des NND Figure 12 diagram for the INA Test Configuration Board showing the signal layers and device footprints 34 Designator Device Description Designator 3 j DituD9 DL4020 j Diode __ O G2tmGI9 TXS245 2FomCreay o Minibananaplug Headen2 Pn 010
75. the E3631A device The name of the resource used as the External Power Supply 2 is supplied from a global variable file The name and desired voltage and current values are fed as inputs to a predefined VISA Write subVI as with the function that turns the power supply on Figure 24 shows the block diagram for the IA Power to Board Regulators OFF subVI 50 Inputs V 5 VS input value Global Variable Name of External Supply 1 Device Concatenate with rest of 222 command strings Write buffer to specified device Figure 25 Program flow for Set DUT Supplies subVI 4 1 4 IA DUT Supplies OFF The IA DUT Supplies OFF subVI is used to turn off the External Power Supply 1 by requesting OV and 0A from both the positive and negative 25V channels on the appropriate E3631A device The name of the resource used as the External Power Supply 1 is supplied from the global variable file The name and desired voltage and current values are fed as inputs to a predefined VISA Write subVI The command is then written to the device Figure 26 shows the block diagram for the A DUT Supplies OFF subVI 52 Global Variable Command strings for OV NameofExtemalSupplyl 2 and Device ESO EE Write buffer to specified device Figure 26 Program flow for the A DUT Supplies OFF subVI 4 1 5 IA SET Selected Relays The relays labeled and Kx are controlled by the Digital Module l
76. ured by the AutoBench system are frequently referred to as the direct current DC parameters of an instrumentation amplifier They are so called because their measurement involves direct current inputs and outputs Typically most of the parameters specified in the manufacturer s data sheet for an instrumentation amplifier are DC parameters 3 The bench system s functionality was restricted to the DC parameters because these are the most frequently measured parameters in development qualification and support related testing of instrumentation amplifiers Supporting less frequently used AC parameters such as amplifier bandwidth and slew rate would have increased the complexity of the bench testing system without commensurately improving the system s utility The AutoBench system was designed to be capable of measuring the following DC parameters input offset voltage input bias and offset currents power supply rejection quiescent current common mode rejection output swing and gain error 1 3 2 1 Input Offset Voltage VOS Input offset voltage VOS is the voltage that shows up at the output of the amplifier when the amplifier s inputs are grounded i e both inputs are zero and common mode is zero In a real instrumentation amplifier the VOS is non ideal and is therefore not 15 zero as would be expected in the perfect situation The VOS parameter gives a measure of the goodness of the amplifier with smaller VOS being better 1 3 2
77. ured to take voltage readings and adapting the resolution and range of the measured to the signal automatically The voltage is read and its value checked to be within range The PXI MUX 2 switches are disconnected and the device is placed in its default state The steps are carried out by predefined subVIs available in the National Instruments Data Acquisition Package NI DAQ The subVI outputs the voltage reading A block diagram for the program flow in the Measure VOUT subVI is shown in Figure 36 Con amp gure PXI MUX2in 206 E 2 wire 24x1 mode See Connect ch0 com mux2 mux2 Initialize DMM Configure DMM to measure volts and adapt range and resolution to signal automatically Connect 0 to abD in Global Variables PXI MUX 2 ID PXI DMM ID Read voltage output reading Check reading range generate error 1f necessary Disconnect mux2 switches Close PXI MUX 2 Figure 36 Program flow for the Measure EA1 VOUT subVI 65 4 1 19 2 The Measure EA2 VOUT subVI is used to connect the output of the difference amplifier to the Digital Multimeter Module and measure the voltage The subVI is equivalent to the Measure VOUT subVI except that the PXI MUX 2 switch connections are chl to com0 and com0 to abO 42 Parameter Test SubVIs The test procedure for each instrumentation amplifier parameter is captured in a separate subVI The subVI
78. w rounds of testing some tens or hundreds of units that a need arises for a custom testing solution Automatic test equipment ATE used by semiconductor manufacturers to test packaged ICs before delivering them to customers costs hundreds of thousands of dollars to acquire and is expensive to operate Therefore the available automatic test resources within a company are typically limited and are utilized for a broad range of testing tasks from manufacturing to product development and product support Manufacturing purposes generally make fuller use of the features and high speed functionality of ATE and have the highest priority for test time on the ATE Product development characterization qualification and support take lower priority Often the lower priority non manufacturing tasks need only to be able to test low volumes of ICs and therefore do not need the high throughput demanded by manufacturing The expensive high speed capability of the test equipment is therefore superfluous in non manufacturing testing Bench tests are often employed by engineers when only a few devices need to be tested as part of non manufacturing tasks Bench testing is generally a makeshift highly adaptable setup at an electrical bench equipped with a standard set of tools an oscilloscope a multimeter voltage sources perhaps a bread board or some simple frequently used circuitry implemented on a printed circuit board passive and active 10 devices etc B
79. xiliary subVIs are functions written to capture the operation of distinct hardware resources in the AutoBench system that are used across multiple parameter tests The subVIs are instantiated locally when they are needed in a particular test 4 1 1 IA Power to Board Regulators ON The IA Power to Board Regulators ON subVI is used to select the voltage and current settings required of the External Power Supply 2 which is used to power the voltage regulators on the INA TCB The name of the resource used as the External Power Supply 2 is supplied from the global variable file The name and desired voltage and current values are fed as inputs to a predefined VISA Write subVI available in LabVIEW for writing a command buffer to a GPIB device Figure 23 shows the block diagram for the IA Power to Board Regulators ON subVI A voltage of 25V capable of sourcing up to 1A is requested of 49 positive 25V channel on the E3631A while a voltage of 25V at 1A is requested of the negative 25V channel on the same device Global Vanable Command strings for 25V Name of External Supply 2 sign depends on supply Device and 1 Write buffer to specified device Figure 23 Program flow for the IA Power to Board Regulators ON subVI 4 1 2 IA Power to Board Regulators OFF The IA Power to Board Regulators OFF subVI is used to turn off the External Power Supply 2 by requesting and from both the positive and negative 25V channel
80. ystem will lie in the range LABE 6 5 to UABE 3 We are satisfied with the system s capability when the lower bound of this range is greater than the Lower Test Limit LTL specified for the parameter under consideration and the upper bound of the range is lower than the Upper Test Limit UTL In addition a variable called the Precision to Tolerance ratio P T is often used to specify the acceptability of a measurement system s repeatability A P T value of 0 1 is generally regarded as acceptable This translates to the following the error due to repeatability limitations does not take up more than 10 of the tolerance range The P T for the system 1s calculated according to Equation 10 OO R UTL LTL E T Eq 10 Thus the Repeatability Criterion can be summarized by the following three requirements Upper Bound Test 6 cABE lt UTL Lower Bound Test LABE 3 cABE 6 6ABE gt LTL P T Ratio 6 R UTL LTL lt 0 1 similar to the motivation for the Repeatability Criterion the Correlation Criterion is derived by the need to limit the full reasonable spread 99 73 of the measurements for a parameter to the range specified for the parameter in the manufacturer s product data sheet Again the variation in the value of a parameter for different devices yields a distribution within 3 eABE t

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