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TB-7Z-ISDK Hardware User Manual

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1. B DUE MADE IN JAPAN e c 1 E m ME SOC Ts inrevium TH T 5 18 DDR2 SDRAM mounted TOKYO ELECTRON DEVICE LIMITED Figure inreviun Table 5 19 DDR2 SDRAM assignment _ ies mow w o ww m w mow w o mow w ramon w as o e o mos w a rar w w mos w www w mom w o w ma mom w ___ me momo w wom w mow w mose w 39 e mox w w ms 6 w mecs w amore o 3 me e w o 2 o w ar woon w poe __ w w __ oa o w sa w o e w ow mas io ___ bm o
2. NINI NIN 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 8 CameraLink Base RX CN701 The TB 7Z ISDK is equipped with an image data input interface for CameraLink Base camera The board can provide an internal 12V power supply voltage generation circuit by setting J701 So the Power over Camera Link PoCL camera can also be supported Important sure to match the PoCL enable disable setting J701 of the TB 7Z ISDK with that of a camera before connecting them A Fuse F701 is inserted but at worst connected devices or the TB 7Z ISDK board may be damaged e a mM 8 3 p 677 58 y 5 e 5 RE Pa 33 5 Hi 5 m O 29 lt T 31H D 2 UH ESE Figure 5 8 CameraLink Base RX configuration diagram TOKYO ELECTRON DEVICE LIMITED inreviun Camera S zi Link r a 4 CHEJ J701 Chia 1 TIT Tm 1005 _ 10 2 Fis ROHS 2 1 i AT IB M 1 m L MAA ges
3. 37 Table 5 17 J901 signal connection 37 Table 5 18 J902 TXD signal connection 37 Table 5 19 DDR2 SDRAM pin 40 Table 5 20 QSPI Flash vexit vac sie aa s i dadea baia a alia UNO ra d etae ada oa 43 Table 5 21 SW pin 45 Table 5 22 PUSH SW 47 Table 5 23 Rotary SW pin 49 Table 5 24 Rotary SW Output Signal 49 Table 5 25 LED pin ASSIM ______ _________ _ 51 Table 5 26 Pmod pin 53 Table 5 26 Pmod IO Voltage Settings ni 53 Table 5 28 ARM JTAG pin 54 Table 7 1 Default factory 5 67 1 02 TOKYO ELECTRON DEVICE LIMITED 6 inreviun Introduction Thank you for purchasing TB 7Z ISDK board Before using the product be sure to carefully read this user manual and fully understand how to correctly use the product First read through this manual and then always keep it handy SAFETY PRECAUTIONS Observe the precautions listed below to prevent injuries to you or other personnel or damage to property e Before using the product read these safety precautions carefully to assure correct use e These
4. 33 Figure 5 14 mounted 33 Figure 5 15 5 232 configuration 35 Figure 5 16 5 232 36 Figure 5 17 DDR2 SDRAM configuration 38 Figure 5 18 DDR2 SDRAM mounted 2 2 39 Figure 5 19 QSPI Flash configuration eee 42 Figure 5 20 QSPI Flash mounted eee 42 Figure 5 21 DIP SW confIguralOD c aa ea aaa irita ca tt e ti nea 44 Figure 5 22 DIP SW mounlea oii an dal ina ua aaa ia i la li ia 44 Figure 5 23 PUSH SW eee 46 Figure 5 24 PUSH SW mounted 0 2 46 Figure 5 25 Rotary SW configuration 48 Figure 5 26 Rotary SW 48 Figure 5 27 LED configuration 50 Figure 5 28 LED mounted scans ek tinh ashe a 50 Figure 5 29 configuration 52 Figure 5 30 Pmod mounted 52 Figure 5 31 ARM JTAG 54 Figure 5 32 ARM JTAG MOUNTOO osito arras ci i pt d d lait 54 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun Figure 6 1 Figure 6 2 Figure 6 3 Figure 6 4 Figure 6 5
5. 5 20 QSPI Flash mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 20 QSPI Flash pin assignment ame ese o s gt o cuo 2 o o gt o cuo se va moomo o cu ws 2 Rev 1 02 TOKYO ELECTRON DEVICE LIMITED 5 15 DIP SW SW1005 The TB 7Z ISDK board is equipped with an 8 pin DIP SW When the switch is turned on the corresponding FPGA pin is driven high 2 5VD lt DSW7 51005 A6S 8104 H to Spartan 6 DSW DGND DGND DGND DGND DGND DGND DGND DGND 1003 1004 R1005 R1006 R1007 R1008 1009 R1010 47K 47K 41 47K 47K 47K 47K 47K Figure 5 21 DIP SW configuration _ TB EB KE FA cur um Goi LO a E LIMITED DSW a xL EE aug 3 I ER S m IN E 2 E TI Tae 2 carte T T jeans equ a HE Jeet e au ch A i r E E LEE TL IG CE BIER EL HEC AE 5 8 ES 4 PY ama EN gt 8 EN 49 XILINX ez Figure 5 22 SW mounted TOKYO ELECTRON DEVICE LIMITED i
6. EN Power e 8oaasuppy Ces Ces Power 5 6 1 Voltage Setting Jumper of USER J101 As for USER IOP NOO through 23 voltage can be set to 3 3V or 2 5V Table 5 5 voltage of USER IOP ION Figure 11 7 shows the jumper pins The position of a triangular silk marking on the board indicates PIN1 JOO Figure 5 5 voltage setting IMPORTANT JP101 setting must match the setting on the TB 7Z IAE side Before performing the setting be sure to turn off the power switch of the TB 7Z IAE and the user board otherwise it may cause damage to the board Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 7 DVI TX CN601 TB 7Z ISDK board is equipped with an image output DVI D Single Link connector and transmitter Tl s TFP410 or equivalent The beard has been designed for operation at 148 5MHz Image output of 1920x1080x24pixel 60p has been confirmed 905 CNE 12 Sos EE en 11 Data 1 35 6 7725 18 Data0 PA 19 Data0 5 S E 23 Clock A 33V ESD Protection 89909 DSEL SDA mount Connector Spartan 6
7. 2 224 10V 01 Dl 5 2 02 D D801 TPD4E1U06DCKR Figure 5 11 USB 2 0 configuration Rev 1 02 TOKYO ELECTRON DEVICE LIMITED USB 2 0 iov 2 MEN IN __ e EREU e J TIER Figure 5 12 USB 2 0 mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 10 USB 2 0 TB 7Z IAE assignment tea II gt e X wo Table 5 11 4802 USB bus power setting EmbR mee Table 5 12 J803 J804 4805 USB mode setting Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 11 902 TB 7Z ISDK board is equipped with a CAN interface for communication with an external device An onboard D SUB9 connector is used for this connection The TB 7Z ISDK board connects TB 7Z IAE signals to the connector via the onboard CAN Transceiver 904 3 3VD 120 1 J903 CAN Term 1 2 Enabl open sabl Figure 5 13 CAN configuration m E 1 E TB Bg LAE ROHS MEVA 3 la ALIN D SUB9 CAN Figure 5 14 CAN mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 13 CAN 72 assignment Signal
8. Dam io san awoon Dag io sas o ama pass ata io o muss ID IO 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun uos wo woos e w om mwonmo w 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 14 QSPI Flash 1 201 The TB 7Z ISDK board is equipped with 64Mbit QSPI Flash 5 S25FL064P equivalent which is connected to Spartan 6 for its configuration For information about configuration refer to Section 6 Creating a Configuration File 3 3VD 64Mbit QSPI Flash i 3 3VD cm C201 T _QSPI CS _ 1 EE 3 QSPI 101 2 iu QSPI 102 3 SO 101 HOLD IO3 4 SCK VSS 00 S29FLOG4POXNFI003 Spartan 6 Figure 5 19 QSPI Flash configuration QSPI Flash Hi r mi Qs y LL en ITED ROHS 77 2 Prem CE LIM Em jaji m Let A Y ig TE i a XILINX EFA
9. Table 5 27 Pmod IO Voltage Settings J1001 J1002 Pmod Level HR Ha IMPORTANT 5 0V setting is a Pmod standard spec violation Don t connect Pmod module at the 5 0V setting Rev 1 02 TOKYO ELECTRON DEVICE LIMITED TB 7Z ISDK Hardware User Manual Inrevium _ 5 20 ARM JTAG 20pin Header JP802 The TB 7Z ISDK board is equipped with one JTAG connector for ARM debugging The connector is directly connected to TB 7Z IAE It allows for connection of a third party debugger to the SoC Figure 5 31 ARM JTAG configuration ARM JTAG HEBES amme E CURE MADE lm im 8 EA rp ym p E eS wa JH EE RE A B m a M O yA si 2e CE 9 1 un LE POMO Figure 5 32 ARM JTAG mounted Table 5 28 ARM JTAG pin assignment TOKYO ELECTRON DEVICE LIMITED inreviun 6 Generating a Spartan 6 Configuration File 6 1 Settings when generating a configuration file bit file The tool version used in the following description is ISE14 7 Right clock Generate Programming File in the Processes window and select Process properties A Process Properties window will show up I Design Summary Reports Desien Utilities User Constraints Create Timing Constraints FO Pin Planning Pl
10. j a INSTRUMENTS Figure 5 9 CameraLink Base RX mounted Table 5 7 CameraLink PoCL setting NN TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 8 CameraLink Base RX Spartan 6 pin assignment 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 9 10 100Mbps Ethernet CN1101 TB 7Z ISDK board provides one each 10 100Mbps Ethernet PHY and RJ45 connector They are connected to Spartan 6 and can be used as an additional TB 7Z IAE communication port or an external communication interface for Spartan 6 itself LE H i M MANN Wa EN AES E cH 3 SO A n3 TOKYO ELECTRO nrevmnm 6 77 1 Bz La a ROHS 10 100Mbps Ethernet Figure 5 10 10 100Mbps Ethernet mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 9 10 100Mbps Ethernet Spartan 6 assignment II ame tee 1 2 sav eme m mm o ___ 2 3 o exemo 2 me w 2 mm wona e RICE w o 2 mm exemog RIC II RICE me memor 2 xm exem ve
11. B2B Pin Table 5 14 J903 CAN termination setting CAN Termination Enable Disable 1 02 TOKYO ELECTRON DEVICE LIMITED 34 TB 7Z ISDK Hardware User Manual inreviun 5 12 5 232 903 TB 7Z ISDK board is equipped with RS 232 interface for communication with an external device Since the interface is configured as DTE use a cross cable when connected to a PC or others DTE The connection destination device Spartan 6 or TB 7Z IAE to which the RS 232 TXD RXD signal is connected can be selected using J901 and J902 As for Spartan 6 a control signal such as RTS is also connected CNGD1 4902 TKO USER 48 B12 1111 1 905 CN903 USER MIO49 C12 DINI 3 TXD FOUTI 4 RIM1 2 RXD 77 2142 4 6 05 7 2 RIN3 el 1 060 RIN4 46 8 5 RINS 4 9 RI DOUT2 7 RT5 DOUT3 4DTR 5 GND Spartan 6 5 232 LINE DRIVER RECIEVER D SUB9 Connector O O Male Figure 5 15 5 232 configuration Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun a xg mmo NE INTEVIUTI EB KE FA Nm e 1000 Xs ups EC a es e El ae d 1 T E LE TEE B7 TAI g inrevium lau By E 3 1
12. ___ __ ____ Gannecttolcsoa CaN as usen Mom wo Comectiovs02 UART moss Soomes UA p es use oo uo 45 ZmaPLOwfouselO usen oo Aw 2 1 lo usen eros vo ass znqPL so usen eros wo m ss usen eros vo 21 usen wo 7 s 2yaPLGoniguabielO os usen m 2 ssw Jina PL _ we 2 os vo sav ZmaPLOmfouselO se erori wo us 2 lo INSA jew ewm 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun Too use cre ECT Cros es sas o ____ ______ ComecttoPav2 anmo use veus Power ____ ___ ___ wfo C EO e os use 5 Pros veo Tomeo Pi ros ese Te o OO l use se E E E Connecti USE __ 0 use oa fo Connectto USE Power pa E E Te rra Power nsfw O
13. 65 Writing to a 7 65 t0 Cle VIC SO MR RR 66 SWIC cea steaua iasi ii 66 A 66 TOKYO ELECTRON DEVICE LIMITED 5 inreviun List of Tables Table 5 1 Status LED table esec eee ina lia lt a il e iii 16 Table 5 2 Clock INDUL sesionar aia a i pi n di e ab ana a a ii aa 17 Table 5 3 Spartan 6 Bank configuration table 18 Table 5 4 B2B connector pin assignment 19 Table 5 5 1 O voltage or USER TOPON siria dai 22 Table 5 6 DVI TX Spartan 6 Pin 24 Table 5 7 CameraLink PoCL 26 Table 5 8 CameraLink Base RX Spartan 6 assignment 27 Table 5 9 10 100Mbps Ethernet Spartan 6 pin 29 Table 5 10 USB 2 0 TB 7Z IAE pin 32 Table 5 11 J802 USB bus power 32 Table 5 12 J803 J804 J805 USB mode 32 Table 5 13 CAN TB 7Z IAE pin 34 Table 5 14 J903 CAN termination 0 34 Table 5 15 RS 232 TB 7Z IAE 36 Table 5 16 RS 232 Spartan 6 pin
14. Dir means signal directions based on the Spartan 6 mounted board Table 5 4 B2B connector pin assignment table no soane om eax toa ome ES use ors 1 1 Sarane contoan o DEEP ew 1 7 ENTE S5 USERIONO vo B20 1 1 Spartan 6 Configurable IO DIFF 6 USsER ION 1 Spartan 6 Configurable IO DIFF N pF 7 pw ew p s usenjoez wo 1 4 Sparan 6 Configurable DIFFP ___ 10 UsER vo aja Spartan 6 Configurable IO DIFF P M USER ION vo 7 1 Spartan 6 Configurable IO DIFF 12 UsER 1 vo B22 1 opartan 6 Configurable IO DIFF N l lem TOKYO ELECTRON DEVICE LIMITED inreviun mw L use uo 1 Spartan Coniguabioi0 FFP as usen uo pr OER 18 USER 0 05 vo Jt6 111 Spartan 6 Configurable IO DIFF ow ww CT use me 1 Spartans Coniguabioi0 FFP 22 07 019 1 1 Spartan 6 Configurable IO DIFF P 23 o 7 1 Spartan 6 Configurable IO DIFF za use om ipt Conigu
15. set SPI Configuration Bus Width g SPIFall Edge Use SPI Falling Edge g Over Temp Power Down Power Down Device if Over Safe Temperature g AGGESS User Access Register Value g RevisionSelect Revision Select 100 l g Revisionselect_tristate Revision Select Tristate Disable Property display level Advanced Display switch names Default Figure 6 2 Options setting when generating a bit file 6 2 Unused pin setting In the Configuration Options setting set the unused pin setting to Float as shown in Figure 6 4 Rev 1 02 TOKYO ELECTRON DEVICE LIMITED 55 inreviun E Process Properties Configuration Options Category artup Options Readback Options Encryption Options witch Property Name Value g hitPin Configuration Pin Init Full Up e TekPin Pull Up g TdiPin JTAG Pin TDI Pull Up g TdoPiri JTAG Pin TDO Pull Up g ImsPin Pin TMS Pull Up g Disable JT AG Disable JTAG Connection C g UnusedPir Unused 108 Float 53513575253 g UserID UserID Gode 8 Digit Hexadecimal ET rd ol g ExtMasterGclk en Enable External Master Clock e DCIUpdate Made DCI Update Mode As Required g contie Fallback Fallback Reconfiguration Disable 00 Place MultiBoot Settings into Bitstream C g next config addr Starting Address for Fallback Configuration Hone um nevt comtia reboot Pant Trzart thd in the Pittila J En ahla Pr
16. inreviun TB 7Z ISDK Hardware User Manual Rev 1 02 No reproduction or republication of part or the whole of the contents of this document is strictly prohibited The company name and the product name described in this document is a trademark or a registered trademark of each company Tokyo Electron Device Limited assumes no responsibility or liability for any damages including but not limited to any special incidental or consequential damages arising out of any error in publication or the use of this document The content of this document may be changed without prior notice Rev 1 02 TOKYO ELECTRON DEVICE LIMITED 1 inreviun Revision History Rev 1 02 2015 10 15 Initial Release Rev 1 02 TOKYO ELECTRON DEVICE LIMITED 2 inreviun Table of Contents Related 5 660 6 i a ii it 10 10 gin ee 10 so dB oH nd tiie ra cats al 11 3 2 viewor TB 7 ZIS apns pe 12 4 0 18 eiie NR E E 13 COMPONENIS mr 15 FOWO f II RR 15 2 POE Gabi ein ou 15 5 3 Status Confirmation of the 25 cea aaa do aaa alea 16 s Clock TE 1
17. Transmitter Female Figure 5 6 DVI TX configuration diagram DV TB EB 72447 Rev 2 M IN JAPAN s 1 px ES hoy TOO rs Figure 5 7 DVI TX mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 6 DVI Spartan 6 Pin Assignment II RR TT 2 ow w om me w 2 Lor me e ow 2 om mo w 2 ow o omw 2 _ wm me 2 w me w 2 o om me ws 2 sw me ___ e ve 2 as owm me m 2 sw _ as me ___ 2 Low mo e 2 ow 2 po __ m 2 sw _ m m 2 BI _ omm me 2 sw _ Lm me wm m ome me w 2 ow m m aa Lom om w sw _ Lm gt 2 Lom mse w Lm new ve 2 Lm men me 2 m 2 a ve 2 sw _ C gt ww www we 2 _ sum ve 2 Lom wmm s ne 2 sw _ sas sx m 2
18. aa ame o 2 nO exem 2 3w or w 2 os v aa mos 1 memos 2 sav 2 ICE mm o 2 3w o 2 aa mm us 2 e 2 es eecs w 2 3w wc o 2 o o w 2 neuen ne ewe 2 a ameo 2 sav sxaxewaz we aw i woe ve 2 1 02 TOKYO ELECTRON DEVICE LIMITED TB 7Z ISDK Hardware User Manual inreviun 5 10 USB 2 0 CN804 The TB 7Z ISDK board provides a USB 2 0 interface for connection to an external device Since the connector CN804 uses USB 2 0 Type AB it is needed to prepare an appropriate cable separately The TB 7Z ISDK board connects TB 7Z IAE signals to connector Host Device mode selection can be done on the board J804 J805 2 NRPNO21PAEN RC USB R813 1K 1W CN804 67803 8020 USB VBUS R816 10K_1 10W 4 E USB DM EA 2 MEME USB 3 USB ID J802 J803 5 aD Y NRPNO21PAEN RC NRPNO21PAEN RC 2 DGND
19. 29 111 Spartan Coniguabio10 54 USER_ION17 vo 622 1 1 Spartan 6 Configurable IO DIFF CTI Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun se usen wo Hat Spartan 6 Configurable 10 DIFF P GCLK so usen wo 1 4 Spartan 6 Configurable 10 DIFF N so usen onis wo 2 6 Configurable 10 DIFF N cor ew p es usiomo vo Meo 1 SberansConfguable 10 DIFF P GOLK usen wo uo 6 Configurable 0 DIFF P GCLK es user wo us 1 4 Spartan 6 Configurable 10 DIFF N GOL e amp UsER Io 422 aja Spartan 6 Configurable IO DIFF GCLK Der pene o p user Spataro Contgurable1O DIFFP Gourd za 1 jew 75 usen wo GowecteJPEO ARMJTAG _____ wo connectio JP802 ARM JTAG 77 USER_MIO24 0 Connect to JP802 ARM JTAG GonnecitoUPB02 ARM JTAG re usen wo ______ ___ dog Pr usen vo _ ____ __ ___ Comnectto CAN se
20. ERF8 060 05 0 L DV K TR Ethernet MICREL KSZ9031MNXIA USB Connector DVI RS 232C CAN Bus Pmod Connector Clock Rev 1 02 RJ 45 BEL L834 1G1T 32 MOLEX 67803 8020 TI DVI Transmitter TRS3243EIDBR SN65HVD233D TXS0108EPWR 74 25MHz 25MHz OSC TOKYO ELECTRON DEVICE LIMITED inreviun 00000000 60000666 099999000 o 4 O 2 Eo eo GE 58 Las deu Figure 4 1 Board dimensions inclusive of wastable substrate Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 Description of Components 5 1 Power supply Figure 5 1 shows the power sources 12V e p TPS54527 L 5V TB 7Z IAE DVI USB PMOD or TPS54327 gt 1 2V Spartan 6 VCCINT or TPS54227 e 1 8V Spartan 6 VCCO DDR2 Spartan 6 QSPI DVI RS232C gt 854227 33V CAN PMOD TB 7Z IAE VCCO Spartan 6 VCCO CameraLink gt 5427 gt 25V TB 7Z IAE VCCO 12V CameraLink Figure 5 1 Power sources 5 2 Power Input Connect the attached AC adaptor 12V to CN1 When the switch SW1 is set to ON power is turned Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 3 Status Confirmation of the Board
21. Figure 6 6 Figure 6 7 Figure 6 8 Figure 6 9 Figure 6 10 Figure 6 11 Figure 6 12 Figure 6 13 Figure 6 14 Figure 6 15 Figure 6 16 Figure 6 17 Figure 6 18 Figure 6 19 Figure 6 20 Figure 6 21 Figure 6 22 Figure 6 23 Figure 6 24 Figure 6 25 Figure 6 26 Rev 1 02 Process Properties 55 Options setting when generating a bit 55 Unused setting 56 Generating a configuration file on 56 IVC SS AGS ae va lu mmn 57 IMPACT dai o oale i 57 IMPACT 2 cae sine ol n lt i ina a li ata i li ie 58 IMPACT eo pei re e ee ata alive notele Sl ta ali 58 IMPACT AVU CIO 59 IMPAC F Tui 7 59 IMPACTWINCOW ________ __ 60 IMPACT WINdOW 7 EE 60 IMPAC WINO aaa ile aie ina lea 60 IMPACT ol 61 IMPACT eo 61 Onboard JTAG connector wauwa 62 VIE 2 M erc c sap di ata a a tanin sa 62 Writing to a 63 Writing to a 3 63 5 2 PE 64 toa device icoana tasta Eug mea 64 Writing to device
22. two 16 position rotary switches DER L4 1 3 _ ___ VCCO_1_ADJ lt SW1006 SC 1010 DGND DGND DGND DGND R1021 R1022 R1023 R1024 47K 47K 47K 47K RSWI 1r VCCO 1 ADJ lt Em RSW 1 E RSWA 1 EE mmm em 1 E 1 SW1007 SC 1010 1025 1026 R1027 1028 47K 47K 47K 47K Figure 5 25 Rotary SW configuration TB EB KE FA A EL v2 IN JAPAN f gt W EE A RSW 2 XILINX Figure 5 5 26 Rotary SW mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 23 Rotary SW assignment Name __ Pino tee o0 __ _ _ 1 ________ rw wo ee t O see SW1007 X Table 5 24 Rotary SW Output Signal Values EET UTE ESTE _________ o ___ 4 e ESTATE ESTE Ls ETT TENE s asaza caror NCAA ESTE 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 18 LEDO 15 LEDO 15 The TB 7Z ISDK board is equipped with 16 user LEDs Each LED will light up when the correspondi
23. 10 1 00Mbps Ethernet B2B Prod Connector a ctor USER IOP 23 0 USER I2 23 0 ARM JTAG microsp 20pin Header USER_SIO 1 1 0 Socket USER MICI9 0 Mini Type AB USB ZADE VP N Connector USB DP ID vBLIS XADC PS POR B PS SRST 2pin Header puis BATT Spartan 6 2 JTAG 5VD GD 14pin Header Real Time Clock 2 c c D T x x D en o D co i m cn E TET zd m LJ A Figure 3 1 TB 7Z ISDK block diagram Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 3 2 External View TB 7Z ISDK Figure 3 2 shows the external view of the TB 7Z ISDK DVI USB 2 0 Spartan 6 ARM Spartan 6 Link 4 1 DSW PMOD 2 RSW X2 PSW x4 E XILI T X LED 10 100Mbps D SUB9 D SUB9 x16 Ethernet UART CAN DC12V Input Figure 3 2 External view TOKYO ELECTRON DEVICE LIMITED inreviun 4 Board Specifications Figure 4 1 shows the specifications of the dedicated Spartan 6 board External dimensions 185 00mm W 110 00mm H Number of layers 8 layers Board thickness 1 6mm Material FR 4 FPGA XC6SLX45 2FGG484C Memory 128MByte DDR2 SDRAM Component 64Mbit Quad SPI QSPI Flash CAMERA LINK 12226 5150 00PL B2B Connector SAMTEC
24. 5 Desktop Figure 6 15 iMPACT window 10 Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 6 4 Writing a Configuration File to the Flash Memory Connect a Platform USB cable to the JTAG connector 401 as shown in Figure 6 17 on onboard power supply Then run and write a target configuration to the Flash accordance with the following procedure Figure 6 16 Onboard JTAG connector 1 Double click DoBoundary Scan Then click Initialize Chain indicated by an arrow ISE iMPACT 0 76xd Boundary Scan Em File Edit View Operations Output Debug Window Help Bak oh iMPACT Flows i 81 Boundary Scan SystemAGE Create PROM File FROM File Formatter WebTalk Data Fight click to Add Device or Initialize JTAG chain iMPACT Processes Available Operations are Boundary Scan Gonzale Welcome to iMPACT iMPACT Version 13 3 BATCH CMD setHode BATCH CMD setHode BATCH setHode BATCH setHode 2 Console Errors ay Warnings Gable Connection File Open Figure 6 17 Writing to a device 1 Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 2 When a window to set bit and jed file options appears cancel it Select FPGA and then right click and select Add SPI BPI Flash ISE iMPACT 0 76xd Boundary Scan BEES E File View Operations Output Debug Window H
25. 7 ewe cece ra acne aster cee 17 5 5 1 Spartan 6 Bank 18 2 ae alterata 19 5 6 1 I O Voltage Setting Jumper of USER_IOP N 2101 22 oaie ia te 23 5 8 CameraLink Base 701 nenea nana 25 5 9 10 100Mbps Ethernet 1101 2 9 28 5 10 USB OCI ti a a 30 5 11 e EG A E ESE E O EGES 33 5 12 INO 35 5 13 DDR2 SDRAM 501 2 00000000 0 0 38 5 14 ASP Plast O m 42 5 15 0 2 E 44 5 16 OW AAA 46 5 17 Rotary 48 5 18 LEDO 50 5 19 iii 52 5 20 ARM JTAG 20pin Header JP802 54 6 Generating a Spartan 6 Configuration 55 6 1 Settings when generating a configuration file bit 55 MEE Unused pin SC WING em 55 6 3 Generating a configuration file mcs 56 6 4 Writing a Configuration File to the Flash 62 BI erede uem ELLE 67 Re
26. BE 4 11 a HE 8 LEDS in D SUB9 UART Figure 5 16 RS 232 mounted Table 5 15 RS 232 TB 7Z IAE pin assignment TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 16 RS 232 Spartan 6 assignment er om o Fawn m o rom eao o w o one w o rosa m 9 Roms e 9 __ moos w o mum Table 5 17 J901 RXD signal connection setting Table 5 18 J902 TXD signal connection setting Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 13 DDR2 SDRAM 1 501 TB 7Z ISDK board is equipped with DDR2 SDRAM 5 MT47H64M16HR 3 H or equivalent can be used for storage of user data including image frame buffer o Specification 1Gbit 8M x 16 x 8bank Address configuration Bank 3bit Address 13bit Row address 13bit Column address 10bit o Data bus configuration Byte access with data strobe signal DQS data mask for each byte Data mask signal DM is controlled on a byte by byte basis IC101 501 Spartan 6 DDR2 SDRAM Figure 5 17 DDR2 SDRAM configuration 1 02 TOKYO ELECTRON DEVICE LIMITED 2 N zl pem La Jj e ME
27. Checking done pin d ne 11 Programmed successfully kd lt JA gt Console o Errors Warnings J Configuration Platform Cable USB I 6 MHz Figure 6 24 Writing to a device 8 9 The data written to the Flash memory is sent to the FPGA using QSPI for configuration The configuration can be started by turning the onboard power supply on or by pressing the Reconfiguration Switch SW201 as shown in ins 6 26 Figure 6 25 Reconfiguration switch 10 The status of the FPGA configuration can be monitored by observing the LED201 shown in Figure 6 27 LED201 yellow Configuration completed successfully Figure 6 26 Configuration status TOKYO ELECTRON DEVICE LIMITED inreviun 7 Default Factory Settings Table 7 1 shows the TB 7Z ISDK default factory settings Observe the switches shown in Figure 7 1 Table 7 1 Default factory settings we w moe Le ___ 7 CaNtermnaten O Lu s __ ______ L2 swo o O w IE Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun TOKYO ELECTRON DEVICE LIMITED inrevium http solutions inrevium com HEAD Quarte
28. Flash Ethernet TB 7Z IAE USER GIO Figure 5 3 Spartan 6 Bank configuration TB 7Z IAE USER_IOP N PMOD RSW 2 or 3 3V mx DVI QSPI Flash Ethernet TB 7Z IAE USER GIO Table 5 3 Spartan 6 Bank configuration table TOKYO ELECTRON DEVICE LIMITED inreviun 5 6 2 801 The TB 7Z ISDN board provides TB 7Z IAE dedicated connector B2B connector At the time of shipment the board comes with TB 7Z IAE Hot swapping is not allowed TB 7Z IAE s Zynq PS MIO Zynq PL IO USB 2 0 ADC input 5V power input and GND are included TB 7Z IAE RE n T 1 Fal CA KE FA MR ai eer n de I i m MES re zi E Mar ru iin bad AN an qe AM Lu P 1 1 H 5 gt gt 7 a 1578 EE 555 frmevium E BI ROHS p gt EN i 9 A i gt gt h cz 4 M a E le 3 E E pi et fea Figure 5 4 TB 7Z ISDN with TB 7Z IAE Table 5 4 shows pin assignment table associated with TB 7Z IAE In the table below
29. PGA Configure MultiBoot El BPI Flash Configure Single FPGA Configure MultiBoot Configure From Paralleled PRO Ms Generic Parallel PROM Description Step 2 Storage Device bits Add Storage Device 128M Add Storage Device s H38M Remove Storage Device 5 File Format Auto Select PROM In this step you will enter information to assist in setting up and generating a PROM for the targeted storage device and mode inreviun Step d General File Detai Checksum Fill Enter Data Value FF Output File Name sample Output File Location Flash PROM File Property 5 Add MNon Configuration Data Files s Checksum Fill Walue When data iz insufficient ta fill the entire memory ofa PROM the value specified here used ta calculate the checksum ofthe unused portions Output File This allows you to specify the base name ofthe to which your PROM data will be written Output File Location This allows you to specify the directory in which the file named above willbe created File Format PROM files can be generated in any number ofindustry standard formats Depending on the PROM file format your PROM programmer uses you output a MES HEX or BIN is the most popular 1510 used when targeting programming flows that utilize IEEE Std 1537 Third Party socket based programmers usually accept any of the
30. Parallel PROM Description Select Storage Target Step 2 Storage Device bits Add Storage Device Auto Select PROM Add Storage Device s orage Device Enter Data Flash PROM File Property Value 2 File Forma SII Use Power of 2 for Start Adar of Bitstream 2 Bitstream 0 Start Adares Bitstream 1 Start Address 575840 Add Mon Configuration Data Files Yes ber of Data File In this step you will select the appropriate target device Storage Device This selection allows you to choose the specific device memory density you are targeting Add Storage Device After selecting the memory target use this button to add the device to the target Storage Device list below Remove Storage Device Use this button to delete the target device from the list below Select the device and click this button to remowe it from the list s Auto Select PROM select this option iMPACT will choose device density large enough to hold your specified data Figure 6 8 MPACT window 3 Cancel 6 After clicking the rightwards arrow fill in the Output File and Output File Location fields directories and then click OK Rev 1 02 TOKYO ELECTRON DEVICE LIMITED E PROM File Formatter Step Select Storage Target Storage Device xilin Flashi PROM E FPGA spartan il El SPI Flash Configure Single F
31. The power status of the board can be checked by visually observing the associated LED indicator The board also provides a status LED indicator which shows the completion of Spartan 6 configuration after power is up Table 5 1 Status LED table LED1 Yellow 12V power OK LED201 Yellow Completion of 2 PL configuration Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 4 Clock Configuration The board has the following clock sources They are connected to the Spartan 6 Table 5 2 Clock input 202 74 25MHz 74 25 LVCMOS33 12 DVI clock 204 25MHz 25 000 LVCMOS33 Ethernet clock Spartan 6 1 101 The TB 7Z ISDK board is equipped with Spartan 6 XC6SLX45 for multiple uses of TB 7Z IAE s lOs Spartan 6 EN A a mes IA cupit En gt i Figure 5 2 Spartan 6 mounting diagram TOKYO ELECTRON DEVICE LIMITED inreviun 5 5 1 Spartan 6 Bank Configuration Each IO Bank of Spartan 6 is connected to various interfaces and memory devices other than TB 7Z IAE Figure 5 5 and Table 5 3 show Spartan 6 Banks and the devices to which they are connected CameraLink D SUBS UART ID IB e 22 17 19 21 BANK1 TB Z AE USER_IOPIN PMOD RSW BANK3 boka soram CE md I I T 1 5 LED PSW gt PRESCADUZENACI BANK2 DVI QSPI
32. anGhead Post Synthesis Floorplan avnthesize Implement Design Generate Programming File Sgt Configure Target Device p Bun ES Generate Target PROM ACE En Manage Configuration Project Rerun All Design Using Chipscope zn Force Process Up to Date Implement Top Module Design Goals amp Strategies Figure 6 1 Process Properties window The TB 7X ISDK is equipped with QSPI Flash Memory for configuration So set the bus width to 4 in the Configuration Options setting when generating a bit file Note Make sure that Property display level is set to Advanced E Process Properties Gontiguration Options Category Switch Property Value Unused IOB Pins Pull Up g UnusedPin Configuration Options ze options UserID UserID Code 8 Digit Hexadecimal Options g ExtMasterOclk_en Enable External Master Glock Disable g DG Update Mode Update Mode As Required g config Fallback Fallback Reconfiguration Disable g next_contig_addr Starting Address for Fallback Configuration Watchdog Timer Mode g TIMER TIMER Watchdog Timer Value 0 00000000 g page size BPI Reads Per Page 1 E ist read Cycles for First Page Read 1 g ezvnc mode BFI Synce Disable SPI 32 bit Addressing
33. dex cfm WO 1 c05 1007 100F 1 2 0 4 3 C1001 1008 21001 DGND DGND 21008 caz b 1 20 R1034 220 1 1 2 19 21055 220 3 Hus ies 18 RIGS 220 4 17 21037 220 5 e 5 o 0 2 6 7 14 R1041 20 8 fe 13 21042 20 9 As E 12 21043 20 a 10 a ae 11 R104 20 IC1001 E TXSO108EPWR DG D SSW 105 01 F D 20 R1045 220 Al 1 19 21046 220 n 18 21047 220 17 R1048 220 B3 4 16 M 5 5 es _ 6 22 14 21049 20 7 7 39 1 8 n zs 12 R1051 20 M n E TXSO108EPVR C1006 Sue 100 F 3 21002 DGND NRPNOBIPAENRC DGNDDGND C1004 C1008 10QF Figure 5 29 Pmod configuration i s By a o js ES n T pen BENI ARIT PMOD 2 es T 4 d PT E TY 5 MEE Figure 5 30 Pmod mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 26 Pmod assignment ame aer morm mw o o worm o meo m
34. e or steam Locations exposed to direct sunlight Locations close to heating equipment Closed inside of a car where the temperature becomes high Staticky locations Locations close to water or chemicals Otherwise a fire electric shock accident or deformation may occur due to a short circuit or heat generation Do not place heavy things on the product Otherwise the product may be damaged Disclaimer This product is a function evaluation kit designed for mass production use of Tokyo Electron Device s TB 7Z IAE board Tokyo Electron Device Limited assumes no responsibility for any damages resulting from the use of this product for purposes other than those stated Even if the product is used properly Tokyo Electron Device Limited assumes no responsibility for any damages caused by 1 Earthquake thunder natural disaster or fire resulting from the use beyond our responsibility acts by a third party or other accidents the customer s willful or accidental misuse or use under other abnormal conditions 2 Secondary impact arising from use of this product or its unusable state business interruption or others 3 Use of this product against the instructions given in this manual 4 Malfunctions due to connection to other devices Tokyo Electron Device Limited assumes no responsibility or liability for 1 Erasure or corruption of data arising from use of this product 2 Any consequences or other abnormalities arisi
35. ele FPGA Console DA x INFO 501 1 Added Device xc6slx45 successfully Add 16 794 Console Errors a Warnings PROM File Generation Target SPI Flash 11 875 232 Bits used File sample in Location C Users 095815 Desktop Figure 6 14 iMPACT window 9 12 When the configuration file is created successfully a Generate Succeeded message will be displayed ISE iMPACT 20131013 PROM File Formatter SPI Flash Single FPGA File Edit View Operations Output Debug Window Help iMPACT Floves O GF x Boundary Scan 0550000 0000 SystemACE downloadhit Create PROM File PROM File For wa WebTalk Data Current iMPACT Statistics 1 E WebTalk Report m WebTalk Log File xoBs45 download bit mE iMPACT 8 Availabl Operations are Generate File Generate Succeeded 0550077 FFFF pr PROM File Formatter SPI Flash Sinele FPGA P Ud d HS 13 Console Desktop sample PIm Dezkropisample cri es Writing fil nC Users 0 95 i Users 095 rre CMD setCur le 815 815 BATCH entDesign version 0 E Console Qi Errors Warnings PROM File Generation Target SPI Flash 11 875 232 Bits used sample in Location C Users 09581
36. elp Ex IMPACT Flows E s Boundary Scan SvstemAGE Create PROM File PROM File Formatter 1 WebTalk Data Access eFUSE Registers Get Device ID XcTk32 E Get Device Signature Usercode bypass Yew Lontigeuration Set Programming Properties Available Operations are dd i il mb Program eFUSE Registers Launch File Assignment Wizard Read eFUSE Registers Set eFUSE Control Register mb Read eFUSE Control Register Get Device Signatures Usercode mb Read Device Status Boundary Scan PROGRESS END End Operation Elapsed time sec ff BATCH CMD identifyMPM 4 E Console Errors Warnines Configuration Platform Gable USB 0 6 MHz uzb hs Figure 6 18 Writing to a device 2 3 Choose a target configuration file xxx mcs which is written to the Flash memory Add PROM File Fret DEP 2p sample mes D Files mcs Figure 6 19 Writing to a device 3 Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 4 Select the onboard Flash memory 525 1064 set Data Width to 4 and click OK Select Attached SPI BPI select the PROM attached to FPGA SPI PROM Data Width Cancel Figure 6 20 Writing to a device 4 5 Double click Program in the iMPACT Pr
37. gure 6 22 Writing to a device 6 7 The write operation will start f ISE IMPACT 0 76xd Boundary Scan IMPACT Flows O x 23 Boundary Scan SystemACE Create PROM File PROM File Formatter WebTalk Data 4 5 Fight click device to select operations bypass IMPACT Processes E Configuration Operation Status Executing command LL Boundary Scan Console Found Slave on Bus Index SPI core clock speed value PROGRESS START Starting Operation 11 IDCODE is Obals in hex 1 ID Check passed 11 Erasing Device 1 Using Sector Erase 2 Console Errors Wamines Configuration Platform Cable USB II 6 MHz Figure 6 23 Writing to a device 7 TOKYO ELECTRON DEVICE LIMITED inreviun 8 When the write operation is successfully completed a Program Succeeded message will show up ISE IMPACT 0 76xd Boundary Scan File Edit View Operations Output Debug Window AT iMPACT Flows click device to select operations i ma Boundary Scan a System GE Create PROM File PROM File Formatter WebTalk Data xerk325t bypass Processes Program Succeeded Boundary Scan Console done 1 Verification completed 1 Programming in x4 mode PROGRESS END End Operation Elapsed time 1166 mac ii INFO MHPACT 1
38. ify the product Otherwise a fire or electric shock may occur due to a short circuit or heat generation For inspection modification or repair contact our sales personnel Do not touch a cooling fan As a cooling fan rotates in high speed do not put your hand close to it Otherwise it may Cause injury to persons Never touch a rotating cooling fan Do not place the product on unstable locations Otherwise it may drop or fall resulting in injury to persons or failure If the product is dropped or damaged do not use it as is Otherwise a fire or electric shock may occur Do not touch the product with a metallic object Otherwise a fire or electric shock may occur Do not place the product in dusty or humid locations or where water may splash Otherwise a fire or electric shock may occur Do not get the product wet or touch it with a wet hand Otherwise the product may break down or it may cause a fire smoking or electric shock Do not touch a connector on the product gold plated portion Otherwise the surface of a connector may be contaminated with sweat or skin oil resulting in contact failure of a connector or it may cause a malfunction fire or electric shock due to static electricity TOKYO ELECTRON DEVICE LIMITED Rev 1 02 inreviun Do not use or place the product in the following locations Humid and dusty locations Airless locations such as closet or bookshelf Locations which receive oily smok
39. listed M 7 Click OK Rev 1 02 Figure 6 9 MPACT window 4 Add Device 1 Start adding device file to Revizion O 6 10 5 TOKYO ELECTRON DEVICE LIMITED inreviun 8 Choose bit file for creating a configuration file Add Device Sr mple bit zv FPGA Bit Files bit Figure 6 11 window 6 9 Click Add Device Would vou add another device to 7 Revision 7 Figure 6 12 window 7 10 Add Device You have completed the device file entry Glick Ok to continue Figure 6 13 iMPACT window 8 Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 11 Double click Generate File ISE IMPACT 20131013 PROM File Formatter SPI Flash Single FPGA mem gt WP File Edit View Operations Output Debug Window Help AT v iMPACT Flows a 8 Boundary Scan 0 0000 0000 E SystemACE Create PROM File PROM File 2 WebTalk Data E Current iMPACT Statistics WebTalk Report WebTalk Log File download bit 1 1 1 45 download bi 1 HS 1d IMPACT Processes O 0 lt 007F_FFFF en File Formatter Flash Sm
40. luding serial interfaces for industrial products which can be used for functional evaluation of a wide variety of industrial products from IO control device to inspection system Feature 3 Evaluation kit of the embedded module TB 7Z IAE for industrial network products o on a dedicated Spartan 6 board to evaluate the functionality of the TB 7Z IAE o Serial interfaces such as RS232C and which are used for industrial products With CameraLink Base RX image capture and DVI TX monitor output function an image processing system fully utilizing the TB 7Z IAE performance is configurable 128MByte DDR2 SDRAM that allows storage of image frame buffers and large volumes of data Peripherals for debugging such as LED PUSH SW DIP SW and Rotary SW O O Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 3 1 Block Diagram Figure 3 1 shows the TB 7Z ISDK block diagram TB 7Z ISDK is a kit combining the TB 7Z IAE and the dedicated Spartan 6 board INSZ FA 320123 NSZ 32012 WHOS ox 037 olAgiz 5 WHOS gt zu uoa iD ou 9 u Em pe ES Base Board TB 7Z IAE SoM Gigabit cone Ethernet x 2 RS232C CAN Connector Spartan 6 FPGA Zynq AP SoC TX XC6SLX45 FGG484 XC72Z020 CLG400 CameraLink Connector SoC XILINX JTAG Header RJ45
41. ng FPGA output pin is driven High Aroa UM m ae AA a E PRO dawn OG 3 LEDI 2 zu Figure 5 27 LED configuration prod ER T EN e d INTEVIUTI TB EB KE F ff 218 TRA miim ma LED x16 Figure 5 28 LED mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 25 LED assignment ame dee w gt te e s 3 3 o x Lew 3 aen 3 o ew w 3 aes ws 01401401010101010100101010101 010 0 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 19 J1003 J1004 TB 7Z ISDK board is equipped with two Pmod connectors provides a way of expanding various functions by connecting Digilent provided Pmod modules DIGILENT Home Page gt Peripheral Modules http www digilentinc com in
42. ng from use of this product or 3 Damage of this product not due to our responsibility or failure due to modification This product has been developed by assuming its use for research testing or evaluation It is not authorized for use in any system or application that requires high reliability Repair of this product is carried out by replacing it on chargeable basis not repairing the faulty devices However non chargeable replacement is offered for initial failure if such notification is received within two weeks after delivery of the product The specification of this product is subject to change without prior notice The product is subject to discontinuation without prior notice Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 1 Related Documents and Accessories Related documenis All documents related to this board can be downloaded from our website Board Fixtures ao Industrial Grade SoM System On Module 72 Board Foot Rubber foot 9 Screw M3 L 6 8 Spacer M3 L 10 9 ao Jumper Socket 6 Board Accessories o Adaptor AKIZUSHI DENSHI LTE GFP 451DA 1238 equivalent 1 g Jumper Socket 7 2 Overview The TB 7Z ISDK board is an evaluation kit which is built on a dedicated Spartan 6 board incorporating the embedded module TB 7Z IAE providing various interfaces for use of industrial network products The TB 7Z ISDK board is equipped with camera input and monitor output interface inc
43. nreviun Table 5 21 SW assignment SoraiName wo La w a a La ow La a a ome e 3 La o Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 16 PUSH SW 5 0 3 The TB 7Z ISDK is equipped with four PushSWs When the switch is depressed the corresponding FPGA input is driven low 2 5VD 2 5VD R1011 4 7K SW1002 PSW2 010 DGND DGND Figure 5 23 PUSH SW configuration 5 128 ud E 1 n Ce CELE 1 E 100 a iii pta SAS P z Eus 1 F Burda 5 EE m Pe A pe roc M D BB TUI INIM 1 Tu 1 9 TF E NL amem 4 E i f PSW 4 HIE RoHS L4 TEXAS INSTRUMENTS Figure 5 24 PUSH SW mounted TOKYO ELECTRON DEVICE LIMITED inreviun Table 5 22 PUSH SW assignment Pswo swo 1 3 ww __ __ 3 sm 7 1 _ Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 5 17 Rotary SW RSWO RSW1 The TB 7Z ISDK board is equipped with
44. ocesses window E ISE iMPACT 0 76xd Boundary Scan ex File Edit View Operations Output Debug Window Help 2 0 IMPACT Flows O x 28 Boundary Scan SystemACE Create PROM File PROM File Formatter WebTalk Data Faght click device to select operations xcrk325t bypass IMPACT Processes available Operations are Verify mj Erase mb Blank Check mpo Readback Get Device Checksum Read Device Status Boundary Scan Console Elapsed time sec BATCH CMD identifyMPM Selected part 250128 fi BATCH CMD attachflash position 1 spi 250128 Unprotect sectors FALSE ff BATCH CMD assignfiletoattachedflash position 1 file C sample sample mes 4 A E Console o Errors Warnings Configuration Platform Gable USB I 6 MHz uzb hs Figure 6 21 Writing to a device 5 Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 6 Click Device Programming Properties Device 1 Programming Properties Category CU Device 1 FPGA Property Device 1 Attached 22 Verify General And PROM Properties Design Specific Erase Before Programming FPGA Device Specific Programming Properties After programming Flash lautomatically load FPGA with Configuration Bank Voltage Based OFGBVS pin Fi
45. operty display level Advanced Display switch names Default ee Figure 6 3 Unused pin setting 6 3 Generating a configuration file mcs file The following procedure describes how to generate a configuration file Generate a configuration file for writing data to the Flash memory 1 Double click Generate Target PROM ACE File Processes Running Processes GOMNFIG T Design Summary Reports ES Design Utilities User Constraints E Create Timing Constraints fe Pin Planning tPlan amp head Pre Synthesis Pin Planning tPlan amp head Post Synthesis Floorplan Area TO Logic E PA EN synthesize PA Implement Design PICA Translate Cat PIES Place amp Route 00 Generate Programming File 2 ae onfigure Target Generate Target PROM AGE File c Manage Configuration Project MP AC cau Bnalvze Design Using Chipscope Figure 6 4 Generating a configuration file on ISE 2 When the following Warning shows up click OK Rev 1 02 TOKYO ELECTRON DEVICE LIMITED 56 TB 7Z ISDK Hardware User Manual Ing PVIUN _ Warning iMPACT project file exists Click to open IMPACT Tou will then need to add complete programming details to PROM file formatter or SystemAGE and then save the IMPACT project file Once this step is completed subsequent runs of the Generate Target PROM ACE process can generate
46. precautions contain serious safety instructions that must be observed e After reading through this manual be sure to always keep it handy The following conventions are used to indicate the possibility of injury damage and classify precautions if the product is handled incorrectly Indicates the high possibility of serious injury or death if the product is handled Danger incorrectly Indicates the possibility of serious injury or death if the product is handled arning incorrectly Indicates the possibility of injury or physical damage in connection with houses or Caution household goods if the product is handled incorrectly The following graphical symbols are used to indicate and classify precautions in this manual Examples Turn off the power switch Do not disassemble the product Do not attempt this Rev 1 02 TOKYO ELECTRON DEVICE LIMITED TB 7Z ISDK Hardware User Manual inreviun Warning A In the event of a failure disconnect the power supply If the product is used as is a fire or electric shock may occur Disconnect the power supply immediately and contact our sales personnel for repair If an unpleasant smell or smoking occurs disconnect the power supply If the product is used as 15 a fire or electric shock may occur Disconnect the power supply immediately After verifying that no smoking is observed contact our sales personnel for repair Do not disassemble repair or mod
47. r Yokohama East Square 1 4 Kinko cho Kanagawa ku Yokohama City Kanagawa Japan 221 0056 TEL 81 45 443 4016 FAX 81 45 443 4058 Contact http solutions inrevium com contact index html Rev 1 02 TOKYO ELECTRON DEVICE LIMITED 68
48. rabioi0 RER 8m za use uo om 1 Congurabioi0 EP use fre 1 Spartan Coniguabio10 FEN 30 USER_ION09 o 022 1 1 Spartan 6 Configurable IO DIFF ES E E 8mm usto 1 14 ESTATE 34 USER 10 1 619 1 Spartan 6 Configurable IO DIFF 35 USER vo 22 1 Spartan e Configurable IO DIFF use Stans Conigurabioi0 8mm fuser 1 14 Goniguable o ao usen oris em 1 1 Congurabioio Pi n use rome 1 Spartans Coniguabio10 FEN 42 USER o E22 1 1 Spartan 6 Configurable IO DIFF __ _ re as io orz 1 1 soanane Goniguable 0 OFFF 46 USER IOPi5 0 F21 1 Spartan 6 Configurable IO DIFF P Spartan 6 Configurable 10 DIFF N ae use ree pr Saran Coniguabioio ai CIR w ow we 1 14 ESTATE sa em Saran Goniguable 0 OFF sa use
49. the file without needing to open the IMPACT Figure 6 5 Warning message 3 When iMPACT is started up double click Create PROM File E ISE iMPACT M 63c File Edit View Operations Output Debug Window AT IN IMPACT Flows Dax iMPACT Processes No automatically saved previous project to load um Eros 1 Warnings FETU Figure 6 6 window 1 Rev 1 02 TOKYO ELECTRON DEVICE LIMITED inreviun 4 Select SPI Flash Configure Single FPGA and click the rightwards arrow File Formatter Step 1 Storage Device Type Xilinx Flash PROM Non Yolatile FPGA Spartan3AN BPI Flash Configure Single FPGA Configure MultiBoot FPGA Configure from Paralleled PROMs Generic Parallel PROM Description Select Storage Target Configure Single FPGA Step 2 If you targetine any 3rd party supplied SPI PROM select this storage device type Figure 6 7 Add Storage Device s IMPACT window 2 Step 3 FF juraktion Data Files 5 Select 64M Storage Device bits field and click Add Storage Device PROM File Formatter Step Storage Device Type Xilinx Flash PROM El Non Volatile FPGA i amp partan3AM B SPI Flash Configure Single FPGA Configure MultiBoot FPGA El Flash Configure Single FPGA Configure MultiBoot FPGA Configure from Paralleled PROMs Generic
50. v 1 02 TOKYO ELECTRON DEVICE LIMITED 3 inreviun List of Figures Figure 3 1 TB 7Z ISDK block 11 Figure 3 2 External view 12 Figure 4 1 Board dimensions inclusive of wastable substrate 14 Figure 5 1 Power 15 Figure 5 2 Spartan 6 mounting 2 17 Figure 5 3 Spartan 6 Bank Configuration 2 2 2221 18 Figure 5 4 TB 7Z ISDN with TB 7Z IAE 2 20200422 19 Figure 5 5 voltage setting 22 Figure 5 6 DVI TX configuration 23 Figure 5 7 DVI TX MOUNTOO eta iata nada i ada 23 Figure 5 8 CameraLink Base RX configuration diagram 25 Figure 5 9 CameraLink Base 2 2 1 26 Figure 5 10 10 100Mbps Ethernet 2 22 28 Figure 5 11 USB 2 0 30 Figure 5 12 USB 2 0 0 31 Figure 5 13

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