Technical Information Manual
Contents
1. 00103 00 842 3 MUTx 05 Technical Information Manual Revision n 5 7 November 2002 MOD N842 N843 8 16 CHANNEL CONSTANT FRACTION DISCRIMINATOR CAEN will repair or replace any product within the guarantee period if the Guarantor declares that the product is defective due to workmanship or materials and has not been caused by mishandling negligence on behalf of the User accident or any abnormal conditions or operations CAEN declines all responsibility for damages or injuries caused by an improper use of the Modules due to negligence on behalf of the User It is strongly recommended to read thoroughly the CAEN User s Manual before any kind of operation CAEN reserves the right to change partially or entirely the contents of this Manual at any time and without giving any notice Document type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 TABLE OF CONTENTS 1 GENERAT DESCRIPTION erecto 989 09 eese ceca veo vuoi STT 4 ld EUNCTIONAIDESCRIPTION oreet oreet ee reete beue oae et eeu eet de tee ke ve uen a Eee uve aveo eate 4 L2 dau ess aves bts od opi see i ve bel ava teste eleme dit e tete ehe eee ey eode 5 2 TECHNICAL SPECIFICATIONS 6 2 PACKAGING ied ett2. 50 impedance 30 ns minimum FWHM 25 MHz maximum frequency Number of pages Page 14 8 Document type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 5 OUTPUT Mechanical specifications 2 bridged LEMO 00 type connectors Electrical specifications current output 1 mA 20 per hit high impedance 18 ns minimum FWHM 25 MHz maximum frequency 2 5 Other components 2 5 1 Displays The front panel hosts the following LEDs INPUT Type 16 8 red LEDs Function channel selected they light up when the channels are being programmed SEL mode and when they are inhibited LCK mode OR Type 1 green LED Function it lights up if at least one output signal is present 4 DIGIT DISPLAY Type 4 digit red LED display Function it indicates the channels status and programmed parameters values 2 5 2 Front panel switches UPPER SWITCH Function it allows to select the parameter which must be programmed LOWER SWITCH Function it allows to select the channel block which must be programmed SEL mode and to freeze the programmed values LCK mode 2 5 3 Rotary handle Function it allows to set the value of the parameter which is being programmed 2 5 4 Jumpers DELAY JUMPERS Function these 5 position jumpers allow to set the Delay The Delay values range up to 20 ns with 4 ns steps please refer to Fig 2 2 for the jumpe
3. 3 5 SETTING THE THRESHOLD AND DISABLING THE CHANNELS eee eene hene nennen eene hene nennen 13 3 6 SETTING THE OUTPUT PULSE a peri e erre ete erri eain 13 Bile SETTING THE DEAD TIME anas a ret vache a Ga TG GG ES TAG D BE GB NG ES EE TG TG SS AG BE BG IG ENEG TG ERENG a GN E EN NG ES E ada 14 LIST OF FIGURES Fic 1 1 N843 BLOCK DIAGRAM 16 CHANNEL ccssssseceesssceceeseeeecseseeeeceeeecsesaececseneesesseeeecseaaeeecsesaeeesseeeeensaaes 5 FIG 2 1 MOD N843 N842 FRONT PANEL AND BACK PANEL ccccccccccccccccccecececesesesesescsesesesesesesesesesesssesssesesssssseeesesseseees 7 FIG 2 2 JUMPERS LOCATION re eee e eere 10 LIST OF TABLES TABEE2 1 POWER REQUIREMENTS BERE D EDA AGE ERE Pe EA su EE E E ON BOC eae esac 6 TABLE 2 2 TECHNICAL SPECIFICATION TABLE ape a aga ENE e e ese se se EE NS EN EEE EEE esee esee esee esee 11 NPO Filename Number of pages Page 00103 00 842 3 MUTx 05 n842n843_rev5 doc 14 3 Document type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 1 General description 1 1 NPO Functional description The CAEN Model N843 is a 16 CHANNEL CONSTANT FRACTION DISCRIMINATOR housed in a single width NIM module The module accepts 16 ne
4. ates a current proportional to the input multiplicity i e to the number of channels over threshold at a rate of 1 0 mA per hit 50 mV per hit into a 50 Ohm load 20 Filename Number of pages Page 4 00103 00 842 3 MUTx 05 n842n843 rev5 doc 14 Document type User s Manual MUT Title 1 2 Block diagram Mod N842 N843 8 16 Channel Constant Fraction Discriminator Revision date 07 11 2002 8 bit 8 bit 8 bit 8 bit DAC DAC DAC DAC DAC DAC DA DT DT WTH WTH S F DAG 0 7 8 15 0 7 8 15 ch 0 ch 1 ch14 ch 15 THRESHOLDS WIDTH AND DEAD TIME N INPUTS lt 0 15 gt vvv vvv v v v discr discr isses discr discr gt ch 0 ch 1 ch 14 ch 15 TEST i n VETO 4 4 Nyi NA NZ lt Revision 5 DACs TEST INHIBIT W LOGIC inhibit bea 8 7 cpu 3 ANAN INZINZIINZIINZ DISPLAY Fig 1 1 Mod N843 Block Diagram 16 Channel NPO 00103 00 842 3 MUTx 05 Filename n842n843_rev5 doc Number of pages 14 OR LED Page 5 Document type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminato
5. channels each The Mod N843 has two groups Ch 0 1 4 5 8 9 12 18 and Ch 2 3 6 7 10 11 14 15 respectively the Mod N842 has only one group The Upper Switch must be placed on the WDT position and the Lower Switch removed from the LCK position then the group is selected pulling up repeatedly the Lower Switch the selected group s Leds light up all together The width s value is set via the Rotary Handle and shown on the display 0 leads to a 18 ns and 255 to a 318 ns width with a non linear relation for intermediate values the step which follows 255 is Filename Number of pages Page 13 00103 00 842 3 MUTx 05 n842n843 rev5 doc 14 Document type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 3 7 NPO again 0 then 1 2 etc Once the Pulse Widths have been programmed the Lower Switch must be placed on the LCK position and the word LOCK appears on the display Setting the Dead Time It is possible to set a Dead Time value common to a group of 8 channels The Mod N843 has two groups Ch 0 1 4 5 8 9 12 13 and Ch 2 3 6 7 10 11 14 15 respectively the Mod N842 has only one group This prevents the triggering of the discriminator by unwanted pulses occurring within the Dead Time programmed value The Upper Switch must be placed on the DT position and the Lower Switch on the SEL position then the group is selected pulling up re
6. e level they do NOT correspond to the actual level that triggers the discriminator outputs the latter being a constant fraction of the input signals In order to set the threshold the Upper Switch see 2 5 2 must be placed on the THR position and the Lower Switch removed from the LCK position then the channel that must be programmed is selected pulling up repeatedly the Lower Switch the selected channel s Led lights up Note that after the last channel by pulling up the lower switch the Leds ligth up all together and at this point the threshold setting is performed over all the channels this value must be confirmed by placing the Lower Switch on the LCK position otherwise it is ignored The threshold value is set via the front panel Rotary handle see 2 5 3 and shown on the 4 Digit Display 1 leads to a 1mV and 255 to a 255 mV threshold value 1 leads to a 1mV and 255 to 255 mV threshold value the step which follows 255 is four appearing on the display the relevant channel is inhibited then again 0 1 2 etc inhibited channels Leds are always lit when the lower Switch is in lock LCK position Once all the channels thresholds have been set to the desired value the Lower Switch must be placed on the LCK lower position and the word LOCK appears on the display Setting the output pulse width The output pulse width is adjustable on 8 bit from 18 to 318 ns and the chosen value is applied to a group of 8
7. e rettet ede eee teret an dg ad eee tt eec eee ae cation et cete de eed 6 2 25 POWER REQUIREMENTS 4 5 orit Pm eemetit etium aue 6 2 35 FRONT AND BACK PANEL ei ueniet eee e teret ere e SER 7 2 4 INPUT OUTPUT CONNECTIONS 8 2 4 1 INPUT Jeatures T weuetees 8 2 4 2 OUTPUT featur s RE RAD ERE DN aH IE I ua teo 8 OTHER GOMPONENTS Ce eb ec ete bee Pe beet e eb e eee 9 2 94 Displays aso tpe e Renee ete IR deese 9 22 2 Front PANEL SWUCNES 25 ios qe p et arte e det e ee E E 9 2 5 3 Rotary handle e te ae tai d Re E CU b E EO den tete edente 9 2 5 4 MERECE T ste 9 2 6 TECHNICAL SPECIFICATION TABLE 11 3 OPERATING MODES 12 3 1 THE CONSTANT FRACTION DISCRIMINATION TECHNIQUE 12 2 2 POWER ON STATUS RR GUI Ra eT 12 3 37 SETTING THE DELAY y ae ren e hentai eae qiiae i neuem ei aide eiae BES 12 BACK PANEL SIGNALS ete tere eoe ete eee Re eo ee Eee ER ee e olere aque edo 12
8. following subsections and are referred to the Mod N843 the Mod N842 features specified between 2 4 1 INPUT features INPUT CHANNELS VETO INPUT TEST INPUT 2 4 2 OUTPUT features OUTPUT CHANNELS OR OUTPUT NPO Filename 00103 00 842 3 MUTx 05 n842n843_rev5 doc Mechanical specifications 16 8 LEMO 00 type connectors Electrical specifications negative polarity 50 Ohm impedance minimum ratings 5 mV maximum ratings 5 V Mechanical specifications 2 bridged LEMO 00 type connectors Electrical specifications standard NIM signal high impedance 15 ns minimum FWHM leading edge of the VETO signal must precede of at least 10 ns the leading edge of the input and overlap completely the input signal acts on signals Mechanical specifications 2 bridged LEMO 00 type connectors Electrical specifications standard NIM signal high impedance 5 ns minimum FWHM 30 MHz Max frequency Test Output delay 10 ns Mechanical specifications 48 24 32 16 Fan Out of two for OUT and 16 8 single for OUT LEMO 00 connectors Electrical specifications NIM level on 50 Ohm impedance pulse width adjustment from 18 ns to 318 ns maximum time walk is 400 ps for input signals in the range from 50 mV to 5 V with 25 ns rise time Input Output delay 24 ns typical Mechanical specifications 2 LEMO 00 type connectors Fan Out of two Electrical specifications standard NIM signal
9. gative inputs and produces 16 NIM outputs 16 NIM outputs complementary on 48 front panel LEMO 00 connectors NIM outputs are provided with a Fan Out of two a functional block diagram is shown in Fig 1 1 A 8 Channel version the CAEN Model N842 sharing the same functional features with the 16 Channel Model N843 is also available The constant fraction delay is defined by a delay line network of 20 ns with 5 taps see fig 2 2 The timing stage of the discriminator produces an output pulse whose width is adjustable in a range from 18 ns to 318 ns Moreover in order to protect against multiple pulsing it is possible to program a Dead Time during which the discriminator is inhibited from retriggering The maximum time walk is 400 ps for input signals in the range from 50 mV to 5 V with 25 ns rise time The constant fraction is 20 The individual discriminating thresholds are settable in a range from 1 mV to 255 mV 1 mV step via an 8 bit DAC The module can operate also with small below 10 mV input signals though in this case the Constant Fraction operation is not performed i e the jitter is higher The channels threshold output width and dead time can be programmed via two switches and one rotary handle placed on the front panel The back panel houses VETO and TEST inputs the logical OR output the relevant OR LED lights up if at least one channel is over threshold and the Current Sum gt output which gener
10. has to cross the delayed pulse at the selected fraction This condition leads to the following relation Tdelay Tise 1 F where Tdelay selected delay on the Constant Fraction Discriminator Trise rise time of the input signals F Constant Fraction value The Mod N842 N843 Constant Fraction Discriminator features a factory setting of 20 for the fraction and 20 ns for the full scale delay The delay can be selected in 4 ns steps up to 20 ns Power ON Status 3 3 At Power ON the values of all the module s parameters are those programmed before the last turning off If one parameter s value is meaningless the unit sets it at half of its range Setting the delay 3 4 NPO Each channel is provided with a 5 position jumper which allows to set the Delay according to the formula expressed in 3 1 see Fig 2 2 for the jumpers location on board The Delay values range up to 20 ns with a step of 4 ns Factory setting is 20 ns The fraction is a fixed 2096 value Back panel signals Some operations can be performed via two external NIM input signals e TEST an input signal sent through this connector triggers all the enabled channels at once This feature allows a complete test of the module without removing any input cable as well as it allows generation of a pattern of pulses suitable to test any following electronics Filename Number of pages Page 12 00103 00 842 3 MUTx 05 n842n843 rev5 doc 14 Docume
11. nt type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 3 5 3 6 NPO e VETO an input signal sent through this connector allows vetoing of all channels simultaneously A veto pulse of width T will veto the input during this time T Its leading edge must precede the output leading edge by at least 10 ns and overlap completely the input signal VETO does not affect the TEST signal Each one of these high impedance inputs is provided via two bridged connectors for daisy chaining Note that since these are high impedance inputs the chain has thus to be terminated on 50 on the last module the same is needed whenever one module only is used whose inputs have thus to be properly matched Moreover the back panel houses a Current Sum gt output on two bridged connectors which generates a current proportional to the input signal multiplicity i e to the number of channels over threshold at a rate of 1 0 mA per hit 50 mV per hit into a 50 Q load 20 An OR output with a Fan Out of two provides the logical OR of the output channels Setting the threshold and disabling the channels For each channel of the N842 N843 the discriminator threshold is set up via an 8 bit DAC The threshold values can be programmed in a range from 1 mV to 255 mV with 1 mV steps As in all Constant Fraction Discriminators these thresholds must be set above the nois
12. peatedly the Lower Switch the selected group s Leds light up all together The dead time value is set via the Rotary Handle The displayed value corresponds to the Dead Time as follows 255 leads to a 2 us value 0 leads to a 150 ns value with a non linear interpolation for intermediate values the step which follows 255 is again 0 then 1 2 etc Once the Dead Times have been programmed the Lower Switch must be placed on the LCK position and the word LOCK appears on the display Filename Number of pages Page 00103 00 842 3 MUTx 05 n842n843 rev5 doc 14 14
13. r 07 11 2002 5 2 Technical Specifications 2 1 Packaging The Model N842 N843 is housed in a 1U wide NIM unit 2 2 Power requirements The power requirements of the Mod N842 N843 are as follows Table 2 1 Power requirements NPO Filename Number of pages Page 00103 00 842 3 MUTx 05 n842n843_rev5 doc 14 6 Document type User s Manual MUT 2 3 Front and back panel GO GO 0 9 9 WE Ge OO Title o Q 2 2 TOON 5 0 Oo L 9 0 9 o NPO 00103 00 842 3 MUTx 05 3 E o I RF Sm Fig 2 1 Mod N843 N842 front panel and back panel Filename n842n843_rev5 doc cA Mod N842 secHcFD 2 INPUT o 99 o o 99 9 9 9 A N U c i O ey Revision date Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 Revision lt DO 9 Number of pages Page 14 7 Document type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 2 4 Input Output connections The location of the Mod N842 N843 connectors is shown in Fig 2 1 Their function and electromechanical specifications are listed in the
14. rs location on the N842 N843 boards Factory setting is 20 ns NPO Filename Number of pages Page 00103 00 842 3 MUTx 05 n842n843 rev5 doc 14 9 CAE Document type User s Manual MUT Ch7 Ch6 C Title Revision date Revision Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 5 Ch4 Ch3 Ch2 Chi Ch 5 Chi4 Chii Chio Ch7 6 Ch3 Ch2 gg 20 ns 16 5 FRONT N842 NPO 00103 00 842 3 MUTx 05 Filename n842n843 rev5 doc r 12ns 8ns 4ns N843 FRONT Ch1 Cho Ch5 Ch4 Ch9 Ch8 Ch1i3 843 FRONT Fig 2 2 Jumpers location Number of pages 14 Page 10 4 20 ns 8ns 4ns Document type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 2 6 Technical specification table Table 2 2 Technical specification table Features referred to Mod N843 Mod N842 features specified between Packaging 1U wide NIM unit Input channels 16 8 inputs negative polarity 50 Q impedance Threshold range 1 mV to 255 mV 1 mV step O
15. utput channels 32 16 NIM Fan Out of 2 16 8 NIM single 50 impedance Dead Time Programmable from 150 ns to 2 us dispersion 10 Interchannel insulation 50 dB for 2 5 ns rise time input signals 400 ps for input signals in the range from 50 mV to 5 V with 25 ns rise time Output rise fall time OUT 1 2 ns OUT 2 5 ns Max outputs time walk Automatic adjustment to input offset and low frequency input noise of 40 mV VETO IN NIM signal high impedance allows vetoing of all channels simultaneously TEST IN triggers all the enabled channels at once Conirol signals OR OUT standard NIM signal 50 Q impedance logic OR of outputs X OUT current proportional to input multiplicity 1 mA 20 per hit high impedance NPO Filename Number of pages Page 00103 00 842 3 MUTx 05 n842n843 rev5 doc 14 11 Document type Title Revision date Revision User s Manual MUT Mod N842 N843 8 16 Channel Constant Fraction Discriminator 07 11 2002 5 3 Operating Modes 3 1 3 2 The Constant Fraction Discrimination technique The Constant Fraction Discrimination technique is based on summing a delayed full height input signal to an inverted and attenuated signal The resulting signal is fed into a zero crossing comparator thus obtaining a precise timing information that eliminates any walk error induced by constant rise time and varying amplitude signals For correct operation the maximum of the attenuated pulse
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