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Peripheral Driver Generator V.1.04 User`s Manual

1. Icon Description Item No The original setting values are used The program modified the setting values i for 1 The item itself was disabled through the conversion ii for 1 X The original setting values are used The item itself is invalid both in the original and converted project REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 6 1 Peripheral Driver Generator Section 6 Converting a Project 6 3 How to Convert a Project 1 Select File gt Project Convert from the menu to open the Convert dialog box 2 Enter the names of the projects to be converted and newly created and also enter the directory in which the new project is to be stored 3 Select a series group and type No of the CPU into which the original is to be converted from the pull down menu Then click OK Convert source project name Ic renesas PDG_proj default default pd Ref Convert destination project name projectA Directory C renesas PDG_proj project2 Ref M Type of convert destination CPU Series MIeC Tiy Group mecs o SS Type No M3028068 xl ROM capacity 48K 4K byte s RAM capacity x bytefs Cancel Figure 6 3 1 Convert Dialog Box 4 A new project file is created in the specified directory A message dialog box appears telling you that the conversion of the project is completed Converting completed Open new project Figure 6
2. Microcomputer Item Description SH7125 Rising edge Counted at rising edges of the count source Falling edge Counted at falling edges of the count source Both edges Counted at both rising and falling edges of the count source These settings cannot be selected when MP 9 1 is specified as the count source Interruption This item enables detection of interrupt occurrence Select the interrupts to be detected and specify the interrupt priority levels the user created interrupt function specified in lt Interrupt type gt Interrupt function name will be called when an interrupt occurs The interrupt function can be specified by selecting Enable lt interrupt type gt interruption The detectable interrupts depend on the microcomputer type The following explains how to set each item Enable overflow interruption Select the check box to detect occurrence of overflow interrupt The input capture interrupt can be setup for each channel or general register in the channel or general register tab described later lt Interrupt type gt interruption level Specify the priority level for the enabled interrupt type The priority may not be specified depending on the microcomputer or interrupt type lt Interrupt type gt interrupt function name Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function wit
3. ersion Control ZA Launch External Debugger QE Launch Slave HEW Macros Record Macro D Play Macro D Stop Macro Hitachi Call Walker Renesas H Series Librarian Interface Renesas Call Walker Renesas Mapview Debug Find in Files A Macro A Test A Version Control Figure 2 3 2 HEW Tool Menu REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS Peripheral Driver Generator Section 2 Preparation for Using the PDG 4 Click on the Register button Tools Administration Registered components Component Toolchains iy hae Utility Phases Register E Debugger Components E Extension Components E Communication Tools E Help System Tools Unregister Properties Export Search disk Tool information gt Uninstaller I Show all components Current HEW tools database location CAProgram Files Renesas Hew Figure 2 3 3 Tools Administration Dialog Box 5 Select the PDG hrf file in the directory where the PDG is installed By default the directory is C Renesas PDG Select HEW Registration File Look in E PDG gt e aaea chipoll source isre O SrcGenerator lib startup files manual sample O sample bak File name FPDG hit Files of type Hew Registration Files hrf 7 Cancel Figure 2 3 4 Select HEW Registration File Dialog Box REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 2 3
4. 1 Valid only when timer A is selected 2 Valid only when timer B1 is selected REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Up down switching cause Select how to specify the count direction This item may be unselectable depending on the microcomputer type or timer resource Table 4 4 20 shows the settings available for Auto reload function Table 4 4 20 Up down switching cause settings Microcomputer Item Description M16C 62p UDF register The count direction is determined by the UDF register value M16C 28 28B 29 When the UDF register is selected the count direction can be switched by a program counting up or counting down can be selected in Count direction which is described later Input signal to The count direction is determined by external signal TAiOUT TAiOUT pin When a low level is input to the TAiOUT pin the counter counts down when a high level is input the counter counts up 1 Valid only when timer A is selected External event count polarity Select the rising edge falling edge or both edges as the clock edge used for counting when the external signal is selected as the target event This item may be unselectable or the available settings may differ depending on the microcomputer or selected timer resource Control to write to timer This item controls write access to the
5. 5__ SetSerialInterrup t Generated function Boolean __SetSeriallnterrupt_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Set up serial interrupt Parameters Return value RAPI_TRUE is returned 6 __StartSerialReceiving Generated function Boolean __StartSerialReceiving_ Mode _U Resource _p Setting No unsigned char wordNum unsigned int dataBuf Peripheral Module Serial Communication Interface Description Start receiving Parameters wordNum Number of words received dataBuf Pointer to the buffer in which received data is stored Return value If data reception in serial communication was successfully started RAPI_TRUE is returned if failed RAPI_FALSE is returned 7 _ StartSerialSending Generated function Boolean __ StartSerialSending_ Mode _U Resource _p Setting No unsigned char wordNum unsigned int dataBuf Peripheral Module Serial Communication Interface Description Start transmitting Parameters wordNum Number of words transmitted dataBuf Pointer to the transmit data Return value If data transmission in serial communication was successfully started RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 3 Peripheral Driver Generator Section 5 Generated Functions Refere
6. Do not use gate function Underflow interruption priority level i Overflow interruption Overflow interruption function name Count Source Frequency 20 000000 Interrupt D ci renesas PDG_proj default Serial __Openseri c renesas PDG_proj default Serial __CloseSeri clrenesasiPNG nrniidefaulhi Serial ci renesas PDG_proj default Serial __ConfigSer ci renesas PDG_proj default Serial __SetSerialF ci renesas PDG_proj default Serial __SetSeriall c renesas PDG_proj default Serial __StartSeria ci renesas PDG_proj default Serial __StartSeria ci renesas PDG_proj default Serial __StopSerial c renesas PDG_proj default Serial __StopSerial ci renesas PDG_proj default Serial __PollingSeri PallinaSeri Boolean __OpenSerialDriver_async_UO_p1 void Boolean __CloseSerialDriver_async_UO_p1 void Boolean __ConfigSerialDriverNotify_async_UO Boolean __SetSerialFormat_async_UO_p1 void Boolean __SetSerialInterrupt_async_UO_pi void Boolean __StartSerialReceiving_async_UO_pl Boolean __StartSerialSending_async_UO_pi u Boolean __StopSerialReceiving_async_UO_pi Boolean __StopSerialSending_async_U0_pi void Boolean _ PollingSerialReceiving_async_UO_p1 Ranlean PallinnSerialSending asvnr IN nif OpentInitialize the appointed serial Close the appointed serial I F Register the appointed type of notif Change serial setting Set up serial interrupt Start re
7. Item Settings CPU DTC Clock divider selection Select the frequency division ratio for the clock to be supplied to the CPU and the DTC The divided clock is s Input Clock Shows the frequency of os to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Period Shows the period of os to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Peripheral Clock divider selection Leave this item unspecified The clock selected in System clock selection after being divided by the various division ratios are supplied to the peripheral I O modules The clock to be used in each peripheral I O module should be separately specified in each peripheral I O module setting dialog box Input Clock Shows the frequency of the clock selected in System clock selection Period Shows the period of a clock cycle selected in System clock selection REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 23 Peripheral Driver Generator 4 2 Setting Serial Interface Section 4 How to Set up Clocks and Peripheral I O Modules For the serial interface two communication types synchronous and asynchronous types are available Table 4 2 1 shows the communication modes available in the serial communication resources in each microcomputer
8. Description Destroy pulse period measurement mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 8 5 _ GetPulsePeriodMeasurementMode Generated function Boolean __GetPulsePeriodMeasurementMode_Tch Resource _p Setting No unsigned short data Peripheral Module Timer Pulse Period Measurement Mode Description Get the counter value of the timer Parameters data Pointer to a buffer storing the timer counter value Return value If timer counter value is successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned 9 Timer Pulse Wodth Measurement Mode 9 1 _ CreatePulseWidthMeasurementMode Generated function Boolean __ CreatePulseWidthMeasurementMode_Tch Resource _p Setting No void Peripheral Module Timer Pulse Wodth Measurement Mode Description Initialize pulse width measurement mode Parameters Return value If timer was successfully initialized RAPI_TRUE is returned otherwise RAPI_FALSE is returned 9 2 _ EnablePulseWidthMeasurementMode Generated function Boolean __ EnablePulseWidthMeasurementMode_Tch Resource _p Setting No unsigned long data Peripheral Module Timer Pulse Width Measurement Mode Description Pulse width measurement mode operation control Parameters data Operation of the timer Set the following
9. Return value If timer counter value is successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned 10 Timer Input Capture Mode 10 1 CreateInputCapture Generated function Boolean __CreatelnputCapture_Tch Resource _p Setting No void Peripheral Module Timer Input Capture Mode Description Initialize input capture mode Parameters Return value If timer was successfully initialized RAPI_TRUE is returned otherwise RAPI_FALSE is returned 10 2 _ EnableInputCapture Generated function Boolean __ EnablelnputCapture_Tch Resource _p Setting No unsigned long data Peripheral Module Timer Input Capture Mode Description Input capture mode operation control start or stop operation Parameters data Operation of the timer Set the following parameters RAPI_TIMER_ON Starts the timer RAPI_TIMER_OFF Stops the timer Return value If timer is successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned 10 3 DestroyInputCapture Generated function Boolean __DestroylnputCapture_Tch Resource _p Setting No void Peripheral Module Timer Input Capture Mode Description Destroy input capture mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 10 4 DestroyInputCapture ALL Generated function Boolean __ Destr
10. A D Converter Description Initialize A D converter Parameters Return value If A D converter is successfully set RAPI_TRUE is returned if failed RAPI_FALSE is returned 3 2 EnableADC Generated function Boolean __EnableADC_RAPI_ Module _ALL unsinged long data Peripheral Module A D Converter Description Control operation of A D converter Parameters data Start stop operation Set the following parameters RAPI_AD_ON Sets the A D converter to start operation RAPI_AD_OFF Sets the A D converter to stop operation Return value If A D converter is successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned 3 3 DestroyADC Generated function Boolean _DestroyADC_RAPI_ Module _ALL void Peripheral Module A D Converter Description Destroy the settings of the A D converter Parameters Return value If A D converter setting is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 18 Peripheral Driver Generator Section 5 Generated Functions Reference 3 4 _GetADC Generated function Boolean __GetADC_ Mode _RAPI_ Resource _p Setting No unsigned long data1 unsigned short data2 Peripheral Module A D Converter Description Get the A D converted value from a A D register Parameters data1
11. ELC E Modify setting M Modifies settings for ELC setting 1 Only available when a project is opened DTC D Newly create setting N Creates a new setup pattern of DTC 1 Only available when a project is opened Delete setting D Deletes a setup pattern of DTC 1 Only available when DTC setting is selected Modify setting M Modifies settings for DTC setting Only available when DTC setting is selected Display V Toolbar T Displays undisplays the toolbar Newly Create toolbar B Displays undisplays the Create New toolbar Status bar S Displays undisplays the status bar New setting window N Displays undisplays the new setting window Generated file information window F Displays undisplays the generated file information window Character size of the generated file information Changes the character size of the generated file information window C window Selectable from large medium or small Only available when a project is opened Tool T Setting S Sets an editor to open generated files Option O Unsupported Register file in HEW project R Registers generated files in a HEW project Display output function list D Lists output functions in CSV file format Place output function in the latest status P Updates the output function list Window Unsupported W Help H About Peripheral Driver Generator A Shows the ver
12. Input Clock Shows the frequency of the clock selected in System clock selection Period Shows the period of a clock cycle selected in System clock selection REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 3 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 1 2 Setting Clocks for R8C 13 Figure 4 1 2 shows the CPU clock setting dialog box for the R8 13 CPU clock setting System clock selection Main clock x Main clock Use as peripheral function clock source Input frequency to main clock circuit 20 000000 MHz On chip oscillator clock V Use as peripheral function clock source Frequency selection High speed X Frequency adjustment value 4 On chip oscillator frequency 16 393443 MHz Supplied clock to CPU and peripheral 20 000000 MHz CPU Peripheral Clock divider selection Divided by 1 hd Input Clock 20 000000 wiHz Period 50 000000 ps Coree Figure 4 1 2 CPU Clock Setting Dialog Box R8C 13 1 System clock selection Select a clock to be used as the CPU clock The main clock or on chip oscillator clock can be selected The clocks selectable in System clock selection correspond to the clock sources shown in Table 4 1 4 Table 4 1 4 Clock Sources of R8C 13 Item Clock sources Main clock Main Clock Oscillation Circuit On chip oscillator clock On chip Oscillator High speed On Chip Oscillator Low speed O
13. Peripheral Driver Generator 5 2 Table 5 2 shows generated functions for SH Tiny series SH7125 Generated function of for SH Tiny Table 5 2 1 Generated function of for SH Tiny Section 5 Generated Functions Reference No Peripheral Module Generated function name Description 1 1 Serial __CreateSCl Initialize serial communication 1 2 Communication __DestroySCl Close the serial port 1 3 Interface __StartSClReceiving Start reception of serial communication and get received data 1 4 __StartSClSending Start transmission of serial communication and write transmit data to transmit buffer 1 5 __StopSClReceiving Stop reception of serial communication 1 6 __StopSClSending Stop transmission of serial communication 1 7 __PollingSClReceiving Perform reception of serial communication by polling 1 8 __PollingSClSending Perform transmission of serial communication by polling 1 9 __GetSClStatus Get transmit receive information of serial communication 1 10 __ClearSClStatus Clear transmit receive information of serial communication 1 11 __OutputSClSck Control the output of SCK 1 12 __OutputSCITxd Control the output of TXD 2 1 Interrupt __Createlnterrupt Initialize external interrupt 2 2 __Enablelnterrupt Change t
14. System clock selection Main clock x Main clock V Use as peripheral function clock source Input frequency to main clock circuit 20 000000 MHz On chip oscillator clock MV Use as peripheral function clock source Frequency selection High speed X Divider selection Divided by 2 x On chip oscillator frequency 20 000000 wWiHz Supplied clock to CPU and peripheral 20 000000 MHz CPU Peripheral Clock divider selection Divided by 1 ad Input Clock 20 000000 jypy4 gt Period 50 000000 ps cee Figure 4 1 5 CPU Clock Setting Dialog Box R8C 26 29 R8C 2A 2D 1 System clock selection Select a clock to be used as the CPU clock The main clock on chip oscillator clock or sub clock can be selected The clocks selectable in System clock selection correspond to the clock sources shown in Table 4 1 14 Table 4 1 14 Clock Sources of R8C 26 29 R8C 2A 2D Item Clock sources Main clock XIN Clock Oscillation Circuit Sub clock XCIN Clock Oscillation Circuit On chip oscillator clock On chip Oscillator High speed On Chip Oscillator Low speed On Chip Oscillator 2 Each clock setting Make the necessary settings for Main clock Sub clock or On chip oscillator clock selected in System clock selection The CPU clock selected in System clock selection is also used as the peripheral clock Table 4 1 15 shows the clocks that each clock source can supply REJ10J2018 0100
15. The PDG has been confirmed to be capable of operating properly on the host machines under the OS versions listed below Table 1 4 1 Host Machine Host machine OS version IBM PC AT and its Microsoft Windows 2000 compatibles Microsoft Windows XP If the PDG is to be run on any other host machine or under other OS that you are using please consult the manufacturer of your host machine or OS to confirm whether the PDG will operate properly on it The recommended hardware specifications are listed below Table 1 4 2 Recommended Hardware Specifications Sufficient memory capacity for the OS to operate normally is recommended 256 Mbytes or more 70 Mbytes or more 1024 x 768 or greater is recommended Main memory Free disk space Resolution of display REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 1 2 Peripheral Driver Generator Section 1 Overview 1 5 Compiler Combinations The PDG operates normally in combination with the compilers listed below Table 1 5 1 Compiler Package Microcomputer Series Compiler products M16C Tiny M16C 60 R8C Tiny C Compiler Package M3T NC30WA V 5 40 Release 00 for M16C series H8 300H Tiny C C Compiler Package for H8SX H8S H8 family V 6 01 Release 02 SH Tiny C C Compiler Package for SuperH Family V 9 02 Release00 H8S Tiny n C C Compiler Package for H8SX H8S H8 family V 6 02 Release 01 1 6 API Libraries The API libraries packaged in
16. 1 settings H Only available when a project is opened 2 2 channel continuous scan Creates a new setup pattern of 2 channel continuous scan mode 1 mode settings T Only available when a project is opened 2 4 channel scan mode Creates a new setup pattern of 4 channel scan mode settings 1 settings F Only available when a project is opened 2 4 channel continuous scan Creates a new setup pattern of 4 channel continuous scan mode 1 mode settings O Only available when a project is opened 2 Duplicate setting C Duplicates a setup pattern of A D 1 Only available when A D setting is selected Delete setting D Deletes a setup pattern of A D 1 Only available when A D setting is selected Modify setting M Modifies A D settings Only available when A D setting is selected Set input group and pin I Sets an input group and pin for a setup pattern of A D 1 Only available when A D setting is selected Delete input group and pin L Deletes an input group and pin from a setup pattern of A D 1 Only available when an input group and pin are selected V0 D Newly create setting N Creates a new setup pattern of I O 1 Only available when a project is opened Duplicate setting C Duplicates a setup pattern of I O 1 Only available when T O setting is selected Delete setting D Deletes a setup pattern of I O 1 Only available when T O setting is selected Modify setting M Modifies I O settings Only available when T O setting is s
17. Delete UART number L Deletes a UART from a setup pattern of serial 1 Only available when UART is selected A D A Newly Single shot Mode S Creates a new setup pattern of A D single mode 1 create Only available when a project is opened REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 1 7 Peripheral Driver Generator Section 1 Overview Main menu Sub menu Description setting Repeat Mode R Creates a new setup pattern of A D repeat mode 1 N Only available when a project is opened 2 Single Sweep Mode G Creates a new setup pattern of A D single sweep mode 1 Only available when a project is opened 2 Repeat Sweep Mode 0 W Creates a new setup pattern of A D repeat sweep mode 0 1 Only available when a project is opened 2 Repeat Sweep Mode 1 E Creates a new setup pattern of A D repeat sweep mode 1 1 Only available when a project is opened 2 Simultaneous Sampling Sweep Creates a new setup pattern of A D simultaneous sampling sweep Mode P mode 1 Only available when a project is opened 2 Delay Trigger Mode 0 D Creates a new setup pattern of A D delay trigger mode 0 1 Only available when a project is opened 2 Delay Trigger Mode 1 L Creates a new setup pattern of A D delay trigger mode 1 1 Only available when a project is opened 2 2 channel scan mode Creates a new setup pattern of 2 channel scan mode
18. Pulse width measurement mode setting Timer type RA Operation during initialization Operation start lt 2 Count source f1 xl Effective edge of measurement pulse Frequency of count source 20 000000 MHz Measurement between a rising edge and the next falling edge of measured pulse _ v Filter function No digital filter si Input pin Set P1_ for TRAIO pin bs Period 20 ps pp o H Interruption V Enable Underflow interruption Result of calculation The values in this frame are set Interruption priority level lt d Period 20 000000 k Interruption function name TimerlntFunc Error 9 000000 x Setting value Prescaler setting value Timer setting value 1 7 s V Generate batch source M Setting Cancel Figure 4 4 8 Pulse width measurement mode setting dialog box The pulse width measurement mode setting differs from the pulse period measurement mode setting in the following items For the items not described here refer to section 4 4 4 Pluse period measurement mode Effective edge of measurement pulse Select Measurement between a rising edge and the next falling edge of measured pulse or Measurement between a falling edge and the next rising edge of measured pulse as the range of pulse width measurement This item may be unselectable depending on the microcomputer type Table 4 4 40 shows the settings available for Effective edge of measurement pulse Table 4 4 40 Effective edge of measureme
19. Select the transfer data length This item may be unselectable depending on the microcomputer type Table 4 2 10 shows the settings available for Bit number Table 4 2 10 Bit number settings Microcomputer Item Description M16C 62p 7 bits Transfer data is 7 bits long M16C 28 28B 29 8 bits Transfer data is 9 bits long R8C 13 22 29 2A 2D 9 bits Transfer data is 9 bits long H8 3687 36077 36049 36109 7 bits Transfer data is 7 bits long SH7125 H8S 20103 20203 20223 8 bits Transfer data is 8 bits long Stop bit Select the number of stop bits One stop bit or two stop bits can be selected Parity bit Select whether parity is included and whether odd or even Clock polarity selection Leave this item unspecified LSB fist MSB fist selection Select the transfer format This item may be unselectable depending on the microcomputer type Table 4 2 11 shows the settings available for LSB fist MSB fist selection Table 4 2 11 LSB fist MSB fist selection settings Microcomputer Item Description M16C 62p LSB first Selects LSB first as transfer format M16C 28 28B 29 R8C 13 22 29 2A 2D MSB first Selects MSB first as transfer format Selectable when the transfer bit number is set to eight bits Noise canceller Specify whether to use the noise canceller This item may be unselectable depending on the microcomputer type Table 4 2 12 shows the settings available fo
20. Settings CPU Clock divider selection Select the frequency division ratio for the clock to be supplied to the CPU The division ratio cannot be specified when the sub clock is selected as CPU clock because sub clock is not divided by the divider Input Clock Shows the frequency of the clock to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Period Shows the period of a clock cycle to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Peripheral REJ10J2018 0100 Rev 1 00 May 29 2009 Clock divider selection Leave this item unspecified The clock selected in System clock selection after being divided by the various division ratios are supplied to the peripheral I O modules The clock to be used in each peripheral I O module should be separately specified in each peripheral I O module setting dialog box Input Clock Shows the frequency of the clock selected in System clock selection Period Shows the period of a clock cycle selected in System clock selection 7tENESAS 4 10 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 1 5 Setting Clocks for R8C 26 29 R8C 2A 2D Figure 4 1 5 shows the CPU clock setting dialog box for the R8C 26 29 R8C 2A 2D CPU clock setting
21. af peac Transmit interruption level LSB first i LSB first MSB first selection Lbs I Permit receive interruption Reverse data logic Do not reverse Receive interruption level CTS ATS function Do not use CTS ATS function J Permit 1 0 interruption S i io Vel Noise canceller Eo 51 0 interruption level Notification function name j Transmit Receive pins select z Clock pin select E x IV Generate batch sourcefhi ser Cancel Figure 3 4 2 Clock asynchronous SIO mode setting Dialog Box 2 Peripheral Driver Generator default E File E Function U Display v TooK T Wirdow W Help h osamme s 2X BSSBSSES A KEREBSS S EE ER Seiat MEC Pea i T rova oo E E E ie Clock synchronous SIO mode Bit number B bit B Clock asynchronous SIO mode BRG register setting value 129 Em kt Clock polarity selection EJ e Reverse data logic Do not reverse 4 CTS ATS function Do not use CTS ATS function Clock synchronous SIO mode LSB first MSB first selection LSB first Parity bit Parity disable conn Stop bit One stop bit Eoi Clock selection Internal clock _ Clock asynchronous SIO mode e png count Sowce i Notification function name e Transmit interrupt Transmit interrput inhibit Transmit interrupt level 0 li e Receive interrupt Receive interrupt inhibit Recei
22. hewdbv1 dll hewtools hdb HimToHew Details REGISTERSERVER a a MS DOS Batch File Date Modified Thursday October 24 2002 1 27 PM U Size 145 bytes E a a hmake e n e OT 711as dll OTP 1as dll a a Gae regobjs hdb ResPg dll isi sflitas dil sfl201as dll TEMPLATE toolsdb hdb UNREGISTE unregtools yc6 re200I dll Figure 2 4 5 Example of the Directory where the HEW is Installed REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 2 6 Peripheral Driver Generator Section 3 How to Operate the PDG 3 How to Operate the PDG 3 1 Developing an Application with the PDG The PDG generates C source files that contain functions reflecting settings for peripheral I O modules An application that operates peripheral I O modules can be developed by calling functions generated by the PDG The following gives an overview of the application development with the PDG 1 Creating a workspace for the application development in the HEW You will create a workspace for the application to be developed by selecting a menu item such as Create a new project workspace in the HEW 2 Creating a PDG project for driver development You will select a microcomputer and create a project in the PDG 3 Setting peripheral I O modules You will set peripheral I O modules in the created project in the PDG beginning with CPU settings 4 Generating and registering sources in the workspace After setti
23. 0 The main clock on chip oscillator clock or sub clock can be selected The clocks selectable in System clock selection correspond to the clock sources shown in Table 4 1 23 Table 4 1 23 Clock Sources of H8S 20103 H8S 20203 H8S 20223 Item Clock sources Main clock Main clock oscillator Sub clock Sub clock oscillator On chip oscillator clock On chip Oscillator High speed On Chip Oscillator Low speed On Chip Oscillator 2 Each clock setting Make the necessary settings for Main clock Sub clock or On chip oscillator clock selected in System clock selection The CPU DTC clock selected in System clock selection is also used as the peripheral clock Table 4 1 24 shows the clocks that each clock source can supply REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 20 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 1 24 Clocks each clock source can supply H8S 20103 H8S 20203 H8S 20223 Clock source Clocks Main clock CPU DTC clock os Peripheral clock o 81 92 Sub clock CPU DTC clock os Peripheral clock 8192 dsub On chip oscillator High speed CPU DTC clock os Peripheral clock o 8192 640 clock Low speed CPU DTC clock os Peripheral clock 0 8192 When it is necessary to use another clock in addition to those supplied by the clock source selected in System clock selection
24. 1 output at compare TIOCij 4 initial output value is 0 1 output at compare match 3 match Initial output is 0 Toggle output at compare TIOCij 4 initial output value is 0 Toggle output at match 3 compare match Initial output is 1 O output at compare TIOCij 4 initial output value is 1 0 output at compare match 3 match Initial output is 1 1 output at compare TIOCij 4 initial output value is 1 1 output at compare match 3 match Initial output is 1 Toggle output at compare TIOCij 4 initial output value is 1 Toggle output at match 3 compare match H8S 20103 Pulse is output Uses TRAO pin for input output port H8S 20203 Pulse is not output Uses TRAO pin for pulse output H8S 20223 1 Valid only when timer A is selected 2 Valid only when any of channel 0 to 4 is selected 3 Selectable when periodic is selected as operation 4 i 0 to 4 j A to D Auto reload function Specify whether to use the auto reload function This item may be unselectable depending on the microcomputer type Table 4 4 19 shows the settings available for Auto reload function Table 4 4 19 Auto reload function settings Microcomputer Item Description M16C 62p 1 Do not use The counter does not reload the reload register value M16C 28 28B 29 1 when it overflows or underflows H8 3687 36077 36049 36109 Use The counter reloads the reload register value when it 2 overflows or underflows and then it continues counting
25. Creates a new setup pattern of timer output compare mode When a project is opened New external interrupt setup creation Creates a new setup pattern of external interrupt When a project is opened ELC setting Modifies settings for a ELC When a project is opened New DTC setup creation Creates a new setup pattern of DTC When a project is opened This item may be unselectable depending on the microcomputer type REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Peripheral Driver Generator Section 2 Preparation for Using the PDG 2 Preparation for Using the PDG You will install the PDG and specify an editor to be used via the PDG and other settings necessary for the PDG to collaborate with the HEW Note that screen images of the HEW may differ depending on the version you are using 2 1 Installing the PDG After the installer launches follow the instructions to install the PDG with administrator right Peripheral Driver Generator InstallShield Wizard Welcome to the InstallShield Wizard for Peripheral Driver Generator The InstallShield Wizard will install Peripheral Driver Generator on your computer To continue click Next Cancel Figure 2 1 1 Installer after Launched 2 2 Setting an Editor Any editor can be used to open generated source files in a project on the generated file information window 1 Select Tool gt Setting from the menu to
26. Description Polling transmission Parameters Return value Out of the transmit data counts requested the number of untransmitted data is returned 2 Interrupt 2 1 SetInterrupt Generated function Boolean __ Setlnterrupt_I Resource _p Setting No void Peripheral Module Interrupt Description Set up external interrupt Parameters Return value RAPI_TRUE is returned 2 2 _ EnablelInterrupt Generated function Boolean __ Enablelnterrupt_I Resource _p Setting No void Peripheral Module Interrupt Description Control external interrupt enable Parameters Return value RAPI_TRUE is returned 2 3 _ DisableInterrupt Generated function Boolean __Disablelnterrupt_l Resource _p Setting No void Peripheral Module Interrupt Description Control external interrupt disable Parameters Return value RAPI_TRUE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 5 4 Peripheral Driver Generator 2 4 __GetInterruptFlag Section 5 Generated Functions Reference Generated function Boolean __ GetlnterruptFlag_I Resource _p Setting No unsigned int data Peripheral Module Interrupt Description Get the external interrupt flag status Parameters Data Pointer to the buffer in which the acquired flag data is stored Return value RAPI
27. Peripheral Driver Generator Section 2 Preparation for Using the PDG 6 Make sure that the PDG is registered in System Tools in the Tools Administration dialog box Tools Administration Registered components Component E Toolchains E System Tools lis Call Walker gH Series Librarian Interface Mapvie T 1 02 000 y Phase 9 Debugger Components E Extension Components E Communication Tools Help System Tools I Show all components Current HEW tools database location CAProgram Files Renesas Hew Figure 2 3 5 Tools Administration Dialog Box 7 Click OK to close the Tools Administration dialog box 2 4 Setting HewTargetServer In order to register sources generated by the PDG in the HEW HewTargetServer in the HEW requires to be set properly Set HewTargetServer as follows 1 Select Administration from the tool menu 2 Make sure that the HewTargetServer version is 1 05 00 in Extension Components When earlier version than 1 05 00 is shown select HewTargetServer and click Unregister to unregister it Tools Administration Registered components OK Component j ea J Toolchains System Tools Utility Phases Debugger Components Extension Components Difference ECX Register Properties 1 04 00 Sais Search disk Tool information Uninstaller I Show all components Current HEW tools database location CAProgram Files Renesas
28. Source side or Destination side can be selected Transfer size Select the size of data to be transferred Byte size or Word size can be selected Block size counter Specify the size of blocks in block transfer mode The size of blocks from 0 to 255 can be set Transfer counter Specify the number of times that data is to be transferred by the DTC Table 4 7 3 shows the settings available for Transfer counter Table 4 7 4 Transfer counter settings Transfer mode The range of setting Normal mode 0 to 65535 Repeat mode 0 to 255 Block transfer mode 0 to 65535 Interrupt select Select CPU interrupts be requested When transfer counter is 0 or After every transfer completion can be selected In repeat mode the transfer counter value does not reach H 00 When transfer counter is 0 cannot be selected Interrupt function name When you use software to activate the DTC specify a function to be called on generation of a data transfer end request interrupt on the Transfer pattern 1 page When using an interrupt notification function add to the user program the function with the name specified here The declaration of the interrupt function is as follows Function Declaration void specified notification function name void Chain transfer enable When the checkbox is selected the next set of register information will be saved at the address which follows the address specified for Sta
29. Table 4 2 1 Serial Communication Resources in Each CPU Microcomputer Group Serial Communication Resources Communication Type M16C 62p UARTI i 0 to 2 Synchronous Asynchronous SI 03 S1 04 Synchronous M16C 28 28B 29 UARTI i 0 to 2 Synchronous Asynchronous SI 03 S1 04 Synchronous R8C 13 22 23 28 29 UARTO Synchronous Asynchronous UART1 Asynchronous R8C 24 27 UARTO Synchronous Asynchronous UART1 Synchronous Asynchronous R8C 2A 2D UART i 0 to 2 Synchronous Asynchronous H8 3687 36077 SCI3 Channel 1 Synchronous Asynchronous SCI3 Channel 2 Synchronous Asynchronous H8 36049 36109 SCI3 Channel 1 Synchronous Asynchronous SCI3 Channel 2 Synchronous Asynchronous SCI3 Channel 3 Synchronous Asynchronous SH7125 Channel 0 2 Synchronous Asynchronous H8S 20103 20203 SCI3 Channel 1 Synchronous Asynchronous 20223 SCI3 Channel 2 Synchronous Asynchronous SCI3 Channel 3 Synchronous Asynchronous The following explains how to set each communication mode REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 24 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 2 1 Synchronous Serial Communication Interface Figure 4 2 1 shows the Clock synchronous SIO mode setting dialog box Clock synchronous SIO mode setting Serial port UARTO X Bit rate register Clock selection Internal clock Bit rate register settings 129
30. Timer Pulse Period Measurement Mode 8 1 CreatePulsePeriodMeasurementMode Section 5 Generated Functions Reference Generated function Boolean __ CreatePulsePeriodMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Period Measurement Mode Description Create pulse period measurement mode setting Parameters Return value RAPI_TRUE is returned 8 2 _ EnablePulsePeri odMeasurementMode Generated function Boolean __ EnablePulsePeriodMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Period Measurement Mode Description Pulse period measurement mode operation control Operation start Parameters Return value RAPI_TRUE is returned 8 3 _ DisablePulsePer iodMeasurementMode Generated function Boolean __DisablePulsePeriodMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Period Measurement Mode Description Pulse period measurement mode operation control Operation stop Parameters Return value RAPI_TRUE is returned 8 4 _DestroyPulsePeriodMeasurementMode Generated function Boolean __ DestroyPulsePeriodMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Period Measurement Mode Description Destroy pulse period measurement mode Parameters Return value RAPI_TRUE is returned 8
31. ad File E Function U Display Toot Cee Se He SSF YS amp Timer M16C 28 1 mode B T Setting i amp Timer type A1 ia Timer setting value 399 B Ps Event counter mode T Setting Timer mode amp Timer type AQ a Timer setting value 12 B rast Pulse width modulation mode T Setting Event counter mode a amp Timer type A1 Timer setting value high order bit Timer setting value low order bit Pulse period measurement mode Pulse width modulation mode Setting bed Timer type BO Pulse width measurement mode Setting x amp Timer type BO Pulse period measurement Input capture mode mode B T Setting 170 BR Timer tuner S Timer count source Period 20 000000 Operation During initialization Operation start Underflow interruption Underflow interruption function name Underflow interruption priority level 0 Overflow interruption Overflow interruption function name Overflow interruption priority level Timer output Pulse is output Clock output function Auto reload function _ Control to write to timer Gate function Do not use gate function Count Source Frequency 20 000000 4 Interrupt em eis Sourcefilename O O o Generated function name Functional explanetion of Functions ci renesas PDG_proj default Serial __Openseri Boolean __OpenSerialDriver_async_UO_pi void cijrenesas PDG_proj de
32. generated at the end of the secondary period can be detected H8 3687 36049 36077 36109 Timer V generates pulses with a desired duty cycle by controlling the output through a compare match between time constant registers A and B and the counter The values of timer constant registers A and B are automatically calculated from the specified period and duty Time constant register B is always used as the period setting register in this mode Compare match interrupts CMFB and CMFA generated by time constant registers A and B can be detected SH7125 The timer outputs PWM waveforms from output pins in the PWM mode in the SH7125 A maximum of 8 phase PWM waveforms in the range of 0 to 100 duty can be generated by selecting the output level as 0 1 or toggle output in response to a compare match of each TGR The settings in the pulse width modulation mode dialog box differ between the SH7125 and other microcomputers the following describes each dialog box separately REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 50 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 1 SH7125 Table 4 4 3 shows the Pulse width modulation mode setting dialog box for SH7125 Pulse width modulation mode setting Timer type 0 a Counter clear function Clears by GRA compare match 3 Channel used Pwm mode selection Mode 2 zl V GRA V GRB V GRC V GRD Count source MPF pi GRA GAB arc GRD
33. select the Use as peripheral function clock source check box for that additional clock and make the necessary settings Table 4 1 25 shows the available combinations of clock sources for the CPU DTC and peripheral functions Table 4 1 25 Combinations of Clock Sources for CPU DTC and Peripheral Functions H8S 20103 H8S 20203 H8S 20223 CPU DTC clock os Peripheral clock 0 8192 osub 40 Main clock Main clock Sub clock On chip oscillator clock On chip oscillator clock On chip oscillator clock Sub clock On chip oscillator clock Sub clock Sub clock Sub clock On chip oscillator clock Main clock Make settings for this item when the main clock is selected in System clock selection Use as peripheral function clock source This check box is always selected automatically when the main clock is used as source of system operation clock in System clock selection Input frequency to main clock circle Specify the frequency of the main clock The division ratio for the system clock frequency which determines the frequency of the system operation clock 6 should be selected in the system clock setting which is described later On chip oscillator clock Make settings for this item when the on chip oscillator clock is selected in System clock selection or when 40 is used as the timer clock source REJ10J2018 0100 Rev 1 00 May 29 2009 Use as peripheral function clock source This c
34. 1 9 GetSCIStatus Generated function Boolean __GetSClStatus_ Mode _U Resource _p Setting No unsigned long data unsigned char status Peripheral Module Serial Communication Interface Description Get transmit receive information of serial communication Parameters data Flags to be acquired Set the following parameters To set multiple parameters at the same time use the symbol to separate each specified parameter RAPI_TDRE Transmit data register empty flag RAPI_RDPF Receive data register full flag RAPI_ORER Overrun error flag RAPI_FER Framing error flag RAPI_PER Parity error flag RAPI_TEND Transmit end flag RAPI_MPB Multiprocessor bit flag for reception RAPI_MPBT Multiprocessor bit flag for transmission RAPI_RECV_ERROR All receive error flags Overrun framing and parity errors RAPI_ALL_FLAG All status flags of SCI status Byte address to store the receive error flag Return value RAPI_TRUE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 16 Peripheral Driver Generator 1 10 ClearSCIStatus Section 5 Generated Functions Reference Generated function Boolean __ClearSCIStatus_ Mode _U Resource _p Setting No unsigned long data Peripheral Module Serial Communication Interface Description Clear transmit receive information of serial communication Parameters data Flags to be cleared Set the following
35. 1 are independently specifiable An ADI interrupt request can be generated either on completion of group 0 or group 1 or on completion of both groups Upon completion of conversion for the input pins in the selected group the A D converter enters the idle state e 2 channel continuous scan mode A D conversion continues even after conversion is completed in groups 0 and 1 in 2 channel scan mode e 4 channel scan mode In the SH7125 A D conversion is done selectively for one to four analog input channels in A D module 0 the ANO to AN3 pins or A D module 1 the AN4 to AN7 pins in the ascending order of pin number The results of A D conversion are sequentially transferred to the A D data register corresponding to the channel When conversion of all the selected channels is completed the A D converter generates an ADI interrupt request and enters the idle state e 4 channel continuous scan mode As in 4 channel scan mode A D conversion is done selectively for a maximum of four analog input channels in the ascending order of pin number When conversion of all the selected channels is completed the A D converter generates an ADI interrupt request and restarts A D conversion from channel 1 REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS 4 86 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 6 1 show the available operating modes in each microcomputer Table 4 6 1 Available operating modes in each mi
36. 3 2 Message Telling Completion of Project Conversion PDG REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 6 2 Peripheral Driver Generator Section 6 Converting a Project 5 Clicking on Yes opens the created project file 6 Some of the settings may be disabled or may require to be modified depending on the CPU and other settings for the original project Open setup pattern display window of each peripheral I O module to check the setting details 4 Peripheral Driver Generator HB3687 fe File E Function U Display v Tool T Window Help H DER pDeunmmnmal s 2X SGSSSREE8 T SE ESRSS S x CPU H8 3687 Ta Setting B lt 4 Divide ratio of on chip oscillator System clock frequency MHz Berm Seting vale 20 000000 Selection of on chip oscillator frequency CPU main clock divider selection Divided by 1 CPU setting Selection of PLL multiplier Periodic value Sub clock Used Sub clock dividing ratio Divided by 2 Input frequency to sub clock oscillation circuit 0 032768 System clock selection Main clock Main clock Used Input frequency to main clock oscillation circuit 20 000000 On chip oscillater clock PLL clock Input frequency to PLL circuit On chip oscillator frequency PLL frequency Sub clock frequency 0 016384 Interrupt Timer mode Relatec Figure 6 3 3 Example of D
37. 36109 Section 5 Generated Functions Reference Table 5 1 1 Generated function of for M16C 60 M16C Tiny R8C Tiny and H8 300H Tiny No Peripheral Module Generated function name Description 1 1 Serial Communication __ OpenSerialDriver Open Initialize the appointed serial I F setting 1 2 Interface ___CloseSerialDriver Close the appointed serial I F 1 3 __ConfigSerialDriverNotify Register the appointed type of notify function with driver 1 4 __SetSerialFormat Change serial setting 1 5 __SetSeriallnterrupt Set up serial interrupt 1 6 __StartSerialReceiving Start receiving 1 7 __ StartSerialSending Start transmitting 1 8 __StopSerialReceiving Stop receiving 1 9 __StopSerialSending Stop transmitting 1 10 __PollingSerialReceiving Polling reception 1 11 __PollingSerialSending Polling transmission 2 1 Interrupt __ Setlnterrupt Set up external interrupt 2 2 ___Enablelnterrupt Control external interrupt enable 2 3 __ Disablelnterrupt Control external interrupt disable 2 4 __ GetlnterruptFlag Get the external interrupt flag status 2 5 __ClearlnterruptFlag Clear the external interrupt flag 3 1 A D Converter __CreateADC Create A D converter setting 3 2 __EnableADC Control A D converter operat
38. 4 Peripheral Driver Generator Section 1 Overview 1 7 2 New Setup Pattern Creation Window When a project file is opened buttons in this window are enabled Selecting a function and then clicking on a mode button opens a function setup dialog box that enables user to create a new setup pattern 44 Peripheral Driver Generat E File E Function L Display v default Tool T Win Help H Timer mode Event counter mode Pulse width modulation mode Pulse period measurement mode Ivo 3 Timer M16C 28 Timer mode B T Setting bcd Timer type 41 ray Timer setting value 399 B Event counter mode B T Setting B kesed Timer type AQ aa Timer setting value 12 B g Pulse width modulation mode Ta Setting 2 Timer type A1 R Timer setting value high order bit Timer setting value low order bit Pulse period measurement mode Ta Setting 2 Timer type BO Z Pulse width measurement mode Ta Setting 2 Timer type BO Eg Input capture mode Z Setting ER Timer tune S Timer count source fl Period 20 000000 Operation During initialization Operation start Underflow interruption Underflow interruption disa Underflow interruption function name 0 Overflow interruption priority level Timer output Pulse is output Clock output function Auto reload function Control to write to timer Gate function
39. 5 _ GetPulsePeriodMeasurementMode Generated function Boolean __GetPulsePeriodMeasurementMode_T Resource _p Setting No unsigned int data Peripheral Module Timer Pulse Period Measurement Mode Description Get pulse period measurement mode measured value Parameters data Pointer to the buffer in which counter value is stored Return value RAPI_TRUE is returned 9 Timer Pulse Width 9 1 _ CreatePulseWidthMeasurementMode Measurement Mode Generated function Boolean __ CreatePulseWidthMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Measurement Mode Description Create pulse width measurement mode setting Parameters Return value RAPI_TRUE is returned 9 2 _ EnablePulseWidthMeasurementMode Generated function Boolean __ EnablePulseWidthMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Measurement Mode Description Pulse width measurement mode operation control Operation start Parameters Return value RAPI_TRUE is returned 9 3 _ DisablePulseWidthMeasurementMode Generated function Boolean __ DisablePulseWidthMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Measurement Mode Description Pulse width measurement mode operation control Operation stop Parameters Return value RAP
40. A D register to get the value Set the following parameters To set multiple parameters at the same time use the symbol to separate each specified parameter RAPI_ADDRO A D data register 0 RAPI_ADDR1 A D data register 1 RAPI_ADDR2 A D data register 2 RAPI_ADDR3 A D data register 3 RAPI_ADDR4 A D data register 4 RAPI_ADDR amp 5 A D data register 5 RAPI_ADDRE6 A D data register 6 RAPI_ADDR7 A D data register 7 RAPI_ADDR_ALL All values in the A D data registers 0 to 7 data2 Pointer to the buffer in which A D converted value is stored After A D conversion the converted value is right aligned while that is left aligned in the A D data register Return value If A D converted value is successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned 3 5 _GetADCFlag Generated function Boolean __GetADCFlag_RAPI_ Module _ALL unsigned char status Peripheral Module A D Converter Description Get status of the A D converter Parameters Status Pointer to the buffer in which the register content indicating A D converter status is stored Return value If A D converter status flag is successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned 3 6 _ ClearADCFlag Generated function Boolean __ClearADCFlag_RAPI_ Module _ALL void Peripheral Module A D Converter Description Clear status flag of the A D converter Parameter
41. Always available Save Project As A Saves the currently opened project under a new name Always available Project Convert C Converts an existing project into a new project with a different CPU Only available when a project is opened 2 Generate Sources Collectively S Generates source files Available when peripheral I O settings are completed Delete Sources Collectively D Deletes all the generated files Available after source generation is performed History Lists projects that were opened Always available Exit X Exits the PDG Always available Function CPU C Modify setting M Modifies settings for a CPU U Only available when a project is opened Serial Newly Synchronous S Creates a new setup pattern of serial synchronous 1 S create Only available when a project is opened setting Asynchronous A Creates a new setup pattern of serial asynchronous 1 N Only available when a project is opened Duplicate setting C Duplicates a setup pattern of serial 1 Only available when serial setting is selected Delete setting D Deletes a setup pattern of serial 1 Only available when serial setting is selected Modify setting M Modifies serial settings Only available when serial setting is selected Set UART number S Sets a UART for a setup pattern of serial 1 Only available when serial setting is selected
42. BO Pulse width measurement mode Setting 8 Timer type BO Input capture mode B Ta Setting BR Timer tune S amp o Timer count source f Period 20 000000 Operation During initialization Operation start Underflow interruption Undertlow interruption disa Underflow interruption function name 0 Overflow interruption priority level Timer output Pulse is output Clock output function Auto reload function Control to write to timer Gate function Do not use gate function Underflow interruption priority level Overflow interruption Overflow interruption function name Count Source Frequency 20 000000 Interrupt u Erea FYE doseSeri ci renesas PDG_proj default Serial __ConfigSer ci renesas PDG_proj default Serial __SetSerialF cijrenesas PDG_proj default Serial __SetSerial cijrenesas PDG_proj default Serial __StartSeri ci renesas PDG_proj default Serial __StartSeri cijrenesas PDG_proj default Serial __StopSerial ci renesas PDG_proj default Serial __StopSerial cijrenesas PDG_proj default Serial __PollingSe cilrenesasiPNG neniidefanitiSeriall PollinnSeri Boolean __OpenSerialDriver_async_UO_p1 void Boolean __CloseSerialDriver_async_U0_p1 void Boolean __ConfigSerialDriverNotify_async_UO Boolean __SetSerialFormat_async_UO_p1 void Boolean __SetSerialInterrupt_async_U0O_
43. BO underflow These settings can be selected only in simultaneous sample Timer B2 interrupt sweep mode Set up the corresponding timer to use one of these Timer B2 interrupt settings generation frequency setting counter underflow R8C 22 25 Timer RD Complementary Conversion is started by a timer RD interrupt R8C 2A 2D PWM mode H8 3687 36077 Hardware trigger Conversion is started by the input to the ADTRG pin The rising or falling edge can be selected in Trigger polarity which is described later SH7125 External trigger input Conversion is started by the input to the external trigger pin ADTRG TRGAN Conversion is started by a TRGA input capture or compare match in an MTU2 channel or a TCNT_4 underflow in complementary PWM mode in the MTU2 TRGON Conversion is started by a compare match TRGON in channel 0 of the MTU2 TRG4AN Conversion is started by the A D conversion start delayed signal TRG4AN from the MTU2 TRG4BN Conversion is started by the A D conversion start delayed signal TRG4BN from the MTU2 H8S 20103 Conversion start trigger A compare match interrupt generated by timer RC is the trigger from timer RC to start A D conversion A D conversion started by timer RC must be enabled in advance Conversion start trigger A compare match interrupt generated by timer RDO or RD1 is the from timer RD_O trigger to start A D conversion A D conversion started by timer RDO or RD1 must b
44. Clock source selection f8 od Bit Rate 3600 bps Set details Interrupt enable Clock polarity selection No clock polarity reversed z 7 Permit transmit interruption Zi Transmit interruption level rae selection LSB first Permit receive interruption CTS ATS function Do not use CTS ATS function z J5 r Interrupt function name SerialNotificationFunc V Generate batch source M Cancel Figure 4 2 1 Clock synchronous SIO mode setting dialog box The following explains how to set each items Serial port Select the serial communication interface resource to be set up Selecting No setting allows the interface setting to be made with no resource being selected here and any resource can be assigned to the setting Note that No setting is not available for the SH7125 or H8S Tiny Clock selection Select the internal clock or external clock for the transfer clock Stop bit Leave this item unspecified Parity bit Leave this item unspecified Clock polarity selection Select the polarity of the transfer clock This item may be unselectable depending on the microcomputer type Table 4 2 2 shows the settings available for Clock polarity selection Table 4 2 2 Clock polarity selection settings ucrecgmputer Item Description Group M16C 62p No clock polarity reversed Transmit data is output at falling edge of transfer M16C 28 28B 29 clock and receive data is input at rising edge R
45. Clock sources Main clock External clock oscillator On chip oscillator clock On chip Oscillator 2 Each clock setting Make the necessary settings for the clock selected in System clock selection and the sub clock Main clock Specify the frequency of bOSC when the main clock is selected in System clock selection e Use as peripheral function clock source System clock works as the basic clock necessary for the CPU and peripheral functions to operate This check box is always selected automatically when the main clock is selected as the source of system clock in System clock selection e Input frequency to main clock circle Specify the frequency of the main clock OSC The division ratio for the system clock frequency which determines the frequency of the system clock 0 should be selected in the system clock setting which is described later REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 16 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules On chip oscillator clock Make settings for the frequency of ORC when the on chip oscillator clock is selected in System clock selection e Use as peripheral function clock source System clock works as the basic clock necessary for the CPU and peripheral functions to operate This check box is always selected automatically when the on chip oscillator clock is selected as the source of system clock in System clock selection Fre
46. D end flag when using the H8S or H8 300H in the first low order bit of status When used in the M16C specify the value of A D conversion status register 0 in the 8 high order bits of status Write 0 to the bits to be cleared and 1 to the bits that do not need to be cleared Return value If A D converter status flag was successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 4 I O Port 4 1 SetlOPort Generated function Boolean ___SetlOPort_ Port _ Pin No _p Setting No void Peripheral Module I O Port Description Create I O ports setting Parameters Return value RAPI_TRUE is returned Remarks This function is not generated for RB pin in H8 3687 36049 36077 RF pin in H8 36109 P85 pin in M16C 62P P46 47 pin in R8C 13 2A 2D and P42 46 47 pin in R8C 22 29 4 2 ReadIOPort Generated function Boolean __ ReadlOPort_ Port _ Pin No _p Setting No unsigned int data Peripheral Module I O Port Description Read data from I O ports Parameters data Pointer to the variable in which the value read from I O port is stored Return value RAPI_TRUE is returned 4 3 WritelOPort Generated function Boolean __WritelOPort_ Port _ Pin No _p Setting No unsigned int data Peripheral Module I O Port Description Write data to I O ports Parameters data Data to be written to I O port Return value R
47. Input frequency to main clock circuit 20 000000 MHz On chip oscillator clock IV Use as peripheral function clock source Frequency selection High speed Divider selection Divided by 2 hd On chip oscillator frequency 20 000000 MHz Supplied clock to CPU and peripheral 20 000000 MHz n 4 CPU Peripheral Sub clock V Use as peripheral function clock source Clock divider selection Divided by 1 X Input frequency to sub clock circuit 0 032768 MHz Divider selection Divided by 1 X iod 50 000000 Sub clock madu A n cne Figure 4 1 4 CPU Clock Setting Dialog Box R8C 24 25 Input Clock 20 000000 iHz 1 System clock selection Select a clock to be used as the CPU clock The main clock on chip oscillator clock or sub clock can be selected The clocks selectable in System clock selection correspond to the clock sources shown in Table 4 1 10 Table 4 1 10 Clock Sources of R8C 24 25 Item Clock sources Main clock XIN Clock Oscillation Circuit Sub clock XCIN Clock Oscillation Circuit On chip oscillator clock On chip Oscillator High speed On Chip Oscillator Low speed On Chip Oscillator 2 Each clock setting Make the necessary settings for Main clock Sub clock or On chip oscillator clock selected in System clock selection The CPU clock selected in System clock selection is also used as the peripheral clock Table 4 1 11 shows the clocks that each clock sourc
48. Input frequency to sub clock circuit 0 032768 MHz Divider selection Divided by 2 v iod 50 000000 Sub clock 0 016384 MHz Period a cme Input Clock 20 000000 iHz Figure 4 1 6 CPU Clock Setting Dialog Box H8 3687 H8 36049 1 System clock selection Select a clock to be used as the CPU clock Only main clock can be selected 2 Each clock setting Make the clock settings for Main clock and Sub clock These clocks correspond to the clock sources shown in Table 4 1 18 Table 4 1 18 Clock Sources of H8 3687 H8 36049 Item Clock sources Main clock System clock oscillator Sub clock Sub clock oscillator Main clock Specify the frequency of main clock OSC e Use as peripheral function clock source Main clock works as the basic clock necessary for the CPU and peripheral functions to operate This check box is always selected automatically e Input frequency to main clock circle Specify the frequency of the main clock OSC The division ratio for the system clock frequency which determines the frequency of the system clock 0 should be selected in the system clock setting which is described later REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 14 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Sub clock Specify the frequency of sub clock SUB e Use as peripheral function clock source Sub clock works as the basic clock necessary
49. Leave this item unspecified Auto reload function Specify whether to use the auto reload function This item may be unselectable depending on the microcomputer type Table 4 4 9 shows the settings available for Auto reload function Table 4 4 9 Auto reload function settings Microcomputer Item Description H8 3687 Do not use The timer works as an interval timer The counter starts counting up from H8 36077 0 The overflow interval is determined by the frequency of the count PEARa source The actual overflow interval differs from the value specified in H8 36109 l Period Use The timer works as an auto reload timer The load register is set to a value optimum for the specified period and the counter overflows at the intervals shown in Result of calculation Period Control to write to timer Set up the timer write control This item may be unselectable depending on the microcomputer type Table 4 4 10 shows the settings available for Control to write to timer Table 4 4 10 Control to write to timer settings Microcomputer Item Description R8C 13 1 Write only reload register When writing to the prescaler or timer value is written to R8C 22 29 A the reload register only eens Write to both reload When writing to the prescaler or timer values are written register and counter to both the reload register and counter H8S 20103 Write to both reload When writing to the p
50. Modules Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS 4 42 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 4 2 Event Counter Mode Table 4 4 13 shows the timer resources that can be set to the event counter mode in each microcomputer Table 4 4 13 Timer Resources Supporting Event Counter Mode in Each Microcomputer Series Group Timer resources N16C 60 M16C 62p AO 4 BO 5 M16C Tiny M16C 28 28B 29 AO 4 BO 2 R8C Tiny R8C 13 X Y R8C 22 29 2A 2D RA H8 300H Tiny H8 3687 36077 36049 36109 B1 V SH Tiny SH7125 Channel 0 4 H8S Tiny H8S 20103 20203 20223 RA The following gives an overview of the event counter mode settings for each microcomputer M16C 62P M16C 28 28B 29 The counter in timer A or B counts the overflows or underflows in other timers or specified edges of the external signal Timer A can be set to an up counter or a down counter An interrupt occurs when the counter underflows or overflows It can be selected whether the reload register value is loaded to the counter at an overflow or an underflow A desired value can be specified as the reload register value For timer B underflow interrup
51. RAPI_TGFA Input capture Output compare flag A RAPI_TGFB Input capture Output compare flag B RAPI_TGFC Input capture Output compare flag C RAPI_TGFD Input capture Output compare flag D RAPI_TCEFD Count direction flag RAPI_TCFV Overflow flag RAPI_TCFU Underflow flag RAPI_TGFE Compare match flag E RAPI_TGFF Compare match flag F RAPI_CMF Compare match Input capture flag data2 Pointer to the buffer in which counter flag value is stored Return value If the status is successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 24 Peripheral Driver Generator Section 5 Generated Functions Reference 11 6 ClearTimerFlag Generated function Boolean __ClearTimerFlag_Tch Resource _p Setting No unsigned long data Peripheral Module Timer Output Compare Mode Description Clear the flag of timer Parameters data1 Status flags to be cleared Set the following parameters To set multiple parameters at the same time use the symbol to separate each specified parameter RAPI_TGFA Input capture Output compare flag A RAPI_TGEFB Input capture Output compare flag B RAPI_TGFC Input capture Output compare flag C RAPI_TGFD Input capture Output compare flag D RAPI_TCFV Overflow flag RAPI_TCFU Underflow flag RAPI_TGFE Compare match flag E RAPI_TGFF Compare match flag F RAPI_CMF Compare match Input capture fl
52. Rev 1 00 May 29 2009 RENESAS 4 11 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 1 15 Clocks each clock source can supply R8C 26 29 R8C 2A 2D Clock source Clocks Main clock CPU clock Peripheral clock f1 f32 Sub clock CPU clock Peripheral clock f1 f32 fC4 fC32 On chip oscillator High speed CPU clock Peripheral clock f1 f32 fOCO fOCO F fOCO40M clock Low speed CPU clock Peripheral clock f1 f82 fOCO fOCO S When it is necessary to use another clock in addition to those supplied by the clock source selected in System clock selection select the Use as peripheral function clock source check box for that additional clock and make the necessary settings Note that the main clock and sub clock cannot be used at the same time Table 4 1 16 shows the available combinations of clock sources for the CPU and peripheral functions Table 4 1 16 Combinations of Clock Sources for CPU and Peripheral Functions R8C 26 29 R8C 2A 2D CPU clock Peripheral clock f1 to f32 fC4 fC32 fOCO40M fOCO fOCO F Main clock Main clock On chip oscillator clock On chip oscillator clock On chip oscillator clock Sub clock On chip oscillator clock Sub clock Main clock Sub clock On chip oscillator clock On chip oscillator clock Sub clock On chip oscillator clock Main clock Make settings for this item when the main clock is selected as th
53. When a project is opened 4 channel scan mode setup creation Creates a new setup pattern of 4 channel scan mode When a project is opened 4 channel continuous scan mode setup creation Creates a new setup pattern of 4 channel continuous scan mode When a project is opened New I O setup creation Creates a new setup pattern of I O When a project is opened New timer mode setup creation Creates a new setup pattern of timer mode When a project is opened New timer event count mode setup creation ie Creates a new setup pattern of timer event counter mode When a project is opened REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Peripheral Driver Generator New timer pulse width modulation mode setup creation Creates a new setup pattern of timer pulse width modulation mode Section 1 Overview When a project is opened New timer pulse period measurement mode setup creation Creates a new setup pattern of timer pulse period measurement mode When a project is opened New timer pulse width measurement mode setup creation Creates a new setup pattern of timer pulse width measurement mode When a project is opened New timer input capture mode setup creation Creates a new setup pattern of timer input capture mode When a project is opened New timer output compare mode setup creation
54. a new setup pattern of serial asynchronous mode When a project is opened New A D single shot mode setup creation Creates a new setup pattern of A D single shot mode When a project is opened New A D repeat mode setup creation Creates a new setup pattern of A D repeat mode When a project is opened New A D single sweep mode setup creation Creates a new setup pattern of A D single sweep mode When a project is opened New A D repeat sweep mode 0 setup creation Creates a new setup pattern of A D repeat sweep mode 0 When a project is opened New A D repeat sweep mode 1 setup creation Creates a new setup pattern of A D repeat sweep mode 1 When a project is opened New A D simultaneous sampling sweep mode setup creation ike fF ABBA Creates a new setup pattern of A D simultaneous sampling sweep mode When a project is opened New A D delay trigger mode 0 setup creation Creates a new setup pattern of A D delay trigger mode 0 When a project is opened New A D delay trigger mode 1 setup creation Creates a new setup pattern of A D delay trigger mode 1 When a project is opened 2 channel scan mode setup creation Creates a new setup pattern of 2 channel scan mode When a project is opened 2 channel continuous scan mode setup creation Creates a new setup pattern of 2 channel continuous scan mode
55. clock is selected as the CPU clock and the main clock is used as the peripheral function clock f1 f32 e Use as peripheral function clock source This check box is always selected automatically when the main clock is used as the CPU clock Select this box manually when using the sub clock as the CPU clock and using the main clock as the peripheral function clock f1 f32 e Input frequency to main clock circle Specify the frequency of the main clock On chip oscillator clock Make settings for this item when the on chip oscillator clock is selected as the CPU clock or when the on chip oscillator clock is used as the peripheral function clock e Use as peripheral function clock source This check box is always selected automatically when the on chip oscillator clock is used as the CPU clock Select this box manually when using the clock other than the on chip oscillator clock as the CPU clock and using the on chip oscillator clock as the peripheral function clock e Frequency selection Select the high speed or low speed which respectively corresponds to the high speed on chip oscillator or low speed on chip oscillator e Periodic value Leave this item unspecified e Divider selection Specify the divider of on chip oscillator Only Divided by 1 can be specified when using the low speed on chip oscillator e On chip oscillator frequency This box shows the on chip oscillator frequency calculated from the oscillation frequenc
56. for Components Select the directory in which to begin the search C Program Files Renesas Hew Browse Close V Include subfolders Located components Generic TCL Too 1 03 01 C Program Files Renesas Hew Syst Call Walker 1 6 C Program Files Renesas Hew T ool Call Walker 1 6 C Program Files Renesas Hew T ool H8S H8 300 Sta 6 0 0 0 C Program Files Renesas Hew T ool H8S H8 300 Sta 6 1 1 0 C Program Files Renesas Hew T ool H8S H8 300 Sta 62 0 0 C Program Files Renesas HewT ool H Series Libraria 1 1 C Program Files Renesas Hew T ool H Series Libraria 1 1 C Program Files RenesassHews Tool lt M gt Search status 75 files found Figure 2 4 4 Search Disk for Components Dialog Box 6 Click on the close button to close the Search Disk for Components dialog box 7 Click OK to close the Tools Administration dialog box 8 Execute REGISTERSERVER bat in the directory where the HEW is installed By default the directory is as follows c Program Files Renesas Hew REGISTERSERVER bat amp C Program Files Renesas Hew File Edit View Favorites Tools Help Q ex z E 2 Search Folders Ei Address C Program Files Renesas Hew AppExtRes dll AUM bugtrack hdb BugTracker dll C source CC head Conspawn File and Folder Tasks y a E Context i Csourcefile shl Default shl DefaultSynt DefaultWin editordefaul GenericSeri
57. for the peripheral functions to operate This check box is always selected automatically e Input frequency to sub clock circle The sub clock frequency is fixed at 0 03276 MHz e Sub clock divider Specify the division ratio for the sub clock divider e Sub clock This box shows the sub clock frequency SUB calculated from the sub clock input frequency and clock division ratio The clocks generated by dividing the sub clock OSUB in prescaler W are supplied to each peripheral function 3 System clock setting Make the necessary settings for the basic clock p to be supplied to the CPU and peripheral modules e CPU and peripheral clock frequency This box shows the frequency of the main clock e System clock divider selection Specify the divider of system clock divider e CPU and Peripheral tabs Make the necessary settings for the CPU and peripheral function clocks Table 4 1 19 shows the details of each item Table 4 1 19 System Clock Settings H8 3687 H8 36049 Item Settings CPU Clock divider selection Leave this item unspecified Input Clock Shows the frequency of system clock 0 which is calculated from the CPU and peripheral clock frequency and System clock divider selection values Period Shows the period of system clock o which is calculated from the CPU and peripheral clock frequency and System clock divider selection values Peripheral Clock divider selection Leave this item uns
58. function Boolean __EnablePWM_Tch Resource _p Setting No unsigned long data Peripheral Module Timer Pulse Width Modulation Mode Description Pulse width modulation mode operation control start or stop operation Parameters data Operation of the timer Set the following parameters RAPI_TIMER_ON Starts the timer RAPI_TIMER_OFF Stops the timer Return value If timer is successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned 7 3 DestroyPWM Generated function Boolean __ DestroyPWM_Tch Resource _p Setting No void Peripheral Module Timer Pulse Width Modulation Mode Description Destroy pulse width modulation mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 7 4 DestroyPWM_ALL Generated function Boolean __DestroyPWM_ALL void Peripheral Module Timer Pulse Width Modulation Mode Description Destroy pulse width modulation mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Section 5 Generated Functions Reference 5 21 Peripheral Driver Generator 8 Timer Pulse Period Measurement Mode 8 1 _ CreatePulsePeriodMeasurementMode Generated function Boolean __ CreatePulsePeriodMeasureme
59. function can be specified by selecting Enable lt interrupt type gt interruption The detectable interrupts depend on the microcomputer type The following explains how to set each item Enable overflow interruption Select the check box to detect occurrence of overflow interrupt The compare match interrupt can be setup for each channel or general register in the channel or general register tab described later lt Interrupt type gt interruption level Specify the priority level for the enabled interrupt type The priority may not be specified depending on the microcomputer or interrupt type lt Interrupt type gt interrupt function name Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here If lt Interrupt type gt is not shown the function is called when any of all enabled interrupts occurs The declaration of the interrupt function is as follows Function Declaration void specified notification function name void Used channel The available channels or general registers are shown Select the desired channels or general registers Multiple channels or registers can be selected Selecting a channel or register opens the tab for setting up that channel or register make necessary detailed settings in the tab REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 79 Per
60. in Interrupt This item may be unselectable depending on the microcomputer type Table 4 5 4 shows the settings available for _INT1 pin select Table 4 5 4 _INT1 pin select settings Microcomputer Item Description R8C Tiny P1_5 pin Select the INT1 interrupt input pin R8C 26 27 P1 7 pin R8C 2A 2D P3 6 pin R8C Tiny P1_5 pin R8C 28 29 P17 pin _INT2 pin select Select the INT2 interrupt input pin when _INT2 is selected in Interrupt This item may be unselectable depending on the microcomputer type Table 4 5 5 shows the settings available for _INT2 pin select REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 84 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 5 5 _INT2 pin select settings Microcomputer Item Description R8C 2A 2D P3_2 pin Select the INT2 interrupt input pin P6_6 pin IRQOUT pin Select the IRQOUT interrupt input pin when IRQ interrupt is selected in Interrupt This item may be unselectable depending on the microcomputer type Table 4 5 6 shows the settings available for IRQOUT pin Table 4 5 6 IRQOUT pin settings Microcomputer Item Description SH7125 Interrupt request accept Outputs a notification signal to IRQOUT pin when an signal output interrupt has occurred Always high level output Always outputs high level to IRQOUT pin KIO KI5 Select and set u
61. interval is determined by the frequency of the count source In auto reload timer operation the timer load register value is loaded to the counter and the counter starts counting up from that value The timer load register value is calculated from the specified overflow interval and the frequency of the count source In either operation overflow interrupts can be detected REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 37 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules In timer V the counter starts counting up from 0 and continues counting until it overflows The overflow interval is determined by the frequency of the count source Overflow interrupts can be detected SH7125 The counter counts up with the internal clock the free running or periodic counter operation is done as the basic timer operation in the SH7125 In free running operation the counter continues counting up until it overflows The overflow interval is determined by the frequency of the count source Overflow interrupts can be detected In periodic counter operation the counter is cleared by a compare match between the counter and the specified general register and then the counter restarts counting up At a compare match a compare match interrupt can be detected and a desired signal can be output from a pin The general register value is calculated from the specified period and the frequency of the count source Figure 4 4 1 sh
62. is calculated from the CPU and peripheral clock frequency and Clock divider selection values Period Shows the period of a clock cycle to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Peripheral Clock divider selection Leave this item unspecified The clock selected in System clock selection after being divided by the various division ratios are supplied to the peripheral I O modules The clock to be used in each peripheral I O module should be separately specified in each peripheral I O module setting dialog box Input Clock Shows the frequency of the clock selected in System clock selection Period Shows the period of a clock cycle selected in System clock selection REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 13 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 1 6 Setting Clocks for H8 3687 H8 36049 Figure 4 1 6 shows the CPU clock setting dialog box for the H8 3687 H8 36049 CPU clock setting System clock selection Main clock v Main clock Use as peripheral function clock source Input frequency to main clock circuit 20 000000 MHz r SS Supplied clock to CPU and peripheral 20 000000 MHz System clock divider selection Divided by 1 d CPU Peripheral Sub clock V Use as peripheral function clock source
63. item specifies the A D conversion speed Specify the operating clock or A D conversion time Conversion operation REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 89 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Select Conversion start or Conversion stop for the operation immediately after the A D converter is initialized to the settings made in this dialog box When Conversion start is selected while Software trigger is specified in Trigger conversion starts as soon as the initial setting When Conversion start is selected while a trigger other than Software trigger is specified in Trigger conversion starts at the first trigger after the initial setting When Conversion stop is selected conversion does not begin regardless of the setting in Trigger Resolution Specify the resolution in bits This item may be unselectable depending on the microcomputer type External Op Amp This item specifies use of an external operational amplifier to amplify the analog input This item may be unselectable depending on the microcomputer type Table 4 6 5 shows the settings available for External Op Amp Table 4 6 5 External Op Amp settings Microcomputer Item Description M16C 62P ANEXO and Select this setting to convert the analog input to the specified pins without ANEX1are not used amplification when the P10 PO or P2 group is selected in Input group External Op A
64. may be unselectable depending on the microcomputer type Table 4 4 62 shows the settings available for Compare 0 output mode and Compare output mode Table 4 4 62 Compare 0 output mode Compare 1 output mode settings Microcomputer Item Description R8C 13 Timer C Unchanged Holds output level at compare i match i 0 1 R8C 2A 2D Timer RF Reversed Invert the output level at compare i match i 0 1 Set to low Outputs L at compare i match i 0 1 Set to high Outputs H at compare i match i 0 1 CMP0 Inverse output function Setup the inverse output function This item may be unselectable depending on the microcomputer type Table 4 4 63 shows the settings available for CMP0 Inverse output function Table 4 4 63 CMP0 Inverse output function settings Microcomputer Item Description M16C 28 28B 29 Timer S Output is inversed Output level is inversed Output is not inversed Output is not inversed R8C 13 Output is inversed CMPO00 to CMP02 output inverted Timer C Output is not inversed CMP00 to CMPO2 output not inverted R8C 2A 2D Output is inversed TRFOOO to TRFOO2 output inverted Timer RF Output is not inversed TRFOOO to TRFOO2 output not inverted CMP1 Inverse output function Setup the CMP1 inverse output function This item may be unselectable depending on the microcomputer type Table 4 4 64 shows the settings a
65. mode the counter is not cleared and continues counting up At the next effective edge the timer transfers the counter value again to the general register The width of the input pulse can be calculated from the difference between the counter values obtained at two detection edges and the period of the count source It is not possible to measure the high level width and low level width separately To measure them separately check the input level on the pin Counter overflow interrupts can be detected REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 64 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules SH7125 The timer transfers the counter value to the general register assigned to the external signal input pin when an effective edge is detected Setting the counter clearing source to the input capture in the general register assigned to the pulse input pin causes the counter to be cleared when an effective edge is detected The width of the input pulse can be calculated from the obtained general register value and the period of the count source Both the rising and falling edges are effective edges It is not possible to measure the high level width and low level width separately To measure them separately check the input level on the pin Counter overflow interrupts and input capture interrupts for the measurement pin can be detected Figure 4 4 8 shows the Pulse Width Measurement Mode dialog box
66. mode operation control Operation stop REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 5 1 Peripheral Driver Generator Section 5 Generated Functions Reference 7 4 ___DestroyPulseWidthModulationMode Destroy pulse width modulation mode No Peripheral Module Generated function name Description 8 1 Timer Pulse period __CreatePulsePeriodMeasurementMode Create pulse period measurement mode measurement mode setting 8 2 __EnablePulsePeriodMeasurementMode Pulse period measurement mode operation control Operation start 8 3 __DisablePulsePeriodMeasurementMode Pulse period measurement mode operation control Operation stop 8 4 __DestroyPulsePeriodMeasurementMode Destroy pulse period measurement mode 8 5 ___GetPulsePeriodMeasurementMode Get pulse period measurement mode measured value 9 1 Timer Pulse width __CreatePulseWidthMeasurementMode Create pulse width measurement mode setting 9 2 measurement mode __EnablePulseWidthMeasurementMode Pulse width measurement mode operation control Operation start 9 3 __DisablePulseWidthMeasurementMode Pulse width measurement mode operation control Operation stop 9 4 __DestroyPulseWidthMeasurementMode_ Destroy pulse width measurement mode 9 5 __GetPulseWidthMeasurementMode Get pulse width measurement mode measure
67. one of the values matches the counter value a waveform can be output from the pin assigned to the general register and a compare match interrupt can be generated The details of the output waveform and interrupt should be specified in each channel setting R8C 22 25 Timer RE R8C 2A 2D Timer RE Comparative value This value is used as the TREMIN register value When it matches the 8 bit counter value the output polarity on TREO can be inverted and a compare match interrupt can be generated The details of the TREO output and interrupt should be specified in each channel setting R8C 2A 2D Timer RF Comparative value 0 1 These values are used as compare 0 and 1 register values When either value matches the counter value the corresponding compare i interrupt i 0 or 1 can be generated and waveforms can be output from TRFOOO to TRFOO2 and TRFO10 to TRFO12 The details of the output waveforms and interrupt should be specified in each channel setting H8 3687 36077 H8 36049 36109 SH7125 Comparative value A D These values are used as general register A to D values When one of the values matches the counter value a waveform can be output from the pin assigned to the general register and a compare match interrupt can be generated The details of the output waveform and interrupt should be specified in each channel setting REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 78 Per
68. open the Setting dialog box 2 Specify the name of the editor program that you wish to use when opening source files 3 Specify the parameters of the program according to its specifications Replace file names and line numbers in the parameters with F and L respectively if necessary Click OK to close the dialog box and complete the settings Setting Editor When the parameter is lt file name gt Ic Program Files MI W7 MIW EXE Ref lt line number gt enter F L Parametere Fie name When the parameter is line lt line number gt lt file name gt enter Jina 0 0 99 Figure 2 2 1 Setting Dialog Box REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 2 1 Peripheral Driver Generator Section 2 Preparation for Using the PDG 2 3 Registering the PDG in the HEW You will register the PDG in the HEW menu so that the PDG can launch from it 1 Launch the HEW If it has already launched close all the workspaces 2 Click Administration in the Welcome dialog box Welcome Options 2e Create a new project workspace Ic WorkSpace testtast 23 testtestl2 v Browse to another project workspace Figure 2 3 1 Welcome Dialog Box in the HEW 3 Ifthe HEW has already launched select Administration from the tool menu eo High performance Embedded Workshop ES pesega eK sma gt eeasl JI J gt C ange Toolc versio
69. registers This item may be unselectable depending on the microcomputer type Table 4 4 21 shows the settings available for Control to write to timer Table 4 4 21 Control to write to timer settings Microcomputer Item Description R8C 13 Write only reload register When writing to the prescaler or timer value is written to the reload register only Write to both reload register When writing to the prescaler or timer values are and counter written to both the reload register and counter R8C 22 29 Write to both reload register When writing to the prescaler or timer values are R8C 2A 2D and counter written to both the reload register and counter H8S 20103 Write to both reload register When writing to the prescaler or timer values are H8S 20203 and counter written to both the reload register and counter H83 20223 Valid only when timer Y is selected Filter function Select the sampling frequency for the filter when the filter function is used This item may be unselectable depending on the microcomputer type Input pin Select the input pin for external signals This item may be unselectable depending on the microcomputer type Gate function Set up the gate function This item may be unselectable depending on the microcomputer type or timer resource Table 4 4 22 shows the settings available for Gate function Table 4 4 22 Gate function settings Microcomputer ltem Desc
70. selection Include in group Status ka im w k k k m l general I O port Used as an input Event output edge Rising edge 7 Status Event ink pot sting Potseting U UOUOSOSOS A Output port group 1 P31 P35 Input port group 1 P33 P37 Output port group 2 Input port group 2 Single port 1 Single port 2 Single port 3 Single port 4 Figure 4 8 3 Event link port setting dialog box The following describes the items in the Event link port setting dialog box Port group Single port Select the port operation upon Event Input and Event Generation Table 4 8 3 shows the settings for Port group Single port Table 4 8 3 Port group Single port settings Item Description Single port 1 Port and bit of each single port Single port 2 Single port 3 Single port 4 Input port group 1 or Output port group 1 Port group for port 3 Input port group 2 or Output port group 2 Port group for port 6 REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 100 Peripheral Driver Generator Port select Section 4 How to Set up Clocks and Peripheral I O Modules Specify the port group Table 4 8 4 shows the settings for Port select Table 4 8 4 Port select settings Port group Single port ltem Item Single port 1 No setting Single port 2 Port 3 Single port 3 Port 6 Single port 4 Input port group 1 or Output port group 1 Port 3 Input port group 2 or Ou
71. set multiple parameters at the same time use the symbol to separate each specified parameter RAPI_NMI_PIN Input pin level for NMI RAPI_IRQO_PIN Input pin level for IRQO RAPI_IRQ1_PIN Input pin level for IRQ1 RAPI_IRQ2_PIN Input pin level for IRQ2 RAPI_IRQ3_PIN Input pin level for IRQ3 RAPI_IRQO_FLAG Status flag for IRQO interrupt request RAPI_IRQ1_FLAG Status flag for IRQ1 interrupt request RAPI_IRQ2_FLAG Status flag for IRQ2 interrupt request RAPI_IRQ3_FLAG Status flag for IRQ3 interrupt request data2 Pointer to the buffer in which input pin level and status flag are stored Return value RAPI_TRUE is returned 2 4 _ ClearInterruptFlag Generated function Boolean __ClearInterruptFlag_ALL unsigned long data Peripheral Module Interrupt Description Clear the external interrupt flag Parameters data1 Status flags to be cleared Set the following parameters To set multiple parameters at the same time use the symbol to separate each specified parameter RAPI_IRQO_FLAG Status flag for IRQO interrupt request RAPI_IRQ1_FLAG Status flag for IRQ1 interrupt request RAPI_IRQ2_FLAG Status flag for IRQ2 interrupt request RAPI_IRQ3_FLAG Status flag for IRQ3 interrupt request Return value RAPI_TRUE is returned 3 A D Converter 3 1 _ CreateADC Generated function Boolean __CreateADC_ Mode _RAPI_ Resource _p Setting No void Peripheral Module
72. source Clicking on this button opens the Bit rate register setting value calculation dialog box shown in Figure 4 2 2 REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 27 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Bit rate register setting value calculation l Trial Source clock frequency 20 000000 MHz Bit Rate 9600 bgt Bit rate register settings 129 Error ratio 0 156250 z Clock source 8 Clear Cancel Figure 4 2 2 Bit rate register setting value calculate dialog box The following describes the items in the Bit rate register setting value calculation dialog box Trial This check box works only when the internal clock is used Selecting this box allows the main clock frequency to be modified When the error ratio is high at the specified baud rate select this box to estimate the error ratio with a different temporary frequency of the input clock When this box is selected the Set button becomes unselectable and the values specified in this dialog box cannot be applied to the actual settings When this box is deselected the main clock frequency is restored to the initial value To modify the actual input clock frequency when the internal clock is selected modify the CPU clock settings Clock frequency When the internal clock is used this box shows the frequency of the clock input to the serial communication module which is specified in the CPU clock settings This v
73. source files according to the peripheral I O modules functions Registering the generated source files in the HEW project Figure 3 2 1 PDG Operation Flow REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 2 Peripheral Driver Generator Section 3 How to Operate the PDG 3 3 Creating Opening a Project 3 3 1 Creating a New Project Create a new project through the following steps 1 Select File gt Create New Project to open the Create New dialog box see Figure 3 3 1 Project new Project name default c renesas PDG_proj default Ref Type of CPU Series M1B6C Tiny w Group mec x Type No m302e0F6 o o ROM capacity 48K aK byte s RAM capacity x byte s Cancel Figure 3 3 1 Project new Dialog Box 2 Enter the name of the project to be created and specify the directory where the project is stored 3 Select the CPU series group and type No see Table 3 3 1 Table 3 3 1 List of Supported Microcomputers M16C Tiny M16C 28 M30280F6 M30280F8 M30280FA M30280FC M30281F6 M30281F8 M30281FA M30281FC M16C 28B M30280FCB M30281FCB M16C 29 M30290FA M30290FC M30291FA M30291FC H8 300H Tiny H8 3687 HD64F3687 HD64F3684 H8 36077 HD64F36077 HD64F36074 H8 36049 HD64F36049 H8 36109 HD64F36109 R8C Tiny R8C 13 R5F21132 R5F21133 R5F21134 R8C 22 R5F21226 R5F21227 R5F21228 R5F2122A R5F2122C R8C 23
74. specify TGRA as a trigger in the A D settings Selectable when periodic is selected as operation Interruption This item enables detection of overflow underflow and compare match interrupt occurrence Select the interrupts to be detected and specify the interrupt priority levels the user created interrupt function will be called when an interrupt occurs The following explains how to set each item Permit lt interrupt type gt interruption Select the check box for each interrupt type to detect occurrence of the corresponding interrupt The detectable interrupts depend on the timer type lt interrupt type gt interruption level Specify the priority level for the enabled interrupt type The priority may not be specified depending on the microcomputer or interrupt type Interrupt function name Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here The declaration of the interrupt function is as follows Function Declaration void specified notification function name void Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 41 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O
75. the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings 4 2 2 Asynchronous Serial Communication Interface Figure 4 2 3 shows the Clock asynchronous SIO mode setting dialog box Clock asynchronous SIO mode setting Serial port Clock selection Stop bit Parity bit Bit number LSB first MSE first selection CTS ATS function UARTO bd Internal clock hai One stop bit v Parity disable v 8 bit v LSB first Do not use CTS ATS function v Bit rate register Bit rate register settings 129 Clock source selection f1 v 3600 bps Set details Bit Rate Interrupt enable V Permit transmit interruption Transmit interruption level I Permit receive interruption r r Interrupt function name SerialNotificationFunc V Generate batch source M Cancel Figure 4 2 3 Clock asynchronous SIO mode setting dialog box The asynchronous serial interface setting differs from the synchronous interface setting in the following items For the items not described here refer to section 4 2 1 Synchronous Serial Interface REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Bit number
76. the PDG are listed below Table 1 6 1 List of API Libraries Series Directory Library file name H8 300H Tiny lib H8_Tiny rapi h8_3687 lib rapi_h8_36049 lib rapi_h8_36077 lib rapi h8 _36109 lib R8C Tiny lib R8C_ Tiny rapi_r8c_13 lib rapi r8c_22 23 lib rapi r8c_24 25 lib rapi r8c_26 27 lib rapi r8c_28 29 lib rapi r8c_2A 2B lib rapi_r8c_2C 2D lib M16C 60 lib m16c rapi_m1l6c_62p lib SH Tiny lib SH_ Tiny rapi_sh7125 lib H8S Tiny lib H8S_ Tiny rapi_h8s_20103 lib rapi_h8s_20203 lib rapi_h8s_20223 lib These libraries are built with the compilers shown in Table 1 5 1 When using these libraries use the same version of the M16C Tiny lib M16C_Tiny rapi_ml6c_28 lib rapi_ml6c_29 lib compilers shown in Table 1 5 1 For reference the source files of the API libraries are stored in the source directory REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 1 3 Peripheral Driver Generator Section 1 Overview 1 7 Main Window 1 7 1 Setting Details Display Window This window displays the setting details of the currently opened project file The tabs at the bottom the trees in the left and the list in the right show functions created setup pattern and the details of the currently selected setting in the trees respectively Double clicking on Setting in the trees or any one of the setting items in the list shows a dialog box for specifying the corresponding setting 0 Peripheral Driver Generator default
77. the peripheral I O function setting dialog box source files are generated automatically after the dialog box is closed To delete generated source files collectively select File gt Delete Sources Collectively from the menu 3 7 Viewing Generated Function Information in CSV Format Function information generated collectively by the PDG can be listed in CSV file format after source files are generated collectively 1 Select Tool gt Display output function list from the menu 2 A generated function list is displayed by the program associated with the csv file 3 8 Updating a Generated Function Information You can update function information generated collectively by the PDG after source files are generated collectively 1 Select Tool gt Place output function list in the latest status 2 The CSV file of the generated function list is updated The CSV file is updated when sources are generated collectively Note that when sources are generated while the CSV file is opened it may not be updated In this case close the CSV file and follow the steps above 3 9 Registering Generated Files in a HEW Project 3 9 1 Registration Function You can register all source files generated by the PDG collectively in an existing HEW project automatically At the same time API libraries used in the source files are registered in library options and the intprg c file is excluded from the build target when it is already r
78. the port Don t care the initial output Specify the initial output from the pin that is set to an output port in the input output selection This item may be unselectable depending on the microcomputer type Table 4 3 1 shows the available settings REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 33 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 3 1 Initial Output Settings Microcomputer Description SH7125 Not selected H8S 20103 The initial output from the corresponding output port is set to high 20203 20223 Selected The initial output from the corresponding output port is not controlled Upgrade driver capacity Specify the output transistor drive capacity This item may be unselectable depending on the microcomputer type and port Table 4 3 2 shows the available settings Table 4 3 2 Output transistor drive capacity settings Microcomputer Port Description R8C 13 26 29 1 Not selected Output drive capacity low R8C 24 25 2A 2D 2 Selected H8S 20103 20203 7 Output drive capacity high 20223 Valid only when General I O port is selected for Pin function and the Used as an output radio button is selected regardless of the port selection however P56 and P57 are always invalid Pull up available Select this check box when pull up the port This item may be unselectable depending on the microcomputer type and por
79. up Clocks and Peripheral I O Modules Specify the interrupt notification function to be called when the A D conversion completed interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here The declaration of the interrupt function is as follows Function Declaration void specified notification function name void Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 93 Peripheral Driver Generator 4 7 Setting DTC Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 7 1 shows the available microcomputers Table 4 7 1 Available microcomputers M16C 60 M16C Tiny R8C Tiny H8 300H Tiny SH Tiny H8S Tiny M16C 62P M16C 28 R8C 13 H8 3687 SH7125 H8S 20103 M16C 28B R8C 22 29 H8 36077 H83 20203 M16C 29 R8C 2A 2D H8 36049 H83 20223 H8 36109 DTC Table 4 7 2 shows the activation sources that can be set in each microcomputer Table 4 7 2 Activation sources in each microcompu
80. 09 RENESAS 3 7 Peripheral Driver Generator Section 3 How to Operate the PDG 3 4 Selecting Setting Peripheral I O Modules 3 4 1 Creating a New Setup Pattern of Peripheral I O Modules Create a new setup pattern of peripheral I O modules through the following steps 1 Click on the button see Figure 3 4 1 corresponding to the peripheral I O module to be controlled or select Function gt Serial A D I O Timer INT or DTC gt Create New Setting to select a mode 20 Peripheral Driver Generator default E File F Function U Display TookT wir De Ae Ae y Clock synchronous SIO mode mn Clock asynchronous SIO mode Tat emit Figure 3 4 1 New Setup Pattern Creation Window 2 After setting functions of each peripheral I O modules see Figure 3 4 2 clicking on the Setting button lists the setting details setup pattern in the right of the main window see Figure 3 4 3 REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 8 Peripheral Driver Generator Section 3 How to Operate the PDG Clock asynchronous SIO mode setting Serial port AOE r BRAG register BAG register setting value J 129 Bit number E bit BRG count source r Stop bit One stop bit Baud rate 9600 Set details Parity bit Parity disable me Set dete Clock selection Internal clock p Interrupt enable D Permit transmit interruption Clock polarity selection E z
81. 0J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 35 Peripheral Driver Generator 4 4 Setting Timer The following modes are available in the timers Timer mode Section 4 How to Set up Clocks and Peripheral I O Modules Time is counted with the internally generated count source to generate interrupts Event counter mode External signals or overflows or underflows in other timers are counted Pulse width modulation mode Pulses with a given width are output in succession Pulse period measurement mode The period of an external signal pulse is measured Pulse width measurement mode The width of an external signal pulse is measured Input capture mode Time is measured by detecting edges of the external or internal signal Output compare mode The signal level output from a pin is modified or an interrupt is generated with a given timing Table 4 4 1 to Table 4 4 5 show the available timer resources and modes in each microcomputer REJ10J2018 0100 Rev 1 00 May 29 2009 Table 4 4 1 Available timer modes N16C 60 series M16C Tiny series M16C 62p M16C 28 28B 29 Timer mode AO 4 BO 5 A0 4 BO 2 Event counter mode A0 4 BO 5 A0 4 BO 2 Pulse width modulation mode A0 4 A0 4 Pulse period measurement BO 5 BO 2 mode Pulse width measurement mode BO 5 BO 2 Input capture mode S Output compare mode S Table 4 4 2 Avail
82. 25 There is no port group no group is always selected H8S 20103 Select group ANO or AN4 as the analog input pin group H8S 20203 Select group ANO AN4 or AN8 as the analog input pin group H8S 20223 Select group ANO or AN4 or AN8 as the analog input pin group when AD_1 is selected on Module ANO_2 is always selected when AD_2 is selected on Module Input pin Select the analog input pins to be used The selectable pins depend on the mode Multiple pins can be selected in the mode that uses multiple pins Table 4 6 4 shows the details of Input pin settings for 2 channel scan mode and 2 channel continuous scan mode in SH7125 Table 4 6 4 Input pin settings Microcomputer Module Item Setting SH7125 A D_0O ANO Selects ANO A D_0 ANO AN1 Selects ANO and AN1 A D_0 AN2 Selects AN2 A D_0 AN2 AN3 Selects AN2 and AN3 A D_1 AN4 Selects AN4 A D_1 AN4 AN5 Selects AN4 and AN5 A D_1 AN6 Selects AN6 A D_1 AN6 AN7 Selects AN6 and AN7 A D_0 ANO AN2 Selects ANO for group 0 selects AN2 for group 1 A D_0 ANO_1 AN2_3 Selects ANO and AN1 for group 0 selects AN2 and AN3 for group 1 A D_1 AN4 AN6 Selects AN4 for group 0 selects AN6 for group 1 A D_1 AN4_5 AN6_7 Selects AN4 and AN5 for group 0 selects AN6 and AN7 for group 1 Sample and hold This item specifies the sample and hold function To use the function select Sample and hold Conversion speed This
83. 3 Timer synchronization settings Microcomputer Item Description R8C 22 25 No synchronize timers The counters in channels 0 and 1 operate independently R8C 2A 2D on channel 0 and 1 H8 3687 mas H8 36077 Synchronize timers on The counters in channels 0 and 1 are simultaneously H8 36049 channel 0 and 1 preset When the counter in one channel RDO or RD1 is H8 36109 written to the same value is also written to the counter in the other channel To operate the two channels synchronously specify Synchronize timers on channel 0 and 1 in both channels 0 and 1 To clear the counters simultaneously select Synchronize timers on channel 0 and 1 and then specify Clear synchronization in Counter clear function SH7125 Operate independently The channel operates independently of the others Specify a TGR in the channel as the counter clearing source in Counter clear function Master of timer The channel operates in synchronization with other synchronous operation channels The counter clearing source specified in Counter clear function also clears the counters in the other synchronized channels Performs synchronous This setting can be selected only when Master of timer operation synchronous operation is selected in another channel The counter is cleared by the counter clearing source specified in the channel set as Master of timer synchronous operation Only Clear synchronization can be selecte
84. 4 Peripheral Driver Generator Section 3 How to Operate the PDG 5 Immediately after the creation of a new project the CPU clock setting dialog box opens automatically Proceed to setting CPU clocks 20 Peripheral Driver Generator default pdg ER Fie Function U Display Tool T Window w PAU Keer Scie jo ca e e e e System clock selection s 2X GSS ee SSM pMa cok xix CPU M16C 28 IV Use as peripheral function clock source serve iy Setting Input frequency to main clock circuit 20 000000 MHz r On chip oscillator clock I Use as peripheral function clock source Frequency selection La Frequency adjustment value Divider selection E z On chip oscillator frequency aaoo MHz PLL clock Supplied clock to CPU and peripheral F Use as peripheral function clock source 20 000000 MHz Interrupt Selection of multiplication F z E z PLL frequency 0 000000 MHz r Sub clock I Use as peripheral function clock source Clock divider selection Divided by 1 X Input frequency to sub clock circuit 032768 MHz Input Clock 20 000000 MHz Divider selection z Sub clock 0 000000 MHz d POLUO ins cen CPU setting CPU Peripheral Figure 3 3 2 CPU clock setting Dialog Box REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 5 Peripheral Driver Generator Section 3 How to Operate the PDG 3 3 2 Opening an Existin
85. 4 11 4 1 6 Setting Clocks for H8 3687 H8 36049 cecccesessecsseesseeseeesecaeecneeeneseeeeeessecesecaeesaeesaecaaecaeeeseeeaeeaeeeaes 4 14 4 1 7 Setting Clocks for H8 36077 H8 36109 0 cessesssssecsresecseeeeceseeceesecseesecaeverenaeseeeaecateeecaeeatenesaeearersteaes 4 16 4 1 8 Setting Clocks for SH 125 orpine essesi iinis a e casts cevedccaciseucescsastacs cuaseces coccecsscusseceasucdicess 4 18 4 1 9 Setting Clocks for H8S 20103 H8S 20203 H8S 20223 ue cessessssessescseeseeecsencesecseeeeeesenecsenaeeeceeeaeeeenes 4 20 4 2 Setting Serial Interface iisen raisin ces tas caash cg R TA rae C EE PO SEERP E TA E dasastenadtascauel desea tai deess 4 24 4 2 1 Synchronous Serial Communication Interface cccccecccesccesecesecceeseeeneeeseeeeecenseenseenaeenaecaecneeeneeeneeaes 4 25 4 2 2 Asynchronous Serial Communication Interface ees ecseseeseeseeseceeseceeeeeneeeeceaeceesseeaeeseeneeereaeeeeeaeeate 4 30 4 3 Metin VO POMS saeco odes eds ces k ete cateatsccace a esc eats ane a eae tc ee 4 33 4 4 Setting TIMET naenin aE EER E E R EER E A E E ES EE E Ri 4 36 4 4 1 Timer Modereer e a be ieee ete seas de dee ee es 4 37 4 4 2 Event Counter Moderering ena rne Ee bes a5g can dace EEEE AE ane E TE tbs ag acide 4 43 4 4 3 Pulse Width Modulation Mode cccc scsssscesiecseeosseavecestesddesodoesncesdecsoussiesosseedhersdenecsodosedeoatensouseceodeerse 4 50 4 4 4 Pulse Period Measurement Mode cccscesssesssesseeesceecesc
86. 9 RENESAS 4 18 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 3 System clock setting Specify the division ratio for each clock frequency to determine the frequencies of the internal clock I peripheral clock Po and MTU2 clock MP9 e CPU and peripheral clock frequency This box shows the frequency of the output from the PLL circuit e System clock division selection Leave this item unspecified e CPU Peripheral and Timer tabs Make the necessary settings for the internal clock Io peripheral clock Po and MTU2 clock MP9 Table 4 1 22 shows the details of each item Table 4 1 22 System Clock Settings SH7125 Item Settings CPU Clock divider Select the division ratio for the internal clock I frequency selection Input Clock Shows the frequency of the internal clock lo calculated from the frequency of the output from the PLL circuit and the division ratio selected in Clock divider selection Peripheral Shows the period of an internal clock I cycle Peripheral Clock divider Select the division ratio for the peripheral clock Po frequency selection Input Clock Shows the frequency of the peripheral clock Po calculated from the frequency of the output from the PLL circuit and the division ratio selected in Clock divider selection Peripheral Shows the period of a peripheral clock P cycle Timer Clock divider Select
87. API_TRUE is returned Remarks This function is not generated for RB pin in H8 3687 36049 36077 RF pin in H8 36109 P85 pin in M16C 62P P46 47 pin in R8C 13 2A 2D and P42 46 47 pin in R8C 22 29 REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 6 Peripheral Driver Generator Section 5 Generated Functions Reference 4 4 _ReadJOPortRegister Generated function Boolean __ReadlOPortRegister_ Port _p Setting No unsigned int data Peripheral Module I O Port Description Read data from I O port register Parameters data Pointer to the variable in which the value read from I O port register is stored Return value RAPI_TRUE is returned 4 5 WriteIOPortReg ister Generated function Boolean __WritelOPortRegister_ Port _p Setting No unsigned int data Peripheral Module 1 0 Port Description Write data to I O port registers Parameters data Data to be written to I O port register Return value RAPI_TRUE is returned Remarks This function is not generated for RB pin in H8 3687 36049 36077 RF pin in H8 36109 P85 pin in M16C 62P P46 47 pin in R8C 13 2A 2D and P42 46 47 pin in R8C 22 29 5 Timer Timer Mode 5 1 _ CreateTimer Generated function Boolean __CreateTimer_T Resource _p Setting No void Peripheral Module Timer Timer Mode Description Create timer mode setting Parameters Return value RAPI_
88. EGU ee eo en 20 Clock polarity reversed Transmit data is output at rising edge of transfer clock and receive data is input at falling edge REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 25 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Bit number Leave this item unspecified LSB fist MSB fist selection Select the transfer format This item may be unselectable depending on the microcomputer type Table 4 2 3 shows the settings available for LSB fist MSB fist selection Table 4 2 3 LSB fist MSB fist selection settings Microcomputer Group Item Description M16C 62p LSB first Selects LSB first as transfer format M16C 28 28B 29 R8C 13 22 29 2A 2D MSB first Selects MSB first as transfer format Reverse data logic Select the data logic This item may be unselectable depending on the microcomputer type Table 4 2 4 shows the settings available for Reverse data logic Table 4 2 4 Reverse data logic settings Microcomputer Item Description M16C 62p 1 Reverse Reverses the logic value of the transmit receive data M16C 28 28B 29 2 Do not reverse Does not reverse the logic value of the transmit receive data 1 Valid only when any of UARTO to UART2 is selected 2 Valid only when UART 2 is selected CTS RTS function Specify whether to use the CTS RTS function This item may be unselectable depending on the mic
89. Frequency of count source 20 000000 jr Time till compare match 0 040000 a Practical time 9 040000 ne 799 Clock edge Rising edge B GREB setting Initial output 0 output X Output waveform Toggle output x Interruption Enable Compare matching interruption Interruption function name TimerlntFunc Interruption priority level 15 Output waveform width nerind Period 0 050000 GRB ms PSE EEEE ETERA EIIE AEA Operation during initialization Operation stop Frequency GRD Operate independently 20000 0000C Hz TiO au TIOCIE TIOCICI TIOCID I Timer synchronization IV Generate batch source M Cancel Figure 4 4 3 Pulse width modulation mode setting dialog box SH7125 Note General register names GRA GRB GRC and GRD used in the dialog box and the following description correspond to TGRA TGRB TGRC and TGRD in the SH7125 Timer type Select the timer resource to be set up PWM mode selection Select the PWM mode Table 4 4 24 shows the settings available for PWM mode selection Table 4 4 24 PWM mode selection settings Description PWM waveforms are output from the TIOCA and TIOCC pins by pairing TGRA with TGRB and TGRC with TGRD The values specified in GRA and GRC are output as the initial values from the TIOCA and TIOCC pins Specified values are output from the TIOCA pin at compare matches sp
90. G Note When using SH7125 with HEW V 4 04 or earlier version it is necessary to register the include file path of vect h that is startup program of HEW manually for intprg_sh7125 c and intprg_sh7125_pdg c generated by PDG When using HEW V 4 05 or later the include path is registered automatically 3 9 3 Canceling Registration of Files Once source files are registered in the HEW you cannot cancel their registration via the PDG When you cancel them in the project tab of the HEW workspace window select a source file that you wish to cancel and right click on the file to open a pop up menu Then select Remove File or Exclude Build REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 14 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 How to Set up Clocks and Peripheral I O Modules 4 1 Setting Clocks After creation of a new project the CPU clock setting dialog box opens Before setting up peripheral I O modules specify the clocks for the CPU and peripheral modules The settings in the CPU clock setting dialog box are reflected in the peripheral I O module settings The CPU clock setting dialog box only specifies the clock information necessary for peripheral I O module settings no source code for clock settings is generated by the CPU clock setting dialog box Be sure to make initial clock settings in the user program The following describes how to set up the clocks for eac
91. HEW workspace in which the files are to be registered is an existing workspace 4 Click Yes to open the Open File dialog box Specify a HEW workspace in which the files are to be registered Click Open to open the workspace e When a HEW workspace in which the files are to be registered is not created 4 Do not close the dialog box In the HEW create a new HEW workspace and leave the workspace open In the message dialog box of the PDG click Yes REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 13 Peripheral Driver Generator Section 3 How to Operate the PDG 5 The Library link priority setup dialog box appears Move the libraries up and down according to their priorities When OK is clicked the files begin to be registered in the HEW project Library link priority setup Set the priority in which order libraries are linked Priority nc30lib lib high C Renesas PDG lib M16C_Tiny rapi_m16c_28 lib Priority low Figure 3 9 3 Library link priority setup Dialog Box When several HEW workspaces are opened files are registered in all active projects as stated in the dialog box that asks whether to register the files Close workspaces in which you do not register the files before performing registration 6 The message dialog box appears telling you that the registration is completed A The source file has completely been registered Figure 3 9 4 Message Telling Completion of the Registration PD
92. Hew Modify Figure 2 4 1 Tools Administration Dialog Box REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 2 4 Peripheral Driver Generator Section 2 Preparation for Using the PDG 3 Click on the Search disk button in the Tools Administration dialog box Tools Administration Registered components Component i Cancel H O Toolchains E System Tools i Utility Phases Register 4 Debugger Components Extension Components E Communication Tools E Help System Tools Unregister Properties Tool information al gt Uninstaller I Show all components Current HEW tools database location CAProgram Files Renesas Hew Modify Figure 2 4 2 Tools Administration Dialog Box 4 Enter the directory where the HEW is installed in the Search Disk for Components dialog box and click on the Start button to search for HewTargetServer Search Disk for Components Ectory in which to begin the search C Program Files Renesas Hew Browse D gt Close V Include sub Located components Component Version HRF Location Register Register All Search status Idle Figure 2 4 3 Search Disk for Components Dialog Box REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 2 5 Peripheral Driver Generator Section 2 Preparation for Using the PDG 5 From Located components select HewTargetServer 1 05 00 and click on the Register button Search Disk
93. I_TRUE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 9 Peripheral Driver Generator 9 4 _ DestroyPulseWidthMeasurementMode Section 5 Generated Functions Reference Generated function Boolean __ DestroyPulseWidthMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Measurement Mode Description Destroy pulse width measurement mode Parameters Return value RAPI_TRUE is returned 9 5 _ GetPulseWidthMeasurementMode Generated function Boolean __GetPulseWidthMeasurementMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Measurement Mode Description Get pulse width measurement mode measured value Parameters Return value RAPI_TRUE is returned 10 Timer Input Capture Mode 10 1 _ CreateInputCapture Generated function Boolean __CreatelnputCapture_T Resource _p Setting No void Peripheral Module Timer Input Capture Mode Description Create input capture mode setting Parameters Return value RAPI_TRUE is returned 10 2 _ EnableInputCapture Generated function Boolean __EnablelnputCapture_T Resource _p Setting No void Peripheral Module Timer Input Capture Mode Description Input capture mode operation control Operation start Parameters Return value RAPI_TRUE is returned 10 3 Disabl
94. R5F21236 R5F21237 R5F21238 R5F2123A R5F2123C R8C 24 R5F21244 R5F21245 R5F21246 R5F21247 R5F21248 R8C 25 R5F21254 R5F21255 R5F21256 R5F21257 R5F21258 REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 3 Peripheral Driver Generator Section 3 How to Operate the PDG R8C 26 R5F21262 R5F21264 RSF21265 RSF21266 R8C 27 R5F21272 R5F21274 R5F21275 RSF21276 R8C 28 R5F21282 R5F21284 R8C 29 R5F21292 RSF21294 R8C 2A R5F212A7 R5F212A8 RSF212AA R5F212AC R8C 2B R5F212B7 R5F212B8 R5F212BA R5F212BC R8C 2C R5F212C7 RS5F212C8 RSF212CA R5F212CC R8C 2D R5F212D7 R5F212D8 R5F212DA R5F212DC M16C 60 M16C 62P M30622F8PFP M30622F8PGP M30623F8PGP M30620FCPFP M30620FCPGP M30621FCPGP M3062LFGPFP M3062LFGPGP M30625FGPGP M30626FHPFP M30626FHPGP M30627FHPGP M30626FJPFP M30626FHPGP M30627FJPGP SH Tiny SH7125 RSF71253N50FP RSF71253DS50FP R5F71253N50FA R5F71253D50FA RSF71252N50FP R5F71252D50FP R5F71252N50FA R5F71252D50FA H8S Tiny H8S 20103 R4F20103NFA R4F20102NFA R4F20103NFB R4F20102NFB R4F20103DFA R4F20102DFA R4F20103DFB R4F20102DFB H8S 20203 R4F20203NFC R4F20202NFC R4F20203NFD R4F20202NFD R4F20203DFC R4F20202DFC R4F20203DFD R4F20202DFD H8S 20223 R4F20223NFC R4F20222NFC R4F20223NFD R4F20222NFD R4F20223DFC R4F20222DFC R4F20223DFD R4F20222DFD 4 Click OK to create a new project REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3
95. Receive interrupt End of reception Receive error occurrence 1 R8C 13 22 23 28 29 i 0 R8C 24 Interrupt function name 25 i 0 or 1 R8C 2A to 2D i 0 to 2 2 H8 3687 36077 i 1 or 2 H8 36049 36109 i 1 to 3 Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here One notification function can be specified for each serial communication resource When multiple interrupt types are enabled the same function is called for all interrupts in the resource to change the processing depending on the interrupt or error type the interrupt or error type should be detected in the notification function REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 2 9 shows the declaration of the interrupt function Table 4 2 9 Interrupt Function Declaration Microcomputer Function Declaration M16C 62p M16C 28 28B 29 R8C 13 22 to 29 2A to 2D H8 3687 36077 36049 36109 H8S 20103 20203 20223 SH7125 void specified notification function name unsigned char notify void specified notification function name void Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on
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97. Series Microcomputer Group Timer Resource N16C 60 M16C 62p BO 5 M16C Tiny M16C 28 28B 29 BO 2 R8C Tiny R8C 13 X R8C 22 29 2A 2D RA H8 300H Tiny H8 3687 36077 Z0 Z1 36049 W Z0 Z1 36109 RC RDO 3 SH Tiny SH7125 Channel 0 5 H8S Tiny H8S 20103 20203 20223 RA The following gives an overview of the pulse period measurement mode settings for each microcomputer M16C 62P M16C 28 28B 29 Timer B measures the period of the external signal pulse in pulse period measurement mode The counter starts counting up from 0 and transfers the count value to the reload register at an effective edge of the measurement pulse At this time the counter is cleared to 0 and then continues counting up The period of the input pulse can be calculated from the transferred reload register value and the period of the count source When an effective edge of the measurement pulse is input or the counter overflows an interrupt can be detected R8C 13 22 to 29 2A to 2D H8S 20103 20203 20223 Timer RA timer X in the R8C 13 measures the period of the external signal pulse in pulse period measurement mode The counter reloads the reload register value and starts counting down It stores the counter value in the read out buffer when an effective edge is input The period of the input pulse can be calculated from the buffer value reload value and the period of the count source When the counter underflows or reloads a value a timer RA interrupt a timer X
98. TRUE is returned 5 2 _ EnableTimer Generated function Boolean __EnableTimer_T Resource _p Setting No void Peripheral Module Timer Timer Mode Description Timer mode operation control Operation start Parameters Return value RAPI_TRUE is returned Remarks This function is not generated for the timer B1 in H8 3687 36049 36077 36109 5 3 _ DisableTimer Generated function Boolean __ DisableTimer_T Resource _p Setting No void Peripheral Module Timer Timer Mode Description Timer mode operation control Operation stop Parameters Return value RAPI_TRUE is returned Remarks This function is not generated for the timer B1 in H8 3687 36049 36077 36109 5 4 _ DestroyTimer Generated function Boolean __DestroyTimer_T Resource _p Setting No void Peripheral Module Timer Timer Mode Description Destroy timer mode Parameters Return value RAPI_TRUE is returned 6 Timer Event Counter Mode 6 1 _ CreateEventCounter Generated function Boolean __ CreateEventCounter_T Resource _p Setting No void Peripheral Module Timer Event Counter Mode Description Create event counter mode setting Parameters Return value RAPI_TRUE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 7 Peripheral Driver Generator 6 2 _ EnableEventCounte
99. The declaration of the interrupt function is as follows Function Declaration void specified notification function name void Operation during initialization Select Operation start or Operation stop for the timer operation immediately after the initial setting The available settings depend on the microcomputer or timer resource REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 46 Peripheral Driver Generator Counter clear function Section 4 How to Set up Clocks and Peripheral I O Modules Select the source for clearing the counter This item may be unselectable or the available settings may differ depending on the microcomputer or selected timer operation Output function Set up the timer pins The available settings depend on the microcomputer Table 4 4 19 shows the settings available for Timer output Table 4 4 18 Timer output settings Microcomputer Item Description M16C 62p 1 Pulse is output Uses TAiOUT pin for input output port M16C 28 1 M16C 28B 1 Pulse is not output Uses TAiOUT pin for pulse output M16C 29 1 R8C 22 29 Pulse is output Uses TRAO pin for input output port R8C 2A 2D Pulse is not output Uses TRAO pin for pulse output SH7125 2 Output retained TIOCij 4 output level is retained Initial output is 0 O output at compare TIOCij 4 initial output value is 0 0 output at compare match 3 match Initial output is 0
100. This interrupt is issued when an effective edge of the measurement pulse is input or the counter overflows R8C 13 22 29 2A 2D H8S 20103 20203 20223 Underflow interrupt This interrupt is issued when the counter underflows or an effective edge is input H8 3687 36077 H8 36049 36109 Overflow interrupt This interrupt is issued when the counter overflows REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 62 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules SH7125 Overflow interrupt This interrupt is issued when the counter overflows Input capture interrupt This interrupt is issued when an input capture occurs an effective edge is input on the measurement pin lt interrupt type gt interruption level Specify the priority level for the enabled interrupt type The priority may not be specified depending on the microcomputer or interrupt type Interrupt function name Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here The declaration of the interrupt function is as follows Function Declaration void specified notification function name void Generate batch source Select this check box to create the driver source code for all peripheral I O modules when cli
101. To our customers Old Company Name in Catalogs and Other Documents On April 1 2010 NEC Electronics Corporation merged with Renesas Technology Corporation and Renesas Electronics Corporation took over all the business of both companies Therefore although the old company name remains in this document it is a valid Renesas Electronics document We appreciate your understanding Renesas Electronics website http www renesas com April 1 2010 Renesas Electronics Corporation Issued by Renesas Electronics Corporation http www renesas com Send any inquiries to http www renesas com inquiry CENESAS 8 10 11 12 Notice All information included in this document is current as of the date this document is issued Such information however is subject to change without any prior notice Before purchasing or using any Renesas Electronics products listed herein please confirm the latest product information with a Renesas Electronics sales office Also please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is grant
102. V Generate batch source M Cancel Figure 4 5 1 Interrupt setting dialog box Make the necessary settings for interrupt detection through the interrupt setting dialog box By setting up an interrupt in this dialog box the function with the name specified in Interruption function name is called when that interrupt occurs Interrupt Select the interrupt type to be set up Selecting Timer type none allows the timer setting to be made with no resource being selected here and any resource can be assigned to the setting Note that Timer type none is not available for the SH7125 or H8S Tiny Interruption requested This item enables interrupt selected in Interrupt This item may be unselectable depending on the microcomputer type Table 4 5 2 shows the settings available for Interruption requested Table 4 5 2 Interruption requested settings Microcomputer Description REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 83 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules H8 3687 36077 Not selected H8 36049 36109 The interrupt request selected in Interrupt is disabled H8S 20103 20203 20223 Selected The interrupt request selected in Interrupt is enabled Interrupt priority level Specify the priority level for the enabled interrupt type After 1 and above are specified as priority level interrupt function name can be specified The priority may n
103. WritePortBufferRegister Generated function Boolean _WritePortBufferRegister_P Port No unsigned int data Peripheral Module Event Link Controller Description Writes data to a port buffer register Parameters data Data to be written to the port buffer register Return value Returns RAPILTRUE on success a RAPILFALSE on failure REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 5 12 Peripheral Driver Generator 13 Data Transfer Controller 13 1 CreateDTC Section 5 Generated Functions Reference Generated function Boolean _CreateDTC_ Activation Source void Peripheral Module Data transfer controller Description Set DTC s register information Parameters Return value Returns RAPILTRUE on success a RAPILFALSE on failure 13 2 EnableDTC Generated function Boolean _EnableDTC_ Activation Source void Peripheral Module Data transfer controller Description Enable DTC transfer Parameters Return value Returns RAPILTRUE on success a RAPI_FALSE on failure 13 3 DisableDTC Generated function Boolean _DisableDTC_ Activation Source void Peripheral Module Data transfer controller Description Disable DTC transfer Parameters Return value Returns RAPILTRUE on success a RAPI_FALSE on failure REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS
104. _TRUE is returned 2 5 ClearInterruptFlag Generated function Boolean __ClearlnterruptFlag_ Resource _p Setting No void Peripheral Module Interrupt Description Clear the external interrupt flag Parameters Return value RAPI_TRUE is returned 3 A D Converter 3 1 _ CreateADC Generated function Boolean __CreateADC_ Mode _ Pin No Number of Pins _p Setting No void Peripheral Module A D Converter Description Create A D converter setting Parameters Return value If A D converter was successfully set RAPI_TRUE is returned if failed RAPI_FALSE is returned 3 2 _ EnableADC Generated function Boolean _ EnableADC_ Mode Pin No Number of Pins _p Setting No void Peripheral Module A D Converter Description Control A D converter operation enable Parameters Return value If A D converter was successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned Remarks This function is not generated for delayed trigger mode 0 1 in M16C 28 28B 29 3 3 __DisableADC Generated function Boolean __DisableADC_ Mode _ Pin No _ Number of Pins _p Setting No void Peripheral Module A D Converter Description Control A D converter operation disable Parameters Return value If A D converter was successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is return
105. able timer modes R8C Tiny series R8C 13 R8C 22 25 R8C 26 29 R8C 2A 2D Timer mode X Y Z RA RB RA RB RA RB Event counter mode X Y RA RA RA Pulse width modulation mode Y Z RB RB RB Pulse period measurement X RA RA RA mode Pulse width measurement mode X RA RA RA Input capture mode C RDO 1 RC RC RDO 1 RF Output compare mode C RDO 1 RE RC RE RC RDO 1 RE Table 4 4 3 Available timer modes H8 300H Tiny series H8 3687 H8 36077 H8 36049 H8 36109 Timer mode B1 V B1 V B1 V B1 V Event counter mode B1 V B1 V B1 V B1 V Pulse width modulation mode V V V V Pulse period measurement Z0 Z1 Z0 Z1 W Z0 Z1 RC RDO 3 mode Pulse width measurement mode Z0 Z1 Z0 Z1 W Z0 Z1 RC RDO 3 Input capture mode Z0 21 Z0 Z1 W Z0 Z1 RC RDO 3 Output compare mode Z0 21 Z0 Z1 W Z0 Z1 RC RDO 3 7tENESAS 4 36 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 4 4 Available timer modes SH Tiny series SH7125 Timer mode Channel 0 5 Event counter mode Channel 0 4 Pulse width modulation mode Channel 0 4 Pulse period measurement Channel 0 5 mode Pulse width measurement mode Channel 0 5 Input capture mode Channel 0 5 Output compare mode Channel 0 4 Table 4 4 5 Available timer modes H8S Tiny series H8S 20103 H8S 20203 20223 Timer mode RA RB RA RB Event counter mode RA RA Pulse width modulation mode RB RB Pulse period measurement
106. ad register value and the period of the count source Both the rising and falling edges are effective edges It is not possible to measure the high level width and low level width separately To measure them separately check the input level on the pin When an effective edge of the measurement pulse is input or the counter overflows an interrupt can be detected R8C 13 22 to 29 2A to 2D H8S 20103 20203 20223 Timer RA timer X in the R8C 13 measures the width of the external signal pulse in pulse width measurement mode The high level width and low level width can be separately measured The counter reloads the reload register value and continues counting down while the input pulse is at a specified level When measurement ends at the rising or falling edge of the input pulse an interrupt is generated and the counter stops counting down The width of the input pulse can be calculated from the obtained buffer value reload value and the period of the count source When the counter underflows or the measurement period ends a timer RA interrupt timer X interrupt in R8C 13 can be detected H8 3687 36049 36077 36109 The basic functions are the same for timers Z W RC and RD Each timer measures the width of the external signal pulse by using the input capture function Upon detecting an effective edge the timer transfers the counter value to the general register assigned to the target pin The counter clearing source cannot be specified in this
107. ag Return value If the status is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 5 25 Peripheral Driver Generator Section 6 Converting a Project 6 Converting a Project 6 1 Project Conversion Function You can convert a project setting with a certain CPU model in order to use the project with another CPU model When settings in the original are not appropriate in the converted project they are modified according to the CPU model of the converted project For information on the modification of the settings refer to the next section Note SH Tiny and H8S Tiny are not supported Jser applicatior Figure 6 1 1 Project Conversion Overview 6 2 Modifying and Displaying the Settings through Project Conversion 1 Settings are modified in the following two methods i Setting values are modified or new setting values are set e When the original setting values cannot be used in the converted project e When items are invalid in the original while new setting values are required in the converted project ii Setting items themselves are disabled e When the converted project CPU model does not support the setting items 2 Resource settings All resource settings are deleted 3 Displaying Project Conversion Results Conversion results are displayed using the icons listed in table 4 1 Table 6 2 1 Displaying Conversion Results
108. alue can be modified by selecting the Trial box When the external clock is used specify the external clock frequency here Bit Rate Specify the baud rate for the serial communication According to the specified baud rate the optimum count source and bit rate register value are selected and the error ratio is calculated Bit rate register settings This box shows the optimum value for the bit rate register which is calculated from the input clock frequency and specified baud rate Error ratio This box shows the error ratio calculated from the input clock frequency and specified baud rate Clock source When the internal clock is used this box shows the optimum division ratio for the count source which is determined according to the input clock frequency and specified baud rate When the external clock is used this box always indicates 1 Interrupt enable This item enables detection of transmit receive and SI O interrupt occurrence Select the interrupts to be detected and specify the interrupt priority levels the user created interrupt function will be called when an interrupt occurs The following explains how to set each item REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 28 Peripheral Driver Generator Permit lt interrupt type gt interruption Select the check box for each interrupt type to detect occurrence of the corresponding interrupt Table 4 2 8 shows the interrupt types that can be selected for each micro
109. alue of time measurement register 6 8 Stores the value of time measurement register 7 R8C When timer C is used RAPI_TIMER_C specified 0 Stores the value of timer C counter 1 Stores the value of capture amp compare 0 register When timer RD is used RAPI_TIMER_RDO RAPI_TIMER_RD1 specified 0 Stores the value of timer counter 1 Stores the value of general register A 2 Stores the value of general register B 3 Stores the value of general register C 4 Stores the value of general register D H8 300H 0 Stores the value of the timer counter 1 Stores the value of general register A 2 Stores the value of general register B 3 Stores the value of general register C 4 Stores the value of general register D Return value RAPI_TRUE is returned 11 Timer Output Compare Mode 11 1 CreateOutputCompare Generated function Boolean __ CreateOutputCompare_T Resource _p Setting No void Peripheral Module Timer Output Compare Mode Description Creates output compare mode setting Parameters Return value RAPI_TRUE is returned 11 2 _ EnableOutputCompare Generated function Boolean __EnableOutputCompare_T Resource _p Setting No void Peripheral Module Timer Output Compare Mode Description Outputs compare mode operation control Operation start Parameters Return value RAPI_TRUE is returned 11 3 DisableOu
110. ation Select Operation start or Operation stop for the timer operation immediately after the initial setting Event Generation Timer Interval Setting Select the event generation interval and sets the division ratio for the clock source Event Generation Timer Delay Selection Select the necessary delay time which is the time from the specified eventgeneration timing interval to the actual generation timing of the event in terms of the cycles of the selected clock source No delay 1 clock cycle 2 clock cycle or 3 clock cycle can be selected Event Generation interval This section shows the event generation interval figured out by Count source and Event Generation Timer Interval Setting Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 102 Peripheral Driver Generator 5 5 1 Generated Functions Reference Generated function of for M16C 60 M16C Tiny R8C Tiny and H8 300H Tiny Table 5 1 1 shows generated functions for M16C 60 series M16C 62P R8C Tiny series R8C 13 22 29 2A 2D and H8 300H Tiny series H8 3687 36077 36049
111. ation during initialization Select Operation start or Operation stop for the timer operation immediately after the initial setting The available settings depend on the microcomputer or timer resource Timer synchronization Leave this item unspecified Output pin select Select the pins to be used for pulse output This item may be unselectable depending on the microcomputer type and the selected serial communication resource Table 4 4 29 shows the settings available for Output pin select Table 4 4 29 Output pin select settings Microcomputer Item Description R8C 26 27 P3_0 Uses P3_0 pin for pulse output P13 Uses P1_3 pin for pulse output External trigger polarity Select the effective edge when external trigger is selected in External trigger Count start conditions The available settings depend on the microcomputer External trigger Count start conditions Specify the count start conditions The available settings depend on the microcomputer Output function This item specifies the output waveform The available settings depend on the microcomputer Table 4 4 30 shows the settings available for Output pin select Table 4 4 30 Output function settings Microcomputer Item Description M16C 62p Pulse is output Pulse is output M16C 28 28B 29 Outputs H for primary period TAiOUT pin functions as a pulse output pin Pulse is not output Pulse is not output TAiOUT pin functi
112. ation mode operation control start or Modulation Mpode stop operation 7 3 __DestroyPWM Destroy pulse width modulation mode 7 4 __DestroyPWM_ALL Destroy pulse width modulation mode REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 14 Peripheral Driver Generator Section 5 Generated Functions Reference 8 1 Timer 8 2 Pulse period measurement mode __CreatePulsePeriodMeasurementMode Initialize pulse period measurement mode __EnablePulsePeriodMeasurementMode Pulse period measurement mode operation control start or stop operation 10 2 Input capture mode 8 3 __DestroyPulsePeriodMeasurementMode Destroy pulse period measurement mode 8 4 __DestroyPulsePeriodMeasurementMode_A Destroy pulse period measurement mode LL 8 5 __GetPulsePeriodMeasurementMode Get the counter value of the timer 9 1 __CreatePulseWidthMeasurementMode Initialize pulse width measurement mode 9 2 e _ EnablePulseWidthMeasurementMode Pulse width measurement mode operation control 9 3 _ DestroyPulseWidthMeasurementMode Destroy pulse width measurement mode measurement mode 9 4 _ DestroyPulseWidthMeasurementMode_A Destroy pulse width measurement mode LL 9 5 __GetPulseWidthMeasurementMode Get the counter value of the timer 10 1 Timer __CreatelnputCapture Initialize input capture mode __EnablelnputCapture Input capture mode operation control start or stop ope
113. available for Group 1 Trigger Table 4 6 7 Group 1 trigger settings REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 91 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Microcomputer Item Description SH7125 Software trigger See Table 4 6 6 for details of the settings Select a different TRGAN trigger than that selected in Group 0 Trigger TRGON TRG4AN TRG4BN Trigger polarity Select the trigger edge when external trigger is selected as A D conversion start trigger This item may be unselectable depending on the microcomputer type Table 4 6 8 shows the settings available for Trigger polarity Table 4 6 8 Trigger polarity settings Microcomputer Item Description H8 3687 Rising edge The rising edge on the ADTRG pin is specified as the H8 36077 conversion start trigger H8 36049 Falling edge The falling edge on the ADTRG pin is specified as the H8 36109 conversion start trigger SH7125 Rising edge The rising edge is always shown in this box but this setting is not applied to the actual trigger polarity H8S 20103 Falling edge The falling edge is always shown in this box but this setting 20203 20223 is not applied to the actual trigger polarity Valid only when Hardware trigger is selected as A D conversion start trigger ADF Control When conversion pins are selected for groups 0 a
114. b clock Sub Clock Oscillation Circuit 2 Each clock setting Make the necessary settings for Main clock On chip oscillator clock PLL clock or Sub clock selected in System clock selection The CPU clock selected in System clock selection is also used as the peripheral clock Note that only the sub clock is allowed as fC32 which can be selected as the count source for timers A and B When using fC32 while a clock other than the sub clock is selected as the CPU clock make settings also for the sub clock If the sub clock is not set up fC32 cannot be selected as the count source in timer settings Table 4 1 2 shows the available combinations of clock sources for the CPU and peripheral functions Table 4 1 2 Combinations of Clock Sources for CPU and Peripheral Functions M16C 62P M16C 28 M16C 28B M16C 29 CPU clock Peripheral clock f1 to 32 fC32 Main clock Main clock Sub clock On chip oscillator clock On chip oscillator clock Sub clock PLL clock PLL clock Sub clock Sub clock Main clock On chip oscillator Sub clock clock or PLL clock Main clock Make settings for this item when the main clock is selected as the CPU clock or when the sub clock is selected as the CPU clock and the main clock is used as the peripheral function clock except for C32 e Use as peripheral function clock source This check box is always selected automatically when the main clock is used as the CPU clock Select t
115. be set up Table 4 6 3 shows how to set for each microcomputer Table 4 6 2 Module settings Microcomputer Settings SH7125 Select AD_0 or AD_1 as the module H8S 20103 20223 AD_1 is always selected H8S 20223 Select AD_1 or AD_2 as the module Input group Specify the port group that includes analog input pins to be set up Table 4 6 3 shows how to set for each microcomputer Table 4 6 3 Input group settings Microcomputer Settings M16C 62P Select group Pi i 0 2 or 10 as the ANEX group or port group that is also used as analog input pins REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 88 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules M16C 28 28B Select group PO P10 or P1 P9 as the port group that is also used as analog input pins M16C 29 Select group PO P10 P1 P9 or P9 as the port group that is also used as analog input pins R8C 13 22 27 2A 2B Select group PO or P1 as the port group that is also used as analog input pins R8C 28 29 There is no analog input pin group no group specified is always selected R8C 2C 2D Select group Pi i 0 1 7 12 or 16 as the port group that is also used as analog input pin H8 3687 Select group ANO or AN4 as the analog input pin group 36077 36049 H8 36109 Select group any i 0 4 8 or 12 as the analog input pin group SH71
116. ce code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 72 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 4 7 Output Compare Mode Table 4 4 51 shows the timer resources that can be set to the output compare mode in each microcomputer Table 4 4 51 Timer Resources Supporting Output Compare Mode in Each Microcomputer Microcomputer Series Microcomputer Group Timer Resource N16C 60 M16C 62p M16C Tiny M16C 28 28B 29 S R8C Tiny R8C 13 C R8C 22 25 RDO 1 RE R8C 26 29 RC RE R8C 2A 2D RC RDO 1 RE H8 300H Tiny H8 3687 36077 Z0 Z1 H8 36049 W Z0 Z1 H8 36109 RC RDO 3 SH Tiny SH7125 Channel 0 4 H8S Tiny H8S 20103 RC RDO 1 RE RG H8S 20203 20223 RDO 3 RE RG The following gives an overview of the output compare mode settings for each microcomputer M16C 28 28B 29 Timer S generates a maximum of 8 channel waveforms by using the waveform generating function Single phase waveform output mode phase delayed waveform output mode or set reset waveform output SR waveform output mode can be selected When the waveform generation register value in one of channels 0 to 7 matches the value of the base timer acting as an up counter the timer controls the output level in that channel Overflow interrupts and compare match interrupts 0 and 1 can be dete
117. ceiving Start transmitting Stop receiving Stop transmitting Polling reception Pollinn Fransmissinn Related item Notification Function name Bit number Clock selection Transmit interrupt Transmit Clock asynchronous SIO mode f Ready ka Figure 1 7 2 New Setup Pattern Creation Window 1 7 3 1 Displayed contents Generated File Information Window The generated file information on each function and each mode in the currently opened project file is displayed The following are listed as the generated source information Generated file name Generated function name Related item name Functional description of function Double clicking on a generated file name opens the corresponding file by using a specified editor REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 1 5 Peripheral Driver Generator Section 1 Overview 34 Peripheral Driver Generator default ex x psn Be eee Timer mode Event counter mode Pulse width modulation made Pulse period measurement mode E I70 Pes Timer mode T Setting 8 Timer type A1 4B Timer setting value 399 fest Event counter mode oy Setting B bed Timer type AO 4B Timer setting value 12 fxs Pulse width modulation mode B a Setting 8 Timer type Al Timer setting value high order bit Timer setting value low order bit Pulse period measurement mode Setting bed Timer type
118. cesecseceseceeecaeesaeseneceneseesaeeneeseseenaeeeseseeeeenaees 4 59 4 4 5 Pulse Width Measurement Mode ccccccecsecssesseesseesseeeecesecesecsaeceaeceaecseecseecaeeeseseseseeeeaeseneeeneseresersenseenaes 4 64 4 4 6 Input Capture Mode iii ccs ici ciecesee eee eens oe N E OKE A ER EE EEKE EEE 4 66 4 4 7 Output Compare Mod ssi seisseen ee gassdsiess toetaadanesesns ass bes eer E ia NAE EEOSE EEn nioeemesten bern 4 73 4 5 Setine IMENU Rene ee eee e EE E E E tert carer eye 4 83 4 6 Setting A D cConVertef isnie Ero R E EEE a E EEEE E E EE ET E AREER SRi 4 86 AY Setting DTO csr aie ad ern alread E EE aE E E EESE EELSES 4 94 Ae Sn E eoa AE AT A T AE EA OA 4 98 Generated Functions Reference ccsccsscssscssssssscsscsscsssssssesssessssessesssecssscsesesessssesenessnessscesseesscssccsesesesssessssesens 5 1 5 1 Generated function of for M16C 60 M16C Tiny R8C Tiny and H8 300H Tiny s es 5 1 52 Generated function of for SH TINY seserepan a E E E PEE eee 5 14 Converting a Project scccccsccsssssccssessscssesssssssssessscssssssesssessssessesssessssesesesenesssessscssessseesscessesssesecssscsssnsesnseoseees 6 1 6 1 Project Conversion Funct Oniiss i ccc deck scssiaes tes ceci lp east ese ed sla Sleek ees EE ESEA REER TAA aE EENES EE HEE ENEE eaaa 6 1 6 2 Modifying and Displaying the Settings through Project ComVversiOn ccscecssesseeseeeseeeeeeeeceeeeeeeeeeeeenseenees 6 1 6 3 How to Comvert a Projects cvccsecccscscesciaccscas
119. ch Resource _p Setting No unsigned short data Peripheral Module Timer Timer Mode Description Get the counter value of the timer Parameters data Pointer to a buffer storing the timer counter value Return value If timer counter value is successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned 6 Timer Event Counter Mode 6 1 _ CreateEventCounter Generated function Boolean __ CreateEventCounter_Tch Resource _p Setting No void Peripheral Module Timer Event Counter Mode Description Initialize event counter mode Parameters Return value If timer was successfully initialized RAPI_TRUE is returned otherwise RAPI_FALSE is returned 6 2 _ EnableEventCounter Generated function Boolean __ EnableEventCounter_Tch Resource _p Setting No unsigned long data Peripheral Module Timer Event Counter Mode Description Event counter mode operation control start or stop operation Parameters data Operation of the timer Set the following parameters RAPI_TIMER_ON Starts the timer in event counter mode RAPI_TIMER_OFF Stops the timer in event counter mode Return value If timer is successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 5 20 Peripheral Driver Generator 6 3 _ DestroyEventCounter Generated function Boolean __DestroyEventCounter_Tc
120. cking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 63 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 4 5 Pulse Width Measurement Mode Table 4 4 39 shows the timer resources that can be set to the pulse width measurement mode in each microcomputer Table 4 4 39 Timer Resources Supporting Pulse Width Measurement Mode in Each Microcomputer Microcomputer Series Microcomputer Group Timer Resource N16C 60 M16C 62p BO 5 M16C Tiny M16C 28 28B 29 BO 2 R8C Tiny R8C 13 X R8C 22 29 2A 2D RA H8 300H Tiny H8 3687 36077 Z0 Z1 36049 W Z0 Z1 36109 RC RDO 3 SH Tiny SH7125 Channel 0 5 H8S Tiny H8S 20103 20203 20223 RA The following gives an overview of the pulse width measurement mode settings for each microcomputer M16C 62P M16C 28 28B 29 Timer B measures the width of the external signal pulse in pulse width measurement mode The counter transfers the counter value to the reload register at an effective edge of the measurement pulse At this time the counter is cleared to 0 and then continues counting up The width of the input pulse can be calculated from the transferred relo
121. computer lt interrupt type gt interruption level Specify the priority level for the enabled interrupt type The priority may not be specified depending on the microcomputer or interrupt type Table 4 2 8 shows the interrupt types that can be enabled and the condition for calling the interrupt notification function in each microcomputer Table 4 2 8 Available Interrupt Types and Condition for Calling Interrupt Notification Function in Each Microcomputer Section 4 How to Set up Clocks and Peripheral I O Modules Microcomputer Communication Resource Interrupt Enable Setting Condition for Calling Interrupt Notification Function M16C 62p M16C 28 28B 29 UARTO to UART2 Transmit interrupt End of transmission Receive interrupt End of reception Receive error occurrence SI O03 SI O4 SI O interrupt End of transmission End of reception R8C 13 22 to 29 UARTIi 1 Transmit interrupt End of transmission R8C 2A to 2D Receive interrupt End of reception Receive error occurrence H8 3687 36077 SCI3 channel i Transmit interrupt End of transmission H8 36049 2 Receive interrupt End of reception 36109 Receive error occurrence SH7125 Channel i i 0 to 2 Transmit receive Receive error ERI interrupt Receive data full RX Transmit data empty TXI End of transmission TEI H8S 20103 SCI3 channel i Transmit interrupt End of transmission 20203 20223 i 1 to 3
122. computer type Table 4 4 66 shows the settings available for A D Converter Start Table 4 4 66 A D Converter Start setting Microcomputer Item Description H8S 20103 A D conversion start A request to start A D conversion is not generated by H8S 20203 trigger is not a compare match on each of the channels H8S 20223 generated by compare match A D conversion start A request to start A D conversion is generated by a trigger is generated compare match on each of the channels by compare match e f A D conversion should be started by a compare match on a channel for timer RC select Conversion start trigger from timer RC as the trigger of A D conversion e f A D conversion should be started by a compare match on a channel for timer RDO or RD1 select Conversion start trigger from timer RD_0 as the trigger of A D conversion e f A D conversion should be started by a compare match on a channel for timer RD2 or RD3 select Conversion start trigger from timer RD_1 as the trigger of A D conversion Only for timers RC and RDO 3 Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without stor
123. crocomputer M16C 60 M16C Tiny R8C Tiny H8 300H Tiny SH Tiny H8S Tiny M16C 62p M16C 28 M16C 28B M16C 29 R8C 13 R8C 22 29 R8C 2A R8C 2B R8C 2C R8C 2D H8 3687 H8 36077 H8 36049 H8 36109 H7125 H8S 20103 H8S 20203 H8S 20223 Single mode Repetitive mode Single sweeping mode Repetitive sweeping mode 0 Repetitive sweeping mode 1 Simultaneous sample sweeping mode Delay trigger mode 0 Delay trigger mode 1 2 channel scan mode 2 channel continuous scan mode 4 channel scan mode 4 channel continuous scan mode REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules The setting dialog box is shared by all operating modes Figure 4 6 1 shows the A D converter setting dialog box Single mode setting Module 4D_1 v Input group ano Group Input terminal ANO v Number of terminals 1 Sample and hold Sample and hold v Conversion speed 84 states v Conversion operation Conversionstop o Resolution fobs o External Op Amp E Group 0 Trigger Software tigger fh Trigger polarity Faingedge S MY Interrupt function name jad ntFunc IV Generate batch source M Setting Cancel Figure 4 6 1 A D converter setting dialog box Module Specify the module that includes analog input pins to
124. crosoft and Windows are registered trademarks of Microsoft Corporation in the United States and other countries All brand or product names used in this manual are trademarks or registered trademarks of their respective companies or organizations For inquiries about the contents of this document or product email to your local distributor Renesas Tools Homepage http www renesas com en tools REJ10J2018 0100 Rev 1 00 May 29 2009 iii Peripheral Driver Generator 1 Contents COVENVICW E E A A 1 1 1 1 PDGF Cat SS eeens sonia ces saci eas eE E EE EERE EENE EER ES EEA EEA EE EERE EEE EERE RE E ANRE 1 1 1 2 PDG Pro jechs 3 3 esr A a ess a cence sees ae E Aaa 1 1 1 3 Rol s Of the PDG rires eneee a EE E ENESE via dada ote TE OTEA ERE aE aet 1 2 1 4 Operating Environment asse A e E E 1 2 1 5 Compiler Combinations reisiin ied coves a aes eiaei a aE e aiae t adia tata ier Ueteasaeeahstateeme eae ss 1 3 1 6 APE LIDTATESe eseese couse se teens ies Lecce ses EEEa EEEE EEEE Ea Eae EE ath cea EE E eae eee 1 3 1 7 Mam Wind Wasana a E ieee oe ee 1 4 1 7 1 Setting Details Display Window cccccccesssesscesseeeecesecseesecsseceseceaecaaecaeecaeecaeseaeseaeseceeesaeenaeeeaeenaeenaeenaes 1 4 1 7 2 New Setup Pattern Creation Window cccccccccsccsscccsceacecvecesceacacntsecdeccaseccscteseadutessocseceadessedecdactadeadeectsesdeveeses 1 5 1 7 3 Generated File Information Window cccccccsssssssssscesecesecesecseecseessasensseeesneness
125. cted R8C 13 Timer C generates waveforms in output compare mode When the compare 0 or register value matches the value of the counter acting as an up counter the timer controls the output level Overflow interrupts and compare match interrupts for each register can be detected R8C 22 to 29 2A to 2D H8S 20103 20203 20223 Each timer generates waveforms in output compare mode When the general register or compare register value matches the value of the counter acting as an up counter the timer controls the output level on the pin assigned to the register In timers RC and RD the compare match can be specified as the counter clearing source In timer RE the counter is always cleared to 0 by a compare match between the compare register and the counter Overflow interrupts and compare match interrupts for each register can be detected H8 3687 36049 36077 36109 When the general register value matches the value of the counter acting as an up counter in each timer the timer controls the output level on the pin assigned to the general register The compare match can be specified as the counter clearing source Overflow interrupts and compare match interrupts for each general register can be detected SH7125 When the general register value matches the value of the counter acting as an up counter in each channel the timer controls the output level on the pin assigned to the general register The compare match can be specified as the count
126. cted 2 Valid only when timer RF is selected REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 77 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Comparative value Specify the value to be compared with the counter value to generate a compare match Table 4 4 60 shows the settings available for Comparative value Table 4 4 60 Comparative value settings Microcomputer Comparative value Description M16C 28 28B 29 Timer S Comparative value 0 7 These values are used as waveform general register values G1POj j 0 to 7 in channels 0 to 7 When one of these values matches the base timer value a waveform can be output from the pin assigned to the corresponding channel and compare match interrupts 0 and 1 can be generated The details of the output waveform and interrupts should be specified in each channel setting R8C 13 Timer C Comparative value 0 1 These values are used as compare 0 and 1 register values When either value matches the counter value the corresponding compare i interrupt i 0 or 1 can be generated and a waveform can be output from CMPi i 0 or 1 The details of the output waveform and interrupt should be specified in each channel setting R8C 26 29 Timer RC R8C 2A 2D Timer RC R8C 22 25 Timer RD R8C 2A 2D Timer RD Comparative value A D These values are used as general register A to D values When
127. ction At an effective edge of the external signal the timer transfers the base timer value to the G1TMJ j 0 to 7 register The effective edge rising falling or both interrupt and filter function can be specified separately for each of eight channels The interval time can be calculated from the base timer values at the time measurement start and end points which are obtained through the G1TMj j 0 to 7 register and the period of the count source The counter is always used as an up counter and the counter clearing source cannot be specified in this mode Base timer overflow interrupts and compare match interrupts 0 and 1 can be detected R8C 13 Timer C measures the interval of changes in the external signal in input capture mode At an effective edge of the external signal the timer stores the counter value in the TMO register The counter starts counting from 0 and continues until it overflows The counter cannot be cleared The interval time can be calculated from the base timer values at the time measurement start and end points which are obtained through the TMO register and the period of the count source Overflow interrupts can be detected R8C 22 to 29 2A to 2D H8S 20103 20203 20223 Each timer measures the interval of changes in the external signal in input capture mode When an effective edge is detected the timer transfers the counter value to the register assigned to the target pin The interval time can be calculate
128. d value 10 1 Timer ___CreatelnputCapture Assigns event signals 10 2 Input capture mode EnablelnputCapture Input capture mode operation control Operation start 10 3 DisablelnputCapture Input capture mode operation control Operation stop 10 4 _ DestroylnputCapture Destroy input capture mode 10 5 ___GetInputCapture Get input capture mode counter value 11 1 Timer __CreateOutputCompare Create output compare mode setting 11 2 Output compare mode __EnableOutputCompare Output compare mode operation control Operation start 11 3 __DisableOutputCompare Output compare mode operation control Operation stop 11 4 __DestroyOutputCompare Destroy output compare mode 12 1 Event Link Controller __SetEventLink Create ELC settings 12 2 Only in H8S Tiny __DisableEventLink Disable ELC settings 12 3 __CreateEventGenerateTimer Set event generation timer 12 4 __EnableEventGenerateTimer Enable event generation timer 12 5 __DisableEventGenerateTimer Disable event generation timer 12 6 __DestroyEventGenerateTimer Destroy event generation timer 12 7 __ReadPortBufferRegister Read from port buffer register 12 8 __WritePortBufferRegister Write to port buffer register 13 1 Data Transfer Controller __CreateDTC Set DTC register information 13 2 Only in H8S Tiny __EnableDTC Enable DTC activation source 13 3 __DisableDTC Disable DTC activation source REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 2 Periphe
129. d Function Information cccccescesceesceeeeeseeesecececaeecaeecseseeeseeecaeeeneseeesesesereseeeeeeeenaees 3 12 3 9 Registering Generated Files in a HEW Project ccecccccseesceeseeeseeescesecesecaecasecaeecaeeeaeesaeeseeeeeeeseaeeneeeeenaeenaes 3 12 3 9 1 Registration Functio sse a E a nae ese areas eee needs 3 12 3 9 2 How to Register Generated Files ccccceccseecessceseeeseeeeceseceeeceaecsaecaeecaeecaeseaeseeeeeeeseeenseeeeeseaeesaeeeeeeseaees 3 13 3 9 3 Canceling Registration Of Files i cc ccccceccseveeescsccaesssecdecsaseddaessdeedecceseceuceaeedeceodeesacuadeesscesdesedevsdecdaceadescae 3 14 REJ10J2018 0100 Rev 1 00 May 29 2009 iv Peripheral Driver Generator 4 gn How to Set up Clocks and Peripheral I O Modules cssscssscosssecssccesccecssscesceeccccesscescscssesceesscsssceesesesessseeees 4 1 4 1 Detling COCK Sse E E E E a EE 4 1 4 1 1 Setting Clocks for M16C 62P M16C 28 M16C 28B and M16C 29 sse sssssssssesisisrsisrsrsrsrsrrisrsrereeererereene 4 1 4 1 2 Setting Clocks for R8C 13 vsciessveccesccissideccaeczscescsesschazaceta shee A E EE PE E E SEES EN aE i ie 4 4 4 1 3 Setting Clocks for R8C 22 23 vases ccs ccessesecene sasetesiaae eee satentessones seu so sedantetesaees Dietarsstycacsietavdesouteayebepverstastacts 4 6 4 1 4 Sette Clocks Tor RECA 2 Spernia oeae a oE EO A A aa O e EERS 4 8 4 1 5 Setting Clocks for R8C 26 29 R8C 2A 2D erisin iieiea eis roir Eei ieee nEaN EESE EErEE EE
130. d as the counter clearing source in Counter clear function H8S 20103 Operate independently The timer counter operates independently of the others H8S 20203 Master of timer The timer counter operates in synchronization with the H8S 20223 synchronous operation others RDO with RD1 or RD2 with RD3 The counter clearing source specified in Counter clear function also clears the counters in the other synchronized timer Performs synchronous This setting can be selected only when Master of timer operation synchronous operation is selected in another timer The counter is cleared by the counter clearing source specified in the timer set as Master of timer synchronous operation Only Clear synchronization can be selected as the counter clearing source in Counter clear function REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 75 Peripheral Driver Generator Counter clear function Section 4 How to Set up Clocks and Peripheral I O Modules Select the counter clearing source This item may be unselectable depending on the microcomputer type Table 4 4 54 shows the settings available for Counter clear function Table 4 4 54 Counter clear function settings Microcomputer Item Description R8C 22 25 Disable clearing The counter is not cleared R8C 2A 2D Clears by lt general register The counter is cleared by compare match of bese name gt compare match selected general reg
131. d from the base timer values at the time measurement start and end points which are obtained through the register and the period of the count source The counter starts counting from 0 and continues until it overflows but only in timer RD in the R8C 22 to 25 and 2A to 2D H8S 20103 20203 20223 the counter clearing source can be specified Counter overflow interrupts and input capture interrupts for each pin can be detected H8 3687 36049 36077 36109 The basic functions are the same for timers Z W RC and RD Each timer measures the interval of changes in the external signal in input capture mode When an effective edge is detected the timer transfers the counter value to the general register assigned to the target pin The counter starts counting from 0 and continues until it overflows but in timer Z in the H8 3687 36077 and 36049 and in timer RD in the H8 36109 it can be specified to clear the counter by an input capture Counter overflow interrupts and input capture interrupts for each pin can be detected REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 66 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules SH7125 The timer transfers the counter value to the general register assigned to the external signal input pin when an effective edge is detected Setting the counter clearing source to the input capture in the general register assigned to the pulse input pin causes the counter to be c
132. during initialization Operation star Rome Period 1 200000 893 333333 Hz Setting value Prescaler setting value 124 i Timer setting value primary 95 Timer setitng value secondary 95 IV Generate batch source M Output function Primary period H output Secondary period L output L output at timer stop ance Figure 4 4 6 Pulse width modulation mode setting dialog box M16C 60 M16C Tiny R8C Tiny H8 300H Tiny and H8S Tiny Timer type Select the timer resource to be set up Selecting Timer type none allows the timer setting to be made with no resource being selected here and any resource can be assigned to the setting Note that Timer type none is not available for the H8S Tiny Count source Select the count source for the counter Frequency of count source This box shows the frequency of the selected count source Clock edge Leave this item unspecified PWM mode selection Specify the operation of the pulse width modulator The available output pulses depend on the operation of the pulse width modulator The available settings depend on the microcomputer Table 4 4 27 shows the settings available for PWM mode selection REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 55 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 4 27M mode selection settings Microcomputer Item Description M16C 62P Function as a 16 bit The following gi
133. e Description Output compare mode operation control start or stop operation Parameters data Operation of the timer Set the following parameters RAPI_TIMER_ON Starts the timer RAPI_TIMER_OFF Stops the timer Return value If timer is successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned 11 3 DestroyOutputCompare Generated function Boolean __DestroyOutputCompare_Tch Resource _p Setting No void Peripheral Module Timer Output Compare Mode Description Destroy output compare mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 11 4 DestroyOutputCompare_ ALL Generated function Boolean __ DestroyOutputCompare_ALL void Peripheral Module Timer Output Compare Mode Description Destroy output compare mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 11 5 _ GetTimerFlag Generated function Boolean __GetTimerFlag_Tch Resource _p Setting No nsigned long data1 unsigned char data2 Peripheral Module Timer Output Compare Mode Description Get the flag of timer Parameters data1 Status flags to be acquired Set the following parameters To set multiple parameters at the same time use the symbol to separate each specified parameter
134. e CPU clock e Use as peripheral function clock source This check box is always selected automatically when the main clock is used as the CPU clock e Input frequency to main clock circle Specify the frequency of the main clock On chip oscillator clock Make settings for this item when the on chip oscillator clock is selected as the CPU clock or when the on chip oscillator clock is used as the peripheral function clock e Use as peripheral function clock source This check box is always selected automatically when the on chip oscillator clock is used as the CPU clock Select this box manually when using the clock other than the on chip oscillator clock as the CPU clock and using the on chip oscillator clock as the peripheral function clock e Frequency selection Select the high speed or low speed which respectively corresponds to the high speed on chip oscillator or low speed on chip oscillator e Periodic value Leave this item unspecified e Divider selection Specify the divider of on chip oscillator Only Divided by 1 can be specified when using the low speed on chip oscillator e On chip oscillator frequency This box shows the on chip oscillator frequency calculated from the oscillation frequency and clock division ratio Sub clock Make settings for this item when the sub clock is selected as the CPU clock or when the sub clock is used as the peripheral function clock e Use as peripheral function clock
135. e The period of the pulse input through the selected pin is GRx measured When an effective edge is detected the counter x A to D U V W value is transferred to the corresponding general register GRx Gate function Set up the gate function This item may be unselectable depending on the microcomputer type or timer resource Table 4 4 37 shows the settings available for Gate function Table 4 4 37 Gate function settings Microcomputer Item Description H8S 20103 Do not use gate function The gate function will not be used H8S 20203 Count while input on the An external event input is enabled when the IRQ2 H83 20223 IRQ2 pin is high pin is at a high level Interruption This item enables detection of interrupt occurrence Select the interrupts to be detected and specify the interrupt priority levels the user created interrupt function will be called when an interrupt occurs The following explains how to set each item Enable lt interrupt type gt interrupt Select the check box for each interrupt type to detect occurrence of the corresponding interrupt The detectable interrupts depend on the timer type Table 4 4 38 shows the interrupt types that can be enabled in each microcomputer Table 4 4 38 Available Interrupt Types in Each Microcomputer Microcomputer Interrupt Type Description M16C 62P M16C 28 28B 29 Interrupt at overflow effective edge input
136. e can supply REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 8 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 1 11 Clocks each clock source can supply R8C 24 25 Clock source Clocks Main clock CPU clock Peripheral clock f1 f32 Sub clock CPU clock Peripheral clock fC4 fC32 On chip oscillator High speed CPU clock Peripheral clock f1 to 32 fOCO fOCO F fOCO40M f1 to 82 fOCO fOCO S e J dL clock Low speed CPU clock Peripheral clock When it is necessary to use another clock in addition to those supplied by the clock source selected in System clock selection select the Use as peripheral function clock source check box for that additional clock and make the necessary settings Table 4 1 12 shows the available combinations of clock sources for the CPU and peripheral functions Table 4 1 12 Combinations of Clock Sources for CPU and Peripheral Functions R8C 24 25 CPU clock Peripheral clock f1 to f32 fC4 fC32 fOCO40M fOCO fOCO F Main clock Main clock Sub clock On chip oscillator clock On chip oscillator clock On chip oscillator clock Sub clock On chip oscillator clock Sub clock Main clock Sub clock On chip oscillator clock On chip oscillator clock Sub clock On chip oscillator clock Main clock Make settings for this item when the main clock is selected as the CPU clock or when the sub
137. e counter Count source divider n Specify the divider register value This item may be unselectable depending on the microcomputer type Table 4 4 52 shows the settings available for Count source divider n Table 4 4 52 Divider register value settings Microcomputer Description When value n is specified here counting is done with the frequency obtained by dividing the count source by n 1 A value from 0 to 255 can be specified When 0 is specified the count source frequency is not divided M16C 28 28B 29 REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 74 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Frequency of count source This box shows the frequency of the selected count source This item may not be enabled depending on the microcomputer type This item is not available for the 16C Tiny series Operation during initialization Select Operation start or Operation stop for the timer operation immediately after the initial setting The available settings depend on the microcomputer or timer resource Clock edge Select the clock edge to be used for count This item may be unselectable depending on the microcomputer type Timer synchronization Specify synchronous operation between channels This item may be unselectable depending on the microcomputer type Table 4 4 53 shows the settings for Timer synchronization Table 4 4 5
138. e enabled in advance External trigger ADTRG1 An input to the ADTRG1 pin is the trigger to start A D conversion pin H8S 20203 Conversion start trigger A compare match interrupt generated by timer RDO or RD1 is the from timer RD_O trigger to start A D conversion A D conversion started by timer RDO or RD1 must be enabled in advance Conversion start trigger A compare match interrupt generated by timer RD2 or RD3 is the from timer RD_1 trigger to start A D conversion A D conversion started by timer RD2 or RD3 must be enabled in advance External trigger ADTRG1 An input to the ADTRG1 pin is the trigger to start A D conversion pin H8S 20223 Conversion start trigger A compare match interrupt generated by timer RDO or RD1 is the from timer RD_O trigger to start A D conversion A D conversion started by timer RDO or RD1 must be enabled in advance Conversion start trigger from timer RD_1 A compare match interrupt generated by timer RD2 or RD3 is the trigger to start A D conversion A D conversion started by timer RD2 or RD3 must be enabled in advance External trigger ADTRG1 pin An input to the ADTRG1 pin is the trigger to start A D conversion Note If AD_2 has been selected as the module the ADTRG2 pin is also available Group trigger This item specifies the trigger for group 1 in the SH7125 when 2 channel scan mode or 2 channel continuous scan mode is selected Table 4 6 7 shows the settings
139. eInputCapture Generated function Boolean __DisablelnputCapture_T Resource _p Setting No void Peripheral Module Timer Input Capture Mode Description Input capture mode operation control Operation stop Parameters Return value RAPI_TRUE is returned 10 4 DestroyInputCapture Generated function Boolean __DestroylnputCapture_T Resource _p Setting No void Peripheral Module Timer Input Capture Mode Description Destroy input capture mode Parameters Return value RAPI_TRUE is returned 10 5 _ GetInputCapture Generated function Boolean __GetInputCapture_T Resource _p Setting No unsigned int data Peripheral Module Timer Input Capture Mode Description Get input capture mode counter value Parameters data Specify a pointer to the array in which the acquired counter value is stored M16C 0 Stores the value of base timer register 0 1 Stores the value of time measurement register 0 2 Stores the value of time measurement register 1 3 Stores the value of time measurement register 2 4 Stores the value of time measurement register 3 5 Stores the value of time measurement register 4 6 Stores the value of time measurement register 5 REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 5 10 Peripheral Driver Generator Section 5 Generated Functions Reference 7 Stores the v
140. easesecaecauecsaecaeeeaessaeenaeeaes 1 5 1 8 MSNU esie a E E E Selb atsabacss tents ceaccactasscncu bstcotateneea a erg 1 7 1 9 TOMB ats ccaves coves ses nenie ots Cede a E E EE E A i E e Eaa E EEE E EEE EE 1 10 Preparation fOr Usine the PDG vvssccccessscosscvsscssenssssesosvexsesscvssendesveasosasvtesesentsdsosesvease iecseasese svestesasvsbeodesess EESE SEs sarii 2 1 2 1 Tnstalline the PDG rere R ree secs eee E E 2 1 2 2 Setting AWE AOL sseni ee e EENE e ER E Eoo eE RE E NEEESE EE EERE E 2 1 2 3 Registering the PDG in the HEW ccccescssessseeseesseeeeceseeeseceaeceaeceaecsaecaeecaeesaecaeeeaeeeneseeeeeeeseeeeeserseeseeeesenaees 2 2 2 4 Setting Hew lareets crver eetere nr EEEE AAE RE EE E ER 2 4 How to Operate the PDG cscsssesssssssssssessessscsssesssessssssssesssesssesssessensenessnsesecssesssessscesscssccsesssesssessssesssesssessoeess 3 1 3 1 Developing an Application with the PDG 00 ccecccesccssessseeseeeeeeeecesecesececesecaeeeaeceaecsaecaaecaeecseseaeseeeeeaeeesenaeenaes 3 1 BZ PIG Opetrarion el Oy sie is tees a E E pew sticeest eee neva es A E aac 3 2 3 3 Creating Opening a ProjeCt isiin ei arein Eai E sE NE ESEE REEERE EPERE E EES E EROARE PERES 3 3 3 3 1 Creating a New Project aecnnsernsiiesiss annae aneneen vena Aeaee ora EEEE a tueebessatecestnses diseasesnecesatesentenneetens 3 3 3 3 2 Opening ai Existing Project siniraman siei e eoan aai e EA aan Sab Ea aSa E E EE SEE cease 3 6 3 3 3 Setting CPU Clock v vz cesties
141. ecified in TGRA and TGRB and output from the TIOCC pin at compare matches specified in TGRC and TGRD The TGR specified as the counter clearing source works as the period setting register Independent operation or synchronous operation can be specified between channels PWM waveforms are output using one TGR as the period setting register and the others as duty registers At a compare match specified in each TGR a specified value is output from the pin assigned to that TGR Upon counter clearing by a compare match with the TGR specified as the period setting register the value output from each pin changes to the initial value set in the corresponding TGR Independent operation or synchronous operation can be specified between channels Item Mode 1 Mode 2 REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 51 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Count source Select the count source for the counter Frequency of count source This box shows the frequency of the selected count source Clock edge Select the clock edge to be used for count This item may be unselectable depending on the microcomputer type Operation during initialization Select Operation start or Operation stop for the timer operation immediately after the initial setting The available settings depend on the microcomputer or timer resource Timer synchronization Specify synchronous operation b
142. ed Remarks This function is not generated for delayed trigger mode 0 1 in M16C 28 28B 29 3 4 __ DestroyADC Generated function Boolean __DestroyADC_ Mode _ Pin No _ Number of Pins _p Setting No void Peripheral Module A D Converter Description Destroy A D converter setting Parameters Return value If converter setting was successfully discarded RAPI_TRUE is returned if failed RAPI_FALSE is returned 3 5 _GetADC Generated function Boolean GetADC_ Mode Pin No _ Number of Pins _p Setting No _ad Register unsigned int data Peripheral Module A D Converter Description Get the A D conversion value Register 0 Parameters data Pointer to the buffer in which A D converted value is stored Return value If A D converted value was successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 5 Peripheral Driver Generator 3 6 _GetADCAII Section 5 Generated Functions Reference Generated function Boolean __GetADCAII_ Mode _ Pin No _ Number of Pins _p Setting No unsigned int data Peripheral Module A D Converter Description Get the A D conversion value All registers Parameters data Pointer to the buffer in which A D converted value is stored For details refer to the Renesas Embedded Application Programmin
143. ed hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information When exporting the products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations Renesas Electronics has used reasonable care in preparing the information included in this document but
144. egistered in the HEW project so that no collision between interrupt functions occurs When the already registered intprg c file contained user codes it is required that the user codes be manually copied into the newly registered intprg c REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 12 Peripheral Driver Generator Section 3 How to Operate the PDG 3 9 2 How to Register Generated Files Generated files can be registered by the steps below when the sources has already been generated 1 Select Tool gt Register file in HEW project from the menu 2 When the HEW is not launched the message dialog box appears asking whether to launch it or not Click Yes A Do you really want to start up HEW Figure 3 9 1 Message Asking whether to Launch the HEW PDG 3 The message dialog box appears asking whether to register the files or not When the work space is being opened with HEW the source file thus generated is registered in the active project When no work space is opened with HEW the generated source file is registered in the active project after the work Space was selected When several work spaces are being opened note that a file is registered in all work spaces Do you really want to start source file registration vet E Figure 3 9 2 Message Asking whether to Register the Files PDG When a HEW workspace in which the files are to be registered has already been opened 4 Click Yes e When a
145. elected REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 1 8 Peripheral Driver Generator Section 1 Overview Main menu Sub menu Description Set port P Sets a port for a setup pattern of I O 1 Only available when T O setting is selected Delete port L Deletes a port from a setup pattern of I O 1 Only available when a port is selected Timer Newly Timer Mode T Creates a new setup pattern of timer mode 1 T create Only available when a project is opened setting Event Counter Mode E Creates a new setup pattern of event counter mode 1 N Only available when a project is opened Pulse Width Modulation Mode M Creates a new setup pattern of pulse width modulation mode 1 Only available when a project is opened Pulse Period Measurement Mode P Creates a new setup pattern of pulse period measurement mode 1 Only available when a project is opened Pulse Width Measurement Creates a new setup pattern of pulse width measurement mode 1 Mode W Only available when a project is opened Input Capture Mode 1 Creates a new setup pattern of input capture mode 1 Only available when a project is opened 2 Output Compare Mode O Creates a new setup pattern of output compare mode 1 Only available when a project is opened 2 Duplicate setting C Duplicates a setup pattern of a timer 1 Only available when timer setting is selec
146. en Setting is selected on the trees in the left of the main window 1 Select Setting on the trees in the left of the main window and then select Function gt Serial A D I O Timer or INT gt Delete setting from the menu or right click on Setting and then select Delete setting from the pop up menu 2 The selected setup pattern is deleted 3 5 Allocating and Deleting a Resource 3 5 1 Allocating a Resource You can allocate a resource peripheral I O module to a setup pattern to which no resource is allocated according to each peripheral function Only one resource can be allocated to each setup pattern A resource can be allocated only when Setting is selected on the trees in the left of the main window 1 Select Setting except for CPU clock on the trees in the left of the main window and then select Function gt Serial A D I O Timer or INT gt UART number setting Input group pin setting Port setting Timer setting or Interrupt setting from the menu or right click on Setting on the trees in the left of the main window and then select Resource setting from the pop up menu 2 Select a resource that you wish to allocate to the selected setup pattern in the Resource setting dialog box 3 After clicking on OK closes the dialog box the resource is allocated to the selected setup pattern At the same time a message appears if allocating the resource disables some items Also note that a
147. equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems medical equipment or systems for life support e g artificial life support devices or systems surgical implantations or healthcare intervention e g excision etc and any other applications or purposes that pose a direct threat to human life You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under ce
148. er Table 4 4 9 shows the settings available for Timer output Table 4 4 8 Timer output settings Microcomputer Item Description M16C 62p 1 Pulse is output Uses TAiOUT pin for input output port M16C 28 1 M16C 28B 1 Pulse is not output Uses TAiOUT pin for pulse output M16C 29 1 SH7125 2 Output retained TIOCij 4 output level is retained Initial output is 0 O output at compare TIOCij 4 initial output value is 0 0 output at compare match 3 match Initial output is 0 1 output at compare TIOCij 4 initial output value is 0 1 output at compare match 3 match Initial output is 0 Toggle output at compare TIOCij 4 initial output value is 0 Toggle output at match 3 compare match REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 39 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Initial output is 1 O output at compare TIOCij 4 initial output value is 1 0 output at compare match 3 match Initial output is 1 1 output at compare TIOCij 4 initial output value is 1 1 output at compare match 3 match Initial output is 1 Toggle output at compare TIOCij 4 initial output value is 1 Toggle output at match 3 compare match 1 Valid only when timer A is selected 2 Valid only when any of channel 0 to 4 is selected 3 Selectable when periodic is selected as operation 4i 0to 4 j AtoD Clock output function
149. er clearing source Overflow interrupts and compare match interrupts for each general register can be detected REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 73 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Figure 4 4 10 shows the Output compare mode setting dialog box Output compare mode setting Timer type RDO Interruption V Enable Overflow interruption Overflow interruption function name Count source TimerlntFunc Frequency of count source 5 000000 MHz k edg E Operation during initialization Operation stop i ttt Ti F pi re Operate independently X Counter clear function Disables clearing X oain Foo y z p Channel used M GRA M GRE M GRC M GRD n 2 r m r E L j gra Interruption IV i Compare matching interruption TimerntFunc Comparative value A Initial output fo output bs Besta Output waveform fo output s Comparative value C re 0 output mode Comparative value D A D Converter Start Not generated by compare match x M Generate batch source M Cancel Figure 4 4 10 Output compare mode setting dialog box Timer type Select the timer resource to be set up Selecting Timer type none allows the timer setting to be made with no resource being selected here and any resource can be assigned to the setting Note that Timer type none is not available for the SH7125 or H8S Tiny Count source Select the count source for th
150. er setting value Timer RA prescaler register reload value Timer setting value Timer RA timer register reload value H8 3687 36077 36049 36109 1 Reload value Counter reload value SH7125 2 Comparative value General register value H8S 20103 20203 20223 Prescaler setting value Timer RA prescaler register reload value Timer setting value Timer RA timer register reload value 1 Valid only when timer B1is selected 2 Valid only when periodic is selected as operation Interruption This item enables detection of overflow underflow and compare match interrupt occurrence Select the interrupts to be detected and specify the interrupt priority levels the user created interrupt function will be called when an interrupt occurs The following explains how to set each item Permit lt interrupt type gt interruption Select the check box for each interrupt type to detect occurrence of the corresponding interrupt The detectable interrupts depend on the timer type lt interrupt type gt interruption level Specify the priority level for the enabled interrupt type The priority may not be specified depending on the microcomputer or interrupt type Interrupt function name Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here
151. eral function clock source This check box is always selected automatically when the Sub clock is used as source of system operation clock o in System clock selection Even if another clock source has been selected for System clock selection this checkbox is automatically selected because the sub clock is used as a peripheral clock sub e Input frequency to sub clock circle The sub clock frequency is fixed at 0 03276 MHz e Sub clock divider Only Divided by 1 can be specified e Sub clock This box shows the sub clock frequency calculated from the sub clock input frequency and clock division ratio It is fixed at 0 03276 MHz REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 22 Peripheral Driver Generator 3 System clock setting Section 4 How to Set up Clocks and Peripheral I O Modules Specify the frequency division ratio used to supply the clock selected in 1 System clock selection to the CPU and peripheral function clocks e CPU and peripheral clock frequency This box shows the frequency of the clock specified in 1 System clock selection dbase e System clock divider selection Specify the divider of system clock divider The output clock of system clock divider is 9 e CPU DTC and Peripheral tabs Make the necessary settings for the CPU and peripheral function clocks Table 4 1 27 shows the details of each item Table 4 1 27 System Clock Settings H8S 20103 H8S 20203 H8S 20223
152. ettings for this item when the on chip oscillator clock is selected as the CPU clock or when the main clock is selected as the CPU clock and the fRING is used as the count source for timer e Use as peripheral function clock source This check box is always selected automatically when the on chip oscillator clock is used as the CPU clock Select this box manually when using the main clock as the CPU clock and using the fRING e Frequency selection Select the high speed or low speed which respectively corresponds to the high speed on chip oscillator or low speed on chip oscillator e Periodic value Specify this value when using the high speed on chip oscillator Specify the value to be set in the high speed on chip oscillator control register 1 HR1 to determine the period of a high speed on chip oscillator cycle e Divider selection Specify the divider of on chip oscillator Only Divided by 1 can be specified when using the low speed on chip oscillator e On chip oscillator frequency This box shows the on chip oscillator frequency calculated from the oscillation frequency periodic value and clock division ratio 3 System clock setting Specify the frequency division ratio used to supply the clock selected in 1 System clock selection to the CPU e CPU and peripheral clock frequency This box shows the frequency of the clock specified in 1 System clock selection e System clock divider selection Leave this item un
153. etween channels Table 4 4 25 shows the settings for Timer synchronization Table 4 4 25 Timer synchronization settings Item Description Operate The channel operates independently of the others Specify a TGR in the channel as the independently counter clearing source in Counter Master of timer The channel operates in synchronization with other channels The counter clearing source synchronous specified in Counter also clears the counters in the other synchronized channels operation Performs This setting can be selected only when Master of timer synchronous operation is selected synchronous in another channel The counter is cleared by the counter clearing source specified in the operation channel set as Master of timer synchronous operation Only Clear synchronization can be selected as the counter clearing source in Counter clear function Output pin select Leave this item unspecified External trigger polarity Leave this item unspecified External trigger Count start conditions Leave this item unspecified Output function Leave this item unspecified Counter clear function Specify the counter clearing source Table 4 4 26 shows the settings for Timer synchronization Table 4 4 26 Timer synchronization settings Item Description Clears by GRA compare match The selected TGR in the channel works as the counter clearing source Clears by GRB compare
154. evel Rising edge Don t care Low level Falling edge Don t care Rising edge Low level Don t care Falling edge High level Up count High level Falling edge Down count Low level Rising edge Don t care Rising edge High level Don t care Falling edge Low level Don t care Phase Counting Mode 4 High level Rising edge Up count Low level Falling edge Rising edge Low level Don t care Falling edge High level High level Falling edge Down count Low level Rising edge Rising edge High level Don t care Falling edge Low level REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 45 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Count source Select the target event to be counted Frequency of count source Leave this item unspecified Clock edge Select the edge of the clock to be counted when the external signal is selected as the target event Setting value Specify the value to be set to each register The necessary settings depend on the microcomputer type Table 4 4 17 shows the necessary settings for each microcomputer Table 4 4 17 Setting value settings Microcomputer Set value Description value M16C 62p Timer setting value Counter reload value M16C 28 28B 29 Timer setting value Counter reload value R8C 13 Prescaler setting Prescaler X or Y register reload value Timer setting value Timer X or Y register reload value R8C 22 29 2A 2D Prescal
155. fOCO40M fOCO and fOCO F which can be selected as the count source for timer or operating clock for A D converter When using fOCO40M fOCO or fOCO F while the main clock is selected as the CPU clock make settings also for the on chip oscillator clock If the on chip oscillator clock is not set up fOCO40M fOCO and fOCO F cannot be selected as the count source in timer settings or operating clock in A D converter settings Table 4 1 8 shows the available combinations of clock sources for the CPU and peripheral functions REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 6 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 1 8 Combinations of Clock Sources for CPU and Peripheral Functions R8C 22 23 CPU clock Peripheral clock f1 to 32 fAD fOCO40M fOCO fOCO F Main clock Main clock On chip oscillator clock On chip oscillator clock On chip oscillator clock On chip oscillator clock Main clock Make settings for this item when the main clock is selected as the CPU clock e Use as peripheral function clock source This check box is always selected automatically when the main clock is used as the CPU clock e Input frequency to main clock circle Specify the frequency of the main clock The frequency from 0 MHz to 20MHz can be set On chip oscillator clock Make settings for this item when the on chip oscillator clock is selected as the CPU clock or when the ma
156. fault Serial __CloseSi Boolean __CloseSerialDriver_async_UO_pi void Close the appointed serial I F ci renesas PDG_proj default Serial __ConfigSer Boolean __ConfigSerialDriverNotify_async_UO c renesas PDG_proj default Serial __SetSerialF Boolean __SetSerialFormat_async_UO_pi void Change serial setting ci renesas PDG_proj default Serial __SetSeriall Boolean __SetSeriallnterrupt_async_UO_p1 void Set up serial interrupt ci renesas PDG_proj default Serial__StartSeria Boolean __StartSerialReceiving_async_UO_p1 Start receiving cijrenesas PDG_proj default Serial __StartSeria Boolean __StartSerialSending_async_UO_pif u Start transmitting ci renesas PDG_proj default Serial __StopSerial Boolean __ StopSerialReceiving_async_UO_pi Stop receiving ci renesas PDG_proj default Serial __StopSerial Boolean __StopSerialSending_async_UO_p1 void Stop transmitting ci renesas PDG_proj default Serial __PollingSeri Boolean _ PollingSerialReceiving_async_UO_p1 Polling reception clrenesasiPNG nrniidefaultSeriall PollinnSeri Ranlean PailinnSerialSendinn asvne LIN nif Pailinn transmission OpentInitialize the appointed serial Register the appointed type of notif Notification Function name Bit number Clock selection Transmit interrupt Transmit Clock asynchronous SIO made Ready Figure 1 7 1 Setting Details Display Window REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 1
157. for the input voltages on selected multiple pins e Repeat sweep mode 0 A D conversion is done repeatedly for the input voltages on selected multiple pins e Repeat sweep mode 1 A D conversion is done repeatedly for the input voltages on all pins with priority given to selected pins e Simultaneous sample sweep mode A D conversion is done once for the input voltages on selected pins The input voltages of ANO and ANI are sampled simultaneously using two sample and hold circuits e Delayed trigger mode 0 This mode is available only in the M16C 28 28B and 29 Single sweep A D conversion begins when timer BO underflows After conversion on the ANO pin is completed the input to the AN1 pin is not sampled or converted until timer B1 underflows Single sweep conversion is restarted with the AN1 pin when timer B1 underflows e Delayed trigger mode 1 This mode is available only in the M16C 28 28B and 29 Single sweep A D conversion begins when the input to the ADTRG pin changes from a high level to a low level at the falling edge After conversion on the ANO pin is completed the input to the AN1 pin is not sampled or converted until the second falling edge on the ADTRG pin Single sweep conversion is restarted with the AN1 pin at the second falling edge on the ADTRG pin e 2 channel scan mode In the SH7125 four channels of analog input in each A D module A D module 0 or 1 are divided into groups 0 and 1 and triggers for activation of groups 0 and
158. fter the resource is allocated settings that require to be modified are marked with g icons in the setting list 3 5 2 Deleting a Resource You can delete a resource allocated in Resource setting An allocated resource can be deleted only when it is selected on the trees in the left of the main window 1 Select lt resource name gt on the trees in the left of the main window and then select Function gt Serial A D I O Timer or INT gt Delete UART number Delete input group input pin Delete port Delete timer or Delete interrupt from the menu or right click on lt resource name gt on the trees in the left of the main window and then select Delete resource from the pop up menu 2 The selected resource is deleted REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 11 Peripheral Driver Generator Section 3 How to Operate the PDG 3 6 Generating Sources Collectively You can generate source codes according to the function settings of the currently opened project Source codes can be generated when a resource is allocated to at least one of the created setup patterns 1 Select File gt Generate Sources Collectively from the menu 2 Source files are generated and stored in the same directory as the currently opened project At the same time information on those files is shown in the Generated File Information window If you create a setup pattern and check the Generate batch source check box in
159. g Interface Reference Manual _GetADCAII section Return value If A D converted values were successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned 3 7 _ GetADCStatus Generated function Boolean __GetADCStatus_ Mode _ Pin No _ Number of Pins _p Setting No unsigned int data Peripheral Module A D Converter Description Get the A D converter status Parameters data Pointer to the buffer in which the register content indicating A D converter status is stored The status of interrupt bit when using the M16C or R8C or the value of A D end flag when using the H8S or H8 300H is stored in the first low order bit of status Furthermore the status of A D conversion start flag is stored in the second low order bit of status When used in the M16C the value of A D conversion status register 0 is stored in the 8 high order bits of status Return value If A D converter status was successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned 3 8 _ClearADCStatus Generated function Boolean __ClearADCStatus_ Mode _ Pin No _ Number of Pins _p Setting No unsigned int data Peripheral Module A D Converter Description Clear the A D converter status Parameters data Status of A D converter Clears the status flag of a specified A D converter Specify the status of interrupt bit when using the M16C or R8C or the value of A
160. g Project Open an existing project through the following steps 1 Select File gt Open from the menu to open the Open File dialog box 2 Select a project that you wish to open and click on the Open button or double click on the file name 3 The selected project opens 4 Peripheral Driver Generator default F File E Function U Display ToD win Help H osa ME AH s Zx SSSSRRES ASSESSES S CPU H8 3687 k Setting X Divide ratio of on chip oscilla System clock frequency MHz 20 000000 Selection of on chip oscillato CPU setting Selection of PLL multiplier Periodic value Sub chock Used Sub clock dividing ratio Divided by 2 e Input frequency to sub clock 0 032768 System clock selection Main clock Main clock Used Input frequency to main cloc 20 000000 On chip oscillater clock PLL clock Input frequency to PLL circuit On chip oscillator frequency PLL frequency e Sub clock frequency 0 016384 5 CPU main clock divider sele Divided by 1 Seral irr Source file name Generated functionname Functional explanetion of functions _ Related item ci renesas PDG_proj default Serial _ OpenSeri Boolean __OpenSerialDriver_async_UO_pi void OpentInitialize the appointed serial ci renesas PDG_proj default Serial __CloseSeri Boolean __CloseSerialDriver_async_UO_p1 void Close the appointed serial I F
161. g the 4 bit and 8 bit counter The count period is as follows 1 fi x 32 x n 1 fi Frequency of count source n Setting value of TREMIN register Not used Counts the internal count source divided by 2 using the 8 bit counter The count period is as follows 1 fix 2x n 1 fi Frequency of count source n Setting value of TREMIN register Valid only when timer RE is selected REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 76 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Action stop condition Select the count stop conditions This item may be unselectable depending on the microcomputer type Table 4 4 57 shows the settings available for 4 bit counter Table 4 4 57 Action stop condition settings Microcomputer Item Description R8C 22 25 Stopped in software The count stops by writing 0 to the TSTARTI bit in the R8C 2A 2D TSTART bit TRDSTR register The output compare output pin holds output level before the count stops Stopped by GRA compare match The count stops at the compare match in the TRDGRAi i 0 1 register The output compare output pin holds level after output change by the compare match Valid only when timer RD is selected Output level select Select the output level when count stops This item may be unselectable depending on the microcomputer type Table 4 4 58 shows the settings ava
162. gainst any and all damages arising out of such applications You should use the products described herein within the range specified by Renesas especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas shall have no liability for malfunctions or damages arising out of the use of Renesas products beyond such specified ranges Although Renesas endeavors to improve the quality and reliability of its products IC products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions Please be sure to implement safety measures to guard against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other applicable measures Among others since the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or system manufactured by you In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed the risk of accident such as swallowing by infants and small children is very high You s
163. h CPU 4 1 1 Setting Clocks for M16C 62P M16C 28 M16C 28B and M16C 29 Figure 4 1 1 shows the CPU clock setting dialog box for the M16C 62P M16C 28 M16C 28B and M16C 29 CPU clock setting System clock selection Main clock z Main clock JV Use as peripheral function clock source Input frequency to main clock circuit 16 000000 MHz Supplied clock to CPU and peripheral 16 000000 MHz ter selection CPU Peripheral Sub clock M Use as peripheral function clack source Clock divider selection Divided by 1 Input frequency to sub clock circuit 0 032768 MHz Divider selection Divided by 1 X oa 62 500000 Sub clock mezc gl T ne cove Figure 4 1 1 CPU Clock Setting Dialog Box M16C 62P 28 28B 29 Input Clock 16 000000 Hz REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 1 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 1 System clock selection Select a clock to be used as the CPU clock The main clock on chip oscillator clock PLL clock or sub clock can be selected The clocks selectable in System clock selection correspond to the clock sources shown in Table 4 1 1 Table 4 1 1 Clock Sources of M16C 62P M16C 28 M16C 28B M16C 29 Item Clock sources Main clock Main Clock Oscillation Circuit On chip oscillator clock On chip Oscillator PLL clock PLL Frequency Synthesizer Su
164. h Resource _p Setting No void Peripheral Module Timer Event Counter Mode Description Destroy event counter mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 6 4 _ DestroyEventCo unter ALL Generated function Boolean __DestroyEventCounter_ALL void Peripheral Module Timer Event Counter Mode Description Destroy event counter mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 6 5 _ GetTimerCounter Generated function Boolean __GetTimerCounter_Tch Resource _p Setting No unsigned short data Peripheral Module Timer Event Counter Mode Description Get the counter value of the timer Parameters data Pointer to a buffer storing the timer counter value Return value If timer counter value is successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned 7 Timer Pulse Width Modulation Mode 7 1 CreatePWM Generated function Boolean __CreatePWM_Tch Resource _p Setting No void Peripheral Module Timer Pulse Width Modulation Mode Description Initialize pulse width modulation mode Parameters Return value If timer was successfully initialized RAPI_TRUE is returned otherwise RAPI_FALSE is returned 7 2 _EnablePWM Generated
165. h the name specified here If lt Interrupt type gt is not shown the function is called when any of all enabled interrupts occurs The declaration of the interrupt function is as follows Function Declaration void specified notification function name void Operation during initialization Select Operation start or Operation stop for the timer operation immediately after the initial setting The available settings depend on the microcomputer or timer resource Timer synchronization Specify synchronous operation between channels This item may be unselectable depending on the microcomputer type Table 4 4 44 shows the settings for Timer synchronization REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 68 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 4 44 Timer synchronization settings Microcomputer Item Description R8C 22 25 No synchronize timers The counters in channels 0 and 1 operate independently R8C 2A 2D on channel 0 and 1 H8 3687 Synchronize timers on The counters in channels 0 and 1 are synchronously preset H8 36077 channel 0 and 1 When the counter in one channel RDO or RD1 is written to H8 36049 the same value is also written to the counter in the other H8 36109 channel To operate the two channels synchronously specify Synchronize timers on channel 0 and 1 in both channels 0 and 1 To clear the cou
166. hannel i executed every prescaler register value 1 times a trigger signal is applied Specify the prescaler register value in Prescaler period Valid only when Timer S channel 6 or 7 is selected Prescaler period Specify the prescaler period when using the prescaler This item may be unselectable depending on the microcomputer type Table 4 4 50 shows the settings available for Prescaler period Table 4 4 50 Prescaler period settings Microcomputer Description M16C 28 28B 29 Specify the prescaler register value When using the prescaler function time measurement is executed every prescaler register value 1 times a trigger signal is applied REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 71 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules External event polarity Select the rising edge falling edge or both edges as the clock edge used for time measurement External trigger This item is selectable when the input pin is selectable Select the pin used for pulse measurement This item may be unselectable depending on the microcomputer type channel or general register Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver sour
167. he operating condition 2 3 ___GetInterruptAndPinInfo_ALL Get the value of input pin status and external interrupt request flag 2 4 __ClearlnterruptFlag_ALL Clear the external interrupt flag 3 1 A D Converter __CreateADC Initialize A D converter 3 2 __EnableADC_RAPI Control operation of A D converter 3 3 __DestroyADC_RAPI Destroy the settings of the A D converter 3 4 __GetADC Get the A D converted value from a A D register 3 5 __GetADCFlag_RAPI Get status of the A D converter 3 6 __ClearADCFlag_RAPI Clear status flag of the A D converter 4 1 I O Port __SetlOPort Initialize I O port 4 2 __ReadlOPort_ALL Read the value of I O port 4 3 __WritelOPort_ALL Write data to I O port 5 1 Timer Timer Mode __CreateTimer Initialize timer mode 5 2 __EnableTimer Timer mode operation control start or stop operation 5 3 __DestroyTimer Destroy timer mode 5 4 __DestroyTimer_ALL Destroy timer mode 5 5 __GetTimerCounter Get the counter value of the timer 6 1 Timer __CreateEventCounter Initialize event counter mode 6 2 Event Counter Mode __EnableEventCounter Event counter mode operation control start or stop operation 6 3 __DestroyEventCounter Destroy event counter mode 6 4 __DestroyEventCounter_ALL Destroy event counter mode 6 5 __GetTimerCounter Get the counter value of the timer No Peripheral Module Generated function name Description 7 1 Timer __CreatePWM Initialize pulse width modulation mode 7 2 Pulse Width __EnablePWM Pulse width modul
168. he pin assigned to the TGR that is compare match TGRC 0 Toggle output specified as the counter clearing source TGRD 0 Toggle output Figure 4 4 5 Example of PWM pulse display PWM Mode 2 Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 54 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 2 M16C 60 M16C Tiny R amp 8C Tiny H8 300H Tiny and H8S Tiny Figure 4 4 6 shows the Pulse width modulation mode setting dialog box for M16C 60 M16C Tiny R8C Tiny H8 300H Tiny and H8S Tiny Pulse width modulation mode setting Timer type Y oumter clear fur Cha Pwm mode destin p S ve Count source A Me r Frequency of count source 20 000000 MHz Interruption IV Enable Underflow interruption Interruption priority level 7 4 Interruption function name TimerlntFunc Output waveform width period Petiod Result of calculation etiod 1 2 The values in this frame are set ms ing initialization Operation stat tion start A Operation
169. heck box is selected automatically when the on chip oscillator clock is selected as the source of system operation clock in System clock selection Select this box manually when selecting a clock source other than the on chip oscillator clock in System clock selection and using timer clock source 040 as the on chip oscillator clock Frequency selection Select the frequency of the on chip oscillator Selectable values depend on the selection made for System clock selection For details on the values see table 4 1 26 Periodic value Leave this item unspecified Divider selection Specify the divider of on chip oscillator Selectable values depend on the selections made for System clock selection and Frequency selection For details on the values see table 4 1 26 On chip oscillator frequency This box shows the on chip oscillator frequency calculated from the oscillation frequency and clock division ratio 7tENESAS Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 1 26 Values Selectable for Frequency selection and Divider selection H8S 20103 H8S 20203 H8S 20223 System clock Frequency Divider Description selection selection selection Main clock or High speed Divided by The high speed 40 MHz on chip oscillator provides Sub clock 40 MHz 1 the timer clock source 40 The clock source is not divided No low speed on chip oscillator is avai
170. heral Driver Generator Phase Counting Mode This item can be specified only when the phase counting mode is specified for Operation in channel 1 or 2 in the SH7125 Table 4 4 15 shows the each phase counting mode setting Table 4 4 15 Phase Counting Mode settings Section 4 How to Set up Clocks and Peripheral I O Modules Microcomputer Item Description SH7125 Phase Counting Mode 1 Phase Counting Mode 2 Phase Counting Mode 3 Phase Counting Mode 4 Select a mode Table 4 4 15 shows the counting conditions in each mode Valid only when phase counting mode is selected as operation Table 4 4 16 Up Down Count Conditions in Phase Counting Mode SH7125 Mode TCLKA Channel 1 TCLKB Channel 1 Operation TCLKC Channel 2 TCLKD Channel 2 Phase Counting Mode 1 High level Rising edge Up count Low level Falling edge Rising edge Low level Falling edge High level High level Falling edge Down count Low level Rising edge Rising edge High level Falling edge Low level Phase Counting Mode 2 High level Rising edge Don t care Low level Falling edge Don t care Rising edge Low level Don t care Falling edge High level Up count High level Falling edge Don t care Low level Rising edge Don t care Rising edge High level Don t care Falling edge Low level Up count Phase Counting Mode 3 High l
171. his box manually when using the sub clock as the CPU clock and using the main clock as the peripheral function clock except for fC32 e Input frequency to main clock circle Specify the frequency of the main clock On chip oscillator clock Make settings for this item when the on chip oscillator clock is selected as the CPU clock or when the sub clock is selected as the CPU clock and the on chip oscillator clock is used as the peripheral function clock except for fC32 e Use as peripheral function clock source This check box is always selected automatically when the on chip oscillator clock is used as the CPU clock Select this box manually when using the sub clock as the CPU clock and using the on chip oscillator clock as the peripheral function clock except for fC32 Frequency selection Specify the oscillation frequency of the on chip oscillator clock Periodic value Leave this item unspecified Divider selection Specify the divider of on chip oscillator On chip oscillator frequency This box shows the on chip oscillator frequency calculated from the oscillation frequency and clock division ratio REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 2 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules PLL clock Make settings for this item when the PLL clock is selected as the CPU clock or when the sub clock is selected as the CPU clock and the PLL clock is used as the peripheral func
172. hould implement safety measures so that Renesas products may not be easily detached from your products Renesas shall have no liability for damages arising out of such detachment This document may not be reproduced or duplicated in any form in whole or in part without prior written approval from Renesas Please contact a Renesas sales office if you have any questions regarding the information contained in this document Renesas semiconductor products or if you have any other inquiries Peripheral Driver Generator Preface The Peripheral Driver Generator hereafter referred to as PDG is a tool that supports the development of a driver for a peripheral I O module in a microcomputer The PDG which contains peripheral I O module API libraries allows users to design and automatically generate functions for calling the libraries via its user interface It runs on a Microsoft Windows operating system with an IBM PC compatible machine The supported microcomputers are the H8S Tiny SH Tiny H8 300H Tiny R8C Tiny and M16C Tiny series and main groups of the M16C 60 series For details refer to Overview in this manual Usage Precautions Even though we carefully evaluate the API libraries and functions generated by the PDG fully examine your application on your own responsibility when using this software to develop your application IBM is a registered trademark of International Business Machines Corporation Mi
173. ics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics tENESAS C 7 D me on lt D D Peripheral Driver Generator V 1 04 User s Manual R Electroni enesas Electronics Rev 1 00 2009 05 www renesas com Notes regarding these materials This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document including but not limited to product data diagrams charts programs algorithms and application circuit examples You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapon
174. ied in the timer set as Master of timer synchronous operation Only Clear synchronization can be selected as the counter clearing source in Counter clear function Counter clear function Select the counter clearing source This item may be unselectable depending on the microcomputer type Table 4 4 45 shows the settings available for Counter clear function REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 69 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 4 45 Counter clear function settings Microcomputer Item Description R8C 22 25 Disable clearing The counter is not cleared R8C 2A 2D Clears by lt general register The counter is cleared by input capture of selected H8 3687 name gt input capture general register H8 36077 Clear synchronization The counter is cleared in synchronization with the H8 36049 counter in the other channel Specify the counter H8 36109 clearing source in the other channel SH7125 Clears by lt general register The counter is cleared by input capture of selected name gt input capture general register H8S 20103 Disable clearing The counter is not cleared H8S 20203 Clears by lt general register The counter is cleared by input capture of selected H8S 20223 name gt input capture general register Clear synchronization The counter is cleared in synchronization with the counter in the other timer S
175. ilable for Output level select Table 4 4 58 Output level select settings Microcomputer Item Description R8C 2A 2D Low L output w hen count stops High H output w hen count stops Unchanged Holds output level before count stops Valid only when timer RF is selected Output port This item can be specified when the target output pin can be selected from multiple pins This item may be unselectable depending on the microcomputer type Table 4 4 59 shows the settings available for Output port Table 4 4 59 Output port settings Microcomputer Item Description R8C 13 1 CMPO Channel 0 Select this to enable the CMPOO output CMPO Channel 1 Select this to enable the CMP01 output CMPO Channel 2 Select this to enable the CMP02 output CMP1 Channel 0 Select this to enable the CMP10 output CMP1 Channel 1 Select this to enable the CMP11 output CMP1 Channel 2 Select this to enable the CMP 12 output R8C 2A 2D 2 CMPO0 Channel 0 Select this to enable the TRFOOO output CMPO Channel 1 Select this to enable the TRFOO1 output CMPO0 Channel 2 Select this to enable the TRFOO2 output CMP1 Channel 0 Select this to enable the TRFO10 output CMP1 Channel 1 Select this to enable the TRFO11 output CMP1 Channel 2 Select this to enable the TRFO12 output 1 Valid only when timer C is sele
176. in clock is selected as the CPU clock and the on chip oscillator clock is used as f OCO40M fOCO or fOCO F e Use as peripheral function clock source This check box is always selected automatically when the on chip oscillator clock is used as the CPU clock Select this box manually when using the main clock as the CPU clock and using the on chip oscillator clock as fOCO40M fOCO or fOCO F e Frequency selection Select the high speed or low speed which respectively corresponds to the high speed on chip oscillator or low speed on chip oscillator e Periodic value Leave this item unspecified e Divider selection Specify the divider of on chip oscillator Only Divided by 1 can be specified when using the low speed on chip oscillator e On chip oscillator frequency This box shows the on chip oscillator frequency calculated from the oscillation frequency and clock division ratio 3 System clock setting Specify the frequency division ratio used to supply the clock selected in 1 System clock selection to the CPU e CPU and peripheral clock frequency This box shows the frequency of the clock specified in 1 System clock selection e System clock divider selection Leave this item unspecified e CPU and Peripheral tabs Make the necessary settings for the CPU and peripheral function clocks Table 4 1 9 shows the details of each item Table 4 1 9 System Clock Settings R8C 22 23 Item Settings CPU Cloc
177. ing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 82 Peripheral Driver Generator 4 5 Setting Interrupt Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 5 1 shows the interrupt types that can be set in each microcomputer Table 4 5 1 Interrupt types in each CPU Microcomputer Series Microcomputer Group Interrupt type N16C 60 M16C 62p INTO to INT5 interrupts M16C Tiny M16C 28 28B 29 Key interrupt KIO to KI R8C Tiny R8C 13 INTO to INT3 interrupts R8C 22 25 2A 2D Key interrupt KIO to KI3 R8C 26 29 INTO INT1 and INT3 interrupts R8C 2A 2D Key interrupt KIO to KI3 H8 300H Tiny H8 3687 36077 H8 36049 36109 IRQO to IRQ3 interrupts WKP interrupt WKPO to WKP5 SH Tiny SH7125 IRQO to IRQ3 interrupts NMI interrupt H8S Tiny H8S 20103 20203 20223 IRQO to IRQ7 interrupts Figure 4 5 1 shows the interrupt setting dialog box INT key input interrupt setting Interrupt WKP Interruption requested KIQ V Enable input 0 Polarity switching Falling edge Rising edge Polarity switching Falling edge Rising edge KI MV Enable input 1 Polarity switching Falling edge Rising edge Kl4 MV Enable input 4 Polarity switching Falling edge Rising edge MV Enable input 2 Polarity switching Falling edge Rising edge KI5 MV Enable input 5 Polarity switching Falling edge Rising edge M
178. interrupt in R8C 13 can be detected H8 3687 36049 36077 36109 The basic functions are the same for timers Z W RC and RD Each timer measures the period of the external signal pulse by using the input capture function Upon detecting an effective edge the timer transfers the counter value to the general register assigned to the target pin The counter clearing source cannot be specified in this mode the counter is not cleared and continues counting up At the next effective edge the timer transfers the counter value again to the general register The period of the input pulse can be calculated from the difference between the counter values obtained at two detection edges and the period of the count source Counter overflow interrupts can be detected SH7125 The timer transfers the counter value to the general register assigned to the external signal input pin when an effective edge is detected Setting the counter clearing source to the input capture in the general register assigned to the pulse input pin causes the counter to be cleared when an effective edge is detected The period of the input pulse can be calculated from the obtained general register value and the period of the count source Counter overflow interrupts and input capture interrupts for the measurement pin can be detected REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 59 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Fig
179. ion enable 3 3 __DisableADC Control A D converter operation disable 3 4 __DestroyADC Destroy A D converter setting 3 5 __GetADC Get the A D conversion value Register 0 3 6 __GetADCAIl Get the A D conversion value All registers 3 7 __GetADCStatus Get the A D converter status 3 8 __ClearADCStatus Clear the A D converter status 4 1 I O Port __SetlOPort Create I O ports setting 4 2 __ReadlOPort Read data from I O ports 4 3 __WritelOPort Write data to I O ports 4 4 __ReadlOPortRegister Read data from I O port register 4 5 __WritelOPortRegister Write data to I O port registers 5 1 Timer Timer Mode _ CreateTimer Create timer mode setting 5 2 __EnableTimer Timer mode operation control Operation start 5 3 __DisableTimer Timer mode operation control Operation stop 5 4 __DestroyTimer Destroy timer mode 6 1 Timer __CreateEventCounter Create event counter mode setting 6 2 Event Counter Mode __EnableEventCounter Event counter mode operation control Operation start 6 3 __DisableEventCounter Event counter mode operation control Operation stop 6 4 __DestroyEventCounter Destroy event counter mode 6 5 __GetEventCounter Get event counter mode counter value 7 1 Timer Pulse Width ___CreatePulseWidthModulationMode Create pulse width modulation mode setting 7 2 Modulation Mode ___EnablePulseWidthModulationMode Pulse width modulation mode operation control Operation start 7 3 ___DisablePulseWidthModulationMode Pulse width modulation
180. ipheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules H8S 20103 Timer RC Comparative value These values are used as general register A to D H8S 20203 Timer RD A D values When one of the values matches the counter H8S 20223 value a waveform can be output from the pin assigned to the general register and a compare match interrupt can be generated The details of the output waveform and interrupt should be specified in each channel setting Timer RE Comparative value This value is used as the TREMIN register value When it matches the 8 bit counter value the output polarity on TREO can be inverted and a compare match interrupt can be generated The details of the TREO output and interrupt should be specified in each channel setting Timer RG Comparative value These values are used as general register A or B A B values When one of the values matches the counter value a waveform can be output from the pin assigned to the general register and a compare match interrupt can be generated The details of the output waveform and interrupt should be specified in each channel setting Interruption This item enables detection of interrupt occurrence Select the interrupts to be detected and specify the interrupt priority levels the user created interrupt function specified in lt Interrupt type gt Interrupt function name will be called when an interrupt occurs The interrupt
181. ipheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Channel or general register setting tab Make the necessary settings for the channel or general register selected in Channel used Enable compare match interrupt This item enables detection of input capture interrupt occurrence in the channel or general register Select this item the user created interrupt function will be called when an input capture interrupt occurs In some microcomputers the notification function and interrupt level settings are shared with the overflow interrupt specify lt interrupt type gt interruption priority level and lt interrupt type gt interruption function name described before Initial output Specify the initial output level select 0 output or 1 output This item may be unselectable depending on the microcomputer or timer resource Output waveform Set up the output wave from This item may be unselectable depending on the microcomputer type Table 4 4 61 shows the settings available for Output waveform Table 4 4 61 Output waveform settings Microcomputer Item Description M16C 28 28B 29 Timer S Single waveform Output signal level H when the base timer value matches the G1POj j 0 to 7 register value The signal switches to L when the base timer reaches 000016 Phase delayed waveform Output signal level is inversed every time the base timer value matches the G1POj regis
182. iption Initialize external interrupt Parameters Return value RAPI_TRUE is returned 2 2 __EnableInterrupt Generated function Boolean __Enablelnterrupt_I Resource _p Setting No unsigned long data Peripheral Module Interrupt Description Change the operating condition Parameters data Operating condition Set the following parameters To set multiple parameters at the same time use the symbol to separate each specified parameter Setting of status flag RAPI_INT_REQUEST_CLEAR Clears the status flag of IRQi interrupt request i 0 to 3 it is invalid if the low level detection is set RAPI_INT_REQUEST_REMAIN Retains the status flag of IRQi interrupt request i 0 to 3 it is invalid if the low level detection is set Enable or disable RAPI_IRQ_DIS Disables interrupt RAPI_IRQ_ENA Enables interrupt Return value RAPI_TRUE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 17 Peripheral Driver Generator Section 5 Generated Functions Reference 2 3 GetInterruptAndPinInfo ALL Generated function Boolean __GetInterruptAndPinInfo_ALL unsigned long data1 unsigned char data2 Peripheral Module Interrupt Description Get the value of input pin status and external interrupt request flag Parameters data1 Input pin level and status flag of interrupt request to be acquired Set the following parameters To
183. isplaying Project after Conversion 7 indicates that the corresponding item requires to be modified or checked because of the difference of the CPU specification or other reasons Modify the setup pattern if necessary REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS Peripheral Driver Generator Section 6 Converting a Project 8 After necessary modification is made becomes 20 Peripheral Driver Generator H83687 fa File E Function U Display Toot vindow y Help H js ae See s zx GSSRBEREE AMESERRS S CPU H8 3687 C iy Setting J Divide ratio of on chip oscillator System clock frequency MHz 20 000000 Selection of on chip oscillator frequency CPU main clock divider selection Divided by 1 Selection of PLL multiplier Periodic value Sub clock Used Sub clock dividing ratio Divided by 2 Input frequency to sub clock oscillation circuit 0 032768 e 8 e oe System clock selection Main clock e e CPU setting Main clock Used Input frequency to main clock oscillation circuit 20 000000 On chip oscillater clock PLL clock Input frequency to PLL circuit On chip oscillator frequency PLL frequency Sub clock frequency 0 016384 1 cru Timer J vo J imterupt Generated Function name Functional explanetion of Functions Relatec No source is generated yet The generated sour Timer mode Figure 6 3 4 Example of Dis
184. ist Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created If the address specified for Start address of register information has already been used as Start address of register information for other activation sources the settings cannot be saved i e you cannot close the dialog box Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 97 Peripheral Driver Generator 4 8 Setting ELC Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 8 1 shows the available microcomputers Table 4 8 1 Available microcomputers M16C 60 M16C Tiny R8C Tiny H8 300H SH Tiny H8S Tiny Tiny M16C 62P_ M16C 28 R8C 13 H8 3687 SH7125 H8S 20103 M16C 28B R8C 22 29 H8 36077 H83 20203 M16C 29 R8C 2A 2D H8 36049 H83 20223 H8 36109 ELC e Figure 4 8 1 shows the ELC setting dialog box This dialog box lists the settings of all events being linked REJ10J2018 0100 Rev 1 00 May 29 2009 ELC setting Event receive module Operations when even Timer RA No setting Timer RB No setting Timer RC No setting Timer RD_O channel 0 Input edge detection
185. ister H8 36049 Clear synchronization The counter is cleared in synchronization with H8 36109 the counter in the other channel Specify the counter clearing source in the other channel SH7125 Clears by lt general register The counter is cleared by compare match of name gt compare match selected general register H8S 20103 Disable clearing The counter is not cleared H8S 20203 Clears by lt general register The counter is cleared by compare match of pese0223 name gt compare match selected general register Clear synchronization The counter is cleared in synchronization with the counter in the other timer Specify the counter clearing source in the other timer Base timer Specify the timing for the base timer overflow interrupt This item may be unselectable depending on the microcomputer type Table 4 4 55 shows the settings available for Base timer Table 4 4 55 Base timer settings Microcomputer Item Description M16C 28 28B 29 Bit 14 overflow Bit 14 in the base timer overflows Bit 15 overflow Bit 15 in the base timer overflows 4 bit counter Specify whether to use the 4 bit counter This item may be unselectable depending on the microcomputer type Table 4 4 56 shows the settings available for 4 bit counter Table 4 4 56 4 bit counter settings Microcomputer Item Description R8C 22 29 R8C 2A 2D Used Counts the internal count source divided by 2 usin
186. k divider Select the frequency division ratio for the clock to be supplied to the selection CPU Input Clock Shows the frequency of the clock to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Period Shows the period of a clock cycle to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Peripheral Clock divider Leave this item unspecified selection The clock selected in System clock selection after being divided by the various division ratios are supplied to the peripheral I O modules The clock to be used in each peripheral I O module should be separately specified in each peripheral I O module setting dialog box The frequency of fOCO40M fOCO and fOCO F are determined according to the settings in On chip oscillator clock Input Clock Shows the frequency of the clock selected in System clock selection Period Shows the period of a clock cycle selected in System clock selection REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 7 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 1 4 Setting Clocks for R8C 24 25 Figure 4 1 4 shows the CPU clock setting dialog box for the R8C 24 25 CPU clock setting System clock selection Main clock Ea Main clock V Use as peripheral function clock source
187. lable High speed Divided by The high speed 32 MHz on chip oscillator provides pena 1 the timer clock source 40 The clock source is not divided No low speed on chip oscillator is available On chip oscillator Low speed Divided by The low speed on chip oscillator provides the clock FE 40 1 system clock o The clock source is not divided and 2 is fixed to 0 125 MHz The high speed 40 MHz on chip oscillator provides the timer clock source 40 Low speed Divided by The low speed on chip oscillator provides the Ang 32 1 system clock b The clock source is not divided and is fixed to 0 125 MHz The high speed 32 MHz on chip oscillator provides the timer clock source 40 High speed Divided by The high speed 40 MHz on chip oscillator provides 40 MHz 2 the system clock and timer clock source 40 The frequency of o is 20 MHz i e the high speed oscillator clock divided by 2 40 is not divided No low speed on chip oscillator is available High speed Divided by The high speed 32 MHz on chip oscillator provides 32 MHz 2 the system clock o and timer clock source 40 The frequency of o is 16 MHz i e the high speed oscillator clock divided by 2 640 is not divided No low speed on chip oscillator is available Only available when the Use as peripheral function clock source checkbox has been selected for On chip oscillator clock Sub clock Specify the frequency of sub clock sub e Use as periph
188. leared when an effective edge is detected The interval between the changes in the external signal can be calculated from the obtained general register value and the period of the count source Counter overflow interrupts and input capture interrupts for the measurement pin can be detected Figure 4 4 9 shows the Input capture mode setting dialog box Input capture mode setting Timer type S X Channel used v v Count source Divide ratio of A by n 1 Aed A il A MV Chanel IV Channel3 Count source divider n 1 M Channel4 IV Channel5 V Chanel IV Channel Interruption V Enable Overflow interruption Channel3 Channel4 Channel Channel calel Overflow interruption function name TimerlntFuncOF Interruption V Enable Input capture 0 interruption Input capture 0 interruption function name MV Enable Input capture 1 interruption TimerlntFunclCO Input capture 1 interruption function name TimerlntFunclC1 f Digital filter function 1 or f2 hd Overflow interruption priority level i oe S Gate function Used at channel 6 bd Input capture 0 interruption priority level Input capture 1 interruption priority level Gate function clear Cleared at channel 6 ov Operation during initialization Operation start m Prescaler Used at channel 6 X j Prescaler period 10 External event Falling ed polarity anng edge Base timer Bit 14 overflow X M Generate batch sourcefM Cancel Figure 4 4 9 Input captu
189. lection Specify the divider of system clock divider e CPU and Peripheral tabs Make the necessary settings for the CPU and peripheral function clocks Table 4 1 21 shows the details of each item Table 4 1 21 System Clock Settings H8 36077 H8 36109 Item Settings CPU Clock divider selection Leave this item unspecified Input Clock Shows the frequency of system clock which is calculated from the CPU and peripheral clock frequency and System clock divider selection values Period Shows the period of system clock o which is calculated from the CPU and peripheral clock frequency and System clock divider selection values Peripheral Clock divider selection Leave this item unspecified The clocks generated by dividing the system clock in prescaler S are supplied to each peripheral function Input Clock Shows the frequency of the system clock 6 Period Shows the period of the system clock 0 REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 17 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 1 8 Setting Clocks for SH7125 Figure 4 1 8 shows the CPU clock setting dialog box for the SH7125 CPU clock setting System clock selection Pi clock X PLL clock Supplied clock to CPU and peripheral Use as peripheral function clock source 80 000000 MHz Input frequency to PLL circuit 10 000000 Hz Selection of m
190. low The available settings depend on the microcomputer Table 4 4 32 shows the settings available for Period Table 4 4 32 Period setting Microcomputer Description R8C 13 22 29 2A 2D Specify the period until the counter underflows The optimum register values for the H8S 20103 20203 prescaler and timer are calculated from the specified value and the frequency of the count 20223 source and shown in Result of calculation described below When the counter underflows or an effective edge is detected the counter reloads the calculated value and continues counting down Result of calculation The optimum register values are calculated from the specified Period value and shown here This item is not displayed depending on the CPU type REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 60 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Period This box shows the actual time to be obtained by applying the optimum register values calculated from the specified period Error This box shows the error ratio of the actual time to the specified period Setting value This box shows the optimum register values calculated from the specified period The registers shown here depend on the microcomputer type Table 4 4 33 shows the register settings Table 4 4 33 Setting value settings Microcomputer Item Description R8C 13 22 29 2A 2D Prescaler Prescaler
191. match When Master of timer synchronous operation is selected in Timer Clears by GRC compare match 1 synchronization the specified TGR also works as the counter clearing Clears by GRD compare match 2 source for the other synchronized channels Clear synchronization 2 This setting is always selected automatically when Performs synchronous operation is selected in Timer synchronization The counter is cleared by the counter clearing source in the channel set as Master of timer synchronous operation in Timer synchronization 1 These settings are not available in channels 1 and 2 2 This setting is available only when Performs synchronous operation is selected in Timer synchronization REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 52 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Channel used Select the TGRs to be used for PWM waveform generation The TGR selected in Counter is automatically selected In PWM mode 1 TGRA operates in pair with TGRB and TGRC operates in pair with TGRD Selecting a TGR opens the tab for setting up that TGR make necessary detailed settings in the tab TGR setting tab The tabs for setting up the TGRs selected in Channel used are shown Specify the following TGR related items Time till compare match Specify the time between the start of counting and a compare match From the time specified here and the frequency of the count source a
192. mer Generated function Boolean __CreateTimer_Tch Resource _p Setting No void Peripheral Module Timer Timer Mode Description Initialize timer mode Parameters Return value If timer was successfully initialized RAPI_TRUE is returned otherwise RAPI_FALSE is returned 5 2 _ EnableTimer Generated function Boolean __EnableTimer_Tch Resource _p Setting No unsigned long data Peripheral Module Timer Timer Mode Description Timer mode operation control start or stop operation Parameters data Operation of the timer Set the following parameters RAPI_TIMER_ON Starts the timer in timer mode RAPI_TIMER_OFF Stops the timer in timer mode Return value If timer is successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned 5 3 DestroyTimer Generated function Boolean __DestroyTimer_Tch Resource _p Setting No void Peripheral Module Timer Timer Mode Description Destroy timer mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 5 4 _DestroyTimer_ALL Generated function Boolean __DestroyTimer_ALL void Peripheral Module Timer Timer Mode Description Destroy timer mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 5 5 _ GetTimerCounter Generated function Boolean __GetTimerCounter_T
193. mode RA RA Pulse width measurement mode RA RA Input capture mode RC RDO 1 RG RDO 3 RG Output compare mode RC RDO 1 RE RG RDO 3RE RG The following explains how to set up each mode 4 4 1 Timer Mode Table 4 4 6 shows the timer resources that can be set to the timer mode in each microcomputer Table 4 4 6 Timer Resources Supporting Timer Mode in Each Microcomputer Series Group Timer resources N16C 60 M16C 62p AO 4 B0 5 M16C Tiny M16C 28 28B 29 A0 4 B0 2 R8C Tiny R8C 13 X Y Z R8C 22 29 2A 2D RA RB H8 300H Tiny H8 3687 36077 36049 36109 B1 V SH Tiny SH7125 Channel 0 5 H8S Tiny H8S 20103 20203 20223 RA RB The following gives an overview of the timer mode settings for each microcomputer M16C 62P M16C 28 28B 29 R8C 13 22 to 29 2A to 2D H8S 20103 20203 20223 The counter counts down until it underflows then it reloads the reload register value and restarts counting down The reload register value is calculated from the specified period and the frequency of the count source When the counter underflows an underflow interrupt can be detected H8 3687 36049 36077 36109 The counter in timer B1 or timer V counts up with the internal clock For timer B1 the interval timer or auto reload timer operation can be selected In interval timer operation the counter starts counting up from 0 it overflows when the count source clock is input after the count reaches H FF The overflow
194. mp Select this setting to amplify the analog input to the specified pins through connection mode an external operational amplifier when the P10 PO or P2 group is selected in Input group ANEXO input is A D This setting is always selected when ANEXO is specified as the analog converted input pin ANEX1 input is A D This setting is always selected when ANEX 1 is specified as the analog converted input pin Group 0 Trigger Specify the condition for starting A D conversion In the SH7125 this item specifies the trigger for group 0 when 2 channel scan mode or 2 channel continuous scan mode is selected Table 4 6 6 shows the settings available for Group 0 Trigger Table 4 6 6 Group 0 Trigger settings Microcomputer Item Description All Software trigger Conversion begins when the A D conversion start bit in the microcomputers register is set If Conversion start is selected in Conversion operation described above conversion begins as soon as the initial setting in the A D conversion REJ10J2018 0100 Rev 1 00 May 29 2009 Z2ENESAS 4 90 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules H8 36049 36109 M16C 62P Hardware trigger Conversion begins at the falling edge of the input to the ADTRG pin M16C 28 Hardware trigger Conversion begins at the falling edge of the input to the ADTRG M16C 28B pin M16C 29 Timer
195. n Chip Oscillator 2 Each clock setting Make the necessary settings for Main clock or On chip oscillator clock selected in System clock selection The CPU clock selected in System clock selection is also used as the peripheral clock Note that only the on chip oscillator clock is allowed as fRING which can be selected as the count source for timer When using fRING while the main clock is selected as the CPU clock make settings also for the on chip oscillator clock If the on chip oscillator clock is not set up fRING cannot be selected as the count source in timer settings Table 4 1 5 shows the available combinations of clock sources for the CPU and peripheral functions REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 4 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Table 4 1 5 Combinations of Clock Sources for CPU and Peripheral Functions R8C 13 CPU clock Peripheral clock f1 to 82 fAD fRING Main clock Main clock On chip oscillator clock On chip oscillator clock On chip oscillator clock On chip oscillator clock Main clock Make settings for this item when the main clock is selected as the CPU clock e Use as peripheral function clock source This check box is always selected automatically when the main clock is used as the CPU clock e Input frequency to main clock circle Specify the frequency of the main clock On chip oscillator clock Make s
196. n optimum TGR value is calculated Practical time This box shows the actual time between the start of counting and a compare match which is calculated from the TGR value and the frequency of the count source GRi setting i A B C or D This box shows the TGR value calculated from the time specified in Time till compare match and the frequency of the count source If this value falls outside the allowed setting range the settings in this dialog box are not applied when the Setting button is clicked This value is written to the corresponding register when the driver source code created according to this dialog box setting is used Initial output Specify the initial value to be output from the pin assigned to the TGR Output waveform Specify the value to be output at a compare match from the pin assigned to the TGR Interruption This item enables detection of compare match interrupt occurrence Select this item and specify the interrupt priority levels the user created interrupt function will be called when an interrupt occurs Enable Compare matching interruption Select the check box to detect occurrence of the compare match interrupt Interruption function name Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here The declaration of the interrupt function is a
197. nce 1 8 _StopSerialReceiving Generated function Boolean __ StopSerialReceiving_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Stop receiving Parameters Return value If reception of serial communication was successfully stopped RAPI_TRUE is returned if failed RAPI_FALSE is returned Remarks This function is not generated for M16C 62P M16C 28 28B 29 1 9 _StopSerialSending Generated function Boolean __ StopSerialSending_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Stop transmitting Parameters Return value If transmission of serial communication was successfully stopped RAPI_TRUE is returned if failed RAPI_FALSE is returned Remarks This function is not generated for M16C 62P M16C 28 28B 29 SI O3 4 1 10 PollingSerialReceiving Generated function Boolean __ PollingSerialReceiving_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Polling reception Parameters Return value Out of the receive data counts requested the number of unreceived data is returned 1 11 PollingSerialSending Generated function Boolean __ PollingSerialSending_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface
198. nd 1 in 2 channel scan mode or 2 channel continuous scan mode in the SH7125 specify the timing for setting the A D end flag ADF to generate an ADI interrupt Table 4 6 9 shows the settings available for ADF Control Table 4 6 9 ADF Control settings Microcomputer Item Description SH7125 ADF is set when group The ADF bit is set and ADI interrupt occurs when A D 0 or group 1 has conversion started by the group 0 trigger or group 1 trigger finished has finished ADF is set when group The ADF bit is set and ADI interrupt occurs when A D 0 and group 1 have conversion started by the group 0 trigger and A D both finished conversion started by the group 1 trigger have both finished Note that the triggering order has no affect Interrupt This item enables detection of A D conversion completed interrupt occurrence Select Enable interrupt and specify the interrupt priority levels the user created interrupt function will be called when an interrupt occurs The following explains how to set each item Enable interrupt Select the check box to detect occurrence of the A D conversion completed interrupt Interrupt priority level Specify the priority level for the A D conversion completed interrupt The priority may not be specified depending on the microcomputer or interrupt type Interrupt function name REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 92 Peripheral Driver Generator Section 4 How to Set
199. nderflow interrupt This interrupt is issued at an underflow in the R8C 22 29 secondary period that is at the same time as the R8C 2A 2D change in the signal output from the pin at the end of the secondary period H8 3687 36077 Compare match A This interrupt is issued at a compare match between H8 36049 36109 interrupt time constant register A and timer counter Compare match B This interrupt is issued at a compare match between interrupt time constant register B and timer counter H8S 20103 Underflow interrupt This interrupt is issued at an underflow in the H8S 20203 secondary period that is at the same time as the H8S 20223 change in the signal output from the pin at the end of the secondary period lt interrupt type gt interruption level Specify the priority level for the enabled interrupt type The priority may not be specified depending on the microcomputer or interrupt type Interrupt function name Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here The declaration of the interrupt function is as follows Function Declaration void specified notification function name void REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 56 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Oper
200. ng the peripheral I O modules you will generate source files collectively in the PDG and then register them in the created HEW workspace from the PDG 5 Creating the application You will call the functions which are written in the source files generated by the PDG and which operate the peripheral I O modules in the right places of the application Note that when the operation functions are called the header files generated by the PDG must be included in advance 6 Build You will build the application in the HEW Note that before performing a build the following settings are required and that the HEW V 4 02 or later automatically specifies library files Specifying the directory path to the header files generated by the PDG I option e Specifying library files to link API libraries L option If build errors occur in the operation functions generated by the PDG make sure that the functions are called 7 Debug You will debug the application built with the HEW 8 Evaluation You will evaluate the application to make sure that it functions as expected REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 1 Peripheral Driver Generator Section 3 How to Operate the PDG 3 2 PDG Operation Flow This section explains how to operate the PDG You will begin with settings for determining how to use peripheral I O module functions and then generate and use source files to develop drivers as follows Outputting
201. ngs available for Filter function Table 4 4 35 Filter function settings Microcomputer Item Description R8C 22 29 No digital filter The filter function is not used R8C 2A 2D fi The external signal is sampled with the frequency of H8S 20103 f8 the selected signal When the same value is sampled 20203 20223 f32 three consecutive times it is detected as the correct H8 36109 f1 input signal f8 f32 Same as count source REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 61 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Input pin Select the input pin for pulse This item may be unselectable depending on the microcomputer type Table 4 4 36 shows the settings available for Input pin Table 4 4 36 Input pin settings Microcomputer Item Description R8C 22 29 Set P1_7 for TRAIO pin The period of the pulse input through the selected pin is R8C 2A 2D Set P1_5 for TRAIO pin measured H8 3687 Measurement input from The period of the pulse input through the FTIOA i i H8 36077 FTIOA i pin channel pin is measured When an effective edge is Savane detected the counter value is transferred to GRA Measurement input from The period of the pulse input through the FTIOB i i FTIOB i pin channel pin is measured When an effective edge is detected the counter value is transferred to GRB SH7125 TIOCixA input puls
202. nt pulse settings Microcomputer Item Description R8C 13 22 29 Measurement between a rising edge The high level period is measured The counter R8C 2A 2D and the next falling edge of counts down only while the input signal is at a H8S 20103 measured pulse high level 20203 20223 Measurement between a falling edge The low level period is measured The counter and the next rising edge of measured counts down only while the input signal is at a low pulse level REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS 4 65 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 4 6 Input Capture Mode Table 4 4 41 shows the timer resources that can be set to the input capture mode in each microcomputer Table 4 4 41 Timer Resources Supporting Input Capture Mode in Each Microcomputer Microcomputer Series Microcomputer Group Timer Resource N16C 60 M16C 62p M16C Tiny M16C 28 28B 29 S R8C Tiny R8C 13 C R8C 22 25 RDO 1 R8C 26 29 RC R8C 2A 2D RC RDO 1 RF H8 300H Tiny H8 3687 36077 Z0 Z1 H8 36049 W Z0 Z1 H8 36109 RC RDO 3 SH Tiny SH7125 Channel 0 5 H8S Tiny H8S 20103 RC RDO 1 RG H8S 20203 20223 RDO 3 RG The following gives an overview of the input capture mode settings for each microcomputer M16C 28 28B 29 Timer S measures the interval of changes in the external signal by using the time measurement fun
203. ntMode_Tch Resource _p Setting No void Peripheral Module Timer Pulse Period Measurement Mode Description Initialize pulse period measurement mode Parameters Return value If timer was successfully initialized RAPI_TRUE is returned otherwise RAPI_FALSE is returned 8 2 _ EnablePulsePeriodMeasurementMode Generated function Boolean __ EnablePulsePeriodMeasurementMode_Tch Resource _p Setting No unsigned long data Peripheral Module Timer Pulse Period Measurement Mode Description Pulse period measurement mode operation control start or stop operation Parameters data Operation of the timer Set the following parameters RAPI_TIMER_ON Starts the timer RAPI_TIMER_OFF Stops the timer Return value If timer is successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned 8 3 _ DestroyPulsePeriodMeasurementMode Generated function Boolean __DestroyPulsePeriodMeasurementMode_Tch Resource _p Setting No void Peripheral Module Timer Pulse Period Measurement Mode Description Destroy pulse period measurement mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 8 4 DestroyPulsePeriodMeasurementMode ALL Generated function Boolean __ DestroyPulsePeriodMeasurementMode_ALL void Peripheral Module Timer Pulse Period Measurement Mode
204. nters synchronously select Synchronize timers on channel 0 and 1 and then specify Clear synchronization in Counter clear function SH7125 Operate independently The channel operates independently of the others Specify a TGR in the channel as the counter clearing source in Counter clear function Master of timer The channel operates in synchronization with other synchronous operation channels The counter clearing source specified in Counter clear function also clears the counters in the other synchronized channels Performs synchronous This setting can be selected only when Master of timer operation synchronous operation is selected in another channel The counter is cleared by the counter clearing source specified in the channel set as Master of timer synchronous operation Only Clear synchronization can be selected as the counter clearing source in Counter clear function H8S 20103 Operate independently The timer counter operates independently of the others 20203 20223 Master of timer The timer counter operates in synchronization with the synchronous operation others RDO with RD1 or RD2 with RD3 The counter clearing source specified in Counter clear function also clears the counters in the other synchronized timer Performs synchronous This setting can be selected only when Master of timer operation synchronous operation is selected in another timer The counter is cleared by the counter clearing source specif
205. nting up from 0 and continues counting until it overflows Overflow interrupts can be detected SH7125 The counter counts up with the external clock the free running or periodic counter operation is done as the basic timer operation in the SH7125 In free running operation the counter continues counting up until it overflows The overflow interval is determined by the frequency of the count source Overflow interrupts can be detected REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 43 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules In periodic counter operation the counter is cleared by a compare match between the counter and the specified general register and then the counter restarts counting up At a compare match a compare match interrupt can be detected and a desired signal can be output from a pin The general register value is calculated from the specified period and the frequency of the count source In channels 1 and 2 the timer can be set to an up counter or a down counter of phase differences between two pins TCLKA and TCLKB in channel 1 or TCLKC and TCLKD in channel 2 in phase counting mode In this case counter overflow or underflow interrupts can be detected Figure 4 4 2 shows the Event counter mode setting dialog box Event counter mode setting Timer type B1 Operation during initialization Operation start Count source External signal Setting
206. o Timer RD_O channel 1 No setting Timer RG No setting AD converter unit 1 No setting Interrupts 1 SCI3_1 transmit end Output port group 1 No setting Output port group 2 No setting Input port group 1 No setting RE ae ee 1 ae lt Timer counts events Event link port setting Interrupt disable amhin m Event Generation timer setting Channel Channel1 Channel Channel Event Generation Timer Interval Setting Count source f v 256 Y 20000 000000 Activation in initialization Operation stop Event Generation Timer Delay Selection No delay Event Generation interval ms 78 125000 IV Generate batch source M Modify setting Cancel Figure 4 8 1 ELC setting dialog box Period ms 7tENESAS 4 98 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Event link setting Clicking on this button opens the Event link setting dialog box shown in Figure 4 8 2 Event link setting Event receive module Timer RA Event signal Input edge detection on single input port 1 v Operations when event is input Timer counts events v m m Cancel Figure 4 8 2 Event link setting dialog box The following describes the items in the Event link setting dialog box Event receive module Select the module to which an event is to be linked The available settings depend on the microcomputer When the Event link set
207. ons as I O port R8C 13 22 29 Outputs H for primary period Specify the output level during primary and R8C 2A 2D Outputs L for secondary period secondary periods Outputs L w hen the timer is stopped Outputs L for primary period Outputs H for secondary period Outputs H w hen the timer is stopped H8 3687 36077 Outputs H for primary period Specify the output level during primary and H8 36049 36109 Outputs L for secondary period secondary periods Outputs L for primary period Outputs H for secondary period H8S 20103 Outputs H for primary period Specify the output level during primary and H8S 20203 Outputs L for secondary period secondary periods H8S 20223 Outputs L w hen the timer is stopped Outputs L for primary period Outputs H for secondary period Outputs H w hen the timer is stopped REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 57 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Output waveform width period Specify the PWM waveform to be generated Period Specify the period of the output waveform Frequency This box shows the frequency of the output waveform Duty Specify the duty of the output waveform that is the ratio of the primary period to the waveform period Result of calculation The optimum register values calculated from the Pe
208. ontroller Description Set all event generate timer Parameters Return value Returns RAPILTRUE on success a RAPILFALSE on failure 12 4 _ EnableEventGenerateTimer Generated function Boolean _EnableEventGenerateTimer_ALL void Peripheral Module Event Link Controller Description Enables all event generate timer Parameters Return value Returns RAPILTRUE on success a RAPI_FALSE on failure 12 5 _ DisableEventG enerateTimer Generated function Boolean _DisableEventGenerateTimer_ALL void Peripheral Module Description Event Link Controller Disables all event generate timer Parameters Return value Returns RAPILTRUE on success a RAPI_FALSE on failure 12 6 _DestroyEventGenerateTimer Generated function Boolean _DestroyEventGenerateTimer_ALL void Peripheral Module Event Link Controller Description Destroys event generate timer Parameters Return value Returns RAPLTRUE on success a RAPILFALSE on failure 12 7 _ ReadPortBufferRegister Generated function Boolean _ReadPortBufferRegister_P Port No unsigned int data Peripheral Module Event Link Controller Description Reads data from a port buffer register Parameters data Pointer to a variable in which the read value will be stored Return value Returns RAPILTRUE on success a RAPILFALSE on failure 12 8 _
209. orks as the external clock input pin clock with a frequency of bit rate x 16 regardless of this setting REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 32 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 3 Setting I O Ports Figure 4 3 1 shows the I O port setting dialog box 1 0 port setting Port 1 ba P10 P Piz P P Pis Pie P7 m Terminal used M P10 Vv Pil n function z MV P12 Used as an input port IV P13 Used as an output port Function Upgrade drive capacity Pull up available M Generate batch source M Cancel Figure 4 3 1 I O port setting dialog box The following explains how to set each items Port Specify the port group to be set up In the SH7125 or H8S Tiny a number is assigned for each port group when a number is selected the corresponding port group is shown in the dialog box Terminal used The pins in the group selected in Port are shown here Select the pins to be set up Selecting a check box opens the setting tab for the corresponding pin Pin setting tab Pin function This item can be specified only in the SH7125 or H8S Tiny Select the desired one of the multiple functions assigned to the pin Used as an input Used as an output Select whether to use the pin as an input or output port This item may be unselectable depending on the port Function Specify the following functions for
210. ormation should be located at the address that is multiple of four Source address DTC Specify the source address of data to be transferred by the DTC For word size transfer specify an even source address Source address operation Select the source address operation after data transfer Fixed Incremented or Decremented can be selected Destination address DTC Specify the destination address of data to be transferred by the DTC For word size transfer specify an even destination address Destination address operation Select the destination address operation after data transfer Fixed Incremented or Decremented can be selected Transfer mode Select the DTC transfer mode Table 4 7 3 shows the settings available for Transfer mode Table 4 7 3 Transfer mode settings Item Description Normal mode One operation transfers one byte or one word of data Repeat mode One operation transfers one byte or one word of data Once the specified number of transfers has ended the initial state is restored and transfer is repeated Block transfer mode One operation transfers specified one block of data REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS 4 95 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Repeat area Block area select Select whether the source side or the destination side is set to be a repeat area or block area in repeat mode or block transfer mode
211. ot be specified depending on the microcomputer or interrupt type Interruption function name Specify the interrupt notification function to be called when the enabled interrupt occurs When using an interrupt notification function add to the user program the function with the name specified here The declaration of the interrupt function is as follows Function Declaration void specified notification function name void Filter function Set up the filter function This item may be unselectable depending on the microcomputer type Table 4 5 3 shows the settings available for Filter function Table 4 5 3 Filter function settings Microcomputer Item Description R8C 13 INTO 3 Interrupt No filter provided The filter function will not be used R8C 22 25 INTO 3 Interrupt Sampling by f1 The signal level is sampled with the R8C 2A 2D INTO 3 Interrupt Sampling by f8 frequency of the selected sampling clock R8C 26 29 INTO 1 3 Interrupt Sampling by 32 When the same level is sampled three times an interrupt request is detected H8S 20103 20203 20223 Sampling by f1 Noise canceler will be used in the specified Sampling by f2 cancel performance setting Sampling by f4 Sampling by f8 Polarity switching Select the interrupt polarity This item may be unselectable depending on the microcomputer type LINTI pin select Select the INT1 interrupt input pin when _INT1 is selected
212. ows the Timer mode setting dialog box Timer mode setting Timer type Operation during initialization Operation stat o a Count source rs a ira 7 Frequency of count source 5 000000 MHz Auto reload function Period Result of calculation The values in this frame are set Interruption Fersi Anuar us MV Enable Overflow interruption Error 0 000000 3 nterrupti rity leve E Setting value Interruption function name TimerlntFunc Reload value Generate batch source M Cancel Figure 4 4 1 Timer mode setting dialog box The following explains how to set each items Timer type Select the timer resource to be set up Selecting Timer type none allows the timer setting to be made with no resource being selected here and any resource can be assigned to the setting Note that Timer type none is not available for the SH7125 or H8S Tiny Operation Specify the count operation This item may be unselectable depending on the microcomputer type Table 4 4 7 shows the settings available for Operation Table 4 4 7 Operation settings Microcomputer Item Description REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 38 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules SH7125 Free running The counter continues counting up until it overflows The overflow interval cannot be specified it is determined by the frequency of the count
213. oylnputCapture_ALL void Peripheral Module Timer Input Capture Mode Description Destroy input capture mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 10 5 _ GetCapture Value Generated function Boolean __GetCaptureValue_Tch Resource _p Setting No unsigned short data Peripheral Module Timer Input Capture Mode Description Get the counter value of the timer Parameters data Pointer to a buffer storing the timer counter value Return value If timer counter value is successfully acquired RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Section 5 Generated Functions Reference 5 23 Peripheral Driver Generator Section 5 Generated Functions Reference 11 Timer Output Compare Mode 11 1 _ CreateOutputCompare Generated function Boolean __CreateOutputCompare_Tch Resource _p Setting No void Peripheral Module Timer Output Compare Mode Description Initialize output compare mode Parameters Return value If timer was successfully initialized RAPI_TRUE is returned otherwise RAPI_FALSE is returned 11 2 _ EnableOutputCompare Generated function Boolean __ EnableOutputCompare_Tch Resource _p Setting No unsigned long data Peripheral Module Timer Output Compare Mod
214. p the pins to be used when the key input or WKP interrupt is used Table 4 5 7 shows the CPU corresponding to this setting Table 4 5 7 KI0 KI5 settings Microcomputer Item Description R8C 13 22 29 2A 2D KIO to KIS These settings correspond to the KIO to KI3 pins M16C 28 28B 29 Select Enable input for the pins to be used M16C 62P H8 3687 36077 36049 36109 KIO to KI5 These settings correspond do the WKPO to WKP5 pins Select Enable input for the pins to be used Polarity switching Specify the input polarity for the key input or WKP interrupt Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 85 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 6 Setting A D converter The following modes are available in the A D converter e Single mode A D conversion is done once for the input voltage on a selected single pin e Repeat mode A D conversion is done repeatedly for the input voltage on a selected single pin e Single sweep mode A D conversion is done once
215. p1 void Boolean StartSorialReceiving async_UO_pif Boolean __StartSerialSending_async_UO_pi u Boolean T StopSerialReceiving async_UO_pif Boolean __StopSerialSending_async_UO_p1 void Boolean __PollingSerialReceiving_async_UO_p1 Ronlean PailinnSerialSendinn asvne IN nif ul Open Inkialize the appointed serial Close the appointed serial I F Register the appointed type of notif Change serial setting Set up serial interrupt Start receiving Start transmitting Stop receiving Stop transmitting Polling reception Pollinn transmission Related item Notification Function name Bit number Clock selection Transmit interrupt Transmit Figure 1 7 3 Generated File Information Window ka 2 Changing Character Size 1 Right click on the generated file information window or select Display gt Character size of the generated file information window 2 Select a size from Large Medium and Small 3 The character size will be changed in the list REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 1 6 Peripheral Driver Generator Section 1 Overview 1 8 Menu The menu items are listed in Table 1 8 1 Table 1 8 1 Menu List Main menu Sub menu Description File F Create New Project N Creates a new project Always available Open Project O Opens an existing project Always available Save Project S Saves the currently opened project
216. parameters RAPI_TIMER_ON Starts the timer RAPI_TIMER_OFF Stops the timer Return value If timer is successfully controlled RAPI_TRUE is returned if failed RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Section 5 Generated Functions Reference 5 22 Peripheral Driver Generator 9 3 _ DestroyPulseWidthMeasurementMode Generated function Boolean __ DestroyPulseWidthMeasurementMode_Tch Resource _p Setting No void Peripheral Module Timer Pulse Width Measurement Mode Description Destroy pulse width measurement mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 9 4 _DestroyPulseWidthMeasurementMode_ ALL Generated function Boolean __DestroyPulseWidthMeasurementMode_ALL void Peripheral Module Timer Pulse Width Measurement Mode Description Destroy pulse width measurement mode Parameters Return value If timer is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 9 5 _ GetPulseWidthMeasurementMode Generated function Boolean __GetPulseWidthMeasurementMode_Tch Resource _p Setting No unsigned short data Peripheral Module Timer Pulse Width Measurement Mode Description Get the counter value of the timer Parameters data Pointer to a buffer storing the timer counter value
217. parameters To set multiple parameters at the same time use the symbol to separate each specified parameter RAPI_TDRE Transmit data register empty flag RAPI_RDRPF Receive data register full flag RAPI_ORER Overrun error flag RAPI_FER Framing error flag RAPI_PER Parity error flag RAPI_TEND Transmit end flag RAPI_MPB Multiprocessor bit flag for reception RAPI_MPBT Multiprocessor bit flag for transmission RAPI_RECV_ERROR All receive error flags of SCI Overrun framing and parity errors RAPI_ALL_FLAG All status flags of SCI Return value RAPI_TRUE is returned 1 11 OutputSCISck Generated function Boolean __ OutputSClSck_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Control the output of SCK Parameters Return value RAPI_TRUE is returned Remarks This function is generated in the asynchronous mode 1 12 OutputSCITxd Generated function Boolean __ OutputSCITxd_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Control the output of TXD Parameters Return value RAPI_TRUE is returned Remarks This function is generated in the asynchronous mode 2 Interrupt 2 1 _ CreateInterrupt Generated function Boolean __Createlnterrupt_I Resource _p Setting No void Peripheral Module Interrupt Descr
218. pecified The clocks generated by dividing the system clock in prescaler S are supplied to each peripheral function Input Clock Shows the frequency of the system clock 6 Period Shows the period of the system clock 0 REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 15 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 1 7 Setting Clocks for H8 36077 H8 36109 Figure 4 1 7 shows the CPU clock setting dialog box for the H8 36077 H8 36109 CPU clock setting System clock selection Main clock x Main clock MV Use as peripheral function clock source Input frequency to main clock circuit 20 000000 MHz m Supplied clock to CPU and peripheral 20 000000 MHz System clock divider selection Divided by 1 kd CPU Peripheral Sub clock V Use as peripheral function clock source Input frequency to sub clock circuit 0 032768 MHz Divider selection Divided by 2 Ne Sub clock 0 016384 MHz Input Clock 20 000000 p44 Period 50 000000 ps Carcel Figure 4 1 7 CPU Clock Setting Dialog Box H8 36077 H8 36109 1 System clock selection Select a clock to be used as the system clock The main clock or on chip oscillator clock can be selected The clocks selectable in System clock selection correspond to the clock sources shown in Table 4 1 20 Table 4 1 20 Clock Sources of H8 36077 H8 36109 Item
219. pecify the counter clearing source in the other timer Base timer Specify the timing for the base timer overflow interrupt This item may be unselectable depending on the microcomputer type Table 4 4 46 shows the settings available for Base timer Table 4 4 46 Base timer settings Microcomputer Item Description M16C 28 28B 29 Bit 14 overflow Bit 14 in the base timer overflows Bit 15 overflow Bit 15 in the base timer overflows Digital filter function based clock Specify the clock to be used for the digital filter function This item may be unselectable depending on the microcomputer type To use the digital filter function select Digital filter in Digital filter function described later in each channel or the general register setting tab This item is invalid for a microcomputer in which the digital filter function clock can be specified separately for each input pin select the clock in Digital filter function in each channel or general register setting tab Channel used The available channels or general registers are shown Select the desired channels or general registers Multiple channels or registers can be selected Selecting a channel or register opens the tab for setting up that channel or register make necessary detailed settings in the tab Channel or general register setting tab Make the necessary settings for the channel or general register selected in Channel used Enable inp
220. playing Project after Conversion REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 6 4 Peripheral Driver Generator V 1 04 User s Manual Publication Date May 29 2009 Rev 1 00 Sales Strategic Planning Div Published by Renesas Technology Corp Microcomputer Tool Development Department Edited by Tool Business Division Renesas Solutions Corp 2009 Renesas Technology Corp and Renesas Solutions Corp All rights reserved Printed in Japan Peripheral Driver Generator V 1 04 User s Manual 2tENESAS Renesas Electronics Corporation 1753 Shimonumabe Nakahara ku Kawasaki shi Kanagawa 211 8668 Japan REJ10J2018 0100
221. quency selection Specify the frequency of the on chip oscillator clock ROSC Periodic value Leave this item unspecified Divider selection Specify the division ratio for the RC clock divider On chip oscillator frequency This box shows the on chip oscillator frequency calculated from the oscillation frequency and clock division ratio The division ratio for the system clock frequency which determines the frequency of the system clock p should be selected in the system clock setting which is described later Sub clock Specify the frequency of sub clock SUB e Use as peripheral function clock source Sub clock works as the basic clock necessary for the peripheral functions to operate This check box is always selected automatically e Input frequency to sub clock circle The sub clock frequency is fixed at 0 03276 MHz e Sub clock divider Specify the division ratio for the sub clock divider e Sub clock This box shows the sub clock frequency SUB calculated from the sub clock input frequency and clock division ratio The clocks generated by dividing the sub clock OSUB in prescaler W are supplied to each peripheral function 3 System clock setting Make the necessary settings for the basic clock p to be supplied to the CPU and peripheral modules e CPU and peripheral clock frequency This box shows the frequency of the system clock specified in 1 System clock selection e System clock divider se
222. r Section 5 Generated Functions Reference Generated function Boolean __ EnableEventCounter_T Resource _p Setting No void Peripheral Module Timer Event Counter Mode Description Event counter mode operation control Operation start Parameters Return value RAPI_TRUE is returned Remarks This function is not generated for the timer B1 in H8 3687 36049 36077 36109 6 3 _ DisableEventCounter Generated function Boolean __ DisableEventCounter_T Resource _p Setting No void Peripheral Module Timer Event Counter Mode Description Event counter mode operation control Operation stop Parameters Return value RAPI_TRUE is returned Remarks This function is not generated for the timer B1 in H8 3687 36049 36077 36109 6 4 _ DestroyEventCounter Generated function Boolean __ DestroyEventCounter_T Resource _p Setting No void Peripheral Module Timer Event Counter Mode Description Destroy event counter mode Parameters Return value RAPI_TRUE is returned 6 5 _ GetEventCounter Generated function Boolean __GetEventCounter_T Resource _p Setting No unsigned int data Peripheral Module Timer Event Counter Mode Description Get event counter mode counter value Parameters data Pointer to the buffer in which counter value is stored Return value RAPI_TRUE is returned 7 Time
223. r Noise canceller Table 4 2 12 Noise canceller settings Microcomputer Item Description H8 36049 36109 Noise canceling function available Takes noise from the RXD_3 input signal Noise canceling function not available Does not use noise canceller Selectable when the SCI channel 3 is selected Break data Select the break output level at the end of serial transmission This item may be unselectable depending on the microcomputer type Table 4 2 13 shows the settings available for Break data Table 4 2 13 Break data settings Microcomputer Item Description SH7125 Low output Sets the TXD pin as low level output High output Sets the TXD pin as high level output REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 31 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Clock port output data Specifies the data output through the SCK pin in the serial port This item may be unselectable depending on the microcomputer type Table 4 2 14 shows the settings available for Clock port output data Table 4 2 14 Clock port output data settings Microcomputer Item Description SH7125 Low output Outputs low level through the SCK pin High output Outputs high level through the SCK pin Clock output Outputs the clock with a frequency 16 times the bit rate When the external clock is used the SCK pin always w
224. r Pulse Width Modulation Mode 7 1 CreatePulseWidthModulationMode Generated function Boolean ___ CreatePulseWidthModulationMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Modulation Mode Description Create pulse width modulation mode setting Parameters Return value RAPI_TRUE is returned 7 2 EnablePulseWidthModulationMode Generated function Boolean ___ EnablePulseWidthModulationMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Modulation Mode Description Pulse width modulation mode operation control Operation start Parameters Return value RAPI_TRUE is returned 7 3 DisablePulseWidthModulationMode Generated function Boolean ___ DisablePulseWidthModulationMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Modulation Mode Description Pulse width modulation mode operation control Operation stop Parameters Return value RAPI_TRUE is returned 7 4 DestroyPulseWidthModulationMode Generated function Boolean __DestroyPulseWidthModulationMode_T Resource _p Setting No void Peripheral Module Timer Pulse Width Modulation Mode Description Destroy pulse width modulation mode Parameters Return value RAPI_TRUE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 5 8 Peripheral Driver Generator 8
225. r inputs is prohibited To clear the gate function specify Gate function clear Valid only when Timer S channel 6 or 7 is selected Gate function clear Specify this item when using the gate function This item may be unselectable depending on the microcomputer type Table 4 4 48 shows the settings available for Gate function clear Table 4 4 48 Gate function clear settings Microcomputer Item Description M16C 28 28B 29 Not used Select this setting when Do not use gate function is selected in Gate function Clear at When the gate function is used select this setting to again channel i accept triggers After this setting is selected a trigger input is accepted again when the G1Pop register value p 4 in channel 6 or p 5 in channel 7 matches the base timer value When using the gate function clear setting select Used at channel i in Gate function Valid only when Timer S channel 6 or 7 is selected Prescaler Specify this item when using the prescaler This item may be unselectable depending on the microcomputer type Table 4 4 49 shows the settings available for Prescaler Table 4 4 49 Prescaler settings Microcomputer Item Description M16C 28 28B 29 Not used The prescaler function is not used Time measurement is executed every time a trigger signal is applied Clear at The prescaler function is used Time measurement is c
226. ral Driver Generator Section 5 Generated Functions Reference The following shows the details of each function 1 Serial 1 1 OpenSerialDriver 1 1 1 1 1 Generated function Boolean __OpenSerialDriver_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Open Initialize the appointed serial I F setting Parameters Return value RAPI_TRUE is returned 1 2 CloseSerialDriver Generated function Boolean __ CloseSerialDriver_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Close the appointed serial I F Parameters Return value RAPI_TRUE is returned 3__ ConfigSerialDriverNotify Generated function Boolean __ConfigSerialDriverNotify_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Register the appointed type of notify function with driver Parameters Return value RAPI_TRUE is returned 4__SetSerialFormat Generated function Boolean __ SetSerialFormat_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Change serial setting Parameters Return value If serial communication was successfully set RAPI_TRUE is returned if settings failed RAPI_FALSE is returned
227. ration 10 3 __DestroyInputCapture Destroy input capture mode 10 4 __DestroyInputCapture_ALL Destroy input capture mode 10 5 __ GetCaptureValue Get the counter value of the timer 11 1 Timer __CreateOutputCompare Initialize output compare mode 11 2 Output compare __EnableOutputCompare Output compare mode operation control start or stop mode operation 11 3 __DestroyOutputCompare Destroy output compare mode 11 4 __DestroyOutputCompare_ALL Destroy output compare mode 11 5 __GetTimerFlag Get the flag of timer 11 6 __ClearTimerFlag Clear the flag of timer The following shows the details of each function 1 Serial Communication Interface 1 1 CreateSCI Generated function Boolean __CreateSCl_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Initialize serial communication Parameters Return value If SCI communication was successfully initialized RAPI_TRUE is returned otherwise RAPI_FALSE is returned 1 2 DestroySCI Generated function Boolean __DestroySCl_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Close the serial port Parameters Return value RAPI_TRUE is returned ji 3 __StartSCIReceiving Generated function Boolean __ StartSClReceiving_ Mode _U Resource _p Setting No un
228. re mode setting dialog box Timer type Select the timer resource to be set up Selecting Timer type none allows the timer setting to be made with no resource being selected here and any resource can be assigned to the setting Note that Timer type none is not available for the SH7125 or H8S Tiny Count source Select the count source for the counter Count source divider n Specify the divider register value This item may be unselectable depending on the microcomputer type Table 4 4 42 shows the settings available for Count source Table 4 4 42 Divider register value settings Microcomputer Description M16C 28 28B 29 When value n is specified here counting is done with the frequency obtained by dividing the count source by n 1 A value from 0 to 255 can be specified When 0 is specified the count source frequency is not divided REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 67 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Frequency of count source This box shows the frequency of the selected count source This item may not be enabled depending on the microcomputer type This item is not available for the 16C Tiny series Clock edge Select the edge of the clock to be counted This item may be unselectable depending on the microcomputer type Table 4 4 43 shows the settings available for Clock edge Table 4 4 43 Clock edge setting
229. rescaler or timer values are written 20203 20223 register and counter to both the reload register and counter 1 Timer Y Z 2 Timer RA RB REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 40 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Gate function Set up the gate function This item may be unselectable depending on the microcomputer type or timer resource Table 4 4 11 shows the settings available for Gate function Table 4 4 11 Gate function settings Microcomputer Item Description M16C 62P Do not use gate function Counts regardless of TailN pin input M16C 28 29 Count while input on the TailN pin is low Counts while input on the TailN pin is low Count while input on the TailN pin is Counts while input on the TAIIN pin is high high Valid only when timer A is selected A D Converter Start Set up the A D converter start request This item may be unselectable depending on the microcomputer type Table 4 4 12 shows the settings available for A D Converter Start Table 4 4 12 A D Converter Start settings Microcomputer Item Description SH7125 Disabled A D Disables generation of A D converter start request by TGRA converter start compare match request Enable A D converter Enables generation of A D converter start request by TGRA start request compare match To start A D conversion by a TGRA compare match
230. rface Description Stop reception of serial communication Parameters data Wait time until stopping SCI reception Return value If stop of SCI reception is successful and there are no receive errors RAPI_TRUE is returned otherwise RAPI_FALSE is returned ji 6 _ StopSCISending Generated function Boolean __ StopSCISending_ Mode _U Resource _p Setting No unsigned short data Peripheral Module Serial Communication Interface Description Stop transmission of serial communication Parameters data Wait time until SCI transmission is stopped Return value If stop of SCI transmission is successful RAPI_TRUE is returned otherwise RAPI_FALSE is returned 1 7 _ PollingSCIReceiving Generated function Boolean __ PollingSClReceiving_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Perform reception of serial communication by polling Parameters Return value If the specification of serial port or the received data is invalid RAPI_FALSE is returned otherwise RAPI_TRUE is returned 1 8 PollingSCISending Generated function Boolean __ PollingSClSending_ Mode _U Resource _p Setting No void Peripheral Module Serial Communication Interface Description Perform transmission of serial communication by polling Parameters Return value RAPI_TRUE is returned
231. riod and Duty values and the frequency of the count source are shown here Period This box shows the actual period when the calculated register values are applied Setting value Each register value is calculated from the Period and Duty values and shown here If a register value falls outside the allowed setting range the settings in this dialog box are not applied when the Setting button described later is clicked Each value is written to the corresponding register when the driver source code created according to this dialog box setting is used The necessary register settings depend on the microcomputer type Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS 4 58 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 4 4 Pulse Period Measurement Mode Table 4 4 31 shows the timer resources that can be set to the pulse period measurement mode in each microcomputer Table 4 4 31 Timer Resources Supporting Pulse Period Measurement Mode in Each Microcomputer Microcomputer
232. ription H8S 20103 Do not use gate function The gate function will not be used H8S 20203 Count while input on the An external event input is enabled when the IRQ2 H83 20223 IRQ2 pin is high pin is at a high level REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 48 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Generate batch source Select this check box to create the driver source code for all peripheral I O modules when clicking on the Setting button Setting Clicking on this button stores the settings and closes the dialog box When Generate batch source is selected the driver source code is created Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 49 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 4 3 Pulse Width Modulation Mode Table 4 4 23 shows the timer resources that can be set to the pulse width modulation mode in each microcomputer Table 4 4 23 Timer Resources Supporting Event Counter Mode in Each Microcomputer Series Group Timer resources N16C 60 M16C 62p AO 4 M16C Tiny M16C 28 28B 29 AO 4 R8C Tiny R8C 13 Y Z R8C 22 29 2A 2D RB H8 300H Tiny H8 3687 36077 36049 36109 V SH Tiny SH7125 Channel 0 4 H8S Tiny H8S 20103 20203 20223 RB The following gives an overview of
233. rocomputer type or selected serial resource Table 4 2 5 shows the settings available for CTS RTS function Table 4 2 5 CTS RTS function settings Microcomputer Item Description M16C 62p 1 Do not use CTS RTS function Does not use CTS RTS function M16C 28 28B 29 1 Select CTS function Uses CTS function Select RTS function 2 Uses RTS function Valid only when any of UARTO to UART2 is selected 2 Cannot be selected when the internal clock is selected in the clock synchronous serial communication mode Noise canceller Leave this item unspecified Clock pin select Select the pins to be used for transfer clock input output This item may be unselectable depending on the microcomputer type and the selected serial communication resource Table 4 2 6 shows the settings available for Clock pin select Table 4 2 6 Clock pin select settings Microcomputer Item Description R8C 2A 2B 2C 2D pg 5 Uses P0_5 pin for transfer clock input output P6_5 Uses P6_5 pin for transfer clock input output Valid only when any of UART1 is selected REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 26 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Transmit Receive pins select Select the pins to be used for transmission and reception This item may be unselectable depending on the microcomputer type and the selected serial communication reso
234. rt address of register information To edit register information select it from Transfer pattern list The tick in the checkbox cannot be removed To delete register information click on the Delete last register information button If the address specified for Start address of register information or its subsequent addresses have already been used as Start address of register information for other activation sources the chain transfer is not possible Chain transfer select Select Consecutively or When transfer counter is 0 as the type of chain transfer This option is only selectable when the Chain transfer enable checkbox has been selected Transfer pattern list When a single activation source is used for continuous transfer of several data units Transfer pattern list lists the corresponding sets of register information in the order that they are to be transferred To edit a set of register information click on Transfer pattern i i indicates the order or select it by using the Enter key The selected set of register information is displayed in the dialog box When Chain transfer enable is not selected only Transfer pattern 1 is shown in Transfer pattern list REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 4 96 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Delete last register information Clicking on this button deletes the last element shown in Transfer pattern l
235. rtain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or system manufactured by you Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electron
236. s Return value If A D converter status flag is successfully cleared RAPI_TRUE is returned if failed RAPI_FALSE is returned 4 I O Port 4 1 SetlOPort Generated function Boolean __ SetlOPort__p Setting No _ Port void Peripheral Module I O Port Description Initialize I O port Parameters Return value RAPI_TRUE is returned 4 2 SetlOPort_ALL Generated function Boolean __ReadlOPort_ALL unsigned long data1 void data2 Peripheral Module I O Port Description Read the value of I O port Parameters Refer to the Renesas Embedded Application Programming Interface User s Manual for SH Tiny __ReadlOPort section Return value If the specification of I O port is invalid RAPI_FALSE is returned otherwise RAPI_TRUE is returned 4 3 WritelOPort_ALL Generated function Boolean __WritelOPort_ALL unsigned long data1 unsigned short data2 Peripheral Module I O Port Description Write data to I O port Parameters Refer to the Renesas Embedded Application Programming Interface User s Manual for SH Tiny __WritelOPort section Return value If the specification of I O port is invalid RAPI_FALSE is returned otherwise RAPI_TRUE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 s2ENESAS 5 19 Peripheral Driver Generator Section 5 Generated Functions Reference 5 Timer Timer Mode 5 1 CreateTi
237. s follows Function Declaration void specified notification function name void Interruption priority level Specify the compare match interrupt priority level when enabling the compare match interrupt in the TGR setting tab The priority level setting is shared by all TGR setting tabs Output waveform width period The information of PWM pulse generated by the above settings are shown here Period This box shows the period of PWM pulse Frequency This box shows the frequency of PWM pulse Duty Leave this item unspecified REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS 4 53 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Waveform display area The PWM waveform to be generated is displayed Figure 4 4 4 and Figure 4 4 5 are examples of display Settings PWM mode Mode 1 Counter clearing source TGRD compare match TGR set value TGRA 5 TGRB 10 TGRC 15 TGRD 20 Initial output TGRA 0 Toggle output Output on TGRB 0 Toggle output compare match TGRC 0 Toggle output TGRD 0 Toggle output Figure 4 4 4 Example of PWM pulse display PWM Mode 1 Settings PWM mode Mode 2 Counter clearing source TGRD compare match TGR set value TGRA 5 TGRB 10 TGRC 15 TGRD 20 Initial output TGRA 0 Toggle output Note In mode 2 PWM output is not possible for Output on TGRB 1 Toggle output t
238. s of mass destruction or for the purpose of any other military use When exporting the products or technology described herein you should follow the applicable export control laws and regulations and procedures required by such laws and regulations All information included in this document such as product data diagrams charts programs algorithms and application circuit examples is current as of the date this document is issued Such information however is subject to change without any prior notice Before purchasing or using any Renesas products listed in this document please confirm the latest product information with a Renesas sales office Also please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website http www renesas com Renesas has used reasonable care in compiling the information included in this document but Renesas assumes no liability whatsoever for any damages incurred as a result of errors or omissions in the information included in this document When using or otherwise relying on the information in this document you should evaluate the information in light of the total system before deciding about the applicability of such information to the intended application Renesas makes no representations warranties or guaranties regarding the suitability of its products for any particular application and specifically disclaims any liability ari
239. sceesibesceeci di cdacvaeagecesd lege cvageevieedbe Webeuseeteasuads AE ER EE E TER EE E ERE 3 7 3 4 Selecting Setting Peripheral I O Modules essesseessesenesensreseessrseresssrersresrestrstnressrsrsttntestnstrrtssreressentestnseeee 3 8 3 4 1 Creating a New Setup Pattern of Peripheral I O Modules 0 eeceecesesseesecseeeeceeeeeceaeeeeesecaeeeenaeereeaseneeaes 3 8 3 4 2 Modifying a Setup Pattern of Peripheral I O Modules sennessesseeseeseesessesesssesesresersrssrerssseseesseseeseseeses 3 10 3 4 3 Duplicating a Setup Pattern of Peripheral I O Modules es eeescssceesceseerceeceeeeeceaeeeeeaecaeseeeneeeneeaeenees 3 10 3 4 4 Deleting a Setup Pattern of Peripheral I O Modules ccccescesseesseeseeceeeeeeeeeeeeceeeceeeceaeenseenaeenaeeneeeaees 3 11 3 5 Allocating and Deleting a Resource s i cicccc scccesceccecescsccsectseccsecaseccaeeadecdsccasecccvadecdedeccdunsdecdecensecdacsaceadesecsadessae 3 11 3 5 1 Allocating a RESOUECE iirst eee E SER EE TE EEr E velista satpsec set eax ences aese etic 3 11 3 5 2 Deleting A RESOUr Ces css lt cits ssc cacshedss cess esas Haak Peas E AG cans ht hs Pet sdc ecole RAG dase 3 11 3 6 Generating Sources Collectively s cc csccccccciccccscsacccctdeccacsaseddecsacecdaceadeecsceaseccscvaeedsceadsevtcesteccadeddsccaseddoccadocdsends 3 12 3 7 Viewing Generated Function Information in CSV Format c ccccesceescesecseceeeceeecaeecaeeeseeeeeeeeeeeeeeeeeeeeeeseens 3 12 3 8 Updating a Generate
240. signed char data1 unsigned short data2 unsigned short data3 Peripheral Module Serial Communication Interface Description Start reception of serial communication and get received data Parameters data1 Pointer to buffer storing the received data data2 Number of bytes received data3 Pointer to address storing the number of actual received data Return value If start up for SCI reception is successful RAPI_TRUE is returned otherwise RAPI_FALSE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 15 Peripheral Driver Generator 1 4 StartSCISending Section 5 Generated Functions Reference Generated function Boolean __ StartSClSending_ Mode _U Resource _p Setting No unsigned char data1 unsigned short data2 unsigned short data3 Peripheral Module Serial Communication Interface Description Start transmission of serial communication and write transmit data to transmit buffer Parameters data1 Pointer to transmit data data2 Number of bytes transmitted data3 Pointer to address storing the number of the actual transmitted data Return value If start up for SCI transmission is successful RAPI_TRUE is returned otherwise RAPI_FALSE is returned 1 5 _ StopSCIReceiving Generated function Boolean __ StopSCIReceiving_ Mode _U Resource _p Setting No unsigned short data Peripheral Module Serial Communication Inte
241. sing out of the application and use of the information in this document or Renesas products With the exception of products specified by Renesas as suitable for automobile applications Renesas products are not designed manufactured or tested for applications or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk of human injury or which require especially high quality and reliability such as safety systems or equipment or systems for transportation and traffic healthcare combustion control aerospace and aeronautics nuclear power or undersea communication transmission If you are considering the use of our products for such purposes please contact a Renesas sales office beforehand Renesas shall have no liability for damages arising out of the uses set forth above Notwithstanding the preceding paragraph you should not use Renesas products for the purposes listed below 1 artificial life support devices or systems 2 surgical implantations 3 healthcare intervention e g excision administration of medication etc 4 any other purposes that pose a direct threat to human life Renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who elect to use Renesas products in any of the foregoing applications shall indemnify and hold harmless Renesas Technology Corp its affiliated companies and their officers directors and employees a
242. sion information of the PDG 1 Setup pattern refers to the details of peripheral I O settings 2 This item may be unselectable depending on the microcomputer type 1 9 Toolbar The toolbar icons are listed in Table 1 9 1 Table 1 9 1 List of Toolbar Icons New project O Creates a new project Always Open Opens an existing project Always Save S Saves the open project When a project is opened Project Convert EE Converts the open project for use in other When a project is opened microcomputers Batch source generate Si Generates the sources for each setup completed When peripheral I O settings are REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 1 10 Peripheral Driver Generator Section 1 Overview Button Name Icon Operation Situation in which button is available peripheral IO collectively completed Output function list display Displays output function list After batch source generation is performed Output function list update m Updates output function list After batch source generation is performed Help Shows the version of the PDG Always CPU setting Modifies settings for a CPU When a project is opened New serial synchronous mode setup creation ma Creates a new setup pattern of serial synchronous mode When a project is opened New serial asynchronous mode setup creation Creates
243. source Periodic The counter is cleared by a compare match with the general register A compare match can be generated at specified intervals Valid only when any of channel 0 to 4 is selected Count source Select the count source for the counter Frequency of count source This box shows the frequency of the selected count source Clock edge Select the clock edge to be used for count This item may be unselectable depending on the microcomputer type Period Specify the period of overflow underflow or compare match Result of calculation This box shows the optimum register value actual period and error ratio as a result of calculation from the selected count source and input frequency Period This box shows the actual time to be obtained by applying the optimum register value calculated from the specified period Error This box shows the error ratio of the actual time to the specified period Setting value This box shows the optimum register value calculated from the specified period Operation during initialization Select Operation start or Operation stop for the timer operation immediately after the initial setting The available settings depend on the microcomputer or timer resource Counter clear function Select the counter clearing source This item may be unselectable depending on the microcomputer type Timer output Set up the timer pins The available settings depend on the microcomput
244. source This check box is always selected automatically when the sub clock is used as the system clock Select this box manually to use fC4 or fC32 as the count source for timers RA and RE when using the on chip oscillator clock as the system clock e Input frequency to sub clock circle The sub clock frequency is fixed at 0 03276 MHz e Sub clock divider Only Divided by 1 can be specified e Sub clock This box shows the sub clock frequency calculated from the sub clock input frequency and clock division ratio It is fixed at 0 03276 MHz REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 12 Peripheral Driver Generator 3 System clock setting Section 4 How to Set up Clocks and Peripheral I O Modules Specify the frequency division ratio used to supply the clock selected in 1 System clock selection to the CPU e CPU and peripheral clock frequency This box shows the frequency of the clock specified in 1 System clock selection e System clock divider selection Leave this item unspecified e CPU and Peripheral tabs Make the necessary settings for the CPU and peripheral function clocks Table 4 1 17 shows the details of each item Table 4 1 17 System Clock Settings R8C 26 29 R8C 2A 2D Item Settings CPU Clock divider selection Select the frequency division ratio for the clock to be supplied to the CPU Input Clock Shows the frequency of the clock to be supplied to the CPU which
245. specified e CPU and Peripheral tabs Make the necessary settings for the CPU and peripheral function clocks Table 4 1 6 shows the details of each item Table 4 1 6 System Clock Settings R8C 13 Item Settings CPU Clock divider Select the frequency division ratio for the clock to be supplied to the selection CPU Input Clock Shows the frequency of the clock to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Period Shows the period of a clock cycle to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Peripheral Clock divider Leave this item unspecified selection The clock selected in System clock selection after being divided by the various division ratios are supplied to the peripheral I O modules The clock to be used in each peripheral I O module should be separately specified in each peripheral I O module setting dialog box The frequency of fRING is determined according to the settings in On chip oscillator clock Input Clock Shows the frequency of the clock selected in System clock selection Period Shows the period of a clock cycle selected in System clock selection REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 5 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 1 3 Se
246. t In port 3 Input port group 1 In port 6 Input port group 2 The checkbox is selected Pin function is General I O port and I O selection is Used as an output In port 3 Output port group 1 In port 6 Output port group 2 REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 101 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Event output edge Select the type of output i e the edge on which the event signal is to be output for the port group designated as an output port group Port settings Shows the current states of all single ports and port groups Setting Clicking on this button stores the settings and closes the dialog box Cancel Clicking on this button closes the dialog box without storing the settings Event Generation timer setting The event generation timer can generate an event at specified interval The generated event can be connected to another module Four channel event output is available Table 4 8 6 shows event signals assigned to channels of the event generation timer Table 4 8 6 Event signals assigned to channels of the event generation timer Channel 0 1 2 3 Event signal Timer ELC eventO Timer ELC event1 Timer ELC event 2 Timer ELC event 3 Count source Select the count source for the counter Period This box shows the frequency of the selected count source Activation in initializ
247. t Table 4 3 3 shows the available settings Table 4 3 3 Pull up available settings Microcomputer Pin Description M16C 62P Except P70 P71 and P85 Not selected M16C Tiny All pins Disables pull up R8C 13 Except P46 and P47 Selected R8C 22 29 Except P42 P46 and P47 Enables pull up for the pin set as R8C 2A 2D Except P42 P46 and P47 the input port H8 3687 H8 36049 Porti and P50 to P55 H8 36077 H8 36109 H8S 20103 Except P56 and P57 H8S 20203 H8S 20223 Pins set as the input ports Read port latch regardless of I O ports Specify the operation performed when the P1 register is read This item may be unselectable depending on the microcomputer type and port Table 4 3 4 shows the available settings Table 4 3 4 Port register read settings Microcomputer Port Description REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 34 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Mod ules M16C 62P M16C 28 28B 29 _ Not selected When the port is set for input the input levels of P1 0 to P17 pins are read When set for output the port latch is read Selected The port latch is read regardless of whether the port is set for input or output Show pin function list This button works only in the SH7125 or H8S Tiny Clicking on this button shows the list of functions selected for each port REJ1
248. t interruption LSB first issie sf j o MSB first selection LSB first hd Permit receive interruption Reverse data logic Do not reverse Receive interruption leve CTS RTS function Do not use CTS ATS function T Permit S1 G interruptior Noiee a 1 0 interruption leye Notification function name t Receive ij jecejye Clock pin select Figure 3 4 4 Clock asynchronous SIO mode setting Dialog Box 3 4 3 Duplicating a Setup Pattern of Peripheral I O Modules You can duplicate an existing setup pattern When a resource is allocated to a setting to be duplicated the resource setting is also duplicated A setup pattern can be duplicated only when Setting is selected on the trees in the left of the main window 1 Select Setting on the trees in the left of the main window and then select Function gt Serial A D I O Timer or INT gt Duplicate setting from the menu or right click on Setting and then select Duplicate setting from the pop up menu 2 A duplicated setup pattern is shown at the bottom of the mode that the original setup pattern belongs to REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 10 Peripheral Driver Generator Section 3 How to Operate the PDG 3 4 4 Deleting a Setup Pattern of Peripheral I O Modules You can delete an existing setup pattern When a resource is allocated to a setting to be deleted the resource setting is also deleted A setup pattern can be deleted only wh
249. ted Delete setting D Deletes a setup pattern of a timer 1 Only available when timer setting is selected Modify setting M Modifies timer settings Only available when timer setting is selected Set timer T Sets a timer type for a setup pattern of a timer 1 Only available when timer setting is selected Delete timer L Deletes a timer type from a setup pattern of a timer 1 Only available when a timer is selected INT N Newly create setting N Creates a new setup pattern of external interrupt 1 Only available when a project is opened Duplicate setting C Duplicates a setup pattern of external interrupt 1 Only available when external interrupt setting is selected Delete setting D Deletes a setup pattern of external interrupt 1 Only available when external interrupt setting is selected Modify setting M Modifies settings for external interrupt setting Only available when external interrupt setting is selected Set interrupt 1 Sets an interrupt type for a setup pattern of external interrupt 1 Only available when external interrupt setting is selected Delete interrupt L Deletes an interrupt type from a setup pattern of external interrupt m1 Only available when external interrupt type is selected REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 1 9 Peripheral Driver Generator Section 1 Overview
250. ter H8S Tiny series IRQO IADEND 2 1 IIC2 SSU_RXI ITDMAO_1 ITDMC1_3 3 IRQ1 IADCMP_2 1 IIC2 SSU_TXI ITDMBO_1 ITDMD1_3 3 IRQ2 ELC1FP ITCMA 2 ITDMCO_1 ITESC IRQ3 ELC2FP ITCMB 2 ITDMDO_1 ITEMI IRQ4 SCI3_1 RX ITCMC 2 ITDMA1_2 3 ITEHR IRQ5 SCI3_1 TXI ITCMD 2 ITDMB1_2 3 ITEDY IRQ6 SCI3_2 RX ITDMAO_0O ITDMC1_2 3 ITEMK IRQ7 SCI3_2 TXI ITDMBO_0O ITDMD1_2 3 ITGMA IADEND_1 SCI3_3 RXI ITDMCO_0 ITDMA1_3 3 ITGMB IADCMP_1 SCI3_3TXI ITCMDO_0 ITDMB1_3 3 SOFTWEAR 1 Valid only when H8S 20223 is selected 2 Valid only when H8S 20103 is selected 3 Invalid only when H8S 20103 is selected Figure 4 7 1 shows the DTC setting dialog box REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 94 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules DIC setting Activation source C Chain pattemNo Register information Chain pattern Start address of register information 000000 Source side Destination side Address 000000 Address 000000 Operation Fixed Se Operation Fixed EA Transfer mode Normal mode Interrupt select After every transfer completion Transfer size Byte size v r Chain transfer I Chain transfer enable Transfer counter 0 zl V Generate batch source M Cancel Figure 4 7 1 DTC setting dialog box Start address of register information Specify the address located the register information in the on chip RAM Register inf
251. ter value j 0 to 7 SR waveform Output signal level H when the base timer value matches the G1POj register value j 0 2 4 6 The signal switches to L when the base timer value matches the G1POk k j 1 register value R8C 26 29 Timer RC R8C 2A 2D Timer RC R8C 22 25 Timer RD R8C 2A 2D Timer RD H8 3687 36077 H8 36049 36109 0 output 0 output at compare match 1 output 1 output at compare match Toggle output Toggle output at compare match R8C 22 25 Timer RE R8C 2A 2D Timer RE Disable output Disables clock output from the TREO pin f2 output Outputs f2 from the TREO pin f4 output Outputs f4 from the TREO pin f8 output Outputs f8 from the TREO pin Compare output Sets the TREO pin as the compare output pin At every compare match the output polarity is inverted R8C Tiny Can not be Specify the output waveform in Compare 0 R8C 13 Timer RC specified output mode and Compare 1 output mode R8C 2A 2D Timer RF described below SH7125 0 output 0 output at compare match H8S 20103 20203 1 output 1 output at compare match H8S 20223 Toggle output Toggle output at compare match REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 80 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Compare 0 output mode Compare 1 output mode Set up the output at compare match This item
252. the division ratio for the MTU2 clock MP9 frequency selection Input Clock Shows the frequency of the MTU2 clock MP9 calculated from the frequency of the output from the PLL circuit and the division ratio selected in Clock divider selection Peripheral Shows the period of an MTU2 clock MP cycle REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 4 19 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules 4 1 9 Setting Clocks for H8S 20103 H8S 20203 H8S 20223 Figure 4 1 9 shows the CPU clock setting dialog box for the H8S 20103 H8S 20203 H8S 20223 CPU clock setting System clock selection EWor r v Main clock V Use as peripheral function clock source Input frequency to main clock circuit 20 000000 MHz On chip oscillator clock I Use as peripheral function clock source a ame Sub clock V Use as peripheral function clock source Input frequency to sub clock circuit 0 032768 MHz Divided by 1 ba 0 032768 MHz Divider selection Sub clock 1 System clock selection Supplied clock to CPU and peripheral 20 000000 MHz System clock divider selection Divided by 1 X CPU DTC Peripheral Clock divider selection Divided by 1 m 20 000000 MHz 50 000000 ps Figure 4 1 9 CPU Clock Setting Dialog Box H8S 20103 H8S 20203 H8S 20223 Input Clock Period Cancel Select a clock to be used as the system operation clock
253. the pulse width modulation mode settings for each microcomputer M16C 62P M16C 28 28B 29 Timer A outputs PWM waveforms from the TAiOUT pin in succession in pulse width modulation mode PWM mode The counter functions as a 16 bit pulse width modulator or an 8 bit pulse width modulator The timer generates a waveform with the specified period and high level width Interrupts at the falling edges of the PWM pulse at the end of the high level duration can be detected R8C 13 Timer Y or Z outputs PWM waveforms in succession in programmable waveform generation mode In this mode the signal output from the CNTR1 or TZOUT pin is inverted every time the counter underflows while the values in the timer primary register and timer secondary register are counted alternately The timer primary register and timer secondary register values are automatically calculated from the specified period and duty Timer Y or Z interrupts generated at the end of the secondary period can be detected R8C 22 to 29 2A to 2D H8S 20103 20203 20223 Timer RB outputs PWM waveforms in succession in programmable waveform generation mode In this mode the signal output from the TRBO pin is inverted every time the counter underflows while the values in the timer primary register and timer secondary register are counted alternately The timer primary register and timer secondary register values are automatically calculated from the specified period and duty Timer RB interrupts
254. ting dialog box is opened the setting of the receive module selected in the ELC setting dialog box is automatically displayed here Event signal Select the event signal The available settings depend on the Event receive module Operations when event is input Select the operation of the module when an event is input The available settings depend on the Event receive module Interrupt source If you have selected Interrupt 1 or Interrupt 2 for Event receive module the name of the interrupt source for the selected module is displayed here Table 4 8 2 Interrupt source Event receive module Interrupt source Interrupts 1 ELC1FP Interrupts 2 ELC2FP Interruption function name If you have selected Interrupt 1 or Interrupt 2 for Event receive module enter the name of an interrupt function to be called Setting Clicking on this button stores the settings and closes the dialog box Cancel Clicking on this button closes the dialog box without storing the settings REJ10J2018 0100 Rev 1 00 May 29 2009 PZENESAS Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Event link port setting Clicking on this button opens the Event link port setting dialog box shown in Figure 4 8 3 Event link port setting Port group Single port Input port group 1 or Output port group 1 Port select Port 3 X Bit setting Bit number Pin function 120
255. tion clock except for C32 e Use as peripheral function clock source This check box is always selected automatically when the PLL clock is used as the CPU clock Select this box manually when using the sub clock as the CPU clock and using the PLL clock as the peripheral function clock except for fC32 e Input frequency to PLL circle Specify the frequency of the XIN input to the PLL frequency synthesizer e Selection of multiplication Select the multiplication ratio of the PLL frequency synthesizer e PLL frequency This box shows the frequency of the PLL clock which is calculated from the frequency of the input clock and the multiplication ratio Sub clock Make settings for this item when the sub clock is selected as the CPU clock or when a clock other than the sub clock is selected as the CPU clock and fC32 is used as the peripheral function clock e Use as peripheral function clock source This check box is always selected automatically when the sub clock is used as the system clock Select this box manually to use fC32 as the count source for timers A and B when using a clock other than the sub clock as the system clock e Input frequency to sub clock circle The sub clock frequency is fixed at 0 03276 MHz e Sub clock divider Only Divided by 1 can be specified e Sub clock This box shows the sub clock frequency calculated from the sub clock input frequency and clock division ratio It is fixed at 0 03276 MHz 3 S
256. tput port group 2 Port 6 Pin function Shows the function of each of the port pins input or output selected for Port select These settings cannot be modified I O selection Shows whether each of the port pins selected for Port select are used for input or output These settings cannot be modified Include in group In port group Bit number specification In Single Port Select the pins to be used as a port group selected in Port group Single port When a single port has been selected you can only select one pin Status Shows whether the pins will be used as the port group selected in Port group Single port These settings cannot be modified The information displayed here depends on Pin function I O selection and bit selection Table 4 8 5 shows all items of Status Table 4 8 5 Status Port group Single port State String in State Single port The radio button is not selected No setting The radio button is selected and Pin Single port 1 to 4 function is General I O port The radio button is selected and Pin Excluded from event link port function is not General I O port setting Port group The checkbox is not selected No setting The checkbox is selected and Pin function is not General I O port Excluded from event link port setting The checkbox is selected Pin function is General I O port and I O selection is Used as an inpu
257. tputCompare Generated function Boolean __ DisableOutputCompare_T Resource _p Setting No void Peripheral Module Timer Output Compare Mode Description Output compare mode operation control Operation stop Parameters Return value RAPI_TRUE is returned 11 4 DestroyOutputCompare Generated function Boolean __DestroyOutputCompare_T Resource _p Setting No void Peripheral Module Timer Output Compare Mode Description Destroys output compare mode Parameters Return value RAPI_TRUE is returned REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS 5 11 Peripheral Driver Generator 12 Event Link Controller 12 1 SetEventLink Section 5 Generated Functions Reference Generated function Boolean _SetEventLink_ALL void Peripheral Module Event Link Controller Description Set all event link port group and single port Parameters Return value Returns RAPILTRUE on success a RAPI_FALSE on failure 12 2 DisableEventLink Generated function Boolean _DisableEventLink_ALL void Peripheral Module Event Link Controller Description Disable event link settings Parameters Return value Returns RAPILTRUE on success a RAPILFALSE on failure 12 3 CreateEventGe nerateTimer Generated function Boolean _CreateEventGenerateTimer_ALL void Peripheral Module Event Link C
258. ts during counting down can be detected The reload register value is loaded to the counter at an underflow A desired value can be specified as the reload register value R8C 13 The counter counts down at specified edges of the external signal input to the CNTRO pin Underflow interrupts can be detected The counter reloads the reload register value at an underflow interrupt and then it continues counting A desired value can be specified as the reload register value R8C 22 to 29 2A to 2D H8S 20103 20203 20223 The counter counts down at specified edges of the external signal input to the TRAIO pin Underflow interrupts can be detected The counter reloads the reload register value at an underflow interrupt and then it continues counting A desired value can be specified as the reload register value H8 3687 36049 36077 36109 The counter in timer B1 or timer V counts up at specified edges of the external signal For timer B1 the interval timer or auto reload timer operation can be selected In interval timer operation the counter starts counting up from 0 it overflows when the count source clock is input after the count reaches H FF In auto reload timer operation the timer load register value is loaded to the counter and the counter starts counting up from that value A desired value can be specified as the timer load register value Each operation is available for detecting overflow interrupts In timer V the counter starts cou
259. tssdcclecessceustags cas ceasaeeeessicces covsetenacsgeenassa casi siaccacetdetaeesausadaidacsateceucntiaceiin 6 2 REJ10J2018 0100 Rev 1 00 May 29 2009 v Peripheral Driver Generator Section 1 Overview l Overview 1 1 PDG Features The PDG allows users to specify settings of microcomputer peripheral I O modules such as serial timer and IO via its GUI and to generate functions which reflect the settings for calling API libraries for those modules 1 Assists in setting up each peripheral IO via GUI 2 Outputs the set contents as functions 3 Registers automatically generated sources collectively into a project of the High performance Embedded Workshop hereafter referred to as HEW gt Peripheral Driver Generator default Deun Be Bee AGEZ m Ci eS ie Clock synchronous SIO m Bit number 8 bit Clock asynchronous SIO BRG register setting value 129 Ta Setting Clock polarity selection an UARTO Reverse data logic CTS RTS function Do not use CTS ATS func e i LSB first MSB first selection LSB fist __ Timer mode Parity bit Parity disable ee One stop bit 3 Clock selection Internal clock wad BRG count source Event counter mody 1 Notification function name Transmit interrupt Transmit interrput inhibit 170 0 Interrupt lt c renesas PDG_p e NPA 7 ci renesas PDG_p Timer type DENSAN EE Operation during initialization Operation start Frequency of co
260. tting Clocks for R8C 22 23 Figure 4 1 3 shows the CPU clock setting dialog box for the R8C 22 23 CPU clock setting System clock selection Main clock x Main clock V Use as peripheral function clock source Input frequency to main clock circuit 20 000000 MHz On chip oscillator clock Use as peripheral function clock source Frequency selection High speed x Divider selection Divided by 2 On chip oscillator frequency 20 000000 iHz Supplied clock to CPU and peripheral 20 000000 MHz CPU Peripheral Clock divider selection Divided by 1 X Input Clock 20 000000 pyr Period 50 000000 ps cee Figure 4 1 3 CPU Clock Setting Dialog Box R8C 22 23 1 System clock selection Select a clock to be used as the CPU clock The main clock or on chip oscillator clock can be selected The clocks selectable in System clock selection correspond to the clock sources shown in Table 4 1 7 Table 4 1 7 Clock Sources of R8C 22 23 Item Clock sources Main clock XIN Clock Oscillation Circuit On chip oscillator clock On chip Oscillator High speed On Chip Oscillator Low speed On Chip Oscillator 2 Each clock setting Make the necessary settings for Main clock or On chip oscillator clock selected in System clock selection The CPU clock selected in System clock selection is also used as the peripheral clock Note that only the on chip oscillator clock is allowed as
261. ultiplication Multiplied by 8 v z PLL frequency 80 000000 MHz 1 CPU Peripheral Timer Clock divider selection Divided by 4 Input Clock 20 000000 jyy gt aoa wre Period 50 000000 ns cee Figure 4 1 8 CPU Clock Setting Dialog Box SH7125 1 System clock selection This box specifies the source of the CPU clock and peripheral function clock As only the PLL circuit can be used as the clock source for the SH7125 the PLL clock is always selected automatically 2 PLL clock setting Specify the frequency of the input to the PLL circuit in PLL clock PLL clock Specify the frequency of the output from the PLL circuit The frequencies of the internal clock I peripheral clock Po and MTU2 clock MP should be specified in the system clock setting which is described later e Use as peripheral function clock source The PLL clock is supplied to the CPU and peripheral functions This check box is always selected automatically e Input frequency to PLL circle Specify the frequency of the input to the PLL circuit Selection of multiplication The PLL circuit multiplies the input clock by eight and outputs the resultant clock Only multiplication by 8 can be selected here e PLL frequency This box shows the frequency of the output from the PLL circuit which is calculated from the frequency of the input to the PLL circuit and the multiplication ratio REJ10J2018 0100 Rev 1 00 May 29 200
262. unt source 20 000000 4411 Interruption Enable Underflow interruption Count source f1 X terrup jS Period 0 000000 micro sec Result of calculation The values in this frame are set Period 0 000000 micro sec Eror 0 000000 Timer output Pulse is output Gate function Do not use gate function X r Figure 1 1 1 Example of PDG Display 4 Supports conversion of the contents set by GUI for diverted use between microcomputers Note The conversion may not be supported depending on the microcomputer 1 2 PDG Project The PDG manages the generated software based on the concept of project Following are managed as project 1 Setup information on each peripheral IO 2 Function management information on set content REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 1 1 Peripheral Driver Generator Section 1 Overview 1 3 Roles of the PDG The user incorporates functions for calling API libraries which are generated by the PDG into a user program to create an application The following schematically shows the relationship between the PDG and the API libraries and applications PDG Setting information Code generator soe DLLs for each Generates functions Compile Link microcomputer User system Application Application Peripheral I O Driver library Hardware Figure 1 3 1 Roles of the PDG 1 4 Operating Environment
263. urce Table 4 2 7 shows the settings available for Transmit Receive pins select Table 4 2 7 Transmit Receive pins select settings Microcomputer Item Description M16C 26 27 Tx1_PO_0 E RX1 P3 7 Uses P3_7 TXD1 RXD1 pin for transmission and reception Txt_PS_7 Uses P3_7 TXD1 P4_5 RXD1 pin for transmission and reception RX1_P4_5 a Tx1_P0_0 Uses P3_6 TXD1 RXD1 pin for transmission and reception Rx1_P3_6 Valid only when any of UART1 is selected Break data Leave this item unspecified Clock port output data Leave this item unspecified Bit rate register Specify the following items to determine the transfer rate Bit rate register settings This box shows the value of the bit rate register This value is automatically calculated from the baud rate determined according to the Count source and Set details settings described below Clock source selection Select the count source for the bit rate register when the internal clock is selected Although this box indicates f1 when the external clock is selected the count source actually used is the external clock Bit Rate This box shows the baud rate value calculated from the bit rate register value and the frequency of the selected count source or the external clock frequency Set details Use this button to calculate the bit rate register value and error ratio to modify the baud rate value or to select the count
264. ure 4 4 7 shows the Pulse Period Measurement Mode dialog box Pulse period measurement mode setting Timer type RA v Operation during initialization Operation start z Count source r 7 se cade aha z Effective edge of measurement pulse Frequency of count source 20 000000 MHz Measurement between a rising edge and the next rising edge of measured pulse z Filter function No digital filter z Period Input pin Set P1_7 for TRAIO pin m Interruption j Result of calculation MV Enable Underflow interruption The values in this frame are set Period 20 000000 yus Error 0 000000 x Setting value Prescaler setting value Timer setting value 1 Interruption priority level H Interruption function name TimerntFunc MV Generate batch source M Cancel Figure 4 4 7 Pulse Period Measurement Mode dialog box Timer type Select the timer resource to be set up Selecting Timer type none allows the timer setting to be made with no resource being selected here and any resource can be assigned to the setting Note that Timer type none is not available for the SH7125 or H8S Tiny Count source Select the count source for the counter Frequency of count source This box shows the frequency of the selected count source Clock edge Select the clock edge to be used for count This item may be unselectable depending on the microcomputer type Period Specify the period of underf
265. ut capture interrupt This item enables detection of input capture interrupt occurrence in the channel or general register Select this item the user created interrupt function will be called when an input capture interrupt occurs In some microcomputers the notification function and interrupt level settings are shared with the overflow interrupt specify lt interrupt type gt interruption priority level and lt interrupt type gt interruption function name described before Digital filter function Specify this item when using the filter function This item may be unselectable depending on the microcomputer type When using the filter function with the clock selected in Digital filter function based clock select Digital filter enable For the microcomputer in which a different clock can be specified for each channel select desired clocks separately REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 70 Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules Gate function Specify this item when using the gate function This item may be unselectable depending on the microcomputer type Table 4 4 47 shows the settings available for Gate function Table 4 4 47 Gate function settings Microcomputer Item Description M16C 28 28B 29 Do not use The gate function is not used gate function Used at The gate function is used After time measurement by the first channel i trigger input accepting trigge
266. vailable for CMP1 Inverse output function Table 4 4 64 CMP1 Inverse output function settings Microcomputer Item Description R8C 13 Output is inversed CMP10 to CMP12 output inverted Timer C Output is not inversed CMP10 to CMP12 output not inverted R8C 2A 2D Output is inversed TRFO10 to TRFO12 output inverted Timer RF Output is not inversed TRFO10 to TRFO12 output not inverted Counter reload Set up the counter reload This item may be unselectable depending on the microcomputer type Table 4 4 65 shows the settings available for Counter reload Table 4 4 65 Counter reload setting Microcomputer Item Description M16C 28 28B 29 Reload at writing The written value is immediately reloaded to the Timer S waveform generation register G1POj j 0 to 7 in each channel and is reflected in the output waveform Relaod at base The written value is reloaded to the waveform timer reset generation register G1POj j 0 to 7 in each channel when the base timer is reset R8C 13 No reload The counter value is not reset at a compare 1 match Reload The counter value is cleared to 0 at a compare 1 match REJ10J2018 0100 Rev 1 00 May 29 2009 7tENESAS Peripheral Driver Generator Section 4 How to Set up Clocks and Peripheral I O Modules A D Converter Start Set up the A D converter start request This item may be unselectable depending on the micro
267. value Timer setting value External event count polarity Falling edge Me Interruption V Enable Underflow interruption Interruption function name TimerlntFunc Interruption priority level 1 r pees a V Generate batch source M Setting Cancel Figure 4 4 2 Event counter mode setting dialog box The following explains how to set each items Timer type Select the timer resource to be set up Selecting No setting allows the timer setting to be made with no resource being selected here and any resource can be assigned to the setting Note that No setting is not available for the SH7125 or H8S Tiny Operation Specify the count operation This item may be unselectable depending on the microcomputer type Table 4 4 14 shows the settings available for Operation Table 4 4 14 Operation settings Microcomputer Item Description SH7125 Free running The counter continues counting up until it overflows The overflow interval cannot be specified it is determined by the frequency of the count source Periodic The counter is cleared by a compare match with the general register A compare match can be generated at specified intervals Phase Counting The counter counts up or down upon detecting phase differences Mode between TCLKA and TCLKB in channel 1 or TCLKC and TCLKD in channel 2 Selectable when channel 1 or 2 is selected REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 44 Perip
268. value used for counting up The H8S 20103 20203 measurement pulse should be longer than twice the etee prescaler period Timer Value to be reloaded when the counter underflows or an effective edge is detected Operation during initialization Select Operation start or Operation stop for the timer operation immediately after the initial setting Counter clear function Select the source for clearing the counter The available settings depend on the microcomputer Table 4 4 34 shows the settings available for Counter clear function Table 4 4 34 Counter clear function settings Microcomputer Item Description SH7125 GRx input capture The input capture in the selected general register is used as x A to D U V W the counter clearing source Specifying the target pin in Input pin which is described later causes the counter value to be saved in the general register and then cleared to 0 when an effective edge of the measurement pulse is input to the pin Effective edge of measurement pulse Select Measurement between a rising edge and the next rising edge of measured pulse or Measurement between a falling edge and the next falling edge of measured pulse as the range of pulse period measurement Filter function Select the sampling frequency for the filter when the filter function is used This item may be unselectable depending on the microcomputer type Table 4 4 35 shows the setti
269. ve interrupt level 0 S170 interrupt f 51 0 interrupt level Baud rate 3600 Noise canceller K Transmit Receive pins select Clock pin select Setting details Related item No source is generated yet The generated sour Others Clock asynchronous SIO mode EE Clock synchronous SIO mode i Figure 3 4 3 Setup Pattern Display Window REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 9 Peripheral Driver Generator Section 3 How to Operate the PDG 3 4 2 Modifying a Setup Pattern of Peripheral I O Modules Modify an existing setup pattern through the following steps 1 Double click on Setting on the trees in the left of the main window or double click on the name of the setting item on the list in the right Or select Function gt CPU Serial A D I O Timer or INT gt Modify setting 2 The dialog box corresponding to the selected peripheral I O module opens Modify the settings 3 Click on the Setting button to close the dialog box The list in the right of the main window reflects the modification to the settings Clock asynchronous SIO mode setting Serial port RSSUT BRG register BRG register setting value l 129 Bit number 8 bit bd BRG count source f1 Stop bit One stop bit iy Baud rate 3600 bps Set details Parity bit Parity disable a Set deta Clock selection Internal clock X Interrupt enable i I Permit transmi
270. ves H width and the period of the period M16C 28 28B 29 pulse width modulator High level width n fj n set value of TAi register i o to 4 Cycle time 2 1 fj fixed fj count source frequency f1 f2 f8 82 fC32 Function as an 8 bit The following gives H width and the period of the period pulse width modulator High level width n x m 1 fj n set value of TAi register high order address Cycle time 28 1 x m 1 fj m set value of TAi register low order address Each register value will be automatically calculated in Result of calculation which is described later Interruption This item enables detection of interrupt occurrence Select the interrupts to be detected and specify the interrupt priority levels the user created interrupt function will be called when an interrupt occurs The following explains how to set each item Enable lt interrupt type gt interruption Select the check box for each interrupt type to detect occurrence of the corresponding interrupt The detectable interrupts depend on the timer type Table 4 4 30 shows the interrupt types that can be enabled in each microcomputer Table 4 4 28 Available Interrupt Types in Each Microcomputer Microcomputer Interrupt Type Description M16C 62P Interrupt at PWM This interrupt is issued at the falling edge of the PWM M16C 28 28B 29 pulse falling edge pulse after the high level period R8C 13 U
271. y and clock division ratio Sub clock Make settings for this item when the sub clock is selected as the CPU clock or when the sub clock is used as the peripheral function clock e Use as peripheral function clock source This check box is always selected automatically when the sub clock is used as the system clock Select this box manually to use fC4 or fC32 as the count source for timers RA and RE when using a clock other than the sub clock as the system clock e Input frequency to sub clock circle The sub clock frequency is fixed at 0 03276 MHz e Sub clock divider Only Divided by 1 can be specified e Sub clock This box shows the sub clock frequency calculated from the sub clock input frequency and clock division ratio It is fixed at 0 03276 MHz REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 4 9 Peripheral Driver Generator 3 System clock setting Section 4 How to Set up Clocks and Peripheral I O Modules Specify the frequency division ratio used to supply the clock selected in 1 System clock selection to the CPU e CPU and peripheral clock frequency This box shows the frequency of the clock specified in 1 System clock selection e System clock divider selection Leave this item unspecified e CPU and Peripheral tabs Make the necessary settings for the CPU and peripheral function clocks Table 4 1 13 shows the details of each item Table 4 1 13 System Clock Settings R8C 24 25 Item
272. ystem clock setting Specify the frequency division ratio used to supply the clock selected in 1 System clock selection to the CPU e CPU and peripheral clock frequency This box shows the frequency of the clock specified in 1 System clock selection e System clock divider selection Leave this item unspecified e CPU and Peripheral tabs Make the necessary settings for the CPU and peripheral function clocks Table 4 1 3 shows the details of each item Table 4 1 3 System Clock Settings M16C 62P M16C 28 M16C 28B M16C 29 Item Settings CPU Clock divider Select the frequency division ratio for the clock to be supplied to the selection CPU Input Clock Shows the frequency of the clock to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Period Shows the period of a clock cycle to be supplied to the CPU which is calculated from the CPU and peripheral clock frequency and Clock divider selection values Peripheral Clock divider Leave this item unspecified selection The clock selected in System clock selection after being divided by the various division ratios are supplied to the peripheral I O modules The clock to be used in each peripheral I O module should be separately specified in each peripheral I O module setting dialog box The frequency of fC32 is determined according to the settings in Sub clock
273. z ci renesas PDG_proj default Serial __ConfigSer Boolean __ConfigSerialDriverNotify_async_UO Register the appointed type of notif Notification Function name 5 c renesas PDG_proj default Serial __SetSerialF Boolean __SetSerialFormat_async_UO_pi void Change serial setting Bit number Clock selection Sto f A ci renesas PDG_proj default Serial __SetSeriall Boolean __SetSerialInterrupt_async_UO_p1 void Set up serial interrupt Transmit interrupt Transmit inte cilrenesas PDG_proj default Serial __StartSeria Boolean __StartSerialReceiving_async_UO_pi Start receiving SA lt ii Clock asynchronous SIO mode Ready C Figure 3 3 3 Existing Project REJ10J2018 0100 Rev 1 00 May 29 2009 RENESAS 3 6 Peripheral Driver Generator Section 3 How to Operate the PDG 3 3 3 Setting CPU Clocks After a new project is created the CPU clock setting dialog box opens automatically Perform setting for CPU clocks CPU clock setting System clock selection EM mS v Main clock IV Use as peripheral function clock source Input frequency to main clock circuit 20 000000 MHz r Supplied clock to CPU and peripheral 20 000000 MHz CPU Peripheral Sub clock Use as peripheral function clock source Clock divider selection Divided by 1 Input Clock 20 000000 MHz Period 50 000000 ps carcel_ Figure 3 3 4 CPU clock setting Dialog Box REJ10J2018 0100 Rev 1 00 May 29 20

Peripheral Driver Generator V.1.04 User`s Manual

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