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2. Layer 1 Top Layer mE FU Emmi W i dc1840bf A were 13 DEMO MANUAL DC 184058 DEMONSTRATION CIRCUIT 16828 LAYOUT Layer 3 VEE Plane 2 LTC CONFIDENTIAL FOR CUSTOMER USE ONLY R34 03 Bi 4112 x 52 C19 Reo OOOO cere Wi 013 N N E RH3 9 1 24 B RI4 o sd 20 m mRC4 026 mmRC3 e 58 n NEN R16 no NN C22 2 z 1 02 RO 42 5555 2557 R22 T CH C9 C8 814 RA3 RA4 00000000000000000000000000000000H HEHEHEHRNNES coc5c4czczci R 623 CH m R13 dc1840bfc 14 A wee DEMO MANUAL DC 18405 DEMONSTRATION CIRCUIT 16808 LAYOUT Top Silkscreen 70055 0 53 POS Yay 51V 57V c AGND 00712 00711 OUTIO 0019 0018 0017 AGND m6 AGND VEE m PSE MOTHER BOARD in Mo ow m DEMO CIRCUIT 1680A 29 imf mos f o ij Bo www lineor com Co es Bo ia m econ PORTS m a PORTS 5 econ eeee eoo PORTS PORTS ADDRESS LO sws m m 5 mooo LOWER
3. ay sem SwRI I awa sTo JHOLSH NOS 090 NI 6 02 4 2 TIV AL Ure DEMO MANUAL DC 184058 DC1680A SCHEMATIC DIAGRAM SLUVd ADOTONHO3L 360 804 danddns 40 1 Siva ANON 31 25 AOOTONKCS UVANT 01 31310845 NOM SHL t V089L linoalo VIN ON azs BONVLSISSY 303 A9010NH231 m 1991400 AL IISVTTS HO
4. 2 tib sim 140 zo 59 y 48 9 ais E OLLLGSYZSWN Y 0121 vd anoa anov 1 30802 cogo 10 80 SEGA 140 2 140 n 27 zza 0109910 VOL TESI 38 01 83804 SAL 30014 03 084 ALIHV1Od H Nov SNOILO3NNO2 901 NOLSIS3H bree _ 3IVG 023 AHOISIH NOISIAZY dc1840bfc AL 2 ADO 0NH31 ISN aanddns DEMO MANUAL DC 18408 Z 40 Z vet 31VOS A90710NH231 01 131404 1 SIHL 17089 LInoylo 2I SONVISISSV H04 5 44 ADOTONHJAL m UVANI LOVINOD ALIIGVITSY YO 04834 354 3 20839311504 2 10291191800 GALNRid 1 LN3N0dWOO NOUYonddY SG sprang iets 1090 6080 A9O ONHOGL 1SNOLYOHIOBdS 912 51334 MMM 006L Z P 80P I VNSIS3001 140443 1538 SVH 2 1 56056 vo sen
5. e OUT7 to OUT12 Test Points s m m 9 e OUTS 0078 OUT7 AGND ORTIZ ma 8 5 PORTII PORT 1 to PORT 12 Data and PoE Out _ PORTO SE PORTS ees ee 00000 PORTS EB SB D PORTO zB R Non zm n UPPER RO PORT2 AL 55556 A z 9 A ii OUT to OUT6 Test Points 2 Expansion for Additional Ports see Digital Connections text Figure 12 DC1680A Connections and Supply LEDs dc1840bfc 10 AL DEMO MANUAL DC1840B DEMONSTRATION CIRCUIT 16808 OPERATION Interrupt LED Port 1 Through 12 Power LED Indicators A red LED indicates when the INT line is pulled logic low Each PSE port has a green LED indicator to show when by the daughter card When the interrupt is cleared high PoE power is present at the port The LEDs are driven by 120 servicing the LED is turned off the respective port OUT voltage 10033 e Ww e e e m B QUTI2 OUTIO OUTS OUTS 0 17 AGND 21 MAIN SUPPLY ele AGND 20000 um 12 PSE MOTHER BOARD mp 00000 Address Bits AD6 MSD INT LED PSE Port LEDs AD3 and AD2 Switch Pushbutton RESET Pushbutton Figure 13 DC1680A Address Switch Pushbutton Switches INT LED and Port Power LEDs dc1840bfc We 11
6. 5 21 He 818 Tis 914 ST E Lm 339 N33H9 E Lino 117441 8031 5 1031 9031 5031 81304 _ 2 91304 1304 91 0 41947 ttem Ej 839 t yc anro Li lt 9LNO on _ AME wa z 5 59 2 140 06920 01 110 les 2 130 dig NOISNYdXa Bach EA 840808 td Gr 7110 30 KELNO t 8 B6 vas 3 410 93 cag 551 5 a z o t 1 199 ela va 2 A ses oa T Lr m L3 E elaod z v3 031 1804 TYNOLLdO W 313534 O 13934 5 5 E gt hi 5 5 5 5 or TINI T 5 novas asw g sns E T 105 140 5140 ZMS 93 3 asw 5 TETTA m yer sas 9 er 5 sav T 2 s x 93N 7 j W zd O I pem H 20 gu umo SZM H 85 9200161d1XZ yoz ddh M Ssaudav 0 ma 5080 _ 71031 T Gai A e VET m 0201 98 08 31 6090 6090 0 6 02 EM any L NI ATddNS 01 07 5080 any Sdz 152 f 023 923 SZA za gra
7. 34 PIN CONNECTOR DC1682B SIDE DC1680A SIDE VEE SUPPLY 01 SMAJ58A DC1840B F06 Figure 6 DC1682B Digital and Analog Isolation dc1840bfc AL DEMO MANUAL DC 18408 DEMONSTRATION CIRCUIT 16828 OPERATION Communication and Addressing The LTC4271 internal registers are accessed via 12C to read and or write configuration status and interrupt registers The 120 lines SDAOUT SDAIN and SCL connect to the 34 pin connector Figure 7 Subsequently the 12C bus is accessed on the 061680 The LTC4270 LTC4271 chipset has an address of 610 234 00 where Ag Ao and Ag are the logic state of the AD6 AD3 AD2 AD1 and ADO pins respectively On the DC1682B ADO and AD1 are tied low with pull down resistors AD2 AD3 and AD6 are brought out to the 34 pin connector Figure 7 and set with three switches on the 061680 TO 34 PIN CONNECTOR LTC4271 DC1840B F07 Figure 7 DC1682B LTC4271 I C and Address Connections LED Indicators The DC1682B features four LEDs to indicate the states of the LTC4270 LTC4271 chipset general purpose input output pins These pins are configured as inputs or outputs via 120 and GPO are referenced to and driven by the 1704271 when set as outputs Figure 8 00 and are referenced to and are driven by the 164270 when set as outputs Figure 9 J2 provides test points for access to these 1 05 R30 27k
8. ECHNOLOGY D DEMO MANUAL DC 18408 DC 1682B and DC1680A LIC4270 L1C427 1 12 Port PSE with Digital Isolation DESCRIPTION Demonstration kit DC1840B is a 12 port Type 2 power sourcing equipment PSE composed of a DC1682B daughter card and DC1680A mother board The kit is used for evaluation of the LTC4270B and LTC4271 PSE chipset Up to 12 powered devices PDs can be con nected and powered from this system using a single power supply A 065908 is connected to the DC1840B for 120 interfacing with QuikEval This demonstration manual provides a Quick Start Procedure a DC1682 overview a DC1680 overview schematics and layout printouts Other available supporting documents for the DC1840 are the LTC4270 LTC4271 Layout Guide and the 1704271 PSE Demo Software Users Manual Design files for this circuit board are available at http www linear com demo 4J LI LTC LTM Linear Technology and the Linear logo are registered trademarks and QuikEval is a trademark of Linear Technology Corporation All other trademarks are the property of their respective owners GORRD PHOTO dc1840bfc M 1 DEMO MANUAL DC 1840B QUICK START PROCEDURE Demonstration kit DC1840B includes the DC1682 daughter card and DC1680 mother board The kit is set up for evaluating the 164270 164271 Follow the pro cedure below and refer to Figures 1 through 4 for proper equipment setup PO On the 0616
9. 6 46 6 er 950 00162 81 SL 11404 Ler 970 00 5 5 89 15 94 52 0 bic ti 14 ser 950 00152 9t Lt 9t S rt tt e er 970 00151 55 7 81 l ber NIVLVG DC1680A SCHEMATIC DIAGRAM dc1840bfc 25 However no responsibility is assumed for its use Linear Technology Corporation makes representa tion that the interconnection of its circuits as described herein will not infringe on existing patent rights Information furnished by Linear Technology Corporation is believed to be accurate and reliable DEMO MANUAL DC 18408 DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation LTC provides the enclosed product s under the following AS IS conditions This demonstration board DEMO BOARD kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use As such the DEMO BOARD herein may not be complete in terms of required design marketing and or manufacturing related protective considerations including but not limited to product safety measures typically found in finished commercial goods As a prototype this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technica
10. POE OE MOE MEF PEF IOF MEIE PEE 4 UI rp ep I Tp I UD US b b b L L BRE BER Bob Eee Bek Bee Bee Bee Bee Ek E GB B ER 3 180 BEBE BEBE Bb b b 140 888 888888 eog eog Enro NE EZR B 8 3 8 8 9 8 R 5 oanys ais zn no g 3 2 9 3 3 u1no Wm E E E am ED T X als 140 A sm oo Tan 308 Wa D ME NAE T d 2 BELO s wei H 8 8 8558 3 8 b 63101555 233 8 Solo nunn GHVO8 H3HLON NO NMOHS 8 2119 5 4853 3 8 sa va 031084 30010 8 5 03811038 E kask kob 8 nm 4 F mt oof ol 1 5 zor w Ho R L sedon 8 9 5 8 8 EG or 2 g s 5 movcs e gl 88 g 99 52824 z 52 B8 58 828 5 s E 2 5 ow ra P Beer 5 E EJ 049 gt OLNY 7 149 gt FE INI EJA T 08 Lido Hia DS TOv 55 US ore 1907 ma 20 1 07 sa za 713539 H inovas zu m ve 095 099 tdf ber
11. tu P LTC4270 ov VSSK SENSEn GATEn OUTn D26 B1100 RSENSEn an FDMC3612 4x1 0 Surge Protection Ethernet ports can be subject to significant cable surge events To keep PoE voltages below a safe level and protect the application against damage protection components as shown in Figure 11 are required at the main supply at the T4270 supply pins and at each port Bulk transient voltage suppression TVSgy y and bulk capacitance are required across the main PoE supply and should be sized to accommodate system level surge requirements Each LTC4270 requires a 10 2 0805 resistor R1 in series from supply AGND to the LTC4270 AGND pin Across the 164270 AGND pin and Vee pin are an SMAJS8A 58V TVS D1 and a 1yE 100V bypass capacitor C19 These components must be placed close to the LTC4270 pins Finally each port requires a pair of S1B clamp diodes one from OUTn to supply AGND and one from OUTn to supply Veg The diodes at the ports steer harmful surges into the supply rails where they are absorbed by the surge suppressors and the VEE bypass capacitance The layout of these paths must be low impedance These S1B diodes are placed onthe DC1680 mother board of the DC1840 kit 34 PIN CONNECTOR DC1682B SIDE DC1680 SIDE S1B PROTECTION 1 Cn 1 1 0 22uF 1 1 XR 1 1 1 51 I 100V i i 1 OUTn 10 CeuLk PORT 51 I TVSBULK
12. 03 34 YIHLON 3Sd Jee 2083331 1404 21 UTENTE WO 3O INNO d 1 ONY Nounuusens NOLNONIY 1 NMOHS SV SLNNHS TIVLSNI 72 Xx EDS OI O 1ONHOAL _ 5 SYN 1 duzz 60 5090 SuoLIDVdvo TIY 1090 5190 xe SNOUYOHI03dS 314406 33 016 0 SL33N JYHL 02412 006 2580 WAN NOIS3Q OL 180453 1838 A9OTONHO3LNY3NT 808 090 JYV 540151534 TIV SEG Y SIAOUddV 2 HAWOLSNO t 059 89 031512345 ASIMYAHLO SS31NN 310N 8081 cur 2 PNE 4 x ae GATA GTA aava 01100 wo 810 99 502292016 99955 50229206 0 34 638 20 tei 01D fri Fn ET ox ova 67 33A anoaa 940 dM H T z1031 5 01031 S 6031 Zk NS L Z0 PEL SINW p ZLIWOd OLLHOd 61304 T ms i Ww dM T W D P E DI 315 GTA GTA e T T 8100 avo orno 1 1 saotrtas 994 80288605 80003008 Fe 20 80 DT 90 61 0 51 ys
13. 1 m a RESET Qv ET TO 06590 _ ma 12 EXPANSION e EE C x s 50 SD OUT QUT2 0013 0014 0015 0016 AGNO ZZ o 22 5 S 5 LOWER ROW PORT 1 UPPER ROW PORT 2 UPPER ROW PORT2 2 dc1840bfc AL M 15 Layer 1 Top Layer dc1840bfc M DEMONSTRATION CIRCUIT 16808 LAYOUT DEMO MANUAL DC 1840B 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 o 16 DEMO MANUAL DC 18405 DEMONSTRATION CIRCUIT 16808 LAYOUT Layer 2 AGND CGND Plane 1 dc1840bfc wer 17 DEMO MANUAL DC 184058 DEMONSTRATION CIRCUIT 1680A LAYOUT Layer 3 SIG AGND CGND Plane 2 5 0 9 e e OO dc1840bfc 18 AY ure DEMO MANUAL DC 184058 DEMONSTRATION CIRCUIT 16808 LAYOUT Layer 4 16 AGND CGND Plane 3 Te dc1840bfc A wee 19 DEMO MANUAL DC 184058 DEMONSTRATION CIRCUIT 1680A LAYOUT Layer 5 16 CGND CGND Plane 4 dc1840bfc 20 AL Ure DEMO MANUAL DC 184058 DEMONSTRATION CIRCUIT 16808 LAYOUT Layer 6 Bottom Layer e 712 44 ars dc1840bfc LI Ure 21 DEMO MA
14. DEMO MANUAL DC 18408 DEMONSTRATION CIRCUIT 1840 SYSTEM DC1840 System Setup cables The DC590 connects with 14 pin ribbon cable to the DC1680A and to a PC via USB On the PC a GUI Figure 14 shows a basic DC1680A system setup The DC1682 daughter card is inserted in the 34 pin a communicates with the board At the PSE output PDs are tor A power supply is connected to Vee with banana connected Asample PD demo board is shownin Figure 14 ROH m DC1680 DC4682 Figure 14 DC1680 and DC1682 System Setup with Power Supply DC590 and PD Demo Board Table 2 DC1840 Kit Versions VERSION FEATURES DC1840A DC1680A Mother Board with Integrated Magjack 06316828 12 Port PSE Daughter Card DC1840B DC1680A Mother Board with Integrated Magjack DC1682B 12 Port PSE Daughter Card with Increased Surge Protection dc1840bfc 12 wer DEMO MANUAL DC1840B DEMONSTRATION CIRCUIT 16828 LAYOUT Top Assembly J2 LTC4270 LTC4271 GAR 408 432 1900 12 PORT PSE DAUGHTER CARD L LINEAR www linear com 620 R7 1 U2 05 cse un RED RE 268 en 2 _ 048 01 verme 07 63 nn eR G9 5 03 sa E cun RZ a H m Eu 096011 z RC m T Y RAI RAZ E m R2RLI e
15. jy current at all 12 ports PD Connection PDs are connected using an Ethernet cable to any of the 12 ports at the 2x6 RJ45 connector J4 on the DC1680A Figure 3 J4 has an integrated Ethernet transformer and common mode termination for each port Test points for port outputs 0011 through OUT12 are provided DC1680A USER FEATURES Refer to Figure 12 and Figure 13 for the following user features Onboard 3 3V Supply The DC1680A has an onboard digital supply gener ated from the Vee supply Vpp33 is tied to AGND and DGND is a negative voltage referenced to AGND If an external 3 3V supply is to be used contact Linear Technology Ap plications for proper connection VEE and Vpp33 LED Indicators LEDs for Vee and indicate if voltage is present at these supplies Verify these LEDs are off before inserting or removing the daughter card Digital Connections The DC1680A has connections for 126 control from a host controller The DC590 is optionally connected to the DC1680A at J5 through a 14 pin ribbon cable The QuikEval software will automatically detect the DC1680A and open the LTC4271 GUI Refer to the 1164271 PSE Demo Software User Manual document for instructions on using the GUI A second 14 pin ribbon cable can be connected to J6 for 126 expansion to another DC1680A board with slight board modifications Contact Linear Technology Applications for instructions Digital test points include SCL SDA DG
16. mw AA 17 03 RDT mom mm Br lt ee T 06 Pin 1 lt lt Polarized Pin 12 DC1680 Figure 2 Inserting the DC1682 into J1 of the DC1680 dc1840bfc DEMO MANUAL DC 18408 QUICK START PROCEDURE VEE 55V ge e 9 SNP 11 o q PORT 4 8 wj PSE MOTHER BOARD Ef m mer DEMO CIRCUIT 16804 m es n e 0 e 242 Sm us RJ45 145 12 4 gt Y X 5 5 at E m 85 000060 5 im 2270707070 55 e 55 5 a 5 2 a sa 208 120 EXPANSION TO 06590 2 2 D e eo QUT2 OUTS 0074 OUTS 0016 e Pin 1 Optional DC590 Connection Figure 3 DC1840 Basic Setup 55V Power Supply Figure 4 System Setup with the DC590 DC1680 DC1682 and 55V Power Supply dc1840bfc 4 I were DEMO MANUAL DC 1840B DEMONSTRATION CIRCUIT 16828 OPERATION 12 Port PSE Daughter Card with Digital Isolation Demonstration circuit 16828 Figure 5 featur
17. the DEMO BOARD manual prior to handling the product Persons handling this product must have electronics training and observe good laboratory practice standards Common sense is encouraged This notice contains important safety information about temperatures and voltages For further safety concerns please contact a LTC applica tion engineer Mailing Address Linear Technology 1630 McCarthy Blvd Milpitas CA 95035 Copyright 2004 Linear Technology Corporation dc1840bfc 26 Linear Technology Corporation OF LINEAR 1630 McCarthy Blvd Milpitas CA 95035 7417 LJ ite 408 432 1900 FAX 408 434 0507 www linearcom TECHNOLOGY CORPORATION 2011
18. 1 1 1 1 777 7 DC1840B F11 Figure 11 DC1682B 1 of 12 Ports Surge Protection dc1840bfc Ue DEMO MANUAL DC 1840B DEMONSTRATION CIRCUIT 16808 OPERATION Demonstration circuit 1680A is a 12 Port IEEE802 3at Type 1 and Type 2 PoE PSE mother board This board accepts various PSE daughter cards featuring Linear Technology PSE controllers The DC1680A is capable of powering up to 12 PDs Daughter Card Insertion Precautions When inserting or removing the daughter card into the DC1680A verify all supplies and LEDs are off Push the card straight down for insertion or pull straight up for removal to avoid bending the connector pins Follow the instructions in the Quick Start Procedure for alignment Vee Supply Connect a power supply for Ver with the positive rail to POS and negative rail to NEG as shown in Figure 3 of the Quick Start Procedure Set the voltage within the range in Table 1 depending on whether the application is Type 1 or Type 2 Choose a power supply rating and set the current limit high enough to provide power for the maximum number of PDs connected and to meet each PD power requirements Table 1 DC1680A Vee Power Range for 1 and Type 2 PSEs VEE SUPPLY MAX DELIVERED POWER PSE TYPE RANGE PORT POWER SUPPLY Type 1 45V to 57V 13W 300W Type 2 51V to 57V 25 5W 600W Recommended DC1840A power supply minimum to avoid dropping in a worst case scenario with
19. 82 set AUTO jumper JP1 to HI Figure 1 to enable AUTO pin mode On the DC1682 set MID jumper JP2 to LO Figure 1 to disable midspan mode Align pin 1 of the 34 pin male connector on the 061682 with pin 1 of the 34 pin female connector on the 061680 Figure 2 Pin 12 is polarized to assist with the alignment Carefully push the DC1682 straight down until the two 34 pin connectors are flush with each other 4 a On the DC1680 connect a supply with the positive rail to POS and negative rail to NEG Figure 3 Use a power supply capable of sourcing the maximum load expected 12 ports x 850mA 10 2A Ramp the supply up to 55V Connect up to 12 PDs to the 061680 J4 Figure 3 The DC590 is optionally connected to the DC1680 con nector J5 with a 14 pin ribbon cable Figure 3 A GUI for the TC4270 LTC4271 is brought up by QuikEval for 120 interfacing from a PC Figure 4 dc1840bfc AL WER DEMO MANUAL DC 18408 QUICK START PROCEDURE LTC CONFIDENTIAL FOR CUSTOMER USE ONLY 6 4 2 TES ae Q13 10 EE 3 x s 8 ar MID RK3 Lm em LO 530000000 9000000000000000006 Figure 1 061682 Backside Setting AUTO and MID Jumpers LTC427081UKG LTC4271IUF LINEAR 409 422 10 12 PORT PSE DAUGHTER CARD LS WITH DIGITAL ISOLATION www lineor com 100 5 5252 67 DEMO CIRCUIT 16824
20. D4 X GRN XI01 LTC4270 Q13A BC846AS LTC4271 DC1840B F09 Figure 9 0616828 LTC4271 General Purpose 1 0 LED Indicators Vppa3 JP JP2Q LTC4271 O HI DC1840B F10 Figure 10 0616828 AUTO and MID Jumpers dc1840bfc LI Ure 7 DEMO MANUAL DC1840B DEMONSTRATION CIRCUIT 16828 OPERATION AUTO and MID Jumpers The AUTO and MID pins of the LTC4271 are set by jumpers JP1 and JP2 respectively on the DC1682B Figure 10 Setting JP1 to HI enables the AUTO pin mode in the LTC4270 LTC4271 chipset J2 provides test points for access to AUTO and MID In AUTO pin mode JP1 high the LTC4270 LTC4271 chipset internal 126 registers default to the AUTO pin high state after a software or hardware reset or system power on The LTC4270 71 chipset autonomously detects pow ers on and disconnects power to PDs without the need for 126 host control Setting JP1 to LO disables AUTO pin mode and sets the LTC4270 LTC4271 chipset to a low current shutdown mode An 2 host controller can then be used to con figure the LTC4270 LTC4271 chipset to semi auto mode for controlled PSE operation or to manual mode for test purposes Setting JP2 to HI enables the midspan mode detection backoff timer in the 164270 164271 chipset For end point PSEs set JP2 to LO to disable midspan mode For quick PSE evaluation in AUTO pin mode with MIDSPAN disabled set JP1 Hl and JP2 LO onthe DC1682B R35 100
21. Each port has a FDMC3612 MOSFET in a 3mm x 3mm power33 package The daughter card inserts in the DC1680B mother board through J1 a polarized 34 pin connector Isolated 3 3V and logic control signals are brought in on this connec tor Also connected at J1 is the PoE Vee supply from the mother board and 12 PSE controlled outputs LINEAR 408 432 1900 TECHNOLOGY www linear com 67 DEMO CIRCUIT 16828 Q7 co R Q9 cn R R R K K 1 R R 2 RL2RL Figure 5 DC1682A 12 Port PSE Daughter Card with Digital Isolation Features the 1704270 and LTC4271 dc1840bfc LI Ure 5 DEMO MANUAL DC1840B DEMONSTRATION CIRCUIT 16828 OPERATION Board Layout Proper board layoutis crucial for proper TC4270 LTC4271 chipset operation robustness and accuracy When lay ing out pay attention to parts placement Kelvin sensing power paths and copper fill It is imperative to follow the 164270 164271 Layout Guide document when laying out the board 33 U1 LTC4271 Isolation and Power Supplies The LTC4270 LTC4271 chipset provides communication across an isolation barrier through a data transformer Figure 6 This eliminates the need for expensive opto couplers All digital pins reside on the digital ground refer ence and are isolated from the analog PoE supply A 3 3V supply for Vpp and an isolated VEE supply are connected to the DC1682B through the 34 pin connector
22. ND INT MSD and RESET 126 address pin AD6 AD3 and AD2 are set with a 3 bit switch SW3 Midspan PSE The DC1840A can be configured as a midspan PSE Upstream switch data comes in to J3 Data and PoE go out to a PD at Set both MID and AUTO pins logic high dc1840bfc LI Ure 9 DEMO MANUAL DC 18408 DEMONSTRATION CIRCUIT 16808 OPERATION MSD and RESET Pushbuttons Pushbutton switch SW1 when pressed pulls the RESET pin of the daughter card logic low The PSE controller is then held inactive with all ports off and all internal registers reset to their power up states When SW1 is released RESETis pulled high and the PSE begins normal operation Pushbutton switch SW2 when pressed pulls the maskable shutdown input MSD pin of the daughter card logic low When pressed all ports that have their corresponding mask bit set in the mconfig register of the PSE controller will be shutdown These ports must then be manually re enabled 126 or by resetting the PSE VEE VEE and VDD33 45V to 57V LED Indicators 3 3V Test Points SUPPLY IN PORTII PORT 1 to PORT 12 Data In Midspan PORTIO _ PORTI2 PORT PORTS PORTS PORTS PORTE PORTS PORT4 17000 Beee Beee ze 55 IE 11 22 os SE 35 TO 06590 J 2 EXPANSION 2222222 7 PORT IEEE802 PSE MOTHER BOARD p Li L
23. NUAL DC 18408 DEMONSTRATION CIRCUIT 16808 LAYOUT Bottom Silkscreen 2 02 1029 e a 8222820 033320 DJ 282000 20180 e LM euro LH m ho e E Em ee ee 9 em 22522225 ee e ee ee ee 0 ee e e 9 320 AIMOT2UD 403 ITI e ee ee Oe Ce ee ma Bu xS e go e 0 0 0 ue _ NES 550 60 e 9 070707070 20200 e e 0 0 0 0 Lai 4 2 80 0 ge e 9 699990 85 85 80540 23 on em 5 2005 2270707070 E gt lt Ll e 0500 ieu e tetetete e dc1840bfc 22 AL DEMO MANUAL DC 18408 DC1682R SCHEMATIC DIAGRAM dc1840bfc 23 NOLLY 0SI HLIM GUV 364 19045 5249 LITOWO
24. d STVAOUddV PNE 069 39ILON H js 6 01 ug 66 3 R TE n B 5 ober Stor 9 0 00 67 19 01 mals SRR 15 ano 05 5 HES 118 15 8 182 f ie oi t t ttr U 0G 0WZL 1130 4 49 89X2 v980 NNOD LYVMALS 138 1508 ODAL seem 5 gt sbobobobchcbcbo x TOPSHOP AW 970 001 2555 5179 7 970 0015 2555 8 01 1 01 9 0 5 01 1404 ro e 413 orter 950 00164 89 5 88 81504 8 5 1 8 ser 90 00 lt 55 9 93 19 9 9 59 ra 59 t 13 oer 0 00 lt 2 55 9 87 8 ry 8 fe rer 90 0015 55 21304 NIVLVG a z TT REESE m Wer 9P0 00LEZ SS SPTU 89 1 9 6 86 61304
25. es the LTC4270 LTC4271 chipset on a compact daughter card with digital isolation The LTC4270 LTC4271 chipset is a 12 port power sourcing equipment PSE controller designed for use in IEEE 802 3at Type 1 and Type 2 high power compliant Power over Ethernet PoE systems A transformer isolated communication protocol replaces expensive opto couplers and complex isolated 3 3V supply resulting in significant BOM cost savings The LTC4270 164271 chipset delivers lowest in industry heat dissipa tion by utilizing low Roy external MOSFETs and 0 250 sense resistors eliminating the need for expensive heat sinks Advanced power management features in the 164270 LTC4271 chipset include per port 12 bit current monitor ing ADCs DAC programmable current limit and versatile quick shutdown of preselected ports PD discovery uses a LTC4270 LTC4271 12 PORT PSE DAUGHTER CARD WITH DIGITAL ISOLATION proprietary dual mode 4 pointdetection mechanism ensur ing excellent immunity from false PD detection Midspan PSEs are supported with 2 event classification and a two second backoff timer The 1042701104271 includes an 26 serial interface operable up to 1MHz The DC1682B demonstrates proper 164270 164271 board layout that is approximately the height and width of a 2 x 6 RJ45 connector The compact layout is made possible by the small package size of key components The TC4270 is in a 7mm x 8mm QFN while the LTC4271 is in a4mm x 4mm QFN
26. l requirements of the directive or other regulations If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES The user assumes all responsibility and liability for proper and safe handling of the goods Further the user releases LTC from all claims arising from the handling or use of the goods Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge Also be aware that the products herein may not be regulatory compliant or agency certified FCC UL CE etc License is granted under any patent right or other intellectual property whatsoever LTC assumes no liability for applications assistance customer product design software performance or infringement of patents or any other intellectual property rights of any kind LTC currently services a variety of customers for products around the world and therefore this transaction is not exclusive Please read

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