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1. s hama al X o a c 22 Rak aao eg ud Ecc E ceci HE 4 ae ee z ee eee RESET CIRCUIT 3 3V l I I I I l _STAT2 R17 890R 1 I R14 1 U2 10k STATI _ 18 390R 1 NA STM1001RWX6F RIG l I cSt exis 330R 196 ENS I l R15 100R 196 5 1 5 2 oF 4 1 4 1 GREEN GYX SD TCOBO5SGC YELLOW GYX SD TCOB05SYC Rev Initial RESET 34122 COPYRIGHT C 2011 OLIMEX Ltd 100nF 1 l I http www olimex com dev I zi zi as l EE _ a J BOARD LAYOUT PWR Led STAT2 STAT1 26 34 32 30 28 26 24 22 20 18 16 14 12 18 wo W 006 94 ef NE OM OE m gt OF Sf E S amp ae e 139 37 35 33 34 29 2 25 23 21 19 1 15 13 11 3 7 5 22 R31 2 58 use _oTe 32 C at uui OL IHE X 8 6 e ERE OTS PHR 5 6 50 EXT SULEXT 2723 34 33 35 9 R4 2 on 8 18 12 14 8 2 2 ja 32 34 46 du 48 pi WKUP RESET Button Button PEYN we L RICK N V 12 war m ONAN m AN N coo gx OQ G UR445U TA 5 u EXT1 Pages
2. POWER SUPPLY CIRCUIT STM32 H107 can take power from three sources PWRconnector where 9 V DC or 6 V AC is applied by external power source 5V_OTG PWR from USB 5V_JTAG from JTAG RESET CIRCUIT STM32 H107 reset circuit includes EXT1 pin 3 EXT2 3 JTAG connector pin 15 STM32F107VCT6 pin 14 NRST and RESET button CLOCK CIRCUIT Quartz crystal 25 MHz is connected to STM32F107 pin 12 5 IN and pin 13 OUT Quartz crystal 32 768kHz is connected to STM32F107 pin 8 14 5 2 IN pin 9 PC15 OSC32 OUT JUMPER DESCRIPTION PWR SEL When position 1 2 is shorted the board is power supplied from JTAG When position 3 4 is shorted the board is power supplied from USB When position 5 6 is shorted the board is power supplied from External power source Default state is position 5 6 shorted When this jumper is in position 1 BOOTO is connected to 3 3V and when the jumper is in position B0 0 BOOTO is connected to GND Default state is BO 0 DENS When this jumper is in position B1 1 is connected to 3 3V and when the jumper is in position B1 0 is connected to GND Default state is B1 0 3 9V MCUE Enable 3 3V microcontroller power supply Default state is closed Enable regulator VR2 3 3V LM1117 Default state is closed Connects RST to TRST Page9 Default state is open INPUT OUTPUT Status LED1
3. STM32 H107 development board Users Manual Petree Sn AID boards produced by Olimex are ROHS compliant Rev C June 2011 Copyright c 2011 OLIMEX Ltd All rights reserved Pagel INTRODUCTION STM32 H107 header board provides easy way for developing and prototyping with the new STM32F107VCT6 connectivity line microcontroller produced STMicroelectronics STM32 H107 has JTAG port for programming and debugging USB OTG user button two status leds and most of the GPIOs are on extension headers where you can connect your additional circuits BOARD FEATURES CPU STM32F107VCT6 32 bit ARM based microcontroller with 256 KB Flash 64KB RAM USB OTG Ethernet 10 timers 2 CANs 2 ADCs 14 communication interfaces connector with ARM 2x10 pin layout for programming debugging 25 Mhz crystal USB OTG Power Jack WKUP button RESET button Two status leds Power on led battery connector Extension port connectors for many of microcontrollers pins 4 1 5 mm 0 062 soldermask silkscreen component print Dimensions 70x50mm 2 76x1 97 ELECTROSTATIC WARNING The STM32 H107 board is shipped in protective anti static packaging The board must not be subject to high electrostatic potentials General practice for working with static sensitive devices should be applied when working with this board BOARD USE REQUIREMENTS Cables The cable you will need depends on the progr
4. common to ES rrrrr ADC1 amp ADC2 T F gt Le F wwe gt lt b lt CAN1 device NI CANT_TX as AF 11 CAN1 RXas AF SRAM 512B 17 C gt bxCAN2 device AF CAN2 RX as AF me gt gt Er DAC OUT as AF mw gt 12bit DAC 2 V EN Q VDDA VDDA REF DAC OUT2 as AF V V REF 1 AF alternate function on I O port pin Pages OxFFFF FFFF 0 000 0000 OxDFFF FFFF 0xC000 0000 OxBFFF FFFF 0x6000 0000 Ox5FFF FFFF 0x2000 0000 OxTFFF FFFF 0 0000 0000 512 Mbyte block 7 Cortex M3 s internal peripherals 512 Mbyte block 6 Not used 512 Mbyte block 5 Not used 512 Mbyte block 4 Not used 512 Mbyte block 3 Not used 512 Mbyte block 2 Peripherals 512 Mbyte block 1 SRAM 512 Mbyte block 0 Code Reserved SRAM aliased by bit banding Option bytes Reserved Reserved BOOT pins Aliased to Flash or system memory depending on Page6o 0x5000 0400 OxSFFF FFFF USB OTG FS 0x5000 0000 0x5000 Reserved 0 4003 0000 OxAFFF FFFF Ethernet 0x4002 8000 0x4002 9FFF Heserved 0x4002 3400 0x4002 7FFF 0x4002 3000 0x4002 33FF Reserved 0x4002 2400 0x4002 2FFF Flash interface 0x4002 2000 0x4002 23FF 0x4002 1400 0x4002 1FFF 0x4002 1000 0x4002 13FF Reserved 0x4002 0800 0x4002 OFFF 0 4002 0400 0 4002 07FF 0 4002 0000 0x4002 Reserved 0x400
5. green with name STAT1 connected to STM32F107VCT6 pin 63 6 1252 MCK TIM3 1 Status LED2 yellow with name STAT2 connected to STM32F107VCT6 pin 64 7 1253 MCK TIM3 CH2 Power on LED red with name PWR this led shows that 3 3V is applied to the board User button with name WKUP connected to STM32F107VCT6 pin 23 PA0 WKUD Reset button with name RESET connected to STM32F107VCT6 pin 14 CONNECTOR DESCRIPTIONS TAG The JTAG connector allows the software debugger to talk via a JTAG Joint Test Action Group port directly to the core Instructions may be inserted and executed by the core thus allowing STM32F107VCT6 memory to be programmed with code and executed step by step by the host software For more details refer to IEEE Standard 1149 1 1990 Standard Test Access Port and Boundary Scan Architecture and STM32F107VCT6 datasheets and users manual 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 AS 15 417 19 GND PWR JACK USB OIG rr p er 1 Pin Signal Name 7 1 VBAT 2 GND 3V BAT Pagell 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 40 38 3 32 3 28 26 24 22 20 18 16 14 12 10 Pin Signal Name Pin Signal Name 1 3 3V 2 GND 3 RST 4 WKUP 5 EXT1 5 6 EXT1 6 7 EXT1 7 8 EXT1 8 9 EXT1 9 10
6. 34 PDS USART2 CTS Bs EXT2 7 EXT2 33 PD4 USART2_RTS EXT2 8 EXT2 32 PDS USART2 TX 7 EXT2 9 EXT2 31 POSIUSART2_RX Bg USB VBUSON 12 10 EXIZ 30 PD USART2 CK s EXT2 11 1 PES TIM1_CH1N PD8 USART3_TX ETH MI RX DV EXT1 28 EXT1 8 PE9 TIM1_CH1 PD9 USART3_RXETH_MI Ez EXT1 29 EXT1 9 PE10 TIM1_CH2N PD10 USART3_CK ETH RX 01 EXT1 30 EXT1 10 PE11 TIM1_CH2 PD11 USART3 CTS ETH MI RX D2 EXT1 31 EN 1 2 m 12 PD12 TIV4 CHI USART3 RTS ETH RX D3 po ERE 12 PE13 TIM1_CH3 PD13 TIM4_CH2 1 13 USE FAULT 1 1_ CH4 1 CH3 EXT1 34 EXT1 14 BKIN PDi5 TIMM CH4 P EXT1 35 STM32F107VCT6 TA i ee 7 ee ee a MMC CREME MC ICI cc c e BUTTON POWER SUPPLY CIRCUIT o E ji SEN EXT1 40 EXT1 1 2 40 EXT2 1 Gt PWR_SEL 3 3V ch l B104 SMD 1 5 5V 1 VR2 3 3V 3V EW 1 29 Sie LM1117IMPX ADJ 5V OTG PWR LM1117IMPX ADu CLOSE BE 100nF z 9V EXT Ome 9 R19 1 ADJ GND 5 100R 196 I R10 R1i2BWRV x 9 E Q u p BETA 2208 zorna CD MIO 5 1 6VAC g id 330R 1 9vDC 14 zl C15 O C17 S r R21 ATOUF 16VDC wm 330R 1 nF BE 5 i u 47uF 6 3V TANT H lz Bd S EXT1 39 2 ls 2 39 12 eis LE 4 PORAN EXT2 38 z B EXT2 2
7. EXT1 10 11 EXT1 11 12 EXT1 12 13 EXT1 13 14 USB_FAULT 15 EXT1 15 16 EXT1 16 17 EXT1 17 18 EXT1 18 19 EXT1 19 20 EXT1 20 21 EXT1 21 22 EXT1 22 23 1 23 24 1 24 25 EXT1 25 26 EXT1 26 27 EXT1 27 28 EXT1 28 29 EXT1 29 30 1 30 31 EXT1 31 32 EXT1 32 33 EXT1 33 34 EXT1 34 35 EXT1 35 36 VREF 37 VREF 38 39 GND 40 5V Pagel2 EXT2 246 8 10 12 14 16 18 20 22 24 26 28 30 32 34 V3 5 79 1 13 15 1 19 1 23 25 36 38 40 27 29 31 33 35 37 39 Pin Signal Name Pin Signal Name 1 3 3V 2 GND 3 RST 4 EXT2 4 5 2 5 6 2 6 7 2 7 8 2 8 9 EXT2 9 10 EXT2 10 11 USB VBUSON 12 EXT2 12 13 EXT2 13 14 2 14 15 2 15 16 2 16 17 2 17 18 2 18 19 2 19 20 2 20 21 EXT2 21 22 EXT2 22 23 EXT2 23 24 EXT2 24 25 EXT2 25 26 EXT2 26 27 EXT2 27 28 EXT2 28 29 EXT2 29 30 EXT2 20 31 EXT2 31 32 EXT2 32 33 2 33 34 2 34 35 2 35 36 EXT2 36 37 EXT2 37 38 GND 39 GND 40 5V Page13 MECHANICAL DIMENSIONS 207 lt 6 LG zX6 g el sil G N N NI NI LO 10 LO al lol N 60704 J uve 19 2 54 mm uu p6 2c OQ ar z uu uu 000 0070 Pagel4 AV AILABLE DEMO SOFTWARE Demo examples Blinking
8. LED and USB for EW ARM 5 50 Pagel5 ORDER CODE Revision history S TM32 H107 assembled and tested no kit no soldering required How to order You can order to us directly or by any of our distributors Check our web www olimex com dev for more info REV Initial create November 2009 REV A edited by TU REV B more detailed mechanical dimensions added more programmers added in BOARD USE REQUIREMENTS REV edited June 2011 changed schematic Pagel6 Disclaimer 2011 Olimex Ltd rights reserved Olimex logo and combinations thereof are registered trademarks of Olimex Ltd Other terms and product names may be trademarks of others The information in this document is provided in connection with Olimex products No license express or implied or otherwise to any intellectual property right is granted by this document or in connection with the sale of Olimex products Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder The product described in this document is subject to continuous development and improvements particulars of the product and its use contained in this document are given by OLIMEX in good faith However all warranties implied or expressed including but not limited to implied warranties of merchantability or fit
9. bs WKUP 1 74 2 2 2 CH1 ETR TIM5 MI CRS WKUP 1 4 CLOSE tod PA1 USART2_RTS ADC12_IN1 TIM5_CH2 TIV2_CH2 ETH_MI_RX_CLK ETH_RMILREF_CLK EXT1 5 1 2d PA2 USART2 5 CH3 ADC12 INZ TIV2 CH3 ETH VDIO ETH RMI EXT1 6 PAS USART2_RX TIMS_CH4 ADC12_ING TIV2_CH4 ETH_MILOOL Bo EXT2 29 PA4JSPIl NSSIDAC OUTI USART2 CK ADC12 IM Bo 7 EXT2 28 EIS a s PAB SPHI SCK DAC OUTZ ADCI2 IN5 EXT2 27 6 _ 12 ING TIVG CHI TM1 BKIN B gt 7 EXT2 26 uj VOSI ADC12 1 7 _ CH2 ETH RX DV ETH CRS DV TIM CHIN gt EXI223 E d 10 PAS8 USART1 CK OTG FS SOF TIM1 CH1 MCO 68 OTG VBUS OTG VBU 5 E 2 PAS9 USART1 CH2 OTG FS VBUS 69 OTG ID OTG ID E PATUUSART CTSICANI RXT CHAOTG FS pm 10 016 DM OIG DN PA12 USART1_RTS CAN1_TX TIM1_ETR IOTG_FS_DP 1 DP DP TMS DINE CK Z PAIAITCKSWOLK or e 1 22 15 5 NSS TIV2 ETRISPI1 5 FB0805 600R 200mA 201209 601 Ceca mul E FBO ADC12_INS TNM3_CH3 ETH_MI_RXD2 TIMI_CH2N a E s 10uF 6 3V TANTQ 199 PB2 BOOTT I PB3 JTDO SPI3_SCK TRACESWOJTIM2_CH2 SPH_SCK a PB4 JNTRST SP3_MSO TIMB_CH1 SP1_MSO D EXT1 36 2 1 5 1 8 MOSI ETH PPS OUT ETH PPS OUT TIM3 2 _ MOSICAN2 RX EXT1 17 R2 29R 6 2 1 SCL TIM4 CHI USART1 TX CAN2 TX f
10. 0000 0 0803 FFFF 0 0800 0000 Ox07FF FFFF 0x0008 0000 0x0007 FFFF 0 0000 0000 2 52 2 5 55 2 2 2 2 2 22 2 2 3 3V JTAG lI R34 II USB VBUSON 5V_OTG_PWR CR OTG VBUS R22 R24 R25 R26 USB FAULT 2 39M OR NA I i JTAG 10k Lliok 11 5 25 Fg 100nF 4 3 TRST LI ST2052BD 1 R35 22R DM 6 5 TDI N T E I oot Fg Uo H R36 22R OTG DP 5 7 I USB_OTG _ 23 3v ont C NA USBLC6 2P6 C26 C27 C28 14 1124 5V_OTG PWR 100nF A7pF NA A7pF NA I 17 USB OTG D USB OTG D 20 19 5V l USB OTG D USB OTG D EN OTG ID D BH20S bed tou ee C23 24 12 T tor USB OTG 3 3V FBOBOS GOORI 200mA 201209 601 HN1x3 eL 3 3V MCU E B1 1 B1 0 162 oe
11. 1 3C00 0x4001 FFFF 0x4001 3800 0x4001 3BFF Reserved 0x4001 3400 0x4001 37FF 0x4001 3000 0x4001 33FF 0 4001 2 00 0x4001 2FFF 0x4001 2800 0x4001 2BFF 0x4001 2400 0x4001 27FF 0 4001 1 00 0x4001 23FF 0x4001 1800 0x4001 1BFF 0x4001 1400 0 4001 17FF 0 4001 1000 0 4001 13FF 0 4001 0 00 0x4001 OFFF 0x4001 0800 0x4001 OBFF 0x4001 0400 0 4001 07FF 0x4001 0000 0x4001 3FFF Reserved 0x4000 7800 0x4000 FFFF 0x4000 7400 0x4000 77FF PWR 0x4000 7000 0x4000 73FF 0 4000 6 00 0x4000 6FFF bxCAN2 0x4000 6800 0x4000 6BFF 1 0 4000 6400 0x4000 67FF 0x4000 5 00 0 4000 63FF 2 2 0x4000 5800 0 4000 5BFF 2 1 0 4000 5400 0x4000 57FF UART5 0x4000 5000 0x4000 53FF UART4 0x4000 4C00 0x4000 4FFF USART3 0x4000 4800 0x4000 4BFF 0x4000 4400 0x4000 47FF Heserved 0x4000 4000 0x4000 43FF 5 251 0 4000 3C00 0x4000 3FFF SPI2 2S2 0x4000 3800 0x4000 3BFF Reserved 0x4000 3400 0x4000 37FF IWDG 0 4000 3000 0x4000 33FF WWDG 0 4000 2 00 0x4000 2FFF 0x4000 2800 0x4000 2BFF Reserved 0x4000 1800 0x4000 27FF TIM7 0x4000 1400 0x4000 17FF TIM6 0x4000 1000 0x4000 13FF TIMS 0x4000 0 00 0x4000 OFFF TIMA 0 4000 0800 0 4000 OBFF TIM3 0x4000 0400 0x4000 07FF TIM2 0x4000 0000 0x4000 Ox3FFF FFFF 0 2001 0000 0 2000 FFFF Ox2000 0000 Ox1FFF F800 OX1FFF FFFF Ox1FFF 8000 0x1FFF F7FF Ox1FFF 7FFF 0 0804
12. 56 KB Interface JT CK SWCLK Cortex M3 CPU 64 bit JTMS SWDIO JTDO Fax 48 72 MHz Supply as AF max supervision NRST VppA 4 POR PDR Ven E gt E TXD 3 0 RMII TXD 1 0 GP 1 g OSC_IN TX CLK RMII TX CLK 7 channels XTAL TX EN RMII TX MH i 3 25 MHz RXD S 0JRMII RXD 1 0 RX ER RMII ER CLK RMII REF GP DMA2 5 channels Reset amp IWDG DV RMII CRS DV clock Standby CRS control interface 1 8 Vto3 6V COL RMII COL Ethernet MAC FCLK MDC 10 100 _ BAT Led MDIO PPS OUT XTAL 32kHz OSC32 OUT Back A RTC easier TAMPER RTC VBUS AWU ALARM SECOND OUT ID Backup interface gt USBOTGFS DP CD owe gt 4 Channels ETR as AF cS 4 Channels ETR as AF ec K 4 Channels ETR as AF RX TX CTS RTS usar Ko gt A RXTX CTS RTS USARTS CK as AF Ts Klo een oem Klo nm MOSI SD MISO MCK lt 5 2 052 PsCKCK NSS WS as AF MOSI SD MISO MCK lt p sPis l283 K P sCKCK NSSANS as AF ip d I m k PA 15 0 LE K gt asa KID PC 15 0 lt L GPiopote C PD 15 0 us aen PE 15 0 2 4 Channels 4 compl Channels me prm BKIN ETR input as AF DM APB2 Fmax 48 72 MHz MOSI MISO Ce ERES RX TX CTS RTS CK as AF lt USARTI 05 16 ADC12_INs NI 12bit ADC IF lt
13. ammer debugger you use If you use ARM JTAG you will need LPT cable if you use ARM USB OCD or ARM USB OCD H you will need RS232 cable and 1 8 meter USB A B cable and if you use ARM JTAG EW ARM USB TINY or ARM USB TINY H you will need 1 8 meter USB A B cable Hardware Programmer Debugger one of the Olimex ARM Programmers ARM JIAG ARM USB OCD ARM USB OCD H ARM USB TINY ARM USB TINY H ARM JTAG EW Software ARM C compiler and JTAG programmer Note For OpenOCD we dont offer any projects Page2 PROCESSOR FEATURES STM32 H107 board use ARM based 32 bit microcontroller STM32F107VCT6 with these features Core ARM 32 bit CortexTM M3 CPU 72 MHz maximum frequency 1 25 DMIPS MHz Dhrystone 2 1 performance at 0 wait state memory access Single cycle multiplication and hardware division Memories 256 Kbytes of Flash memory 64 Kbytes of SRAM Clock reset and supply management 2 0 to 3 6 V application supply and I Os POR PDR and programmable voltage detector PVD 25 MHz crystal oscillator Internal 8 MHz factory trimmed RC Internal 40 kHz RC with calibration 32 oscillator for RTC with calibration Low power Sleep Stop and Standby modes VBAT supply for and backup registers 2x 12 bit 1 us A D converters 16 channels Conversion range 0 to 3 6 V Sample and hold capability Temperature sensor upto 2 MSpsin inte
14. g EXT1 18 1 100nF PB7 I2C1_SDA TIM4_CH2 USART1_RX EXT1 19 Sf EE PB8 TIM4_CH3 ETH_MIl_TXD3 I2C1_SCLICAN1_RX fg 1 20 C9 WNA PB9 TIM4 4 2 SDA CAN1 TX 7 EXT1 21 R3 ORNA PB10 2C2_SOL USART3_TX ETH_MI_RX_ERTIM2_CH3 EXT1 22 C PB11 2C2 SDA USART3 RX ETH MI TX EN ETH RMI TX ENTIV2 7 EXT1 23 PB12 SP12_NSS I2S2_WS I2C2_SMBAL USART3_CK TIM1_BKINCAN2_RX ETH MI TXDO ETH RMI TXDO 5 EXT1 24 EXT1 37 PB13 SP2 SCK DS2 CK USART3 2 TX ETH MI TXDI ETH TXD1 65 EXT1 25 EXT1 38 FB14 SP2 MSO TIMI CH2N USART3 RIS EXT1 26 PB15 SP2 51 252 SD TIM1 CH3N 1 27 e R4 POJADCI2 fe EXT2 23 PCI ADC12 7 EXT2 22 10k PCZ ADCI2 2 MI TXD2 ig 2 21 PC3 ADC12_IN13 ETH MI TX ba 7 EXT2 20 POA ADC12 INI4 ETH MI RXDO ETH by 7 EXT2 19 BO 1 0 0 PCS ADC12 MI RXDI ETH RMI RXD1 STATI 7 EXT2 18 PC6 2S2 MCK TIV3 CH1 BA STAT2 2TpF 51 i Bs PC7 PS3 MCK TMG CHO I s NA i CM EX l PCIO UART4 TX USART3 SCK EXT2 15 PC11 UART4_RX USART3_RX SP3_MSO 5 EXT2 14 RST PCI2 UARTS TX USART3 MOSI EXT2 13 E 3 ct op PC15 OSC32 OUT 1 s 2 37 PDO OSC 1 EXT2 4 EXT2 36 PD1 OSC_OUT CAN1_TX EXT2 5 EXT2 35 2 ETR UARTS RX EXT2 6 EXT2
15. ness for purpose are excluded This document is intended only to assist the reader in the use of the product OLIMEX Ltd shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product Pagel7
16. rleaved mode 2x 12 bit D A converters DMA 12 channel DMA controller Supported peripherals timers ADCs DAC PSs SPIs ICs and USARTs Debug mode Serial wire debug SWD JTAG interfaces Cortex M3 Embedded Trace Macrocell 80 fast I O ports 801 05 all mappable on 16 external interrupt vectors and almost all 5 V tolerant 1Otimers Page3 four 16 bit timers each with up to 4 IC OC PWM or pulse counter and quadrature incremental encoder input x 16 bit motor control PWM timer with dead time generation and emergency stop 2 x watchdog timers Independent and Window SysTick timer a 24 bit downcounter 2 x 16 bit basic timers to drive the DAC 14 communication interfaces 2 x IPC interfaces GMBus PMBus 5 USARTS ISO 7816 interface LIN IrDA capability modem control 3 SPIs 18 Mbit s 2 with a multiplexed I S interface that offers audio class accuracy via advanced PLL schemes 2 x CAN interfaces 2 0 Active with 512 bytes of dedicated SRAM USB 2 0 full speed device host OTG controller with on chip PHY that supports HNP SRP ID with 1 25 Kbytes of dedicated SRAM 10 100 Ethernet MAC with dedicated DMA and SRAM 4 Kbytes 1588 hardware support MII RMII available on all packages CRC calculation unit 96 bit unique ID Page4 BLOCK DIAGRAM ony IM JNTRS JTDI 2to3 6V Voltage reg 3 3 V to 1 8 V Vss Flash 2

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