Technical Information Manual
Contents
1. 7 1 3 TECHNICAL SPECIFICATION 2000 0 0 00000 8 2 TECHNICAL SPECIEICATIQNS i 9 2 1 PACKAGING 25 220 9 2 2 POWER REQUIREMENTIS 5 EXE ERES EAE ERES E VERS 9 2 3 FRONT Ni EE 10 2 4 EXTERNAL CONNECTORS erbe rere ote reviens ies es A 11 2 4 1 11 2 4 2 OUTPUT CORE COIS 11 2 5 OTHER COMPONENTS T 12 2 5 1 Displays M 12 2 5 2 A ERROR Cc 12 2 3 3 n2 t CT 12 3 A E E E E E E 15 3 1 ADDRESSING CAPABILITY 15 3 2 DISCRIMINATOR THRESHOLDS s0ssssscevsvessssvevsvevevsvsvsssvevsvevevevsvecevevsvscsvsvsvsss2. 18 FIG 4 1 CURRENT SUM SIGNAL ENSE EE E SP SEE 21 FIG 4 2 EXAMPLE OF THREE DAISY CHAINED 812 2 00 00 23 LIST OF TABLES TABLE 1 1 VERSIONS AVAILABLE FOR THE MODEL 812 101 01210 00020 0202 000 000 000000000000 6 TABLE 1 2 TECHNICAL SPECIFICATION TABLE shioridir 8 TABLE 2 1 POWER 8 20 4 00 20 20 9 TABLE 3 ADDRESS 15 Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 4 Is for Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 1 General description 1 1 NPO Functional description The CAEN Model V812 is a 16 CHANNEL CONSTANT FRACTION DISCRIMINATOR housed in a single width VME module The module accepts 16 negative inputs and produces 16 differential ECL outputs with a fan out of two on four front panel flat cable connectors a functional block diagram is shown in Fig 1 2 Several version are available refer to Table 1 1 for details Each channel can be turned on or off via VME by using a mask register Pattern of
3. read only Filename Number of pages Page 17 00101 97 V812x MUTx 04 V812_REV4 DOC 23 for Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 NPO Three words located at the address Base FA FC FE of the page are used to identify the module as shown in Fig 3 2 15 14 13 12 11109 8 7 6 5 4 3 2 1 0 Address Version Module s serial number Base FE Manufacturer number Module type Base FC Fixed code 5 Fixed code Base FA Fig 3 2 Module Identifier Words At the address Base FA the two particular bytes allow the automatic localization of the module For the Mod V812 the word at the address Base FC has the following configuration Manufacturer N 000010 b Type of module 0001010001 b The word located at the address Base FE identifies the single module via a serial number and any change in the hardware for example the use of faster conversion logic will be shown by the version number Filename Number of pages Page 18 00101 97 V812x MUTx 04 V812_REV4 DOC 23 Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 4 Principles of operation 4 1 4 2 4 3 4 4 NPO The Constant Fraction Discrimination technique The Const
4. Rotary switches for Base Address selection VME PAUX connector VME P2 connector Component side of the board Rotary switches for Base Address selection Number of pages Page 23 13 CAEN Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 piggy back min delay max delay board JP2 3 14 11112122 CH 15 VME P1 4 CH 12 connector JP5 CH 13 JP6 22225 CH 10 JP7 CH 11 JP8 Cx CH 8 JP9 CH 9 Internal n JP 10 1 6 JP11 7 1 VME PAUX connector JP 12 CH 4 JP13 CH 5 jP14 2 15 CH 3 4 JP 16 17 1 Ll Components side Fig 2 3 Jumpers location NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 14 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channe
5. Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 2 4 External connectors The location of the connectors is shown in Fig 2 1 Their function and electromechanical specifications are listed in the following subsections 2 4 1 INPUT connectors INPUT CHANNELS Mechanical specifications 16 LEMO 00 type connectors Electrical specifications Negative polarity 50 Ohm impedance Max input voltage 5 V Min detectable signal 5 mV VETO INPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications Standard NIM logic signal high impedance 30 ns minimum FWHM leading edge of the VETO signal must precede of at least 18 ns the leading edge of the input and overlap completely the input signal TEST INPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications Standard NIM logic signal high impedance 8 ns minimum FWHM Max input frequency 30 MHz 2 4 2 OUTPUT connectors OUTPUT CHANNELS Mechanical specifications 4 Header 3M 3408 D202 type 8 8 pin connectors Electrical specifications Differential ECL level on 110 Ohm impedance pulse width adjustment from 16 5 1 5 ns to 270 25 ns maximum time walk is 400 ps for input signals in the range from 50 mV to 5 V with 25 ns rise time Input Output delay set delay 4 5 2 ns OR OUTPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications Standard NI
6. Inhibit The pulse forming stage of the discriminator produces an output pulse whose width is adjustable in a range from 15 ns to 250 ns via VME Moreover in order to protect against multiple pulsing it is possible to program via VME a Dead Time during which the discriminator is inhibited from retriggering The maximum time walk is 400 ps for input signals in the range from 50 mV to 5 V with 25 ns rise time The constant fraction is 2096 The constant fraction delay is defined by a delay line network of 20 ns with 5 taps see fig 2 2 The discriminator thresholds are settable via VME in a range from 1 mV to 255 mV 1 mV step through an 8 bit DAC The module can operate also with small below 10 mV input signals though in this case the Constant Fraction operation is not performed i e the walk is higher VETO and TEST inputs are available on the front panel The front panel is provided with a Current Sum output that generates a current proportional to the input multiplicity i e to the number of channels over threshold at a rate of 1 0 mA per hit 50 mV per hit into a 50 Ohm load 420 96 MAJORITY output provides a NIM signal if the number of input channels over threshold exceeds the MAJORITY programmed value The logic OR of discriminator outputs is available on a front panel connector The relevant OR LED lights up if at least one of the unmasked channels is over threshold The module s operations are completely controlled via
7. be adjusted in the range from 15 ns to 250 ns writing an integer number between 0 and 255 into the registers The set value corresponds to the width as follows 255 leads to a 250 ns pulse duration 0 leads to a 15 ns pulse duration with a non linear relation for intermediate values The following figure shows the Pulse width ns vs Register set value count Output Width count ins 0 11 32 260 00 15 12 34 240 00 30 13 47 220 00 45 14 75 200 00 60 16 07 180 00 75 17 51 160 00 90 19 03 140 00 t 105 21 29 120 00 120 23 69 100 00 135 26 71 80 00 150 30 61 60 00 _ gt 165 35 20 40 00 180 41 83 20 00 p u gu BH H gom ER UU 225 87 47 0 20 40 60 80 100 120 140 160 180 200 220 240 240 130 70 count 255 24070 Fig 3 1 Output width vs Register set value Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 16 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 3 5 Dead Time Ch 0 to 7 3 6 3 7 3 8 3 9 Base address 44 write only This register is used to select the Dead Time value common to all channels from 0 to 7 This command allows to select on 8 bit set values 0 to 255 the Dead Time value between 150 ns and 2 The set value corresp
8. bit 8 bit 8 bit 8 bit 8 bit inhibit DAC DAC DAC DAC DAC MAJ 0 ch 1 ch 4 ch 15 THRESHOLDS WIDTH AND 0 DEAD TIME s gt INTERFACE f gt M INPUTS lt 0 15 gt NA NZ ON x NA 72 diser discr 10222222 discr 1 ch 0 ch 1 ch 14 chs TEST 5 i VETO N 5 PA QUTPUTS 0 15 A B N OR 2 OR LED Fig 1 2 Block Diagram NPO Filename Number of pages Page 7 00101 97 V812x MUTx 04 V812_REV4 DOC 23 CAEN Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 1 3 Technical specification table Table 1 2 Technical specification table mus 17712711 77 Selectable 4 ns steps 20 ns full scale Optional Delay 5ns full scale with 1ns steps 50ns full scale with 10ns steps 100ns full scale with 2016 steps Outputs 16 outputs with a fan out of two ECL 110 O impedance Input output delay Set delay 4 5 2 ns Output width 00000 Programmable from 15 ns to 250 ns Programmable from 150 ns to 2 us 10 Max outputs time walk 400 ps for input signals in the range from 50 mV to 5 V with 25 ns rise time Automatic adjustment of input offset and low frequency input noise of 40 mV NIM logic signals high impedance Control inputs VETO allows to veto all channels simultaneously TEST triggers a
9. 00101 97 V812x MUTx 04 V812_REV4 DOC 23 for Disce very Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 4 9 Setting the Dead Time 4 10 NPO It is possible via VME to set a Dead Time value in common to a group of 8 channels This prevents the triggering of the discriminator by unwanted pulses occurring within the Dead Time programmed value It can be set by a VME access at Base Address 44 for channels 0 to 7 and at Base Address 46 for channels 8 to 15 set values 0 to 255 The set value corresponds to the Dead Time as follows 255 leads to a 2 us value 0 leads to a 150 ns value with a non linear interpolation for intermediate values N B The actual Dead Time is equal to the greater between Output Width and Dead Time set Current Sum signal The front panel also houses the Current Sum gt output connector which provides a current proportional to the input signal multiplicity i e to the number of channels over threshold at a rate of 1 0 mA per hit 50 mV per hit into 50 Ohm load 20 Note The X output requires 50 Ohm termination for a correct operation of the Majority logic Channel 1 21 2 3 time CurentSum 9 nl 24 mA Fig 4 1 Current Sum signal Filename Numb
10. An OR output connector provides also the logical OR of the output channels The relevant OR LED lights up if at least one of the enabled channels is over threshold Channels test It is possible to obtain pulses on all channels e sending pulse through one of the two TEST connectors located on the front panel e by performing a Write operation at Base address 4C Setting the threshold For each channel of the V812 the discriminator threshold is set up via an 8 bit DAC The threshold values can be programmed in a range from 1 mV to 255 mV with 1 mV steps set values 1 to 255 As in all Constant Fraction Discriminators these thresholds are to be set above the noise level they do NOT correspond to the actual level that triggers the discriminator outputs the latter being a constant fraction of the input signals In order to write the Threshold for each channel the User must perform a VME access at Base address 9600 to 951 Setting the output pulse width The output pulse width is adjustable on 8 bit from 15 to 250 ns set values 0 to 255 and the chosen value is applied to each group of 8 channels each It can be set at Base address 9540 for channels 0 to 7 and at Base address 9642 for channels 8 to 15 The set value corresponds to the Width as follows 255 leads to a 250 ns value 0 leads to a 15 ns value with a non linear interpolation for intermediate values Filename Number of pages Page 20
11. Fraction Discriminator 20 04 2009 4 4 7 SETTING THE 2 25554 522 20 4 8 SETTING THE OUTPUT PULSE WIDTH 20 4 9 SETTING THE DEAD TIME rti Gne Re eaa cava Rte beer 21 4 10 CURRENT SUM SIGNAL 21 4 11 ucc HA 22 LIST OF FIGURES FIG 1 1 MODEL TYPE LABEL EXAMPLE V812 6 EG 1 2 BLOCK DIAGRAM 7 PIG 2 1 FRONT PANEL 10 FIG 2 2 COMPONENTS EOGCATION veg vb aue PUR ERR FE 13 BIG 23 JUMPERS LOCATION Cot eee et beue vete ed eeu eee rhe tet terae rese 14 FIG 3 1 OUTPUT WIDTH VS REGISTER SET VALUE cessceessecesecesseeceeneeesaeceseeessaeceneecaaecesceecsaeceeneecnaeceaeeecaeeeeneeenaeeenees 16 3 2 MODULE IDENTIFIER WORDS aia Eee be pe
12. M logic signal 50 impedance Rise fall time lt 4 ns Max output frequency 30 MHz OUTPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 11 Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 current output 1 mA 20 per hit high impedance Rise fall time lt 8 ns Max output frequency 30 MHz MAJORITY OUTPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications Standard NIM logic signal 50 impedance 2 5 Other components 2 5 1 Displays The front panel hosts the following LEDs DTACK Type 1 green LED Function VME selected it lights up during a VME access OR Type 1 green LED Function it lights up if at least one output signal is present 2 5 2 Switches ROTARY SWITCHES Function they allow to select module s VME address please refer to Fig 2 2 for their setting 2 5 3 Jumpers JP1 Function it allows to select the Majority logic Internal External please refer to Fig 2 3 for the jumper location on the V812 board JP2 JP17 Function they allow to set the Delay The Delay values range up to 20 ns with 4 ns steps please refer to Fig 2 3 for the jumpers location on the V812 board Factory setting is 20 ns Optionally is also available 5ns f
13. Technical Information Manual Revision n 4 20 April 2009 MOD V 812 series 16 CH CONSTANT FRACTION DISCRIMINATORS NPO 00101 97 V812x MUTx 04 will repair or replace product within the guarantee period if the Guarantor declares that the product is defective due to workmanship or materials and has not been caused by mishandling negligence on behalf of the User accident or any abnormal conditions or operations CAEN declines all responsibility for damages or injuries caused by an improper use of the Modules due to negligence on behalf of the User It is strongly recommended to read thoroughly the CAEN User s Manual before any kind of operation CAEN reserves the right to change partially or entirely the contents of this Manual at any time without giving any notice Disposal of the Product The product must never be dumped in the Municipal Waste Please check your local regulations for disposal of electronics products ls for Disc very Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 TABLE OF CONTENTS l GENERAL DESCRIPTION sssscccscvcvscrsiccssetescsesesdeveus sdesvevecesesenssdsosenccsscesosstinsss seconded eneevesesoseosedebusesds oenseseussdsseunseceses 5 1 1 FUNCTIONAL DESCRIPTION 5 1 2 BEOGK DIAGRAM
14. ant Fraction Discrimination technique is based on summing a delayed full height input signal to an inverted and attenuated signal The resulting signal is fed into a zero crossing comparator thus obtaining a precise timing information that eliminates any walk errors induced by constant rise time and varying amplitude signals For correct operation the maximum of the attenuated pulse has to cross the delayed pulse at the selected fraction This condition leads to the following relation Taelay Trise 1 F where Selected delay on the Constant Fraction Discriminator Trise rise time of the input signals F Constant Fraction value The Mod V812 Constant Fraction Discriminator features a factory setting of 20 for the fraction and 20 ns for the full scale delay The delay can be selected in 4 ns steps up to 20 ns Power ON Reset Status At Power ON the contents of all the module s registers are not determined A setting of the registers must be performed before any other operation Setting the Delay For each channel a 5 positions jumper allows to set the Delay according to the formula expressed in 4 1 The Delay values range up to 20 ns with a step of 4 ns in order to gain access to the jumpers it s necessary to unplug the relevant piggy back board see for the jumpers location on the V812 board Factory setting is 20 ns The fraction is a fixed 20 value Enabling Disabling the channels The User can ena
15. ble or disable each of the 16 channels via VME by performing a VME write access at Base address 4A A channel is enabled if the corresponding bit of the Pattern of Inhibit is high g bin 1111 1111 1111 0011 or hex disables channels 2 and 3 of the discriminator Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 19 Is for Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 4 5 Test Veto and Or signals 4 6 4 7 4 8 NPO Some operations can be performed by sending two external NIM signals TEST an input signal sent through this connector triggers all the enabled channels at once This feature allows to test of the module as well as to generate a pattern of pulses suitable to test any following electronics e VETO an input signal sent through this connector allows to veto all channels simultaneously A veto pulse of width T will inhibit the input channels for a period with a T duration Its leading edge must precede the input signal leading edge by at least 8 ns and overlap completely the input signal Note TEST and VETO are high impedance inputs and each one is provided with two bridged connectors for daisy chaining the chain has to be terminated on 50 Ohm on the last module the same is needed also if one module only is used whose inputs have thus to be properly matched e
16. er of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 21 Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 4 11 Majority setting Majority output provides a standard NIM signal if the number of channels over threshold exceeds the programmed majority level MAJLEV MAJLEV can be programmed between 1 and 16 writing a proper value MAJTHR in the Majority threshold register see 3 7 valid values range between 0 and 255 MAJTHR can be calculated in the following way MAJTHR NINT MAJLEV 50 25 4 where NINT is the Nearest Integer 1 2 3 4 5 6 7 8 9 0 Table 4 1 Majority Level setting values The Majority logic can be switched from an Internal to an External position by means of an internal Jumper see Fig 2 3 e Internal With the jumper on the Internal position Majority output provides an active signal if the number of the active channels of the module exceeds the programmed majority level MAJLEV In this case valid values of MAJLEV are from 1 to 16 e External Several modules can be connected in daisy chain via the X outputs In this case by setting the Jumper to the External position the Majority logic will act on the sum of the X outputs of the connected modules The majority signal will be active if the sum of chained modules active channels exceeds or is equal to the programmed MAJLEV An
17. example with three chained modules is shown in Fig 4 2 The X output line must be terminated with 50 Ohm NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 22 CAEN Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 pP PCR T N Sai qe CMaj State INT gt State INT gt State EXT gt mA Majority State INT 10 Majority Level MAJLEV referred to CN over th referred to over th referred to all chained modules channel channel over th channels Number of Module s active Channels Majority Output ACTIVE NON Active ACTIVE 5 gt MAJLEV 4 lt MAJLEV 5 4 3 gt MAJLEV Fig 4 2 Example of three daisy chained V812 NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 23
18. hold register Ch Base 9642 Output width register Ch 8 to 15 Write only Base 9646 Dead Time register Ch 8 to 15 Write only Base Read only Base FC Manufacturer amp Module type Read only Base FE Version amp Serial number Read only O Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 15 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 3 2 Discriminator thresholds 3 3 3 4 Base address 9600 to 1E write only These registers contain the discriminator threshold values on 8 bit words The threshold values can be programmed ina range from 1 mV to 255 mV with 1 mV steps writing an integer number between 1 and 255 into the register although a minimum threshold of 5 mV is required the channel thresholds are individually settable Pattern of Inhibit Base address 4A write only This register contains the Pattern of Inhibit a 16 bit word indicating which channels are either enabled or disabled bit X 1 Ch X enabled bit X 0 Ch X disabled Output width Ch 0 to 7 and Ch 8 to 15 Base address 9640 write only Base address 9542 write only These registers contain the output pulse width value of the channels 0 through 7 and channels 8 through 15 respectively on a 8 bit words Thes values can
19. l Constant Fraction Discriminator 20 04 2009 4 3 VME Interface 3 1 Addressing Capability The V812 module works in A24 A32 mode This implies that the module s address must be specified in a field of 24 or 32 bits The address modifiers codes recognized by the module are AM 39 Standard user data access AM 3D Standard supervisor data access AM 09 Extended user data access AM 0D Extended supervisor data access The module s Base address is fixed by 4 internal rotary switches housed on two piggy back boards plugged into the main printed circuit board see Fig 2 2 The Base address can be selected in the range 00 0000 lt gt FF 0000 A24 mode 0000 0000 lt gt FFFF 0000 2 mode The module s address lines A09 A15 are not connected so their content is meaningless for example writing to either Base 104C or Base 284C the same register is accessed Table 3 1 Address Map Base 00 Threshold register Ch Base 02 Threshold register Ch Base 04 Threshold register Ch Base 06 Threshold register Ch Base 08 Threshold register Ch Base 0A Threshold register Ch Base 0C Threshold register Ch Base 0E Threshold register Ch Base 9510 Threshold register Ch Base 9512 Threshold register Ch Base 9514 Threshold register Ch Base 9516 Threshold register Ch Base 9518 Threshold register Ch Base 1A Threshold register Ch Base 1 Threshold register Ch Base 1E Thres
20. ll the enabled channels at once MAJORITY standard NIM logic signal 50 impedance it indicates if the number of input channels over threshold exceeds Control outputs the MAJORITY level programmed via VME OR standard NIM signal 50 Q impedance logic OR of outputs current proportional to input multiplicity 1 mA 20 per hit high impedance DTACK green LED lights up at each VME access Displays OR green LED it lights up if at least one output signal is present NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 8 CAEN Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 2 Technical Specifications 2 1 Packaging The Mod V812 is housed in a 6U high 1U wide VME unit 2 2 Power requirements The power requirements of the Mod V812 are as follows Table 2 1 Power requirements V812 V812 B 100 mA 100 mA 5 NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 9 CAEN Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 2 3 Front Panel Mod V812 e e 8 e e Fig 2 1 Front Panel NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 10 Tools for Discovery Document type Title Revision date
21. onds to the pulse width as follows 255 leads to a 2 us value 0 leads to a 150 ns value N B The actual Dead Time is equal to the greater between output width and Dead Time set values Dead Time Ch 8 to 15 Base address 46 write only This register is used to select the Dead Time value common to all Channels from 8 to 15 This command allows to select on 8 bit set values 0 to 255 the Dead Time value between 150 ns and 2 The set value corresponds to the pulse width as follows 255 leads to a 2 us value 0 leads to a 150 ns value N B the actual Dead Time is equal to the greater between output width and Dead Time set values Majority threshold Base address 9648 write only This register allows to set the Majority threshold between 1 and 16 for Internal Majority and between 1 and 20 for External Majority by writing a proper value in the Base address 9548 set values 1 to 244 The relation to use is the following MAJTHR NINT MAJLEV 50 25 4 where NINT is the nearest integer function allowed values for MAJLEV 1 to 20 e g if the User wants to use a majority level of 5 the correct MAJTHR value to use is 56 Test pulse Base address 4C write only A test pulse on all output channels can be generated by performing a write access at Base address 964C the test pulse is generated independently from the number written into this register Module identifier words Base address FA FC
22. software for each channel through the VME bus The most important are e setting the discriminator thresholds 8 bit data from 1 to 255 mV e setting pattern of inhibit each channel can be turned ON or OFF by using a mask register e setting output pulse width e Setting the Majority threshold value e selection of the Dead Time value Filename Number of pages Page 5 00101 97 V812x MUTx 04 V812_REV4 DOC 23 s for Discover Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 4 Table 1 1 Versions available for the Model V812 Number of channels PAUX connector WV812XBAAAAA pes MAY 5th 2002 Fig 1 1 Model type label example V812 B A label on the printed board soldering side indicates the module s version see Fig 1 1 The version with the PAUX connector requires the V430 backplane Available exclusively on request NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 6 ls for Discovery Document type Title User s Manual MUT Mod V812 16 Channel Constant Fraction Discriminator 20 04 2009 Revision date Revision 4 1 2 Block diagram DACs TEST INHIBIT 7 wLOGIC eS Tu ut OA IN kl 8
23. ull scale with 1ns steps 50ns full scale with 10ns steps and 100ns full scale with 20ns steps NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 12 CAEN Q Tools for Discovery Document type Title Mod V812 16 Channel Constant Fraction Discriminator User s Manual MUT Channels 8 to 14 OS Base address bit lt 23 20 gt Base address bit 19 16 gt Revision date Revision 20 04 2009 4 Rotary switches for Base Address selection Flat Cable Connectors A B Discriminator Ch 14 Ch 15 Discriminator Ch 12 Ch 13 Discriminator Ch 10 Ch 11 Discriminator Ch 8 Ch 9 Test 4 MAJ secte i Discriminator Veto SUM Ch 6 Ch 7 DOM 5 TNT Discriminator at Ganie Ch 4 Ch 5 O Connectors A B Discriminator Ch 2 Ch 3 Channels 0 to OL a Discriminator Ch 0 Ch 1 5 Base address bit lt 31 28 gt gt Base address bit lt 27 24 gt Fig 2 2 Components location NPO Filename 00101 97 V812x MUTx 04 V812_REV4 DOC VME P1 connector
24. vsvsvessvevsvscsvevsvevsvesssecsvsssversvess 16 3 PATTERN OF INHIBIT RR RR 16 3 4 OUTPUT WIDTH CH 0 TO 7 8 15 200000000000001 001 16 3 5 DEAD FIME CHO TOF 17 3 6 PRAP TIME CH 8 TO US 17 3 7 MAJORITY THRESHOLD asiron neasa een uen 17 3 8 BUSQUE I Cree 17 3 9 MODULE IDENTIFIER he 17 4 7 PRINCIPLES OF OPERATION sivscsssscsssccssssnaccsscsossossseescssascsssssstcoessadessdsssccessstoessescesssetacessussescssostecessenssssssasasesste 19 4 1 THE CONSTANT FRACTION DISCRIMINATION TECHNIQUE csssssssssecececeessaeceeececsesseaececcceceeseaeseseeeeeessnneaeees 19 4 2 POWER ON RESET STATUS eor aorta ease Eee 19 4 3 SETTING THE DELAY ere e ERE 19 4 4 ENABLING DISABLING THE 5 0 19 4 5 VETOAND OR rire eer erae te 20 4 6 CHANNBLS TEST RHONE 20 NPO Filename Number of pages Page 00101 97 V812x MUTx 04 V812_REV4 DOC 23 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V812 16 Channel Constant
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