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TERIDIAN 71M6533 Demo Board User`s Manual

1. 75 46 Debug Board PCB 76 4 7 TERIDIAN 71 6533 Pin Out 4 4444442 0 79 468 R ViS OWnTIISIyYu 83 List of Figures Figure 1 1 TERIDIAN D6533T14A3 Demo Board with Debug Board Basic Connections 9 Figure 1 2 Block diagram for the TERIDIAN D6533T14A3 Demo Board with Debug Board 10 Figure 1 3 Hyperterminal Sample Window with Disconnect Button 13 Figure 1 4 Port Speed and Handshake Setup left and Port Bit setup right 14 Figure 1 5 Command Line Help 15 Figure 1 6 Typical Calibration Macro 26 Figure 1 7 Emulator Window Showing Reset and Erase Buttons see Arrows 28 Figure 1 8 Emulator Window Showing Erased Flash Memory and File Load 28 Figure 2 1 Watt Meter with Gain and Phase 39 Figure 2 2 Phase Angle 43 Figure 2 3 Calibration Spreadsheet for Three 47 Figure 2 4 Calibration Spreadsheet for Five
2. 23 1 8 3 Adjusting Kh Factor for the Demo 23 1 8 4 Adjusting the Demo Boards to Different Current Transformers 24 1 8 5 Adjusting the Demo Boards to Different Voltage Dividers 24 19 C 25 1 9 1 General Calibration Fr COS uu uuu _ ___________ 25 1 9 2 Calibration Macro 26 1 9 3 Updating the Demo Code hex nennen nnn nnne nnns 26 1 9 4 Updating Calibration Data in Flash or EEPROM without Using the ICE or the 2 26 1 9 5 Automatic Gains CallDEaEOTL us un ptor ao en Fo ya one aix 27 1 9 6 Loading the Code for the 6533 into the Demo 27 1 97 Programming Interface of the 71 6533 6533 29 1 10 P 30 1 10 1 Demo Code DSS CMO ETE EET 30 1 10 2 Important Demo Code MPU Parameters 31 1 10 3 Useful CLI Commands Involving the MPU and 38 2 APPLICATION ldelye m 39 21 Calibration THEO uuu mmm 39 2 1 1 Cali
3. 47 Figure 2 5 Calibration Spreadsheet for Rogowski nnn rn 48 Figure 2 6 Non Linearity Caused by Quantification eene nnne nnn nennen 49 Figure 2 7 Voltage Divider 1 9 51 Figure 2 8 External Components for 5 2 8 51 Figure 2 9 Oscilator 52 Figure 2 10 EEPROM CCU 52 Figure 2 TTE CGD RE RR 53 Figure 2 12 Optical Interface Block 53 Figure 2 13 Meter with Calibration 54 Figure 2 14 Calibration System 5 55 Figure 2 15 Load Line in Differential Mode at Room 55 Figure 3 1 D6533T14A3 Demo Board Board 8 61 Figure 4 1 TERIDIAN D6533T14A3 Demo Board Electrical Schematic 1 3 64 Figure 4 2 TERIDIAN D6533T14A3 Demo Board Electrical Schematic 2 3 65 Figure 4 3 TERIDIAN D6533T14A3 Demo Board Electrical Schematic 3 3 66 Figure 4 4 TERIDIAN D6533T14A3 Demo Board Top 68 Figure 4 5 TERIDIAN D6533T14A3 Demo Board Top 69 Figure 4 6 TE
4. 96 95 00 99 98 97 9 93 92 91 Teridian 71M6533 Se N f LO SE O O S C CO 10 CN OO lt f LO T gt n S Q S 5 GOOS x 0 C 0 62 62 NP o 4 N 9 S 9 00 5 RO O O00000 9 5 LLI 0000 Or 0 LLI J TERIDIAN GNDD RESET V2P5 SEG31 DIO11 SEG30 DIO10 SEG29 DIO9 YPULSE SEG28 DIO8 XPULSE SEG44 DIO21 SEG40 DIO20 SEG39 DIO19 SEG27 DIO7 RPULSE SEG26 DIOG WPULSE SEG25 DIO5 SDATA SEG24 DIO4 SDCK SEG23 SEG22 SEG21 SEG20 ICE SEG43 DIO23 SEG18 SEG17 SEG16 Figure 4 17 TERIDIAN 71M6533 71M6533H epLQFP100 Pinout top view Page 82 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 4 8 REVISION HISTORY 1 30 2008 initial release Updated copyright date in footers Added text stating that no jumper should 2 5 2008 be across VBAT and OPT TX OUT J12 and updated Figure 3 1 Updated pin description tables Corrected Figure 2 9 added load line graph for differential mode Updated to include Demo Board revision D6533T14A3 and new pin out 2 25 2008 arrangement of 71M6533 Updated Calibration Procedures section User s Manual This User s Ma
5. 20 2 2 LB uogE 0 2 5 Note C53 and R107 2 should be 9 close to the W IC GND SEG25 DIO05 SEG28 DIO08 SEG15 EG14 SEG12 DIO13 SEG63 DIO43 ND 65 DIO45 09 0 PSDI 6 DIO16 EG49 DIO29 64 01044 DIO15 4 01014 0 EGO1 00 1000 49 OFF PAGE INPUTS COM3 DIO 0 DIO10 ATIDIO 40 01020 O DIO19 EG23 SEG64 DIO44 00 EG38 DIO18 DIO OM GND C61 22pF E RXTX E TCLK E RST C30 22pF GND OFF PAGE OUTPUTS oO Cn BY Go 5 gt COM3 1F 1E 1D 3 2F 2E 2D 5 3F 3E 3D 7 4 4 4 9 9F 5E 5D 11 6F 6E 6D 8F 8E 8D 17 COM2 VIM 828 DP 1A 1B 1C 1DP 33 2A 2B 2C 2DP 31 3A 3B 3C 3DP 29 4A 4B 4C 4DP 27 5A 5B 5C 5DP 25 6A 6B 6C 6DP 23 7A 7B 7C 7DP 21 8A 8B 8C 8DP COMO U8 1000pF TERIDIAN SEMICONDUCTOR CORP COM1 SEG20 43 DIO EG17 EG15 SEG12 DIO 63 0104 65 0104 08 0 EG36 DIO16 19771029 18 SPI Interface Note Populate J14 or J17 but not both VBAT C26 NC 57 J14 1000 417 EMULATOR I F C27 22pF VBAT CIN C69 K 1000 RST EMU ND ICE EN 6 oi ICE Header GND _ _ TP15 16 28 M ET 1000pF 0 1uF C52 C51 UART_RX 25 IAP IAN
6. 22 0183 2005 2008 TERIDIAN Semiconductor Corporation V1 2 1 8 2 1 8 3 J TERIDIAN USING THE DEMO BOARD FOR ENERGY MEASUREMENTS The 71M6533 6533H Demo Board was designed for use with current transformers CT The Demo Board may immediately be used with current transformers having 2 000 1 winding ratio and is programmed for a Kh factor of 3 2 and see Section 1 8 4 for adjusting the Demo Board for transformers with different turns ratio Once voltage is applied and load current is flowing the red LED D5 will flash each time an energy sum of 3 2 Wh is collected The LCD display will show the accumulated energy in Wh when set to display mode 3 command gt the serial interface Similarly the red LED D6 will flash each time an energy sum of 3 2 VARh is collected The LCD display will show the accumulated energy in VARh when set to display mode 5 command 5 the serial interface ADJUSTING THE KH FACTOR FOR THE DEMO BOARD The 71M6533 6533H Demo Board is shipped with a pre programmed scaling factor Kh of 3 2 i e 3 2Wh per pulse In order to be used with a calibrated load or a meter calibration system the board should be connected to the AC power source using the spade terminals on the bottom of the board The current transformers should be connected to the dual pin headers on the bottom of the board The Kh value can be derived by reading the values for IMAX and VMAX i e the RMS current a
7. 58 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 3 HARDWARE DESCRIPTION 3 1 D6533T14A3 BOARD DESCRIPTION JUMPERS SWITCHES AND TEST POINTS The items described in the following tables refer to the flags in Figure 3 1 Reference Designator Two pin header test points One pin is the VA VB or VC VAr VBE YG line voltage input to the IC and the other end is V3P3 PS_SEL 0 A jumper is placed across JP1 to activate the internal 4 JP1 power supply JP1 is on the bottom of the board 2 Caution Voltage Do not touch VA_IN VB_IN VA_IN VB_IN and VC_IN are the line voltage inputs to the VC_IN board Each input has a resistor divider that leads to the 3 8 11 JG J8 on the IC associated with the voltage input to the ADC ad diu These inputs are spade terminals mounted the bottom CAUTION of the board Caution High Voltage Do not touch these pins The NEUTRAL voltage input connected to V3P3 This input is spade terminal mounted on bottom of the board Chip reset switch When the switch is pressed the RESET 7 SW2 RESET pin of the IC is pulled high which resets the IC into a known state Three pin header that allows selection of power to the VBAT pin When the jumper is placed between pins 1 and 2 default setting of demo board VBAT is tied to IC supply An external battery can be connected betwee
8. 08 Reads data words 0x08 0x10 0x14 04 12345678 9876ABCD Writes two words starting 0x04 MPU or XDATA space is the address range for the MPU XRAM 0x0000 to OxFFF All MPU data words are in 4 byte 32 bit format Typing JA will access the 32 bit word located at the byte address 4 A 0x28 The energy accumulation registers of the Demo Code can be accessed by typing two Dollar signs typing question marks will display negative decimal values if the most significant bit is set Commands for DIO RAM Configuration RAM and SFR Control Description Allows the user to read from and write to DIO RAM and special function registers SFRs R option register option Command Rix Select RAM location x 0x2000 offset is automatically combinations added Select intemal SFR at address Read consecutive SFR registers in Decimal starting at address a Read consecutive registers Hex starting at address Ra n m Set values of consecutive registers to n and m starting at address a RI2 Read DIO RAM registers 2 3 and 4 in Hex DIO or Configuration RAM space is the address range 0x2000 to 0x20FF This RAM contains registers used for configuring basic hardware and functional properties of the 71M6533 6533H and is organized in bytes 8 bits The 0 2000 offset is automatically added when the command RI is typed The SFRs special function registers are l
9. pes Pulse counts accumulated over a time window defined by the CPD command will be displayed by M14 after the defined time has expired pes M14 will display the absolute pulse count for the W and VAR outputs These displays are reset to zero with the 27 CPC command or the XRAM write 1 2 T Commands for Identification and Information Description llows user to read information messages The command is mainly used to identify the revisions of Demo Code and the contained CE code Page 19 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 oy 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR CORP Commands for Controlling the RMS Values Shown on the LCD Display 2 _ Description Allows user to select meter RMS display for voltage or current MR option option MR1 phase Displays instantaneous RMS current combinations 2 phase Displays instantaneous RMS voltage MR1 3 Displays phase C RMS current Phase 4 is the measured neutral current S No error message is issued when an invalid parameter is entered e g MR1 8 Commands for Controlling the MPU Power Save Mode Description Enters power save mode Disables CE ADC CKOUT ECK RTM SSI TMUX VREF and serial port sets MPU clock to 38 4KHz Return to normal mode is achieved by resetting the MPU 2 command E Commands for Controll
10. 01058 aie GND tuF 1000pF IBP IBN a a 2 8 GND HEADER 3 ICP ICN VBAT gt gt IDP IDN 71M6533 4L DB Neutral Current Capable R104 SERIAL EEPROM nic ursday Marc 2008 Figure 4 3 TERIDIAN D6533T14A3 Demo Board Electrical Schematic 3 3 Page 66 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 EMICONDUCTOR CORP 4 2 71M6533 DEMO BOARD BILL OF MATERIAL PCB Digi Key Mouser Part Reference Footprint Number Part Number Manufacturer 1 1 8 AVX 5 8 551720225809 OF Rcos0s 445 1814 tND _C1608x7RIH104K oE 222238330474 Vishay 56 59 40 Le NO T 3 C24 TDK Pe tfc gt 499 3564 1 ND 7 Murata _ 14 060270310600688 226F 86063 ____4451273140 160860618227 C82 50533 UCLAMP33oiD TCT SEMTECH A p NC sp 2 0 01 2 24363838 Spade Terminal 63954 22 Jo PUALROW 122 PINMALE 92966509 245 _ m Ja CONNECTOR 005 571510064 ____5 1040661 29 s JP1JP1S JP14 JP15 JP17 JP18 HEADER2 20 510 3840 PZC365AAN J
11. 3973 PHADJ previous 9s 1786 0 If voltage coupling at low currents is introducing unacceptable errors perform step 2 below to select non zero values for VFEED A VFEED B and VFEED Step 2 Voltage Cancellation Select a small current lays where voltage coupling introduces at least 1 5 energy error At this current measure the errors and E so to determine the coefficient VFEED VFEED mte 225 aus Vmax _ VFEED PREVIOUS 1 Vnus CALIBRATION SPREADSHEETS Calibration spreadsheets are available from TERIDIAN Semiconductor They are also included in the CD ROM shipped with any Demo Kit Figure 2 3 shows the spreadsheet for three measurements Figure 2 4 shows the spreadsheet for five measurements with three phases For CT and shunt calibration data should be entered into the calibration spreadsheets as follows 1 Calibration is performed one phase at a time 2 Results from measurements are generally entered in the yellow fields Intermediate results and calibration factors will show in the green fields 3 The line frequency used 50 or 60 20 is entered in the yellow field labeled AC frequency 4 After the voltage measurement measured observed and expected actually applied voltages are entered in the yellow fields labeled Expected Voltage and Measured Voltage The error for the voltage measurement will then show in the green field above the two voltage entries 5 The relative erro
12. 8 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 71M6533 71M6533H Demo Board User s Manual 1 7 SEIS DIAN SEMICONDUCTOR CORP DEMO BOARD TEST SETUP Figure 1 1 shows the basic connections of the Demo Board plus Debug Board with the external equipment for desktop testing 1 6 without live power applied For desktop testing both the Demo and Debug board may be powered with just the 5VDC power supplies Power SVDC Two Power Supplies 100VAC to 240VAC 5 Output Power 5VDC Figure 1 1 TERIDIAN D6533T14A3 Demo Board with Debug Board Basic Connections The D6533T14A3 Demo Board block diagram is shown in Figure 1 2 The configuration consists of a stand alone round meter Demo Board and an optional Debug Board The Demo Board contains all circuits necessary for operation as a meter including display calibration LEDs and internal power supply The Debug Board uses a separate power supply and is optically isolated from the Demo Board It interfaces to a PC through a 9 pin serial port connector For serial communication between the PC and the TERIDIAN 71M6533 71M6533H the Debug Board needs to be plugged with its connector J3 into connector J2 of the Demo Board Connections to the external signals to be measured i e scaled AC voltages and current signals derived from shunt resistors or current transformers are provided on the rear side of the demo board Caution It is recommended to set up the
13. 00 00 00 00 00 1 Address 2038 Dec 4 0 76 00 00 0 1 13 08 00 00 1 01 00 04 00 00 2 2I no on nn Loading Bank Offset V Load Code v Verify Code DBUMESS Load Symbols _ Load Source Lines 10 oo 00 00 00 00 0 00 aH 00 00 00 00 00 00 00 0 0 00 0 00 00 26 Microsoft 4 0 00 00 oo 00 00 00 00 00 00 00 00 0 00 00 0 a dobe Re Demo Boa vec c Hanum 2 Status 1 ADMS1 41807 CPU 71M6511 0000 0 0000 ACC 00 00 cy 0 0 PORSO RO R2 01 R4 00 R6 00 Status 1 DM51 41807 CPU 71M6511 PC 0000 BANK 0 DPTR 0000 SP 07 B 00 IE 00 CY 0 0 FO 0 OV P ORS 0 F1 RO R1 05 2 01 3 13 R4 00 R5 00 R 00 Rk 00 ACC 00 Figure 1 8 Emulator Window Showing Erased Flash Memory and File Load Menu 2005 2008 TERIDIAN Semiconductor Corporation V1 2 d LEA S 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR CORP 1 9 7 THE PROGRAMMING INTERFACE OF THE 71M6533 6533H Flash Downloader ICE Interface Signals The signals listed in Table 1 6 are necessary for communication between the Flash Downloader or ICE and the 71M6533 6533H 4 Sianal Function e ifi Input to the 71M6533 6533H ICE interface is enabled when ICE is pulled high E TCLK Output f
14. 2 1 2 cosQaf T 1 27 CAL _ 2 1 2 CALIBRATION WITH FIVE MEASUREMENTS The five measurement method provides more orthogonality between the gain and phase error derivations This method involves measuring Ey Eo E180 and E399 Again set all calibration factors to nominal i e CAL IA 16384 CAL_VA 16384 PHADJA 0 First calculate Axy from Ey 1 gt Ay 1 Calculate from and _ IV Ay cos 0 s _ 2 1 A A COS 1 0 IV cos 0 XV XI Ds IV Ay Ay cos 180 3 E _1 A cos 1 180 IV cos 1 80 XV XI 0 4 2 05 2 E 2 5 Ay xj 2 0 2 1 6 3 Ay 0 0 Use above results along with and to calculate ds _ IV Ay cos 60 B f 60 Ay Ay COS Ay tan 60 sin 1 E IV Ay 60 0 _ IV cos 60 A Ay cos d Ayy Ay tan 60 sin 1 Subtract 8 from 7 9 2Ayy Ay tan 60 sin use equation 5 Page 41 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN Eu 2 10 7 tan 60 sin 8 0 11 E 2 tan 60 0 i 123 tan 9 tan 60 E Eig 2 Now that we know the and errors we cal
15. 2005 2008 TERIDIAN Semiconductor Corporation V1 2 2 5 2 2 5 3 2 5 4 2 5 5 J TERIDIAN EEPROM Testing the EEPROM provided on the Demo Board is straightforward and can be done using the serial command line interface CLI of the Demo Code To write a string of text characters to the EEPROM and read it back we apply the following sequence of CLI commands gt Enables the EEPROM gt EESthis is a test Writes text to the buffer gt 80 Writes buffer to address 80 Written to EEPROM address 00000080 74 68 69 73 20 69 73 20 61 Response from Demo Code gt 80 Reads text from the buffer Read from EEPROM address 00000080 74 68 69 73 20 69 73 20 61 Response from Demo Code gt EECO Disables the EEPROM RTC Testing the RTC inside 71M6533 6533H is straightforward and can be done using the serial command line interface CLI of the Demo Code To set the RTC and check the time and date we apply the following sequence of CLI commands gt 10 LCD display to show calendar date gt RTD05 09 27 3 Sets the date to 9 27 2005 Tuesday gt M9 LCD display to show time of day gt RTT10 45 00 Sets the time to 10 45 00 AM PM distinction 1 22 33PM 13 22 33 HARDWARE WATCHDOG TIMER The hardware watchdog timer of the 71M6533 6533H is disabled when the voltage at the V1 pin is at 3 3V V3P3 On the Demo Boards this is done by plugging in a jumper at TP10 between the V1 and V3P3 pins Pro
16. A 20 POWER_BAD Element B has a sag condition This bit is set in real time by the CE and 26 SAGB detected by the ce_busy interrupt ce_busy_isr in ce c within 8 sample intervals about 2 6ms SAGCE Element has a sag condition See the description of the other sag bits 28 FO CE A square wave at the line frequency with a jitter of up to 8 sample intervals about 2 6ms ONE SEC Changes each accumulation interval Table 1 10 MPU Status Word Bit Assignment Page 36 of 83 O 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN MPU ACCUMULATION OUTPUT VARIABLES Accumulation values are accumulated from XFER cycle to XFER cycle see Table 1 11 They are organized as two 32 bit registers The first register stores the decimal number displayed on the LCD For example if the LCD shows 001 004 the value in the first register is 1004 This register wraps around after the value 999999 is reached The second register holds fractions of the accumulated energy with an LSB of 9 4045 10 VMAX IMAX In 8 Wh The MPU accumulation registers always hold positive values The CLI commands with two question marks e g 39 should be used to read the variables XRAM Word Name Description Address Wh Wh VA Wh TealWathousconsumed mpote Oda Who Total Watt hours generated exported Va Total Watt hours generated inverse consumed through element 0 Total Watt hours generated
17. CE RAM Locations for Calibration 25 Table 1 5 Flash Programming Interface nnne nnns 29 Table 1 6 MPU Input Parameters for 32 Table 1 7 Selectable Pulse 6 2 33 Table 1 8 MPU Instantaneous Output Variables 0 0000000001 erre aerea area nene 34 Table 1 9 MPU Status Word Bit 36 Table 1 10 MPU Accumulation Output Variables 37 Table 1 11 Commands for Data 38 Table 2 1 Power Saving 50 Table 3 1 D6533T14A3 Demo Board nnn nnne nnne nnns 59 Table 3 2 D6533T14A3 Demo Board 61 Table 4 1 D6533T14A3 Demo Board Bill of Material 67 Table 4 2 Debug Board Bill 0 000000 0 000 000 74 Table 4 3 71M6533 71M6533H Pin Description Table 1 3 a 79 Table 4 4 71M6533 71M6533H Pin Description Table 2 39 errar nnne nnne nns 79 T
18. GND 5 7 RTM INTERFACE 9 11 battery ___ TMUXOUT FPGA optional T PB 6 6 V3P3D CKTEST V5 DBG 5 15 19 4 V5 NI powered by 13 14 o O a V3P3D N C ws GND_DBG E EE 42 JP 1 4 04 25 2008 Figure 1 2 Block diagram for the TERIDIAN D6533T14A3 Demo Board with Debug Board Page 10 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 1 7 1 POWER SUPPLY SETUP There are several choices for the meter power supply e Internal using phase A of the AC line voltage The internal power supply is only suitable when the phase voltage exceeds 220V RMS A jumper needs to be installed across JP1 on the bottom of the board e External 5VDC connector J1 on the Demo Board e External 5VDC connector J1 on the Debug Board 1 7 2 CABLE FOR SERIAL CONNECTION DEBUG BOARD For connection of the serial port to a PC either a straight or a so called null modem cable may be used JP1 and JP2 are plugged in for the straight cable and JP3 JP4 are empty The jumper configuration is reversed for the null modem cable as shown in Table 1 1 Cable Jumpers on Debug Board Straight Cable Default Installed Installed Null Modem Cable Alternative Installed Installed Table 1 1 Jumper Settings on Debug Board JP1 through JP4 can also be used to alter the connection when the
19. PC is not configured as a DCE device Table 1 2 shows the connections necessary for the straight 089 cable and the pin definitions Table 1 2 Straight Cable Connections Table 1 3 shows the connections necessary for the null modem 089 cable and the pin definitions Ground Table 1 3 Null modem Cable Connections 1 7 3 CHECKING OPERATION A few seconds after power up the LCD display on the Demo Board should display this brief greeting Peep eft fo The HELLO message should be followed by the display of accumulated energy a Jofojofa The Wh display should be followed by the text Wh shown below Page 11 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN a lejh The decimal dot in the rightmost segment will be blinking indicating activity of the MPU inside the 71M6533 6533H The Demo Code allows cycling of the display using the PB button By briefly pressing this button the next available parameter from Table 1 4 is selected This makes it easy to navigate various displays for Demo Boards without having to use the command line interface CLI Display in Correspon Displayed Parameter left most i ding CLI digit s command Temperature difference from calibration temperature Displayed in 0 1 C Frequency at the VA IN input Hz Accumulated real energy Wh The default display setting after power up or reset Accumulated exported real energy Wh Accum
20. R6 100 2W POWER SUPPLY SELECTION TABLE SELECTION ON BOARD SUPPLY EXT 5Vdc SUPPLY THRU J1 our EXT 5Vdc SUPPLY THRU PS SEL 0 JP1 DEBUG BOARD 14 GND JP15 GND OUT HEADER 8X2 DEBUG CONNECTOR D3 1N4736A 1N4148 VBAT 5Vdc EXT SUPPLY JP13 R101 100 62 R12 UART TX 62 CKTEST TMUXOUT 130 68 1 R2 8 06K R4 25 5K TL431 U6 C4 10uF 6 3V 1206 PACKAGE OFF PAGE INPUTS 01056 01057 01058 CKTEST TMUXO UART_T NEUTRAL gt OFF PAGE OUTPUTS X gt gt GND gt gt UART_RX gt VA_IN L1 Ferrite Bead 6000hm C5 0 1uF VBAT Size Date Figure 4 1 TERIDIAN D6533T14A3 Demo Board Electrical Schematic 1 3 2005 2008 TERIDIAN Semiconductor Corporation TERIDIAN SEMICONDUCTOR CORR V3P3 42 1000 GND Footing holes Wednesday March 26 2008 V1 2 71M6533 71M6533H Demo Board User s Manual R15 R16 R17 220K 220K 220K R26 R27 220K 220K NEUTRAL RV2 VARISTOR R38 R39 R40 220K 220K 220K R46 R47 220K 220K NEUTRAL RV3 VARISTOR R58 R59 R60 220 220 220 866 R67 220K 220K NEUTRAL C15 1000 VOLTAGE GND CONNECTIONS Page 65 of 83 R18 220K R28 220K R41 220K R48 220K R61 220K R68 220K R19 220K R29 220K R42 220K R49 220K R62 220K R69 220K R20 220K R30 12
21. T is equal to 1 fs where fs is the sample frequency 2560 62Hz Set all calibration factors to nominal CAL_IA 16384 CAL_VA 16384 PHADJA 0 Page 39 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN From the voltage measurement we determine that 1 gt Ay 1 We use the other two measurements to determine and Ax IVA 0 4 Ay cos 1 IV cos 0 1 2a Ay Ay COS Q E IV Ay Ay 60 0 AA cos 60 4 IV cos 60 cos 60 Ay Ay cos 60 cos sin 60 0 J cos 60 Ay Ay COS Ayy Ay tan 60 sin I Combining 2a and 3a A E Dtan 60 tan 5 tan __ E 1 tan 60 0 EE and from 2a 1 Now that we know and errors we calculate the new calibration voltage gain coefficient from the previous ones 7 gt Ay AL CAL Vy EY XV We calculate PHADJ from the desired phase lag tan 12 2 20 2 cos 2af T PHADJ 2 1 27 11 27 0 T 1 27 cos 2Zff JT Page 40 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN And we calculate the new calibration current gain coefficient including compensation for a slight gain increase in the phase calibration circuit CAL I 1 mm 27 PHADJ 2 2 PHADJ 2 1 2 cos 2af T 1
22. VAh are not updated and the instantaneous value of IRMS for that element is zeroed 433199 ITHRSHLDA LSB I0SQSUM 27 The default value is equivalent to 0 08A Setting JTHRSHLDA to zero disables creep control Bit 0 Sets VA calculation mode ES 2 CONFIG 0 Vems Arms 1 Bit 1 Clears accumulators for Wh and VAh This bit need not be reset When the voltage exceeds this value bit 5 in the MPU status word is set and the MPU might choose to log a warning Event logs are not implemented in Demo Code 764569660 PK_VTHR LSB 08080 2 The default value is equivalent to 20 above 240Vrms When the current exceeds this value bit 6 in the MPU status word is set and the MPU might choose to log a warning Event logs are not implemented in Demo Code 275652520 PK_ITHR LSB IOSQSUM 2 The default value is equivalent to 20 above 0x04 Oo Y CAL DEGO RTC adjust 100ppb Read only at reset in demo code 0x05 Y CAL DEGI RTC adjust linear by temperature 10ppb AT in 0 1 Provided for optional code RTC adjust squared by temperature 1ppb AT in 0 1 C 0 Y CAL 2 Provided for optional code Page 31 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN XRAM Word Default EM een Name Name Demon 000000000000 This address contains a number that points to the selected pulse 0x07 PULSEW SRC source for the Wh output Selectable pu
23. be modified to display averaged voltage and current values aS opposed to momentary values Also automated calibration equipment can communicate with the Demo Boards via the serial interface and extract voltage and current readings This is possible even with the unmodified Demo Code Complete calibration procedures are given in section 2 2 of this manual Regardless of the calibration procedure used parameters calibration factors will result that will have to be applied to the 71M6533 6533H chip in order to make the chip apply the modified gains and phase shifts necessary for accurate operation Table 1 5 shows the names of the calibration factors their function and their location in the CE RAM Again the command line interface can be used to store the calibration factors in their respective CE RAM addresses For example the command gt 10 16302 stores the decimal value 16302 in the CE RAM location controlling the gain of the current channel CAL IA for phase A The command gt 11 4005 stores the hexadecimal value 0x4005 decimal 16389 in the CE RAM location controlling the gain of the voltage channel for phase A CAL_VA Constant Description Adjusts the gain of the voltage channels 16384 is the typical value The gain is directly proportional to the CAL parameter Allowed range is 0 to 32767 If the gain is 1 slow CAL should be increased 1 Adjusts the gain of the current channels 16384 is the typical val
24. demo board with no live AC voltage connected and to connect live AC voltages only after the user is familiar with the demo system All input signals referenced to 3 3V power supply chip ex 9 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 DEMONSTRATION METER External Current J TERIDIAN Transformers DIO6 WPULSE O wh IDP O V3P3SYS INEUTRAL 5 IDN PIOBXPULSE jap PIOTIRPULSE 2 IA 5 V3P3SYS IAN DIO9 YPULSE O IBP IB IBN 3 3V LCD M ICN DIO4 V3P3A 0105 lt RR V3P3SYS 6533 ICE Connector VAo E Single Chip D VB Meter DEBUG BOARD OPTIONAL 0 MPU HEARTBEAT 5 2 01056 gt AAA v5 DBG NEUTRAL 1 1211 2 CE HEARTBEAT 1 2 gt ES DIO57 OHO V5 DBG 1 540 GND 01058 oto pero s V5_DBG 10 sv Dc TX gt gt T INTERFACE cme 5 RX 12 oL lae PTO O
25. derivative of voltage to the sensor output This effect is compensated by the voltage coupling calibration coefficients As with the CT procedure the calibration procedure for Rogowski sensors uses the meter s display to calibrate the voltage path and the pulse outputs to perform the remaining energy calibrations The calibration procedure must be done to each phase separately making sure that the pulse generator is driven by the accumulated real energy for just that phase In other words the pulse generator input should be set to WhA WhB or WhC depending on the phase being calibrated In preparation of the calibration all calibration parameters are set to their default values VMAX and IMAX are set to reflect the system design parameters WRATE and SLOW PULSE FAST are adjusted to obtain the desired Kh Page 44 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 2 2 4 J TERIDIAN Step 1 Basic Calibration After making sure VFEED_A VFEED_B and VFEED_C are zero perform either the three measurement procedure 2 2 1 or the five measurement calibration procedure 2 2 2 described in the CT section Perform the procedure at a current large enough that energy readings are immune from voltage coupling effects The one exception to the CT procedure is the equation for PHADJ after the phase error os has been calculated use the PHADJ equation shown below Note that the default value of PHADJ is not zero but rather
26. inverse consumed through element 1 VARhi Total VAR hours consumed through element 1 B Total VAR hours generated inverse consumed through element 1 Total VAR hours generated inverse consumed through element 2 Table 1 11 MPU Accumulation Output Variables i e h Total Watt hours consumed through element 1 C Page 37 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 1 10 3 USEFUL CLI COMMANDS INVOLVING THE MPU AND CE Table 1 12 shows a few essential commands involving data memory Clears the accumulators for Wh VARh and VAh by setting bit 1 of the CONFIG register disable emulator programmer access to the 71M6533 Re enables the emulator clock by clearing bit 5 in RAM address 0x05 NM Stores the current CE RAM variables to flash memory The variables stored in flash memory JU will be applied by the MPU at the next reset or power up if no valid data is available from the EEPROM Table 1 12 CLI Commands for Data Memory Page 38 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 2 J TERIDIAN APPLICATION INFORMATION 2 1 CALIBRATION THEORY 2 1 1 A typical meter has phase and gain errors as shown by ds and Axy in Figure 2 1 Following the typical meter convention of current phase being in the lag direction the small amount of phase lead in a typical current sensor is represented as s The errors shown in Figure 2 1 represent the sum of all gain and phase e
27. the new values determined by the auto calibration procedure These values can be stored in EEPROM by issuing the CLS command Tip Current transformers of a given type usually have very similar phase angle for identical operating conditions If the phase angle is accurately determined for one current transformer the corresponding phase adjustment coefficient PHADJ X can be entered for all calibrated units 1 9 6 LOADING THE CODE FOR THE 6533 INTO THE DEMO BOARD Hardware Interface for Programming The 71M6533 6533H IC provides an interface for loading code into the internal flash memory This interface consists of the following signals E RXTX data E TCLK clock E RST reset ICE E ICE enable These signals along with V3P3D and GND are available on the emulator headers J14 and J17 Production meters may be equipped with simple programming connectors such as the 6x1 header used for J17 Programming of the flash memory requires a specific in circuit emulator the ADM51 by Signum Systems http www signumsystems com or the Flash Programmer TFP 2 provided by TERIDIAN Semiconductor Chips may also be programmed before they are soldered to the board The TGP1 gang programmer suitable for high volume production is available from TERIDIAN It must be equipped with LQFP 100 sockets In Circuit Emulator If firmware exists in the 71M6533 6533H flash memory it has to be erased before loading a new file into memory Figure 1 7 and Figure
28. 005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 1 8 4 ADJUSTING THE DEMO BOARDS TO DIFFERENT CURRENT TRANS FORMERS The Demo Board is prepared for use with 2000 1 current transformers CTs This means that for the unmodified Demo Board 208A on the primary side at 2000 1 ratio result in 104mA on the secondary side causing 177mV at the 1 70 resistor pairs R24 R25 R36 R37 R56 R57 2 x 3 4Q in parallel In general when IMAX is applied to the primary side of the CT the voltage Vin at the IA IB or IC input of the 71M6533 IC is determined by the following formula Vin R I R IMAXIN where N transformer winding ratio R resistor on the secondary side If for example IMAX 208A are applied to a CT with a 2500 1 ratio only 83 2mA will be generated on the se side causing only 141mV The steps required to adapt 1 6533 Demo Board to a transformer with a winding ratio of 2500 1 are outlined below 1 The formula 177mV IMAX N is applied to calculate the new resistor R We calculate Rx to 2 1150 2 Changing the resistors R24 R25 R106 R107 to a combined resistance of 2 115Q for each pair will cause the desired voltage drop of 177mV appearing at the IA IB or IC inputs of the 71M6533 IC 3 WRATE should be adjusted to achieve the desired Kh factor as described in 1 8 3 Simply scaling is not recommended since peak voltages at the 71M6533 inputs should always be in the range o
29. 0K R43 220K R50 120K R63 220K R70 120K TERIDIAN SEMICONDUCTOR CORP 750 R14 GND R21 C44 220K NC V3P3 R54 750 0 Ferrite Bead 6000hm Ferrite Bead 6000hm 750 R31 L13 14 R132 V3P3 VA 2 4 7K Ferrite Bead 6004 R32 VA 9 750 1000 GND R44 R35 220K C47 34 Ferrite Bead 6000hm NC R51 12 VB 2 2 4 7K 1 R52 VB V3P3 750 ee 0 Ferrite Bead 6000hm L10 R138 R37 34 R64 GND CURRENT NG CONNECTIONS 220K C48 V3P3 1206 PACKAGE R57 NC Ferrite Bead 600 R71 L11 TP6 V G2 4 7K 41 40 7 1000 OFF PAGE OFF PAGE OUTPUTS INPUTS VB GND VC IAP V3P3 gt gt gt gt IBN gt gt ICP gt gt IDN VA_IN gt gt NEUTRAL ursday March 27 2008 Figure 4 2 TERIDIAN D6533T14A3 Demo Board Electrical Schematic 2 3 2005 2008 TERIDIAN Semiconductor Corporation V1 2 71M6533 71M6533H Demo Board User s Manual TP1 VBAT TP SEG28 DIO08 C70 1000pF C54 NC BAT MODE C29 close to IC U5 Note Place V2P5 UART_RX 17 109 55 GND Ferrite Bead 6000hm L16 V3P3 R78 VBAT 0 1uF 10 100 GND PULSE OUTPUT R113 5 2 R110 VBAT OD 100 RESET CKTEST OO O lt LO OQ DIO t
30. 1 8 show the emulator software active In order to erase the flash memory the RESET button of the emulator software has to be clicked followed by the ERASE button Once the flash memory is erased the new file can be loaded using the commands File followed by Load The dialog box shown in Figure 1 8 will then appear making it possible to select the file to be loaded by clicking the Browse button Once the file is selected pressing the OK button will load the file into the flash memory of the 71M6533 6533H IC At this point the emulator probe cable can be removed Once the 71M6533 6533H IC is reset using the reset button on the Demo Board the new code starts executing Flash Programmer Module TFP 2 Follow the instructions given in the User Manual for the TFP 2 Page 27 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 28 of 83 Signum Systems Wemu51 ADM51 Emulator test 71M6533 71M6533H Demo Board User s Manual File Edit Yiew Debug Project Options Window Help nx Address e Dec E ADM51 Emulator File Edit View Debug Project Options Window Help Signum Systems Wemu51 Program 1 Address CE53 1 Wolf Hom Demo Boa test File Name Z Meters Firmware Hex Files 5534 6534 demo 27aug07 hex Browse Load options XDATA_1 Address 203E Dec 0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
31. 3 71 6533 3 Phase Energy Meter IC DEMO BOARD USER S MANUAL Page 3 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN Table of Contents 1 GETTING 7 ce 7 1 2 ESD 0185 7 t3 Demo Eee PRETI TII Lm 8 14 Demo Board III 585851 4454 84 40 558 45 516844448 5564 48 8 o 22120 uns 8 L6 Sug dested Equipment not Included u UU u uu 8 17 Demo Board 26 __ _____ _ ______ _ _ 9 1 7 1 816 NET T Tm 11 1 7 2 Cable for Serial Connection Debug 11 EP Checkna ________________ __ ___ 11 1 7 4 Serial Connection 13 18 USMON Demo BOITO uuu uu 14 1 81 Serial Command 15 1 8 2 Using the Demo Board for Energy
32. 71M6533 71M6533H Demo Board User s Manual Page 1 of 83 RIDIAN SEMICONDUCTOR CORP i a xx x Tu RUM va ate 71M6533 71M6533H Demo Board USER S MANUAL F EE gr gt es Papas F L 1 h PTI Ane 4 facies ERE PER 4 4 1 4 4L WC D cn 2 0 SHAD pasa A i gt a 3 ma b ma 1 J 5 9 2008 3 13 V1 2 TERIDIAN Semiconductor Corporation 6440 Oak Canyon Rd Suite 100 Irvine CA 92618 5201 Phone 714 508 8800 Fax 714 508 8878 http www teridian com meter support teridian com 2005 2008 TERIDIAN Semiconductor Corporation J TERIDIAN TERIDIAN Semiconductor Corporation makes no warranty for the use of its products other than expressly contained in the Company s warranty detailed in the TERIDIAN Semiconductor Corporation standard Terms and Conditions The company assumes no responsibility for any errors which may appear in this document reserves the right to change devices or specifications detailed herein at any time without notice and does not make any commitment to update the information contained herein Page 2 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 RIDIAN 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR 71 653
33. 9 23 D DBG 5 21 725 01000 01001 T3IN 79 A V3P 17 ADUMT100 GND ND P K T5IN ND gt TMUXOUT 16 0 1uF ND DART TX RX232 R1OUTBF 71 RXISO v5 DBG ND UART RX R1OUT 150 C21 ND DB ND R2OUT C22 V5 DB V5 DB R3OUT D NC 0 1uF V5 DBG 0 1uF HEADER 8X2 1 VDD2 2 s 2 DIN GND2 UART RX T DEBUG CONNECTOR E ND DBG 4 VDD1 DOUT C23 GND1 GND2 R6 0 1uF 0 ADUM1100 GND_DBG GND_DBG Figure 4 10 Debug Board Electrical Schematic Page 75 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 4 6 DEBUG BOARD PCB LAYOUT Page 76 of 83 CON TOP NORMAL BOT NULL e 5 SET EM 7 1 i 15 JPZ jl NORMAL EE BS NULL tim 1 rr CELLE 8 O 5 Figure 4 12 Debug Board Bottom View 2005 2008 TERIDIAN Semiconductor Corporation J TERIDIAN EXT SUPPLY 10 mn HYTE BLASTER V1 2 71M6533 71M6533H Demo Board User s Manual Page 77 of 83 rg Figure 4 14 Debug Board Middle Layer 1 Ground Plane 9 2005 2008 TERIDIAN Semiconductor Corporation V1 2 71M6533 71M6533H Demo Board User s Manual Figure 4 16 Debug Board Bottom Trace Layer Page 78 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIA
34. B components CTs and 71M6533 6533H tolerances was 3 41 a range that can easily be compensated by calibration Figure 2 15 shows a load line obtained with a 6533 in differential mode As can be seen dynamic ranges of 10 000 1 for current can be achieved with good circuit design layout cabling and of course good current sensors Page 54 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 DIAN 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR CORP WinBoard Meter Testing Serial No 4738 Testing Functions Options Filelaraph Turbo Test Ies e kee oe Exit Alt F4 Cancel StartF 3 44 4 Creep F5 Mod Skip FT View F3 Save F10 Station 1 Tota Saved GJ Model 2300 LOOP MODE Task Sequence 211 Test Az Az Phase Fev Std Service Upper Los Step Found Left Revs Ele volt Amp Angle Power Mode Freq Type Lirit Lii Farm 16 Voltage 240 Amp 30 Test Sec Service ive ABC Reverse Power Start Delay 3 Optics Middle Turtle Option lt O a RR gt Test Complete Figure 2 14 Calibration System Screen Load Line in Differential Mode 0 2 0 15 Error 0 1 0 05 Error 0 01 0 1 1 10 100 1000 Figure 2 15 Load Line in Differential Mode at Room Temperature Page 55 of 83
35. EG50 DIO30 DIO5 SDA when configured as EEPROM interface WPULSE DIO6 VARPULSE 0107 0108 XPULSE 01009 YPULSE when configured as pulse outputs Unused pins must be configured as outputs or tied to V3P3D or GNDD SEG61 DIO41 SEG63 DIO43 SEG65 DIO45 SEG67 DIO47 SEG71 DIO51 SEG3 PCLK SEG4 PSDO SEGS PCSZ SEG6 PSDI RXTX SEG9 E E_RST SEG11 E toe CKTEST SEG19 8 36 Multi use pins configurable as either LCD segment driver or SPI PORT Multi use pins configurable as either emulator port pins when ICE E pulled high or LCD SEG drivers when ICE E tied to GND ICE enable When low E RST E TCLK and E RXTX become LCD segment pins For production units this pin should be pulled to GND to disable the emulator port Multi use pins configurable as either Clock PLL multiplexer control outputs or LCD segment drivers CKTEST can be enabled and disabled by MUXSYNC SEG7 CKOUT TMUXOUT O 4 Digital output test multiplexer Controlled by DMUXT S 0 Page 80 of 83 2005 2008 TERIDIAN Semiconductor Corporation J TERIDIAN Name YP Pine Description 000000000000 Multi use pin configurable as either Optical Receive Input or general DIO When configured as this pin is a regular UART RX pin If this pin Uo 4 is unused it must be configured as an output tied to GNDD Multi use pin configurable as either Optical LED Transmit Output When OP
36. EME CAUTION SHOULD BE TAKEN WHEN HANDLING THE DEMO BOARD ONCE IT IS CONNECTED TO LIVE VOLTAGES Page 7 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 1 3 1 4 1 5 1 6 J TERIDIAN DEMO KIT CONTENTS e Demo Board D6533T14A3 with 71M6533 71M6533H IC and pre loaded demo program e Debug Board Two 5VDC 1 000mA universal wall transformers with 2 5mm plug Switchcraft 712A compatible e Serial cable 089 Male Female 2m length Digi Key AE1020 ND e CD ROM containing documentation data sheet board schematics BOM layout Demo Code sources and executable and utilities The CD ROM contains named readme txt that specifies all files found the media and their purpose DEMO BOARD VERSIONS Currently only the following version of the Demo Board is available e Demo Board D6533T14A3 standard COMPATIBILITY This manual applies to the following hardware and software revisions 71M6533 or 71M6533H chip revision A03 e Demo Kit firmware revision 4 p6b or later e Demo Board D6533T14A3 SUGGESTED EQUIPMENT NOT INCLUDED For functional demonstration Ww MS Windows versions XP ME or 2000 equipped with RS232 port COM port via DB9 connector For software development MPU code e Signum ICE In Circuit Emulator ADM 51 http www signum com Keil 8051 C Compiler kit CA51 http www keil com c51 ca51kit htm http www keil com product sales htm Page
37. IAN SEMICONDUCTOR CORP Port Settings Bits per second Data bits Parity None Stop bits Flow control Restore D efaults Figure 1 4 Port Speed and Handshake Setup left and Port setup right appear Type gt to see the Demo Code help menu Type gt i to verify the demo code revision 1 8 CTs Using the Demo Board involves communicating with the Demo Code via the command line interface CLI The CLI allows all sorts of manipulations to the metering parameters access to the EEPROM initiation of auto cal USING THE DEMO BOARD The 71M6533 6533H Demo Board is a ready to use meter prepared for use with external current transformers sequences selection of the displayed parameters changing calibration factors and many more operations Before evaluating the 71M6533 6533H on the Demo Board users should get familiar with the commands and responses of the CLI A complete description of the CLI is provided in section 1 8 1 2005 2008 TERIDIAN Semiconductor Corporation V1 2 71 6533 71 6533 Demo Board User s Manual SENILONDUGTON CURT 1 8 1 SERIAL COMMAND LANGUAGE The Demo Code residing in the flash memory of the 71M6533 6533H provides a convenient way of examining and modifying key meter parameters Once the Demo Board is connected to a PC or terminal per the instructions given in Section 1 7 2 and 1 7 4 typing will bring u
38. N 4 7 TERIDIAN 71M6533 PIN OUT INFORMATION Power Ground NC Pins meme l i la GNDA P 7 Analog ground This pin should be connected directly to the ground plane GNDD po Digital ground This pin should be connected directly to the ground plane V3P3A 77 Analog power supply A 3 3V power supply should be connected to this pin V3P3A must be the same voltage as V3P3SYS V3P3SYS 90 System 3 3V supply This should be connected to 3 3V power supply Auxiliary voltage output of the chip controlled by the internal 3 3V selection switch V3P3D 7 In mission mode this pin is internally connected to V3P3SYS In BROWNOUT mode it is internally connected to VBAT This pin is floating in LCD and sleep mode Battery backup power and oscillator supply A battery or super capacitor is to be VBAT connected between VBAT no battery is used connect VBAT to V3P3SYS Output of the internal 2 5V regulator A 0 1uF capacitor to GNDA should be V2P5 connected to this pin Table 4 3 71M6533 71M6533H Pin Description Table 1 3 Analog Pins Differential Line Current Sense Inputs These pins are voltage inputs to the internal IBP IBN A D converter Typically they are connected to the outputs of current sensors ICP ICN Unused pins must be tied to V3P3A IDP IDN are additional Line Current Sense IDP IDN Input pins Line Voltage Sense Inputs These pins are voltage
39. N C31 vHx20000000000 gt 22 GND SMEELESRASSSRRRR 20 20 609 16 9 190 1000pF C45 DD 0 102 o jo gt GND U5 0 1uF Lo 4 0 lt V1 ON co R106 Bi tij lt 56 28448884 8 s pap 20 ND GOP ODOR gt XX Y c 5K 83585006280 5 21 il O O mt O S SEG71 DI051 SEG15 R86 5 SEG14 20 0K 1 100pF a 804 Note Place 9 9 o 5 13 C24 C25 Y1 GND ait g Note Place c3 etose to T GND mid SEG33 DIO13 05 SEG45 DIO25 24 close to SEG46 DIO26 05 SEG47 DIO27 6533 100TQFP SEG65 DIO45 yi SEGO7 MUX SYNC 25 DIO1 OPT_RX SEG50 DIO30 GND XOUT GNDD SEG6 PSDI XIN SEG36 DIO16 TEST SEG49 DIO29 OPTICAL XOUT SEG64 DIO44 NC SEG35 DIO15 PB SEG34 DIO14 C80 SEG11 E RST SEGO2 1000pF SEG61 DIO41 SEGO1 SEG10 E TCLK 5 00 gt o 09 o O ep ONES xxx UR d 120201008 0 Ri R111 52 Coso Sina ESSS TS 8885 882538058504 5528556 C18 C53 VBAT TP E 10K 100pF 0 1uF 10K RREK GND TP13 z
40. P6 JP7 JPB JP16 JP19 JP20 DE 6 6 1206 311680 RCIZ0FR 0768ROL Yageo x 889 OC SY Ras 1 11 14 T 71 2 5 F24F25 R36 R37 R56 R57 34 86798 3T 340FRCT ND RCTZOGFROTSR40L Yago Di RR j _______ YY SY 745 R7AR76 REO RI03R104R105 10 805 PIOKACTND _ERJ 6GEYJ103V Panasonic Di fo met ______ 6 2 Roos PODACEND ERIGGEVOROOV Panasonic Par RT o N RSS J T T RES 0 1206 POGECEND _ERJ 8GEYOROOV Panasonic DS 1 swsw EVG PJxosM Panasonic _ 4 0 50 Keystone 3 ooo BAVSSDW 501568 BAVOSDW FDICEND _BAVoODW 7 F DIODES 508 AT24C256BN 10SU 1 8 ND_ 24 256 1050 18 Oo TERIDIAN DOS 16149 100 154851 Yamaichi ref tf vi ECS SZ742537X3R ES e e nine rn Table 4 1 D6533T14A3 Demo Board Bill of Material Page 67 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 estas 71M6533 71M6533H Demo Board User s Manual SENIGONDUGTON CORT 4 3 71M6533 DEMO BOARD PCB LAYOUT Oy T
41. RESET C E tun IN a ur Vh DPT TE GUT ENT Em z 9 cul END TO gt EN H TELE Sl R Ropas vt a wer x ICE il 1 1003 8 END E VAAT H a is E E EES i om in TPB 225S 22 E Srm CONDUCTOR 12 s s s s s s 65935 41 DEMO BOARD a REVI 3 0 8 Figure 4 4 TERIDIAN D6533T14A3 Demo Board View Page 68 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 71M6533 71M6533H Demo Board User s Manual esje seseo Figure 4 5 TERIDIAN D6533T14A3 Demo Board Top Copper Page 69 of 83 2005 2008 TERIDIAN Semiconductor Corporation 71M6533 71M6533H Demo Board User s Manual ia 1 29 rt Page 70 of 83 Y x m x unt Figure 4 6 TERIDIAN D6533T14A3 Demo Board Middle Layer 1 Ground Plane 2005 2008 TERIDIAN Semiconductor Corporation g ATERIDIAN 4 20060000006 000000 6 a Figure 4 7 TERIDIAN D6533T14A3 Demo Board Middle Layer 2 Supply Plane 71 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 71M6533 71M6533H Demo Board User
42. RIDIAN D6533T14A3 Demo Board Middle Layer 1 Ground Plane 70 5 0183 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN Figure 4 7 TERIDIAN D6533T14A3 Demo Board Middle Layer 2 Supply Plane 71 Figure 4 7 TERIDIAN D6533T14A3 Demo Board Bottom 72 Figure 4 9 TERIDIAN D6533T14A3 Demo Board Bottom 73 Figure 4 9 Debug Board Electrical 5 75 Figure 4 10 Debug Board Top 76 Figure 4 11 Debug Board Bottom 9 76 Figure 4 12 Debug Board Top Signal 77 Figure 4 13 Debug Board Middle Layer 1 Ground 77 Figure 4 14 Debug Board Middle Layer 2 Supply 78 Figure 4 15 Debug Board Bottom Trace 78 Figure 4 16 TERIDIAN 7 1 6533 7 1 6533 epLQFP100 Pinout top 82 List of Tables Table 1 1 Jumper settings on Debug 11 Table 1 2 Straight cable connections 11 Table 1 3 Null modem cable cera e nenne 11 Table 1 4
43. Status Indicates that all elements are in creep mode The CE s pulse variables will CREEP be jammed with a constant value on every accumulation interval to prevent spurious pulses Note that creep mode therefore halts pulsing even when the CE s pulse mode is internal Element C has a voltage below VThrshld This forces that element into A push button press was recorded at the most recent reset or wake from a PB PRESS battery mode SPURIOUS An unexpected interrupt was detected EAR T Element A has a voltage below VThrshld This forces that element into creep mode It also forces the frequency and main edge count to zero 0 real meter this could indicate Amora ral rc is over IThrshld In a real meter this could is over IThrshld In real meter this could The temperature is below the minimum 40C established in option gbl h This is not very accurate in the demo code because the calibration 14 MINT temperature is usually poorly controlled and the default temp_nom is usually many degrees off 40C is the minimum recommended operating temperature of the chip The temperature is above the maximum 85C established in option gbl h This is not very accurate in the demo code because the calibration 15 MAXT temperature is usually poorly controlled and the default temp nom is usually many degrees off 85C is the maximum recommended operating temperature of the
44. Sullins Panasonic Panasonic N A Panasonic Panasonic Keystone MAXIM Keystone Building Fasteners Building Fasteners Building Fasteners 2005 2008 TERIDIAN Semiconductor Corporation d jTERIDIAN Vendor Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key N A Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Vendor P N 445 1349 1 ND 478 1687 1 ND 478 1673 1 ND 160 1414 1 ND 51011 36 SC1152 ND 2100 54208 P10KACT ND P1 0KACT ND N A PO OACT ND P8051SCT ND 9011K ND ADUM1100AR ND MAX3237CAI ND 2202K ND H342 ND H343 ND H216 ND TERIDIAN SEMICONDUCTOR CORP 71M6533 71M6533H Demo Board User s Manual 4 5 DEBUG BOARD SCHEMATICS V5 DBG C1 VDD1 VDD2 DIN GND2 10K VDD1 DOUT SW2 m GND1 GND2 5Vdc EXT SUPPLY V5_DBG 5 DISPLAY SEL J1 TP TP C3 GND DBG 0 1uF GND DBG E Gr 6 V5_DBG RAPC712 C5 0 1 R2 D2 DB9_RS232 01001 V5 DBG 0 1uF 5 C11 9 JP1 10uF 16V B Case 4 HDR2X1 V5 DBG 8 aba 3 RXPC oo 7 NORMAL ot 2 TXPC GND_DBG 6 4 0 1uF HDR2X1 T RS232 TRANSCEIVER MAX3237CAI GND DBG C14 232VP1 27 28 232 1 1 C15 0 1uF V5_DBG 25 232C1M1 C19 232VN1 4 1 232C2P1 C18 0 1uF STATUS LEDs 0 14 3 232 2 1 GND_DBG 8 62 GND DBG 7 TX232 TXISO 44
45. T TX DIO2 3 configured this pin is capable of directly driving an LED for transmitting data in an IR serial interface Chip reset This input pin is used to reset the chip into a known state For RESET 74 normal operation this pin is pulled low To reset the chip this pin should pulled high This pin has an internal nominal current source pull down No external reset circuitry is necessary UART input If this pin is unused it must be configured as an output or tied to V3P3D or GNDD O e TEST EMEN Enables Production Test This pin must be grounded in normal operation Push button input Should be at GND when not active A rising edge sets 97 the PB flag It also causes the part to wake up if it is in SLEEP or LCD mode PB does not have an internal pull up or pull down resistor Table 4 5 71M6533 71M6533H Pin Description Table 3 3 Pin types P Power Output Input Input Output Page 81 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 GNDD SEG9E RXTX DIO2 OPT TX TMUXOUT TX SEG3 PCLK V3P3D SEG19 CKTEST V3P3SYS SEG4 PSDO SEG5 PCSZ SEG37 DIO17 SEG38 DIO18 MTX 01056 01057 01058 0103 2 COM3 5 67 01047 SEG68 DIO48 SEG69 DIO49 SEG70 DIO50 N O a Q N cups x 00 PIOS E Or EL OF uv lt 2 2 1021420 202 lt mO G Z Gas Se lt
46. able 4 5 71M6533 71M6533H Pin Description Table 33 81 Page 6 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 1 GETTING STARTED 1 1 GENERAL The TERIDIAN Semiconductor Corporation TSC D6533T14A3 Demo Board is a demonstration board for evaluating the 71M6533 71M6533H device for 3 phase electronic power metering applications It incorporates a 71M6533 or 71M6533H integrated circuit peripheral circuitry such as a serial EEPROM emulator port and on board power supply as well as a companion Debug Board that allows a connection to a PC through a RS232 port The Demo Board allows the evaluation of the 71M6533 or 71M6533H energy meter chip for measurement accuracy and overall system use The board is pre programmed with a Demo Program in the FLASH memory of the 71M6533 6533H IC This em bedded application is developed to exercise all low level function calls to directly manage the peripherals flash programming and CPU clock timing power savings The 71M6533 6533H IC on the Demo Board is pre programmed with default calibration factors Since current sensors are not part of the Demo Kit the Demo Board is tested but not calibrated at the factory 1 2 SAFETY AND ESD NOTES Connecting live voltages to the demo board system will result in potentially hazardous voltages on the demo board THE DEMO SYSTEM IS ESD SENSITIVE ESD PRECAUTIONS SHOULD BE TAKEN WHEN HANDLING THE DEMO BOARD EXTR
47. actors CAL_In CAL_Vn and PHADJ_n in the EEPROM memory of the meter If a Demo Board is calibrated the methods involving the command line interface shown in sections 1 9 3 and 1 9 4 can be used 8 Repeat the steps 1 through 7 for each phase 9 For added temperature compensation read the value TEMP_RAW CE RAM and write it to TEMP_NOM CE If Demo Code 4 6n or later is used this will automatically calculate the correction coefficients PPMC and PPMC2 from the nominal temperature and from the characterization data contained in the on chip fuses Tip Step 2 and the energy measurement at 0 of step 3 can be combined into one step 2 2 3 CALIBRATION PROCEDURE FOR ROGOWSKI COIL SENSORS Demo Code containing CE code that is compatible with Rogowski coils is available from TERIDIAN Semi conductor Rogowski coils generate a signal that is the derivative of the current The CE code implemented in the Rogowski CE image digitally compensates for this effect and has the usual gain and phase calibration adjustments Additionally calibration adjustments are provided to eliminate voltage coupling from the sensor input Current sensors built from Rogowski coils have a relatively high output impedance that is susceptible to capacitive coupling from the large voltages present in the meter The most dominant coupling is usually capacitance between the primary of the coil and the coil s output This coupling adds a component proportional to the
48. anding the IC and its peripherals 2 5 1 FUNCTIONAL METER TEST This is the test that every Demo Board has to pass before being integrated into a Demo Kit Before going into the functional meter test the Demo Board has already passed a series of bench top tests but the functional meter test is the first test that applies realistic high voltages and current signals from current transformers to the Demo Board Figure 2 13 shows a meter connected to a typical calibration system The calibrator supplies calibrated voltage and current signals to the meter It should be noted that the current flows through the CT or CTs that are not part of the Demo Board The Demo Board rather receives the voltage output signals from the CT An optical pickup senses the pulses emitted by the meter and reports them to the calibrator Some calibration systems have electrical pickups The calibrator measures the time between the pulses and compares it to the expected time based on the meter Kh and the applied power Optical Pickup for Pulses Calibrator Figure 2 13 Meter with Calibration System TERIDIAN Demo Boards are not calibrated prior to shipping However the Demo Board pulse outputs are tested and compared to the expected pulse output rate Figure 2 14 shows the screen on the controlling PC for a typical Demo Board The error numbers are given in percent This means that for the measured Demo Board the sum of all errors resulting from tolerances of PC
49. ause a reset if the watchdog timer is enabled Page 21 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN Commands for Controlling the Metering Values Shown on the LCD Display METER DISPLAY Comment CONTROL LCD Allows user to select internal variables to be displayed Command M Wh Total Consumption display wraps around at 999 999 combinations say wens curd a _ Temperature delta from nominal wo Pme _ _____ Wh Tota Consumption wraps around at 908909 ______ Wi Tod inverse Consumption lay waps aroun at 56660 Consumption play wans around st 68 500 VAR Tota verse Consumption sly wes round 68889 7 DO 000 Van Tota ly ws round at 99988 Do ue A 0 wes 0 2 0 DO rst count tor Rese wit CPC command 72 ott cout for VAR pulses Rest wih GPC command usem Displays for total consumption wrap around at 999 999Wh VAh due to the limited number of available display digits Internal registers counters of the Demo Code are 64 bits wide and do not wrap around When entering the phase parameter use 1 for phase 2 for phase B 3 for phase and 0 or blank for all phases
50. bration with Three 5 nn snnt sine 39 2 1 2 Calibration with Five 41 22 5 42 2 2 1 Calibration Procedure with Three Measurements 43 2 2 2 Calibration Procedure with Five 44 2 2 3 Calibration Procedure for Rogowski Coil Sensors 44 2 2 4 gt 817 1 911 CAIS TTE ee eee 45 2 2 5 Compensating for 49 23 JPoWerSaving 50 24 Schematic ANON E EE ER 51 2 4 1 CoOrmmponenis for the VT Pin u u uu 51 2 4 2 P E O EE RN ERC RR 51 243 Oscilator 52 244 EEPROM 506 4504 ___________ _____ ___ 52 53 2 4 6 a E NER _____ ________ 53 Page 4 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 2 5 Testing l
51. chip Page 35 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 TERIDIAN DESCRIPTION Status Word Bit 16 BATTERY_BAD Just after midnight the demo code sets this bit if VBat lt VBatMin The read is infrequent to reduce battery loading to very low values When the battery voltage is being displayed the read occurs every second for up to 20 seconds CLOCK_TAMPER Clock set to a new value more than two hours from the previous value Set after reset when the read of the calibration data has a bad longitudinal EDU redundancy check or read failure Set when the clock s current reading is A More than a year after the 19 CLOCK UNSET previously saved reading or B Earlier than the previously saved reading or C There is no previously saved reading Set after reset when the read of the power register data has a bad longitudinal redundancy check or read failure in both copies Two copies are used because a power failure can occur while one of the copies is being updated GNDNEUTRAL Indicates that a grounded neutral was detected TAMPER Tamper was detected 17 SOFTWARE A software defect was detected Element A has a sag condition This bit is set in real time by the CE and detected by the ce_busy interrupt ce_busy_isr in ce c within 8 sample 25 SAGA intervals about 2 6ms A transition from normal operation to SAGA causes the power registers to be saved because the demo PCB is powered from element
52. culate the new calibration voltage gain coefficient from the previous ones CAL V CAL 2 XV We calculate PHADJ from the desired phase lag PHADJ 228886 0 27 20 2 cos 2f T 1 2 sin 2zf T tan T 1 2 2 And we calculate the new calibration current gain coefficient including compensation for a slight gain increase in the phase calibration circuit CAL OU A 27 2 27 PHADJ 2 1 2 cos 2af T 1 2 1 2 cosQaf T 1 2 XI 2 2 CALIBRATION PROCEDURES Calibration requires that a calibration system is used i e equipment that applies accurate voltage load current and load angle to the unit being calibrated while measuring the response from the unit being calibrated in a repeatable way By repeatable we mean that the calibration system is synchronized to the meter being calibrated Best results are achieved when the first pulse from the meter opens the measurement window of the calibration system This mode of operation is opposed to a calibrator that opens the measurement window at random time and that therefore may or may not catch certain pulses emitted by the meter It is essential for a valid meter calibration to have the voltage stabilized a few seconds before the current is applied This enables the Demo Code to initialize the 71M6533 6533H and to stabilize the PLLs and filters in the CE This method of operation is consistent with
53. currents of 10A and above the noise becomes dominant at small currents The value to be used for QUANT can be determined by the following formula error V l QUANT O VMAX IMAX LSB Where error observed error at a given voltage V and current 1 VMAX voltage scaling factor as described in section 1 8 3 IMAX current scaling factor as described in section 1 8 3 LSB QUANT LSB value 7 4162 10 Example Assuming an observed error as in Figure 2 6 we determine the error at 1A to be 1 If VMAX is 600V and IMAX 208A and if the measurement was taken at 240V we determine QUANT as follows I 240 1 QUANT OO 11339 600 208 7 4162 107 QUANT is to be written to the CE location 0x2F It does not matter which current value is chosen as long as the corresponding error value is significant 5 error at 0 2A used in the above equation will produce the same result for QUANT Input noise and truncation can cause similar errors in the VAR calculation that can be eliminated using the QUANT VAR variable QUANT VAR is determined using the same formula as QUANT Page 49 of 83 O 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 2 3 POWER SAVING MEASURES In many cases especially when operating the TERIDIAN 71M6533 71M6533H from a battery it is desirable to reduce the power consumed by the chip to a minimum This can be achieved with the measures listed in Table 2 1 patie ssio
54. e Calibration 5 60E 04 old PHADJ Old CAL Ix Error 60 Error 60 0 Error 180 Phase Error 0 054731910 1647659 0 1533716 PHADJ CAL Ix 17005 641 16981 934 17208 457 Step 4 Crosstalk Calibration Equalize Gain for 0 and 180 VRMS 240 IRMS 0 30 Old VFEEDx 90 Error Odeg Error 180deg VFEEDx 1 Rogowski coils have significant crosstalk from voltage to current This contributes to gain and phase errors 2 Therefore before calibrating a Rogowski meter a quick 0 load line should be run to determine at what current the crosstalk contributes at least 196 error 3 Crosstalk calibration should be performed at this current or lower 4 If crosstalk contributes an EO error at current Ix there will be a 0 1 error in E60 at 15 Ix Figure 2 5 Calibration Spreadsheet for Rogowski coil Page 48 of 83 2005 2008 TERIDIAN Semiconductor Corporation JTERIDIAN J TERIDIAN 2 2 5 COMPENSATING FOR NON LINEARITIES Nonlinearity is most noticeable at low currents as shown in Figure 2 6 and can result from input noise and truncation Nonlinearities can be eliminated using the QUANT variable lt gt NO O Oo 22 5 gt NO O Figure 2 6 Non Linearity Caused by Quantification Noise The error can be seen as the presence of a virtual constant noise current While 10mA hardly contribute any error at
55. ed and flow control are configured under the General tab Figure 1 4 left bit settings are configured by pressing the Configure button Figure 1 4 right as shown below A setup file file name Demo Board Connection ht for HyperTerminal that be loaded with File gt Open is also provided with the tools and utilities Port parameters can only be adjusted when the connection is not active The disconnect button as shown Figure 1 3 must be clicked order to disconnect the port Demo Board Connection Hyper Terminal Edit Transfer Help Flow Control method Meter Display Select Wh Consumption for all 11 TSC6513H 03 04 04 21 2005 Connected 0 02 05 AST Vy 9600 8 1 Figure 1 3 Hyperterminal Sample Window with Disconnect Button Arrow Page 13 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 14 0183 General Advanced Call preferences perator assisted manual dial Disconnect a call if idle for more than 20 mins Cancel the call if not connected within 50 Data Connection Preferences Port speed s Data Protocol StandadEC Compression Disabled Flow control Mon off r Once the connection to the demo board is established press lt CR gt and the command prompt gt should SEM D
56. element B IOSQSUM 26 VARISUM I Imported reactive energy on element C 9 HSOSUM 0 Sum of exported real energy 14 V2SOSUM 32 VAROSUM_E Exported reactive energy on element A 15 VASUM 33 VARISUM E Exported reactive energy on element B VAOSUM VAR2SUM E Exported reactive energy on element C ER Table 1 8 Selectable Pulse Sources Page 33 of 83 O 2005 2008 TERIDIAN Semiconductor Corporation V1 2 oy LEA S 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR CORP MPU INSTANTANEOUS OUTPUT VARIABLES The Demo Code processes CE outputs after each accumulation interval It calculates instantaneous values such as VRMS IRMS W and as well as accumulated values such as Wh VARh and VAh Table 1 9 lists the calculated instantaneous values 0x24 Vims from element 0 1 2 0x26 2 16 LSB J VxSQSUM 2 0x25 0x27 0x29 LSB JIxXSQSUM 2 Deviation from Calibration reference temperature 0x20 Delta T 0 LSB 0 1 Frequency of voltage selected by input If the selected voltage is below the sag threshold Frequency 0 LSB Hz Table 1 9 MPU Instantaneous Output Variables from element 0 1 2 or neutral Page 34 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN MPU STATUS WORD The MPU maintains the status of certain meter and 1 0 related variables the Status Word The Status Word is located at address 0x21 The bit assignments are listed in Table 1 10
57. f O through 250mV equivalent to 177mV rms If a CT with a much lower winding ratio than 1 2 000 is used higher secondary currents will result causing excessive voltages at the 71M6533 inputs Conversely CTs with much higher ratio will tend to decrease the useable signal voltage range at the 71M6533 inputs and may thus decrease resolution 1 8 5 ADJUSTING THE DEMO BOARDS TO DIFFERENT VOLTAGE DIVIDERS The 71M6533 Demo Board comes equipped with its own network of resistor dividers for voltage measurement mounted on the PCB The resistor values for the D6533T14A3 Demo Board are 2 5477MQ R15 R21 R26 R31 combined and 750Q R32 resulting in a ratio of 1 3 393 933 This means that VMAX equals 176 8mV 3 393 933 600V A large value for VMAX has been selected in order to have headroom for overvoltages This choice need not be of concern since the ADC in the 71M6533 has enough resolution even when operating at 120Vrms or 240Vrms If a different set of voltage dividers or an external voltage transformer potential transformer is to be used scaling techniques similar to those applied for the current transformer should be used In the following example we assume that the line voltage is not applied to the resistor divider for VA formed by R15 R21 R26 R31 and R32 but to a voltage transformer with a ratio N of 20 1 followed by a simple resistor divider We also assume that we want to maintain the value for VMAX at 600V to provide headroom for la
58. g software see Figure 2 8 For a production meter the RESET pin should be pulled down hard to GNDD VBAT V3P3D R V3P3D 1 71 6533 1 Reset Switch Figure 2 8 External Components for RESETZ Page 51 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 2 4 3 OSCILLATOR The oscillator of the 71M6533 drives a standard 32 768kHz watch crystal see Figure 2 9 Crystals of this type are accurate and do not require a high current oscillator circuit The oscillator in the 71M6533 has been designed specifically to handle watch crystals and is compatible with their high impedance and limited power handling capability The oscillator power dissipation is very low to maximize the lifetime of any battery backup device attached to the VBAT pin 71M6533 d 33pF XIN crystal L 15pF Figure 2 9 Oscillator Circuit It is not necessary to place an external resistor across crystal 2 2 44 should be connected to the pins 0104 and DIOS see Figure 2 10 These pins be switched from regular DIO to implement an I2C interface by setting the I O RAM register DIO EEX 0x2008 4 to 1 Pull up resistors of 3 must be provided for both the SCL and SDA signals V3P3D 71M6533 10 004 DIOS Figure 2 10 EEPROM Circuit Page 52 of 83 2005 2008 TERIDIAN Semiconductor Corporat
59. gramming the flash memory or emulation using the ADM51 In Circuit Emulator can only E be done when a jumper is plugged in at TP10 between V1 and Conversely removing the jumper at TP10 will enable the hardware watchdog timer LCD Various tests of the LCD interface can be performed with the Demo Board using the serial command line interface CLI Page 56 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 oy LEA S 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR CORP Setting the LCD EN register to 1 enables the display outputs Register Name Address bits R W Description LCD EN 2021151 RAW Enables the LCD display When disabled VLC2 VLC1 and VLCO are ground as are the COM and SEG outputs To access the LCD EN register we apply the following commands gt 21 Reads the hex value of register 0 2021 gt 25 Response from Demo Code indicating the bit 5 is set gt 21 5 Writes hex value 0x05 to register 0 2021 causing display to be switched gt RI21 25 Sets the LCD_EN register back to normal The 71M6533 6533H provides a charge pump capable of boosting the 3 3VDC supply voltage up to 5 0VDC The boost circuit is enabled with the LCD_BSTEN register The 6533 Demo Boards have the boost circuit enabled by default Register Na ass bits R W Description 2020171 Enables the LCD voltage boost circuit To disable the LCD voltage boost circuit we apply the following CLI c
60. green fields labeled CAL The default values 3973 for PHADJ x are entered in the yellow fields of step 3 If the calibration factors for the current are not at default their values are entered in the fields labeled CAL The errors of the energy measurements at 0 60 60 and 180 are entered in the yellow fields labeled 96 Error The spreadsheet will then display phase error the current calibration factor and the PHADJ x factor in the green fields one for each phase If a crosstalk measurement is necessary it should be performed at a low current where the effects of crosstalk are noticeable First if old values for VFEEDx exist in the meter they are entered in the spreadsheet in the row labeled Old VFEEDx one for each phase If these factors are zero 0 is entered for each phase Test current and test voltage are entered in the yellow fields labeled VRMS and IRMS The crosstalk measurement is now conducted at a low current with phase angles of 0 and 180 and the percentage errors are entered in the yellow fields labeled 96 error 0 deg and error 180 deg one pair of values for each phase The resulting VFEEDx factors are then displayed in the green fields labeled VFEEDx 2005 2008 TERIDIAN Semiconductor Corporation V1 2 SEMICONDUCTOR CORP Enter values in yellow fields AC frequency me 50 click on yellow field to select from pull down list PHASE A Ener
61. gy reading at 0 Energy reading at 60 Voltage error at 0 Expected voltage Measured voltage PHASE B Energy reading at 0 Energy reading at 60 Voltage error at 0 Expected voltage Measured voltage PHASE C Energy reading at 0 Energy reading at 60 Voltage error at 0 Expected Measured fraction fraction fraction s E 0 038 0 09 240 230 88 Results will show in green fields CAL IA 16384 16384 CAL VA 16384 16384 PHADJ A 0 CAL IB 16384 16384 CAL VB 16384 14895 PHADJ B 0 16384 16384 16409 17031 9597 CAL IC CAL VC PHADJ JTERIDIAN REV Date Author 4 2 10 25 2005 WJH Positive direction _ Generating Energy Current lags voltage inductive 60 Current 60 Current leads voltage capacitive Df Voltage Readings Enter 0 if the error is 0 enter 3 if meter runs 3 slow Figure 2 3 Calibration Spreadsheet for Three Measurements SEMICONDUCTOR CORP AC frequency mm 50 click on yellow field to select from down Energy reading at 0 Energy reading at 60 Energy reading at 60 Energy reading at 180 Voltage error at 0 Expected voltage V 240 2424 old 16384 16384 new 16220 16222 371 CAL IA CAL VA PHADJ A Measured voltage V muse Energy reading at 0 Energy reading at 60 Energ
62. he Demo m 54 2 5 1 Functional 54 56 220 56 2 5 4 Hardware Watchdog 2 56 Poco 8 5 u DD PERDER 56 26 TERIDIAN Application NOIGBS u cost 58 3 HARDWARE DESCRIPTION uada Du ana itu 2 2 59 3 1 D6533T14A3 Board Description Jumpers Switches and Test 2 1 59 42 Board Hardware Specifications U LIU LLULLU MM Cr sasa 62 4 APPENDIX P 63 41 71M6533 Demo Board Electrical Schematic J U eee eene nennen naa nana anne anas anas nnns 64 42 7116533 Demo Board Bill of Matl rial 67 43 71 6533 Demo Board PCB Layout U aaa sassa 68 A4 Debug Board ll l s l il l l iii l a M 74 45 Debug Board u uuu l l lll l l l l il
63. ing the RTC REAL TIM CONTRO Allows the user to read and set the real time clock Command RTDy m d w Day of week year month day weekday 1 Sunday If the weekday is combinations omitted it is set automatically RTTh m s Time of day hr min sec RTD05 03 17 5 Programs the RTC to Thursday 3 17 2005 RTA1 1234 Speeds up the RTC by 1234 PPB uf The Military Time Format is used for the RTC i e 15 00 is 3 00 PM RTAs t Real Time Adjust start trim Allows trimming of the RTC If s gt 0 the speed of the clock will be adjusted parts per billion PPB If the CE is the value entered with will be changing with temperature based on Y CAL Y CALC and Y CALC2 Page 20 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 oy AU 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR CORP Commands for Accessing the Trim Control Registers Allows user to read trim and fuse values _______________ combinations S Read TRIMBGB T4 2 0000002 p These commands are only accessible for the 71M6533H 0 196 parts When used on a 71M6533 0 596 part the results will be displayed as zero Reset Commands x 1 Comi 1 Description Watchdog contro W Halts the Demo Code program thus suppressing the trigger ing of the hardware watchdog timer This will c
64. inputs to the internal A D converter Typically they are connected to the outputs of resistor dividers Unused pins must be tied to V3P3A Comparator Input This pin is a voltage input to the internal comparator The voltage applied to the pin is compared to an internal BIAS voltage 1 6V If the input voltage is above the reference the comparator output will be high 1 If the comparator output is low a voltage fault will occur A series 5kQ resistor should be connected from V1 to the resistor divider VREF 8 Voltage Reference for the ADC This pin should be left unconnected floating Crystal Inputs A 32kHz crystal should be connected across these pins Typically XIN 33pF capacitor is also connected from XIN to GNDA and a 15pF capacitor is XOUT connected from XOUT to GNDA It is important to minimize the capacitance bet ween these pins See the crystal manufacturer datasheet for details Table 4 4 71M6533 71M6533H Pin Description Table 2 3 Page 79 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 TERIDIAN Digital Pins LCD Common Outputs These 4 pins provide the select signals for the LCD display SEGO SEG2 SEG12 SEG13 SEG15 SEG16 SEG18 SEG20 SEG23 DIO3 DIO56 DIO58 SEG24 DIO4 Dedicated LCD Segment Outputs SEG31 DIO1 SEG33 DIO13 SEG41 D1021 SEG43 DIO23 Multi use pins configurable as either LCD SEG driver or DIO DIO4 SCK SEG47 DIO27 SEG49 DIO29 S
65. ion V1 2 J TERIDIAN 2 4 5 LCD The 71M6533 has an on chip LCD controller capable of controlling static or multiplexed LCDs Figure 2 11 shows the basic connection for LCDs Note that the LCD module itself has no power connection 71M6533 segments commons Figure 2 11 LCD Connections 2 4 6 OPTICAL INTERFACE The 71M6533 is equipped with two pins supporting the optical interface OPT TX OPT RX The pin can be used to drive a visual or IR light LED with up to 20 a series resistor R in Figure 2 12 helps limiting the current The OPT_RX pin can be connected to the collector of a photo transistor as shown in Figure 2 12 V3P3SYS 71M6533 R 100 RX Phototransistor AN Q V3P3SYS LED NVN R5 OPT Tx d Figure 2 12 Optical Interface Block Diagram The IR diode should be connected between terminal 2 of header J12 on the Demo Board cathode and the V3P3 voltage anode which is accessible at terminal 1 of header J12 see Figure 3 J12 on the D6533T14A3 Demo Boards has all the provisions for connecting the IR LED and photo transistor Page 53 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 2 5 TESTING THE DEMO BOARD This section will explain how the 71M6533 6533H IC and the peripherals can be tested Hints given in this section will help evaluating the features of the Demo Board and underst
66. is calibrated individually The calibration procedure is as follows 1 2 Page 43 of 83 The calibration factors for all phases are reset to their default values i e CAL In CAL Vn 16384 and n An RMS voltage Vigea consistent with the meter s nominal voltage is applied and the RMS reading Vactual Of the meter is recorded The voltage reading error Axv is determined as AXV Vactual Videal Apply the nominal load current at phase angles 0 and 60 measure the Wh energy and record the errors AND Calculate the new calibration factors CAL CAL Vn and PHADJ n using the formulae presented in section 2 1 1 or using the spreadsheet presented in section 2 2 4 Apply the new calibration factors CAL n CAL Vn and PHADJ n to the meter The memory locations for these factors are given in section 1 9 1 Test the meter at nominal current and if desired at lower and higher currents and various phase angles to confirm the desired accuracy Store the new calibration factors CAL CAL Vn and PHADJ n in the EEPROM memory of the meter If the calibration is performed on a TERIDIAN Demo Board the methods involving the command line interface as shown in sections 1 9 3 and 1 9 4 can be used Repeat the steps 1 through 7 for each phase For added temperature compensation read the value TEMP RAW CE RAM and write it to TEMP NOM CE RAM If Demo Code 4 6n or later is used this
67. isplay on LCD The Demo Code will reset if the WD timer is enabled CT3 Selects the VBIAS signal the TMUX output pin ws CRSa b c d Selects CE addresses for RTM output Page 18 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 D ENDGIAN 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR CORP Commands controlling the Auto Calibration Function CL AUTO CALIBRATION omment NTR _ Allows user to initiate auto calibration and to store calibration values Command Begin auto calibration Prior to auto calibration the calibration combinations coefficients are automatically restored from flash memory 0 0004 Before starting auto calibration process target values for voltage duration and current must be entered in lt MPU RAM see section 1 9 5 and the target voltage and current must be applied constantly during calibration Calibration factors can be saved to EEPROM using CLS command Commands controlling the Pulse Counter Function CP Allows the user to control the pulse count functions CPA Command Start pulse counting for time period defined with the CPD combinations command Pulse counts will display with commands M15 2 Clear the absolute pulse count displays shown with commands 15 1 M16 1 Set time window for pulse counters to n seconds n is inter preted as a decimal number CPD60 Set time window to 60 seconds
68. lse sources are listed in Table 1 8 This address contains a number that points to the selected pulse 0x08 4 PULSER SRC source for the VARh output Selectable pulse sources are listed in Table 1 8 The nominal external RMS voltage that corresponds to 250mV 0x09 6000 VMAX peak at the ADC input The meter uses this value to convert internal quantities to external LSB 0 1V The nominal external RMS current that corresponds to 250mV OxOA 2080 IMAX peak at the ADC input for channel A The meter uses this value to convert internal quantities to external LSB 0 1A PPM C 26 84 Linear temperature compensation A positive value will cause the meter to run faster when hot This is applied to both V and and will therefore have double effect products PPM C 1374 Square law compensation A positive value will 0 0 PPMC2 cause the meter to run faster when hot This is applied to both V and and will therefore have a double effect on products This address contains a number that points to the selected pulse PULSEX_SRC source for the XPULSE output Selectable pulse sources are listed in Table 1 8 This address contains a number that points to the selected pulse OxOE PULSEY SRC source for the YPULSE output Selectable pulse sources are listed in Table 1 8 SCAL Count of accumulation intervals for auto calibration Applied voltage for auto calibration LSB 0 1V rms of AC signal iis VCAL applied to all elements during calibra
69. meter applications in the field as well as with metering standards x gt Each meter phase must be calibrated individually The procedures below show how to calibrate a meter phase with either three or five measurements The PHADJ equations apply only when a current transformer is used for the phase in question Note that positive load angles correspond to lagging current see Figure 2 2 During calibration of any phase a stable mains voltage has to be present on phase A This enables the CE processing mechanism of the 71M6533 6533H necessary to obtain a stable calibration gt Page 42 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 2 2 1 J TERIDIAN Voltage 22 1 Beco 5 5 Current lags voltage id direction 60 Current s Current leads voltage capacitive 3 S Ra Mu o Voltage p Generating Energy Using Energy Figure 2 2 Phase Angle Definitions The calibration procedures described below should be followed after interfacing the voltage and current sensors to the 71M6533 6533H chip When properly interfaced the V3P3 power supply is connected to the meter neutral and is the DC reference for each input Each voltage and current waveform as seen by the 71M6533 6533H is scaled to be less than 250mV peak CALIBRATION PROCEDURE WITH THREE MEASUREMENTS Each phase
70. n terminals 2 and 3 Pushbutton connected to the PB pin on the IC This push button can be used in conjunction with the Demo Code to 10 SW3 wake the IC from sleep mode or LCD mode to brown out mode In mission mode the pushbutton serves to cycle the LCD display Table 3 1 D6533T14A3 Demo Board Description Page 59 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 TERIDIAN Designator Five pin header for access to the optical port UART 1 Terminal 2 monitors the TX_OPT output of the IC 4 monitors the input to the IC OPT_TX GND No jumper should be place across VBAT and OPT TX OUT E Plug for connecting the external 5 VDC power supply 14 20 24 TP13 TP14 posee test points 32 TP15 TP16 19 JP20 header for selecting the signal the pulse LED D6 With a jumper between pins 1 and 2 RPULSE is selected Pins 2 and 3 select YPULSE 17 TP21 Two pin header providing access to the signals powering the RPULSE LED 05 18 JP19 SEG21 DIO08 Two pin header for selecting the signal for the pulse LED D5 With a jumper between pins 1 and 2 WPULSE is selected Pins 2 and 3 select XPULSE 19 TP20 Two pin header providing access to the signals powering the WPULSE LED D6 21 WATTS Wh pulse LED JP16 BAT MODE Selector for the operation of the IC when main power is re moved A jumper across pins 2 3 default indicates tha
71. nd voltage values that correspond to the 250mV maximum input signal to the IC and inserting them in the following equation for Kh Kh 66 1782 In 8 WRATE X 3 19902 Wh pulse The small deviation between the adjusted Kh of 3 19902 and the ideal Kh of 3 2 is covered by calibration The default values used for the 71M6533 6533H Demo Board are WHATE 683 IMAX 208 VMAX 600 In 8 1 controlled by SHUNT 15 2520 1 5 Explanation of factors used in the Kh calculation WRATE The factor input by the user to determine Kh IMAX The current input scaling factor i e the input current generating 177mVrms at the IA IB IC input pins of the 71M6533 177mV rms is equivalent to 250mV peak VMAX The voltage input scaling factor i e the voltage generating 177mVrms at the VA VB VC input pins of the 71M6533 In 8 The setting for the additional ADC gain 8 1 determined by the CE register SHUNT Nacc The number of samples per accumulation interval PRE SAMPS SUM CYCLES X The pulse rate control factor determined by the CE registers PULSE SLOW and PULSE FAST Almost any desired Kh factor can be selected for the Demo Board by resolving the formula for WRATE WRATE VMAX 66 1782 Kh In 8 X For the Kh of 3 2Wh the value 683 decimal should be entered for WRATE at location 2D using the CLI command gt 120 683 Page 23 of 83 2
72. nual contains proprietary product definition information of TERIDIAN Semiconductor Corporation TSC and is made available for informational purposes only TERIDIAN assumes no obligation regarding future manufacture unless agreed to in writing If and when manufactured and sold this product is sold subject to the terms and conditions of sale supplied at the time of order acknowledgment including those pertaining to warranty patent infringement and limitation of liability TERIDIAN Semiconductor Corporation TSC reserves the right to make changes in specifications at any time without notice Accordingly the reader is cautioned to verify that a data sheet is current before placing orders TSC assumes no liability for applications assistance TERIDIAN Semiconductor Corp 6440 Oak Canyon Road Irvine Suite 100 CA 92618 5201 TEL 714 508 8800 FAX 714 508 8877 http www teridian com Page 83 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2
73. ocated in internal RAM of the 80515 core starting at address 0x80 Page 17 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 ATERIDIAN Commands for EEPROM Control EE EPROM CONTROL Co Allows user to enable read and write to EEP Usage 000 EE option arguments Command EECn EEPROM Access 1 gt Enable 0 gt Disable combinations EERa b Read EEPROM at address for b bytes EEShello Writes hello to buffer then transmits buffer to EEPROM EET 0210 starting at address 0x210 2 Due to buffer size restrictions the maximum number of bytes handled by command is 0x40 Auxiliary Commands Typing a comma 5 7 repeats the command issued from the previous command line This is very helpful when examining the value at a certain address over time such as the CE DRAM address for the temperature 0x40 The slash 77 is useful to separate comments from commands when sending macro text files the serial interface All characters in a line after the slash are ignored Commands controlling the CE TMUX and the RTM CONTROL Allows the user to enable and configure the compute engine C option argument Command Compute Engine Enable 1 gt Enable combinations 0 gt Disable Select input n for TMUX output pin n is interpreted as a decimal number RTM output control 1 gt Enable 0 gt Disable CEn CTn CEO Disables CE followed by CE OFF d
74. ommands gt RI20 Reads the hex value of register 0x2020 gt Response from Demo indicating the bit 7 is set gt RD0 E Writes the hex value 0x0E to register 0x2020 causing the LCD boost to be switched off gt RI20 8E Enables the LCD boost circuit The LCD_CLK register determines the frequency at which the COM pins change states A slower clock means lower power consumption but if the clock is too slow visible flicker can occur The default clock frequency for the 71M6533 6533H Demo Boards is 150Hz LCD_CLK 01 LCD CLK 1 0 2021 1 0 Sets the LCD clock frequency i e the frequency at which SEG and COM pins change states JA fw CKADC 128 38 400 00 f 2 01 1 29 10 f 2 11 1 29 change the LCD clock frequency we apply the following commands gt RI21 Reads the hex value of register 0x2021 gt 25 Response from Demo Code indicating the bit O is set and bit 1 is cleared gt 21 24 Writes the hex value 0x24 to register 0 2021 clearing bit O LCD flicker is visible now gt 21 25 Writes the original value back to LCD_CLK Page 57 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 d ENGIAN 71M6533 71M6533H Demo Board User s Manual SEMICONDUCTOR CORP 2 6 TERIDIAN APPLICATION NOTES Please contact your local TERIDIAN sales representative for TERIDIAN Application Notes Some available application notes are listed below um E 651 017 LCD
75. p the list of commands shown in Figure 1 5 Demo Board Connection Hyper Terminal File Edit wiew Call Transfer Help 2 Command Line Interpreter On line help Usage lt char gt or to get this help page Where lt char gt is an uppercase letter of the command The following commands lt char gt are available Repeat last command Z Ignore rest of line Access CE Data RAM 221 Access MPU Data RAM Control metering I Information messaqe Meter Display Control Power Save SFR and I O Control RT RTC Control Trim Controls W Wait for watchdog reset Soft reset B Battery mode commands EE EEPROM Control ER Error Recording Z Rest of line is a comment For Example C to get help on Compute Engine Control gt Connected 2 19 57 ANSIW 300 8 N 1 Figure 1 5 Command Line Help Display The tables in this chapter describe the commands in detail Page 15 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 TERIDIAN Commands to Display Help on the CLI Commands Command help available for each of the options below Command Command line interpreter help menu combinations Doo a ia pn access data RAM Pf MPU RAM DRT ily on repeat ast command Display help on EEPROM control o EE Display on error recording __________ Display on information message Display help meter display cont
76. r 0 05 pitch and 6x1 header 0 1 pitch Spade terminals on PCB bottom 0 1 headers on PCB bottom 8x2 header 0 1 pitch 5 2 header 0 1 pitch 128KByte FLASH memory 1Mbit serial 32 768kHz 20PPM at 25 C 0 04PPM C2 max Push button SW2 Push button SW3 8 digit LCD 14 segments per digit red LED D5 red LED D6 120 700 V rms resistor division ratio 1 3 398 1 7Q termination for 2 000 1 CT input 208A 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 4 APPENDIX This appendix includes the following documentation tables and drawings 71M6533 71M6533H Demo Board Description D6533T14A3 Demo Board Electrical Schematic D6533T14A3 Demo Board Bill of Materials D6533T14A3 Demo Board PCB layers copper silk screen top and bottom side D6533T14A3 Demo Board Electrical Schematic Debug Board Description e Debug Board Electrical Schematic e Debug Board Bill of Materials e Debug Board PCB layers copper silk screen top and bottom side 71M6533 71M6533H IC Description e 71M6533 71M6533H Pin Description 71M6533 71M6533H Pin out Page 63 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 4 1 71M6533 DEMO BOARD ELECTRICAL SCHEMATIC Ferrite Bead 6000hm JA L15 VBAT VBAT Page 64 of 83 NEUTRAL RV1 VARISTOR R100 100 R102 100 RA 100 2W C46 30nF 1000VDC R139 1 5 C6 0 47uF 1000VDC VA IN
77. r from the energy measurements at 0 and 60 are entered in the yellow fields labeled Energy reading at 0 and Energy reading at 60 The corresponding error expressed as a fraction will then show in the two green fields to the right of the energy reading fields 6 The spreadsheet will calculate the calibration factors CAL IA CAL VA and PHADJ A from the information entered so far and display them in the green fields in the column underneath the label 11 33 new 7 If the calibration was performed a meter with non default calibration factors these factors be entered in the yellow fields in the column underneath the label old For a meter with default calibration factors the entries in the column underneath old should be at the default value 16384 Page 45 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN A spreadsheet is also available for Rogowski coil calibration see Figure 2 5 Data entry is as follows Page 46 of 83 1 2 All nominal values are entered in the fields of step one The applied voltage is entered in the yellow field labeled Input Voltage Applied of step 2 The entered value will automatically show in the green fields of the two other channels After measuring the voltages displayed by the meter these are entered in the yellow fields labeled Measured Voltage The spreadsheet will show the calculated calibration factors for voltage in the
78. rge voltage excursions When applying VMAX at the primary side of the transformer the secondary voltage V is Vs VMAX Vs is scaled by the resistor divider ratio When the input voltage to the voltage channel of the 71M6533 is the desired 177mV Vs is then given by Vs 177mV Resolving for we get VMAX N 177mV 600V 30 177mV 170 45 This divider ratio can be implemented for example with a combination of one 16 95kQ and one 10002 resistor Page 24 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN If potential transformers PTs are used instead of resistor dividers phase shifts will be introduced that will re quire negative phase angle compensation TERIDIAN can supply Demo Code that accepts negative calibration factors for phase 1 9 CALIBRATION PARAMETERS 1 9 1 GENERAL CALIBRATION PROCEDURE Any calibration method can be used with the 71M6533 6533H chips This Demo Board User s Manual presents calibration methods with three or five measurements as recommended methods because they work with most manual calibration systems based on counting pulses emitted by LEDs on the meter Naturally a meter in mass production will be equipped with special calibration code offering capabilities beyond those of the Demo Code It is basically possible to calibrate using voltage and current readings with or without pulses involved For this purpose the MPU Demo Code can
79. rol MR ________________ on meter RMS display control ____ 1 Displayhelpon SFR control RTC control 2 7 1 Dispayhepontimcontrl 2 9721 Dispayhelponthewairesetcommand 2 2142 Displayhelponreset Examples Display tne command interpreter help menu 06 Displays compute engine control help Commands for CE Data Access Allows user to read from and write to CE data space Starting Data Address option option Command Read consecutive 16 bit words Decimal starting at combinations address A DO ss eso mm 111717 sagas Du mamme poss NN NN 7 All data words in 4 byte 32 bit format Typing JA will access 32 bit word located at the byte address 0x1000 4 0 1028 Page 16 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN Commands for MPU XDATA Access Description Allows user to read from and write to MPU data space Starting MPU Data Address option option Command Read three consecutive 32 bit words in Decimal starting at combinations address A Read three consecutive 32 bit words in Hex starting at address A Write the values n and m to two consecutive addresses starting at address A
80. rom 71M6533 6533H Data clock E RXTX Bi directional Data input output E RST Bi directional Flash Downloader Reset active low Table 1 6 Flash Programming Interface Signals The RST signal should only be driven by the Flash Downloader when enabling these interface signals The Flash Downloader must release RST at all other times Page 29 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 1 10 DEMO CODE 1 10 1 DEMO CODE DESCRIPTION The Demo Board is shipped preloaded with Demo Code revision 4 4 16 or later in the 71M6533 or 71M6533H chip The code revision can easily be verified by entering the command gt i via the serial interface see section 1 8 1 Check with your local TERIDIAN representative or FAE for the latest revision The Demo Code offers the following features It provides basic metering functions such as pulse generation display of accumulated energy frequency date time and enables the user to evaluate the parameters of the metering IC such as accuracy harmonic performance etc It maintains and provides access to basic household functions such as real time clock RTC It provides access to control and display functions via the serial interface enabling the user to view and modify a variety of meter parameters such as Kh calibration coefficients temperature compensation etc It provides libraries for access of low level IC functions to serve as building blocks for code de
81. rrors They include errors in voltage attenuators current sensors and in ADC gains In other words no errors are made in the input or meter boxes INPUT ERRORS METER gt IDEAL I ACTUAL I Ay is phase lag ds is phase lead ap w IDEAL IV ACTUAL IV Ay Axy cos s Vrus gt IDEAL ACTUAL V Ayy ze Esta dE Ca ERE ACTUAL IDEAL ACTUAL IDEAL IDEAL ERROR Figure 2 1 Watt Meter with Gain and Phase Errors During the calibration phase we measure errors and then introduce correction factors to nullify their effect With three unknowns to determine we must make at least three measurements If we make more measurements we can average the results CALIBRATION WITH THREE MEASUREMENTS The simplest calibration method is to make three measurements Typically a voltage measurement and two Watt hour Wh measurements are made A voltage display can be obtained for test purposes via the command gt MR2 1 in the serial interface Let s say the voltage measurement has the error Ey and the two Wh measurements have errors E and Ego where is measured with O and Eso is measured with 60 These values should be simple ratios not percentage values They should be zero when the meter is accurate and negative when the meter runs slow The fundamental frequency is fo
82. s Manual Figure 4 8 TERIDIAN D6533T14A3 Demo Board Bottom Copper Page 72 0183 2005 2008 TERIDIAN Semiconductor Corporation TERIDIAN 189 Ja PS SELL CORA BE 4 ETE ETE EN Figure 4 9 TERIDIAN D6533T14A3 Demo Board Bottom View V1 2 9 2005 2008 TERIDIAN Semiconductor Corporation Page 73 of 83 4 4 DEBUG BOARD BILL OF MATERIAL Item Page 74 of 83 Q 21 1 1 2 4 1 1 1 4 2 1 1 1 2 5 1 4 4 2 2 Reference Value C1 C3 C5 C10 C12 C23 O 1uF C4 C11 D2 D3 JP1 JP2 JP3 JP4 J1 J2 J3 R1 R5 R7 R8 R2 R3 4 R6 SW2 TP5 TP6 01 02 03 05 06 04 33uF 10V 10uF 16V B Case LED HDR2X1 RAPC712 DB9 HEADER 8X2 10K 1K NC 0 PB Switch test point ADUM 1100 MAX3237CAI spacer 4 40 1 4 screw 4 40 5 16 screw 4 40 nut PCB Footprint 0805 1812 1812 0805 2x1pin DB9 8x2pin 0805 0805 0805 0805 PB TP 501 8 50028 P N C2012X7R1H104K TAJB336K010R TAJB106K016R LTST C170KGKT PZC36SAAN RAPC712 A2100 ND PPTCO82LFBN ERJ 6GEYJ103V ERJ 6GEYJ102V N A ERJ 6GEYOROOV EVQ PJX05M 5011 ADUM1100AR 237 2202K ND PMS4400 0025PH PMS4400 0031PH HNZ440 Table 4 2 Debug Board Bill of Material Manufacturer TDK AVX AVX LITEON Sullins Switchcraft AMP
83. s copied from flash memory Writing OxFF into first few bytes of the EEPROM deactivates any calibration data previously stored to the EEPROM Page 26 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 1 9 5 AUTOMATIC GAINS CALIBRATION The Demo Code is able to perform a single point fast automatic calibration as described in section 2 2 This calibration is performed for channels A B and C only not for the NEUTRAL channel The steps required for the calibration are 1 Enter operating values for voltage and current in I O RAM The voltage is entered at MPU address 0x10 e g with the command 10 2400 for 240V the current is entered at 0x11 e g with the command 11 4300 for 30A and the duration measured in accumulation intervals is entered at OxOF 2 The operating voltage and current defined in step 1 must be applied at a zero degree phase angle to the meter Demo 3 The CLB Begin Calibration command must be entered via the serial interface The operating voltage and current must be maintained accurately while the calibration is being performed 4 The calibration procedure will automatically reset CE addresses used to store the calibration factors to their default values prior to starting the calibration Automatic calibration also reads the chip temperature and enters it at the proper CE location temperature compensation 5 addresses 0x10 to 0x15 and 0x18 to Ox1A will now show
84. t no external battery is available The IC will stay in brownout mode when the system power is down and it will communi cate at 9600bd A jumper across pins 1 2 indicates that an external battery is available The IC will be able to transition from brownout mode to sleep and LCD modes when the system power is down and it will communicate at 300bd 0003 Three pin header providing access to 01003 To enable the ICE interface a jumper is installed across pins 2 and 3 EN ONNNNENEMI I EC XI JP15 DIO58 01056 01057 and 01058 CKTEST Test points for access to the CKTEST and TMUXOUT pins TMUXOUT on the IC TP17 VREF Test point for access to the VREF pin on the IC 10 Three pin header for control of the V1 input to the IC NL EM 39 41 J19 J20 J21 IAN IAP IBN IBP Two pin headers for monitoring the current channel inputs 43 J22 ICN ICP IDP J14 EMULATOR I F 2x10 emulator connector port for the Signum ICE ADM 51 or for the TERIDIAN TFP 2 Flash Programmer Table 3 2 D6533T14A3 Demo Board Description Page 60 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 71M6533 71M6533H Demo Board User s Manual SENILONDUGTON CORT e Alternative connector for the ICE interface 38 40 42 J3 J5 J7 J10 Two pin headers mounted on the bottom of the board The 44 outpu
85. til the flash memory is updated the macro file must be loaded each time the part is powered up The macro file is run by sending it with the transfer gt send text file procedure of HyperTerminal A Use the Transfer gt Send Text File command UPDATING THE DEMO CODE HEX FILE The d merge program updates the hex file usually named 6533 4p6b 19jan08 hex or similar with the values contained in the macro file This program is executed from a DOS command line window Executing the d merge program with no arguments will display the syntax description To merge macro txt and old 6533 demo hex into new 6533 demo hex use the command d merge old 6533 demo hex macro txt new 6533 demo hex The new hex file can be written to the 71M6533 71M6533H through the ICE port using the ADM51 in circuit emulator or the TFP 2 flash programmer UPDATING CALIBRATION DATA IN FLASH OR EEPROM WITHOUT USING THE ICE OR THE TFP 2 It is possible to make data permanent that had been entered temporarily into the CE RAM The transfer to flash memory is done using the following serial interface command gt U Thus after transferring calibration data with manual serial interface commands or with a macro file all that has to be done is invoking the U command Similarly calibration data can also stored in EEPROM using the CLS command q After reset calibration data is copied from the EEPROM if present Otherwise calibration data i
86. tion Applied current for auto calibration LSB 0 1A rms of AC signal 0x11 300 ICAL applied to all elements during calibration Power factor must be 1 Voltage to be used for creep detection measuring frequency Pulse width in us 2 PulseWidth 1 397 OxFF disables this PULSE WIDTH feature Takes effect only at start up temp Nomina reference temperature i e temperature which EM TEMP NOM calibration occurred LSB Units of TEMP RAW from The count of accumulation intervals that the neutral current must 0x15 NCOUNT be above INTHRSHLD required to set the excess neutral error bit The neutral current threshold 0x16 INTHRSHLD LSB JIxSQSUM 279 Table 1 7 MPU Input Parameters for Metering Page 32 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN Any of the values listed in Table 1 8 can be selected for as a source for PULSEW and PULSER The designation source refers to values imported by the consumer source E refers to energy exported by the Number Pulse Source Description consumer energy generation Number Pulse Source Description Default for __1 wsm Sum of imported real energy Default for Imported real energy on element VAROSUM Do VARSUM 1 Sum of imported reactive energy VARISUM 24 VAROSUM 1 Imported reactive energy on element A 7 VAR2SUM 25 VARISUM 1 Imported reactive energy
87. ts from the CTs are to be connected here Table 3 3 D6533T14A3 Demo Board Description oo E oR Figure 3 1 D6533T14A3 Demo Board Board Description Default jumper settings indicated in yellow Page 61 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 3 2 BOARD HARDWARE SPECIFICATIONS PCB Dimensions e Diameter e Thickness e Height w components Environmental e Operating Temperature 6 5 165 1mm 0 062 1 6mm 1 5 38 1mm 40 85 C function of crystal oscillator affected outside 10 C to 60 C e Storage Temperature Power Supply e Using internal AC supply e DC Input Voltage powered from DC supply e Supply Current Input Signal Range e AC Voltage Signals VA VB VC AC Current Signals IA IB IC from CT Interface Connectors e DC Supply Jack J1 to Wall Transformer e Emulator J14 and J17 e Voltage Input Signals e Current Input Signals e Debug Board J2 e SPI Interface Functional Specification e Program Memory e NV memory e Time Base Frequency e Time Base Temperature Coefficient Controls and Displays e Reset e Numeric Display e Watts e VARS Measurement Range e Voltage e Current Page 62 of 83 40 C 100 C 240V 700V RMS SVDC 0 5V 25mA typical 0 240V RMS 0 0 25V p p 176mV RMS Concentric connector 2 5mm 10x2 heade
88. ue The gain is directly proportional to the CAL parameter Allowed range is 0 to 32767 If the gain is 1 slow CAL should be increased by 1 PHADJ A This constant controls the CT phase compensation No compensation PHADJ B occurs when PHADJ 0 As is increased more compensation is PHADJ C introduced Table 1 5 CE RAM Locations for Calibration Constants Page 25 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 1 9 2 1 9 3 1 9 4 J TERIDIAN CALIBRATION MACRO FILE The macro file in Figure 1 6 contains a sequence of the serial interface commands It is a simple text file and can be created with Notepad or an equivalent ASCII editor program The file is executed with HyperTerminal s Transfer gt Send Text File command disable 1 65 022 CAL gain CAL 16384 111 416381 CAL gain CAL 16384 112 16019 CAL gain CAL IB 16384 113 16370 CAL VB gain CAL VB 16384 114 15994 CAL IC gain CAL 1 16384 gain CAL 16384 115 16376 CAL VC 118 115 PHADJ A default 0 119 113 PHADJ B default 0 11 109 default 0 1 enable Figure 1 6 Typical Calibration Macro File It is possible to send the calibration macro file to the 71M6533H for temporary calibration This will temporarily change the CE data values Upon power up these values are refreshed back to the default values stored in flash memory Thus un
89. ulated reactive energy VARh Accumulated exported reactive energy VARh Accumulated apparent energy VAh Elapsed time Time of day hh mm ss Date yyyy mm dd Power factor V V phase angle degrees Zero crossings of the mains voltage Pulse counter RMS current RMS voltage Battery voltage Table 1 4 Selectable Display Options Page 12 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 1 7 4 SERIAL CONNECTION SETUP After connecting the DB9 serial port to a PC start the HyperTerminal application and create a session using the following parameters Port Speed 9600 bd or 300bd see below Data Bits 8 Parity None Stop Bits 1 Flow Control XON XOFF See section 3 1 for proper selection of the operation mode when main power is removed e A jumper across pins 2 3 VBAT GND of JP16 indicates that no external battery is available The IC will stay in brownout mode when the system power is down and it will communicate at 960054 e A jumper across pins 1 2 BATMODE VBAT indicates that an external battery is available The IC will be able to transition from brownout mode to sleep and LCD modes when the system power is down and it will communicate at 300bd HyperTerminal can be found by selecting Programs gt Accessories gt Communications from the Windows start menu The connection parameters are configured by selecting File gt Properties and then by pressing the Configure button Port spe
90. unut GN forthe mutter Disab reference votege ouput vrer pisz1 7 ES Reduce the clock for the MPU MPU DIV 5 0 4mA Table 2 1 Power Saving Measures Page 50 of 83 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 2 4 SCHEMATIC INFORMATION In this section hints on proper schematic design are provided that will help designing circuits that are functional and sufficiently immune to EMI electromagnetic interference 2 4 1 COMPONENTS FOR THE V1 PIN The V1 pin of the 71M6533 6533H can never be left unconnected A voltage divider should be used to establish that V1 15 in a safe range when the meter is in mission mode V1 must be lower than 2 9V in all cases in order to keep the hardware watchdog timer enabled For proper debugging or loading code into the 71M6533 6533H mounted on a PCB it is necessary to have a provision like the header JP1 shown above R1 in Figure 2 7 A shorting jumper on this header pulls V1 up to V3P3 disabling the hardware watchdog timer V3P3 GND Figure 2 7 Voltage Divider for V1 On the D6533T14A3 Demo Board this feature is implemented with resistors R83 R86 capacitor C31 and TP10 See the board schematics in the Appendix for details 2 4 2 RESET CIRCUIT Even though a functional meter will not necessarily need a reset switch the 71M6533 Demo Boards provide a reset pushbutton that can be used when prototyping and debuggin
91. velopment A detailed description of the Demo Code can be found in the Software User s Guide SUG In addition the comments contained in the library provided with the Demo Kit can serve as useful documentation The Software User s Guide contains the following information Page 30 of 83 Design guide Design reference for routines Tool Installation Guide List of library functions 80515 MPU Reference hardware instruction set memory registers 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 1 10 2 IMPORTANT DEMO CODE MPU PARAMETERS In the Demo Code certain MPU XRAM parameters have been given fixed addresses in order to permit easy external access These variables can be read via the serial interface as described in section 1 7 1 with the n command and written with the n xx command where is the word address Note that accumulation variables 64 bits long and are accessed with n read and n hh ll write in the case of accumulation variables Default values are the values assigned by the Demo Code on start up All MPU Input Parameters are loaded by the MPU at startup and should not need adjustment during meter calibration MPU Input Parameters for Metering XRAM Word Default Address Value For each element if WSUM_X or 50 of that element ceeds WCREEP_THR the sample values for that element are not zeroed Otherwise the accumulators for Wh VARh and
92. will automatically calculate the correction coefficients PPMC and PPMC2 from the nominal temperature and from the characterization data contained in the on chip fuses Tip Step 2 and the energy measurement at 0 of step 3 can be combined into one step 2005 2008 TERIDIAN Semiconductor Corporation V1 2 J TERIDIAN 2 2 2 CALIBRATION PROCEDURE WITH FIVE MEASUREMENTS Each phase is calibrated individually The calibration procedure is as follows 1 The calibration factors for all phases are reset to their default values i e CAL_In CAL_Vn 16384 and PHADJ_n 0 2 AnRMS voltage Vigea consistent with the meter s nominal voltage is applied and the RMS reading Vactual Of the meter is recorded The voltage reading error Axv is determined as Vactual Videal 3 Apply the nominal load current at phase angles 0 60 180 and 60 300 Measure the Wh energy each time and record the errors Eo E180 and Eoo 4 Calculate the new calibration factors CAL_In CAL_Vn and PHADJ_n using the formulae presented in section 2 1 2 or using the spreadsheet presented in section 2 2 4 5 Apply the new calibration factors CAL_In CAL_Vn and PHADJ nto the meter The memory locations for these factors are given in section 1 9 1 6 Test the meter at nominal current and if desired at lower and higher currents and various phase angles to confirm the desired accuracy 7 Store the new calibration f
93. y reading at 60 Energy reading at 180 Voltage error at 0 Expected voltage V Energy reading at 0 Energy reading at 60 2424 Energy reading at 60 Energy reading at 180 Voltage error at 0 CAL TE CAL VB 16384 16222 PHADJ B 0 Measured voltage V 16384 16384 16384 16384 CAL_IC CAL_VC Expected voltage V Measured voltage V Enter values in yellow fields REV Date Author 4 2 10 25 2005 WJH Positive direction O Generating Energy Current lags voltage inductive 60 Current 60 Current leads voltage capacitive 7 Voltage Using Energy Readings Enter 0 if the error is 0 enter 5 if meter runs 5 fast enter 3 if meter runs 3 slow Figure 2 4 Calibration Spreadsheet for Five Measurements Page 47 of 83 2005 2008 TERIDIAN Semiconductor Corporation Enter values in yellow fields Results will show in green fields SEMICONDUCTOR CORP Step 1 Enter Nominal Values Nominal CAL_V Resulting Nominal REV 4 3 Nominal CAL_ Values X 6 Date 11 18 2005 PHADJ Kh Wh 0 440 Author WJH WRATE VMAX Calibration Frequency Hz Angle Sensitivity deg LSB IMAX incl ISHUNT 50Hz 5 60 04 PULSE_FAST PULSE_SLOW NACC Step 2 VRMS Calibration Enter old CAL_VA Input Voltage Applied Measured Voltage CAL_Vx Step 3 Current Gain and Phas

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