56F800 Demonstration Board User`s Manual
Contents
1. Table 2 2 Indicators Indicator 56F800 Signal Color D1 PWMAO Green D2 PWMA1 Green D3 PWMA2 Green D4 PWMA3 Green D5 PWMA4 Yellow D6 PWMA5 Yellow D7 GPIOB1 RXDO Yellow D8 GPIOBO TXDO Yellow D9 GPIOA1 TD1 Red D10 GPIOA2 TD2 Red Technical Summary Rev 0 Freescale Semiconductor 5 56F800 Demonstration Board User s Manual Rev 0 Freescale Semiconductor Appendix A 56F800 Demonstration Board Schematics 56F800 Demonstration Board Schematics Rev 0 Freescale Semiconductor pieog uonessuowag 008496 Lg enB14 1 40i 133HS eu a 620 H0S XY EOLIEO 408 ea zouen Di VIEO NXY ana EZ ES i ang je 405 e APL 0430008195 v 100 LON EIT EIF IEI 029 Burunyoeynue Y r F dn worx Y neer neer neer nee iL J SHOLIOVAVI SSVdAB Hd ose Nd389 T NI ino E L HCH 2 LE 0019V74 ooiovv Doug glede ad 6 eme ACC ENEE FONO 3OVSH3INL Lem 00L9YYL on ze EN SOBAN Age SINIOd 1531 SI eer S019Vv DESCH DESCH DE Tr Dex cara ZS HO le En Ela 3149 0O3SANN Aur ipalone 108396450 9vi 1SOH Geu pue z013 2 2801d9 1V1X3 5 DE XE 7 ESSA NOT d um cun Se E80149 71X TSSA dick vn Tera t i dI TROY Til Ag9r 4ne ede EIER an XVOSUT FILON 5 Fg AQT ne Tedvan ovi inv IS Eed At z L901d9 55 HEEE xard2. 56F800 Demonstration Board User Manual 56F800 16 bit Digital Signal Controllers DSP56F800DBUM Rev 0 09 2005 e freescale com 2 freescale semiconductor TABLE OF CONTENTS Preface Chapter 1 Introduction 1 1 56F800 Demonstration Board Features Ie SPECIFICATIONS orinar da dada li IRE Chapter 2 Technical Summary 2 1 ni amp RR peas tia a 2 1 1 WIS ENDS 4232434 Gece dc naa ladra Ade des i e di de dd i iras 2 1 2 GUT_AWAY TOS nek eee RAE ir RK ETE A A 22 PORTS AND CONNECTORS e scenes nisa Rida lia hi 2 2 1 is AAA 2 2 2 am A e EE 2 2 3 OPIO EEN dE EE e EE EE EE E E 2 2 4 TIMER Pee PRIA PESTE VETTE 2 2 5 ADC PB A A IRR 2 2 6 E AA OE AE S de d 22 1 FIN DU AA A A A AA 2 2 8 PU OT PE eet SSE PR eS 22232292 a Gc oC do 4 rad DAA Dai MICROPHONE 2123 2 d 939094 iii CR esi dd POTENTIOMETER POT RIS EE Eer AR Ee E d ras 2 4 DN AA Appendix A 56F800 Demonstration Board Schematics Freescale Semiconductor Preliminary 56F800 Demonstration Board User s Manual Rev 0 Freescale Semiconductor LIST OF FIGURES 1 1 55F800 Demonstration Beard e ee ee ea ca cea a RE 1 2 2 1 POE FON sciolse bielle de a ati e bu a s 2 2 A 1 S6F800 Demonstration BOM cua ir rs EE E EROR Fa aw ees RC A 2 Freescale Semiconductor iii 56F800 Demonstration Board User s Manual Rev 0 Freescale Semiconductor TABLE OF CONTENTS 2 1 AA E AAA ee ne oe dw PIER Ee we 2 1 2 2 i NUR A eee base O II al d ip 2 5 Freescale S
3. ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan freescale com Asia Pacific Freescale Semiconductor Hong Kong Ltd Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po N T Hong Kong 800 2666 8080 support asia freescale com For Literature Requests Only Freescale Semiconductor Literature Distribution Center P O Box 5405 Denver Colorado 80217 1 800 441 2447 or 303 675 2140 Fax 303 675 2150 LDCForFreescaleSemiconductor hibbertgroup com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any par ticular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental dam ages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications ca
4. 3i A eta v801d9 1195 v801d9 X108 S601d9 1S0H isurd t T GEH HEN Genren S801d9 ISOM DEA cn Es cn Sl Zeen 1801d8 00xH SAL d SHE 080149 00X1 Worse 6 8 ige Toyo 13638 d 8 2v01d9 201 Oran En Di Oot TY0Id9 101 Be Y uu bett RO S019VvZ 0 2 qas LINY TVOId9 TAL G 3 e CaL EE n GOTXO WL E E Dan oA 60 An sn aa ory RESET WIL ore MONZA Seo MZ M Eu OB0Ta5700XI 7 DS e HISN 201 A8 z nve i g O3TIVLSNI 38 AVW ONY VNOLIdO 3bY Ee WL ous SANI 03HSVO 30ISNI SIN3NOdHO2 LEE TENTATONE 7 e EWAMd ae eva Sos en Ovid Bd Ove 048 E e an UB WL ove t Oye 0 2 te C T801d3 00X8 on Wis c7 080129 00XI GC d EI 9195 wI838 01d9 WMd W3NIL oge TEE DEEN Ted or Dez Fey e 180140 68 3 360 149 0STA Erd g eve Ge0149 TSON 9 FEU Rus 3 ai ozz EBOI E 260199 E ows rv 2v01d9 20L EIERE 80149 00X1 WOH OVOTSS 001 rey 13 10NX MMd BINIL 20v WIH3S 01d9 WIB3S 01d9 REECH gia Al Freescale Semiconductor DSP56F801EVM Hardware
5. EN vee p1 HH EN o spl ERR e e vs ile j Ee H al MN sam oo MM HE ar R27 PHONE RESET IRQ e nt E HE em DSP56F801 EMO Ze 741 CX125 I D axM 0311 89 IM zin z REV A 00 e mM Tee e R25 R20 EE C4 o0 e un III m 9 326 mmm I DSP56F801 mn 4 5309 o PI 3 LE ET iil HN Li q 9 C5 mum R e c5 C3 z zinc 1 e IH ec i z ajo o O ES nu un Hu oo e MES iron 74ACTO5 74ACTO5 300 im Rig R23 MM DI I oe EN U6 U2 U3 9 pun BERSENSENEOCEEcOEN mm OM BR 4 MRS MR NE Dl D3 oe o o JTAG E m 0000000 E al nn Ip e 10000000 ma uu ern n o 0 000 AXIOM MANUFACTURING DSP56F801DEMO AXM 0311 REV A SILKSREEN LAYER i000 Freescale Semiconductor SPECIFICATIONS 1 2 SPECIFICATIONS e 9V DC input voltage typical 200ma Input voltage range 7 to 15V DC On board regulated 5V DC and 3 3V DC supplies e Board size 3 x 4 2 inches Introduction Rev 0 Freescale Semiconductor 3 56F800 Demonstration Board User s Manual Rev 0 Freescale Semiconductor Chapter 2 Technical Summary This chapter describes the 56F800 Demonstration Board s available options 2 1 OPTIONS 2 1 1 HOST ENABLE The HOST ENABLE option jumper is installed by default and enables the Host JTAG interface on the board With the option jumper installed the 56F801 device will reset into Debug mode and await Host commands on the Host JTAG port P1 Removing the HOST ENABLE option jumper will allow the 56F801 dev
6. The COM port has a female DB9 connector that 6 interfaces to the 56F801 internal SCIO serial port via CTS the U8 RS 232 transceiver lt uses a simple 2 wire asynchronous serial interface and is translated to RTS RS 232 signaling levels 9 1 4 6 connected host null RTS and CTS flow control connection pads are provided on the 56F800 Demonstration Board to apply unassigned 56F801 1 O to support flow control on COM1 The RTS pad provides RS 232 level output conversion to COMI port pin 8 The CTS pad provides RS 232 converted input from COMI pin 7 The 1 4 6 and 9 pins provide RS 232 status The 1 4 and 6 pins are connected on the bottom of the development board to provide NULL status to the host The user may isolate pins and provide the status connections to the host by applying I O signals and RS 232 level conversion Freescale Semiconductor Technical Summary Rev 0 2 2 7 JTAG OnCE The JTAG 14 pin connector is compatible with the Freescale OnCE development port This connector allows the connection of a OnCE style background debug cable for software development programming and debugging in real time TDI 4 2 GND JTAG OnCE BDM connection TDO 3 4 GND TCK 5 6 GND yog key RESETin 9 10 TMS 3 3V DC 11 12 DE 13 14 TRST in Note HOST_ENABLE option must be open or idle to apply this connector 2 2 8 P1 HOST JTAG The P1 Host JTAG connector provides development port interface to a hosting Personal Comp
7. User s Manual Rev 0 INDEX A ADC vi 2 1 2 4 Analog to Digital Converter ADC vi C CE v Clear To Send CTS vi COMI serial port 2 1 Crystal oscillator isolation 2 1 CTS vi 2 3 CUT AWAY v 2 4 2 5 D DS25 2 4 DSP56F801 Digital Signal Processor User s Manual vi E Electrostatic Discharge ESD v vi EMC v ESD v vi F FCC v G General Purpose Input Output Port GPIO vi GPIO vi H HOST ENABLE 2 4 I O connector v I O signal v Freescale Semiconductor J Joint Test Action Group JTAG vi JTAG vi M Microphone 2 2 2 3 O OnCE vi On Chip Emulation OnCE vi P PC vi Personal Computer PC vi POT vi 2 1 2 3 Potentiometer POT vi Pulse Width Modulation PWM vi PWM vi R R23 2 4 RS 232 2 3 RTS 2 3 T Technical Data 56F801 16 Bit Hybrid Controller vi Index i How to Reach Us Home Page www freescale com E mail support freescale com USA Europe or Locations Not Listed Freescale Semiconductor Technical Information Center CH370 1300 N Alma School Road Chandler Arizona 85224 1 800 521 6274 or 1 480 768 2130 support freescale com Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French support freescale com Japan Freescale Semiconductor Japan Ltd Headquarters
8. e PWR jack accepts a standard 2 0 2 1mm center barrel plug connector positive voltage center to provide the VIN supply of 9V DC at 200ma 2 2 2 POWER PORT Provides access to the 9V DC input GND power ground 5V DC and 3 3V DC power supplies The 9V DC input should only be applied by PWR jack or Power Port but not both or a supply conflict may occur and the 56F800 Demonstration Board could be damaged Power Port accepts a 3 5mm pin space terminal block GND 3 3V DC 5V DC 9V DC Figure 2 1 Power Port 56F800 Demonstration Board User s Manual Rev 0 Freescale Semiconductor 2 2 3 GPIO SERIAL TXDO GPIOBO GPIOB2 SCLK GPIOB4 MISO GPIOB6 IREQA 2 2 4 TIMER PWM TDO GPIOAO TD2 GPIOA2 PWMA4 PWMA2 PWMAO 2 2 5 ADC Port ANA6 ANA4 ANA2 ANAO VREF 2 2 6 COM1 4 TXDO RXDO 4 GND ON OW ON Aw ON aA W OU ADN A NOAN RU e Da nd A NOAN OC o Y O GPIOB1 RXDO PORTS AND CONNECTORS GPIO B port provides alternate functions GPIOB3 as SCI COM1 and indications and SPI GPIOB5 MOSI ports IREQ and RESET signals are also GPIOB7 SS provided on this connector RESET GPIOA1 TD1 GPIOAO 2 port provides alternate FAULTAO functions of Timer TDO 2 I O PWMA5 Note that most of these ports provide a user indication PWMA3 PWMA1 ANA7 Analog inputs Note that ANA2 and ANA5 ANA6 provide Microphone and User ANA3 POT R12 input respectively ANA1 GND
9. emiconductor i Preliminary 56F800 Demonstration Board User s Manual Rev 0 Freescale Semiconductor Preface This reference manual describes in detail the hardware on the 56F800 Demonstration Board Audience This document is intended for application developers who are creating software for devices using the Freescale 56F800 Demonstration Board Organization This manual is organized into two chapters and one appendix Chapter 1 Introduction provides an overview of the Demonstration Board and its features Chapter 2 Technical Summary describes the 56F800 Demonstration Board in detail Appendix A 56F800 Demonstration Board Schematics contains the schematics of the 56F800 Demonstration Board Suggested Reading Related documentation for the 56F800 family of digital signal controllers may be found at http www freescale com dsc Preface Rev 0 Freescale Semiconductor Notation Conventions This manual uses the following notational conventions Typeface Symbol or Term Meaning Examples Typeface Symbol or Term Courier Monospaced Type Code examples Process command for line flash Courier Monospaced Type Italic Directory names and contains these core Italic project names directories calls applications contains functions applications software statements procedures CodeWarrior project routines 3des mcp is arguments file names the
10. ice to reset normally and execute program code contained in the device s Flash memory e HOST ENABLE INSTALLED Debug Mode host JT AG port is active HOST ENABLE OPEN or IDLE Normal Mode executes user code in Flash 2 1 2 CUT AWAY Options CUT AWAY options allow the user to disconnect dedicated 56F801 I O port resources from development board connectors or peripherals The CUT AWAY options also allow for re establishing the connection by installing surface mount 0805 size 0 ohm resistors or mod wire with the use of a soldering iron Normal operation of the 56F800 Demonstration Board generally does not require any manipulation of the CUT AWAY options Table 2 1 CUT AWAY Options CUT AWAY Description 56F801 Signal Connection Signal 1 ADC reference supply VREF Vppa 2 User POT R12 to ADC ANA6 R12 wiper 3 Crystal oscillator isolation XTAL GPIOB3 GPIO SERIAL pin 4 Technical Summary Rev 0 Freescale Semiconductor Table 2 1 CUT_AWAY Options Continued CUT_AWAY Description 56F801 Signal Connection Signal Crystal oscillator isolation EXTAL GPIOB2 GPIO SERIAL pin 3 COM1 serial port TXDO GPIOO U8 pin 11 COM1 TXD COMI serial port RXDO GPIOB1 U8 pin 12 COM1 RXD Microphone to ADC ANA2 U7 pin 4 Microphone output 2 2 PORTS AND CONNECTORS 2 2 1 PWR Jack This connector provides power input to the board by default Th
11. n and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s tech nical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affili ates and distributors harmless against all claims costs damages and expens es and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent re garding the design or manufacture of the part e Eg Z freescale semiconductor Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc All other product or service names are the property of their respective
12. ndicator 10 User Indicators User Potentiometer R12 Microphone with amplifier Crystal Reference Y 1 All components may not be installed at the factory The user may install the components to apply associated feature The 56F800 Demonstration Board is detailed in Figure 1 1 Introduction Rev 0 Freescale Semiconductor 10000 Figure 1 1 56F800 Demonstration Board User s Manual Rev 0 56F800 Demonstration Board 1 Leg 3 3V VDDA SSC e e el o VIN OMA 6 EM BS CTS Y RTS PWR C16 I Bm Bies O LN VRI iin HI e 9 Up sp3232 ve MEM HE e 9 9 Ilii E ac II mmc e 9 95 C14 C15 R14 POWER C8 C7 RI ee 00 88 BE EE 8 i i i gei ma mm RESET o 0 E cis ci BN IN E i i 1 U7 EM R310 E mn Banca R22 a80 R32 B m BH as
13. owners This product incorporates SuperFlash technology licensed from SST O Freescale Semiconductor Inc 2005 All rights reserved DSP56F800DBUM Rev 0 9 2005
14. pConfig argument applications variables defined in the C header directives file aec h code snippets APIs in text Bold Reference sources efer to the Target Bold paths ing DSP56F80x Plat emphasis form manual See C Program Files Embedded SDK help tutorials Blue Text Linkable refer to Chapter 7 Blue Text License Number Any number is consid 3V Number ered a positive value 10 unless preceded bya Des minus symbol to sig nify a negative value ALL CAPITAL LET defines define ALL CAPITAL LETTERS TERS defined constants INCLUDE_STACK_CH ECK Brackets Function keys by pressing function key F7 Brackets 56F800 Demonstration Board User s Manual Rev 0 Freescale Semiconductor Cautionary Notes 1 Electrostatic Discharge ESD prevention measures should be applied whenever handling this product ESD damage is not a warranty repair item 2 EMC Information on the 56F800 Demonstration Board a This product as shipped from the factory with associated power supplies and cables has been tested and meets with requirements of CE and the FCC as a CLASS A product b This product is designed and intended for use as a development platform for hardware or software in an educational or professional laboratory c Ina domestic environment this product may cause radio interference in which case the user may be required to take adequate prevention meas
15. reface Rev 0 Freescale Semiconductor Definitions Acronyms and Abbreviations Definitions acronyms and abbreviations for terms used in this document are defined below for reference ADC Analog to Digital Converter CTS Clear To Send ESD Electrostatic Discharge GPIO General Purpose Input and Output Port JTAG Joint Test Action Group A bus protocol interface used for test and debug ONCE On Chip Emulation a debug bus and port created by Freescale to enable designers to create a low cost hardware interface for a professional quality debug environment PC Personal Computer POT Potentiometer PWM Pulse Width Modulation RTS Request To Send References The following sources were referenced to produce this manual DSP56800 Family Manual DSP56F80x User s Manual Technical Data 56F801 16 Bit Digital Signal Controller 56F800 Demonstration Board User s Manual Rev 0 6 Freescale Semiconductor Chapter 1 Introduction The 56F800 Demonstration Board is used to demonstrate the abilities of the 56F800 family and to provide a hardware tool allowing the development of applications that use the 56F800 devices 1 1 56F800 Demonstration Board Features 56F801FA60 60 MHz version RESET Switch IRQ Switch GPIO SERIAL Port 10 pin TIMER PWM Port 10 Pin ADC Port 10 Pin JTAG OnCE Port 14 pin Host JTAG Port P1 DB25P COMI Port SCI to RS232 DB9S PWR Jack supply connector Power Port Power I
16. ures d Attaching additional wiring to this product or modifying the products operation from the factory default as shipped may effect its performance and also cause interference with other apparatus in the immediate vicinity If such interference is detected suitable mitigating measures should be taken Terminology This development board applies option selection jumpers Terminology for application of the option jumpers is as follows Jumper on in or installed jumper is a plastic shunt that fits across 2 pins and the shunt is installed so that the 2 pins are connected with the shunt Jumper off out or idle jumper or shunt is installed so that only 1 pin holds the shunt no 2 pins are connected or jumper is removed It is recommended that the jumpers be idled by installing on 1 pin so they will not be lost This development board applies CUT AWAY option selections These option selections apply surface mount resistor locations with a printed circuit board trace connecting both component pads This type connection places an equivalent 0 ohm type resistor in series with the I O signal and the user component or I O connector on the board These connections maybe cut with a razor blade or similar type knife between the component pads to isolate the default connection provided Reconnection of the cut away type pads can be made by either installing a 0 ohm 0805 size surface mount resistor or a small wire jumper on the component pads P
17. uter s LPT or Printer port The HOST ENABLE option jumper must be installed for this port to operate 1 14 P1 HOST JTAG connector is a DB25 Reset in 2 15 Pin8 tie pin connector Signals are organized for direct connection to an IBM compatible TMS EE END PC with a straight through DB25 cable TCK 4 17 TDI 5 18 GND Pin 7 DE signal if supported can be TRST 6 19 GND enabled by installing R23 51 ohms DE Note R23 7 20 GND Pin 15 tie 8 21 GND 9 22 GND 10 23 GND TDO 11 24 GND 12 25 GND P CON 13 Note HOST_ENABLE option must be installed to apply this connector 2 3 USER FEATURES Several circuits are provided for demonstration of 56F800 applications 56F800 Demonstration Board User s Manual Rev 0 4 Freescale Semiconductor Indicators 2 3 1 MICROPHONE A microphone with audio amplifier is provided on the 56F800 Demonstration Board for user applications The amplifier provides low pass filtering starting at 4000Hz for speech input The audio signal from the microphone amplifier is provided to the ADC ANA2 input channel via CUT AWAY option 7 2 3 2 POTENTIOMETER POT R12 The user POT R12 provides a 0 to 3 3V adjustable analog input to the 56F801 s ADC ANA6 channel R12 can be removed from the ANA6 channel by CUT AWAY option 2 2 4 Indicators User indicactions are provided that are active with a high level on the associated 56F801 device s I O port Table 2 2 details the indicators
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