TDA8787A Interface front end board camera CAMDEMO 8787A
Contents
1. TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 CD O m RE gt C 2 a 2 O LA yu O ero 19 es E Boo SS BSO 2 Fo s 5 i E 00 Te hey mn A D Mo peli T Sea S lt ssa gt 0D O zsa JJ Bo noe m aj ad 3 NO a Esa L DO ol l BAA o amp CT BROT EN RASE 7 1 eas CO ES mi Lalo den E CK GA ica O Sen O T 820 ten O gt MA o sea O A 2 LI LI au zza O CUS aan a Uy 5 ven O Nej Ban O O _ ec lt L ESE SEME U 389 5 mi e o i go Me O FAO ET IN aot 00 I a 29 pa KOO eso L C J a lt L NYA wa Lert O O Figure 9 components implementation lower side 26 Philips Semiconductors 1 2 3 4 TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 5 REFERENCES Application Note AN97037 May 1992 Camera evaluation board documentation SDA8112 TDA8786 Author Stephane Desproges Addendum to AN97037 June 1997 Camera I C controller software documentation and user manual Author J rgen Krehnke Caen Team Design Internal Note Authors S Jacquet R Morisson Software for TDA8787A version V3 12 Modification of V3 11 for TDA8786 by C Kohler2. Hex 4 5dB Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bitl BitO dec Gain SD8 SD7 SD6 SDS SD4 SD3 SD2 SDI SDO 000 OdB JO 0 0 0 0 0 0 0 0 0 040 6dB JO 0 1 0 0 0 0 0 0 64 080 12dB 0 1 0 0 0 0 0 0 0 128 OCO 18dB 0 l l 0 0 0 0 0 0 192 100 24dB 1 0 0 0 0 0 0 0 0 256 13F 30dB 1 0 0 1 1 1 1 1 1 319 180 36dB 1 1 0 0 0 0 0 0 0 383 13 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 1 5 3 Control pulses polarity settings Serial address A1AO 11 SDO 1 SHP SHD active level HIGH SD1 1 CLK active edge RISING SD2 0 CLPDM always active level LOW SD3 1 CLPOB active level HIGH SD4 not used SD5 1 PBK active level HIGH SD6 0 VSYNC active edge RISING 14 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 2 POWER AND GROUNDING RECOMMENDATIONS When designing a printed circuit board for application such as PC camera surveillance cameras camcorders and digital still cameras care should be taken to minimize the noise For the front end integrated circuit the basic rules of printed circuit board design and implementation of analog components such as classical operational amplifiers must be respected particularly for power and ground connections Firstly in all cases we recommend to link the following pins o
3. Just after the power on action a message must be transmitted via the serial interface to the TDA8787A internal registers to set a correct working configuration Maximum frequency 5MHz A writing sequence of a serial message is made of 10 data bit 2 address bit A1 A0 SD9 SD8 SD2 SD1 with A1 bit first sent VSYNC signal can be used to synchronize the registers writing with the Vertical Drive VD signal in order to set all the parameters only after a complete image has been displayed The polarity settings are excluded from the VSYNC latch In some applications this signal can be linked to SEN signal when the firmware takes account of VD ot XAOS OR VSYNC 12 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 1 5 Internal registers The configuration register is programmed to set the reguested conditions PGA gain control OFD output control ADC clamp reference control be careful SD7 SD8 and SD9 must be set to 0 Controls pulse polarity settings for SHP SHD CLAMP s PBK and CLK Timing and polarity settings of all these signals active edge or level are given in details in TDA8787A specification and can be summarized in the following tables 1 5 1 OFD function Serial address A1A0 01 Dec hex Typical Value of OFD out 0 00 0 0V 255 ff 1 0 V 1 5 2 PGA gain control Serial address A1A0 00 SD9 0
4. 0 1d zan td bon E ld Son ONO ONO JNINNId AOLOANNOD lt P ASt ASt OND 11007 S2 OND DA Ez OND OH iz ONO 6 VIVO 61 ONO 8 VIVO LI ONO viva SI OND 9 vivo ONO S vivo DNO b viyo ONO E vivo ONO 2 vivo OND 1 VLVO ONO o vivo rajale sloje telel lele lois CFE dl ONINNId dOLJJNNOJ P bir mA i isa Dee pi bo sista g VZ8L8VOL a EE a A Mi jh VEZ 1 50 KA ml PA Sa 11 o 24 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 Figure 7 Electrical schematic DE 2
5. C gt U IRA U l 9 S x O x F gt v DS Q LJ llo SO 13 sijem ISO Oo8 DN 27 o 9ido 0 HOU Ds Li a hay K zo p 2902 o gt ola Ll sa lt L X oO O to Li O o To o a o x a Le ol a De via Dz e i o ET 2 YA O ely lt L NE O zid Y 29 EI lia O O 94 Eq oly ian z O GE 8 m WA 298 dE e 19 19 WA LJ 9 gt CD 3 se s za Dy 198 Li O OT O z PS pou lt L m BA 00 9 gt CO A Fr Lil C T gt O U m lt L CD Figure 8 Components implementation upper side 25 Philips Semiconductors
6. and H Jacquemin 27 Philips Semiconductors TDA8787A Interface Front End Board Camera Camdemo 87A 6 LIST or FIGURES Figure 1 CCD signal path Application Note AN 00012 Figure 2 Typical CCD signal Figure 3 CDS block diagram Figure 4 Input Clamp DC Restoration 10 Figure 5 Grounding connections 16 Figure 6 Optical filter 21 Figure 7 Electrical schematic 25 Figure 8 Components implementation upper side 25 Figure 9 components implementation lower side 26 28
7. data for EEPROM P1 3 PPR OEN TDA8787A Output Enable Not P1 5 TVMD PPG mode select P1 6 SCLM I2C bus clock for MMI P1 7 SDAM PC bus data for MMI P2 0 PP_STDBY TDA8787A standby pin P2 1 ACLXP PPG internal reset all clear P2 2 EEUD PPG Electric Ezposure 2 P2 3 EENR PPG Electric Ezposure 3 P2 4 SMD1 PPG Shutter control 1 P2 6 POR POR for DSP P3 0 SNDA SNERT bus data for DSP P3 1 SNCL SNERT bus clock for DSP P3 2 VD VD interrupt input P3 6 FI PPG Field Index P3 7 SNRST SNERT bus reset for DSP 20 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 3 2 Electrical diagrams Reported in enclosures 3 3 Optical mechanical block In the front of the TDA8787A there is a CCD sharp LZ2413 which is a type solid state image sensor having 542 498 pixels This CCD is compatible with the NTSC standard For a PAL application this CCD can be changed and directly replaced by the LZ2423 CCD type but in this case the guartz oscillator must be also changed 19 06993 MHz is used for NTSC standard 19 3125 MHz is used for PAL standard In the same time the declaration of NTSC or PAL standards must be swapped in the setting of the DSP program and all parameters concerning the active and black windows pixels must be updated It can be done with the Graphic User Interface GUI developed in our US laboratory to demonstrated the SAA8112 possibilities Reference N 2 In the fron
8. new TDA 8787A circuit improves the global performance of the basic application more simple connection with the PPG lower noise possible choice of the pulse polarity by software lower power consumption and less external components 18 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 3 1 Interface connector pinning In the description list below and in the IFE diagram DS DSP SAA8112 UC micro controller implemented in the SAA8112 EE Eeprom JB I2C UART connector JD digital output connector Names on connector 1 5 V 2 45 V 3 GND 4 GND gt UCS P1 3 6 UC4 P1 2 7 UC2 P1 0 8 CLK1 9 CLK2 10 VD UCI4 P3 2 11 UC7 P1 5 PAL NTSC 12 HD UCI6 P3 4 13 UC29 P2 5 14 FI UC18 P3 6 15 UC28 P2 4 16 GND 17 UC27 P2 3 18 45 V n u 19 UC26 P2 2 20 UC25 P2 1 21 P1 INPUT 22 SMPS 23 PO INPUT 24 DATA 9 25 DATA 8 26 DATA 7 27 DATA 6 28 5V nu 29 DATA 5 30 GND 31 DATA 3 32 DATA 4 33 DATA 1 34 DATA 2 35 SCLK INPUT 36 DATA 0 37 SDATA INPUT 38 SEN 39 STAND BY TDA 40 DACOUT 41 GND 42 GND 43 5V 44 5 V 19 Philips Semiconductors TDA8787A Interface Front End Board Camera Camdemo 87A Names on micro controller Application Note AN 00012 BIT NAME DESCRIPTION P0 0 SCLE I2C bus clock for EEPROM PO 1 SDAE I2C bus
9. APPLICATION NOTE TDA8787A INTERFACE FRONT END BOARD CAMERA CAMDEMO 87A AN 00012 Philips PHILIPS Semiconductors Ez Philips Semiconductors TDA8787A Application Note Interface Front End Board for Camera Camdemo 87A AN 00012 Summary This application note describes on the one hand how to use the TDA8787A On the other hand an example of application is given using an Interface Front End IFE board performed with a TDA8787A a 1 4 medium resolution Sharp CCD sensor and its companion circuits The front end board has been developed in such a way that it can be easily connected to an evaluation board of the Philips DSP family Associated with its sister DSP board built around the SAA8112 this IFE board gives an example of basic video camera application All rights are reserved Reproduction in whole or in part is prohibited without the prior consent of the copyright owner The information presented in this document does not form part of any guotation or contract is believed to be accurate and reliable and may be changed without notice No liability will be accepted by the publisher for any conseguence of its use Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights Philips Semiconductors TDAS8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 APPLICATION NOTE TDA8787A INTERFACE FRONT END BOARD CAMERA CAMDEMO 8787A Auth
10. amera Camdemo 87A AN 00012 Never use a digital ground plane under analog wires and analog ground plane under digital connections TDA8787A Analogue Figure 5 Grounding connections On the printed board area loop of supply current and impedance of different ground connections must be minimized the de coupling capacitors C ceramic capacitor must be placed as close as possible to the VCCA and VCCD pins Series inductors in power supply lines may be used to improve de coupling E g 1 5 uh or BLM components Using above de coupling scheme both analog and digital supplies can be connected together to a single stable 5 volt supply Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 3 FRONT END TYPICAL APPLICATION The front end IC TDA8787A used with one SAA 81XX of DSP Philips IC s family is the core of a high guality video application Image sensor vertical driver timing generator micro controller memories and DC DC converter are the others functions to build a modern CCD video camera A camdemo is made of two different boards An interface front end also called IFE board A digital processing board The whole camera is then made up with the following integrated circuits CCD sensor LZ 2413 for standard NTSC LZ2423 for PAL standard Vertical Driver VD LR36683 Pulse Pattern Generator PPG LZ95G55 Front End for analog processing and digitalizat
11. d Board Camera Camdemo 87A AN 00012 1 2 Timing diagram A typical input signal of CCD is depicted in Figure 2 in comparison with SHP SHD pulses the Sample amp Hold control pulses The CCD signal can be divided into three main parts the reset gate pulse the reset hold level floating gate or black level and the actual video level Figure 2 Typical CCD signal CCD signal Input IN Th SHP Data out Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 Inside the TDA8787A there is a pipeline delay between the external SHP and SHD signals present at the inputs and the actual internal switch action which samples the CCD signal This delay is lower than 2 ns This delay has to be taken into account during the definition of an application diagram to make sure the video signal is correctly processed and no overlap exists between the different sampled periods black and active video and SHP SHD control pulses Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 1 3 Theory of operation 1 3 1 Correlated Double Sampling CDS Figure 3 shows the simplify block diagram of the TDA8787A s CDS The CDS is required in CCD systems as a mean for removing several types of noises With video information reset noise thermal noise 1 f noise generated are present at the CCD output signal Since part of low frequencies noises a
12. etween the input level and the desired reference level This reference level is programmed by the Serial Interface to set the desired black color Of course this black level offset is applied to both ways of the ping pong CDS This reference level is hold in the capacitors CPCDS1 amp 2 The calculation of these capacitors is fully dependent of the maximum ripple voltage acceptable and the pixel freguency The next formula can be used to calculate them fs f CPODS pig With Tier waa 3S0UA at PGA code 0 and Iya yaa LOMA at ripple PGA code 383 1 3 5 Input Blanking In many applications the IFE is exposed to large input signals mainly during the blanking period and in CCD shutter high speed mode To avoid problems with data processing the TDA8787A includes a blanking function When PBK is active the digital outputs go to the desired clamp reference level 1 3 6 OFDOUT function To control the substrate bias level of some CCD s in order to cancelled the smear effect the TDA8787A provides a voltage control output This analog output is controlled via the Serial Interface by a 8 bit Digital to Analog Converter The desired value is usually set during the calibration of the camera 11 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 1 4 Serial interface Communication with the configuration register is done through a Serial Interface SRI
13. g to the illumination of the scene observed In order to ensure that the maximum of the useful dynamic range of the ADC is used even under low light conditions the video signal is amplified using this programmable gain amplifier loop PGA The gain range is OdB 36dB The amount of gain is adjusted by settings resulting of computation in the DSP and transmitted back to the TDA8787A amplifier by the 3 wires serial interface 1 3 3 Input DC restoration or Input Bias Level Clamping The Figure 3 shows the input stage in a common application The buffered video signal passes through the external coupling capacitor Cin To restore the DC level to the desired baseline a clamping circuit is used during the dummy clamp period CLPDM Low In all applications we advice to enable this loop all the time CLPDM VCC Cin CLPOB Figure 4 Input Clamp DC Restoration 10 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 1 3 4 Black Level Clamping For a good signal processing the video signal must be referenced to a well established floating gate level or black level For this operation the common way is to used the CCD s optical black OB pixels usually at the beginning of the CCD lines as a calibration level It is strongly recommended to reserve at least 12 black pixels During this period CLPOB active the black level clamping measures the difference b
14. ion TDA8787A FE Digital Signal Processing and formatting DSP SAA8112 Video encoder SAA7102 Memory EEPROM PCD8594 In addition on the IFE schematic we find 2 simple small SMPS stages to transform the 5 volts power battery voltage into 15Volts and 8Volts needed to bias the CCD and Vertical Driver devices One transistor buffer stage to interface the CCD with the FE One non inverting amplifier stage to translate the OFDOUT signal of the FE to the FD input of the CCD One push pull stage to transform the OFDX signal of the PPG into a high voltage pulse command added to the OFD on the FD CCD input shutter function These boards are connected together by a connector in order to be able to mix different configurations of our circuits TDA87844SAA8112 or TDA8787A SAA8112 In a previous application note AN97037 evaluation board for camera more details can be found about the description of this concept This present application has been modified in the front end part only to become compatible with the TDA8787A circuit 17 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 For people non familiar with the DSP SAA81xx IC s family it is recommended to read this previous document to get better understanding of the DSP SAA8112 performance If there is no basic change for the system point of view due to the substitution of the TDA8784 by TDA8787A the use of
15. lies have several separated pins VCCA VCCD and VCCO Therefore special care must be taken when an application board is designed in order to avoid any external disturbing effect when using a non correct filtering circuit around these VCC s lines See Chapter 3 All digital inputs as Standby inputs STBY and Output Enable Not OE N are TTL logic level compatible In addition the outputs are CMOS level compatible No adaptation circuits has been reguired to interface output data with CMOS family circuit working under the same value voltage of power battery Here is the list of the main functions implemented Correlated Double Sampling circuit CDS Programmable Gain Amplifier PGA low power 10 bit Analog to Digital Converter integrated reference voltage regulator Serial Interface function for programming internal registers SRI 8 bit Digital to Analog Converter for extra external control function OFD Blanking interface Standby mode facilities The TDA8787A has a 18 MHz maximum clock frequency Philips Semiconductors TDA8787A Interface Front End Board Camera Camdemo 87A Here is the CCD signal path CLPDM L Ref IN CDS SHIFT PGA CLAMP CLPOB shifter Soe CT dac 7 bit Figure 1 CCD signal path Application Note AN 00012 BLK Philips Semiconductors TDA8787A Application Note Interface Front En
16. n the same good ground CPCDS1 CPCDS2 DCPLC WY The following additional recommendation is given for the CDS input pins which are internally connected to the programmable gain amplifier Secondly the connections between the CCD the CCD transistor interface and the CDS input should be as short as possible and a ground ring protection around these connections can be beneficial for noise performances To separate analog and digital supplies provides the best solution If it is not possible to do this on the board then the analog supply pins must be de coupled effectively from the digital supply pins If the same power supply and ground are used for all pins the de coupling capacitors must be placed as close as possible to the IC package In a two ground system in order to minimize the noise through package and die parasitic the following recommendations must be implemented All the analog and digital supply pins must be well de coupled to the analog ground plane Only the ground pins associated to the digital outputs must be de coupled to the digital ground plane The analog and digital ground planes must be connected together at one point close to the ground pin associated with the digital outputs The digital output pins and their associated lines should be shield by the digital ground plane which can be used then as return path for digital signal 15 Philips Semiconductors TDA8787A Application Note Interface Front End Board C
17. or s Dominique LOYER S amp A Caen France PRELIMINARY Keywords Imaging Camera Front end TDA8787A CCD Signal processor Date February 2000 Philips Semiconductors TDA8787A 1 1 General Description 1 2 Timing diagram 1 3 Theory of operation 1 31 1 3 2 1 3 3 1 34 1 3 5 1 3 6 1 4 Serial interface 1 5 Internal registers 1 5 1 1 5 2 1 5 3 3 2 Electrical diagrams 4 Enclosures 5 References Application Note Interface Front End Board Camera Camdemo 87A AN 00012 CONTENTS 1 IC Front end TDA8787A description 5 5 7 9 Correlated Double Sampling CDS 9 Programmable Gain Amplifier 10 Input DC restoration or Input Bias Level Clamping 10 Black Level Clamping 11 Input Blanking 11 OFDOUT function 11 12 13 OFD function 13 PGA gain control 13 Control pulses polarity settings 14 Power and grounding recommendations 15 Front end typical application 17 3 1 Interface connector pinning 19 21 3 3 Optical mechanical block _ 21 23 27 28 6 LIST of FIGURES Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 1 IC FRONT END TDA8787A DESCRIPTION 1 1 General Description The TDA8787A is a 3 3V 10 bit analog to digital interface for CCD cameras TDA8787A is a low power low supply voltage circuit which is able to operate from 2 7 volts to 3 6 volts Analog and digital supp
18. re assumed to be correlated both during the active part of the video and during the feed through major part of this noise can be cancelled by subtracting the feed through level from the video This classical technique known as Doubled Correlated Sampling uses SHP and SHD pulses to control the internal process of CDS The timings of the operation is describe in the Fig 344 in the TDA8787A s Data Sheet During SHP period the sample amp hold goes into the hold mode taking a sample of the reset level floating gate level including the noise At time SHD the second sample amp hold takes a sample of the video level At the end the result of this operation in the CDS is the generation of new signal which is now the true useful video level Vreset Vvideo Then this video level will be presented at the input of the digitally programmable gain amplifier tied down by DSP The TDA8787A actually uses two CDS circuits in a ping pong way This method reduces the bandwidth per stage as compared to a single channel CDS Thus the output from one of the two CDS is valid for an entire clock cycle A and B are often named odd and even pixels SHP A A y y SHD A A l to PGA a y IN SHP B B NM y SHD B B ZU y Figure 3 CDS block diagram 9 Philips Semiconductors TDA8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 1 3 2 Programmable Gain Amplifier The active video level varies accordin
19. t of the CCD there is a optical low pass filter from American KSS Inc This particular filter is currently being produced by this manufacturer under the reference OG BF389 3122 168 7514 0 the size of this infrared filter is 7 75 7 25 3 27 mm and must be introduced in the optical block as shown below Light from lens To CCD SSS Figure 6 Optical filter 21 Philips Semiconductors TDAS8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 In addition each kit is containing the following elements l piece CS mount interface piece under plate l piece CS mount ring l piece retaining ring l piece filter foan 2screws M2 5 The IFE kit can be delivered with CS CCTV lens coming from different suppliers Lens which generally are 4mm F 1 2 or 8 mm Fl 2 depending available material in stock Documentation on these elements are available on reguest 22 Philips Semiconductors TDAS8787A Application Note Interface Front End Board Camera Camdemo 87A AN 00012 4 ENCLOSURES 23 AN 00012 Application Note Interface Front End Board Camera Camdemo 87A Philips Semiconductors TDA8787A aN dus LSLEVOL pur quous SHWN_ ANY NOD AE ONO NI 1NO9W09 VOL ABNYLS NI NIS NI VIvOs O vivo NI 4195 2 vivo YLVO b LO E vivo ONO S vivo N N ASt 3 vivo L viva 8 VIVO 5595671 6 VLYO NI Od NI dHS NI Ld L 2d Se an 2 2d 8290 Nat Zd Leon ONO ed LON 14 S 2d 62 ON OH JSLN Wd Son DA ATN wa
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