TWR-K21D50M Tower Module User`s Guides
Contents
1. IRCLETEN CES sesiccessesnantie dens eerniniet uence 12 9 Revision history cece eeeeeeeeeseeeneeeneeeneeenees 13 1e 2015 Freescale Semiconductor Inc N freescale Primary Elevato Tower Plug In TWRPI Socket e Adds features and functionality e Can accept TWRPIs such as sensors and radios Controller Module Secondary Elevator e Tower MCU board e Works stand alone or in Tower System e Features integrated debugging interface for easy programming and run control via standard USB cable e Additional and secondary serial and expansion bus signals e Standardized serial assignments e Mounting holes and expansion connectors for side mounting peripheral boards Common serial and expansion bus signals Two 2x80 connectors for easy signal access and side mounting board Power regulation circuitry Standardized signal assignments Mounting holes e Adds features and functionality to your designs e Interchangeable with other peripheral modules and compatible with other controller processor modules e Examples include serial interface e Approximately 3 5 H x 3 5 W x 3 5 D when fully assembled Board Connectors memory Wi Fi graphical LCD motor control audio Xtrinsic e Four card edge connectors sensing and high precision e Uses PCI Express connectors x16 90 analog modules mm 3 5 long 164 pin Figure 1 Freescale tower system overview 2 Contents The TWR2. K21D50M contents include TWR K21D50M board assembly 3 ft A to micro B USB cable for debug interface and power J2 or MK21D 512 KB MCU s USB interface J19 CR2025 coin cell battery for VBAT power supply Quick start guide TWR K21D50M features e Tower compatible microcontroller module TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc e MK21D 512 KB MCU MK21DN512AVMC5 or MK21DN512VMC5 50 MHz 512 KB Flash 64 KB RAM low power 121 MAPBGA package part number will depend on the Tower board revision e Dual role USB interface with Micro AB USB connector e General purpose Tower Plug in TWRPI socket e On board debug circuit MC9SO8JM60 open source JTAG OSJTAG with virtual serial port e Three axis accelerometer MMA8451Q e Four 4 user controllable LEDs e Two 2 user pushbutton switches for GPIO interrupts e One 1 user pushbutton switch for MCU reset e Potentiometer e Independent battery operated power supply for Real Time Clock RTC and tamper detection modules Note The TWR K21D50M contains some components that are reserved for future revisions of this board and are not functional with the MK21D 512 KB MCU TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc 3 4 Getto know the TWR K21D50M Primary OSJTAG Bootloader JTAG VBAT Options JM60 BDM Connector Selection General Power OSJTAG Purpose Micro USB TWRPI Plug In Regula
3. C9S08JM60 based Open Source JTAG OSJTAG circuit provides a JTAG debug interface to the K21D 512 KB MCU A standard USB A male to micro B male cable provided can be used for debugging via the USB connector J2 The OSJTAG interface also provides a USB to serial bridge Drivers for the OSJTAG interface are provided in the P amp E Micro OSBDM OSJTAG Tower Toolkit These drivers and more utilities can be found online at pemicro com Cortex Debug connector The Cortex Debug connector is a 20 pin 0 05 connector providing access to the SWD JTAG cJTAG and EzPort signals available on the K21 device The pinout and K21 pin connections to the debug connector J1 are shown in Table 2 Table 2 Cortex debug connector Pin Function TWR K21D50M connection FS FS e 1007 SHO PIARUARTOTRIFTHO_CHTUTAGTDOTRAGE SWORZPDO E 7 E e E a PTA1 UARTO_RX FTMO_CH6 JTAG_TDI EZP_DI a a ae TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc 9 6 6 Accelerometer An MMA8451Q digital accelerometer is connected to the K21D 512 KB MCU through an FC interface C1 and GPIO IRQ signals PTBO and PTB1 6 7 Potentiometer pushbuttons and LEDs The TWR K21D50M also features e A potentiometer connected to an ADC input signal ADCO_SE12 e Two pushbutton switches SW2 and SW3 connected to PTC7 and PTC6 respectively e Four user controllable LEDs connected to GPIO signals optionally isolated using jumpers o Gree
4. Freescale Semiconductor Inc Document Number TWRK21D50MUM User s Guide Rev 2 01 2015 TWR K21D50M Tower Module by Ronald Kim Contents 1 TWR K21D50M T TWR K21D50M oe eceneeecetecneeeeeeeeneeenees 1 2 CONES s 2552 sateinsisscenttcsiucathisaetivessuacdds wiedete nies 2 The TWR K21D50M microcontroller module is designed to work either in standalone mode or as 3 TWR K21D50M features cccccceeeeeeeeeeeee 2 part of the Freescale Tower System a modular 4 Get to know the TWR K21DS50M 3 development platform that enables rapid prototyping 5 Reference documents si ssccrsacissarnencnccrrantndinrrnentics 5 and tool re use through reconfigurable hardware 6 Handwans desoupiion 5 i akeyenrdesiento beneri lerla beaa CRO erent constructing your Tower System today by visiting 6 1 Microcontroller sssr 6 www freescale com tower for additional Tower 6 2 Clocking sincnnescenninire nna 8 System microcontroller modules and compatible 6 3 System POWEL cee eeeceeeeeeeeeeeeeeeeeeeeeeees 8 peripherals For TWR K21D50M specific seat 6 4 Debug interface ee eeeeeeeeeeeeeees 9 information and updates visit www freescale com TWR K21D50M 6 5 OSITA Gi cistern R 9 6 6 Accelerometer 10 6 7 Potentiometer pushbuttons and LEDs 10 6 8 General Purpose Tower Plug in TWRPI SOCKET ssi csheislsiistes teistsati hice lelvessteastastiavnossiee 10 69 USB sekoa Ae e i 11 7 TWR K21D50M jumper options and headers 11
5. JTAG board power selection VBAT power source Connect VBAT to the higher voltage between MCU supply MCU_PWR or coin cell supply VBATD Connect on board 3 3 V or 1 8 V supply V_BRD to MCU VDD Connect K21 USB regulator output to MCU VDD OSJTAG bootloader mode OSJTAG firmware reprogramming 2 3 Cs MCU power connection 2 3 Ex o 1 N OSJTAG bootloader selection OFF Debugger mode i S Connect on board 1 8 V or 3 3 V supply V_BRD to TW RPI 3 V power GPT_VBRD Disconnect on board 1 8 V or 3 3 V supply V_BRD from TWRPI 3 V power GPT_VBRD OSJTAG 5V output P5V_TRG_USB connected to on board regulator input VREG_IN VBUS signal on micro USB connector J19 connects to K21_VREGIN to allow stand alone USB operation General Purpose TW RPI J10 V_BRD power enable J11 VREG IN Selector VBUS signal from Tower Elevator connector connects to K21_VREGIN to allow Connect potentiometer to ADCO_SE12 e z Potentiometer connection J12 OFF Disconnect potentiometer from ADCO_SE12 1 2 Connect PTA14 to RESET _OUT_B signal GPIO RESET_OUT_B J13 Connection Connect PTA17 to RESET _OUT_B signal 2 3 Leave RESET_OUT_B signal disconnected Connect PTD4 to green LED D5 Connect PTD5 to yellow LED D6 LED connections ats Connect PTD6 to red LED D8 Connect PTD7 to blue LED D9 Disconnect PTD 4 7 from associated LED Connect K21 USB regulator output VOUT_3V3 to o
6. ameters including typicals must be validated for each customer application by customer s technical experts Freescale does not convey any license under its patent rights nor the rights of others Freescale sells products pursuant to standard terms and conditions of sale which can be found at the following address freescale com SalesTermsandConditions Freescale the Freescale logo and Kinetis are trademarks of Freescale Semiconductor Inc Reg U S Pat amp Tm Off Tower is a trademark of Freescale Semiconductor Inc Al other product or service names are the property of their respective owners ARM and Cortex are registered trademarks of ARM Limited or its subsidiaries in the EU and or elsewhere All rights reserved 2015 Freescale Semiconductor Inc Document Number TWR K21D50MUM Rev 2 01 2015 KY freescale
7. ast access times high reliability and four levels of security protection 64KBof SRAM No user or system intervention to complete programming and erase functions and full operation down to 1 71 V Mixed signal capability High speed 16 bit ADC with configurable resolution Single or differential output modes for improved noise rejection 500 ns conversion time achievable with programmable delay block triggering Two high speed comparators providing fast and accurate motor over current protection by driving PW Ms to a safe state Optional analog voltage reference provides an accurate reference to analog blocks and replaces external voltage references to reduce system cost Performance 50 MHz ARM Cortex M4 core with DSP instruction set single cycle MAC and single instruction multiple data SIMD extensions Up to four channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput Crossbar switch enables concurrent multi master bus accesses increasing bus bandwidth Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines Timing and control Three FlexTimers with a total of 12 channels Hardware dead time insertion and quadrature decoding for motor control Carrier modulator timer for infrared waveform generation in remote control applications Four channel 32 bit periodic int
8. ble on permicro com e SEGGER The Embedded Experts available at segger com 9 Revision history Table 5 Revision history Revision number Substantial changes 1 0 Jul 2012 Initial release 1 1 Mar 2014 Updated part number to include Rev 2 MK21DN512AVMC5 2 Jan 2015 Updated board images and details for USB switch feature added JP1 and J23 TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc 13 How to Reach Us Information in this document is provided solely to enable system and software implementers to use Freescale products There are no express or implied copyright freescale com licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document Home Page Web Support freescale com support Freescale reserves the right to make changes without further notice to any products herein Freescale makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating par
9. clic redundancy check CRC engine validates memory contents and communication data increasing system reliability Independently clocked COP guards against clock skew or code runaway for fail safe applications such as the IEC 60730 safety standard for household appliances External watchdog monitor drives output pin to safe state for external components in the event that a watchdog timeout occurs Included in Freescale s product longevity program with assured supply for a minimum of 10 years after launch 6 2 Clocking Kinetis K Series MCUs start up from an internal digitally controlled oscillator DCO Software can enable the main external oscillator EXTALO XTALO if desired The external oscillator resonator can range from 32 768 KHz up to 32 MHz An 8 MHz crystal is the default external source for the MCG oscillator inputs XTAL EXTAL A 32 768 kHz crystal is connected to the RTC oscillator inputs by default By populating isolation resistors other external clock sources for the K21D 512 KB MCU include the CLKINO signal which can be provided through the TWR ELEV module or pin 20 of TWRPI connector J3 6 3 System power When installed into a Tower System the TWR K21D50M can be powered from either an on board source or from another source in the assembled Tower System In standalone operation the main power source 5 0 V for the TWR K21D50M module is derived from either the OSJTAG USB micro B connector J2 or t
10. errupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block Connectivity and Full Speed USB Device Host On The Go with device charge detect capability communications Optimized charging current time for portable USB devices enabling longer battery life USB low voltage regulator that supplies up to 120 mA off chip at 3 3 volts to power external components from 5 volt input Four UARTs o one UART that supports RS232 with flow control RS485 ISO7816 and IrDA o three UARTs that support RS232 with flow control and RS485 One Inter IC Sound I S serial interface for audio system interfacing Two DSPI modules and two I C modules TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc Reliability safety and Hardware encryption co processor for secure data transfer and storage Faster security than software implementations with minimal CPU loading Supports a wide variety of algorithms DES 3DES AES MD5 SHA 1 SHA 256 System security and tamper detection with secure real time clock RTC and independent battery supply Secure key storage with internal external tamper detection for unsecured flash temperature clock and supply voltage variations and physical attack detection Memory protection unit provides memory protection for all masters on the crossbar switch increasing software reliability Cy
11. he K21D 512 KB MCU USB micro AB connector J19 Two low dropout regulators provide 3 3 V and 1 8 V supplies from the 5 0 V input voltage Additionally the 3 3 V regulator built into the K21DN512AVMC5 MCU can be selected to power the 3 3 V bus All of the user selectable options can be configured using two headers J11 and J17 Refer to sheet 5 of the TWR K21D50M schematics for more details DryIce and RTC VBAT The DrylIce tamper detection module and the Real Time Clock RTC module on the K21D 512 KB MCU have two modes of operation system power up and system power down During system power down the tamper detection module and the RTC are powered from the backup power supply VBAT and electrically isolated from the rest of the MCU The TWR K21D50M provides a battery receptacle for a coin cell battery that can be used as the VBAT supply This receptacle can accept common 3 V lithium coin cell batteries that are 20 mm in diameter TWR K21D50M Tower Module User s Guide Rev 2 01 2015 8 Freescale Semiconductor Inc 6 4 Debug interface There are two debug interface options provided the on board OSJTAG circuit and an external ARM JTAG connector The ARM JTAG connector J1 is a standard 2x10 pin connector that provides an external debugger cable access to the JTAG interface of the K21D 512 KB MCU Alternatively the on board OSJTAG debug interface can be used to access the debug interface of the K21D 512 KB MCU 6 5 OSJTAG An on board M
12. n LED D5 to PTD4 o Yellow LED D6 to PTDS o Red LED D8 to PTD6 o Blue LED D9 to PTD7 6 8 General Purpose Tower Plug in TWRPI socket The TWR K21D50M features a socket J3 and J4 that can accept a variety of different Tower Plug in modules featuring sensors RF transceivers and other peripherals The General Purpose TWRPI socket provides access to FC SPI IRQs GPIOs timers analog conversion signals TWRPI ID signals reset and voltage supplies The pinout for the TWRPI Socket is defined in Table 3 Table 3 General purpose TWRPI socket pinout J4 J3 Pin Description Pin Description 1 5 V VCC 1 GND 2 3 3 V VCC 2 GND 3 GND 3 2C SCL 4 3 3 V VDDA 4 C SDA 5 VSS Analog GND 5 GND 6 VSS Analog GND 6 GND 7 VSS Analog GND 7 GND 8 ADC Analog 0 8 GND 9 ADC Analog 1 9 SPI MISO 10 VSS Analog GND 10 SPI MOSI 11 VSS Analog GND 11 SPI SS 12 ADC Analog 2 12 SPI CLK 13 VSS Analog GND 13 GND 14 VSS Analog GND 14 GND 15 GND 15 GPIO GPIOO IRQ 16 GND 16 GPIO GPIO1 IRQ TWR K21D50M Tower Module User s Guide Rev 2 01 2015 10 Freescale Semiconductor Inc J4 J3 Pin Description Pin Description 17 ADC TWRPI ID 0 17 UART UART_RX or GPIO GPIO2 18 ADC TWRPIID 1 18 UART UART_TX or GPIO GPIO3 19 GND 19 UART UART_CTS or GPIO GPIO4 Timer 20 Reset 20 UART UART_RTS or GPIO GPIO5 Timer 6 9 USB The K21D 512 KB MCU feat
13. n board supply V_BRD V_BRD power source J17 Connect 3 3 V on board regulator output P3V3 Board Power Selector to on board supply V_BRD 5 7 Connect 1 8 V on board regulator output P1V8 to on board supply V_BRD TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc Table 4 TWR K21D50M jumper options cont Option Jumper Setting Description 1 2 Connect PTBO to INT1 pin of accelerometer Accelerometer IRQ connection J18 3 4 Connect PTB1 to INT2 pin of accelerometer OFF Disconnect PTBO and or PTB1 from INT1 and or INT2 of accelerometer ON Connect PTD7 to USB ID pin OFF Disconnect PTD7 from USB ID pin Connect PTC9 to USB power enable on power USB power enable switch MIC2026 fum Disconnect PTC9 from USB power enable on power switch MIC2026 Connect PTC8 to over current flag on power switch USB over current flag ulge0e6 ace Disconnect PTC8 from over current flag on power switch MIC2026 USB Micro J19 USB switch famm USB Mini J14 on TWR SER Some versions of the board may not have this option USB ID connection 8 References e Kinetis MCUs based on ARM Technology available on freescale com Kinetis K21 50 MHz MCU Tower System Module document ID TWR K21D50M available on freescale com e CodeWarrior Development Tools available on freescale com e TAR Systems product available on iar com e P amp E Microcomputer System availa
14. ough a single micro USB connector The block diagram of the TWR K21D50M board is presented in the following figure Tower Elevator Expansion Connectors PS SPI PC ADC USB PWM UARTs FTM oie 1 8V 8 MHz XTAL 32 768 kHz XTAL MENO MEEO D i D GPIO Interrupts LLWU EWC VBAT RTC Drylce Tamper Drylce Tamper Receptacle Pins SPI IC ADC GPIO g General Purpose Tower Plug in Potentiometer TWRPI Si Freescale Device Sy External Connectors fis Interface Circuits BS Power Figure 4 Block Diagram of TWR K21D50M 6 1 Microcontroller The TWR K21D50M features the K21D 512 KB MCU This 50 MHz microcontroller is part of the Kinetis K2x family and is implemented in a 121 MAPBGA package Table 1 explains some of the features of the K21D 512 KB MCU TWR K21D50M Tower Module User s Guide Rev 2 01 2015 6 Freescale Semiconductor Inc Table 1 Features of K21D 512 KB MCU Feature Description Ultra low power 11 low power modes with power and clock gating for optimal peripheral activity and recovery times Full memory and analog operation down to 1 71 V for extended battery life Low leakage wake up unit with up to six internal modules and sixteen pins as wake up sources in low leakage stop LLS and very low leakage stop VLLS modes Low power timer for continual system operation in reduced power states Flash and SRAM 512 KB flash featuring f
15. tor Option Selector A Potentiometer RESET i LEDs K21 Micro USB gt Bi Accelerometer SW3 SW2 MK21D MCU Secondary Tamper Pins USB Switch Connector Figure 2 Front side of TWR K21D50M module Note TWRPI devices are not represented in Figure 2 TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc 5 Battery Receptacle til y J8 2 DM UH Figure 3 Back side of TWR K21D50M Reference documents The documents listed below should be referenced for more information on the Kinetis K series Tower system and MCU modules These can be found in the documentation section of www freescale com TWR K21D50M or www freescale com kinetis 6 TWR K21D50M SCH schematics TWR K21D50M PWA design package K21P121M50SF4RM or K21P121M50SF4V2RM reference manual Tower configuration tool Tower mechanical drawing Hardware description The TWR K21D50M is a Tower MCU module featuring the K21D 512 KB MCU a Kinetis K series microcontroller in a 121 MAPBGA package with a USB 2 0 full speed on the go OTG controller system security and tamper detection and a secure real time clock with an independent battery supply It is intended for use in the Freescale Tower System but can also operate stand alone An on board TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc 5 OSJTAG debug circuit provides a JTAG interface and a power supply input thr
16. ures a full speed low speed USB module with OTG Host Device capability and built in transceiver The TWR K21D50M routes the USB D and D signals from the MCU via J24 jumper either to the on board micro AB USB connector J19 or to the mini AB USB connector J14 on the TWR SERIAL tower board Some versions of the board may not have this option A power supply switch with an enable input signal and over current flag output signal is used to supply power to the USB connector when the K21D 512 KB MCU is operating in host mode PTC8 is connected to the flag output signal and PTC9 is used to drive the enable signal Both PTC8 and PTC9 port pins can be isolated with jumpers J23 and J22 respectively if needed 7 TWR K21D50M jumper options and headers Table 4 provides the list of all the jumper options available on TWR K21D50M board The default jumper settings are highlighted in black WAOE We Evel LEA E TWR K21D50M Tower Module User s Guide Rev 2 01 2015 Freescale Semiconductor Inc 11 Table 4 TWR K21D50M jumper options Option Jumper Setting Description JP1 T aa JP1 1 through JP1 6 are connected to the MCU Tamper pins TAMPERO TAMPERS respectively Tamper connections Connect OSJTAG 5V output P5V_TRG_USB to JTAG port Supports powering board from JTAG pod supporting 5V supply output Disconnect OSJTAG 5V output P5V_TRG_USB from JTAG port Connect VBAT to on board 3 3 V or 1 8 V supply O
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