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1.                                                                  Modes  typical power consumption  Avg  Unit  Page inquiry scan  with deep sleep  no external LPO 2 6 mA  Page inquiry scan  with deep sleep  with external LPO 520 HA  5 5 I O operating characteristics  Table 5  1 O operating characteristics  Symbol Parameter Min  Max  Unit Conditions  ViH High level input voltage 1 4   V Vin  2 1 V  VoL Low level output voltage 5 0 4 V Vin  2 1 V  Vou High level output voltage 1 8   V Vin  2 1 V  lo Low  level output current   4 0 mA VoL   0 4 V  loH High level output current   4 0 mA Vou   1 8 V  Rpy Pull up resistor 80 120 kQ Resistor turned on  Rpp Pull down resistor 80 120 KQ Resistor turned on  5 6 Selected RF characteristics    Table 6  Selected RF characteristics    Parameters Conditions Typical   Unit       Antenna load 50 ohm       Radio receiver          Sensitivity level BER  lt   001 with DH5  86 dBm  Maximum usable level BER  lt   001 with DH1 0 dBm  Input VSWR 2 511       Radio transmitter             Maximum output power 50 Q load 0 dBm  Initial carrier frequency tolerance 0 kHz  20 dB bandwidth for modulated carrier 935 kHz                   1  RF characteristics can be influenced by physical characteristics of final application     4    12 30 DoclD022833 Rev 6       SPBT2632C2A    Hardware specifications       5 7    Pin assignment    Figure 2  Pin connection             Size  11 6 mm x 13 5 mm x 2 9 mm  height tolerance    0 1 mm                                
2.                               13 5  3105  2  1 GPIO oi  2 GPIO o2  3 GPIO 03  4 GPIO 04 TOP VIEW  5 GPIO 05  6 GPIO 06  7GND   millimeters   AM11154v1  Table 7  Pin assignment  Name Type Pin  Description pasang in aa 5 V tolerant  UART interface  RXD l 13 Receive data Y  TXD O 14 Transmit data Y  RTS oluihat   send  acive  o SDA Ine y  low   os      Ba Y  Boot loader  Boot 0 l 9 Boot 0  Power and ground  Vin 8 Vin  GND 7 GND  Reset  Reset input  RESEETN l 10  active low for  5ms    ST DocID022833 Rev 6 13 30       Hardware specifications    SPBT2632C2A       Table 7  Pin assignment  continued        LPO    Name    Type    15    Pin     Description    LPO  LPO input    Alt default  function    Alt full UART  function    5 V tolerant    2 5 V max       GPIO   general purpose input output       GPIO1    1 0    general  purpose  input output       GPIO2    1 0    general  purpose  input output    I2S SD    128 SD       GPIO3    1 0    general  purpose  input output    I2S CK    12S CK          GPIO4    1 0    general  purpose  input output    125_WS    125_WS       GPIO5    1 0    general  purpose  input output    12C SDA line  for apple chip       GPIO6    1 0     only O with Alt  function     6    general  purpose  input output    12C SCL line  for apple chip       GPIO7       I O       16    general  purpose  input output                   14 30    Please note that the usage of ALT function is dependent upon the firmware that is loaded into the module   and is beyond the scope
3.     7 6 1    Note     PCB layout guidelines    Figure 9  PCB layout guidelines       Application PCB    flooded ground  plane required   traces allowed         minimun traces  to these pins       i 6mm clear zone  surrounding antenna   no ground plane    no traces           AM12029v1       Reset circuit    Two types of system reset circuits are detailed below  The maximum voltage that can be  supplied to the RESET pin is 2 5 V  As shown in Figure 10 and Figure 11 the RESET is  active low  in absence of a reset circuit the pin is internally pulled up and therefore inactive     External reset circuit    Figure 10  External reset circuit         External  reset circuit    ee  cas         RESET PIN       1  I  I       0 1uF  Lo         4  4  p        AM12030v1             RPU ranges from 30 kQ to 50 kQ internally     DoclD022833 Rev 6 21 30       Hardware design    SPBT2632C2A       7 6 2    Note     7 17    22 30    Internal reset circuit       Figure 11  Internal reset circuit    10Kohm    dE    RESET PIN               AM12031v1          Rpy ranges from 30 k42 to 50 k2 internally   Rpsr should be from 1 KQ to 10 kQ     External LPO input circuit    An optional low power oscillator input may be added to allow Deep sleep and Sniff modes     e LPO parameters     Frequency  32 768 kHz  Tolerance      150 ppm typical      250 maximum  Absolute maximum supplied voltage at LPO pin   1 8V  VIL min max   0V  0 5V   VIH min max    1 47V  1 8   Input capacitance  2 5 pF maximum  e Configu
4.    Ces SPBT2632C2A  WI life qugmented    Bluetooth technology class 2 module          Datasheet   production data    Features    e   e Bluetooth   radio        Fully embedded Bluetooth   v3 0 with  profiles      Class 2 module     Complete RF ready module    128 bit encryption security      Integrated antenna       Multipoint capability       e ST micro Cortex M3 microprocessor up to          ALO AI 72 MHz  256 kb Flash  48 kb RAM memory   e Modem transmitter speed    Supported transmission speed with SPP  service active  560kbps  e General I O      7 general purpose I Os    1LPO input  e User interface      AT2 command set  abSerial       Firmware upgrade over UART  e FCC and Bluetooth   qualified  e Single voltage supply  2 5 V typical  e Micro sized form factor  11 6 x 13 5 x 2 9 mm  e Operating temperature range   40   C to 85   C   June 2014 DoclD022833 Rev 6 1 30       This is information on a product in full production  www st com    Contents SPBT2632C2A       Contents  1 Description i uh aa a 8 COR  a a a O E Ee 6  2 ROHS compliance coccion Rc decia iae de A Ca dee 7  3 Applications 6 scotia cs elk nbs ATA RR ca ee RUE RR RR ACE E 7  4 Software architecture               cece eee eee 8  4 1 Lower layer stack unte 9 rs Bed EE oa als Be 8  4 2 Upper layer stack  Amp ed UP              cece eee ee 8  43 AT command set  abSerial             0 00000 c ee eee 8  4 4 Bluetooth firmware implementation             o 9  5 Hardware specifications                      eeeseeeeeee
5.  27  10 Ordering information Xa du raak a PK WE WA 28  11 Revision history   udauduxud us Fk x qan Rio ed Rr CRESCE GE Ead 29    Ly  DoclD022833 Rev 6 3 30       List of tables SPBT2632C2A       List of tables    Table 1   Table 2   Table 3   Table 4   Table 5   Table 6   Table 7   Table 8   Table 9   Table 10   Table 11     4 30    Recommended operating conditions             ee eae 10  Absolute maximum ratings         lille mh 10  High speed CPU mode current consumption             0c eee eee 11  Standard CPU mode current consumption           000 cee eee 11  I O operating characterisStiCS         o ooococccoconccor 12  Selected RF characteristics              00 cee rh 12  PIMASSIQNMEM EMO  13  Soldering    idu a ESE aaa Mee a el Le ERR Mea un PR RT Wand Bie NG 18  System configuration variables              ee 22  Ordering information           llis rh 28  Document revision history           e eae 29    4    DoclD022833 Rev 6       SPBT2632C2A List of figures       List of figures    Figure 1   Figure 2   Figure 3   Figure 4   Figure 5   Figure 6   Figure 7   Figure 8   Figure 9     Figure 10   Figure 11   Figure 12   Figure 13   Figure 14   Figure 15     AA ACT none UR Y Ge at Oe 9  Pin connection uci e ae lica ae Soho Sac  9  Se GN da Esa Hah eias iar Giai e a 13  Mechanical dimensions                   cee eee e 15  Recommend land pattern top view            llle eh 16  SPBT2632C2A AT2 module block diagram            llis else 17  Soldering profile    c doe cs ge e ees
6.  dor a Ro e debe RU a ae e ee ad cd 19  Connection to host device               a  20  Typical RS232 circuit    0 0    illie 20  PCB layout guidelines            llli ue 21  External reset CIRCUIT s ioi aa cos doc aC C a NG a a a a a sd 21  Internal reset circuit            RR an 22  External LPO circuit    0    RR RR RR RR RR RR e as 23  Bi iode AA 23  CO DIOCOSSOF sd uer eats s ood Ro oe wa reed A usu dte d OR A 24  Powet  SWIICIH    uiid rd aac dde E ea n dg Dei dL eint a A Seded  aae ADAC edd 24   DoclD022833 Rev 6 5 30       Description SPBT2632C2A       1 Description    The SPBT2632C2A AT2 is an easy to use Bluetooth module  compliant with Bluetooth v3 0     The module is the smallest form factor available which provides a complete RF platform   The SPBT2632C2A AT2 enables electronic devices with wireless connectivity  not requiring  any RF experience or expertise for integration into the final product  The  SPBT2632C2A AT2 module  being a certified solution  optimizes the time to market of the  final applications     The module is designed for maximum performance in a minimal space including fast speed  UART and 7 general purpose I O lines  several serial interface options  and up to 560 kbps  transmission speed with SPP service active  250kbps with   AP service active     Optimized design allows the integration of a complete working Bluetooth modem  including  antenna  in the minimum possible size  only an additional external LPO  low power  oscillator  is required to
7.  enable low power mode capability     The SPBT2632C2A AT2 is a surface mount PCB module that provides fully embedded   ready to use Bluetooth wireless technology  The reprogrammable Flash memory contains  embedded firmware for serial cable replacement using the Bluetooth SPP profile   Embedded Bluetooth AT2 command firmware is a friendly interface  which realizes a simple  control for cable replacement  enabling communication with most Bluetooth enabled  devices  provided that the devices support the SPP profile  The SPBT2632C2A AT2   supporting   AP profile  provides communication with Android  smartphone  and Apple    OS  Bluetooth enabled devices     An Apple authentication IC is required to exchange data with an Apple device or access an  Apple device application  The AT2 FW includes the Bluetooth SPP profile capable of  recognizing the Apple authentication chip     Customers using the Apple authentication IC must register as developers to become an  Apple certified MFI member  License fees may apply  for additional information visit   http   developer apple com programs which program index html     Certified MFI developers developing electronic accessories that connect to the iPod    iPhone  and iPad  gain access to technical documentation  hardware components   technical support and certification logos     Customized firmware for peripheral device interaction  power optimization  security  and  other proprietary features may be supported and can be ordered pre loaded an
8.  family   FF   production panel coordinate identification   NNN   progressive serial number    Each module bulk is identified by a bulk ID    BULK ID and module 2D data matrix are linked by a reciprocal traceability link     The module 2D data matrix traces the lot number of any raw material used     DocID022833 Rev 6 27 30             Ordering information SPBT2632C2A  10 Ordering information  Table 10  Ordering information  Order code Description Packing MOQ       SPBT2632C2A AT2          Class 2 OEM Bluetooth antenna module    Jedec tray       2448 pcs       28 30    DoclD022833 Rev 6    2       SPBT2632C2A    Revision history       11    Revision history    Table 11  Document revision history                            Date Revision Changes  03 Apr 2012 1 First release   16 Apr 2012 2 Modified  Section 8    Document status promoted from preliminary data to  12 Jun 2012 3 production data    Modified  Figure 1      Added  notes in Table 6 and 7   Aug 2012 4  ee   Modified  Section 7  Added new section  Section 5 8  Section 7 3 and Section 9  AS   Modified  Figure 13  06 Jun 2014 6 Modified  Section 8 4                DoclD022833 Rev 6    29 30       SPBT2632C2A       Please Read Carefully     Information in this document is provided solely in connection with ST products  STMicroelectronics NV and its subsidiaries     ST     reserve the  right to make changes  corrections  modifications or improvements  to this document  and the products and services described herein at any  
9.  of this document  The AT command interface uses the main UART by default     Alt default function is selected setting var 56  false while setting var56 true the Alt full UART function is  selected  For details about variable pls refer to the UM1547     DoclD022833 Rev 6    4          SPBT2632C2A Hardware specifications       5 8    Mechanical dimensions    Figure 3  Mechanical dimensions       0 18 8 1       pitch   1 5mm       Tolerances  0 025mm       TOP VIEW    BOTTOM VIEW          GSPG0710D11630       DocID022833 Rev 6 15 30       Hardware specifications SPBT2632C2A       Figure 4  Recommend land pattern top view     ES  BERE          6 pads 0 8X12           0 965x5    6          GSPG0710D11635       16 30 DocID022833 Rev 6 Ly        SPBT2632C2A Hardware block diagram       6 Hardware block diagram    Figure 5  SPBT2632C2A AT2 module block diagram       Battery or Supply    Antenna Regulator    256K Flash    BP  Filter             AM11152v1       Ly  DoclD022833 Rev 6 17 30       Hardware design SPBT2632C2A       7   Note  1  2  3  4   7 1   18 30    Hardware design    The SPBT2632C2A module without AT2 command embedded FW supports UART  IC and  GPIO hardware interfaces  Note that the usage of these interfaces is dependent upon the  firmware that is loaded into the module  and is beyond the scope of this document  The AT2  command interface uses the main UART by default     All unused pins should be left floating  do not ground   All GND pins must be well grounded     T
10. BT2632C2A AT2 into the final product  it must be ensured that the  FCC labelling requirements  as specified below  are satisfied  Based on the Public Notice  from FCC  the product into which the ST transmitter module is    installed must display a label referring to the enclosed module  The label should use  wording such as the following     Contains Transmitter Module  FCC ID  X3ZBTMOD5  IC  8828A MOD4    Any similar wording that expresses the same meaning may be used     TELEC certification    Module has been tested according to following TELEC certification rules     Type of specified radio equipment        Radio equipment according to Certification Ordinance Article 2 1 19    Sophisticated low power radio data communication system in 2 4GHz band     Class of emissions  Assigned frequency  and Antenna power       F1D  G1D 2441MHz 0 00001   0 00004W MHz    Certification number      006 000095    DoclD022833 Rev 6 25 30       Regulatory compliance SPBT2632C2A       8 3    8 4    26 30    Bluetooth certification    Module with embedded stack and profile has been qualified according to SIG qualification  rules         Bluetooth SIG Qualified Design  QD ID  B019224      Product type  End Product       TGP version  Core 3 0       Core spec version  3 0       Product descriptions  Bluetooth module  spec V3 0    CE certification    Module has been certified according to following certification rules       CE Expert opinion  0448 ARSO00049      Measurements have been performed in a
11. Kingdom   United States of America    www st com    30 30 DocID022833 Rev 6 Ly        
12. PP  IAP  SDAP and GAP protocols  e HFComm  SDP  and L2CAP supported  e Multipoint with simultaneous slaves     AT command set  abSerial    The complete command list including the iAP commands is reported in the user manual  UM1547     2    DoclD022833 Rev 6       SPBT2632C2A Software architecture       4 4    Bluetooth firmware implementation    Figure 1  FW architecture          abSerial Command Set    abSerial AT Command Set  Application   and or Custom Application   Application  Layer API       BT Profiles  SDP RFCOMM Upper layer Stack   BT  Profiles  Amp   edUP    HCI over UART          AM11151v1    DocID022833 Rev 6 9 30       Hardware specifications                                                 SPBT2632C2A  5 Hardware specifications  General conditions  Viy   2 5 V and 25   C    5 1 Recommended operating conditions  Table 1  Recommended operating conditions  Rating Min  Typical Max  Unit  Operating temperature range  40 85   C  Supply voltage Vin 2 1 2 5 3 6 V  Signal pin voltage 2 1 V  RF frequency 2400 2483 5 MHz  5 2 Absolute maximum ratings  Table 2  Absolute maximum ratings  Rating Min  Typical Max  Unit  Storage temperature range  55  105   C  Supply voltage  Vin  0 3   5 0 V  I O pin voltage  Vio  0 3  5 5 V  RF input power  5 dBm          10 30 DoclD022833 Rev 6                2       SPBT2632C2A Hardware specifications       5 3 High speed CPU mode current consumption  e High speed CPU mode      CPU 32 MHz        UART supports up to 921 Kbps      Max data thr
13. T   NC I2C SCL   NC NC   C       Figure 15  Power switch    Vin    DMP3098      R8  MCU Control Terminal Q1    VBAT    D3  MBR0520L    optional       AM12034v1          4    24 30 DoclD022833 Rev 6       SPBT2632C2A Regulatory compliance       8    8 1    8 2    Regulatory compliance    FCC and IC certification    This module has been tested and found to comply with the FCC part 15 and IC RSS 210  rules  These limits are designed to provide reasonable protection against harmful  interference in approved installations  This equipment generates  uses  and can radiate  radio frequency energy and  if not installed and used in accordance with the instructions   may cause harmful interference to radio communications     However  there is no guarantee that interference may not occur in a particular installation     This device complies with part 15 of the FCC rules  Operation is subject to the following two  conditions   1  This device may not cause harmful interference  and  2  this device must  accept any interference received  including interference that may cause undesired  operation     Modifications or changes to this equipment not expressly approved by the part responsible  for compliance may render void the user s authority to operate this equipment         Modular approval  FCC and IC  FCC ID  X3ZBTMOD5  IC  8828A MOD4    In accordance with FCC part 15  the SPBT2632C2A AT2 is listed above as a modular  transmitter device         Label instructions    When integrating the SP
14. UTOMOTIVE APPLICATIONS OR ENVIRONMENTS  AND OR  D  AEROSPACE APPLICATIONS  OR ENVIRONMENTS  WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE  THE PURCHASER SHALL USE PRODUCTS AT  PURCHASER S SOLE RISK  EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE  UNLESS A PRODUCT IS  EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR    AUTOMOTIVE  AUTOMOTIVE SAFETY OR MEDICAL    INDUSTRY  DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS  PRODUCTS FORMALLY ESCC  QML OR JAN QUALIFIED ARE  DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY     Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void  any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever  any  liability of ST     ST and the ST logo are trademarks or registered trademarks of ST in various countries   Information in this document supersedes and replaces all information previously supplied   The ST logo is a registered trademark of STMicroelectronics  All other names are the property of their respective owners       2014 STMicroelectronics   All rights reserved    STMicroelectronics group of companies    Australia   Belgium   Brazil   Canada   China   Czech Republic   Finland   France   Germany   Hong Kong   India   Israel   Italy   Japan    Malaysia   Malta   Morocco   Philippines   Singapore   Spain   Sweden   Switzerland   United 
15. ccordance with  report available on  request        EN 300 328 V 1 8 1  2012 06   9       EN301 489 17 V 2 2 1  2012 09             EN301 489  1 V 1 9 2  2011 09           EN60950 1 2006  A11 2009 A1 2010  9             0051       a  EN 300 328 V 1 8 1  2012 06    electromagnetic compatibility and radio spectrum Matters  ERM   Wideband  transmission systems  data transmission equipment operating in the 2 4 GHZ ISM band and using wideband  modulation techniques  harmonized EN covering essential requirements under article 3 2 of the R amp TTE  directive      b  EN 301 489 17 V 2 2 1  2012 09    electromagnetic compatibility and radio spectrum Matters  ERM    electromagnetic compatibility  EMC  standard for radio equipment and services  part 17  specific condition for  2 4 GHz wideband transmission systems and 5 GHz high performance RLAN equipment      c  EN301 489 1 V 1 9 2  2011 09    electromagnetic compatibility and radio spectrum Matters  ERM    electromagnetic compatibility  EMC  standard for radio equipment and services  part 1  Common technical  requirements      d  EN60950 1 2006  A11 2009 A1 2010   Information technology equipment   safety        DocID022833 Rev 6 Ly        SPBT2632C2A Traceability       9    Traceability    Each module is univocally identified by serial number stored in a 2D data matrix laser  marked on the bottom side of the module itself     The serial number has the following format    WW YY D FF NNN   where   WW   week   YY   year   D   product ID
16. d configured     6 30 DocID022833 Rev 6 Ly        SPBT2632C2A RoHS compliance       2 RoHS compliance    ST Bluetooth modules comply with the ECOPACKQ2 level of RoHS compliance grade   The material declaration file is available from www st com at the following URL   http   www st com web catalog sense power FM1968 CL1976 SC1324 PF253470     3 Applications    e Serial cable replacement   e  M2M industrial control   e Service diagnostic   e Data acquisition equipment  e Machine control   e Sensor monitoring   e Security system   e Mobile health     Ly  DoclD022833 Rev 6 7 30       Software architecture SPBT2632C2A       4    4 1    4 2    4 3    8 30    Software architecture    Lower layer stack    e Bluetooth v3 0   e Device power modes  active  sleep and deep sleep   e Wake on Bluetooth feature optimized power consumption of host CPU  e Authentication and encryption   e Encryption key length from 8 bits to 128 bits   e Persistent Flash memory for BD address and user parameter storage  e All ACL  asynchronous connection less  packet types   e Multipoint capability   e Sniff mode  fully supported to maximum allowed intervals   e Master slave switch supported during connection and post connection  e Dedicated inquiry access code for improved inquiry scan performance  e Dynamic packet selection channel quality driven data rate to optimize link performance  e Dynamic power control   e Bluetooth radio natively supports 802 11b co existence AFH    Upper layer stack  Amp ed UP    e S
17. he area around the module should be free of any ground planes  power planes  trace  routings  or metal for 6 mm from the antenna in all directions     Traces should not be routed underneath the module     Module reflow installation    The SPB2632C2A is a high temperature strength surface mount Bluetooth module supplied  on a 16 pin  6 layer PCB  The final assembly recommended reflow profiles are indicated  here below     The soldering phase must be executed with care  In order to avoid undesired melting  phenomenon  particular attention must be paid to the setup of the peak temperature     The following are some suggestions for the temperature profile based on IPC JEDEC J   STD 020C  July 2004 recommendations     Table 8  Soldering                                  Profile feature PB free assembly  Average ramp up rate  Tsmax to Tp  3   C sec max  Preheat   reheat 150   C      Temperature min   Ts min   200        Temperature max   Ts max    f   60 100 sec    Time  t  min  to t  max   t     IA above  217      ior 60 70 sec    Temperature T   Peak temperature  Tp  240  0   C  Time within 5   C of actual peak temperature  Tp  10 20 sec  Ramp down rate 6   C sec  Time from 25   C to peak temperature 8 minutes max     2    DoclD022833 Rev 6       SPBT2632C2A Hardware design       7 2    7 3    Figure 6  Soldering profile       P Critical Zone  T  toT     Temperature   gt            25  C to Peak        Time   gt           AM12026v1    GPIO interface    All GPIOs are capable of sin
18. king and sourcing 4 mA of I O current  GPIO  1  to GPIO  7  are  internally pulled down with 100 kQ  nominal  resistors     GPIOs configuration  Module GPIO configuration depends on the FW embedded     For example the following table summarize the GPIO configuration set by the standard FW  version the AT2       Temor   emos   emos   aros   emos   emos   ar07      Output      SPBT2632C2A AT2   connection a paa HPG ace status  down  MFI   down  MFI irte  status probe probe chip SDA    chip SCL     Output    Input  pulled Input  pulled        GPIO4  active status probe  MCU RUN   always on when the radio is in active mode   Blinking when the radio is in deep sleep mode    GPIO1  connection status probe  always on when the module is connected    GPIOs can be reconfigured with the following commands  e  At ab gpioconfig  GPIO pin   I O    e At ab gpioRead  GPIO pin    e  At ab gpioWrite  GPIO pin   1 0     For more details refer to the User Manual UM1547     DoclD022833 Rev 6 19 30       Hardware design    SPBT2632C2A       7 4    20 30    UART interface    The UART is compatible with the 16550 industry standard  Four signals are provided with  the UART interface  The TXD and RXD pins are used for data while the CTS and RTS pins    are used for flow control     Figure 7  Connection to host device       Bluetooth    Module       AM12027v1          RS 232  TRANSCEIVER    DoclD022833 Rev 6    Bluetooth  module       AM12028v1    2          SPBT2632C2A Hardware design       7 5    7 6
19. oughput      Shallow sleep enabled     Table 3  High speed CPU mode current consumption                                              Modes  typical power consumption  Avg  Unit  ACL data 115 K baud UART at max  throughput  master  23 mA  ACL data 115 K baud UART at max  throughput  slave  27 5 mA  Connection  no data traffic  master 9 1 mA  Connection  no data traffic  slave 11 2 mA  Connection 375 ms sniff  external LPO required  490 yA  Standby  without deep sleep 8 6 mA  Standby  with deep sleep  no external LPO 1 7 mA  Standby  with deep sleep  with external LPO 70 yA  Page inquiry scan  with deep sleep  no external LPO 2 7 mA  Page inquiry scan  with deep sleep  with external LPO 520 HA  5 4 Standard CPU mode current consumption  e Standard CPU mode      CPU8MHzZ        UART supports up to 115 Kbps      Data throughput up to 200 Kbps  Shallow sleep enabled     Table 4  Standard CPU mode current consumption                            Modes  typical power consumption  Avg  Unit    ACL data 115 K baud UART at max  throughput  master    167   m    ACL data 115 K baud UART at max  throughput  slave  18 mA  Connection  no data traffic  master 4 9 mA  Connection  no data traffic  slave 7 0 mA  Connection 375 ms sniff  external LPO required  490 yA  Standby  without deep sleep 4 2 mA  Standby  with deep sleep  no external LPO 1 7 mA             Ly  DoclD022833 Rev 6 11 30       Hardware specifications SPBT2632C2A       Table 4  Standard CPU mode current consumption  continued   
20. rations   Use two configuration variables  UseExtLPO and AllowSniff     Table 9  System configuration variables                      Variable Name Default Description  Var37   UseExtLPO   True True when a 32 768 kHz low power oscillator is present  and false  if not present  Var43 AllowSniff True Enables Sniff mode        DoclD022833 Rev 6    2          Hardware design    SPBT2632C2A       7 8    Figure 12  External LPO circuit          GPIO7 LPO 32KHz  TXD oscillator    RXD  RTS  CTS       SPBT2632C2A AT2    AM11155v1       Apple iOS CP reference design   The figures below give an indicative overview of what the hardware concept looks like  A  specific MFI co processor layout is available for licensed MFI developers from the MFI  program    The MFI co processor can be connected to the module through the pins 11 and 12 if the  UART flow control is not required  or through the pins 5 and 6 if the full UART is needed     As indicated at Table 7  Pin assignment on page 13 the choice between the supported  connection is made setting a FW variable  for more details on FW setting pls refer to the    UM1547   Figure 13  BT module             MCU RXD        MCU TXD       12 12C Data        MISC control 3         12C Clock         12C data full UART       12C clock full UART  C1      0 1uF       SPBT2632C2A AT2             DoclD022833 Rev 6 23 30       Hardware design SPBT2632C2A       Figure 14  Co processor             Apple MFI    CO Processor 2 0c  R     U  10k    VSS   I2C SDA RS
21. srees  10  5 1 Recommended operating conditions              a  10  5 2 Absolute maximum ratings             aeaaaee 10  5 3 High speed CPU mode current consumption            oococooooco o    11  5 4 Standard CPU mode current consumption          oooccoocccooocco oo  11  5 5 I O operating characteristics           noana 12  5 6 Selected RF characteristics    orita e ERREUR RR eee es 12  5 7 Fili ASSIONINGIW correr dee eee AA 13  5 8 Mechanical dimensions 13 ama perra 15  6 Hardware block diagram             cece eee eee 17  7 Hardware design vaca cw ia ae ew eee dad slaw C ce 18  7 1 Module reflow installation             0 02 0 cee eee eee 18  7 2 GPIO interface PT 19  7 3  GPIOs configuration ricos artis 19  7 4 UART interface       o o ooooooooo ee 20  7 5 PCB layout guidelines   cx CR RR ER EROR RC RR E AO RR 21  7 6 Reset eIrGult  i  usse NDI on ek DA a RR eA au a EL 21  7 6 1 External reset circuit          ooooocooooooooo eee 21  7 6 2 Internal reset circuit       2 liliis 22    2 30 DocID022833 Rev 6 Ly        SPBT2632C2A Contents       7 7 External LPO input circuit socorrer EA 22  7 8   Apple iOS CP reference design           ooocccocccccccn ees 23  8 Regulatory compliance             eee eee eee eee 25  8 1 PCG and IC certification   x deese ve ER toes ee eee Peek RE 25  8 2 TELEC certification          akala eae E semi conse epee 25  8 3 Bluetooth certification          2  0    cc ee 26  8 4 CE certification sical eee ua 26  9 Traceabiltty mPTPT                  
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