Hantek Firmware 2.06.x issues
Contents
1. B6 Gace AC LimitOff a cars ium PT Jour 17 nra C Do aya NO Q Min a 1 a Q AAA a aN g na EY NINO naL C hilo Qe dseo e Q1 ing nA nm LA ww hi ilo 1 ava N aa arava N ihnapn hi a a Tro i oT rJ garate executable loaded in before c ye ala ALO ava N a AVQ NANIO eos ww ww mm 7 LA LULA NJ Additionally there is typo in ARM source code ee p d QAM OW G G fei C9 G fS h i Ce 05 J van a EEEE gl EE j uu Le uM Qum pum em Qum EM d Gi G amp G CSI G Psi m uu 9 fe Be t wan an an aM i Be amp F ZU Te Tf tl betw aveareauridprignt GetWavedreaGridKind GetWaveDispMode GetWaveS aveFileN ame GetWaveSignT ype GetWaveSpecE xtremeV al GetWin4reaBufDrawY Start GetWin4reaHeadT ail GetWinT extld GetWindowD ataYHeadT ai GetWindowStopModeParamDisp GetWindow W aveParam GetWindow WaveParamFrom4cq GetWindowWaveParamFromAcagB ak GetWindowWaveParamFromAcgB ak2 GetWindow WaveParamFrom4cqB ak21 GetWindow W aveParamFrom amp cqB ak3 GetWindow W aveParamFromDisp GetWindowZoom GetWindowZoomF act GetWindowZoomx Get_AutoMeasureWave Get_CursorDelta Get DotNumPerVerticLine Get DstTypeNum Get_FFTPerColPixelCnt Get_FixedwidthStrLine lt YLen Get HelplDBy amp lias Get Helplnfo2Disp Get HelpPageContentByID Get HelpPageContentlnfo Get HelpPagelnfoKeyword a hws ext text text text text text text text text text text t2. J 13 ACtrigger indicator and line wrong Set ch1 signal DC coupled trigger AC coupled The trigger lowest level below signal SFISSSISSNCESNEEE TEE Edge Ne all f Rising 3 Auto AC es 1 00 CPEE highest level only mid of signal AAA A E M soos J WWW TET Trigger COH f Rising 3 Auto 2AC But both should look like when trigger coupled in DC mode Er ICE m poe 00V ISCHIA 2 20v MM 500 001KHz rigger ON Rising Auto ON Rising 14 Dithering interpolation filter of waveform too sharp When enabling both channels this also occurs in single channel mode and 1GSs but test signal need to be higher to get same error and applying for example 16MHz square wave the waveform is switching between proper square b M 400ns 20 0ns Menu 16 0000MHz 2 Mar 12 16 46 and crippled square every second tl O 0ns Menu 16 0008MHz Mar 12 14 49 15 Display Time base scaling strange behavior When you apply e g 1kHz signal set time base to 80us DIV and move the waveform to 500us DIV Sur mcm W 80 05 I CH O Limit Off EJ w Coarse 10x o Ott mur eM When you now change time base to 40uS DIV the falling edge which should be still in the middle of the screen has been moved to 454uS position but it should stay on 500uS The same happens of course with 20uS DIV W 40 0us CH
3. Firmware 2 06 3 issue list see description see description see description LM see description see description see description a ae Partially fixed GPL Partially fixed GPL released released SDK some SDK some documentation documentation shared see description see description see description UT 7 pum cA UU bg SS BEEN NNI Partially fixed see Partially fixed see description description List of bugs improvement requests Select any of the new functions like Printer Cfg Option Wave any many others push HELP button on the front panel and the DSO is crashing and not responding anymore Apply test signal do auto setup to trigger properly Set time base to 4ns DIV change Acquisition mode from Real Time to Equ Time hide menu by pushing FO turn time base knob from 4ns DIV to 2ns DIV and DSO is crashing and not responding anymore This bug seems to be only valid for DSOs where the factory calibration not self calibration is somehow invalid After user executed factory calibration bug disappeared Is there something in chk1kb 091023 which can be changed to fix that User executed factory calibration is not an option Apply test signal do auto setup to trigger properly Set time base to 4ns DIV change Acquisition mode from Real Time to Equ Time hide menu by pushing FO When menu hidden you can see artifacts on the right side of the screen They don t need to be there This bug seems to be only val
4. ampling in long memory Hantek s bench DSO hw1007 83E9 design allows such faster sampling but the skew is still far from perfect did publish all these FPGA designs you can play with them to which is best for you But note do not do this when you own hw1005 DSO they can t be modified For those of you who don t know what this bug means Google for waveform interleave distortion and or Agilent 5989 5732EN This is improvement proposal and not a bug This is a very unfortunate bug possible workaround is to use dual window mode or less memory depth both with disadvantages Workaround is to change Timebase just one step forward and back right after dual window enabled Note the main window top need to be activated the bug have something to do with main TB buffer initialization 10 LI 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Workaround is to change Timebase just one step forward and back right after dual window enabled Note the main window top need to be activated the bug have something to do with main TB buffer initialization This is improvement proposal and not a bug Use my firmware 2 06 3 120507 6 removed that bug Use DC trigger coupling or add offset when you set trigger point For sure a stupid bug but since you can see when the signal is wobbling you can quick change when necessary to single channel to observe the waveform with be
5. ext text text text text text text text text text text text text text text text text text text text text UuuUaL 0004 oooc OOo 0001 oone 000E 000E oo0oc 0004 ooo 0003 0003 0003 nonz ooo O00 0003 0007 000 0008 0006 nonc 0006 0007 O00 000E 0002 0002 0002 nonz 0002 text 88859118 text 66659114 text 88859118 text 6665911C text 66659126 text 66659124 text 66659124 text 66659124 text 66659124 text 66659128 text 6665912C text 66659134 text 66659138 text 6665913C text 66659146 text 66659144 text 66659148 text 6665914C text 66659156 text 66659154 text 66659154 text 66659154 text 66659154 text 88859158 text 6665915C text 6665915C text 6665915C text 6665915C text 666591686 text 66659166 text 66659164 text 66659164 text 66659164 text 66659168 text 66659168 text 66659168 DCB hws 0 The new function Wave is no working properly in some models FRere is missine the directory LDR R1 aSDS 4s4d s LDR R2 aParamSauMWaue s param sau waue sau MOU R3 R12 BL sprintf B loc_59154 loc_59124 CODE XREF GetWaveSaveFileName 4Cfj LDR R3 p_dso_4 LDR R2 R3 HOU R3 080x1198 LDR R12 R2 R3 LDR R3 a_hsw EU STR R3 SP 6x14 var_14 LDR R8 R11 s Ss LDR R1 aSDS s d s LDR R2 aHntSdUaue sau nnt sd waue sau MOU R3 R12 BL sprint
6. f loc_59154 CODE XREF GetWaveSaveFileName 50fj GetWaveSaveFileName 84fj SUB SP R11 4 LDHFD SP R11 LR BX LR End of function GetWaveSaveFileName off 59168 DCD p dso DATA XREF GetWaveSaveFileName 26Tr GetWaveSaveFileName loc 596F 6Tr off 59164 DCD a_hsw DATA XREF GetWaveSaveFileName 68tr char xoff 59168 off 59168 DCD aSDS GetWaveSaveFileName 9Ctr DATA XREF GetWaveSaveFileName 74tr GetWaveSaveFileName Astr once the file extension is hsw and another time it is hws this is preventing the save reload from USB to work properly and even sometimes crashing DSO From the file format assume hws is the proper file extension name 18 19 20 21 22 23 24 25 The protocol inf file in every 2 06 03 firmware DSO5xxxB BV BMV and DSO1xxxB contains error in the definition of TRIG SWAP CH1 PULSE TIME It is defined as 1 byte long but it should be 8 byte The firmware itself is using 8 byte only the protocol inf file is wrong The protocol inf file in ever 2 06 3 firmware DSO5xxxB BV BMV and DSO1xxxB contains error in the definition of ALT trigger The entries for ALT O T CH1 and ALT O T CH2 are missing TRIG SWAP CH1 VPOS 2 TRIG SWAP CH1 OVERTIME NEG 1 TRIG SWAP CH1 OVERTIME TIME 8 TRIG SWAP CH2 VPOS 2 TRIG SWAP CH2 OVERTIME NEG 1 TRIG SWAP CH2 OVERTIME TIME 8 Every 2 06 3 firmware DSO5xxxB BV BMV and DSO1xxxB contains error in the Tra
7. his f pup T 1i h P P Eo Tir ee h e Real Time m y var gm E M 8 00us lis Normal e n Jl Averages if a gt 128 7 C3 2 K e n 52M 2 LEL Lr 10 In single window mode sample memory 512k both channels ch1 ch2 enabled when switching to dual window mode artifacts on screen and DSO later crashing and not respondin Artifacts disappear when changing timebase just after switch to dual window so just an init error Set DSO like on picture RA LT GM ous WW 200s 1 Acquire w Real ime Fa a a png M Orme i Averages 4 mH y ee toes ee eme el l OS 2185 O32 O64 O128 ao S and switch dual window mode to see artifacts like this Ame OT OG My 200s 9 V _0 000s Acquire Real Time Averages Q4 Oe 216 864 R O128 ui I ZOR DESPA 1h OPM REDE v CHS 2 Normal 11 In FFT mode the Display Grid option is not changing the grid it is always real line and not possible to change to dotted line or off RM MAL fal M 2 005 WWW IW 2 00 5 Display O 12 In FFT mode Full span is higher than Nyquist sample rate 2 Example 800ns DIV sample rate is 200MSs full span 125MHz Easy to fix by enabling from 800ns DIV to 20ns DIV 1GSs sampling when 4k memory or FFT enabled Ae AT Ta M _s00ns_ MW Jw 800ns
8. id for DSOs where the factory calibration not self calibration is somehow invalid After user executed factory calibration bug disappeared Is there something in chkikb 091023 which can be changed to fix that User executed factory calibration is not an option Digital Filters to be implemented SDK to be released Update FPGA design to match ADC skew timings in 125MHz 1GSs mode this is already known issue and listed in old issue list posting once again in this list as reminder FPGA design revision 83E8 sample rate 1GS s clocks skew must be always 1000ps Clock 8 gt Clock 1 1010ps Clock 1 gt Clock 7 1250ps Clock 7 gt Clock 2 550ps Clock 2 gt Clock 6 1230ps Clock 6 gt Clock 3 1000ps Clock 3 gt Clock 5 1280ps Clock 5 gt Clock 4 500ps Clock 4 gt Clock 8 1250ps FPGA design revision 83E8 sample rate lt 800MS s clocks skew must be always 1250ps Clock 8 gt Clock 1 1250ps Clock 1 gt Clock 7 1260ps Clock 7 gt Clock 2 1280ps Clock 2 gt Clock 6 1230ps Clock 6 gt Clock 3 1260ps Clock 3 gt Clock 5 1280ps Clock 5 gt Clock 4 1230ps Clock 4 gt Clock 8 1260ps FPGA design revision 83E9 not yet measured but Hantek statement It s impossible for us to achieve it now is not really optimistic add 20ksamples 16ksamples 8ksamples whatever possible if possible to memory depth preferred with highest possible sample rate This is in principle what already published as available In the user manual or on Tek
9. ns DSOeachData and Trans PCeachData functions The g FFTWin table is defined too small due this SYSData FFT status is having only 0x00 hanning 0x01 flattop 0x02 rectangular Barlett and Blackman are missing always sending 0x00 and 0x01 instead of 0x03 and 0x04 In every 2 06 3 firmware DSO5xxxB BV BMV and DSO1xxxB in SYSData definition the field for FFT Vrms is missing only dBrms available Every 2 06 3 firmware DSO5xxxB BV BMV and DSO1xxxB contains error in the Trans DSOeachData and Trans PCeachData functions The g MSItem table is defined too small is having only OxOB size but since year there are 22 measurement s available Equivalent sampling not working properly No real difference when changing Screen Refresh rate Auto 30 40 50 It looks like 30 is maximum what the current firmware is able to handle when changing to 40 or 50 no visible difference This seems to be the case in all firmware s since end of Nov 2011 This was one of the unique features and need to be changed back to what it was before Waveforms in memory in some combination of Timebase and memory depth in display memory and exported data having at begin or and end of the waveform random data Also the buffer length seems to be not as it should be e g 4100 instead of 4000 samples This error seems to be in all firmware s since Mid December 2011 List of workarounds by bug number I ve marked all workarounds wi
10. th colors red bad one yellow sill bug but workaround exists green not a bug or I don t care about Note these colors represents what I think and feel Ti Don t use help Run factory calibration only Edge calibration and after that self calibration This bug seems to be only valid for hacked models it does not exist on real 200MHz models on which the factory calibration was executed after 2ns DIV and other 200MHz features has been enabled Run factory calibration only Edge calibration and after that self calibration This bug seems to be only valid for hacked models it does not exist on real 200MHz models on which the factory calibration was executed after 2ns DIV and other 200MHz features has been enabled No Workaround available Well you can build your own SDK LabView what so ever support based on the already published information s http www mikrocontroller net articles Hantek Protokoll http elinux org Das Oszi Protocol There is no affordable workaround for now Changes to hardware are possible but expensive l ve tested Silicon Labs jitter cleaner Murata LDHxxx delay lines and a combination of other solutions was more than satisfied with achieved results expect the costs For now we have to use what available both manufacturers developed within last 2 years few FPGA design versions the best is from upcoming Tekway MST DSOs and Hantek Handhelds however they not allowing dual channel 500MS s s
11. tter resolution and without wobble Funny bug but easy to omit since we know it This is already fixed the dsod or dso app dsod this depends on fw DSO model version binary is working perfectly as watch dog monitoring potential profile issues Not a big deal and it is already fixed in my firmware 2 06 3 120507 6 Not a big deal and it is already fixed in my firmware 2 06 3 120507 6 yellow as this is an bug only when accessing remotely need to be implemented properly in the firmware a pure protocol inf change is not enough yellow as this is an bug only when accessing remotely need to be implemented properly in the firmware yellow as this is an bug only when accessing remotely need to be implemented properly in the firmware yellow as this is an bug only when accessing remotely need to be implemented properly in the firmware No workaround it was never properly implemented now even completely disabled Workaround could be to switch back to firmware from Mid 2011 but honestly this is really annoying bug can t understand why there is no QC No workaround it looks just crap Sure when we know that there is crap on begin and end we can think the crap away but what when there is a real spike
12. way and Hantek websites In single window sample memory gt 40k both channels ch1 ch2 enabled and time base from 400ns div up to 2ns div the position change fine and coarse control is not working Only scale is moving but not the waveform See attached picture to understand issue with 4k memory when changing position waveform is moving IRAE AT ee M 8 00us 200ns Acquire X E Ns ES I Type sE S00 C ns Real Time O Egu T ime Mode cJ Normal Q 14 Peak ga Average Mem Depth EM O40K O512K 1 QOOQ0QKHz with 40k and above when moving changing time base position waveform is NOT moving when in RUN mode but works in STOP mode RA AT M 8 00us 200ns Acquire X Real Time o Equ Time Mode ee E RNS s f Normal ER O Ja Peak T martii NE ett C TL Bare age J nem Mem Depth MEN he S 1 00000KHz 9 In single window mode sample memory 40k both channels ch1 ch2 enabled while switching to dual window mode artifacts on screen and DSO later crashing and not responding Artifacts disappear when changing timebase just after switch to dual window so just an init error Set like on picture w e fl GM sous MW IW 200s Acquire i Real Time i rM M e rm a Averages r E E TET EN C l O8 210 iz O64 129 F Q 20K ODE O 1h DZM wo HE la ans b and switch dual window mode to see artifacts like t
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