SIMPlugIN-LX45 User Manual
Contents
1. 3 JMP11 JMP12 4 JMP13 9 330 0 130 0 JMP14 JMP15 JMP16 TMS 9 5 0 45 0 O 5 0 E18 JTDI TCR JTCK GND GND GND O L53P 2 5 IO L15P 2 5 L11p 2 VOCO 20 5 Nc L53N 2 6 IO L15N 2 6 ON 2 6 T Nc LE O L47P 2 7 L6P 2 7 L9P 2 7 Ne LH O L47N 2 8 2 L6N 2 8 2 IO L9N 2 8 2 FP SUSPEND GND 9 GND GND 2 N15 E N 0 0 gt lt 0 gt lt LET y wet 00020 iS sius s OC ities 20020 L54N 2 12 L14N D12 2 12 IO_L17N 2 12 5 O L43P 2 IO L5P 2 2 L7P 2 FP SPI SEL L43N 2 4 IO L5N 2 4 L7N 2 4 AT T6 FP INIT GND D GND GND 2 IO_L65P_INIT_B 2 gt 5 P Y AA2 lO L64P 08 2 LezP ps 2 20 17 lo Ligp 2 0 20 17 Lige 2 20 17 E 10_L63N_2 L62N D6 2 8 IO 2 8 IO L18N 2 8 5 Lug IO Leap 2 L44P 2 27191 IO L64P 08 2 C318 L10P2 2191 2 IO Le2N 062 O LAAN 2 20 IO D9 2 20 L10N 2 20 s wa 05 2 GND GND GND 2 2 0 160 2 VCCO 20 CCO 20 VCCO 20 artes O L60P 2 IO L30P GCLK1 D13 2 IO L31P GCLK31 D14 IO L32P GCLK29 2 IO L59N 2 2 L30N GCLKO 2 4 L81N GCLK30 015 2 4 IO L32N 28 2 42. m e 12 em e e e e e e e e e e e e m m e Y8 YI JMP2 3 3 JMP1 500 GND IO 14 0 VCCO 00 10_L4N_0 10_L64P_SCP5_0 10_L64N_SCP4_0 GND IO L6P 0 VEREOR 10_L6N_0 10_L51P_0 10_L51N_0 GND 10_L34P_GCLK19 0 10_L34N_GCLK18_0 lO L33P 0 L33N 0 GND IO 137 GCLK13 0 L37N 2 0 lO L65P SCP3 0 IO L65N 5 2 0 GND IO L50P 0 TEMPE 10_L50N_0 10_L63P_SCP7_0 10_L63N_SCP6_0 GND VCCO 00 JMP3 3 JMP4 5 00 1 GND VCCO 00 L3N 0 6 L62P 0 L38P 0 8 GND 9 0 VCCO 00 T OLL7N O L49P 0 13 L49N 0 GND L36P 5 o 00 00 7 L36N GCLK14 0 18 O L32P 0 L32N 0 0 GND L35N GCLK16 0 L5P 0 0 25 L5N 0 26 GND LeeP SCP1 o 00 9 O_L66N_ SCPO 0 0 2 _0 31 OLL2NLO GND VCCO 00 4 JMP30 R1 100R U1A VREFO io L1P_HSWAPEN 0 IO L66N SCPO 0 AH IO LIN VREF 0 166 5 0 IO L2N A5 O L2P 0 IO L69N SCP2 0 L65P SCP3 0 5 L2N 0 165 ScP3 0 IO L64N SCPI 0 OLN 0 IO L3P 0
3. H IO sor 2 L20P 2 25 L57P 2 25 63P 2 25 IO L5eN 2 L58N 2 O L20N 2 6 L57N 2 6 IO L63N 2 6 IO LseP 2 H3O nE GND GND GND 15742 L57P 2 Disp 00029 9 taspa 106020 9 COUPE 9 L54N 2 L58N 2 30 IO L45N 2 30 L42N 2 30 lO L54P 2 O L21P 2 IO 149 03 2 IO L46P 2 O L21N 2 32 IO 149 D4 2 32 L46N 2 32 Wn 2 GND GND GND IO 152N 2 VCCO 20 4 VCCO 20 2 VCCO 20 4 IO 152 2 H0 IO L51N 2 LS1N 2 lO L51P 2 IO L51P 2 ears IO LS0N 2 2 2 O L49N D4 2 IO 149 2 O LIP D3 2 JMP17 IO L49P 03 2 48 80 0O O IO 148 B VREF 2 AB JMP18 IO _L47N 2 5 0 9 IO L47P 2 9 GND 0020 IO LAEN 2 ABa 1O L45N 2 IO L50N 2 gt IO L45P 2 14552 IO L40P 2 g IO LAAN 2 19 144 2 IO L40N 2 E wio L44P 2 GND IO La4P 2 tO aan S Ye 102882 IO L5gP 2 is L42N 2 HA L59N 2 lt L8P 2 IO L41N VREF 2 10 VREF IO L8N 2 o 40 _L41P 2 GND 2 lo Leap 2 VCCO20 L22N 2 IO L23P 2 L23N 2 i GND IO L29P GCLKS3 2 L29N GCLK2 2 L60P 2 IO L60N 2 GND pd 5 0
4. Q 1 1 1 1 1 DRAM 0 DRAM DQO DRAM 0 DRAM DRAM_A2 H7 DRAM 002 DRAM_A3 Dag DRAM_DQ3 DRAM A4 H1 DRAM DQ4 5 DQ4 hg DRAM 005 DRAM_A6 005 Fi DRAM DQ6 DRAMA Tea DQ7 C8 DRAM 9 DRAM 009 DRAM A10 57 DRAM 0010 DRAM A11 10 0010 DRAM DQ11 DRAM A12 lt As rs Ld DRAM DQ12 1 13 RB A13 NC DQ13 HPS B1 DQi4 DRAM BAO 0014 ha DRAM 0015 DRAM 3 0015 1005 DRAM LDOS N DRAM WE pas BZ DRAM 0008 DRAM RAS N UDQS RAS UDQS R75 TOOR CASH DRAM LDM iss DRAM UDM R76 E s DRAM CLK 2 CKE Nc2 E _DRAM_ODT 83 1 8 1 z E VDD1 da VSS2 VDD2 VSS3 VDD3 41 8 39 NH 554 9 gu VSS5 VDD5 1 8 5 N 40 41 8 vssali VDDQ1 Eee 5 2 VSSQ2 VDDQ2 ol dv vssas VDDQ3 dE 5504 VDDQ4 ON S 41 8 8 1 VSSQ5 VDDQ5 ES VSSQ6 VDDQ6 VSSQ7 VDDQ7 46 VSSQ8 VDDQ8 5509 VDDQ9 al Sal Sal Sal S
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6. E 3398 VCCIO AGND TX X 2 4 5 o RXD NC2 8 RX 8 42 1 80 54 GPIO1 23 CBUS0 5 m CBUS1 E lt 7 GND 24 NC1 GND 5 0 1 80 2C DSR vccs 100 44 e 3 1 80 0q pcbs RESET 619 884 9 AN 5 USB serial console FPGA RTS 18 cTS GND CON13 SLEEP 1 0680 051 CHASIS2 USB CHASIS1 GPIO2 USBDM GPIOS USBDP ID C53 C54 DAT FT232RL 47 768 1007 1 ND p DATE VCC R85 100R R86 220R FPGA USB PRESENT 1 8 1 user push buttons 4 PUSH BOTO 5 PUSHB 1 PUSH_BOT1 cm PUsHBe 4 PUSH BOT2 ed PUSHBS 4 PUSH 576 PUSHB4 4 52 VIN VTT VTTSNS VLDOIN VDDQSNS VTTREF S3 S5 GND PAD GND PGND RT9026GFP 5 SWITCHO SWITCH1 SWITCH2 SWITCH3 DIPSWITCH 4 Project Size A3 SIMPlugIN Board description Development board LX45 based Page description FPGA bank 3 DDR2 user pushbutton amp switches Last modified date Designs S L Thursday August 25 2011 1 1206 1OuF 6 3V 9 4 1206 1OuF 6 3V N 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VIT 1 1
7. 9 GND 10 VCCO 1 10 VCCO 1 11 L31P A19 1 D21 11 L35P A11 M1A7 1 E20 1210 L52P 10014 1 V21 12 IO L30P A21 1 18 13 A18 1 12 1 D22 13 L35N A10 M1A2 1 E22 14 L52N 10015 1 V22 14 L30N A20 M1A11 1 F19 15 15 GND E 16 1 16 VCCO 1 17 L37P A7 1 0 1 F21 17 L39P 1 1 G20 18 L50P M1UDGS 1 T21 18 L51P M1DQ12 1 U20 19 IO L37N M1A1 1 F22 19 IO L39N 1 G22 20 IO L50N M1UDQSN 1 T22 20 10 L51N M1DQ 13 1 U22 21 GND 21 22 1 22 1 GCLK9 IRDY1 M1RASN _ 23 1 H21 23 IO 143 GCLK5 1004 1 1 20 24 IO L48P 8 1 P21 24 IO L49P 10010 1 R20 25 IO L41N GCLK8 1 H22 25 10 L43N GCLK4 M1DQ5 1 J22 26 IO L48N 1009 1 P22 26 L49N M1DQ11 1 R22 27 GND 27 GND 28 VCCO 1 28 VCCO 1 29 1 L44P 1006 1 K21 29 IO L45P A1 11 008 1 L20 147 FWE M1DQO 30 L46P FCS B 1002 1 M21 3011 N20 31 L44N A2 M1DQ7_1 K22 31 L45N 0 MILDQSN 1 122 32 L46N FOE B 1003 1 M22 32 10 L47N LDC M1DQ1 1 N22 33 GND 33 GND 34 1 34 1 2 SIMPlugIN board family Board SIMPlugIN LX45 Document User Manual File simplugin LX45 user m
8. 98 92 s ws 5 5 2 2 72 2 72 1 2 67 71 gt gt gt m 52 N e m e os od os S S S be 2 a 2 a 8 2 NE E bypass capacitors 3 3 INT 72 73 74 75 76 77 gt gt gt gt gt CD 8 2 8 2 d 8 2 S 8 8 mi 2 E 41 8 89 85 91 87 47uF 6 3V VCCO 2 C93 94 98 99 95 di E aT S S 47uF 6 3V 98 8 6 L 5 2 2 E 1206 1206 96 9 aT 2 5 9 5 gt gt 5 power on delay 45 0 TP blue TP1 3 orange 2 6 TP black 5 TP black TP4 VCCO 1 C107 108 109 110 111 Eti SLT SLT S 47uF 6 3V Sel 9 s Ps 08 S PS u3 d 2 E 2 5 m um VCCO 0 121 b m bus Lus ho SLT SLT S 47 6 38 d Sel 48 d Ps 08 S Ps d gt E gt HE 2 RESETTABLE 5A MF R500 Q1 1 2 3 5 111 power plug DMP3025LK3 13 IKA 128 R113 100nF 806R 1 POWER SUPPLY INPUT protections 017 1804 33021 V33
9. With very minor exceptions see next point bellow the pins in the 9 user connector are distributed as shown in the following figuere JMP5 TO JMP6 CONS 45 0 O 2 GND 3 4 IO L19P 1 5 1 6 IO L20P 1 L20N 1 8 B GND 9 VECO 10 10 x IO 19 MICKEY 11 S L31N A18 1 12 z L52P 10014 1 MIDQTS 1 14 m GND 15 m VCCO 1 0 gt IO 137 A7 1 17 L37N 1 18 L50P MTUDQS 1 MIUDQSN 1 20 GND 21 22 IO 141 GCLK9 IRDY1 MIRARE 23 GCLK8 MICASN 1 24 L48P 1 MIDQS 1 26 GND 27 2 IO La4P 29 LAAN MIDO 1 30 L46P FCS B 1 MIDQ3 1 32 GND 33 See detailed complete pin out 2 6 point in this documents Notice power VCCO 3 3 and 5 0 are always the same pins in all the connectors where in Is 0 1 or 2 for FPGA bank 0 1 2 respectively pin 23 and pin 25 are always a pair of global clocks can be used as a differencial pair or as two separated single ended clocks twoconnectors CON1 and 2 have one aditional pair of global clocks the 20 pins are grouped in 10 pairs that follow paired pins of FPGA with only one single exception in CON2 see next point bellow The two tracks negative and positive of each
10. et Mete MS 24 APENDICES A Board layout B Schematics C Bill of Materials Document User Manual File simplugin LX45 user manual rev 03 doc page 5 of24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 0 Introduction and references This manual describes how to operate SIMPlugIN LX45 board SIMPlugIN board is intended for engineers engineering students too that want to enjoy an easy to use and easy to expand FPGA developpment board This board provides on board the essential elements FPGA itself in this case Xilinx Spartan 6 model LX45 BGA 484 package 2 speed grade Comercial temperature range DDR2 memory 64 16 128 Mbytes up to 300 MHz clock 600 MHz data rate SPI flash memory 64Mbit 8 Mbyte for foga content a little less than 2 Mbyte plus 6 Mbyte extra of aditional storage for instance for Microblaze embedded processor firmware Power supply Console port USB serial device A few user leds and switches In adition to these essential elements the board offers 9 connectors with 20 fpga pins each a total for 180 pins available to the user The connectors are standard and easy to use 0 10 2 54 mm pitch 2x17 right angle male header fully polarized SIMPlugIN board family offers many off the self boards that inmediately expand the capability of SIMPlugIN LX45 board At the date of writing this manual there are 8 models avialable of add on b
11. 0603 R113 806R 1 0603 R114 68R 0603 5 1 5 2 OSCILLATOR SOCKET DIP 8 OSCILLATOR SOCKET SW1 DIPSWITCH 4 POS SWITCHDIP4 TPM1 TPM2 TPM3 DNP header 1x1 header 1x1 TP blue keystone tp mp 5011 TP2 TP orange keystone tp mp 5011 TP3 TP yellow keystone tp mp 5011 TP5 TP4 TP black keystone tp mp 5011 TP6 TP7 TP8 TP white keystone tp mp 5011 U1 XC6SLX45 2FGG484C FG484 U2 24 02 48 SOT23 5 04 03 74LVC2G14 SOT23 6 05 SN74AVCAT245PWR TSSOP16 SPI FLASH 64Mb W25Q64BVSFIG SOIC16 300MIL RT9026GFP RT9026GFP MSOP10 con pad DDR2 64Mx16 W971GG6JB 25 DDR2 x16 FT232RL SSOP28 TPS78601DCQ SOT223 6 U12 U13 U14 2 2 015 LM393ADT SOIC8 U16 LM4040DIM3 2 5 SOT23 U17 1804 33021 5 89 3
12. Designs s l Designs S L Project SIMPluglN Board description Development board LX45 based Size Page description Rev FPGA bank 1 oscillators leds 2 3p Board SIMPlugIN LX45 Last modified date Thursday August 25 2011 2 1 FP CMP CS Y20 FP DONE FP CCLK Y21 FP MO AA FP MISO AA20 FP MOSI 20 RESET POW ON 8 VREF2 L5P 2 Y19 lO L5N 2 AB19 16 2 W18 lO L6N 2 8 lO L7P 2 6 L7N 2 T15 L8P 2 L8N 2 U16 ID 2 9 lO L9N 2 8 L10P 2 R16 IO L10N 2 IO 2 V17 IO L11N 2 A EP M1 L14P 2 AA18 L14N D12 2 AB18 IO L15P 2 Y17 IO L15N 2 AB VREF2 AB14 IO L17P 2 IO L17N 2 W15 L18P 2 IO L18N 2 W13 L19P 2 AA16 L19N 2 16 L20P 2 W14 L20N 2 4 IO L21P 2 Y15 L21N 2 AB IO_L22P 2 L22N 2 U12 IO 123 2 4 IO L23N 2 lO L29P 2 N L29N GCLK2 2 L30P GCLK1 D13 2 IO L30N USERCCLK Ap L31P GCLK31 D14 2 AA12 IO L31N GCLK30 015 2 lO L32P GCLK29 2 lO L32N GCLK28 2 11 IO L40P 2 lO L40N 2 U1C CMPCS B 2 DONE 2 IO 2 MO CMPMISO 2 12 CMPCLK 2 L2N CMPMOSI 2 IO L3P DO DIN MISO 5 1 2 IO L3N MOSI CSI B 500 2 2 IO 2 lO L5P 2 L5N 2 L6P 2 IO L6N 2 L7P 2 lO L7N 2 2 IO L8N 2 L9P 2 L9N
13. User oscillator There is an empty socket in OSC2 3 3 volt CMOS DIP8 oscillator should be used G V n 9 J raa SANT ENOJ N03 dE 0 0224l 981 el c ES coc 110 6 So ca r AJNO 11 15 ts CCdNAT m BdAT 22 e ee 5 3 ANYA gt galla E IMS 891 NON 265 d eek E NON NUN _ 22 5 3 5 zu ie MUN mm 852 Meas p E A BH mm HN mm mm 8 E
14. 1 Nia L32P A17 1 IO L52N M1DQ15 1 ATS MiAS T 5010 132 1 lO L52N 1 015 1 22 L33P A15 1 LSEN CA TEM TAS 1 Md del IO L51N 1 TET E T 9 10 L33P A15 1 IO L51N M1DO13 1 2122 MIDI MIWE 1 Hio A14 4 1 L51P MIDOQ12 1 22 10 L50N MIUDQSN 1 ABBAS 1 A13 1 1504 M1UDQSN 1 MUN 1 IO L34N A12 MIBA2 1 IO_L50P_M1UDQS 1 MTDQTI 3 IO_L35P_A11_M1A7 1 L49N 1 1 1 B22 O AP MIDO T IO L35N M1A2 1 IO L49P M1DQ10 1 E UN IND IO L36P A9 1 0 1 IO L48N MiDQS 1 522 19 148 1 ibn K17 L36N 1 L48P MIDQ8 1 E Kx LEN O L37N MIA1 1 E22 0 187 M1A0 1 10_L47N_LDC_M1DQ1_1 N20 10 L47P MIDQO 1 L38P A5 1 O N 1 IO 147 MIDQO 1 M22 L4N FOE B MIDQS 1 L38N A4 MICLKN 1 10 38 5 IO L40N FOE 1 MIDQ2 1 CROCO DUX A4 MICLKN 1 IO L4eP FCS B MiDQ2 1 MHLDGSN T Osan MTODT 3 IO L39P 1 IO L45N 1 1 L22 T15 rzsp Ai MILDOS 1 1 K20 39 MTODT 1 IO L45P A1 MILDOS 1 7455 L44N_A2 MIDQ7 1 O LA0N G
15. 2 IO L10P 2 IO L10N 2 L11P 2 IO L11N 2 L12P D1 MISO2 2 L12N 02 MISO3 2 lO 13 M1 2 L13N D10 2 D11 2 012 2 IO L15P 2 L15N 2 IO L16P 2 IO L16N VREF 2 L17P 2 IO L17N 2 L18P 2 IO L18N 2 IO L19P 2 IO L19N 2 L20P 2 IO L20N 2 L21P 2 L21N 2 L22P 2 IO L22N 2 L23P 2 IO L23N 2 IO L29P GCLK3 2 L29N GCLK2 2 IO GCLK1 013 2 L30N GCLKO USERCCLK 2 131 GCLK31 014 2 GCLK30 015 2 IO L32P GCLK29 2 L32N GCLK28 2 IO L40P 2 L40N 2 XC6SLX45 2FGG484C SIMPlugIN spi jtag probe connector see manual before use CON10 JTDO JTMS JTDI JTCK 3 3 INT FP INIT d LER FP DONE 2 FPPROG N x 5 0 lle R23 TOR FP MISO S R20 108 dm R19 V V 10H SPLSEL ug R25 108 SPI MOSI gt std JTAG probe conector see manual before use HEADER MALE 6x1 10R AA 36 std SPI probe connector 2 see manual before use SPI SEL R31 100R JTDO R32 100R JIMS R33 100R R34 ATOOR JTDI 3308 1 1 JTCK 5 SPI MOSI HEADER MALE 6x1 SIMPlugIN programmer
16. 3 volt 2 5 0 volt gt 2 5 0 volt 3 3 GND 4 2 4 2 5 IO L11P 2 V17 5 IO L50P 2 U9 L9P 2 V19 L40P 2 R11 L11N 2 W17 7 L50N 2 V9 8 L9N 2 V18 8 L40N 2 T11 9 GND 9 GND 10 2 10 2 11 L17P 2 Y16 11 L59P 2 H9 12 IO_L7P 2 T16 12 IO_L8P 2 U17 13 IO_L17N_2 W15 13 L59N 2 H8 14 L7N 2 T15 14 IO L8N 2 U16 15 GND 15 GND 16 2 2 16 2 17 L18P 2 V13 17 L22P 2 T12 18 L10P 2 R16 18 L23P 2 14 19 L18N 2 W13 19 L22N 2 U12 20 IO L10N 2 R15 20 10 L23N 2 R13 21 GND 21 GND 22 2 22 2 23 L32P GCLK29 2 11 23 IO L29P 2 12 24 L63P 2 U6 24 IO L60P 2 T7 25 L32N GCLK28 2 AB11 25 IO L29N GCLK2 2 12 26 1 L63N 2 V5 26 O_L60N_2 R7 27 GND 27 28 2 28 2 E 29 IO L42P 2 V11 29 10 L52P 2 T10 30 146 2 W8 30 IO L51P 2 T8 31 L42N 2 W11 31 L52N 2 U10 32 lO L46N 2 V7 32 1 L51N 2 U8 33 GND 33 GND 34 2 5 34 2 NABLA Designs S L SIMPlugIN board family Board SIMPlugIN LX45 Document User Manual File simplugin LX45 user manual rev 03 doc page 21 of 24 3 Configuration jumpers 3 1 Power supply configuration Before proceding please REVIEW the following points 1 2
17. CUST select VCCO 1 JMP26 voltage select VCCO 2 voltage select voltage regulator nominal 1 5 amp OB JMP20 Document User Manual File simplugin LX45 user manual rev 03 doc page 8 of24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 Some jumpers should always be populated in ALL its positions in normal operation Their function is to allow the user to open the circuit and so be able to put in series ammeter s to monitor the current s of each power supply JMP23 to monitor 1 2 power supply the one used by FPGA core JMP20 to monitor 1 8 power supply used by DDR2 and bank 3 of FPGA chip JMP21 to monitor 3 3 INT used to power VCCAUX of FPGA chip AND to feed the linear voltage regulator that generates 1 8 power supply Notes In adition of DDR2 and bank 3 of FPGA 1 8 supplies a little current to FTDI chip and some pullups see page 4 of the schematics b current used by VCCAUX current measured in JMP21 current measured in JMP20 The rest of the jumpers shown in the above figure are configuration jumpers JMP22 configures the voltage of VCC_CUST position A populated all others not populated 1 2 volt position B populated all others not populated 1 5 volt position C populated all others not populated 1 8 volt position D populated all others not populated 2 5 volt position E populated all others not populated 3 3 volt Note all other co
18. DC Any voltage about that either continous or temporary peak will damage the board Reverse voltage symptom the board will not be internally powered a not a single LED will be lit Overvoltage symtom 1011 will be lit all the others will not Notice that 1011 is the only yellow led in the board also is the only 5 mm through hole led BE CAREFUL even with those protections the board will not survive a abuse like connecting it directly to the AC mains even the relatively mild 100 AC volt mains in U S A MORE you clearly risk FIRE if you do it Document User Manual File simplugin LX45 user manual rev 03 doc page 10 of24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 1 3 User connectors Each of the nine CON1 CON2 CON9 user connectors provides 20 FPGA pins plus different power supplies correspondiing to its asociated bank 3 3 volt 5 0 volt DANGER if the user uses 5 0 volt in his or her custom add on board then care must be taken that any of the 20 FPGA pins does NOT receive more than 3 3 volt since FPGA pins tolerate without problem 3 3 volt even if the bank is powered by a much lower voltage like 1 8 volt or 1 5 volt but will NOT tolerate higher than 4 volt the FPGA chip would get permanently damaged For a working example see schematics of SIMPlugIN SERIAL board that uses 5 volt but does not send any 5 volt signal back to FPGA pins
19. Power supply block diagram 1 3 User connectors DEFAULT jumper configuration JMP20 Fully populated SPECIAL remove and substitute for ammeter to monitor 1 8 current JMP21 Fully populated SPECIAL remove and substitute for ammeter to monitor 3 3 INT current JMP22 Only C position To configure CUST to 1 8 volt populatted JMP23 Fully populated SPECIAL remove and substitute for ammeter to monitor 1 2 current JMP24 Completely unpopulated VCCO 0 power supply for FPGA bank 0 and its asociated connectors JMP25 Fully populated CON1 CON2 configured to CUST JMP26 Fully populated VCCO 1 power supply for FPGA bank 1 and its asociated connectors JMP27 Completely unpopulated CONS 4 and CONS configured to 3 3 volt JMP28 Fully populated VCCO 2 power supply for FPGA bank 2 and its asociated connectors JMP29 Completely unpopulated CONG 8 and configured to 3 3 volt JMP2 unpopulated 3 8 volt available in CON1 JMP1 unpopulated 5 0 volt available in CON1 JMP3 unpopulated 3 8 volt available in CON2 JMP4 unpopulated 5 0 volt available in CON2 JMP5 unpopulated 3 3 volt available in CON3 JMP6 unpopulated 5 0 volt available in CON3 JMP7 unpopulated 3 3 volt available in CON4 JMP8 unpopulated 5 0 volt available in CON4 JMP9 unpopulated 3 3 volt available in CON5 JMP10 1 unpopul
20. TIME FP 3 3 INT 210 5 x DE SPLSEL R17 3 Fg 7 TE 330R L51N 2 E 3 3 INT pos FP INIT GND PUSHBO Bis E FP CMP CS VCCO 2 0 2 R77 RESET POW ON ja FP MO R26 bg 1 1 1 1 BATSAJFILM 7ALVC2G14 3 3 INT LED Y greer E E UU NE C14 100nF D FP DONE 15 R30 47uF 6 3V od FP SUSPEND 28 100R 1 EE 33 MERE RESETY Pull up down LED Y VREF2 ee ee oe ee ee ee ee ee eee eee R35 m m Ls 18 Le SPI flash FPGA firmware MicroBlaze firmware SI 9 aT al Sal 6 74LVC2G14 8 5 8 25 8 U4B R37 1K we 1DIR FPPROG o4 FPPROG 14 2OER 201 3 i Ee c MNT MEE FP SPI SEL_N 4 SPI SEL i 7 FP MOSI TB uias Vee SPI MOSI 12 1B2 4 4 142 5 15 JMP19 0 818 R39 33R FP MISO 8 1 Designs s l P CCLK 9 LS SPI CCLK 6 o FORTE APRES 10 282 813 2A2 3 3 INT R Designs S 112 1 120 16 A A C23 JUH 195 0 20 VCOB VECA 100nF 57 120 24 louis C25 Project SIMPlugiN Board SIMPlugIN LX45 i i 3 3 INTo B48 1K 9 WP l02 Board description while using std SPI programmer or SPI progra
21. user connector even corresponding to OTHER banks Document User Manual File simplugin LX45 user manual rev 03 doc page 9 of 24 Designs 5 1 SIMPlugIN board family Board SIMPlugIN LX45 1 2 1 Power Input voltage and protections The board must be powered with 5 volt DC with 5 tolerance A maximun current of 3 so 15 wats is specified A cable is provided to power the board from a laboratory power supply This cable is not standard but is composed of standard componentes 1 unit of cable assemblly with power jack 1 unit of red PLUG BANANA 1 unit of black PLUG BANANA To power the board from AC mains if you do not have laboratory power supply use a wall power supply unit with 5 volt DC 3 amp Notice that such a wall power unit is optional and must be purchased separatedly Many protections are provided Over current nominal 3 amp resettable fusible proteccts 5 volt DC input o 41 8 is current limited around 2 4 amp by its voltage regulator Also it thermally protects itself 1 2 3 3 that includes 3 3 INT VCC_CUST current limited by its respective voltage regulator around 6 amp Also each is independently thermally protected Voltage reversal the input will tolerate a reversed voltage down to minus 17 volt Any voltage bellow that either continous or temporary peak will damage the board Overvoltage the input will tolerate up to 17 volt of
22. 1 L9N 1 IO IO IO L38P A5 M1CLK 1 L38N A4 M1CLKN 1 GND A13 MiwE IO IO IO L34N A12 M1BA2 1 L60P 1 L60N 1 IO L40P GCLK11 1 5 1 GND VCCO 1 IO 140 GCLK10 M1A6 1 IO L58P 1 L58N 1 IO L59P 1 GND VCCO 1 IO L59N 1 IO L21P 1 IO L21N 1 GND VCCO 1 Vid 3TVW ZXZ H3Qv3H Vid AWW 2XLL H3QV3H JIYW ZXZ H3QV3H U1B VREF1 L1P A25 1 174 DOUT BUSY 1 1 D Lee 3 IO LIN A24 1 IO L74P AWAKE 1 L19 a 7 Mem 2 O L9N 1 7 IO L73N 1 Big I2C SDA L73P 1 Sor 212 110 L9N 1 IO_L1OP 1 IO L72N 1 SHPI L72P 1 FEL ene Oo TTSN 1 IO_L19P 1 Cac 222 IO L19N 1 17 eae IO L20P 1 IO L70N 1 20 1 IO L20N 1 DETUR Je dis ECHO 18 0 Lz1P 1 IO L61N 1 IO L2N 1 O LetP 1 LE MT T CBS IO L60N 1 W22 L29P A23 1 IO L28N VREF 1 LeoP 1 p20 L59N 1 O LEON A22 10 129 23 1 ae L30P A2i MIRESET 1 0 129 22 MTAT4 1 O_L59F_1 L58N 1 OLSON MTATI 1 8 L30P A21 MIRESET 1 IO 1 12 ae O IP AiS MICKE 55 IO L30N A20 1 11 1 O LssP 1 Mis OLSIN MIATZ 1 L53N VREF
23. 14 jOnn 14 2 6 CONI 2 User connectors ecce 15 2 6 1 BANK 0 user connectors 16 2 6 2 BANK 1 user connectors ee 17 2 6 3 BANK 2 ser connectors eee RH RH e on ERR ER MUR e E Ne EH GE Fee eq 19 3 CONFIGURATION JUMPERS CS s cc d da 21 3 1 Power supply configuration 21 Document User Manual SIMPlugIN board family Board SIMPlugIN LX45 File simplugin LX45 user manual 03 doc page 4 of24 Designs S L 3 2 Other configuration 21 e eene eee eene 22 4 LEDS PUSHBUTTONS MICROSWITCHES TESTPOINTS AND OSCILLATORS 22 41 B D D EEEE OA eee 22 4214 Her Ret eem eee 22 4 12 Other EEDS Rated e en EH Ae En 22 4 2 23 4 2 1 oru rta RT STOVE Nea t e Ne a Hte es 23 42 1 PUSHBI 234 tect esi I rei M can 23 4 3 IT RR 23 4 4 OTT 24 4 5 E P 24 4 5 1 25 bam EH deae 24 4 52 User oscillatoE
24. 21 2 LED 1206 green R99 1 SE SE MEUM 1 Vin Vout H OVCC_CUST gt R102 38K8 1 wr 1 GND ie 20 0 1 003 0 27 QN UE 11K8 196 POWER Ge 3K83 1 3K16 1 E de 321141544444 2 Vin Vout H 119 C120 TEE 4 ON TRIM amp 3 1 GND gt 3 2 T POWER Ada niar 42 2 1 200 196 supply generation 45 0 R110 LM393ADT 10K DMP3025LK3 13 SNLED 1206 green U15A PRE 5 0 V33 PROT 129 100nF 25V R108 330R LED 5mm yellow 0 n Designs s l NABLA Designs S L U15B Board SIMPlugIN LX45 Board description Development board LX45 based Size Page description Rev power supply 2 3p Last modified date Thursday August 25 2011 2 1 Revised Thursday August 25 2011 Item Reference Part PCB footprint qty 1 CD1 10uF 25V 1206 1 CD2 10uF 6 3V 1206 9 1 2 4 5 HEADER 17 2 MALE CON6 CON7 CON8 CON9 CON10 HEADER_7X2_M
25. 3 DRAM 0014 We IO L31N VREF 3 IO L52P 3 DRAM A4 DRAM DOIS L82P MspG14 IO L51N M3A4 3 G DRAM Aio DRAM DOI2 L32N M3DQ15 3 IO L51P M3A10 3 DRAM 2 DRAM BOIS UL O L83P M3DQ12 3 L50N 2 3 DRAM WE N DRAM UDGS L33N M3DQ13 3 IO L50P M3WE 3 DRAM UDOS N 134 M3UDQS 3 149 2 3 DRAM AT DRAM DOIG L84N M3UDOSN IO 149 3 DRAM DRAM DOTI A3 IO L35P M3DQ10 3 IO 148 3 DRAM DRAM DOS L35N M3DQ11 3 IO 148 M3BAO 3 DRAM Ai DRAM be IO L36P M3DQ8 L47N M3A1 3 DRAM DRAM DOO Na IO L36N IO L47P 0 DRAM CK N DRAM 1 7 0 1464 M3CLKN 3 BRAM CK P DRAM IO L37N M3DQ1 3 IO L46P M3CLK 3 DRAM ODT DRAM DOS 2 1 10_L38P_M3DQ2_3 451 3 BRAM DRAM LDOS IO L38N M3DQ3 3 145 M3A3 3 4 DRAM A6 DRAM DOS N IO L39P M3LDOS 3 IO 144 GCLK20 6 DRAMAS DRAM DOE 139 M3LDQSN IO 144 GCLK21 5 3 DRAM CAS DRAM DO L40P M3DQ6 143 GCLK22 RDY2 M3CASN 3 DRAM RAS DRAM DOT 140 M3DQ7 3 IO L43P GCLK23 M3RASN 3 DRAM IO 141 GCLK27 M3DQ4 3 DRAM UDM IO_L41N_GCLK26_M3DQ5 3 IO 142 GCLK25 TRDY2 M3UDM 3 FPGA bank 3 IO 142 GCLK24 M3LDM 3 XC6SLX45 2FGG484C 45 0 R79 FPGA RXD 1 8 TXD OSCO 270R DTR OSCI B sre TEST 26 LD6 LD7 4
26. 5P_0 C7 25 IO L37N GCLK12 0 A12 25 10 L35N GCLK16 0 11 26 1 165 SCP2 0 18 26 L5N 0 A7 27 GND 27 GND 28 0 28 0 29 IO L50P 0 B14 29 10 L66P SCP1 0 E16 30 IO L63P SCP7 0 B16 30 10 L2P 0 5 31 L50N 0 14 31 10 166 SCPO 0 D17 32 1 L63N SCP6 0 A16 32 1O_L2N_0 A5 33 GND 33 GND 34 0 34 0 Notes CONG pins 8 do NOT correspond a pair of FPGA balls These are the only exception in all 9 user connectors Pins 23 and 25 are paired global clocks in all 9 user connectors and CON2 are exceptional since both have and aditional pair of global clocks in pins 17 19 NABLA Designs S L Document User Manual File simplugin LX45 user manual 03 doc page 17 of24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 2 6 2 BANK 1 user connectors FPGA FPGA CON3 ball CON4 FPGA pin name or power ball pin FPGA pin name or power pin number pin pin number 1 3 3 volt 113 3 volt 215 0 volt 2 5 0 volt GND gt 3 4 VCCO 1 4 1 5 5 IO L19P 1 B21 5 L32P A17 1 1 C20 L20P 1 A20 L29P A23 M1A13 1 D19 7 IO L19N 1 B22 7 L32N A16 1 9 1 C22 8 L20N 1 A21 8 L29N A22 1 14 1 D20 9
27. ALE_R A CON11 CON12 HEADER MALE 6x1 CON6_125 CON13 CON MINI USB RECEP 14 power plug power plug 1 2 1 1 5 4 1 6 19 26 27 1 10uF 6 3V 1206 C39 C44 C59 C61 C62 C64 C65 C66 C69 C78 C79 C80 81 82 83 88 89 91 C92 C94 C98 C100 C101 C102 C103 C104 C105 C106 C108 C111 C114 C115 C116 C117 0118 C119 C120 C122 C125 C2 C3 C4 C5 C7 C8 C9 C16 C17 C18 C28 C29 C32 C33 C34 C35 C37 C38 C45 C46 C47 048 C49 C50 C52 C10 C11 C12 C13 C15 C21 100nF 24 25 42 43 51 6128 130 C14 C55 C84 C93 C107 47uF 6 3V C121 C22 C23 120pF C30 C36 C40 C41 C56 C57 1uF 6 3V C58 C60 C67 C68 C70 C71 C72 C73 C74 C75 C76 C77 C85 C86 C87 C90 C95 C96 C97 C99 C109 C110 C112 113 123 124 126 127 54 53 47pF 0603 C63 33pF 0603 C129 100nF 25V 0603 D2 D1 BAT54JFILM SOD323 1 RESETTABLE 5A MF R500 MF R500 JMP1 JMP2 JMPS3 JMP4 JMP5 JUMPER 2X1 JUMPER 2 X 1 JMP6 JMP7 JMP8 JMP9 JMP10 JMP11 JMP12 JMP13 JMP14 JMP15 JMP16 JMP17 JMP18 JMP19 JMP30 JMP21 JMP20 JUMPER 2X2 JUMPER2X2 JMP22 JUMPER 5X2 JUMPER 5 X2 JMP23 JMP24 JMP25 JMP26 JUMPER_3X2 JUMPER 3 X 2 JMP27 JMP28 JMP29 LD1 LD2 LD3 LD4 LED 1206
28. CCO 2 See Xilinx documents Spartan 6 FPGA Data Sheet DC and Switching Characteristics and Spartan 6 FPGA SelectlO Resources User Guide 1 6 Oscillators The board ships with a 25 MHz oscillator in OSC1 position Since it is on socket the user can easily change it but it must be taken into account that some of the FPGA examples provided suposse that this oscillator is 25 MHz if you change the frequency the behaviour of these examples for instance the one that exercises the USB device interface could stop working or will need a change in the example source code The other oscillator user oscillator in OSC2 position is an empty socket available to the user Note the oscillator installed must be 3 3 volt CMOS type Notice see schematic that the oscillator is allways powered by 3 3 volt The ouput of the oscillator is fed to the FPGA thorough buffers that act as level translators into whatever power is selected for bank 1 1 7 EEPROM EEPROM is implemented with 24AA02E48T from Microchip The interface with this eeprom is 2 This eeprom provides a unique read only number and identfies your board Do not change this chip since that action would void the warranty The write read part of the eeprom is fully available to the user 1 8 User LEDs pushbuttons and microswtiches The boad provides 4 leds 4 pushbuttons and an one microswitch with 4 position 1 9 Power on reset The board provides one pushbutton PUS
29. CLKTO MIA IO 140 GCLK11 M1AS 1 144 A2 M1DQ7 1 IO LA4P L41P GGLK9 MTRASN 1He1 O L40N_GCLKIO 1 6 pS Sad SSS dee ee eee eee needa see ese eee needa MIGASN 1 IO_L41N_GCLK8_M1CASN_1IO_L43N_GCLK4_M1DQ5 1 20 IO_L42P_GCLK7_M1UDM_T IO_L43P_GCLK5_M1DQ4 1 User leds CLK 25MHZ L42P GCLKT 1 IO 142 GCLK6 TRDY1 MILDM 1 L42N GCLKG 1 XC6SLX45 2FGG484C LEDO 4 us x O 43 3 INT LD1 LED 1206 RED LED1 R5 LED2 R6 102 LED 1206 RED LD3 LED 1206 RED VCCO 1 R9 R10 3K3 3K3 VCCO 1 U2 vec SDA VSS NC 5 100nF 24 02 48 2 Kbit eeprom with unique serial number I2C SCL L73N 1 I2C SDA 173 1 C10 3 3 INT 1 OSCILLATORS OSC1 in Wee Eis R13 CLK 25MHZ L42P GCLKT7 1 74LVC2G14 VOCON 100nF GND OSC 25MHz 3 3 VOLT 5001 nie 100nF C13 OSC2 c VCCO 1 OE 33R 74LVC2G14 GND OSC CLK user 142 GCLK6 1 optional user MHz 3 3 VOLT SOC2 1 R7 100R 1 R11 100R 1 10uF 6 3V Lt Iz NABLA
30. HBO independent of the four user pushbuttons mentioned above When pressed this the signal RESET will be activated for about 100 msec after releasing PUSHBO This will allow to implement a user power on reset 1 10 SPI flash memory The board provides SPI flash 64 Mbit 8 Mbyte memory that will contain FPGA configuration a little less than 2 Mbyte that leaves 6 Mbytes for user data for instance code and data for a Microblaze embeded processor It is implement using W25Q64BVSFIG Winbond chip The chip is always powered by 3 3 volt A level translator chip copes with actual power of bank 2 SIMPlugIN board family Board SIMPlugIN LX45 Document User Manual File simplugin LX45 user manual 03 doc Designs S L So regardless of the power level used by bank 2 for instance 1 8 volt the SPI flash chip will always work at 3 3 volt Same will happen with external SPI programmer either SIMPlugIN programmer or any standar SPI programmer the working voltage will be 3 3 volt page 12 of 24 The SPI memory can be programmed by an standard SPI programmer using 12 or SIMPlugIN programmer using CON10 1 11 FTDI USB gt serial chip The FT232RL FTDI chip interfaces USB PC side to serial FPGA side and provides a serial interface to FPGA for instance for a serial console Even if FPGA is not configured if the board is powered when you connect using standar USB A mini USB cable
31. IO L64N SCP4 0 iO L64P SGPS 0 SOR L3N IO L64P 5 5 0 SCPE 0 L63N 5 6 0 gr6sP ScP7 0 IO LEP 0 IO LAN 0 IO L63P SCP7 0 VREFD m L5P 0 IO VREF 0 18 7 ig I5 LeP D 19 15N 0 IO L62P 0 m orno H 16 0 L51N 0 WIL FI E 0 it so 0 LeN 0 io Ls1P 0 IND CINO IO L7P 0 IO L50N 0 IG 150P 0 5 eet 17N 0 IO L50P 0 cl4 1014980 euro IO L8N VREF 0 NC NC NC gt G8 NC NC E9 NC Nc ra 99 NC HL NC E10 Nc D13 10_ NC Ne Nc IO L32P 0 NC 6155070 0 IO_L32N_0 NG VREFO 013 0 0 VREFO_ 15 23305 10 133P 0 IO L38N VREF 0 T L34P GCLKT9 L37N GCLK12 0 6 LN Geike IO L34P GOLK19 0 IO L37N GCLK12 0 IO L37P GOL 0 a 10 L34N GCLKI8 0 IO L37P GCLK13 GCLKT4 0 IC IO 135 GCLK17 0 IO L36N GCLK14 0 t17 q5 L36p GCLKTS 0 n 0 L35N GCLK16 0 L36P GCLK15 0 XC6SLX45 2FGG484C VCCO 0 R2 100R 1 R3 1 i 100R 1 x 5 5 P me gt gt Designs s l Designs S L Board SIMPlugIN LX45 Board description Developmen
32. JMP19 that way the FPGA will relase these pins to the external programmer Remove after programming is done to allow normal operation That is not necessary when using SIMPluglN programmers Momentary installation of JMP19 will force reloading of the FPGA 4 LEDs pushbuttons microswitches testpoints and oscillators 4 1 LEDs 4 1 1 User LEDS There are 4 red LEDs available to the user All are active low lit when corresponding signal is low IMPORTANT since the leds are supplied with fixed 3 3 volt independent fo the voltage selected to supply bank2 then the LEDS must be managed as Led ON put the corresponding signal to low LED OFF put the corresponding signal HiZ LED signal Asociated FPGA ball name Asociated ball number LED1 LEDO IO L72P 1 P17 LED2 LED1 L71N 1 M18 LED3 LED2 L71P 1 M17 LED4 LED3 170 1 V20 4 1 2 Other LEDs LD5 green will be ON after FPGA has finished configuration from JTAG programmer or from on board SPI memory LD6 green will blink when there is activity in TX line of FTDI chip LD7 green will blink when there is activity in RX line of FTDI chip LD8 green will be ON when 1 8 volt is active 109 green will be ON when 3 3 volt is active LD10 green will be ON when 5 0 volt is active Document User Manual File simplugin LX45 user manual 03 doc page 23 of24 Designs S L SIMPlugIN board family Board
33. L15N 2 17 8 L47N 2 Y8 8 L6N 2 18 9 GND 9 GND 10 2 10 2 11 L54P 2 5 11 14 D11 2 18 12 10 2 Y9 12 L5P 2 Y19 13 1 L54N 2 AB5 13 lO L14N D12 2 AB18 14 10 L43N 2 AB9 14 1 L5N 2 AB19 15 GND 15 GND 16 VCCO 2 16 2 17 1O_L62P_D5 2 WA 17 2 AA16 18 L44P 2 W10 18 L64P 08 2 AA2 19 10 L62N 06 2 Y4 19 L19N 2 AB16 2010 L44N 2 Y10 20 L64N 09 2 AB2 21 21 22 2 22 2 23 10 L30P GCLK1 D13 2 Y13 23 GCLK31 014 2 12 24 L20P 2 W14 24 IO 157 2 4 L30N GCLKO USERCCLK GCLKS30 015 25 2 13 25 2 12 26 L20N 2 Y14 26 L57N 2 4 27 GND 27 GND 28 VCCO 2 28 2 29 1 L58P 2 29 L45P 2 8 30 L21P 2 Y15 30 L49P 2 6 31 L58N 2 31 L45N 2 AB8 32 L21N 2 AB15 32 10 L49N 2 AB6 33 GND 33 GND 34 2 34 2 SIMPlugIN board family Board SIMPlugIN LX45 Document User Manual File simplugin LX45 user manual rev 03 doc page 20 of24 FPGA FPGA 8 FPGA name or CONO FPGA pin name ball pin power pin number pin power pin number 113 3 volt gt 1 3
34. PROT D1 2 1206 25 1206 louF 6 3V 3 3 INT 1 8 volt DDR2 supply 1206 5 00 ES bn gt gt gt gt gt 8 95 95 95 7 or ev ev ev 5 0 O Eas b bs gt gt gt gt gt 5 0 V33 PROT R112 VREF 2 5VOLT C130 100nF VA LM4040DIM3 2 5 T U16 Yev ev ev ev e 25 Sel 8 S 98 98 Mi z 2 1 Hcet 1 4 5 2 ENABLE 5 5 s 5 5 5 GND e GND TAB LED 1206 green R96 TPS78601DCQ 30K1 196 generation P Ne ae SURE NENE ADD EROR ADR ADR OR SENE S ji xi in sy et U 3 3 1 1 ON TRIM A das GND JMP
35. RED 1206 LD5 LD6 LD7 LD8 LD9 LD10 LED 1206 green 1206 LD11 LED 5mm yellow RADIAL 5mm OSC1 25MHz 3 3 VOLT OSC8 OSC2 optional user MHz 3 3 VOLT OSC8 PUSHB1 PUSHB2 PUSHB3 SWITCH TACTILE 6x6 mm vertical switch 6x6mm vertical PUSHB4 PUSHBO Q1 Q2 DMP3025LK3 13 TO252 3L R1 R4 R5 R6 R8 R31 R32 100R 0603 R33 R34 R85 R2 R3 R7 R11 R30 R35 100R 1 0603 R9 R10 R16 R21 R24 R26 3K3 0603 R12 R13 R14 R15 R29 R39 33R 0603 R77 R17 R37 R42 R47 R48 R112 1K 0603 R18 2K2 0603 R19 R20 R23 R25 R40 R43 10R 0603 R44 R45 R22 R36 R46 R81 R83 R99 330R 0603 R108 R28 R27 470R 0603 R38 R41 140R 1 0603 R64 R49 DNP 0402 R50 150R 0402 R51 R52 OR 0603 R53 R54 R55 R56 R57 R58 49R9 1 0402 R59 R60 R61 R62 R63 R66 R67 R68 R69 R70 R71 R72 R73 R74 R65 R75 R76 R79 R78 R80 R82 R84 R100 R110 R86 R87 R88 R89 R90 R91 R92 R93 R94 R95 14 0 1 0603 R96 30K1 1 0603 R97 47R 0603 R103 R98 3K16 1 0603 R101 20K0 1 0603 R102 38K8 1 0603 R104 3K83 1 0603 R105 11K8 1 0603 R106 42K2 1 0603 R107 200 1 0603 R109 1M 0603 R111 1K 1
36. SIMPlugIN LX45 LD11 YELLOW 5 mm When ON it indicates OVERVOLTAGE in board power supply input DISCONNECT INMMEDIATELY the power to the board and find out why the intended voltage is not 5 volt DC 5 as it should be 4 2 Pushbuttons 4 2 1 PUSHBO Its control circuits is PUSHBO RESET POW ON R77 74LVC2G14 100nF C15 47uF 6 3V When pressed signal RESET POW ON is activated high When released R18 C14 network maintains activation for around 100 msec Note RESET POW ON correspondon to FPGA ball name IO L4P 2 ball number T18 IMPORTANT when the board is powered up a 100ms pulse of RESET POW ON is generated but due to the time needed for FPGA configuration is most likely than when FPGA has finished configuration the RESET POW ON pulse will have already finished So this circuit is for user manual reset but NOT for power up reset 4 2 1 5 1 2 3 4 of them are active low When not pressed a pullup guaranties a high level when pressed the signal is forced to GND low level IMPORTANT there are NO provision for debouncing So the user must supply a debouncing system in his or her FPGA design or make it inmune to bounces pushbutton signal FPGA ball name FPGA ball number PUSHB1 PUSH L2P 3 W3 PUSHB2 PUSH 1 IO L7N 3 P7 PUSHB3 PUSH_BOT2 L8P 3 P6 PUSHB4 PUSH_BOT3 L8N 4 3 Microswitches of th
37. SIMPlugIN board family Board SIMPlugIN LX45 Document User Manual File simplugin LX45 user manual 03 doc page 1 of 24 Designs S L SIMPlugIN LX45 User Manual SIMPlugIN board family member Revision see file name on page header Date September 13 2011 ET d 5811 1 33 1 1 SIMPlugIN LX4s 45 75088 mL JMP22 IWARNING INSTALL ONLY CON4 BANK 1 SIMPlugIN board family Board SIMPlugIN LX45 Document User Manual File simplugin LX45 user manual 03 doc REVISION HISTORY page 2 of 24 NABLA Designs S L 0 1 First release 0 2 Corrected factory default jumper configuration Document User Manual SIMPlugIN board family Board SIMPlugIN LX45 File simplugin LX45 user manual 03 doc page 3 of 24 Designs 5 1 INTRODUCTION AND REFERENCES 5 22 22 2c tna anna ran ropa a uu rk a 5 0 1 5 1 GENERAL aai 6 1 1 Overall block 6 1 2 Power supply block 2 041 0 4 7 1 2 1 Power Input voltag
38. al Sal VSSQ10 VDDQ10 88 8 58 25 DDR2 memory vss DLL vpp DLL V VTTREF VREF DDR2 64Mx16 W971GG6JB 25 3 8 eee 18 user ipswitch NABLA Designs s l Board SIMPlugIN LX45 Rev 2 3p 1 3 3 INT 1 20 VCCO 0 E SS SE VCCO 0 voltage MES selection for bank 0 l 25 TP white 6 i PORC TRE TR TEETE ARETE IEEE IEE Voge FP ACE Vy ie vue Vue AE ARE EE a eset Rs Pia a a a gt VCCO 1 1 voltage selection re for bank 1 B 27 TP white 7 ee at E VCCO 2 voltage eure selection o for bank 2 1 JMP29 TP white TP8 12 55 59 60 656 57 58 47uF 6 3V 38 48
39. anual rev 03 doc FPGA 5 FPGA pin name or power pin pin number 1 3 3 volt 215 0 volt GND 4 VCCO 1 5 L10P 1 F16 L33P A15 M1A10 1 G19 7 IO L10N 1 F17 8 L33N A14 1 4 1 F20 9 GND 10 VCCO 1 11 19 1 G16 12 IO L38P A5 1 H20 13 L9N 1 17 14 L38N A4 1 419 15 GND 16 VCCO 1 17 L34P A13 1 19 18 L60P 1 W20 19 L34N A12 2 1 H18 20 IO L60N 1 W22 21 GND 22 VCCO 1 23 40 GCLK11 M1A5 1 K20 24 10 L58P 1 16 140 GCLK10 M1A6 25 1 K19 26 10 L58N 1 L15 27 GND 28 VCCO 1 29 1 L59P 1 P19 L21P 1 K16 31 L59N 1 P20 32 L21N 1 J16 33 GND 34 1 18 24 NABLA Designs S L Document User Manual File simplugin LX45 user manual 03 doc page 19 of 24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 2 6 3 BANK 2 user connectors FPGA FPGA CONG ball CON7 FPGA pin name or ball pin FPGA pin name or power pin number pin power pin number 1 3 3 volt 1 3 3 volt 2 5 0 volt 2 5 0 volt GND 3 4 2 4 2 5 IO L53P 2 W6 5 L15P 2 17 6 L47P 2 W9 L6P 2 W18 L53N 2 Y6
40. ards Sullins Connector Solutions p n SFH11 PBPC D17 RA BK This connector is polarized and keyed so it is imposible to missplace it when pluging it into the user connectors SIMPlugIN board family Board Document User Manual File simplugin LX45 user manual rev 03 doc SIMPlugIN LX45 2 6 1 BANK 0 user connectors page 16 of 24 FPGA FPGA CON1 FPGA FPGA ball number pin power pin number 1 3 3 volt 113 3 volt 215 0 E 215 0 volt 31 GND 3 GND 4 VCCO 0 5 4 0 5 IO L4P 0 B6 06 164 SCP5 0 C17 6 11 L62P 0 D15 7 IO 0 A6 7 L3N 0 C6 8 L64N 5 4 0 A17 L38P 0 C13 9 GND gt 9 GND 10 VCCO 0 10 0 11 L6P 0 B8 1 L7P 0 09 12 L51P 0 15 12 L49P 0 014 13 L6N 0 A8 L7N 0 C8 14 L51N 0 A15 14 L49N 0 C14 15 GND 15 16 0 16 0 s 17 34 GCLK19 0 10 17 136 GCLK15 0 D11 18 0 D10 18 IO L32P 0 D7 L34N GCLK18 __ 136 GCLK14 1910 10 19 0 C12 20 IO L33N 0 C10 20 10 L32N 0 D8 21 GND 21 GND 22 0 22 0 23 IO L37P GCLK13 0 12 23 L35P GCLK17 0 C11 24 10 L65P 0 B18 24 O_L
41. ated 5 0 volt available in 5 11 unpopulated 3 3 volt available in CON6 JMP14 unpopulated 5 0 volt available in CON6 JMP12 unpopulated 3 8 volt available in CON7 JMP15 unpopulated 5 0 volt available JMP13 unpopulated 3 3 volt available in CON8 JMP16 unpopulated 5 0 volt available in CON8 JMP17 unpopulated 3 8 volt available in CON9 18 5 0 volt available in CON9 NOTE 1 JMP22 JMP24 and JMP25 are configured so as to provide 1 8 volt to BAKO The reason is that that bank is the default one for SIMPlugIN VIDEO board that works ONLY with 1 8 volt If that is not your case then configure BANKO supply as needed NOTE 2 JMP1 JMP2 JMP18 are unpopulated but a female jumper is provided but installed so as NOT to short the tow pins of the jumper Document User Manual File simplugin LX45 user manual 03 doc page 22 of24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 3 2 Other configuration jumpers JMP30 when populated pulls to low FPGA HSWAP pin when this pin is low it enables I O pullups before and during configuration default NOT populated JMP19 when populated forces the FPGA into programming mode and so it put all its pins en HiZ with or without internal FPGA pullups depending on the state of HSWAP pin see JMP30 Default NOT populated NOTES While using SPI standard programmer it is necessary to install
42. e and protections pp 9 1 3 Y cicevsisisssossosiccecsessesceseciecsossvonvesbevicseebeseosssteesobeboadesbesdesesdecsoncsdesissvesesssdsubedsesbetenssuensssdecdadsoberdadesbasbssseecsoessenes 10 1 4 Exceptions in user connector 11 1 5 fot FPGA 11 16 ONI EI 11 PR 11 1 8 User LEDs pushbuttons and microswtiches 2 eene enata seta seta setate sts esses seas 11 1 9 POWeL OM eset ra aves RET eue ere eo 11 1 10 SPI 11 1 11 FTDI USB serial 12 112 DDR2 RR 12 113 ERT y E E 12 2 CONNECTORS E 13 PADELO End 13 2 2 CON11 JTAG programming for standard programmers 13 2 3 CON12 SPI programming for standard programmers 4 aeree eee eee esee entes entes etn tune 13 2 4 CON10 SPI and JTAG programming for SIMPlugIN programmer ee eeee seen eere neenon tasto
43. em are active low When not pressed pullup guaranties a high level when pressed the signal is forced to GND low level microswitc signal FPGA ball name FPGA ball number h position 1 SWITCHO L11P 3 N6 2 SWITCH1 IO L11N 3 N7 3 SWITCH2 123 3 7 4 SWITCH3 IO L23N 3 M8 Document User Manual File simplugin LX45 user manual 03 doc page 24 of24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 4 4 Testpoints Some testpoint with hook are provided for easy measurement fo the different power supply voltages testpoint colour voltage comment After proteccion circuits Will measure 0 volt or near if TP1 Blue 5 0 one of the protections is tripped TP2 Orange 3 3 Fixed 3 3 volt TP3 Yellow VCC CUST Custom voltage depends on JMP22 configuration TP4 Black GND Reference for measurements TP5 Black GND Reference for measurements TP6 White VCCO 0 Voltage for bank 0 and asociated user connector TP7 White VCCO 1 Voltage for bank 0 and asociated user connector TP8 White VCCO 2 Voltage for bank 0 and asociated user connector 4 5 Oscillators 4 5 1 25 MHz The board is shipped with 25 MHz oscillator installed in OSC1 The oscillator is socketed so the user can easily change it use a 3 3 volt CMOS DIP8 oscillator In that case take into account that some of the examples provided could work in an unexpected way 4 5 2
44. mbinations are not harmful but are not usual For example o all positions not populated 0 75 volt too low o position C and D both populated all other not populated 2 64 volt not standard JMP24 and JMP25 configure VCCO 0 FPGA bank 0 Asociated user connectors CON1 and CON2 JMP24 JMP25 voltage fully populated completely NOT populated CUST completely NOT populated fully populated 3 3 All other combinations ILEGAL dangerous DANGER some illegal icombinations could damage the board and or add on boards pluged into ANY of user connector even corresponding to OTHER banks JMP26 and JMP27 configure VCCO 1 FPGA bank 1 Asociated user connectors CON3 CON4 and CON5 JMP26 JMP27 voltage fully populated completely NOT populated VCC_CUST completely NOT populated fully populated 3 3 All other combinations ILEGAL dangerous DANGER some illegal icombinations could damage the board and or add on boards pluged into ANY of user connector even corresponding to OTHER banks JMP28 and JMP29 configure 2 FPGA bank 1 Asociated user connectors CON6 CON7 CON8 and CON9 JMP28 JMP29 voltage fully populated completely NOT populated VCC_CUST completely NOT populated fully populated 3 3 All other combinations ILEGAL dangerous DANGER some illegal icombinations could damage the board and or add on boards pluged into ANY of
45. mming 43 3 INTO R4Z 1K HOLD IO3 Development board LX45 based through st JTAG probe 5 74 4 245 Size Page description Rev normal operation U6 SPI FLASH 64Mb W25Q64BVSFIG FPGA bank 2 SPI flash memory programming interface 2 3p Last modified date Thursday August 25 2011 1 U1D DNP R49 Ba IO LIN VREF 3 BANCO 3 PUSH wa LES 1508 R50 wi 12 3 IO L82N 3 1 80 L2N 3 L82P IO L7P 3 L81N 3 PUSH BOT1 PUSH 3 1 1 FE m bs E PUSH BOT3 IO L8P 3 IO L80N 3 LL u 2 IO L8N 3 L80P 3 Sal Sal Sal IO L9P 3 IO 160 2 eX ees 53 IO L9N L60P 2 IO L10P 3 IO L59N L10N 3 O L59P 3 2 IO LHP 3 IO L58N 3 SWITCH2 IDE HIS O L58P SWITCH3 IO L23P 3 L57N 3 R65 100R FPGA RXD L23N O L57P 3 124 3 L55N M3A14 3 L24N 3 IO L55P M3A13 3 96 EPGA RTS 10 125 3 4 1O Tean Man 1 3 SB IO L25N 3 L54P M3 c8 PRESENT IO L26P 3 IO L53N M3A12 3 L26N 3 IO L53P 3 PNP net o IO_L31P_3 IO L52N 9
46. oards SIMPlugIN VIDEO video DAC to be able to implement VGA video output SIMPlugIN ETHERNET 100 with 10 100 Ethernet phy chip SIMPlugIN USB with USB 2 0 12 Mbit full speed device transceiver chip SIMPlugIN SD with SD card slot SIMPlugIN SERIAL 1 x RS232 plus 2 x RS485 the three interfaces can be used simultaneously SIMPlugIN LED 20 x test point plus 20 x led both red and green led for each test point SIMPlugIN DIGIT with 2 x hex display 7 segment display 4 micro switches SIMPlugIN PROT prototyping board with perforated 0 10 grid and two sided plated holes 0 1 References Note from time to time companies modify their web pages So some of the detailed web link may be obsolete when you read the present document Many documents are available in www xilinx com concerning Spartan 6 FPGA In http Avww xilinx com support documentation spartan 6 htm there is comprehensive list of them W971GG6JB DDR2 SDRAM data sheet Revision A06 in www winbond com W25Q64BV 64M bit Serial SPI Flash memory data sheet Revision E www winbond com Male 2x17 pin connector on SIMPlugIN LX45 board model 75867 106LF See 75867 family data sheet Rev AM Dec16 2010in www fciconnect com Female 2x17 pin connector all SIMPlugIN add on boards model SFH11 PBPC D17 RA BK See data sheet in www sullinscorp com FT232RL usb serial chip See datasheet and download software drivers for Windows Linux Mac in w
47. pair have PCB tracks that are carefully matched lenghts notice different pairs have different lenghts that is the pairs are matched within themselves but NOT with respect to other pairs 3 3 and 5 0 power lines are fed to the connector through jumpers Remove these jumpers unless you are really using this power supplies in your custom add on board Document User Manual File simplugin LX45 user manual 03 doc page 11 of24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 1 4 Exceptions in user connector uniformity Each of the nine CON1 2 9 are very similar except the following differences CON2 pins and 8 do NOT correspond to a pair of FPGA pins CON1 and CON have an aditional pair of global clocks CON1 and are connected to FPGA bank 0 and powered by 0 as bank 0 itself CONS and CONB are connected to FPGA bank 1 and powered by VCCO 1 as the bank 1 itself 7 CONS are connected to FPGA bank 2 and powered by VCCO 2 as the bank 2 itself 1 5 VREF for FPGA banks Each FPGA bank 0 1 2 have a voltage divider implemented with two 100 ohm resistors bypassed with capacitors that feeds all the VREF pins of each bank with its VCCO divided by two where is 0 1 2 That allows the user to select for each pin all I O standard except HSTL Ill and HSTL 11 18 the only two I O standard that require VREF different to V
48. r 0 10 2 54 mm pitch is provided 12 pin out MISO output fron the board input to the programmer SEL chp select input to the board MOSI input to the board CLK output from the programmer GND O O01 BR OO PO 3 3 volt Pin 1 is clearly marked as well as the function of each pin Document User Manual File simplugin LX45 user manual rev 03 doc page 14 of 24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 CAUCTION carefully verify that the connection that you make match the stated functionality of each pin Except for GND all the pins have series resistor 330 ohm for 3 3 100 ohm for the rest This series resistor do not normally interfere with SPI programmer and are reasonable protection if the conections are missplaced If the connections are OK and If you have problems with your SPI programmer try reducing the programming clock frequency Notice due to the 330 ohm series resistor in pin 6 this pin can NOT power supply the SPI programmer IMPORTANT while using the external standard SPI programmer JMP19 must be populated this will force the FPGA SPI related pins to HiZ and so the SPI could be driven by external programmer Remove that jumper after SPI programming to allow normal operation 2 4 10 SPI JTAG programming for SIMPluglN programmer 7 x 2 male header right angle shrouded Standa
49. rd pin numbering see drawing bellow Specific connector for SIMPlugIN programmer SPI JTAG programmer 10 pin out 1 2 TMS 3 TDI 4 TCK 5 3 3 volt 6 INIT 7 DONE 8 PROG pin 1 9 5 0 volt marking 10 GND 11 5 12 CLK 13 SEL 14 MOSI 2x5 2 5 CON13 mini USB Standard mini B USB receptacle right angle through hole CON 13 pin out 1 45 0 2 DAT 3 DAT 4 ID NOT connected 5 GND The usb connects to a USB gt serial chip from FTDI FT232R Document User Manual File simplugin LX45 user manual rev 03 doc page 15 of 24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 2 6 CON1 2 CON9 User connectors 17 x 2 male header right angle shrouded Standard pin numbering see drawing in bellow NOTICE that in all user connectors pins that connect to FPGA balls are routed in PCB as a pair and always goes to two paired FPGA pins The pairs are 5 and 7 6 and 8 11 and 13 1 12 and 14 marking 17 and 19 18 and 20 23 and 25 24 and 26 29 and 31 30 and 32 pin 1 in ONLY exception CON2 pins 6 and 8 do NOT make visi a pair All connectors provides 2 paired global clock Aditionally CON1 and CON provides 2 aditional paired global clocks Recommended mating conector to be used in add on bo
50. t board LX45 based Page description Rev FPGA bank 0 2 3 Last modified date Thursday August 25 2011 1 5 6 45 00 GND L19P VCCO 1 L19N 20 L20N GND A19 1 Ebb oN A18 M1A12 1 L52P 10014 1 L52N_M1DQ15 1 GND 37 A7 1 0 1 VCCO 1 L37N_A6 MIATT L50P_M1UDQS_1 L50N_MiUDQSN_1 GND IO 141 GCLK9 IRDY1 MiRASKCO O fo IO 141 GCLK8 M1CASN 1 IO IO 48 1008 1 148 1009 1 GND 0 1 2 1 L46P_FCS MIDG2 1 146 FOE 1003 1 GND VCCO 1 JMP7 3 O JMP8 45 0 0O 0O GND A17 320 A16 1 9 1 L29P A23 M1A13 1 L29N A22 M1A14 1 GND 135 A11 MiA7 L35N A10 MIAZ 1 21 1 L30N A20 1 GND 139P 1 1 VCCO L39N MiODT 1 M1DQ12 1 L51N M1DQ13 1 GCLK5 1004 1 GND VCCO 1 IO 143 GCLK4 M1DQ5 1 IO L49P_M1DQ10_1 IO IO L49N_M1DQ11_1 GND 145P_A1_ MILDQSY9CO 1 L45N_AO_ MILDQSN 1 IO IO IO L47P_FWE M1DQO 1 147 LDC M1DQ1 1 GND VCCO 1 JMP9 43 80 0O JMP10 45 0 O GND L10P 1 veco IO IO L10N 1 A15 M1A10 1 IO IO L33N_A14 1 4 1 GND L9P 1 VCCO
51. the board to the PC the FTDI should be recognized and a new COM port for instance should appear in your PC If it is not recognized then you should download software driver for your operating system e g Windows 7 or Linux for FT232R chip in www ftdichip com The signals provided are FPGA TxD output from FPGA input to FTDI RxD input to FPGA output from FTDI TxD pin FPGA RTS active low output from FPGA input to FTDI CTS pin FPGA CTS active low input to FPGA output from FTDI RTS pin FTDI pin FTDI pin signal FPGA ball name FPGA ball number name number RTS 3 FPGA CTS lO L25P 3 M6 CTS 11 FPGA RTS 125 3 L6 TxD 1 FPGA RXD lO L24P 3 R4 RxD 5 FPGA TXD L24N 3 P4 1 12 DDR2 memory Provided by W971GG6JB Winbond chip with 64M x 16 128 Mbyte DDR2 SDRAM memory chip Notice when devoloping your FPGA using Xilinx ISE tools and implement memory you should enter DDR2 memory and then select as model Micron MT47H64M16XX 25 that is Micron memory exact to W971GG6JB Winbond The memory can be operated up to 300 MHz clock 600MHz data rate 1 13 JTAG interface There are two connector to plug a JTAG programmer 11 for standard JTAG programmer and 10 for SIMPlugIN JTAG SPI programmer In both cases the programmer will see 3 3 volt working voltage regardless of the actual voltage configured for bank 2 Doc
52. ument User Manual File simplugin LX45 user manual rev 03 doc page 13 of24 Designs S L SIMPlugIN board family Board SIMPlugIN LX45 2 Connectors 2 1 CON14 power input The board should be powered with 5 volt DC with female power plug with 2 1mm Inner Diamter and 5 5mm Outer diameter Since the expected current for the board is 3 Amp then the connector should be rated at 5 Amp 4 T S CON14 pin out Outer contact 0 volt Inner contact 5 vol DC 2 2 CON11 JTAG programming for standard programmers 6x1 male header 0 10 2 54 mm pitch is provided 11 pin out JTAG 1 TDO gt gt 2 TMS e EnD 3 e 4 TDI as 5 GND es 6 3 3 volt Pin 1 is clearly marked as well as the function of each pin CAUCTION carefully verify that the connection that you make match the stated functionality of each pin Except for GND all the pins have series resistor 330 ohm for 3 3 100 ohm for the rest This series resistor do not normally interfere with JTAG programmer and are reasonable protection if the conections are missplaced If the connections are OK and If you have problems with your JTAG programmer try reducing the programming clock frequency Notice due to the 330 ohm series resistor in pin 6 this pin can NOT power supply the JTAG programmer 2 3 CON12 SPI programming for standard programmers 6x1 male heade
53. ww ftdichip com 24AA02E48T eeprom with I2C interface and unique serial number See data sheet in www microchip com SIMPlugIN board family Board SIMPlugIN LX45 Document User Manual File simplugin LX45 user manual 03 doc page 6 of24 Designs S L 1 General description 1 1 Overall block diagram 25 2 oscillator 0 CON3 Symbols user E functional block oscillator CON4 JTAG control signals 4 LEDs ess bower Supply 3 3 INT 1 2 BANK1 1 8 VCCO0 1 DDR2 BANK3 memory ue BANKO FTDI CON2 CON13 USB gt serial console 4 user CON6 push buttons CON7 4 user power on micro switches RESET button CON8 CON11 SPI d G pom flash in memory CON10 SIMPlugIN programmer SPI CON12 CON14 std SPI De programmer input SIMPlugIN board family Board SIMPlugIN LX45 Document User Manual File simplugin LX45 user manual 03 doc page 7 of 24 Designs S L 1 2 Power supply block diagram CON14 9 volt DC overcurrent reversal overvoltage input protection protection protection DC DC OA converter OB 21 2 1 3 JMP23 DC DC 23 3 1 3 3 3 INT JMP21 DC DC converter nominal 3 amp JMP22 AO VGC CUST voltage select Lj O pO JMP24 VCCO 0 voltage VCC
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