DNA/DNR-CT-651 Precision Timing Interface Board — User Manual
Contents
1. DQ LN ACTIVE flag is needed to switch on STS LED on CPU layer DQ LN DCEN flag enables DC power and all operations with the layer 3 3 Layer specific The CT 651 layer API provides two functions that directly access configuration Commands registers See register definition for details See the PowerDNA API Reference and Manual for a complete description of these functions Parameters e DqAdv651SetRegister This function writes value to the selected reg register reg specifies the register of interest DqAdv651GetRegister This function reads value from the selected reg register reg specifies the register of interest Copyright 2010 alll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 0 United Electronic Industries Inc Date January 2010 651 Chap3 fm 9 Index B Block Diagram 3 C Channel List Settings 9 Configuration Settings 9 Conventions 1 D Data Representation 9 Disabled 4 DNx CT 65 2 DW DAC Write Register 4 F Features 2 Flywheel oscillator 3 Functional Description 2 3 FWCFG Output Mode Config Register 4 FWCLK MIN Flywheel Clock Divider Auto correc tion Low Limit 4 FWCNT Current value of flywheel counter 4 FWCRH Input clock High count in 100 160 MHz ticks 4 FWCRP Input clock Period count in 100 160 MHz ticks 4 FWDC Flywheel Duty Cycle Registe 4 FWDIV Flywheel Output Period Register 4 H High Level API 8 l Input Au2. ManualLOF fm DNx CT 651 Precision Timing Interface Board Chapter 1 Introduction Chapter 1 Introduction This document outlines the feature set and operation of the UEI DNA and DNR CT 651 Precision Timing Interface boards for use with UEI s Cube and RACKtangle data acquisition systems 1 4 Organization This DNA CT 651 User Manual is organized as follows of this manual Chapter 1 Introduction This section provides an overview of the document content device architecture functional description connectivity and logic of the board Chapter 2 Programming with the High Level API This section explains how to program the CT 651 using the UEIDaq Framework High Level API Chapter 3 Programming with the Low Level API This section describes how to program the CT 651 using the Low Level API e Appendix A Accessories This appendix contains a list of associated equipment typically used with the unit ndex This is an alphabetical listing of topics covered in this manual Manual Conventions To help you get the most out of this manual and our products please note that we use the following conventions Tips are designed to highlight quick ways to get the job done or reveal good ideas you might not discover on your own NOTE Notes alert you to important information CAUTION Caution advises you of precautions to take to avoid injury data loss and damage to your boards or a system crash Text formatted in
3. S INC AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS Products sold by United Electronic Industries Inc are not authorized for use as critical components in life support devices or systems A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness Any attempt to purchase any United Electronic Industries Inc product for that purpose is null and void and United Electronic Industries Inc accepts no liability whatsoever in contract tort or otherwise whether or not resulting from our or our employees negligence or failure to detect an improper purchase Note Specifications shown in this document are subject to change without notice Please check with UEI for current status Table of Contents Chapter 1 Introduction suullleeeeeeseeeeee nnn 1 1 1 Organization of this manual llleleeee ee 1 1 2 DNx CT 651 Precision Timing Interface Board Features 0 005 2 1 3 ioc D 2 1 4 DNX CT3651 2 52 v abe uve eV e Ee dena de 2 1 5 Functional Description lislsieeee eee eae 3 1 5 1 REJIS cq RT rr TT 4 1 5 2 Operationen iaaa gen a RR SI DR REN REA n RU ER Kee ee Eoo eee CRUS 4 1 6 Specifications 00 00 cc n 5 1 7 Wiring and Connectors o oec errire rren EOE E eee 5 1 8 PMO eras dcbet peas be peni eae a ea ide era
4. T 651 is currently available Although it will be provided in the near future the schedule has not yet been determined Check with UEI periodically for current status REL A ROTAMAARALA M M M H M M MM ee Copyright 2010 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 0 United Electronic Industries Inc Date January 2010 651 Chap2 fm rt DNx CT 651 Precision Timing Interface Board Chapter 3 Programming with the Low Level API Chapter 3 Programming with the Low Level API This section describes how to program the PowerDNA cube using the low level API The low level API offers direct access to PowerDNA DAQBios protocol and also allows you to directly access device registers We recommend that you use UeiDaq High level Framework see Chapter 2 when it is available because it is easier to use than the low level API You should only need to use the low level API if you are using an operating system other than Windows 3 1 Data Register data is represented as 32 bit words unless otherwise specified Representa tion 3 2 Configuration Configuration settings are passed in using the DqAdv651SetRegister function Settings described below The following bits are used defin DO LN ACT VE 1L 1 STS LED status define DQ LN DCEN 1L 0 enable operations
5. ZO United Electronic wy Industries The High Performance Alternative DNA DNR CT 651 Precision Timing Interface Board User Manual January 2010 Edition Version 1 0 PN Man DNx CT 651 0110 Copyright 1998 2010 United Electronic Industries Inc All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form by any means electronic mechanical by photocopying recording or otherwise without prior written permission Information furnished in this manual is believed to be accurate and reliable However no responsibility is assumed for its use or for any infringements of patents or other rights of third parties that may result from its use All product names listed are trademarks or trade names of their respective companies See UEI s website for complete terms and conditions of sale http www ueidaq com company terms aspx Contacting United Electronic Industries Mailing Address 27 Renmar Avenue Walpole MA 02081 U S A For a list of our distributors and partners in the US and around the world please see http www ueidaq com partners Support Telephone 508 921 4600 Fax 508 668 2350 Also see the FAQs and online Live Help feature on our web site Internet Support Support support ueidaq com Web Site www ueidaq com FTP Site ftp ftp ueidaq com Product Disclaimer WARNING DO NOT USE PRODUCTS SOLD BY UNITED ELECTRONIC INDUSTRIE
6. a 6 1 9 Jumper Settings for DNA Version 00 00 cece eh 6 Chapter 2 Programming with the High Level API 2 00 c eee eee eee eee 8 Chapter 3 Programming with the Low Level API cece eee eee eee eee 9 3 1 Data Representation 00 00 cee en 9 3 2 Configuration Settings 0 0 0 0 cece eh 9 3 3 Layer specific Commands and Parameters 202000 ce eee eeeeee 9 lndeX ciate ee eR Rem te Ree ee eh ma R RR DA E Eee eee eee ee NE E RAE 10 Zs Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 0 b United Electronic Industries Inc Date January 2010 DNx CT 651 ManualTOC fm List of Figures Chapter 1 Introduction 0 000 nnne 1 1 1 DNA and DNR CT 651 Precision Timing Interface Boards sesssssss 2 1 2 Block Diagram of DNx CT 651 Precision Timing Reference sssees 3 1 3 Pinout Diagram of the DNx CT 651 sssssssssssssssseeeeee enne nennen nnns 6 1 4 Diagram of DNA CT 651 Layer Position Jumper Settings sessess 6 1 5 Physical Layout of DNA CT 651 Layer Board ssssssseee eee 7 Chapter 2 Programming with the High Level API 2 00 e eee eee eee eee eee 8 None Chapter 3 Programming with the Low Level API eee eee eee 9 None Zs Copyright 2010 Tel 508 921 4600 www ueidaq com Vers 1 0 We Ve Eectronic Industries ine Date January 2010 DNx CT 651
7. as four outputs each of which can operate in any of five modes Input follower accepts input pulses 10V at a nominal rate of 1 pps with a pulse width of 20 to 30 uS into a 50 ohm load and distributes them to up to four outputs This mode preserves the digital shape of the input pulse and inserts minimal delay skew of 15 20 nS but does not per form any validation of the input Input follower with user set duty cycle similar ti input follower mode but has a user defined duty cycle Input Auto follower output follows the external input signal until it passes validation criteria If the input becomes invalid it switches auto matically to the flywheel timing source which adds a 30 40nS delay Input Auto follower with user set duty cycle similar to input auto follower mode but has a user defined duty cycle Flywheel oscillator output is driven by an internal flywheel counter at a user settable rate 100 160 MHz and duty cycle Pass through timing pulses from the Sync x buses on the Cube or RACKtangle chassis are passed through the CT 651 layer to its output channels unchanged Tel 508 921 4600 www ueidaq com Vers 1 0 Date January 2010 651 Chap1 fm 3 DNx CT 651 Precision Timing Interface Board Chapter 1 Introduction Disabled OFF 1 5 4 Registers The 651 uses the following registers LCR Layer Control Register As the name implies this register controls the layer FWCFG Output Mode C
8. be and RACKtangle Ethernet based DAQ systems to provide a wide variety of synchronization timing reference and system heartbeat signals Each of four output channels may be set independently by software commands from the host over the Ethernet port on the Cube or RACKtangle chassis to any of the following configurations Slaved to the 1 PPS external input signal in follower modes Same as above with user set pulse width Slaved to the 1 PPS external input signal in auto follower mode switches to flywheel oscillator if input pulse is invalid Same as above with user set pulse width Copyright 2010 all rights reserved United Electronic Industries Inc Tel 508 921 4600 www ueidaq com Vers 1 0 Date January 2010 651_Chap1 fm 1 5 Functional Description Copyright 2010 all rights reserved United Electronic Industries Inc DNx CT 651 Precision Timing Interface Board Chapter 1 Introduction Free running flywheel 1 PPS output signal based on the on board ref erence oscillator Sync x Pass through of DNA Bus Signals to outputs Disabled OFF Two green LEDs are mounted on the front of the boards to indicate Power ON and Logic Active A functional block diagram of the CT 651 is illustrated in Figure 1 2 below Block Diagram LJ v wo S f U 9 E Control Logic 32 bit 66 MHz bus Figure 1 2 Block Diagram of DNx CT 651 Precision Timing Reference The 651 h
9. bold typeface generally represents text that should be entered verbatim For instance it can represent a command as in the following example You can instruct users how to run setup using a command such as setup exe Frequently Asked Questions For frequently answered questions application notes and support visit us online http www ueidag com faq Copyright 2010 alll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 0 United Electronic Industries Inc Date January 2010 651 Chap1 fm 1 2 DNx CT 651 Precision Timing Interface Board Features 1 3 Photos DNx CT 651 Precision Timing Interface Board Chapter 1 Introduction The DNx CT 651 Precision Timing Interface board s have the following features Provides 4 independent channels of synchronous 1 PPS timing signals 7 Operating Modes Input Follower Input Follower w user set pulse width Auto follower Auto Follower w user set pulse width Free run Flywheel oscillator Sync_x Pass through Disabled OFF Fully software configurable Standard ICD GPS 060 output levels Uses standard coaxial connectors High accuracy high stability on board oscillator UEI 10 year Availability Guarantee DNA CT 651 1 4 DNx CT 651 DNR CT 651 Figure 1 1 DNA and DNR CT 651 Precision Timing Interface Boards The purpose of the DNx CT 651 is to provide an industry standard precision timing interface for use with UEI Cu
10. eed 13 VDC regardless of load impedance Output chan to chan skew 2 5 nS max Output Signal Dynamics Conform to ICD GPS 060 Rv B Fig 3 2 Output Rise Time lt 50 nS 10 to 90 Output Fall Time lt 1 uS 90 to 10 Output Pulse Width 20 uS typical 16 uS min 30 u max Sync Input Input Range 0 10VDC 2 VDC min 20 VDC max Input Impedance 50 Q 10 or gt 10 kQ SW selectable Switch Threshold 2 5 VDC 5 SW programmable between 0 5VDC and 9 5 VDC Sync Input to Output skew 35 nS max 2 5 VDC Initial Accuracy Flywheel Oscillator Output Frequency 1 PPS 1 PPM Output Stability 300 parts per billion per day Connector D sub style with 5 coaxial connections On board connector Conec 3017W5SCT78NAOX or equiv Mating connector Conec 3017W5PXK99A10X or equiv Operating Temp Range General Power dissipation lt 3W Tested 40 to 85 C Operating Humidity 95 non condensing Vibration IEC 60068 2 6 IEC 60068 2 64 5 g 10 500 Hz sinusoidal 5 g rms 10 500 Hz broad band random Shock EC60068 2 27 50 g 3 ms half sine 18 shocks 6 orientations 30g 11 ms half sine 18 shocks 6 orientations MTBF 300 000 hours Testing Conditions All testing assumes 50 O terminations at 150 foot coaxial cable unless otherwise noted All external connections to the CT 651 are made through the front acc
11. election DW to adjust hysteresis for input pulse conditioning FWDC to control flywheel clock duty cycle FWDIV to control flywheel clock period FWCLK MIN to set the FW clock divider auto correction low limit FWCLK MIN to set the FW clock divider auto correction high limit 3 The DqAdv GetRegister function may be used to check the contents or status of any of the readable registers R or W listed above NOTE For a more detailed description of functional operation refer to the API User Manual Copyright 2010 alll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 0 United Electronic Industries Inc Date January 2010 651 Chap1 fm 1 6 Specifi cations 1 7 Wiring and Connectors Copyright 2010 all rights reserved United Electronic Industries Inc DNx CT 651 Precision Timing Interface Board Chapter 1 Introduction The following table lists the technical specifications of the CT 651 board Technical Specifications Outputs Output channels 4 Output selection 7 modes 1 PPS input follower Follower w user set pulse width Auto follower w auto switch to flywheel Auto follower w switch to flywheel and w user set pulse width 1PPS flywheel oscillator Sync x pass through Disabled off Output Signal Levels Conform to ICD GPS 060 Output High 10 VDC 2 1 VDC 50 Q Output Low 0 VDC 2 1 VDC 50 Q Output Clamping Output not to exc
12. essible D sub combination male connector This connector has five coaxial connectors and 12 pins The mating female connector supplied by user is a standard Conec Type 3017W5PXK99A10X or equivalent which is widely available from a number of suppliers Tel 508 921 4600 Date January 2010 www ueidaq com Vers 1 0 651 Chap1 fm 5 DNx CT 651 Precision Timing Interface Board Chapter 1 Introduction 1 8 Pinout The pinout of the CT 651 is illustrated below in Figure 1 3 Note that channels are numbered from O to 3 Coaxial This connector is a male Connectors combination coax and DGND pin type manufactured by Conec Part No ae 4 FIOI 3017W5SCT78N40X BAS IET A5G1 RFGND4 lasc2 200000 User should supply a A4 RFIOS asi RFONDS mating female conn ector Conec Part No His REND 3017W5PXK99A10X Ch3 1PPS 4 4 amp Ch2 1PPS 4 Ch1 1PPS 4 12 Pins eos A2 RFIO1 A2G1 RFGND1 Ch0 1PPS 4 So A1 RFIOO A1G1 RFGNDO FJIO1 3017W8SCT78N40X 0 DGND efefeelefe C 3 9 Figure 1 3 Pinout Diagram of the DNx CT 651 1 9 Jumper The DNA CT 651 module layer has a jumper block that assigns the position of Settings for the module within a PowerDNA Cube The jumpers must be set to match the DNA Version Physical position of an I O board or layer in the Cube NOTE Since all layers are assembled i
13. n Cubes before shipment to a customer you should never have to change a jumper setting In case a jumper may have been inadvertently misplaced a diagram of the jumper block is shown in Figure 1 4 To set the layer address place jumpers as shown for I O position 1in Figure 1 4 Layer s Position as marked on the Faceplate 1 01 1 0 2 1 03 1 0 4 1 05 1 0 6 9 10 o 0 oo ga oo O0 oo 11 12 oo oo oo cm A 13 14 o o oo oo oo 15 16 Cx o o cm All I O Layers are sequentially enumerated from top to the bottom of the Cube o Open ENS Closed Figure 1 4 Diagram of DNA CT 651 Layer Position Jumper Settings Copyright 2010 alll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 0 United Electronic Industries Inc Date January 2010 651 Chap1 fm DNx CT 651 Precision Timing Interface Board Chapter 1 7 Introduction DNA 120 pin Bus Connector SL El IL 6 O 000 0000 iol ojo olo o o o 9 vi Zl OL See Figure 1 4 for jumper locations for setting layer position DB 62 I O Connector External Circuits Figure 1 5 Physical Layout of DNA CT 651 Layer Board Copyright 2010 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 0 United Electronic Industries Inc Date January 2010 651 Chap1 fm DNx CT 651 Precision Timing Interface Board Chapter 2 8 Programming with the High Level API Chapter2 Programming with the High Level API No Framework support for the C
14. onfig Register This register selects the operating mode and sub modes for each chan nel such as input follow and input auto follow operation e DW DAC Write Register This register sets the hysteresis of input signal monitoring and also adjusts the internal 20 MHz reference clock as needed It also controls all write and operating functions of the DACs FWDC Flywheel Duty Cycle Register This register sets the duty cycle of the flywheel counter pulse e FWDIV Flywheel Output Period Register This register sets the total period of the flywheel counter pulse FWCLK MIN Flywheel Clock Divider Auto correction Low Limit This register sets the low limit for monitoring flywheel period FWCLK MAX Flywheel Clock Divider Auto correction High Limit This register sets the high limit for monitoring flywheel period FWCRH Input clock High count in 100 160 MHz ticks e FWCRP Input clock Period count in 100 160 MHz ticks STS General Status Register indicates when input clock fails validation and when a DAC write is in progress 1 5 2 Operation The general sequence of operation at startup is as follows 1 Using the DqAdvSetRegister function write to the LCR This will enable the DC DC converter for power select 100 or 160 MHz internal flywheel clock rate clock fw and if desired enable the 50 ohm cable termination 2 Usethe DqAdv SetRegister function to set the following registers FWCFG output mode s
15. to follower 3 Input follower 3 Inserting the Mni Card 6 J Jumper Settings 6 L Layer position jumper settings 6 Layer specific Commands 9 LCR Layer Control Register 4 Low Level API 9 O Operation 4 Organization 1 P Pass through 4 Photos 2 Physical layout 7 R Registers 4 S Specifications 5 STS General Status Register 4 W WCLK MAX Flywheel Clock Divider Auto correc tion High Limit 4 Wiring 5 Copyright 2009 United Electronic Industries Inc Tel 508 921 4600 Date January 2010 www ueidaq com Vers 1 0 File DNx CT 651 ManuallX fm
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