Ch.4-after-midterm - Faculty Website Listing
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1. Phase Lock Loop Internal oscillator requires minimal power but is imprecise External crystal provides stable bus clock LM4F120 is equipped with a 16 MHz crystal and the bus clock is typically set at 50 MHz 33 5 5 XTAL USBPYVWRDNE USB PLL External 16 MHz PARONA MOSCDIS 8 e PLL BYPASSP Main OSC 400 MHz USES SIVA UART Baud Clock IOSCDIS System Clack Precision Intemal OSC cst 16 MHz BYPASS ARON Inte mal E 30 E 55 Baud Clock 25 574 PX lw OSCSRCPA SZ lw D kHz YX External 16 MHz ADC Clock Source Tiva TM4C1233H6PM Microcontroller identical to LMAF120H5QR DATA SHEET Table 5 4 Possible System Clock Frequencies Using the SYSDIV Field SYSDIV Divisor Frequency BYPASS 0 Frequency BYPASS 1 TivaWare Parameter O0 reserved Clock source frequency 1 SYSCTL SYSDIV 1 Clock source frequency 2 SYSCTL_SYSDIV_2 66 67 MHz Clock source frequency 3 SYSCTL_SYSDIV_3 50 MHz Clock source frequency 4 SYSCTL_SYSDIV_4 40 MHz Clock source frequency 5 SYSCTL SYSDIV 5 33 33 MHz Clock source frequency 6 SYSCTL SYSDIV 6 28 57 MHz Clock source frequency 7 SYSCTL SYSDIV 7 OT 25 MHz Clock source frequency 8 SYSCTL SYSDIV 8 os 22 22 MHz Clock source frequency 9 SYSCTL SYSDIV 9 20 MHz Clock source frequency 10 SYSCTL SYSDIV 10 18 18 MHz Clock source2. DEN GPIO PORTA DENR DIR DIR DIR DIR DIR DIR PORTB DIR R 4000 5420 SEL SEL SEL SEL SEL SEL SEL SEL GPIO_PORTB AFSEL R 000 551 DEN GPIO PORTB DEN R DEN DEN DEN DEN DEN 4000 63FC DATA DATA DATA DATA DATA DATA DATA DATA GPIO PORTC DATA R 6400 DR DIR DR DR DIR DIR DIR DIR GPIO PORTC DIR SEL SEL SEL SEL SEL SEL SEL GPIO PORTC AFSEL R 400 3FC 1 DATA DATA GPIO PORTE DATAR 4002 4400 1 DI GPIO PORTE DIRR _ 4002 4420 SEL SEL GPIO PORTE AFSEL 4002 451C DEN DEN PORTE DENR EACH REGISTER IS 32 BITS WIDE BITS 8 31 not used The complete list is in the datasheet of LM4F 120 Table 10 6 on p 632 Hardcopy was provided in class lO register offsets Table 10 6 GPIO Register Map Offset Type 0x000 GPIODATA RW 0x400 GPIODIR RW 0x404 GPIOIS RAN Reset 0 0000 0000 0 0000 0000 0 0000 0000 Description GPIO Data GPIO Direction GPIO Interrupt Sense Source p 631 of LM4F120 Tiva datasheet linked on webpage hardcopy of this table was provided in class output vencer long data data write PD3 I O Port Bit Specific bit specific If we wish to access bit Constant P P 7 0x0200 addressing is used to ges P 5 0
3. Wes Uo Fi Low frequency internal oscillator LFIOSC frequency Hibernation Clock Source Specifications Table 22 17 Hibernation Oscillator Input Characteristics Parameter ParameterName Mm Wem 33 90 Fuisteiosc Hibernation low frequency internal oscillator HIB 10 KHz LFIOSC frequency C1 Ca External load capacitance on Xosco XOSC1 pins 12 24 pF What is the power savings when LM4F120 hibernates 29 Source Tiva TM4C1233H6PM Microcontroller identical to LM4F120H5QR DATA SHEET m Multiple clock sources for microcontroller system clock Source Precision Oscillator PIOSC On chip resource providing a 16 MHz 1 frequency at room temperature 16 MHz 3 across temperature Can be recalibrated with 7 bit trim resolution Software power down control for low power modes Main Oscillator 5 A frequency accurate clock source by one of two means an external single ended clock source is connected to the osco input pin or an external crystal is connected across the Osco input and OSC1 output pins External crystal used with or without on chip PLL select supported frequencies from 4 MHz to 25 MHz External oscillator from DC to maximum device speed Low Frequency Internal Oscillator LFIOSC On chip resource used during power saving modes Hibernate RTC oscillator clock that can be configured to be the 32 768 kHz external oscillator source from
4. allow time for clock to start GPIO PORTA DIR R amp 0x20 PA5 input GPIO PORTA AFSEL R amp 0 20 PAS regular port function GPIO PORTA DEN R 0x29 enable PA5 digital port unsigned long Switch Input void return return 9 29 0 not pressed unsigned long Switch Input2 void return GPIO PORTA DATA R amp 0x20 0x20 pressed or O not pressed Program 4 2a Software interface for a switch on PAS Switch Xxxx stp then set set 7 and clear 5 use both methods n Example 4 1 Generating out of phase square waves PG1 and PGO PG10 EQU 0 4002600 C implementation n Start void main void R1 SYSCTL RCGC2 R volatile unsigned long delay RO R1 i 5 previous RO RO 0 00000040 G clock Port G clock RO R1 SYSCTL RCGC2 R 0x40 delay SYSCTL RCGC2 NOP time to finish LDR R1 GPIO PORTG DIR R PG1 PGO outputs LDR RO R1 previous GPIO PORTG DIR R 0x03 ORR RO RO 0x03 PG1 PGO output STR RO R1 set direction normal function LDR R1 PORTG AFSEL GPIO PORTG AFSEL R amp 0x03 LDR RO R1 previous BIC RO 0 0 03 disable alt funct enable digital I O on PG1 0 STR RO R1 set alt funct GPIO PORTG DEN R 0x03 LDR R1 GPIO PORTG DEN ER LDR RO R1 previous initial output ORR RO RO 40x03 PG1 PGO0 digital PG10 0x01 PG1 0 PGO 1 STR RO R1 se
5. enable PEO digital port Write in C a function that toggles the LED connected to pin PEO J define PEO volatile unsigned long 0x40024004 void LED Init void volatile unsigned long delay SYSCTL RCGC2 R 0x00000010 activate clock for Port E delay SYSCTL RCGC2 R allow time for clock to star GPIO PORTE DIR 0x01 0 output GPIO PORTE AFSEL R amp 0x01 0 regular port function GPIO PORTE DEN R 0x01 enable 0 digital port void LED Toggle void PEO 0 1 toggle LED 26 4 3 PLL e LM4F120 has 16 MHz crystal Remember 2 power fmla for CMOS e A CMOS circuit operates with Vpp 3 3V What is the power savings if Vpp is reduced to 2 5V 27 4 3 PLL e LM4F120 has 16 MHz crystal Remember 2 power fmla for CMOS e A CMOS circuit operates with f 40 MHz What is the power savings if f is reduced to 20 MHz f is increased to 80 MHz 28 PIOSC Specifications Table 22 15 PlOSC Clock Characteristics ei ea UN Fpios Internal 16 MHz precision oscillator frequency variance i396 factory calibrated at 25 C C and 3 3 V across the specified voltage and temperature range a This parameter value remains valid if recalibration occurs Low Frequency Internal Oscillator LFIOSC Specifications Table 22 16 Low Frequency internal Oscillator Characteristics Paramator ParametorName
6. high negative pressed 0 positive pressed 1 LED Interfacing 10mA ff 1 2V LED current v voltage Brightness power V I anode cathode 1 big voltage connects to big LED Interfacing R 3V 1 5 0 001 R 5 0 2 0 5 0 01 1 5 kOhm 220 Ohm LED current lt 8 ma LED current gt 8 ma LED may contain several diodes in series How do we define the constant PA5 for bit specific addressing void Switch Init void volatile unsigned long delay SYSCTL RCGC2 R 0x00000001 activate clock for Port delay SYSCTL RCGC2 R allow time for clock to start GPIO PORTA DIR R amp 0x20 PA5 input GPIO PORTA AFSEL R amp 0x20 PAS regular port function GPIO PORTA DEN R 0x29 enable 5 digital port unsigned long Switch Input void i return return OxZ i 0 tee sessed or 0 not pressed unsigned long Switch Input2 void return GPIO PORTA R amp 0x20 0x20 pressed or 0 not pressed Program 4 2a Software interface for a switch on PAS Switch xxx 51 How do we define the constant PA5 for bit specific addressing define 5 volatile unsigned long 0 40004080 void Switch Init void volatile unsigned long delay SYSCTL RCGC2 R 0x00000001 activate clock for Port delay SYSCTL RCGC2 R allow time for clock to start GPIO PORTA DIR OR am
7. 0080 access port data register peus Define address offset as esas 4 25 where b is the 1 0x0008 selected bit position 2 2 256 possible bit Port A 0x4000 4000 combinations 0 8 0x4000 4000 0x0008 0x0010 0x0020 0x4000 4038 Add offsets for each bit selected to base address Provides friendly and atomic access for the port to port pins Example Port A bits 1 2 3 Address 0x4000 4000 0x4000 4001 0x4000 4002 0x4000 4003 0x4000 4004 0x4000 4005 0x4000 4006 0 4000 4007 0x4000 4008 0x4000 4009 0x4000 400A 0x4000 400B 0x4000 400C 0x4000 400D 0x4000 400E 0x4000 400F Contents 0x4000 4 0 4000 4 0 4000 4 0 4000 4 0x4000 41D8 0 4000 4 0 4000 4 0 4000 4 0x4000 4 0 4000 4 0 4000 4 0 4000 4 0x4000 4 0 4000 4 0x4000 4 0x4000 4 0 4000 4 0 4000 4 0x4000 4 0 4000 4 0x4000 4 0x4000 4 0x4000 4 0x4000 4 0 4000 4 0x4000 4 0x4000 4 0x4000 4 0x4000 4 0 4000 4 End of bit specific block On the prev memory diagram Fill out all the missing address bits e Write next to each word what specific bits correspond to it Calculate the address of the block corresponding to the following bit combinations PA7 6 and 5 2 1 0 6 4 2 0 11 EOL1 Remember Stellaris board already has 2 switches and 3 LEDs connected to MCU pins But if we need more Switch Configuration 3 3V 3 3V released OV low pressed
8. Discussion of exam problems and scores QUIZ Configure for using PA4 for output im FILA E PortD Input void IO PORTD DATA _R gt gt 4 read in ET Bus unsigned long data T data write PD3 PDO Text sections 4 2 1 Bit specific addressing 4 2 2 Switches and LEDs Software Module Interaction Two or more software modules may access different elements of a shared port Each module must employ friendly operations when accessing altering elements of the port e Only the elements the software module is authorized to modify can be modified e Elements used by other modules must not be modified Remember initialization ritual Dam 3 e LG a TI TI TT Tow TT e Initialization executed once at beginning Turn on clock in SYSCTL_RCGE2 R 2 Wait two bus cycles Clock Gating 3 Set DIR to 1 for output or 0 for input 4 Clear AFSEL bits to 0 to select regular I O 5 I 6 p Set DEN bits to 1 to enable data pins nput output from pin Read write GPIO PORTX DATA R Athrough F on our MCU Selected I O Port Registers Address 7 6 5 4 3 2 1 0 Name 400F E108 GPIOF GPIOE GPIOD SYSCTL_RCGC2 4000 43FC DATA DATA DATA DATA GPIO PORTA DATAR 4000 4400 DR DIR DR DIR_ DI GPIO PORTA DIR R SEL SEL SEL SEL SEL SEL PORTA AFSEL R __
9. YSDIV 5 SYSDIV 5 ar 20 MHz Clock source 4a SYSDIV_10 3 125 2 Clock source ie SYSC eo a This parameter is used in functions such as SysCtlClockSet in the Peripheral Driver Library 36 Source Tiva TM4C1233H6PM Microcontroller identical to LM4F120H5QR DATA SHEET Your turn Using the 16 MHz CLK as the source how should we set the multiplier to obtain e A 50 MHz clock A reduction in power by 7596 EOL2 37 QUIZ Bit specific addressing Designing complete Hw Sw system SSR Solid State Relay PN2222 specs max ICE 150 mA VCE 0 3V 2 39 What is there to design Designing a complete Hw Sw system SSR Solid State Relay PN2222 specs max ICE 150 mA VCE 0 3V 40 QUIZ Bit specific addressing define volatile unsigned long 0 40024004 void LED Init void volatile unsigned long delay SYSCTL RCGC2 R delay SYSCTL RCGC2 GPIO PORTE DIR R GPIO PORTE AFSEL R amp GPIO PORTE DEN R MW r Fill in the missing parts of the ritual 1 42 define PEO volatile unsigned long 0x40024004 void LED Init void volatile unsigned long delay SYSCTL RCGC2 R 0x00000010 activate clock for Port E delay SYSCTL RCGC2_R allow time for clock to star GPIO PORTE DIR R 0x01 PEO output GPIO _ PORTE AFSEL R amp 0 01 PEO
10. frequency 11 SYSCTL SYSDIV 11 OB M2 16 67 MHz Clock source frequency 12 SYSCTL SYSDIV 12 M3 15 38 MHz Clock source frequency 13 SYSCTL SYSDIV 13 OD 14 29 MHz Clock source frequency 14 SYSCTL SYSDIV 14 OE 5 13 33 MHz Clock source frequency 15 SYSCTL SYSDIV 15 12 5 MHz default Clock source frequency 16 SYSCTL SYSDIV 16 a This parameter is used in functions such as SysCtlClockSet in the Peripheral Driver Library 35 Source Tiva TM4C1233H6PM Microcontroller identical to LMAF 120H5QR DATA SHEET The SYSDIV2 field the RCC2 register is 2 bits wider than the SYSDTV field the RCC register so that additional larger divisors up to 64 are possible allowing a lower system clock frequency for improved Deep Sleep power consumption When using the PLL the VCO frequency of 400 MHz is predivided by 2 before the divisor is applied The divisor is equivalent to the SYSDIV2 encoding plus 1 Table 5 5 shows how the SYSDIV2 encoding affects the system clock frequency depending on whether the PLL is used BYPASS2 0 or another clock source is used BYPASS2 1 For a list of possible clock sources see Table 5 3 on page 211 Table 5 5 Examples of Possible System Clock Frequencies Using the SYSDIV2 Field lc i BYPASS2 0 reserved Clock source frequency 1 SYSCTL_SYSDIV_1 L5 m po ao 2 Clock source frequency 5 source Clock source frequency 5 ISYSCTL S
11. it RELOAD value NVIC ST RELOAD R E000E018 0 24bit CURRENT value of SysTick counter NVIC ST CURRENT R 47 SKIP 4 5 OLED READ 4 6 Debugging monitor using LED La iB n NM Lem E ihe ADE y ul NET gm m Gee ae E 5 Bus GEN RE Ege I LJE 6 E 7 E c 7 Ba e wl m n E m we How many bus cycles does this code take to execute 49 ZU y 2 7 IT L E Tal Using SysTick to time a segment of code 50 Homework for Ch 4 End of chapter 6 7 10 12 13 17 e Due Thu Nov 7
12. p 0x20 PA5 input GPIO PORTA AFSEL R amp 0x20 PAS regular port function GPIO PORTA DEN R 0x20 enable PA5 digital port unsigned long Switch Input void i return return 9 29 0 not pressed unsigned long Switch Input2 void return GPIO PORTA R amp 0x20 0x20 pressed or 0 not pressed Program 4 2a Software interface for a switch on PAS Switch xxx 51 Make PA7 output the set clear and toggle use both methods define 5 volatile unsigned long 0 40004080 void Switch Init void volatile unsigned long delay SYSCTL RCGC2 R 0x00000001 activate clock for Port delay SYSCTL RCGC2 R allow time for clock to start GPIO PORTA DIR OR amp 0x20 PA5 input GPIO PORTA AFSEL R amp 0x20 PAS regular port function GPIO PORTA DEN R 0x20 enable PA5 digital port unsigned long Switch Input void i return return 9 29 0 not pressed unsigned long Switch Input2 void return GPIO PORTA R amp 0x20 0x20 pressed or 0 not pressed Program 4 2a Software interface for a switch on PAS Switch_xxx zip Configure PB7 and PB5 for output define 5 volatile unsigned long 0 40004080 void Switch Init void volatile unsigned long delay SYSCTL RCGC2 R 0x00000001 activate clock for Port delay SYSCTL RCGC2
13. regular port function GPIO PORTE DEN 0x01 enable PEO digital port void LED Toggle void PEO PEO 1 toggle LED Write C functions that turn the SSR on and off using toggle as template 43 4 4 SysTick Timer Timer Counter operation e 24 bit counter decrements at bus clock frequency With 50 MHz bus clock decrements occur every 20 ns e Counting is from n 2 0 For a count of m m 1 is loaded into the counter 44 SysTick Timer Initialization Clear ENABLE to stop counter Specify the RELOAD value Clear the counter via NVIC_ST CURRENT HR Set CLK SRC 1 and specify interrupt action via INTEN in NVIC ST CTRL R Address 3124 23 17 16 153 2 1 0 Nam SE000E0I0 0 0 COUNT 0 CEK SRC INTEN ENABLE NVIC ST CIRLR E000E014 0 24 bit RELOAD value NVIC ST RELOAD E000E018 0 24 bit CURRENT value of SysTick counter ST CURRENT 45 Address 3124 247 16 153 2 1 0 Name E000E010 O 0 COUNT 0 SRC INTEN ENABLE NVIC ST CTRL R E000B014 O 24bit RELOAD value NVIC ST RELOAD R E000E018 0 24bit CURRENT value of SysTick counter NVIC ST CURRENT R 46 Why do we need this A To account for possible counter rollover Address 3124 23 17 16 15 3 2 1 0 Name E000E010 O 0 COUNT 0 SRC INTEN ENABLE NVIC ST CTRL R E000B014 O 24b
14. t digital LDR R1 10 while 1 MOV RO 0x01 initial output PG10 0x03 toggle loop STR RO R1 EOR RO RO 0x03 toggle loop Modify the code to use port E instead 20 To do for next time Read and understand the remaining examples in 4 2 2 QUIZ Bit specific addressing define volatile unsigned long 0 40024004 void LED Init void volatile unsigned long delay SYSCTL RCGC2 R delay SYSCTL RCGC2 GPIO PORTE DIR R GPIO PORTE AFSEL R amp GPIO PORTE DEN R MW r Fill in the missing parts of the ritual 1 2 QUIZ Bit specific addressing define PEO volatile unsigned long 0x40024004 void LED Init void volatile unsigned long delay SYSCTL RCGC2 R 0x00000010 delay SYSCTL RCGC2 R GPIO PORTE DIR R 0x01 GPIO PORTE AFSEL R amp 0x01 GPIO PORTE DEN R 0x01 if activate clock for Port E allow time for clock to star PEO output PEO regular port function enable PEO digital port 24 QUIZ Bit specific addressing define PEO volatile unsigned long 0x40024004 void LED Init void volatile unsigned long delay SYSCTL RCGC2 R 0x00000010 activate clock for Port E delay SYSCTL RCGC2 R allow time for clock to star GPIO PORTE DIR R 0x01 PEO output GPIO PORTE AFSEL R amp 0x01 PEO regular port function GPIO PORTE DEN R 0x01
15. the Hibernation module or the HIB Low Frequency clock source HIB LFIOSC whichis located within the Hibernation Module Real Time Clock see next slide 30 Tiva TM4C1233H6PM Microcontroller identical to LM4F120H5QR DATA SHEET p 52 7 3 2 Hibernation Clock Source In systems where the Hibernation module is used the module must be clocked by an external source that is independent from the main system clock even ifthe RTC feature is not used An external oscillator or crystal is used for this purpose To use a crystal a 32 768 kHz crystal is connected to the XOSCO and XOSC1 pins Alternatively 32 768 kHz oscillator can be connected to the xosco pin leaving XOSC1 unconnected Care must be taken that the voltage amplitude of the 32 768 kHz Tiva Microcontroller Regulator or Switch Input Voltage Open drain external wake up circuit 31 Source Tiva TM4C1233H6PM Microcontroller identical to LM4F120H5QR DATA SHEET FYI Our board comes with both crystals MOSC Y2 and hibernation module Y1 RESET 1 pen m RESET Il O TARGETRST C13 0 1uF OMIT U1 B RESET WAKE OSC1 HB OSCO VBAT S oe XOSCO GNDX VDDA Y2 nl XOSC1 Da Oa Oa C31 C32 10pF 10pF 32 768Khz YA LM4F120 Source Stellaris LM4F120 LaunchPad Evaluation Board User Manual 32 PLL External OSCSRC crystal Main Osc BYPASS USESYSDIV
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