Method for writing back message ID information to a match ID
Contents
1. Acceptance Filtering the XA C3 microcontroller 20 employs a match and mask technique to perform receive Acceptance Filtering In short this technique allows the user to mask any selected bits of the Screener ID of an incoming non fragmented CAN Frame except for the IDE bit on an object by object basis and to specify a selected Match ID for each associated receive Message Object Thus the user is afforded the unique capability to perform user specified object specific match and mask Acceptance Filtering for each of 32 separate and independent Message Objects However a problem arises with this match and mask technique in that the Screener ID field extracted from the incoming CAN Frame for comparison with the Match ID field of all enabled Receive Message Objects must be stored somewhere in order to enable the software to unambigu ously determine the exact ID of the CAN Frame that resulted in a match including those bits which were masked for comparison purposes The most straightforward approach would be to store the extracted Screener ID of the incoming CAN Frame that resulted in the match in the message buffer associated with the matching Message Object along with the actual data bytes of that CAN Frame However this would result in the undesirable waste of an appreciable amount of valuable storage area memory resources It would also result in a confusing inconsistent message buffer format for bas2. portion of the extracted screener ID field comprises the entire extracted screener ID field except for the IDE bit 9 The method as set forth in claim 1 wherein the writing step is performed by writing the at least a portion of the extracted screener ID field over the match ID field associ ated with the matching message object 10 The method as set forth in claim 1 wherein the writing step is performed by writing the entire extracted screener ID field over the match ID field associated with the matching message object to thereby replace the match ID field with the extracted screener ID 11 The method as set forth in claim 1 wherein the writing step is performed by writing the entire extracted screener ID field except for an IDE bit over corresponding bit positions of the match ID field associated with the matching message object 12 The method as set forth in claim 1 wherein if more than one match is found as a result of the comparing and repeating steps designating the enabled message object having a lowest object number to be the matching message object 13 The method as set forth in claim 1 wherein the at least one mask register associated with each enabled message object designated to be a receive message object stores a multi bit mask field that masks selected bits of the corre sponding match ID field the masked bits being excluded from the comparisons performed in the comparing and repeating steps 14 The method as
3. scratch pad memory The 4 KBytes of MMR space will always start at a 4K boundary The reset values for MRBH and MRBL are OFh and FOh respectively Therefore after a reset the MMR space is mapped to the uppermost 4K Bytes of Data Segment OFh but access to the MMRs 40 is disabled The first 512 Bytes offset 000h 1FFh of MMR space are the Message Object Registers eight per Message Object for objects n 0 31 as is shown in FIG 6 The base address of the XRAM 28 is determined by the contents of the MMRs designated MBXSR and XRAMB as is shown in FIGS 7 and 8 As previously mentioned the 512 Byte XRAM 28 is where some or all of the 32 Rx Tx message buffers corresponding to Message Objects n 0 31 reside The message buffers can be extended off chip to a maximum of 8 KBytes This off chip expansion capability can accommodate up to thirty two 256 Byte message buff ers Since the uppermost 8 bits of all message buffer addresses are formed by the contents of the MBXSR register the XRAM 28 and all 32 message buffers must reside in the same 64K Byte data memory segment Since US 6 434 432 B1 7 the XA C3 microcontroller 20 only provides address lines A0 A19 for accessing external memory all external memory addresses must be within the lowest 1 MByte of address space Therefore if there is external memory in the system into which any of the 32 message buffers will be mapped then all 32 message buffers and the XRAM 28 must also be
4. Arbitration process will be performed to determine which enabled Transmit Message Object will be selected for transmission There are two Tx Pre Arbitration policies which the user can 10 15 20 25 30 35 40 45 50 55 60 65 12 choose between by setting or clearing the Pre Arb bit in the GCTL register After a Tx Message Complete interrupt is generated in response to a determination being made by the message handler that a completed message has been successfully transmitted the Tx Pre Arbitration process is reset and begins again Also if the winning Transmit Message Object subsequently loses arbitration on the CAN bus the Tx Pre Arbitration process gets reset and begins again If there is only one Transmit Message Object whose EN bit is set it will be selected regardless of the Tx Pre Arbitration policy selected Once an enabled Transmit Message Object has been selected for transmission the DMA engine 38 will begin retrieving the transmit message data from the message buffer associated with that Transmit Message Object and will begin transferring the retrieved transmit message data to the CCB 42 for transmission The same DMA engine and address pointer logic is used for message retrieval of trans mit messages as is used for message storage of receive messages as described previously Further message buffer location and size information is specified in the same way as described prev
5. CAN hardware implementation of CAL functions normally implemented in software in order to offload these tasks from the host CPU to the CAN hardware thereby enabling a great savings in host CPU processing resources and a commensurate improvement in host CPU performance One of the most demanding and CPU resource intensive CAL functions is message management which entails the handling storage and processing of incoming CAL CAN messages received over the CAN serial communications bus and or outgoing CAL CAN messages transmitted over the CAN serial com munications bus CAL protocols such as DeviceNet CANopen and OSEK deliver long messages distributed over many CAN frames which methodology is sometimes referred to as fragmented or segmented messaging The process of assembling such fragmented multi frame mes sages has heretofore required a great deal of host CPU intervention In particular CAL software running on the host CPU actively monitors and manages the buffering and processing of the message data in order to facilitate the assembly of the message fragments or segments into com plete messages Based on the above and foregoing it can be appreciated that there presently exists a need in the art for a hardware implementation of CAL functions normally implemented in software in order to offload these tasks from the host CPU thereby enabling a great savings in host CPU processing resources and a commensurate improvement in
6. Message n Fragmentation Count oo _ RC 000 a om MCR RO foom ByeMod _ WessgeConpeehoRg MER 000m Message rar Ino Register Re 0000 Frame Error Enable Register 0000h CCB Registers Bye Word fon Byford an CAN Bus Timing Fe ig Error Warning Limit Register RO 000 Error Code Capture Register pALCR RO 0h amp yeWod fam bition Lost Capture Reg Global Control Byte XRAM Base Address Msg Bufi XRAM Seg Reg FF MIF Bus Timing Reg High Legend R W Read amp Write RO Read Only WO Write Only R C Read amp Clear W Writable on y during FI G 4 CAN Reset mode x undefined after reset Aug 13 2002 Sheet 3 of 7 US 6 434 432 B1 U S Patent Aug 13 2002 Sheet 4 of 7 US 6 434 432 Data Memory Segment 0 Off Chip MMR Space OOFFFFh 4K Bytes OI Base Address Off Chip OLN XRAM Base Address Off Chip 0003FFh ELILIILIJ Off Chip Data Memory Scratch Pad OIT 000000h FIG 5 512 ses MMR Space Offset FFFh Offset 1FFh 9 gt 512 Bytes Object Registers Offset 000r FIG 6 U S Patent Aug 13 2002 Sheet 5 of 7 US 6 434 432 B1 Segment xy in Data Memory Space xyFFFFh Object n Object n Message Buffer a23 al6 15 a0 Buffer size C i MBXSR 7 0 MnBLR ee ee XRAM 512 Byles 23 31 315 a
7. The user is also responsible on set up for specifying the size of the message buffer for each Message 10 15 20 25 30 35 40 45 50 55 60 8 Object n In particular the user can specify the size of the message buffer for each particular Message Object n by programming the MnBSZ register associated with that Mes sage Object n The top location of the message buffer for each Message Object n is determined by the size of that message buffer as specified in the corresponding MnBSZ register The user can configure program the MnCTL register associated with each particular Message Object n in order to enable or disable that Message Object n in order to define or designate that Message Object n as a Tx or Rx Message Object in order to enable or disable automatic hardware assembly of fragmented Rx messages 1 automatic frag mented message handling for that Message Object n in order to enable or disable automatic generation of a Message Complete Interrupt for that Message Object n and in order to enable or not enable that Message Object n for Remote Transmit Request RTR handling In CANopen and OSEK systems the user must also initialize the MnFCR register associated with each Message Object n As previously mentioned on set up the user must con figure program the global GCTL register whose bits control global parameters that apply to all Message Objects In particular the user can configure prog
8. chip command control status register whose address is mapped into XA US 6 434 432 B1 5 Data memory space and is accessed as Data memory by the XA processor With the XA C3 microcontroller a set of eight dedicated MMRs are associated with each Mes sage Object Additionally there are several MMRs whose bits control global parameters that apply to all Message Objects With reference now to FIG 3 there can be seen a high level block diagram of the XA C3 microcontroller 20 The XA C3 microcontroller 20 includes the following func tional blocks that are fabricated on a single integrated circuit IC chip packaged in a 44 pin PLCC or a 44 pin LQFP package an XA CPU Core 22 that is currently implemented as a 16 bit fully static CPU with 24 bit program and data address range that is upwardly compatible with the 80C51 architecture and that has an operating fre quency of up to 30 MHz a program or code memory 24 that is currently imple mented as a 32K ROM EPROM and that is bi directionally coupled to the XA CPU Core 22 via an internal Program bus 25 A map of the code memory space is depicted in FIG 4 a Data RAM 26 internal or scratch pad data memory that is currently implemented as a 1024 Byte portion of the overall XA C3 data memory space and that is bi directionally coupled to the XA CPU Core 22 via an internal DATA bus 27 an on chip message buffer RAM or XRAM 28 that is currently implemented as a 512 Byte portion of
9. host CPU performance The assignee of the present invention has recently devel oped a new microcontroller product designated XA C3 that fulfills this need in the art The XA C3 is the newest 10 15 20 25 35 40 45 50 55 60 65 2 member of the Philips XA Extended Architecture family of high performance 16 bit single chip microcontrollers It is believed that the XA C3 is the first chip that features hardware CAL support The XA C3 is a CMOS 16 bit CAL CAN 2 0B micro controller that incorporates a number of different inventions including the present invention These inventions include novel techniques and hardware for filtering buffering handling and processing CAL CAN messages including the automatic assembly of multi frame fragmented mes sages with minimal CPU intervention as well as for man aging the storage and retrieval of the message data and the memory resources utilized therefor The present invention relates to a method for writing back message ID information of a received non fragmented CAN frame to a match ID register s to enable the message ID information to be obtained by software including bits which were masked during a match and mask acceptance filter ing process This technique enables the software to unam biguously identify the received CAN message frame with out having to waste valuable message buffer storage area by storing this message ID information along
10. in response to an accepted incoming CAN Frame being transferred to the appropriate message buffer Fragmented Message Assembly For Message Objects that have been set up with automatic fragmented message handling enabled i e with the FRAG bit in the MnCTL register for that Message Object set to 17 masking of the 11 29 bit CAN ID field is disallowed As such the CAN ID of the accepted CAN Frame is known unambiguously and is contained in the MnMIDH and MnMIDL registers associated with the Message Object that has been deemed to constitute a match Therefore there is no need to write the CAN ID of the accepted CAN Frame into the MnMIDH and MnMIDL registers associated with the Message Object that has been deemed to constitute a match As subsequent CAN Frames of a fragmented message are received the new data bytes are appended to the end of the previously received and stored data bytes This process continues until a complete multi frame message has been received and stored in the appropriate message buffer Under CAL protocols DeviceNet CANopen and OSEK if a Message Object is an enabled Receive Message Object and its associated MnCTL register has its FRAG bit set to 1 i e automatic fragmented message assembly is enabled for that particular Receive Message Object then the first data byte Data Byte 1 of each received CAN Frame that matches that particular Receive Message Object will be used to encode fragmentation informati
11. is detected for a particular Message Object the corresponding bit in the MCPLH or MCPLL register will be set This will occur regardless of whether the INT EN bit is set for that particular Message Object in its associated MnCTL register or whether Message Complete Status Flags have already been set for any other Message Objects In addition to these 32 Message Complete Status Flags there is a Tx Message Complete Interrupt Flag and an Rx Message Complete Interrupt Flag corresponding to bits 1 and 0 respectively of an MMR 40 designated CANINTFLG which will generate the actual Event inter rupt requests to the XA CPU Core 22 When an End of Message condition occurs at the same moment that the Message Complete Status Flag is set the appropriate Tx or Rx Message Complete Interrupt flip flop will be set pro vided that INT_EN 1 for the associated Message Object and provided that the interrupt is not already set and pend ing Further details regarding the generation of interrupts and the associated registers can be found in the XA C3 Func tional Specification and in the XA C3 CAN Transport Layer Controller User Manual both of which are part of the parent Provisional Application Serial No 60 154 022 the disclo sure of which has been fully incorporated herein for all purposes 10 15 20 25 30 35 40 45 50 55 60 65 14 The Present Invention As was discussed hereinabove in the section encaptioned
12. the CAN device comprises a CAN microcontroller 23 In a CAN device that provides a plurality of message objects each of which has an associated message buffer at least one associated match ID register and at least one associated mask register a method for acceptance filtering incoming CAN frames the method including the steps of extracting a multi bit screener ID field from a received CAN frame storing step is performed by storing at least selected portions of the received CAN frame other than the extracted screener ID field in the message buffer associated with the matching message object extracted screener ID field is not stored in the message buffer received CAN frame is an Extended CAN frame and the extracted screener ID field is 30 bits consisting of 29 CAN US 6 434 432 B1 17 comparing the extracted screener ID field to a respective user specified multi bit match ID field stored in the at least one match ID register associated with each enabled one of the message objects designated to be a receive message object wherein the at least one mask 5 register associated with each enabled message object designated to be a receive message object stores a user specified multi bit mask field that masks selected bits of the corresponding match ID field the masked bits being excluded from the comparisons if a match is found as a result of the comparing step storing data bytes of the received CAN frame in the message buffe
13. the capabilities of CAN while employing the CAN physical layer and the CAN frame format and which adheres to the CAN specifica tion Among other things CALs permit transmission of Messages which exceed the 8 byte data limit inherent to CAN Frames This is accomplished by dividing each message into multiple packets with each packet being transmitted as a single CAN Frame consisting of a maxi mum of 8 data bytes Such messages are commonly referred to as segmented or fragmented messages The individual CAN Frames constituting a complete fragmented message are not typically transmitted in a contiguous fashion but rather the individual CAN Frames of different unrelated messages are interleaved on the CAN bus as is illustrated in FIG 2 Fragmented Message A lengthy message in excess of 8 bytes divided into data packets and transmitted using a sequence of individual CAN Frames The specific ways that sequences of CAN Frames construct these lengthy messages is defined within the context of a specific CAL The XA C3 microcontroller automatically re assembles these packets into the original lengthy message in hardware and reports via an interrupt when the completed re assembled message is available as an associated Receive Message Object Message Buffer A block of locations in XA Data memory where incoming received messages are stored or where outgoing transmit messages are staged MMR Memory Mapped Register An on
14. with the actual data bytes of the received CAN frame in the message buffer storage area SUMMARY OF THE INVENTION The present invention encompasses a method for accep tance filtering incoming CAN frames in a CAN device that provides a plurality of message objects each of which has an associated message buffer at least one associated match ID register and at least one associated mask register The method includes the steps of extracting a multi bit screener ID field from a received CAN frame and then comparing the extracted screener ID field to a respective user specified multi bit match ID field stored in the at least one match ID register associated with each enabled one of the message objects designated to be a receive message object wherein the at least one mask register associated with each enabled message object designated to be a receive message object stores a user specified multi bit mask field that masks selected bits of the corresponding match ID field the masked bits being excluded from the comparisons If a match is found as a result of the comparing step data bytes of the received CAN frame are stored in the message buffer associated with the matching message object and the extracted screener ID field is written into the at least one match ID register associated with the matching message object to replace the match ID field associated with the matching message object The extracted screener ID field is not stored in the
15. 3 Functional Specification and XA C3 CAN Transport Layer Controller User Manual The register programming procedures that are most relevant to an understanding of the present invention are described below followed by a description of the various message management and other functions that are automatically performed by the CAL CAN module 77 during operation of the XA C3 microcon troller 20 after it has been properly set up by the user Following these sections a more detailed description of the particular invention to which this application is directed is provided Set up Programming Procedures As an initial matter the user must map the overall XA C3 data memory space as illustrated in FIG 5 In particular subject to certain constraints the user must specify the starting or base address of the XRAM 28 and the starting or base address of the MMRs 40 The base address of the MMRs 40 can be specified by appropriately programming Special Function Registers SFRs MRBL and MRBH The base address of the XRAM 28 can be specified by appro priately programming the MMRs designated MBXSR and XRAMB see FIG 4 The user can place the 4KByte space reserved for MMRs 40 anywhere within the entire 16 Mbyte data memory space supported by the XA architecture other than at the very bottom of the memory space i e the first 1 KByte portion starting address of 000000h where it would conflict with the on chip Data RAM 26 that serves as the internal or
16. H and MnMIDL registers being changed in response to an accepted incoming CAN Frame being transferred to the appropriate message buffer The extracted Screener ID Field assembled from an incoming Standard CAN Frame is 28 bits consisting of 11 CAN ID bits extracted from the header of the received CAN Frame 2x8 16 bits from the first and second data bytes Data Byte 1 and Data Byte 2 of the received CAN Frame the IDE bit Thus the user is required to set the Msk1 and Msk0 bits in the Mask Field MnMSKL register for Standard CAN Frame Message Objects i e to don t care In addition in many applications based on Standard CAN Frames either Data Byte 1 Data Byte 2 or both do not US 6 434 432 B1 15 participate in Acceptance Filtering In those applications the user must also mask out the unused Data Byte s The IDE bit is not maskable The Screener ID Field for an Extended CAN Frame is 30 bits consisting of 29 CAN ID bits extracted from the header of the incoming CAN Frame the IDE bit Again the IDE bit is not maskable With this Screener ID write back technique of the present invention the message buffer associated with the matching Message Object is left free for storage of actual data content i e only the actual data bytes of the incoming CAN Frame are stored in the message buffer and not the Screener ID thereby conserving valuable memory resources Although the present invention has been described in detail herein
17. MSBs 18 588 141 4014 RemoteTransmitRequest ORR SubstituteRemoteRequest IDE ID Extension 1 10 reserved bits DLC DataLengthCode 0 1 8 IFS InterFrameSpace DLC 4 bit Data Field 0 1 8 Bytes 08 64 bits CRC 15 05 EXTENDED U S Patent Aug 13 2002 Sheet 1 of 7 US 6 434 432 STANDARD IFS Bus Idle DELI 7 hite oh 05 55 Data Field 0 1 8 Bytes 08 64 bits Data Field 0 1 8 Bytes 0 8 64 bits EXTENDED RTR RemoteTransmitRequest SRR SubstituteRemoteRequest IDE ID Extension rt 10 reserved bits DLC DataLengthCode 0 1 8 IFS InterFrameSpace 1 CAN bus Ce sp nm 8 Byle DO enc BE U S Patent Aug 13 2002 Sheet 2 of 7 US 6 434 432 Core Data bus XA CPU Core 22 Program bus 24 32K Bytes ROM EPROM 8 26 19 DAT 1024 Bytes bus DATA RAM UART 0 99 27 54 External Address cd 2 36 SPI Data Bus MMR bus T INTERFACE ro3 f 32 1 Timer 1 r 54 E ICE 9 Watchdog Timer Tx Rm re ee em ee em ee ee ee ee a ee AEN U S Patent MMRs O00rgngngnrQ000b ndh Q0Orynggn ng 0000 oh Message Buffer Location Message n Bur Size ByteWord O00ngngngnngt110b nEh
18. US006434432B1 United States Patent 12 10 Patent No US 6 434 432 B1 Hao et al 45 Date of Patent Aug 13 2002 54 METHOD FOR WRITING BACK MESSAGE 6 374 303 4 2002 Armitage et al 370 390 ID INFORMATION TO A MATCH ID 6 381 604 4 2002 Caughran et al 707 10 REGISTER AND A CAN FOREIGN PATENT DOCUMENTS MICROCONTROLLER THAT IMPLEMENTS THIS METHOD DE 4129412 Al 3 1993 G06F 13 38 75 Inventors Hong Bin Hao William J Slivkoff cited by examiner both of San Jose CA US Primary Examiner Ramesh Patel 73 Assignee Koninklijke Philips Electronics N V 57 ABSTRACT Eindh NL iodboyen NE A method for acceptance filtering incoming CAN frames in Notice Subject to any disclaimer the term of this a CAN device that provides a plurality of message objects patent is extended or adjusted under 35 each of which has an associated message buffer at least one U S C 154 b by 0 days associated match ID register and at least one associated mask register The method includes the steps of extracting a multi bit screener ID field from a received CAN frame and 21 Appl No 09 474 905 then comparing the extracted screener ID field to a 22 Filed Dec 30 1999 respective user specified multi bit match ID field stored in the at least one match ID register associated with each Related U S Application Data enabled one of the message objects designated to be a 60 Provision
19. a a MBXSRI7 0 XRAMB 7 1 0 xy0000h Segment xy in Data Memory Space xyFFFFh ECE o 14 MBXSRIT1 MnBLR ate Object n Message Buffer XRAM Buffer size pi 512 Bytes 323 a16 15 a8 a al ja s e NE 000 au xy0000h FIG 8 U S Patent Aug 13 2002 Sheet 6 of 7 US 6 434 432 Object n Match ID Field MnMIDH and MnMIDL Mid28 Mid 8 Midt7 Midio Mid9 Mid2 Mid Midd MIDE Object n Mask Field MnMSKH and MnMSKL Msk28 Msk18 Mskt7 Mskt0 Msk9 Msk2 Mski Screener ID Field assembled from incoming bit stream Data Byte 1 7 0 Data Byte 2 7 0 Object n Match ID Field MnMIDH and MnMIDL Mid28 Mid18 Mid17 Mid10 Mid9 Mid2 MIDE Object n Mask Field MnMSKH and MnMSKL Msk28 Msk18 Msk17 Msk10 Msk9 Msk Mski screener ID Field assembled from incoming bit stream CAN ID 28 CAN ID O IDE FIG 10 U S Patent Aug 13 2002 B D D ata Byte 2 ata Byte 3 Data Byte DLC Data Byte 2 next Data Byte 3 next je FIG 11 Framelnfo Data Byte 1 Data Byte 2 Data Byte DLC Framelnfo next Data Byte 1 next Data Byte 2 next FIG 12 Sheet 7 of 7 US 6 434 432 B1 DIRECTION OF INCREASING ADDRESS DIRECTION OF INCREASING ADDRESS US 6 434 432 B1 1 METHOD FOR WRITING BACK MESSAGE ID INFORMATION TO A MATCH ID REGISTER AND A CAN MICROCONTROLLER THAT IMPLEMENTS THIS METHOD This application claim
20. above in the context of a specific preferred embodiment implementation it should be clearly under stood that many variations modifications and or alternative embodiments implementations of the basic inventive con cepts taught herein which may appear to those skilled in the pertinent art will still fall within the spirit and scope of the present invention as defined in the appended claims What is claimed is 1 In a CAN device that provides a plurality of message objects each of which has an associated message buffer at least one associated match ID register and at least one associated mask register a method for acceptance filtering incoming CAN frames the method including the steps of extracting a multi bit screener ID field from a received CAN frame comparing the extracted screener ID field to a multi bit match ID field stored in the at least one match ID register associated with an enabled one of the message objects designated to be a receive message object repeating the comparing step for each enabled one of the message objects designated to be a receive message object if a match is found as a result of the comparing and repeating steps storing data bytes of the received CAN frame in the message buffer associated with the match ing message object and writing at least a portion of the extracted screener ID field into the at least one match ID register associated with the matching message object 2 The method as set for
21. al application No 60 154 022 filed on Sep 15 receive message object wherein the at least one mask 1999 register associated with each enabled message object des 51 Int sederet tt 05 15 00 ignated to be Ar receive message object stores a SUSSIE 52 U S CI 700 1 700 19 700 20 specified multi bit mask field that masks selected bits of the 700 55 370 312 370 470 370 471 corresponding match ID field the masked bits being 58 Field of Search j 700 1 19 20 excluded from the comparisons If a match is found as a 700 23 24 25 32 55 52 370 470 471 result of the comparing step data bytes of the received CAN OD aie We E 312 frame are stored in the message buffer associated with the matching message object and the extracted screener ID field 56 Ref Cited is written into the at least one match ID register associated 56 A E with the matching message object to replace the match ID U S PATENT DOCUMENTS field associated with the matching message object The 5323385 A 6 1994 J jns etal 340 3 1 extracted screener ID field is not stored in the message buffer 6252851 6 2001 S rd SEE 370 236 associated with the matching message object 6 304 908 B1 10 2001 Kalajan see 709 229 6 357 014 3 2002 Correia 713 502 39 Claims 7 Drawing Sheets STANDARD bes CRC AeA EOF FS Idle EA 15 05 T bits 345 08 64 bils SRR IDE Extended D Idle 1 bit 11
22. can be transmitted CAN Arbitration ID An 11 bit Standard CAN 2 0 Frame or 29 bit Extended CAN 2 0B Frame identifier field placed in the CAN Frame Header This ID field is used to arbitrate Frame access to the CAN bus Also used in Acceptance Filtering for CAN Frame reception and Transmit Pre Arbitration Screener ID A 30 bit field extracted from the incoming message which is then used in Acceptance Filtering The Screener ID includes the CAN Arbitration ID and the IDE bit and can include up to 2 Data Bytes These 30 extracted bits are the information qualified by Acceptance Filtering Match ID A 30 bit field pre specified by the user to which the incoming Screener ID is compared Individual Match IDs for each of 32 Message Objects are programmed by the user into designated Memory Mapped Registers MMRs Mask A 29 bit field pre specified by the user which can override Mask a Match ID comparison at any particular bit or combination of bits in an Acceptance Filter Individual Masks one for each Message Object are programmed by the user in designated MMRs Individual Mask patterns assure that single Receive Objects can Screen for multiple acknowledged CAL CAN Frames and thus minimize the number of Receive Objects that must be dedicated to such lower priority Frames This ability to Mask individual Message Objects is an important new CAL feature CAL CAN Application Layer A generic term for any high level protocol which extends
23. d In particular if a transmission is ongoing for a Transmit Message Object the user will be prevented from clearing the OBJ__EN bit in the MnCTL register associated with that particular Transmit Message Object CAN CAL Related Interrupts The CAN CAL module 77 of the XA C3 microcontroller 20 is presently configured to generate the following five different Event interrupts to the XA CPU Core 22 1 Rx Message Complete 2 Tx Message Complete 3 Rx Buffer Full 4 Message Error 5 Frame Error For single frame messages the Message Complete con dition occurs at the end of the single frame For multi frame fragmented messages the Message Complete condition occurs after the last frame is received and stored Since the XA C3 microcontroller 20 hardware does not recognize or handle fragmentation for transmit messages the Tx Message Complete condition will always be generated at the end of each successfully transmitted frame As previously mentioned there is a control bit associated with each Message Object indicating whether a Message Complete condition should generate an interrupt or just set a Message Complete Status Flag for polling without generating an interrupt This is the INT_EN bit in the MnCTL register associated with each Message Object n There are two 16 bit MMRs 40 MCPLH and MCPLL which contain the Message Complete Status Flags for all 32 Message Objects When a Message Complete Tx or Rx condition
24. h ID field associated with the matching message object 34 The method as set forth in claim 33 wherein the storing step is performed by storing at least selected portions of the received CAN frame other than the extracted screener ID field in the message buffer associated with the matching message object 35 The method as set forth in claim 33 wherein the extracted screener ID field is not stored in the message buffer associated with the matching message object 36 The method as set forth in claim 33 wherein each multi bit mask field has bit positions corresponding to all bit positions of the corresponding match ID field except for a match IDE bit position 37 The method as set forth in claim 33 wherein the received CAN frame is a Standard CAN frame and the extracted screener ID field is 28 bits consisting of 11 CAN ID bits extracted from a header portion of the received CAN frame plus 8 bits from a first data byte of the received CAN frame plus 8 bits from a second data byte of the received CAN frame plus an IDE bit of the received CAN frame 38 A CAN device that implements the method set forth in claim 33 39 The CAN device as set forth in claim 38 wherein the device comprises a CAN microcontroller i
25. ic single frame CAN messages versus multi frame frag mented CAN messages for which the ID field is not stored and no masking is allowed With reference now to FIGS 4 9 and 10 in accordance with the present invention implemented in the XA C3 microcontroller 20 this problem is solved by writing the extracted Screener ID Field of the incoming CAN Frame that results in a match back into the corresponding Match ID Field of the matching Message Object i e the extracted Screener ID Field is written into the corresponding bit positions of the MnMIDH and MnMIDL registers associated with the matching Message Object thereby replacing the previously stored Match ID value This will permit the user application to unambiguously determine the exact CAN ID which resulted in the match by simply reading the current value stored in the MnMIDH and MnMIDL registers asso ciated with the matching Message Object even if a portion of the Screener ID was masked for Acceptance Filtering Even though this may mean that masked bits of the previously stored Match ID field may be different from what the user originally programmed since these bits are masked anyway it is irrelevant More particularly since the incom ing CAN Frame must pass through the Acceptance Filter before it can be accepted only the bits that are masked out will change Therefore the criteria for match and mask Acceptance Filtering will not change as a result of the contents of the MnMID
26. iguring programming some or all of the eight MMRs dedicated to that Message Object as will be described below Additionally as will be described below the user must configure program the global GCTL register whose bits control global parameters that apply to all Message Objects In particular the user can specify the Match ID value for each Message Object to be compared against the Screener IDs extracted from incoming CAN Frames for Acceptance Filtering The Match ID value for each Message Object n is specified in the MnMIDH and MnMIDL registers associated with that Message Object n The user can mask any Screener ID bits which are not intended to be used in Acceptance Filtering on an object by object basis by writing a logic 1 in the desired to be masked bit position s in the appro priate MnMSKH and or MnMSKL registers associated with each particular Message Object n The user is responsible on set up for assigning a unique message buffer location for each Message Object n In particular the user can specify the least significant 16 bits of the base address of the message buffer for each particular Message Object n by programming the MnBLR register associated with that Message Object n The upper 8 bits of the 24 bit address for all Message Objects are specified by the contents of the MBXSR register as previously discussed so that the message buffers for all Message Objects reside within the same 64 KByte memory segment
27. iltering In those applications the user must also mask out the unused Data Byte s The IDE bit is not maskable As is illustrated in FIG 10 the Screener ID field for an Extended CAN Frame is 30 bits consisting of 29 CAN ID bits extracted from the header of the incoming CAN Frame the IDE bit Again the IDE bit is not maskable 2 The assembled Screener ID field of the received CAN Frame is then sequentially compared to the corresponding Match ID values specified in the MnMIDH and MnMIDL registers for all currently enabled Receive Message Objects Of course any bits in the Screener ID field that are masked by a particular Message Object are not included in the comparison That is if there is a 1 ina bit position of the Mask field specified in the MnMSKH and Mn MSKL registers for a particular Message Object then the corresponding bit position in the Match ID field for that particular Message Object becomes a don t care i e always yields a match with the corresponding bit of the Screener ID of the received CAN Frame 3 If the above comparison process yields a match with more than one Message Object then the received CAN Frame will be deemed to have matched the Message Object having the lowest object number n Message Storage Each incoming received CAN Frame that passes Accep tance Filtering will be automatically stored via the DMA engine 38 into the message buffer for the Receive Message Object that par
28. iously In short when a transmit message is retrieved it will be written by the DMA engine 38 to the CCB 42 sequentially During this process the DMA engine 38 will keep requesting the bus when bus access is granted the DMA engine 38 will sequentially read the transmit message data from the location in the message buffer cur rently pointed to by the address pointer logic and the DMA engine 38 will sequentially write the retrieved transmit message data to the CCB 42 It is noted that when preparing a message for transmission the user application must not include the CAN ID and Frame Information fields in the transmit message data written into the designated message buffer since the Transmit Tx logic will retrieve this information directly from the appropriate MnMIDH MnMIDL and MnMSKH registers The XA C3 microcontroller 20 does not handle the trans mission of fragmented messages in hardware It is the user s responsibility to write each CAN Frame of a fragmented message to the appropriate message buffer enable the asso ciated Transmit Message Object for transmission and wait for a completion before writing the next CAN Frame of that fragmented message to the appropriate message buffer The user application must therefore transmit multiple CAN Frames one at a time until the whole multi frame frag mented transmit message is successfully transmitted However by using multiple Transmit Message Objects whose object numbers increase se
29. mapped entirely into that same 64K Byte segment which must be below the 1 MByte address limit After the memory space has been mapped the user can set up or define up to 32 separate Message Objects each of which can be either a Transmit Tx or a Receive Rx Message Object A Rx Message Object can be associated either with a unique CAN ID or with a set of CAN IDs which share certain ID bit fields As previously mentioned each Message Object has its own reserved block of data memory space up to 256 Bytes which is referred to as that Message Object s message buffer As will be seen both the size and the base address of each Message Object s message buffer is programmable As previously mentioned each Message Object is asso ciated with a set of eight MMRs 40 dedicated to that Message Object Some of these registers function differently for Tx Message Objects than they do for Rx Message Objects These eight MMRs 40 are designated Message Object Registers see FIG 4 The names of these eight MMRs 40 are 1 MnMIDH Message n Match ID High 2s MnMIDL Message n Match ID Low 3 MnMSKH Message n Mask High 4 MnMSKL Message n Mask Low 5 MnCTL Message n Control 6 MnBLR Message n Buffer Location Register 7 MnBSZ Message n Buffer Size 8 MnFCR Message n Fragment Count Register where n ranges from 0 to 31 i e corresponding to 32 independent Message Objects In general the user defines or sets up a Message Object by conf
30. mer block 54 a Watchdog Timer 55 and four 8 bit I O ports namely Ports 0 3 included in block 61 each of which has 4 programmable output configurations The DMA engine 38 the MMRs 40 and the CCB 42 can collectively be considered to constitute a CAN CAL module 77 and will be referred to as such at various times through 10 15 20 25 30 35 40 45 50 55 60 65 6 out the following description Further the particular logic elements within the CAN CAL module 77 that perform message management and message handling functions will sometimes be referred to as the message management engine and the message handler respectively at various times throughout the following description Other nomen clature will be defined as it introduced throughout the following description As previously mentioned the XA C3 microcontroller 20 automatically implements in hardware many message man agement and other functions that were previously only implemented in software running on the host CPU or not implemented at all including transparent automatic re assembly of up to 32 concurrent interleaved multi frame fragmented CAL messages For each application that is installed to run on the host CPU 1 the XA CPU Core 22 the user software programmer must set up the hard ware for performing these functions by programming certain ones of the MMRs and SFRs in the manner set forth in the XA C
31. message buffer associated with the match ing message object In a preferred embodiment each multi bit mask field has bit positions corresponding to all bit positions of the corre sponding match ID field except for a match IDE bit position The received CAN frame can be either a Standard CAN frame or an Extended CAN frame In the case of a Standard CAN frame the extracted screener ID field is 28 bits consisting of 11 CAN ID bits extracted from a header portion of the received CAN frame plus 8 bits from a first data byte of the received CAN frame plus 8 bits from a second data byte of the received CAN frame plus an IDE bit of the received CAN frame In the case of an Extended CAN frame the extracted screener ID field is 30 bits consisting of 29 CAN ID bits extracted from a header portion of the received CAN frame plus an IDE bit of the received CAN frame US 6 434 432 B1 3 The present invention in another of its aspects encom passes a CAN device e g a CAN microcontroller that implements the above described method BRIEF DESCRIPTION OF THE DRAWINGS These and various other aspects features and advantages of the present invention will be readily understood with reference to the following detailed description of the inven tion read in conjunction with the accompanying drawings in which FIG 1 is a diagram illustrating the format of a Standard CAN Frame and the format of an Extended CAN Frame FIG 2 is a diagram ill
32. nique The basic objective of this Acceptance Filtering process is to determine whether a Screener ID field of the received CAN Frame excluding the don t care bits masked by the Mask field for each Message Object matches the Match ID of any enabled one of the 32 Message Objects that has been designated a Receive Mes sage Object If there is a match between the received CAN Frame and more than one Message Object then the received CAN Frame will be deemed to have matched the Message Object with the lowest object number n Acceptance Filtering is performed as follows by the XA C3 microcontroller 20 1 A Screener ID field is extracted from the incoming received CAN Frame In this regard the Screener ID field that is assembled from the incoming bit stream is different for Standard and Extended CAN Frames In US 6 434 432 B1 9 particular as is illustrated in FIG 9 the Screener ID field for a Standard CAN Frame is 28 bits consisting of 11 CAN ID bits extracted from the header of the received CAN Frame 2x8 16 bits from the first and second data bytes Data Byte 1 and Data Byte 2 of the received CAN Frame the IDE bit Thus the user is required to set the Msk1 and Msk bits the Mask Field MnMSKL register for Standard CAN Frame Message Objects i e to don t care In addition in many applications based on Standard CAN Frames either Data Byte 1 Data Byte 2 or both do not participate in Acceptance F
33. on only and thus will not be stored in the message buffer for that particular Receive Message Object Thus message storage for such FRAG enabled Receive Message Objects will start with the second data byte Data Byte 2 and proceed in the previously described manner until a complete multi frame message has been received and stored in the appropriate message buffer This message storage format is illustrated in FIG 11 The message handler hardware will use the fragmentation infor mation contained in Data Byte 1 of each CAN Frame to facilitate this process Under the CAN protocol if a Message Object is an enabled Receive Message Object and its associated MnCTL register has its FRAG bit set to 1 1 automatic frag mented message assembly is enabled for that particular Receive Message Object then the CAN Frames that match US 6 434 432 B1 11 that particular Receive Message Object will be stored sequentially in the message buffer for that particular Receive Message Object using the format shown in FIG 12 When writing message data into a message buffer asso ciated with a Message Object n the DMA engine 38 will generate addresses automatically starting from the base address of that message buffer as specified in the MnBLR register associated with that Message Object n Since the size of that message buffer is specified in the MBSZ register associated with that Message Object n the DMA engine 38 can determined when i
34. on whether the message that the CAN Frame belongs to is a non fragmented 10 15 20 25 30 35 40 45 50 55 60 65 10 single frame message or a fragmented message Each case is described below Non Fragmented Message Assembly For Message Objects that have been set up with automatic fragmented message handling disabled not enabled i e the FRAG bit in the MnCTL register for that Message Object is set to 0 the complete CAN ID of the accepted CAN Frame which is either 11 or 29 bits depending on whether the accepted CAN Frame is a Standard or Extended CAN Frame is written into the MnMIDH and MnMIDL registers associated with the Message Object that has been deemed to constitute a match once the DMA engine 38 has successfully transferred the accepted CAN Frame to the message buffer associated with that Message Object This will permit the user application to see the exact CAN ID which resulted in the match even if a portion of the CAN ID was masked for Acceptance Filtering As a result of this mechanism the contents of the MnMIDH and MnMIDL registers can change every time an incoming CAN Frame is accepted Since the incoming CAN Frame must pass through the Acceptance Filter before it can be accepted only the bits that are masked out will change Therefore the criteria for match and mask Acceptance Filtering will not change as a result of the contents of the MnMIDH and MnMIDL registers being changed
35. quentially and whose CAN IDs have been configured identically several CAN Frames of a fragmented transmit message can be queued up and enabled and then transmitted in order avoid data corruption when transmitting messages there are three possible approaches 1 If the Tx Message Complete interrupt is enabled for the transmit message the user application would write the next transmit message to the designated transmit mes sage buffer upon receipt of the Tx Message Complete interrupt Once the interrupt flag is set it is known for certain that the pending transmit message has already been transmitted 2 Wait until the OBJ bit of the MnCTL register of the associated Transmit Message Object clears before writing to the associated transmit message buffer This can be accomplished by polling the OBJ__EN bit of the MnCTL register of the associated Transmit Message Object US 6 434 432 B1 13 3 Clear the bit of the MnCTL register of the associated Transmit Message Object while that Trans mit Message Object is still in Tx Pre Arbitration In the first two cases above the pending transmit message will be transmitted completely before the next transmit message gets transmitted For the third case above the transmit message will not be transmitted Instead a transmit message with new content will enter Tx Pre Arbitration There is an additional mechanism that prevents corruption of a message that is being transmitte
36. r associated with the matching message object and writing the extracted screener ID field into the at least one match ID register associated with the matching mes sage object to replace the match ID field associated with the matching message object 24 The method as set forth in claim 23 wherein the 15 20 25 The method as set forth in claim 23 wherein the associated with the matching message object 26 The method as set forth in claim 23 wherein each multi bit mask field has bit positions corresponding to all bit positions of the corresponding match ID field except for a match IDE bit position 30 27 The method as set forth in claim 23 wherein the received CAN frame is a Standard CAN frame and the extracted screener ID field is 28 bits consisting of 11 CAN ID bits extracted from a header portion of the received CAN frame plus 8 bits from a first data byte of the received CAN frame plus 8 bits from a second data byte of the received 35 CAN frame plus an IDE bit of the received CAN frame 28 The method as set forth in claim 23 wherein the received CAN frame is an Extended CAN frame and the extracted screener ID field is 30 bits consisting of 29 CAN ID bits extracted from a header portion of the received CAN frame plus an IDE bit of the received CAN frame 40 29 The method as set forth in claim 23 wherein the CAN device is a CAN microcontroller 30 A CAN device that implements the method se
37. ram the GCTL register in order to specify the high level CAL protocol if any being used e g DeviceNet CANopen or OSEK in order to enable or disable automatic acknowledgment of CANopen Frames CANopen auto acknowledge and in order to specify which of two transmit Tx pre arbitration schemes policies is to be utilized ie either Tx pre arbitration based on CAN ID with the object number being used as a secondary tie breaker or Tx pre arbitration based on object number only Receive Message Objects and the Receive Process During reception i e when an incoming CAN Frame is being received by the XA C3 microcontroller 20 the CAN CAL module 77 will store the incoming CAN Frame in a temporary 13 Byte buffer and determine whether a complete error free CAN frame has been successfully received If it is determined that a complete error free CAN Frame has been successfully received then the CAN CAL module 77 will initiate Acceptance Filtering in order to determine whether to accept and store that CAN Frame or to ignore discard that CAN Frame Acceptance Filtering In general because the XA C3 microcontroller 20 pro vides the user with the ability to program separate Match ID and Mask fields for each of the 32 independent Message Objects on an object by object basis as described previously the Acceptance Filtering process performed by the XA C3 microcontroller 20 can be characterized as a match and mask tech
38. s the full benefit and priority of U S Provisional Application Ser No 60 154 022 filed on Sep 15 1999 the disclosure of which is fully incorporated herein for all purposes BACKGROUND OF THE INVENTION The present invention relates generally to the field of data communications and more particularly to the field of serial communications bus controllers and microcontrollers that incorporate the same CAN Control Area Network is an industry standard two wire serial communications bus that is widely used in automotive and industrial control applications as well as in medical devices avionics office automation equipment consumer appliances and many other products and appli cations CAN controllers are currently available either as stand alone devices adapted to interface with a microcon troller or as circuitry integrated into or modules embedded in a microcontroller chip Since 1986 CAN users software programmers have developed numerous high level CAN Application Layers CALs which extend the capabilities of the CAN while employing the CAN physical layer and the CAN frame format and adhering to the CAN specification CALs have heretofore been implemented primarily in software with very little hardware CAL support Consequently CALs have heretofore required a great deal of host CPU intervention thereby increasing the processing overhead and diminishing the performance of the host CPU Thus there is a need in the art for a
39. set forth in claim 13 wherein each multi bit mask field has bit positions corresponding to all bit positions of the extracted screener ID field except for an IDE bit position 15 The method as set forth in claim 13 wherein each multi bit mask field has bit positions corresponding to all bit positions of the corresponding match ID field except for a match IDE bit position 16 The method as set forth in claim 1 wherein the at least a portion of the extracted screener ID field is not stored in the message buffer associated with the matching message object 17 The method as set forth in claim 1 wherein the storing step is performed by storing at least selected portions of the received CAN frame other than the at least a portion of the extracted screener ID field in the message buffer associated with the matching message object 18 The method as set forth in claim 1 wherein the extracted screener ID field is not stored in the message buffer associated with the matching message object 19 The method as set forth in claim 1 wherein the storing step is performed by storing at least selected portions of the received CAN frame other than the extracted screener ID field in the message buffer associated with the matching message object 20 The method as set forth in claim 1 wherein the CAN device is a CAN microcontroller 21 A CAN device that implements the method set forth in claim 1 22 The CAN device as set forth in claim 21 wherein
40. t forth R in claim 23 31 The CAN device as set forth in claim 30 wherein the CAN device comprises a CAN microcontroller 32 The method as set forth in claim 23 wherein the a 18 ID bits extracted from a header portion of the received CAN frame plus an IDE bit of the received CAN frame 33 In a CAN device that provides a plurality of message objects each of which has an associated message buffer at least one associated match ID register and at least one associated mask register a method for acceptance filtering incoming CAN frames the method including the steps of extracting a multi bit screener ID field from a received CAN frame comparing the extracted screener ID field to a respective multi bit match ID field stored in the at least one match ID register associated with each enabled one of the message objects designated to be a receive message object disregarding bit positions corresponding to user specified mask bits contained in a corresponding multi bit mask field stored in the at least one mask ID register associated with each enabled one of the mes sage objects designated to be a receive message object a match is found as a result of the comparing step storing data bytes of the received CAN frame in the message buffer associated with the matching message object and writing the extracted screener ID field into the at least one match ID register associated with the matching mes sage object to replace the matc
41. t has reached the top location of that message buffer If the DMA engine 38 determines that it has reached the top location of that message buffer and that the message being written into that message buffer has not been completely transferred yet the DMA engine 38 will wrap around by generating addresses starting from the base address of that message buffer again Some time before this happens a warning interrupt will be generated so that the user application can take the necessary action to prevent data loss The message handler will keep track of the current address location of the message buffer being written to by the DMA engine 38 and the number of bytes of each CAL message as it is being assembled in the designated message buffer After an End of Message for a CAL message is decoded the message handler will finish moving the com plete CAL message and the Byte Count into the designated message buffer via the DMA engine 38 and then generate an interrupt to the XA CPU Core 22 indicating that a complete message has been received Since Data Byte 1 of each CAN Frame contains the fragmentation information it will never be stored in the designated message buffer for that CAN Frame Thus up to seven data bytes of each CAN Frame will be stored After the entire message has been stored the designated message buffer will contain all of the actual informational data bytes received exclusive of fragmentation information bytes plus the B
42. th in claim 1 wherein the at least portion of the extracted screener ID field includes at least CAN ID of the received CAN frame 3 The method as set forth in claim 1 wherein the at least a portion of the extracted screener ID field comprises the entire extracted screener ID field 4 The method as set forth in claim 1 wherein the at least a portion of the extracted screener ID field comprises the entire extracted screener ID field except for a single IDE bit 5 The method as set forth in claim 1 wherein the received CAN frame is a Standard CAN frame and the extracted screener ID field is 28 bits consisting of 11 CAN ID bits extracted from a header portion of the received CAN frame plus 8 bits from a first data byte of the received CAN frame plus 8 bits from a second data byte of the received CAN frame plus an IDE bit of the received CAN frame 6 The method as set forth in claim 5 wherein the at least a portion of the extracted screener ID field comprises the entire extracted screener ID field except for the IDE bit 7 The method as set forth in claim 1 wherein the received CAN frame is an Extended CAN frame and the extracted screener ID field is 30 bits consisting of 29 CAN ID bits extracted from a header portion of the received CAN frame plus an IDE bit of the received CAN frame 10 15 20 25 30 35 40 45 50 55 60 65 16 8 The method as set forth in claim 6 wherein the at least
43. the overall XA C3 data memory space which may contain part or all of the CAN CAL Transmit amp Receive Object message buffers a Memory Interface MIF unit 30 that provides interfaces to generic memory devices such as SRAM DRAM flash ROM and EPROM memory devices via an external address data bus 32 via an internal Core Data bus 34 and via an internal MMR bus 36 a DMA engine 38 that provides 32 CAL DMA Channels a plurality of on chip Memory Mapped Registers MMRs 40 that are mapped to the overall XA C3 data memory space a 4K Byte portion of the overall XA C3 data memory space is reserved for MMRs These MMRs include 32 Message Object or Address Pointers and 32 ID Screeners or Match IDs corre sponding to the 32 CAL Message Objects A complete listing of all MMRs is provided in the Table depicted in FIG 5 a 2 0B CAN DLL Core 42 that is the CAN Controller Core from the Philips SJA1000 CAN 2 0A B Data Link Layer CDLL device hereinafter referred to as the CAN Core Block CCB and an array of standard microcontroller peripherals that are bi directionally coupled to the XA CPU Core 22 via a Special Function Register SFR bus 43 These stan dard microcontroller peripherals include Universal Asynchronous Receiver Transmitter UART 49 an SPI serial interface port 51 three standard timers counters with toggle output capability namely Timer 0 amp Timer 1 included in Timer block 53 and Timer 2 included in Ti
44. ticular CAN Frame was found to have matched In an exemplary implementation the message buffers for all Message Objects are contained in the XRAM 28 Message Assembly In general the DMA engine 38 will transfer each accepted CAN Frame from the 13 byte pre buffer to the appropriate message buffer e g in the XRAM 28 one word at a time starting from the address pointed to by the contents of the MBXSR and MnBLR registers Every time the DMA engine 38 transfers a byte or a word it has to request the bus In this regard the MIF unit 30 arbitrates between accesses from the XA CPU Core 22 and from the engine 38 In general bus arbitration is done on an alternate policy After a DMA bus access the XA CPU Core 22 will be granted bus access if requested After an XA CPU bus access the DMA engine 38 will be granted bus access if requested However a burst access by the XA CPU Core 22 cannot be interrupted by a DMA bus access Once bus access is granted by the MIF unit 30 the DMA engine 38 will write data from the 13 byte pre buffer to the appropriate message buffer location The DMA engine 38 will keep requesting the bus writing message data sequen tially to the appropriate message buffer location until the whole accepted CAN Frame is transferred After the DMA engine 38 has successfully transferred an accepted CAN Frame to the appropriate message buffer location the con tents of the message buffer will depend up
45. ustrating the interleaving of CAN Data Frames of different unrelated messages FIG 3 is a high level functional block diagram of the XA C3 microcontroller FIG 4 is a table listing all of the Memory Mapped Registers MMRs provided by the XA C3 microcontroller FIG 5 is a diagram illustrating the mapping of the overall data memory space of the XA C3 microcontroller FIG 6 is a diagram illustrating the MMR space contained within the overall data memory space of the XA C3 micro controller FIG 7 is a diagram illustrating formation of the base address of the on chip XRAM of the XA C3 microcontroller with an object n message buffer mapped into off chip data memory FIG 8 is a diagram illustrating formation of the base address of the on chip XRAM of the XA C3 microcontroller with an object n message buffer mapped into the on chip XRAM FIG 9 is a diagram illustrating the Screener ID Field for a Standard CAN Frame and corresponding Match ID and Mask Fields FIG 10 is a diagram illustrating the Screener ID Field for an Extended CAN Frame and corresponding Match ID and Mask Fields FIG 11 is a diagram illustrating the message storage format for fragmented CAL messages and FIG 12 is a diagram illustrating the message storage format for fragmented CAN messages DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT The present invention is described below in the context of a particular implementation thereof i e in the conte
46. xt of the XA C3 microcontroller manufactured by Philips Semicon ductors Of course it should be clearly understood that the present invention is not limited to this particular implementation as any one or more of the various aspects and features of the present invention disclosed herein can be utilized either individually or any combination thereof and in any desired application e g in a stand alone CAN controller device or as part of any other microcontroller or system The following terms used herein in the context of describ ing the preferred embodiment of the present invention i e the XA C3 microcontroller are defined as follows Standard CAN Frame The format of a Standard CAN Frame is depicted in FIG 1 Extended CAN Frame The format of an Extended CAN Frame is also depicted in FIG 1 Acceptance Filtering The process a CAN device imple ments in order to determine if a CAN frame should be 10 20 30 35 40 45 50 55 60 65 4 accepted or ignored and if accepted to store that frame in a pre assigned Message Object Message Object A Receive RAM buffer of pre specified size up to 256 bytes for CAL messages and associated with a particular Acceptance Filter or a Transmit RAM buffer which the User preloads with all necessary data to transmit a complete CAN Data Frame Message Object can be considered to be a communication channel over which a complete message or a succession of messages
47. yte Count at location 00 which will contain the total number of informational data bytes stored It is noted that there are several specific user set up programming procedures that must be followed when invok ing automatic hardware assembly of fragmented OSEK and CANopen messages These and other particulars can be found in the XA C3 CAN Transport Layer Controller User Manual that is part of the parent Provisional Application Serial No 60 154 022 the disclosure of which has been fully incorporated herein for all purposes Transmit Message Objects and the Transmit Process In order to transmit a message the XA application pro gram must first assemble the complete message and store it in the designated message buffer for the appropriate Trans mit Message Object n The message header CAN ID and Frame Information must be written into the MnMIDH MnMIDL and MnMSKH registers associated with that Transmit Message Object n After these steps are completed the XA application is ready to transmit the message To initiate a transmission the object enable bit OBJ EN bit of the MnCTL register associated with that Transmit Mes sage Object n must be set except when transmitting an Auto Acknowledge Frame in CANopen This will allow this ready to transmit message to participate in the pre arbitration process In this connection if more than one message is ready to be transmitted i e if more than one Transmit Message Object is enabled a Tx Pre
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