TDA9103 USER`S MANUAL DEMONSTRATION BOARD
Contents
1. age pin 26 which should be filtered versus vertical ground pin 24 Pin 24 may be tied to pin 19 General ground All elements relative to Vertical should be refered to Vertical ground C4 C5 C40 C41 C42 C43 The oscillator capacitor C4 claims for special atten tion The vertical sawtooth is obtained by charging 555 HOMES MICROELECTRONICS it at low rate then discharging abruptly The switch ing from discharge to charge is triggered when reaching a low threshold The loop constituted by C4 and its connecting tracks may give rise to para sitic series voltage spikes if there is a switching circuit at short distance like the DC DC converter for B one such spike could randomly trigger early switching to charge and the effect would be a vertical vibration of the display Such vibrations usually occur for determined settings of the hori zontal phase To avoid this the loop including C4 must have minimal area and all switching circuits SMPS DC DC converter horizontal scanning should be kept remote 111 3 Horizontal Section 111 3 1 Oscillator Stage Like Vertical section Horizontal section has dedi cated voltage reference pin 5 and Ground pin 4 In orderto maintain the horizontaljitter to the lowest possible value pin 4 should be kept NOT CON NECTED TO ANY OTHER GROUND an internal connection already exists with pins 19 and 24 and pin 5 should be filtered versus pin 4 This mainly2. concerns pins 1 2 3 5 10 11 12 14 15 17 Moreover the components not related to horizontal should not be connected to pin 4 As for Vertical section the capacitors with their connectingtracks should not constitute large loops prone to catch parasitic spikes When the various DC inputs are controlled by a PWM type DAC the DAC filtering capacitor must not be refered to pin 4 where it would produce parasitic voltages but to the microprocessor ground furthermore since there is some ripple between these two grounds a second filter cell is needed with its capacitor connected to pin 4 The second filter resistors are not presenton the dem onstration board 11 3 2 Output Stage Usually the horizontal scanning stage is remote from the TDA9103 and the control signal has to be transmitted at a distance When the signal is taken from pin 21 pin 20 should be connected to GND but not necessarily to pin 19 or near to the IC In the typical application implemented on present board the gate capacitance of Q2 will be charged and discharged at quite high current for every fast transition of pin 21 The current path is as follows For Charge 12V the filtering capacitor gt 010 gt R44 gt gate of Q2 gt source of Q2 gt minus of filtering capacitor For Discharge gate of Q2 gt Q1 gt source of Q2 9 10 TDA9103 USER S MANUAL DEMONSTRATION BOARD If these loops have too great area they will send
3. disturbing spikes to other circuitry by mutual induc tance Forthatreason the best place fortransistors Q1 and Q10 is near to the horizontal scanning transistor This of course could not be imple mented on present board which does not incorpo rate the scanning stage The driver stage supply voltage present on C20 must be well filtered since a ripple at this point will induce variations of the power transistor desatura tion time which will cause jitter When the TDA9103 is controlled OFF for instance by X ray protection Q2 will remain conductive which causes high dissipation in R47 This may be solved if AC coupling is used between pin 21 and driver stage Q1 Q10 This was not implemented on present board 111 4 DC DC Converter Section 1 4 1 Keeping the Information Clean The converter section receives two informations from other parts of the chassis A determined fraction of the voltage to be regu lated which it will manage to keep equal to its internal reference 5V The voltage on the sense resistor R61 which is always lower than 1 2V The internal references for comparison are con nected to the local ground pin 19 consequently any voltage difference in the ground track could influence the regulated voltage and the peak cur rentin Q6 To avoid this The foot of the divider R79 C47 must be grounded near to the IC pin 19 if this voltage comes from a transformer itis better to carr
4. the precautions we took may be very useful also in normal layouting we listed them herebelow to gether with other pieces of advice 111 1 General Statement on Ground Connec tion The ground connection to TDA91 03 not only carries the supply current but is also the voltage reference for various functions Consequently it should not carry high currents with fast transients like Vertical scanning supply Supply for B converter Which would introduce parasitic series voltages resistive and inductive This was made easier by completely separating the power sources for vertical and B Inside achassis this would necessitate separated ground pins in the SMPS transformer for 12V Vertical and 45 60V B 111 2 Vertical Section 1 2 1 Booster Part The 12V and 12V supplies feed the booster in first this way since the ground point was kept separated the high currents implied in vertical scanning will keep localised between the supplies and the booster Other traditional precautions for the booster include Film capacitors C31 and C32 with low HF imped ance near to the booster with short tracks an alternate solution is to connect C32 between pins 2 and 4 Boucherot cell R41 C19 near to the booster with short tracks The ground track to driver stage TDA9103 is connectedto the foot of R40 11 2 2 TDA9103 Oscillator and Driver Stage The vertical section has a dedicated reference volt
5. 3 This voltage is set by the regulation loop The board offers two possibilites for choosing the regulation loop Local regulation of B SW2 in position 1 EHT regulation SW2 in position 2 and feedback input on J25 This second mode will be choosen when the board is connectedon a multi frequency monitor The main features of this converter are the follow ing Frequency range 31kHz 64kHz Outputvoltage 70V 140V Input voltage 45V tX Output power 35W max You will find in annexe A the specifications of the inductance T2 used in this converter 2 10 9103 62 EPS 11 1 1 7 Other Functions X ray protection TP2 A level higher than 1 6V TTL level in this point inhibits all the outputs Horizontal Vertical SMPS Blanking Blanking output TP6 This output is activated in case of Xray detection loss of line synchro power failure Vcc or activation of the ON OFF switch ON OFF switch When the voltage on 2 is smaller than 1V the HOUT VOUT and SMPS outputs are disabled and the BLANK output TP6 is activated CS switch J17 Theses 4 outputs are sequentially switched on low level if the input horizontal frequency goes through the following thresholds 34kHz 41kHz 51kHz 61kHz These frequencies are given for a free running frequency equal to 27kHz The CS switch outputs could be used to switch the S correction capacitors if necessary Frame Blanking TP11 Th
6. A9103 and very few external components C2 R32 Line oscillator C3 C7 R31 Filter of the line PLL C4 Vertical oscillator C5 Memory capacitor for the vertical AGC C26 R68 R67 Gain of the error amplifier of DC DC converter April 1995 TDA9103 USER S MANUAL DEMONSTRATION BOARD D4 R80 C48 Circuit for improvement behaviour with Composite Sync See Section 1 1 1 8 These components may be omitted if such standards are not used 1 1 2 0 5V to 2 6V Interface The IC TDA9103 uses two 8V internal voltage references Vrer for the vertical part and Hrer for the horizontal one So the analog voltage range is 2 to 6V As a microprocessor usually delivers a voltage in the range 0 5V we must implement an interface with 3 resistors for each of the 10 adjustments required by the TDA9103 R1 to R30 The four circuits for horizontal resp vertical adjust ments are connected to Hrer resp VREF 1 1 1 3 EW Amplifier The parabola generated by the TDA9103 for the EW correction must be amplified in order to drive the diode modulator This function is performed by the class A amplifier Q3 Q4 Q9 A DC voltage is added to the parabola to achieve the horizontal size adjustments For a proper working this amplifier must be loaded 1000 connectedto Vp 24V 11 1 1 4 Horizontal Line Driver Stage The HOUT pulse delivered by the TDA9103 is used to turnon a MOS transistor via a push pull stage Th
7. S 9103 65 Figure 6 5V P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 47kQ 47 47 47 47 47 47 47 47 47kQ 47kQ A a P1 RC CX T a 21 45 pr ue 10uF 1 426 1234 123442 1234567 J3 9103 67 EPS 5 10 TDA9103 USER S MANUAL DEMONSTRATION BOARD Figure 9 643 19 6016 39915 TULNDZISOH 1 D m Lee Gite Jew er pan HILIMS 59 nie 49 Sun 12 SEA 229 zns 194 1984 23 3991 83M0d_M 3943434941 99 2 03 AS B ia nal i Hal Ue 2 amp 3ldaannd 8 199 13d 622 624 1 5129 1124 019 634 82d 23 93 2 ir Hic o OOO SOSA 3Z1SH 4022 3095 3215n 131HSn HSINId 1511 8 131HSH ba MICROELECTRONICS STA SGS THOMSON 8 10 TDA9103 USER S MANUAL DEMONSTRATION BOARD 111 GUIDELINES FOR LAYOUT AND WIRING SGS THOMSON realized a demonstration board for TDA9103 scanning processor Since this dem onstration board is expected to work properly while connected to an existing monitor set with flying wires special attention must be paid to the possible misfunctions that may be caused by the wiring As
8. Seas I INTRODUCTION This demonstationboardhas beenrealized inorder to provide the user with a complete and simple evaluation tool of the deflection processor for mul tisync monitor TDA9103 and possibly of the verti cal booster TDA8172 This demoboard is in fact the core of a monitor chassis To have a complete monitor we have only to add a command board microprocessor key board a line power board EHT S correction de flection transistor a SMPS board and a video board Besides the TDA9103 described in a separate data sheet we will find on this board the following func tions Avertical deflection circuit based on the TDA8172 Aclass Apower amplifier for the EW correction Aline transistor driver stage ADC DC converter for the scanning supply so called B Aseparable analog command board with poten tiometers for the generation from an external 5V power supply ofthe 11 control voltages required by the TDA9103 and with a simulator of horizontal flyback In this way the user will be able in a first step to evaluate the performances of the IC under clean conditions In a second step after having broken the printed board he will be able to connect the demoboard to a monitor and to use the commands of an existing monitor and thus use his own soft ware to drive the TDA9103 TECHNICAL INFORMATIONS 11 1 Board Description 11 1 1 Main Board 1 1 1 Core The board 1 built around the IC TD
9. d cable see Figure 3 The value of R79 is suitable for getting 25kV approx high voltage value with a standard EHT trans former When the EHV regulation loop is acting correctly the voltage at J25 is 5V depending on the B adjust pin 39 easy to calculate the value of R79 if the equivalent resistance Req of the bleeder is different of the one used to develop this demoboard 5 Req RI EHN 1 2 2 3 Commands from Microprocessor Break off the control board and connect the appro priate outputs of the micro on the connectors J1B Ik Focus T Figure 3 SCREEN TP10 DEMOBOARD EHT TRANSFORMER 3 10 MICROELECTRONICS 9103 66 EPS TDA9103 USER S MANUAL DEMONSTRATION BOARD Figure 4 l gt me O HOLIMS SI 001 86MAd Si End ULV 4 un bed m am 190 In 10 1 el le ElMd 51 1104 Gio Eid Sod 504 Eid bi GS 39 5 pS YALAANI 8 ae 1 fgg Tad 225 226 9 Ed pa o11sap aq pinos P eoq ay asimaylO Alojepuew s g peo ay 6479 6016 MICRO ELECTRONICS 171 GS THOMSON 4 10 TDA9103 USER S MANUAL DEMONSTRATION BOARD Figure 5 To LINE FINAL STAGE SMPS TRANSFORMER V YOKE DIODE MODULATOR mm MONITOR CHASSI
10. e pulse is transmitted to the line transistor by a driver transformer When Q2 is ON HOUT at high level the line transistor is off You will find in annexe the specification of the transformer used on this board Two key points of the spec must be highlighted Leakage inductor lt 2uH this data set the turnoff time of the power transistor Parasitic capacitor lt 50pf a too high value leads to a transmission of a commutation spike to the secondary side and the chassis ground and could make some trouble in the working of the chassis 1 10 TDA9103 USER S MANUAL DEMONSTRATION BOARD This transformer is made with a El core from TDK ref PC30 El22 19 6 Z whose specifications are given in annexe For a proper working this stage is to be loaded by the following circuit Figure 1 Figure 1 BYW98 100 10 1 1 1 5 Vertical Deflection Stage This is the typical application of the TDA8172 used with a symetrical power supply 12V in order to avoid using a high value electrolytic capacitor This stage is designed for driving a yoke with the following characteristics L 5mH R 8Q 11 1 1 6 B Converter The B is generated by a boost step up converter working in current mode The power MOS Q6 starts to conduct at the begin ning of the line sawtooth and it stops when the voltage on R61 image of drain current of the MOS becomes greater than the output voltage of the error amplifier inside the TDA910
11. is output is in fact the flyback generator of the vertical booster TDA8172 It could be used for blanking the videosignal during the frame retrace 11 1 1 8 Operation with Composite Sync When using these standards the board is not driven directly by the sync signals but by a circuit microproc or something else who generates the Hsync and Vsync signals Unfortunately the Hsync signal present generally a jump of phase during the Vsync time This phase jump disturb the line PLL and it can take along time to recover the rightphase at the end of the vertical sync So we have to inhibit the line PLL during the vertical return time and a little later This is done by the diode D4 and the time constant R80 C48 When Vsync is at HIGH level the voltage on pin 35 is high and the line PLL is inhibited The consequenceis that the board will not work with standards having an inverted polarity vertical synchro In this case D4 must be removed or Vsync must be inverted in order to have a correct working of the line PLL SGS THOMSON MICROELECTRONICS TDA9103 USER S MANUAL DEMONSTRATION BOARD 11 1 2 Control Board This board required by the first and quick evalu ation is intended to be separated from the main board for the connection to a monitor when we will use the command from the microprocessor On this board we find 11 potentiometers for the generation of the control voltagesin the range 0 5V use of an external po
12. roducts are not authorized for use as critical components in life support devices or systems without express written approval of SGS THOMSON Microelectronics 1995 SGS THOMSON Microelectronics All Rights Reserved Purchase of Components of SGS THOMSON Microelectronics conveys a license under the Philips PC Patent Rights to use these components in a system is granted provided that the system conforms to the Standard Specifications as defined by Philips SGS THOMSON Microelectronics GROUP OF COMPANIES Australia Brazil China France Germany Hong Kong Italy Japan Korea Malaysia Malta Morocco The Netherlands Singapore Spain Sweden Switzerland Taiwan Thailand United Kingdom U S A 10 10 fi GS THOMSON 74 SES THOMSON
13. wer supply In addition thanks to a small circuit with a monostable generating a pseudo horizontal flyback pulse the demoboard can be used without con necting it to a monitor The width and the delay of the pseudo Hflyback can be adjusted by the trimmers P1 and P2 11 2 Instructions for Use 11 2 1 Stand Alone Mode This demoboardis able to work alone by using The analog command from the control board Apseudo Hflyback from the control board Alocal B regulation The value of B is preset to 100V This value can be be changed by changing the divider R65 R66 Configure the two jumper as following see Fig ure 2 e SW1 position 1 SW2 position 1 Connect the following power supply e 12V between J3 and J19 12V between J21 andJ19 5V between JC4 and JC26 e 45V 2A between J12 and J20 Figure 2 5 SGS THOMSON 9103 63 EPS e 24V between J24 and J20 these power sup plies are only required for SMPS LINE DRIVER and EW amplifier testing Connect the following loads on all the outputs Figure 4 ConnectHsync and Vsync from the pattern gen erator on J2 and J5 respectively 11 2 2 Connection to a Monitor Chassis 1 2 2 1 Analog Command and B Regulation Configure SW1 in position 2 and connectthe board to the chassis see Figure 5 1 2 2 2 Analog Command EHT Regulation Configure SW2 in position 2 connect the board as before and connect the HVFEED inputs with a shielde
14. y the information to the IC with two dedicated tracks The ground track between R61 and IC must carry low value or DC currents as explained in the first paragraph 11 4 2 Avoiding Disturbing Spikes When Q6 switches from ON to OFF the path of the current changes abruptly from Q6 R61 to D3 C25 and this may give rise to parasitic voltages by mutual inductance in all surrounding circuits please refer to the comments about C4 in Vertical section This effect will be minimized if both paths Q6 R61 and D3 C25 are very near to each other in other terms if the loop Q6 R61 C25 R3 has a small area The driver stage for Q6 is similar to the one for Q2 and the high surge currents in its gate may cause parasitic spikes in the same way 111 5 Pincushion E W Section All the comments relative to DAC control of the horizontal DC inputs also apply to the E W section Information furnished is believed to be accurate and reliable However SGS THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No licence is granted by implication or otherwise under any patent or patent rights of SGS THOMSON Microelectronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied SGS THOMSON Microelectronics p
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