PCI-DAS6070 User`s Guide
Contents
1. Pin Signal Name Pin Signal Name 1 LLGND 51 n c 2 CHO IN HI 52 n c 3 CHO IN LO 53 n c 4 CH1 IN HI 54 nic 5 CH1 IN LO 55 n c 6 CH2 IN HI 56 nic 7 CH2 IN LO 57 n c 8 CH3 IN HI 58 nic 9 CH3 IN LO 59 nic 10 CH4 IN HI 60 nic 11 CH4 IN LO 61 nic 12 CH5 IN HI 62 n c 13 CH5 IN LO 63 n c 14 CH6 IN HI 64 nic 15 CH6 IN LO 65 nic 16 CH7 IN HI 66 nic 17 CH7 IN LO 67 n c 18 LLGND 68 n c 19 69 n c 20 n c 70 n c 21 n c 71 n c 22 n c 72 n c 23 n c 73 n c 24 n c 74 n c 25 n c 75 n c 26 n c 76 n c 27 n c 77 n c 28 n c 78 n c 29 n c 79 n c 30 n c 80 n c 31 81 32 82 33 n c 83 n c 34 n c 84 n c 35 AISENSE 85 DIOO 36 D A OUT 0 86 DIO1 37 D A GND 87 DIO2 38 D A OUT1 88 DIO3 39 5 89 0104 40 AUXOUTO D A PACER OUT 90 DIO5 41 AUXOUT1 A D PACER OUT 91 DIO6 42 AUXOUT2 SCANCLK 92 DIO7 43 AUXINO A D CONVERT ATRIG 93 CTR1 CLK 44 D A EXTREF 94 CTR1 GATE 45 AUXIN1 A D START TRIGGER 95 CTR1 OUT 46 AUXIN2 A D STOP TRIGGER 96 GND 47 AUXIN3 D A UPDATE 97 CTR2 CLK 48 AUXIN4 D A START TRIGGER 98 CTR2 GATE 49 AUXIN5 A D PACER GATE 99 CTR2 OUT 50 GND 100 GND 6 12 PCI DAS6070 User s Guide Specifications 16 channel single ended mode Pin Signal2. Figure 4 15 Trigger Positive Slope Trigger Below The acquisition will begin when ATRIG signal fist goes below the THRESH LO level This mode is non retriggerable 2 1 uu Thresh LO Trigger Acquired Data 2 4 Figure 4 16 Trigger Negative Slope 4 10 PCI DAS6070 User s Guide Functional Details Gate Above Data acquisition is enabled whenever ATRIG goes above the THRESH level Acquistion is suspended whenever the ATRIG signal goes below the THRESH Hl level This is a level sensitive gating mode 2 2222 s Thresh HI Trigger Result Figure 4 17 Gate Above Gate Below Data acquisition is enabled whenever ATRIG goes below the THRESH LO level Acquisition 1s suspended whenever the ATRIG signal goes above the THRESH LO level This is a level sensitive gating mode 42 3d e Thresh LO Trigger Acquired Data Lp ccc EET ii Figure 4 18 Gate Below PCI DAS6070 User s Guide Functional Details Gate Negative Hysteresis Data acquisition is enabled whenever ATRIG goes above the THRESH Hl level Acquisition is suspended whenever the ATRIG signal goes below the THRESH LO level The hysteresis level is set by THRESH LO This is a level sensitive gating mode 42 1 Thresh 0 Thresh LO Do Trigger zr we Acquired Dat
3. 32 mA 3 80 V min 4 20 V typ Output low voltage IOL 32 mA 0 55 V max 0 22 V typ Data transfer Programmed I O Power up reset state Input mode high impedance Interrupts Interrupts PCI INTA mapped to IRQn via PCI BIOS at boot time Interrupt enable Programmable through PLX9080 ADC interrupt sources DAQ ACTIVE Interrupt is generated when a DAQ sequence is active software programmable DAQ STOP Interrupt is generated when A D Stop Trigger In is detected DONE Interrupt is generated when sequence completes DAQ FIFO 1 4 FULL Interrupt is generated when ADC FIFO is full DAQ SINGLE Interrupt is generated after each conversion completes DAQ EOSCAN Interrupt is generated after the last channel is converted in multi channel scans EOSEQ Interrupt is generated after each interval delay during multi channel scans DAC interrupt sources DAC ACTIVE Interrupt is generated when DAC waveform circuitry is active software programmable DAC DONE Interrupt is generated when a DAC sequence completes DAC FIFO 1 4 EMPTY Interrupt is generated DAC FIFO is empty DAC HIGH CHANNEL Interrupt is generated when the DAC high channel output is updated 6 8 PCI DAS6070 User s Guide Specifications Counters User counter type 82C54 Number of channels 2 Resolutio
4. 1 84 0 278 1 V 0 737 0 111 500 mV 0 368 0 056 250 mV 0 238 0 032 100 mV 0 111 0 015 50 mV 0 082 0 009 0to 10V 3 68 0 557 0to5V 1 84 0 278 0to2V 0 737 0 111 Otol V 0 368 0 056 0 to 500 mV 0 238 0 032 0 to 200 mV 0 111 0 015 0 to 100 mV 0 082 0 009 Averaged measurements assume dithering and averaging of 100 single channel readings Relative accuracy is defined as the measured deviation from a straight line drawn between measured endpoints of the transfer function ADC resolution noise and front end non linearity are included in this measurement Table 4 Differential non linearity specifications All ranges 0 5 LSB typ 1 0 LSB max 6 3 PCI DAS6070 User s Guide Specifications Settling time Settling time is defined here as the time required for a channel to settle to within a specified accuracy in response to a full scale FS step Two channels are scanned at a specified rate A FS DC signal is presented to Channel 1 a DC signal is presented to Channel 0 Accuracy Condition Range 0 012 0 024 0 098 0 5 LSB 1 0 LSB 4 0 LSB Same range to same 10 2 0 uS 1 5 uS 1 5 uS range Max 3 0 uS 2 0 uS 2 0 uS 5 2 0 uS 1 5 uS 1 3 uS 3 0 uS 2 0 uS 1 5 uS 2 5 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS 1 V Typ 2 0 uS 1 5 uS 0 9 uS Max
5. PCI DAS6070 User s Guide Functional Details DAQ signal timing The DAQ timing signals are SCANCLK A D START TRIGGER A D STOP TRIGGER STARTSCAN SSH A D CONVERT A D PACER GATE A D EXTERNAL TIME BASE A D STOP ATRIG SCANCLK signal SCANCLK is an output signal that may be used for switching external multiplexers It is a 400 ns wide pulse that follows the CONVERT signal after a 50 ns delay This is adequate time for the analog input signal to be acquired so that the next signal may be switched in The polarity of the SCANCLK signal is programmable The default output pin for the SCANCLK signal is AUXOUT2 but any of the AUXOUT pins may be programmed as a SCANCLK output 1 CONVERT 1 SCANCLK 1 ta i tw 50 ns tw 400 ns Figure 4 2 SCANCLK signal timing AID START TRIGGER signal Use the A D START TRIGGER signal for conventional triggering when you only need to acquire data after a trigger event Figure 4 3 shows the A D START TRIGGER signal timing for a conventionally triggered acquisition 1 AID Start Trigger Start Scan Convert N e Scan Counter 4 4 Figure 4 3 Data Acquisition example for conventional triggering The A D START TRIGGER source is programmable and may be set to any of the AUXIN inputs or to the DAQ Sync DS A D START TRIGGER input The polarity of this signal is also programmable to trigger acquisition
6. 1 1 1 1 1 Figure 4 6 Pre triggered data acquisition example The A D STOP TRIGGER signal signifies when the circular buffer should stop and when the specified number of post trigger samples should be acquired It is available as an output and an input By default it 15 available at AUXIN as an input but may be programmed for access at any of AUXIN pins or the DAQ Sync DS A D STOP TRIGGER input It may be programmed for access at any of the AUXOUT pins as an output When using the A D STOP TRIGGER signal as an input the polarity may be configured for either rising or falling edge The selected edge of the A D STOP TRIGGER signal initiates the post triggered phase of a pre triggered acquisition sequence As an output the A D STOP TRIGGER signal indicates the event separating the pre trigger data from the post trigger data The output is an active high pulse with a pulse width of 50 ns Figure 4 7 and Figure 4 8 show the input and output timing requirements for the A D STOP TRIGGER signal 4 5 PCI DAS6070 User s Guide Functional Details Rising Edge Polarity pH Falling Edge Polarity umm t 37 5 ns minimum Figure 4 7 A D STOP TRIGGER input signal timing t 50 ns Figure 4 8 A D STOP TRIGGER output signal timing STARTSCAN signal The STARTSCAN output signal indicates when a scan of channels has been initiated You can program this signal to be available at any
7. EE EE Configurable AUXIN lt 5 0 gt AUXOUT lt 2 0 gt external trigger clocks eene 6 10 DAQ Sync inter board triggers clocks essent ener nennen nnns 6 10 POWER CONSUMPTION cet ree D eg a UR ER BI e ADU A Environmental n b e t e Eso os cies Doe Mechanical DAQ Sync connector and pin out M i connector and tea er tentus Preface About this User s Guide What you will learn from this user s guide This user s guide explains how to install configure and use the PCI DAS6070 so that you get the most out of the analog digital and timing I O features This user s guide also refers you to related documents available on our web site and to technical support resources Conventions in this user s guide For more information on Text presented in a box signifies additional information and helpful hints related to the subject matter you are reading Caution Shaded caution statements present information to help you avoid injuring yourself and others damaging your hardware or losing your data dit Angle brackets that enclose numbers separated by a colon signify a range of numbers such as those assigned to registers bit settings etc bold text Bold text is used for the names of objects on the screen such as buttons text boxes and check boxes For example 1 Insert the disk or CD and click the OK button italic te
8. Indicates end of scan A D CONVERT ADC convert pulse SCANCLK Delayed version of ADC convert CLK clock source D A UPDATE D A update pulse CTR2 CLK CTR2 clock source A D START TRIGGER ADC Start Trigger Out A D STOP TRIGGER ADC Stop Trigger Out A D PACER GATE External ADC gate D A START TRIGGER DAC Start Trigger Out Default selections AUXINO A D CONVERT AUXINI A D START TRIGGER AUXIN2 A D STOP TRIGGER AUXIN3 D A UPDATE AUXINA D A START TRIGGER AUXINS A D PACER GATE AUXOUTO D A UPDATE AUXOUTI A D CONVERT AUXOUT2 SCANCLK Compatibility 5 Edge sensitive polarity Rising falling software selectable Level sensitive polarity Active high active low software selectable Minimum pulse width 3 75 nS DAQ Sync inter board triggers clocks The DAQ Sync bus provides inter board triggering and synchronization capability Five trigger strobe I O pins and one clock pin are provided on a 14 pin header The DAQ Sync signals use dedicated pins Only the direction may be set DAQ Sync signals DS A D START TRIGGER DS A D STOP TRIGGER DS A D CONVERT DS D A UPDATE DS D A START TRIGGER SYNC CLK 6 10 PCI DAS6070 User s Guide Specifications Power consumption 5 0 9 typical 1 1 A max Does not include power consumed through the I O connector 5 V availabl
9. Name Pin Signal Name 1 LLGND 51 n c 2 CHO IN 52 n c 3 CH8 IN 53 n c 4 CH1 IN 54 n c 5 CH9 IN 55 n c 6 CH2 IN 56 n c 7 CH10 IN 57 n c 8 CH3 IN 58 n c 9 CH11 IN 59 n c 10 IN 60 n c 11 CH12 IN 61 n c 12 CH5 IN 62 n c 13 CH13 IN 63 n c 14 CH6 IN 64 n c 15 CH14 IN 65 n c 16 CH7 IN 66 n c 17 CH15 IN 67 n c 18 LLGND 68 n c 19 n c 69 n c 20 n c 70 n c 21 n c 71 n c 22 n c 72 n c 23 n c 73 n c 24 n c 74 n c 25 n c 75 n c 26 n c 76 n c 27 n c 77 n c 28 n c 78 n c 29 n c 79 n c 30 n c 80 n c 31 n c 81 n c 32 n c 82 n c 33 n c 83 n c 34 n c 84 n c 35 AISENSE 85 0100 36 D A OUT 0 86 DIO1 37 D A GND 87 DIO2 38 D A OUT1 88 0103 39 5 89 0104 40 AUXOUTO D A PACER OUT 90 DIO5 41 AUXOUT1 A D PACER OUT 91 DIO6 42 AUXOUT2 SCANCLK 92 DIO7 43 AUXINO A D CONVERT ATRIG 93 CTR1 CLK 44 D A EXTREF 94 CTR1 GATE 45 AUXIN1 A D START TRIGGER 95 CTR1 OUT 46 AUXIN2 A D STOP TRIGGER 96 GND 47 AUXIN3 D A UPDATE 97 CTR2 CLK 48 AUXIN4 D A START TRIGGER 98 CTR2 GATE 49 AUXIN5 A D PACER GATE 99 CTR2 OUT 50 GND 100 GND 6 13 Declaration of Conformity Manufacturer Measurement Computing Corporation Address 10 Commerce Way Suite 1008 Norton MA 02766 USA Category Electrical equipment for measurement control and laboratory use Measurement Computing Corporation declares under sole responsibility that the product PCI DAS6070 to which this decl
10. adjust offset on the final output amplifier The calibration circuits are duplicated for both analog outputs see Figure 5 2 Analog Out Figure 5 2 Analog output calibration elements Chapter 6 Specifications Typical for 25 unless otherwise specified Specifications in italic text are guaranteed by design Analog input A D converter type Successive approximation Maximum sample rate 1 25 MS s Resolution 12 bits 1 in 4096 Number of channels 16 single ended 8 differential software selectable Input ranges Bipolar 10V 5 2 5 1 V 0 5 0 25 0 1 0 05 Unipolar 0 to 10V 0 to 5V 0 to 2V 0 to 0 to 0 5V 0 to 0 2V 0 to 0 1 Software selectable A D pacing Internal counter ASIC Software selectable time base SW programmable Internal 40 MHz 50ppm stability External source via AUXIN lt 5 0 gt software selectable External convert strobe A D CONVERT Software paced Burst mode Software selectable option burst rate 800 nS A D gate sources External digital A D GATE External analog ATRIG input CHO IN through CH15 IN A D gating modes External digital Programmable active high or active low level or edge External analog Refer to Analog trigger on page 7 A D trigger sources External digital A D START TRIGGER A D STOP TRIGGER External analog ATRIG input
11. computer and turn it on If you are using an operating system with support for plug and play such as Windows 2000 or Windows XP a dialog box pops up as the system loads indicating that new hardware has been detected If the information file for this board is not already loaded onto your PC you will be prompted for the disk containing this file The MCC DAQ software contains this file If required insert the Measurement Computing Data Acquisition Software CD and click OK 3 test your installation and configure your board run the nstaCal utility installed in the previous section Refer to the Quick Start Guide that came with your board for information on how to initially set up and load nstaCal Allow your computer to warm up for at least 15 minutes before acquiring data with this board The high speed components used on the board generates heat and it takes this amount of time for a board to reach steady state if it has been powered off for a significant amount of time Configuring the hardware All hardware configuration options on the PCI DAS6070 are software controlled You can select some of the configuration options using nstaCal such as the analog input configuration 16 single ended or eight differential channels the edge used for triggering when using an external pacer and the source for the two independent counters Once selected any program that uses the Universal Library will initialize the hardware according to these
12. drive 5 mA Output short circuit duration Indefinite 25 mA Output coupling DC Output impedance 0 1 ohms max Gain temperature coefficient internal or external 25 ppm C reference Offset temperature coefficient 50 pV C Power up and reset DACS cleared to 0 volts 200 mV max Table 6 Analog output absolute accuracy specifications Range Absolute Accuracy LSB 10 V 1 7 LSB 0to 10 V 2 3 LSB Table 7 Analog output absolute accuracy components specifications Range of Reading Offset Temp Drift Absolute Accuracy at FS mV DegC mV 10V 0 0219 5 93 0 0005 8 127 0to 10V 0 0219 3 49 0 0005 5 685 Each PCI DAS6070is tested at factory to assure the board s overall error does not exceed the limits listed in Table 6 Table 8 Relative accuracy specifications Range Relative Accuracy ranges 0 3 LSB typical 0 5 LSB max Relative accuracy is defined as the measured deviation from a straight line drawn between measured endpoints of the transfer function Table 9 Differential non linearity specifications All ranges 0 3 LSB typical 1 0 LSB max 6 6 PCI DAS6070 User s Guide Specifications Analog output pacing and triggering DAC pacing software programmable Internal counter ASIC Selectable time base nternal 40 MHz E
13. eee ener enne nnne nennen 4 14 D A START TRIGGER signal D A CONVERT NM D A EXTERNAL TIME BASE signal 4 15 General purpose counter signal enne enne ener eene nnne nnns 4 16 CLK M CTRI GATE signal CERT OUT eae edebat M detenti roin CTR CLK CTR2 GATE signal CTR2 OUT Chapter 5 Calibrating the Board ecce ient tenete ette 5 1 Introduction oto tite o Ene Io nettes tutes o eser dre rc thet A ecc LL ceni Calibration theory Chapter 6 Specifications 2 245280 Beha Ceci e See RR Ee aurata hina ah ire et intl e iR D n Settling time ues EE Noise performante PER Analog output Analog output pacing and triggering Analog output external reference input D A EXTREF Analog uk Analog input output Calibration de bd Digital input output Interrupts jeu
14. interface The board s 100 pin I O connector provides six software selectable inputs and three software selectable outputs The signals are user configurable clocks triggers and gates Refer to the DAQ signal timing on page 4 4 for information about these signals and their timing requirements pag g g req Table 4 1 lists all of the possible signals and the default signals you use on the nine pins 4 1 PCI DAS6070 User s Guide Functional Details Table 4 1 Auxiliary I O Signals Type Signal Name Function AUXIN lt 5 0 gt Sources SW selectable A D CONVERT External ADC convert strobe default A D TIMEBASE IN External ADC pacer time base A D START TRIGGER ADC Start Trigger default A D STOP TRIGGER ADC Stop Trigger default A D PACER GATE External ADC gate default D A START TRIGGER DAC trigger gate default D A UPDATE DAC update strobe default D A TIMEBASE IN External DAC pacer time base AUXOUT lt 2 0 gt STARTSCAN A pulse indicating the start of conversion Sources SSH An active signal that negates at the start of the last conversion SW selectable in a scan A D STOP Indicates the end of a scan A D CONVERT ADC convert pulse default SCANCLK Delayed version of ADC convert default CTRI CLK clock source D A UPDATE D A update pulse default CTR2 CLK CTR2 clock sour
15. of the possibility of such damages HM PCI DAS6070 doc ii Trademark and Copyright Information TracerDAQ Universal Library nstaCal Harsh Environment Warranty Measurement Computing Corporation and the Measurement Computing logo are either trademarks or registered trademarks of Measurement Computing Corporation Windows Microsoft and Visual Studio are either trademarks or registered trademarks of Microsoft Corporation LabVIEW is a trademark of National Instruments CompactFlash is a registered trademark of SanDisk Corporation All other trademarks are the property of their respective owners Information furnished by Measurement Computing Corporation is believed to be accurate and reliable However no responsibility is assumed by Measurement Computing Corporation neither for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or copyrights of Measurement Computing Corporation All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form by any means electronic mechanical by photocopying recording or otherwise without the prior written permission of Measurement Computing Corporation Notice Measurement Computing Corporation does not authorize any Measurement Computing Corporation product for use in life support systems and or devices w
16. offers some of the advantages of each mode Using non referenced single ended mode you can still get noise rejection but not the limitation in the number of channels resulting from a fully differential configuration The possible downside is that the external reference input must be the same for every channel It is equivalent to configuring the inputs for differential mode and then tying all of the low inputs together and using that node as the reference input When configured for non referenced single ended input mode 16 analog input channels are available In this mode each input signal is not referenced to the board s ground but to a common reference signal AISENSE The input signal is delivered through three wires The wire carrying the signal to measure connects to CH IN HI The wire carrying the reference signal connects to AISENSE The third wire is connected to LLGND This mode is useful when the application calls for differential input mode but the limitation on channel count prevents it DAQ Sync configuration Multiple boards in the PCI DAS6000 series may be interconnected to synchronize data acquisition or data output To do this order and install a CDS 14 x cable at the DAQ Sync connectors P2 between the boards to be synchronized The x in the CDS 14 x part number identifies the number of connectors available on the cable and therefore the number of boards that may be interconnected Using a CDS 14 2 two PCI DA
17. 13 14 GND The red stripe identifies pin 1 Figure 2 3 CDS 14 3 cable Details on the CDS 14 x cable are available on our web site at www mccdaq com cbicatalog cbiproduct asp dept 1d 104 amp pf 14 1528 Field wiring signal termination and conditioning You can use the following BNC and screw terminal boards to terminate field signals and route them into the PCI DAS6070 using the 100 50 cable BNC 16SE Brings analog signals to standard BNC connectors Designed for boards operating in single ended mode Details on this product are available on our web site at www mccdaq com cbicatalog cbiproduct asp dept id 101 amp pf 14 713 BNC 16DI Brings analog signals to standard BNC connectors Designed for boards operating in differential mode Details on this product are available on our web site at www mccdagq com cbicatalog cbiproduct asp dept 1d 101 amp pf id 714 50 50 pin screw terminal board Two boards are required Details on this product are available on our web site at www mccdag com cbicatalog cbiproduct asp dept id 102 amp pf 14 258 CIO TERM100 100 pin screw terminal board daisy chained 50 pin IDC connectors Details on this product are available on our web site at www mccdaq com cbicatalog cbiproduct asp dept 1d 102 amp pf 1d 281 SCB 50 50 conductor shielded signal connection screw terminal box provides two independent 50 pin connections Details on this product are ava
18. 3 0 uS 2 0 uS 1 0 uS 500 mV Typ 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS 250 mV Typ 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS 100 mV Typ 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS 50 mV Typ 2 0 uS 1 5 uS 1 0 uS Max 3 0 uS 2 0 uS 1 5 uS 0to 10V Typ 2 0 uS 1 5 uS 1 3 uS Max 3 0 uS 2 0 uS 1 5 uS 0to5V Typ 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS 0to2V Typ 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS Otol V Typ 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS 0 to 500 mV Typ 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS 0 to 200 mV Typ 2 0 uS 1 5 uS 0 9 uS Max 3 0 uS 2 0 uS 1 0 uS 0 to 100 mV Typ 2 0 uS 1 5 uS 1 0 uS Max 3 0 uS 2 0 uS 1 5 uS 6 4 PCI DAS6070 User s Guide Specifications Parametrics Max working voltage Input must remain within of ground signal common mode CMRR 60 Hz 10 95 dB 5 0 to 10V 100 dB All other ranges 106 dB Small signal bandwidth all ranges 1 6 MHz Large signal bandwidth all ranges 1 0 MHz Input coupling DC Input impedance 100 Gohm in parallel with 100 pF in normal operation 820 Ohm in powered off or overload condition Input bias current 200 Input offset current 100 Absolute maximum input voltage 25 power 157 power off Protected Inputs IN through CH15 IN AISENSE Crosstalk DC to 100kHz Adjacent Channels 75dB other Channels 90dB Noise performan
19. CHO IN LO 52 2 CHO IN n c 51 1 LLGND PCI slot 2 5 PCI DAS6070 User s Guide Installing the PCI DAS6070 Table 2 3 16 channel single ended mode Signal Name Pin Pin Signal Name GND 100 50 GND CTR2 OUT 99 49 AUXIN5 A D PACER GATE CTR2 GATE 98 48 AUXIN4 D A START TRIGGER CTR2 CLK 97 47 AUXIN3 D A UPDATE GND 96 46 AUXIN2 A D STOP TRIGGER CTR1 OUT 95 45 AUXIN1 A D START TRIGGER CTR1 GATE 94 44 D A EXTREF CTR1 CLK 93 43 AUXINO A D CONVERT ATRIG DIO7 92 42 2 SCANCLK DIO6 91 41 AUXOUTI A D PACER OUT DIO5 90 40 AUXOUTO D A PACER OUT DIO4 89 39 5 DIO3 88 38 D A OUT1 DIO2 87 37 D A GND DIO1 86 36 D A OUT 0 DIOO 85 35 AISENSE 84 34 n c n c 83 33 n c n c 82 32 n c n c 81 31 n c n c 80 30 n c n c 79 29 n c n c 78 28 n c n c 7T 27 n c n c 76 26 n c n c 75 25 n c n c 74 24 n c n c 73 23 n c n c 72 22 n c n c 71 21 n c n c 70 20 n c n c 69 19 n c n c 68 18 LLGND n c 67 17 CH15 IN n c 66 16 CH7 IN n c 65 15 CH14 IN n c 64 14 CH6 IN n c 63 13 CH13 IN n c 62 12 CH5 IN n c 61 11 CH12 IN n c 60 10 CH4 IN n c 59 9 CH11 IN n c 58 8 CH3 IN n c 57 7 CH10 IN n c 56 6 CH2 IN 55 5 CH9 IN n c 54 4 CH1 IN n c 53 3 CH8 IN n c 52 2 CHO IN n c 51 1 LLGND PCI slot 2 6 P
20. CHO IN through CH15 IN A D triggering modes External digital Software configurable for rising or falling edge External analog Refer to Analog trigger on page 7 Pre Post trigger Unlimited number of pre trigger samples 16 Meg post trigger samples ADC pacer out Available at user connector A D PACER OUT RAM buffer size 8 K samples Data transfer DMA Programmed I O DMA modes Demand or non demand using scatter gather Configuration memory Up to 8 K elements Programmable channel gain and offset Streaming to disk rate 1 25 MS s system dependent 6 1 PCI DAS6070 User s Guide Specifications Accuracy 1 25 MS s rate single channel operation and a 15 minute warm up Accuracies listed are for measurements made following an internal calibration They are valid for operational temperatures within 4 calibration temperature and 10 C of factory calibration temperature Calibrator test source high side tied to 1 C of internal Channel 0 high and low side tied to Channel 0 low Low level ground is tied to Channel 0 low at the user connector Table 1 Absolute accuracy specifications Range Absolute Accuracy LSB 10 V 2 9 5 2 1 2 5 3 0 1V 3 0 500 mV 3 0 250 mV 3 1 100 mV 3 3 50 mV 3 7 0to 10 V 2 8 0to5V 4 4 0to2V 4 4 Otol
21. CI DAS6070 User s Guide Installing the PCI DAS6070 Cabling I O connector Strain relief is stamped Pins 1 50 49 50 Pins 1 50 are on the long side of the D connector The red stripe identifies pin 1 Pins 51 100 are on the short side of Strain relief is 51 52 the D connector Stamped Pins 51 100 The red stipe identifies pin 51 Figure 2 1 C100HD50 x Cable Connections Details on the C100HD50 x cable are available on our web site at www mccdaq com cbicatalog cbiproduct asp dept id 104 amp pf 14 1203 aum eo um 2 Figure 2 2 C100MMS x Cable Details on the CIO0MMS x cable are available on our web site at www mcecdaq com cbicatalog cbiproduct asp dept_id l04 amp pf_id 1514 27 PCI DAS6070 User s Guide Installing the PCI DAS6070 DAQ Sync connector and pin out Table 2 4 DAQ Sync connector and cable types Connector type 14 pin right angle 100 mil box header Compatible cable p n CDS 14 x 14 pin ribbon cable for board to board DAQ Sync connection x the number of boards Figure 2 3 shows a CDS 14 3 cable Table 2 5 DAQ sync connector pinout view from top Signal Name Pin Pin Signal Name 5 A D START TRIGGER 1 _2 GND DS A D STOP TRIGGER 3 4 GND DS A D CONVERT 5 6 GND DS D A UPDATE 7 8 GND DS D A START TRIGGER 9 10 GND RESERVED 11 12 GND SYNC CLK
22. Figure 4 33 shows the timing of OUT signal for mode 0 and for mode 2 TC CTR2 CLK a CTR2OUT Mode2 CTR2 OUT Mode 0 Figure 4 33 CTR2 OUT signal timing 4 18 Chapter 5 Calibrating the Board Introduction You should calibrate the board using the nstaCal utility after the board has fully warmed up The recommended warm up time is 15 minutes For best results calibrate the board immediately before making critical measurements The high resolution analog components on the board are somewhat sensitive to temperature Pre measurement calibration ensures that your board is operating with optimum calibration values Calibration theory Analog inputs are calibrated for offset and gain Offset calibration for the analog inputs is performed directly on the input amplifier with coarse and fine trim DACS acting on the amplifier For input gain calibration a precision calibration reference is used with coarse and fine trim DACS acting on the ADC see Figure 5 1 Analog In Gain Calibration ADC Reference Gain Adjust Trim DAC Coarse Trim DAC Fine Trim DAC Coarse Trim DAC Fine Figure 5 1 Analog input calibration basic elements 5 1 PCI DAS6070 User s Guide Calibrating the Board A similar method is used to calibrate the analog output components A trim DAC is used to adjust the gain of the DAC A separate DAC is used to
23. PCI DAS6070 Analog and Digital I O Board User s Guide MEASUREMENT COMPUTING PCI DAS6070 Analog and Digital Board User s Guide A MEASUREMENT COMPUTING Document Revision 2 May 2006 Copyright 2006 Measurement Computing Corporation Your new Measurement Computing product comes with a fantastic extra Management committed to your satisfaction Refer to www mccdaq com execteam html for the names titles and contact information of each key executive at Measurement Computing Thank you for choosing a Measurement Computing product and congratulations You own the finest and you can now enjoy the protection of the most comprehensive warranties and unmatched phone tech support It s the embodiment of our two missions To offer the highest quality computer based data acquisition control and GPIB hardware and software available at the best possible price To offer our customers superior post sale support FREE Whether providing unrivaled telephone technical and sales support on our latest product offerings or continuing that same first rate support on older products and operating systems we re committed to you Lifetime warranty Every hardware product manufactured by Measurement Computing Corporation is warranted against defects in materials or workmanship for the life of the product Products found defective are repaired or replaced promptly Lifetime Harsh Environment Warrant
24. PCI DAS6070 board The PCI DAS6070 board provides eight lines of digital I O and two digital to analog outputs It provides either eight differential or 16 single ended analog inputs with 12 bit resolution Input ranges are either Bipolar or Unipolar Bipolar input ranges are 10V 5V 2 5V 1 0 5V 0 25V 0 1V and 0 05V Unipolar input ranges are 0 to 10V 0 to 5V 0 to 2V 0 to 1V 0 to 0 5V 0 to 0 2V and 0 to 0 1V The input ranges are software selectable The board has nine user configurable trigger clock gate pins that are available at a 100 pin I O connector Six pins are configurable as inputs and three are configurable as outputs Up to five PCI DAS6000 series boards can be interconnected for I O synchronization Five trigger strobes and a synchronizing clock are available on a 14 pin header connector There are five trigger strobes and a synchronizing clock that are provided on a 14 pin header The DAQ Sync signals use dedicated pins Only the direction can be set Interrupts can be generated by up to seven ADC sources and four DAC sources The PCI DAS6070 board contains an 82C54 counter chip which consists of three 16 bit counters Clock gate and output signals from two of the three counters are available on the 100 pin I O connector The third counter is used internally Software features For information on the features of nstaCal and the other software included with your PCI DAS6070 refer t
25. S6000 series boards may be connected together for I O synchronization Using a CDS 14 3 three boards may be synchronized and so on up to five PCI DAS6000 series boards A CDS 14 3 cable is shown in Figure 2 3 on page 2 8 By default all DAQ Sync connectors are configured as inputs slave mode In order to be useful one board must be set through software to serve as the master and the signal sources of the slave boards must be defined 2 3 PCI DAS6070 User s Guide Installing the PCI DAS6070 Detailed information regarding software configuration of these functions is available in the STC Register Map for the PCI DAS 6000 Series This document is available from our web site at www mccdag com registermaps RegMapSTC6000 pdf Connecting the board for I O operations Connectors cables I O connector Table 2 1 lists the board connectors applicable cables and compatible accessory boards Table 2 1 Board connectors cables accessory equipment Connector type Shielded SCSI 100 D Type Compatible Cables C100HD50 x unshielded ribbon cable x or 6 feet Figure 2 1 C100MMS x shielded round cable x 1 2 or 3 meters Figure 2 2 Compatible accessory products with 100 050 cable ISO RACK16 P ISO DA02 P BNC 16SE BNC 16DI 50 100 SCB 50 Compatible accessory products with C1OOMMS x cable SCB 100 2 4 PCI DAS6070 User s Guide Ins
26. V 4 5 0 to 500 mV 4 6 0 to 200 mV 4 8 0to 100 mV 5 2 Table 2 Absolute accuracy components specifications all values Range of Offset Noise Quantization mV Temp Drift Absolute Reading invi Single Pt Averaged1 DegC E a 10 0 0714 6 38 6 10 0 846 0 0010 14 369 5 0 0314 3 20 3 05 0 423 0 0005 5 193 2 5 0 0714 1 61 1 53 0 211 0 0010 3 605 1V 0 0714 0 653 0 610 0 085 0 0010 1 452 500 mV 0 0714 0 335 0 305 0 042 0 0010 0 735 250 mV 0 0714 0 176 0 208 0 024 0 0010 0 379 100 mV 0 0714 0 081 0 098 0 011 0 0010 0 163 50 mV 0 0714 0 049 0 071 0 007 0 0010 0 091 0to 10V 0 0314 3 20 3 05 0 423 0 0005 6 765 0to5V 0 0714 1 61 1 53 0 211 0 0010 5 39 0to2V 0 0714 0 653 0 610 0 085 0 0010 2 167 Otol V 0 0714 0 335 0 305 0 042 0 0010 1 092 0 to 500 mV 0 0714 0 176 0 208 0 024 0 0010 0 558 0 to 200 mV 0 0714 0 081 0 098 0 011 0 0010 0 235 0 to 100 mV 0 0714 0 049 0 071 0 007 0 0010 0 127 Averaged measurements assume dithering and averaging of 100 single channel readings Each PCI DAS6070is tested at the factory to assure the board s overall error does not exceed absolute accuracy limits described in Table 1 6 2 PCI DAS6070 User s Guide Specifications Table 3 Relative accuracy specifications all values are Range Relative Accuracy mV Single Point Averaged 1 10 7 37 1 11 5 3 68 0 557 2 5
27. a 2 1 Figure 4 19 Gate Negative Hysteresis Gate Positive Hysteresis Data acquisition is enabled whenever ATRIG goes below the THRESH LO level Acquisition is suspended whenever the ATRIG signal goes above the THRESH level The hysteresis level 15 set by THRESH HI This is a level sensitive gating mode 2 1 Thresh HI 0 iE Thresh LO DU i Trigger Acquired Data A ope eee ee MM x T Figure 4 20 Gate Positive Hysteresis 4 12 PCI DAS6070 User s Guide Functional Details Gate Inside Window Data acquisition is enabled whenever ATRIG is below the THRESH HI level and above the THRESH LO level Acquisition is suspended whenever the ATRIG signal is outside of this region This is a level sensitive gating mode 2 1 Thresh HI Thresh LO Trigger Acquired Data 2 E asd Figure 4 21 Gate Inside Window Gate Outside Window Data acquisition is enabled whenever ATRIG is above the THRESH HI level or below the THRESH LO level Acquisition is suspended whenever the ATRIG signal is between the THRESH HI and THRESH LO levels This is a level sensitive gating mode ous 1 s Thresh HI Thresh LO Trigger Acquired Data 2 1 2 Figure 4 22 Gate Outside Window 4 13 PCI DAS6070 User s Guide Functi
28. aration relates is in conformity with the relevant provisions of the following standards or other documents EU EMC Directive 89 336 EEC Electromagnetic Compatibility EN 61326 1997 Amendment 1 1998 Emissions Group 1 Class A EN 55011 1990 11 Radiated and Conducted emissions Immunity EN61326 Annex A IEC 1000 4 2 1995 Electrostatic Discharge immunity Criteria A IEC 1000 4 3 1995 Radiated Electromagnetic Field immunity Criteria B IEC 1000 4 4 1995 Electric Fast Transient Burst immunity Criteria A 1000 4 5 1995 Surge immunity Criteria A IEC 1000 4 6 1996 Radio Frequency Common Mode immunity Criteria A IEC 1000 4 11 1994 Voltage Dip and Interrupt immunity Criteria A Tests to IEC 1000 4 8 were not required The PCI boards do not contain components that would be susceptible to magnetic fields Declaration of Conformity based on tests conducted by Chomerics Test Services Woburn MA 01801 USA in June 2004 Test records are outlined in Chomerics Test Report EMI3889 04 We hereby declare that the equipment specified conforms to the above Directives and Standards 2 bre Carl Haapaoja Director of Quality Assurance Measurement Computing Corporation 10 Commerce Way Suite 1008 Norton Massachusetts 02766 508 946 5100 Fax 508 946 9500 E mail info mccdag com www mccdag com
29. ce A D START TRIGGER ADC Start Trigger Out A D STOP TRIGGER ADC Stop Trigger Out D A START TRIGGER DAC Start Trigger Out Default Selections AUXINO A D CONVERT Summary AUXINI A D START TRIGGER AUXIN2 A D STOP TRIGGER AUXIN3 D A UPDATE AUXIN4 D A START TRIGGER AUXINS A D PACER GATE AUXOUTO D A UPDATE AUXOUTI A D CONVERT AUXOUT2 SCANCLK DAQ Sync signals The DAQ Sync hardware provides the capability of triggering or clocking up to four slave boards from a master board to synchronize data input and or output The PCI DAS6070 board provides the capability of inter board synchronization between boards in the PCI DAS6000 family There are five trigger strobes and a synchronizing clock provided on a 14 pin header Table 4 2 lists the available signals Table 4 2 DAQ Sync Signals DS A D START TRIGGER DS A D STOP TRIGGER DS A D CONVERT DS D A UPDATE DS D A START TRIGGER SYNC CLK 4 2 PCI DAS6070 User s Guide Functional Details Except for the SYNC CLK signal the DAQ Sync timing and control signals are a subset of the AUXIO signals available at the 100 pin I O connector These versions of the signals are used for board to board synchronization and have the same timing specifications as their I O connector counterparts Refer to signal timing on page 4 4 for explanations of signals and timing Use the SYNC CLCK signal to determine the master slave configurat
30. ce Table 5 summarizes the noise performance for the PCI DAS6070 Noise distribution is determined by gathering 50 K samples with inputs tied to ground at the user connector Samples are gathered at the maximum specified single channel sampling rate Specification applies to both single ended and differential modes of operation Table 5 Analog input noise performance specifications not including quantization Range Counts LSBrms Counts LSBrms Dithered Dithered Undithered Undithered 10 5 0 5 3 0 25 5 5 0 5 3 0 25 2 5 5 0 5 3 0 25 1V 5 0 5 3 0 25 500 mV 6 0 5 3 0 25 250 mV 6 0 6 4 0 4 100 mV 7 0 7 5 0 5 50 mV 9 0 9 8 0 8 0to 10 V 5 0 5 3 0 25 0to5V 5 0 5 3 0 25 0to2V 5 0 5 3 0 25 Otol V 6 0 5 3 0 25 0 to 500 mV 6 0 6 4 0 4 0 to 200 mV 7 0 7 5 0 5 0 to 100 mV 9 0 9 8 0 8 6 5 PCI DAS6070 User s Guide Specifications Analog output D A converter type Double buffered multiplying Resolution 12 bits 1 in 4096 Number of channels 2 voltage output Voltage range 10 V 0 to 10 V RFF 0 to EXT REF software selectable Monotonicity 12 bits guaranteed Slew rate 20 V us min Settling time full scale step 3 0 uS to 0 5 LSB accuracy Noise 200 u Vrms DC to MHz BW Glitch energy 20 mV 1 5 uS duration measured at mid scale transition Current
31. cete s 2 2 Differential input mode Single ende d input mode Rete eere 2 3 Non referenced single ended input mode sss eene 2 3 Confi Gur att P 2 3 Connecting the board for operations nennen enne nnns 2 4 Connectors cables main I O connector Pinout CONTE COT reet koi ertt RR Re ae vat nua aede t RES Field wiring signal termination and conditioning 2 8 Chapter 3 Programming and Developing Applications 3 1 Programming languages ee ettet e e e Packaged applications programs Register level programming Chapter 4 Functional Details eed e ee due Basic architec ture cose e DIO RERO ATO S Auxiliary input amp output interface DAQ Sync signals signal timing SCANCLK signal A D START TRIGGER signal A D STOP TRIGGER signal STARTSCAN SSH signal A D CONVERT signal AJD PACER GATE amp gn l eda e ettet ia pepe A D EXTERNAL TIME BASE signal een oe heo pee rents 4 8 A D STOP signal es ATRIG sional iv PCI DAS6070 User s Guide Waveform generation timing signals
32. e at I O connector 1 A max protected with a resettable fuse Environmental Operating temperature range 0 to 55 Storage temperature range 20 to 70 C Humidity 0 to 90 non condensing Mechanical Card dimensions PCI half card 174 6 mm L x 106 9 mm W x 11 65 mm H DAQ Sync connector and pin out Connector type 14 pin right angle 100mil box header Compatible cables MCC p n CDS 14 x 14 pin ribbon cable x number of boards 2 5 Pin Signal Name DS A D START TRIGGER GND DS A D STOP TRIGGER GND DS A D CONVERT GND DS D A UPDATE GND NN DS D A START TRIGGER GND RESERVED GND SYNC CLK GND Main connector and pin out Connector type Shielded SCSI 100 D type Compatible cables C100HD50 x unshielded ribbon cable x 3 or 6 feet C100MMS x shielded round cable x 1 2 or 3 meters Compatible accessory products with the 100 50 cable 5 16 ISO DA02 P BNC 16SE BNC 16DI CIO MINISO CIO TERM100 SCB 50 Compatible accessory products with the CIO0MMS x cable SCB 100 PCI DAS6070 User s Guide Specifications 8 channel differential mode
33. e general purpose counter signals are CLK GATE CTRI OUT CTR2 CLK CTR2 GATE CTR2 OUT CTR1 CLK signal The CLK signal can serve as the clock source for independent user counter 1 It can be selected through software at CLK pin rather than using the on board 10 MHz or 100 kHz sources It is also polarity programmable The maximum input frequency is 10 MHz There is no minimum frequency specified Figure 4 28 shows the timing requirements for the CLK signal tp 2100 ns minimum tw H 15 ns minimum tw 7 25 ns minimum Figure 4 28 CTR1 CLK signal timing CTR1 GATE signal You can use GATE signal for starting and stopping the counter saving counter contents etc It is polarity programmable and is available at the CTR1 GATE pin Figure 4 29 shows the minimum timing requirements for GATE signal t d Rising Edge Polarity x bes Falling Edge Polarity ue Hee t 25 ns minimum Figure 4 29 CTR1 GATE signal timing 4 16 PCI DAS6070 User s Guide Functional Details CTR1 OUT signal This signal is present on the CTR1 OUT pin The CTR1 OUT signal is the output of one of the two user s counters in an industry standard 82C54 chip For detailed information on counter operations please refer to the data sheet on our WEB page at http www measurementcomputing com PDFmanuals 82C54 pdf Figure 4 30 shows th
34. e input and output pulse width requirements for the A D CONVERT signal Rising Edge Polarity 1 Falling Edge Polarity tw 37 5 ns minimum Figure 4 11 A D CONVERT signal input timing requirement tw 1 zi tw 50 ns I Figure 4 12 A D CONVERT signal output timing requirement The A D CONVERT signal is generated by the on board pacer circuit unless the external clock option is in use This signal may be gated by hardware A D PACER GATE or software A D PACER GATE signal The A D PACER GATE signal is used to disable scans temporarily This signal may be programmed for input at any of the AUXIN pins If the A D PACER GATE signal is active no scans can occur If the A D PACER GATE signal becomes active during a scan in progress the current scan is completed and scans are then held off until the gate is de asserted 4 7 PCI DAS6070 User s Guide Functional Details A D EXTERNAL TIME BASE signal The A D EXTERNAL TIME BASE signal can serve as the source for the on board pacer circuit rather than using the 40 MHz internal time base Any AUXIN pin can be set programmatically as the source for this signal The polarity is programmable The maximum frequency for the A D EXTERNAL TIME BASE signal is 20 MHz The minimum pulse width is 23 ns high or low There is no minimum frequency specification Figure 4 13 shows the timing specifications for the A D EXTERNAL TIME BASE signal tp 750 n
35. e timing requirements for the OUT signal for counter mode 0 and mode 2 TC CTR1 CLK a EX 4 le CTR1 OUT Mode2 1 CTR1 OUT Mode 0 Figure 4 30 CTR1 OUT signal timing CTR2 CLK signal The CTR2 CLK signal can serve as the clock source for independent user counter 2 It can be selected through software at the CTR2 CLK pin rather than using the on board 10 MHz or 100 kHz sources It is also polarity programmable The maximum input frequency is 10 MHz There is no minimum frequency specified Figure 4 31 shows the timing requirements for the CTR2 CLK signal tp 2100 ns minimum 715 ns minimum tw 7 25 ns minimum Figure 4 31 CTR2 CLK signal timing 4 17 PCI DAS6070 User s Guide Functional Details CTR2 GATE signal You can use the CTR2 GATE signal for starting and stopping the counter saving counter contents etc It is polarity programmable and is available at the CTR2 GATE pin Figure 4 32 shows the timing requirements for the CTR2 GATE signal t Rising Edge Polarity Falling Edge Polarity I 25 ns minimum Figure 4 32 CTR2 GATE signal timing CTR2 OUT signal This signal is present on the CTR2 OUT pin The CTR2 OUT signal is the output of one of the two user s counters in an industry standard 82C54 chip For detailed information on counter operations please refer to the data sheet on our web site at www measurementcomputing com PDFmanuals 82C54 pdf
36. h any electronic device you should take care while handling to avoid damage from static electricity Before removing the PCI DAS6070 from its packaging ground yourself using a wrist strap or by simply touching the computer chassis or other grounded object to eliminate any stored static charge If any components are missing or damaged notify Measurement Computing Corporation immediately by phone fax or e mail Phone 508 946 5100 and follow the instructions for reaching Tech Support Fax 508 946 9500 to the attention of Tech Support Email techsupport a mccdaq com Installing the software Refer to the Quick Start Guide for instructions on installing the software on the Measurement Computing Data Acquisition Software CD This booklet is available in PDF at www mccdag com PDFmanuals DA Q Software Quick Start pdf Installing the hardware The PCI DAS6070 board is completely plug and play There are no switches or jumpers to set Configuration is controlled by your system s BIOS To install your board follow the steps below Install the MCC DAQ software before you install your board The driver needed to run your board is installed with the MCC DAQ software Therefore you need to install the MCC DAQ software before you install your board Refer to the Quick Start Guide for instructions on installing the software 1 Turn your computer off open it up and insert your board into an available PCI slot 2 Close your
37. ilable on our web site at www mecdag com cbicatalog cbiproduct asp dept_id 196 amp pf_id 1168 2 8 PCI DAS6070 User s Guide Installing the PCI DAS6070 You can use the following screw terminal box to terminate field signals and route them into the PCI DAS6070 board using CIO0MMS x cable SCB 100 100 conductor shielded signal connection screw terminal box provides two independent 50 pin connections Details on this product are available on our web site at www mccdaq com cbicatalog cbiproduct asp dept 1d 196 amp pf 1d 1169 For analog signal conditioning and expansion you can use the following signal conditioning accessory products with the 100 050 cable SO RACK 16 P 16 channel ISO 5B module rack for connecting ISO 5B module to an analog input Details on this product are available on our web site at www mcecdag com cbicatalog cbiproduct asp dept_id 127 amp pf_id 1111 SO RACK DAO02 P 2 channel 5B module rack for 50 pin 02 amp 100 pin series detachable terminals are available Details are available on our web site at www mccdaq com cbicatalog cbiproduct asp dept id 128 amp pf 1d 711 2 9 Chapter 3 Programming and Developing Applications After following the installation instructions in Chapter 2 your board should now be installed and ready for use Although the board is part of the larger DAS family in general there may be no correspondence among reg
38. ion of a DAQ Sync enabled system Each system can have one master and up to three slaves SYNC CLK is the 40 MHz time base used to derive all board timing and control The master provides this clock to the slave boards so that all boards in the DAQ sync enabled system are timed from the same clock EXT CTR1 CLK T LN ws CTR1 CLK THRESH LO 8 BIT CTR1GATE USER COUNTER CTR1 OUT A F CTR2 GATE EE CTR2 OUT lis CTR2 CLK EXT CTR2 CLK gt THRESH HI 8 BIT ATRIG gt LOCAL BUS HOLDING REGISTER Analog In Queue ADC DAC ADC 12 Buffer Buffer Buffer 12 BIT 8K 8K 16K EOC 32K x 16 SRAM Calibration DACs D A OUTO DACO 12 BIT MEMORY BUS D A OUT 1 12 BIT 40 MHz Calibration DACs STC i AID CONVERT Y gt gt AD START TRIGGER o gt gt lt p in A D STOP TRIGGER c 70 gt SYSTEM 5 A D PACER GATE gt D 5 AID PACER OUT lt TIMING SCANCLK gt lt lt lt amp 5 piastarT TRIGGER c z amp DIA UPDATE gt gt lt CONTROL a D A PACER OUT lt e 2 8 BIT Boot EEPROM PCI BRIDGE DMA CHO W BUS MASTER DMA CH1 Figure 4 1 Block diagram PCI DAS6070 4 3
39. isters for different boards Software written at the register level for other DAS models will not function correctly with your board Programming languages Measurement Computing s Universal Library provides access to board functions from a variety of Windows programming languages If you are planning to write programs or would like to run the example programs for Visual Basic or any other language please refer to the Universal Library User s Guide available on our web site at www mccdaq com PDFmanuals sm ul user guide pdf Packaged applications programs Many packaged application programs such as SoftWIRE Labtech Notebook and HP VEE now have drivers for your board If the package you own does not have drivers for the board please fax or e mail the package name and the revision number from the install disks We will research the package for you and advise how to obtain drivers Some application drivers are included with the Universal Library package but not with the application package If you have purchased an application package directly from the software vendor you may need to purchase our Universal Library and drivers Please contact us by phone fax or e mail Phone 508 946 5100 and follow the instructions for reaching Tech Support Fax 508 946 9500 to the attention of Tech Support Email techsupport mccdaq com Register level programming You should use the Universal Library or one of the packaged app
40. ithout prior written consent from Measurement Computing Corporation Life support devices systems are devices or systems which a are intended for surgical implantation into the body or b support or sustain life and whose failure to perform can be reasonably expected to result in injury Measurement Computing Corporation products are not designed with the components required and are not subject to the testing required to ensure a level of reliability suitable for the treatment and diagnosis of people iii Table of Contents Preface What you will learn from this user s 1 nennen nennen nnne vi Conventions in this user s guide i Where to find more information vi Chapter 1 Introducing the 6070 Overview PCI DAS6070 features Software Chapter 2 Installing the PCIEDASO070 2 1 What comes with your PCI DAS6070 shipment 2 1 Hardware scia cet ed cipere Cn ete dil Additional documentation Optional components Unpacking the board eie e e RC ERR Inst lling the SoftWare eR Rede the h rdwa areas e ei Configuring the hardware 5 eer n iita t uen
41. lication programs mentioned above to control your board Only experienced programmers should try register level programming If you need to program at the register level you can find more information in the STC Register Map for the PCI DAS6000 Series available at www mccdaq com registermaps RegMapSTC6000 pdf An exception to this is the DAQ Sync capability of these boards that permit synchronized data acquisition by multiple boards in this series 3 1 Chapter 4 Functional Details Basic architecture Figure 4 1 on page 4 3 is a simplified block diagram of the PCI DAS6070 This board provides all of the functional elements shown in the figure The System Timing and Control STC is the logical center for all DAQ DIO and DAC if applicable operations It communicates over two major busses a local bus and a memory bus The local bus carries digital I O data and software commands from the PCI Bus Master There are two Direct Memory Access DMA channels provided for data transfers to the PC Primarily the memory bus carries A D and D A related data and commands There are three buffer memories provided on the memory bus The queue buffer configuration memory stores programmed channel numbers gains and offsets The ADC buffer 8K FIFO First In First Out temporarily stores scanned and converted analog inputs The DAC 16K buffer stores data to be output as analog waveforms Auxiliary input amp output
42. n output on any AUXOUT pin The D A CONVERT input signal polarity is software selectable DAC outputs update within 100 ns of the selected edge The D A CONVERT pulses should be no less than 100 us apart When used as an output the D A CONVERT signal may be used to monitor the pacing of the output updates The output has a pulse width of 225 ns with selectable polarity 4 14 PCI DAS6070 User s Guide Functional Details Figure 4 25 and Figure 4 26 show the input and output timing requirements for the D A CONVERT signal t Rising Edge Polarity __ Falling Edge Polarity Se _ _ tw 37 5 ns minimum Figure 4 25 D A CONVERT input signal timing Figure 4 26 D A CONVERT output signal timing D A EXTERNAL TIME BASE signal The D A EXTERNAL TIME BASE signal can serve as the source for the on board DAC pacer circuit rather than using the internal time base Any AUXIN pin can be set programmatically as the source for this signal The polarity 1 programmable The maximum frequency for the D A EXTERNAL TIME BASE signal is 20 MHz The minimum pulse width is 23 ns high or low There is no minimum frequency specification Figure 4 27 shows the timing requirements for the D A EXTERNAL TIME BASE signal tp 250 ns minimum t 223 ns minimum Figure 4 27 D A EXTERNAL TIME BASE signal timing 4 15 PCI DAS6070 User s Guide Functional Details General purpose counter signal timing Th
43. n 16 bits Compatibility 5 CTRn base clock source software selectable Internal 10 MHz internal 100 kHz or external connector CTRn CLK Internal 10 MHz clock source stability 50 ppm Counter n gate Available at connector CTRn GATE Counter n output Available at connector CTRn OUT Clock input frequency 10 MHz max High pulse width clock input 15 ns min Low pulse width clock input 25 ns min Gate width high 25 ns min Gate width low 25 ns min Input low voltage 0 8 V max Input high voltage 2 0 V min Output low voltage 0 4 V max Output high voltage 3 0 V min 6 9 PCI DAS6070 User s Guide Specifications Configurable AUXIN lt 5 0 gt AUXOUT 2 0 external trigger clocks The PCI DAS6070provides nine user configurable trigger clock pins available at the 100 pin I O connector Of these six are configurable as inputs while three are configurable as outputs AUXIN lt 5 0 gt sources software selectable A D CONVERT External ADC convert strobe A D TIMEBASE IN External ADC pacer timebase A D START TRIGGER ADC Start Trigger A D STOP TRIGGER ADC Stop Trigger A D PACER GATE External ADC gate D A START TRIGGER DAC trigger gate D A UPDATE DAC update strobe D A TIMEBASE IN External DAC pacer time base AUXOUT lt 2 0 gt sources STARTSCAN A pulse indicating start of conversion software selectable SSH Active signal that terminates at the start of the last conversion in a scan A D STOP
44. o the Quick Start Guide that shipped with your device The Quick Start Guide is also available in PDF at www mccdaq com PDFmanuals DAQ Software Quick Start pdf Check www mccdag com download htm for the latest software version or versions of the software supported under less commonly used operating systems Chapter 2 Installing the PCI DAS6070 What comes with your PCI DAS6070 shipment The following items are shipped with the PCI DAS6070 Hardware PCI DAS6070 Additional documentation In addition to this hardware user s guide you should also receive the Quick Start Guide available in PDF at www mccdaq com PDFmanuals DA Q Software Quick Start pdf This booklet supplies a brief description of the software you received with your PCI DAS6070 and information regarding installation of that software Please read this booklet completely before installing any software or hardware Optional components If you ordered any of the following products with your board they should be included with your shipment Cables amp v C100HD50 x C100MMS x CDS 14 x Signal termination and conditioning accessories MCC provides signal termination products for use with the PCI DAS6070 Refer to the Field wiring signal termination and conditioning section on page 2 8 for a complete list of compatible accessory products 2 1 PCI DAS6070 User s Guide Installing the PCI DAS6070 Unpacking the board As wit
45. of the AUXOUT pins The STARTSCAN output signal is a 50 ns wide pulse the leading edge of which indicates the start of a channel scan tw tw 50 ns Figure 4 9 STARTSCAN start of scan timing SSH signal The SSH signal can be used as a control signal for external sample hold circuits The SSH signal is a programmable polarity pulse that is asserted throughout a channel scan The state of this signal changes after the start of the last conversion in the scan The SSH signal may be routed via software selection to any of the AUXOUT pins Figure 4 10 shows the timing for the SSH signal Start Pulse CONVERT Si i 1 1 SSH i 1 10 ns minimum tors Figure 4 10 SSH Signal Timing 4 6 PCI DAS6070 User s Guide Functional Details A D CONVERT signal The A D CONVERT signal indicates the start of an A D conversion It is available through software selection as an input to any of the AUXIN pins defaulting to AUXINO or the DAQ Sync DS A D CONVERT input and as an output to any of the AUXOUT pins When used as an input the polarity is software selectable The A D CONVERT signal starts an acquisition on the selected edge The convert pulses must be separated a minimum of 0 8 us to remain within the 1 25 MS s conversion rate specification Refer to Figure 4 3 page 4 4 and Figure 4 6 page 4 5 for the relationship of A D CONVERT to the DAQ sequence Figure 4 11 and Figure 4 12 show th
46. og trigger levels ATRIG input 10V CHO IN through CH15 IN Full scale range dependent Analog trigger modes External analog Software configurable for Positive or negative slope Analog gate modes External analog Software configurable for Above or below reference Positive or negative hysteresis In or out of window Resolution 8 bits 1 in 256 Accuracy 5 full scale range max Bandwidth 3 dB ATRIG input 1 3 MHz 2 0 MHz CHO IN through CH15 IN 6 7 PCI DAS6070 User s Guide Specifications Analog input output calibration Recommended warm up time 15 minutes Calibration Auto calibration calibration factors for each range stored on board in non volatile RAM Onboard calibration reference DC Level 5 000 V 2 5 mv Actual measured values stored in EEPROM Tempco 5 ppm C max 2 ppm C typical Long term stability 20ppm T 1000 hrs non cumulative Calibration interval 1 year Digital input output Digital type Discrete 5V TTL compatible Number of I O 8 Configuration 8 bits independently programmable for input or output All pins pulled up to 5 V via 47 K resistors default Positions available for pull down to ground Hardware selectable via solder gap Input high voltage 2 0 V min 7 0 V absolute max Input low voltage 0 8 V max 0 5 V absolute min Output high voltage
47. onal Details Waveform generation timing signals The signals that control the timing for the analog output functions on the PCI DAS6052 are D A START TRIGGER D A UPDATE D A EXTERNAL TIME BASE D A START TRIGGER signal The D A START TRIGGER signal is used to hold off output scans until after a trigger event The DAQ Sync DS D A START TRIGGER input or any AUXIN pin can be programmed to serve as the D A START TRIGGER signal It is also available as an output on any AUXOUT pin When used as an input the D A START TRIGGER signal may be software selected as either a positive or negative edge trigger The selected edge of the D A START TRIGGER signal causes the DACs to start generating the output waveform The D A START TRIGGER signal can be used as an output to monitor the trigger that initiates waveform generation The output is an active high pulse having a width of 50 ns Figure 4 23 and Figure 4 24 show the input and output timing requirements for the D A START TRIGGER signal Rising Edge Polarity NEN o Falling Edge Polarity j tw 37 5 ns minimum Figure 4 23 D A START TRIGGER input signal timing tw tw 50 ns Figure 4 24 D A START TRIGGER output signal timing D A CONVERT signal The D A CONVERT signal causes a single output update on the D A converters You can program the DAQ Sync DS D A UPDATE input or any AUXIN pin to accept the D A CONVERT signal It is also available as a
48. s minimum tw 23 ns minimum Figure 4 13 A D EXTERNAL TIME BASE signal timing A D STOP signal The A D STOP signal indicates a completed acquisition sequence You can program this signal to be available at any of the AUXOUT pins The A D STOP output signal is a 50 ns wide pulse whose leading edge indicates a DAQ done condition t 50 ns Figure 4 14 A D STOP Signal Timing 4 8 PCI DAS6070 User s Guide Functional Details ATRIG signal In addition to standard digital trigger features the PCI DAS6070 also provides analog triggering capability When using the analog trigger acquisitions may be started and controlled via an analog signal There are four trigger gate modes available using the analog trigger feature Trigger positive or negative slope Gate above reference or below reference Hysteresis positive or negative hysteresis Window inside or outside window The Trigger mode is used to start an acquisition sequence The remaining modes provide gating functions during an acquisition sequence which start and stop the acquisition based on the gate condition There are two possible inputs for the analog trigger source The first is the AUXINO ATRIG pin on the 100 pin I O connector This is a software selectable dual purpose pin that supports either digital or analog trigger inputs The source selection defaults to analog trigger on power up and may be modified at any time using InstaCal The inpu
49. s on either the positive or negative edge The A D START TRIGGER signal is also available as an output and can be programmed to appear at any of the AUXOUT outputs See Figure 4 4 and Figure 4 5 for A D START TRIGGER input and output timing requirements 44 PCI DAS6070 User s Guide Functional Details tw I4 Rising Edge Polarity Falling Edge Polarity t 37 5 ns minimum Figure 4 4 A D START TRIGGER input signal timing tw tw 50 ns Figure 4 5 A D START TRIGGER output signal timing The A D START TRIGGER signal is also used to initiate pre triggered DAQ operations when you need to acquire data just before a trigger event In most pre triggered applications the A D START TRIGGER signal is generated by a software trigger The use of A D START TRIGGER and A D STOP TRIGGER in pre triggered DAQ applications is explained next A D STOP TRIGGER signal Pre triggered data acquisition continually acquires data into a circular buffer until a specified number of samples have been collected after the trigger event Figure 4 6 illustrates a typical pre triggered DAQ sequence AID Stop Trigger DEREN DENS Start Scan Ts convert d ww 07 Scan Counter 3 12 1 10 13 12 1 0 53 12 1 AID Start Trigger iier MM deett I 1 1 1 1 1 1 1 Don t cart
50. selections 2 2 PCI DAS6070 User s Guide Installing the PCI DAS6070 Following 15 an overview of the available hardware configuration options for this board There is additional general information regarding analog signal connection and configuration in the Guide to Signal Connections available on our web site at www measurementcomputing com signals signals pdf Differential input mode When all channels are configured for differential input mode eight analog input channels are available In this mode the input signal is measured with respect to the low input The input signal is delivered through three wires The wire carrying the signal to be measured connects to CH IN HI The wire carrying the reference signal connects to CH IN LO The third wire is connected to LLGND Differential input mode is the preferred configuration for applications in noisy environments or when the signal source is referenced to a potential other than PC ground Single ended input mode When all channels are configured for single ended input mode 16 analog input channels are available In this mode the input signal is referenced to the board s signal ground LLGND The input signal is delivered through two wires The wire carrying the signal to be measured connects to CH IN HI The other wire is connected to LLGND Non referenced single ended input mode This mode is a compromise between differential and single ended modes It
51. t range on the ATRIG pin is always 10V 8 bit DACs are used to set the hi and lo levels for the threshold s The threshold resolution in this mode is 78mV per step Caution Remove all analog inputs before configuring this pin as a digital input Any voltage levels above 15V in this configuration may cause damage to the product The post gain version of any one of the 16 analog inputs may also be used as the analog trigger source In this mode the voltage present on the first channel in the scan may be used initiate the acquisition sequence Since the input to the analog trigger circuit has been scaled by the selected range the effective resolution of the thresholds is equal to the full scale range divided by 4096 For example the 2 5V range allows for 5V 4096 or 1 2 mV of threshold resolution The following is a detailed description of each mode of operation In each case a 2V triangle waveform is used the ATRIG input source The THRESH Hl is set to 1 0V and the THRESH LO signal is set to 1 0V In the following analog trigger signal diagrams the bold portion of the waveform indicates the data acquired for the given ATRIG mode 4 9 PCI DAS6070 User s Guide Functional Details Trigger Above The acquisition will begin when the ATRIG signal first goes above the THRESH HI This mode is non retriggerable dots 1 _ Thresh HI Trigger Acquired Data 2 1
52. talling the PCI DAS6070 Signal Name Pin Pin Signal Name Pinout I O GND 100 50 GND CTR2 OUT 99 49 AUXIN5 A D PACER GATE connector CTR2 GATE 98 48 AUXIN4 D A START TRIGGER CTR2 CLK 97 47 AUXIN3 D A UPDATE Table 2 2 GND 96 46 AUXIN2 A D STOP TRIGGER 8 channel differential mode CTR1 OUT 95 45 AUXIN1 A D START TRIGGER CTR1 GATE 94 44 D A EXTREF CTR1 CLK 93 43 AUXINO A D CONVERT ATRIG DIO7 92 42 AUXOUT2 SCANCLK DIO6 91 41 AUXOUT1 A D PACER OUT DIO5 90 40 AUXOUTO D A PACER OUT DIO4 89 39 5 DIO3 88 38 D A OUT1 DIO2 87 37 D A GND DIO1 86 36 D A OUTO DIOO 85 35 AISENSE nic 84 34 n c 83 33 n c n c 82 32 n c n c 81 31 n c n c 80 30 n c n c 79 29 n c n c 78 28 77 27 n c n c 76 26 n c n c 75 25 n c n c 74 24 n c n c 73 23 n c n c 72 22 n c n c 71 21 n c n c 70 20 n c n c 69 19 n c n c 68 18 LLGND n c 67 17 CH7 INLO n c 66 16 CH7 IN HI n c 65 15 CH6 INLO n c 64 14 CH6 IN HI n c 63 13 CH5 IN LO nic 62 12 CH5 IN HI n c 61 11 CH4 IN LO n c 60 10 IN HI n c 59 9 CH3 INLO n c 58 8 CH3 IN HI n c 57 7 CH2 IN LO n c 56 6 CH2 IN HI n c 55 5 CH1 IN LO n c 54 4 CH1 IN HI n c 53 3
53. xt Italic text is used for the names of manuals and help topic titles and to emphasize a word or phrase For example The nstaCal amp installation procedure is explained in the Quick Start Guide Never touch the exposed pins or circuit connections on the board Where to find more information The following electronic documents provide helpful information relevant to the operation of the PCI DAS6070 MCC s Specifications PCI DAS6070 the PDF version of the Electrical Specification Chapter in this guide is available on our web site at www mccdaq com pdfs PCI DAS6070 pdf MCC s Quick Start Guide is available on our web site at www mccdaq com PDFmanuals DAQ Software Quick Start pdf MCC s Guide to Signal Connections is available on our web site at www mcecdag com signals signals pdf MCC s Universal Library User s Guide is available on our web site at www mccdaq com PDFmanuals sm ul user guide pdf MCC s Universal Library Function Reference is available on our web site at www mccdaq com PDFmanuals sm ul functions pdf Universal Library for LabVIEW User s Guide is available on our web site at www mcedaq com PDFmanuals SM UL LabVIEW pdf PCI DAS6070 User s Guide this document is also available on our web site at www mcecdag com PDFmanuals PCI DAS6070 pdf vi Chapter 1 Introducing the PCI DAS6070 Overview PCI DAS6070 features This manual explains how to install and use the
54. xternal source via AUXIN lt 5 0 gt SW selectable External convert strobe D A UPDATE Software paced DAC gate source software programmable External digital D A START TRIGGER External analog ATRIG input CHO IN through CH15 IN Software gated DAC gating modes External digital Programmable active high or active low level or edge External analog Refer to Analog trigger below DAC trigger sources External digital D A START TRIGGER External analog ATRIG input CHO IN through CH15 IN Software triggered DAC triggering modes External digital Software configurable for rising or falling edge External analog Refer to Analog trigger below DAC pacer out Available at user connector D A PACER OUT RAM buffer size 16 K samples Data transfer DMA Programmed I O Update DACs individually or simultaneously software selectable DMA modes Demand or non demand using scatter gather Waveform generation 1 MS s max per channel 2 channels simultaneous throughput Analog output external reference input D A EXTREF Range 11V Overvoltage protection 25 V powered on 15 V powered off Input impedance 10 k ohms Bandwidth 3 dB 1 MBz Gain error EXTREF mode 0 to 0 5 not adjustable Analog trigger Analog trigger sources Software selectable External ATRIG input CHO IN through CH15 IN first channel in scan Anal
55. y We will replace any product manufactured by Measurement Computing Corporation that is damaged even due to misuse for only 50 of the current list price I O boards face some tough operating conditions some more severe than the boards are designed to withstand When a board becomes damaged just return the unit with an order for its replacement at only 50 of the current list price We don t need to profit from your misfortune By the way we honor this warranty for any manufacturer s board that we have a replacement for 30 Day Money Back Guarantee You may return any Measurement Computing Corporation product within 30 days of purchase for a full refund of the price paid for the product being returned If you are not satisfied or chose the wrong product by mistake you do not have to keep it Please call for an RMA number first No credits or returns accepted without a copy of the original invoice Some software products are subject to a repackaging fee These warranties are in lieu of all other warranties expressed or implied including any implied warranty of merchantability or fitness for a particular application The remedies provided herein are the buyer s sole and exclusive remedies Neither Measurement Computing Corporation nor its employees shall be liable for any direct or indirect special incidental or consequential damage arising from the use of its products even if Measurement Computing Corporation has been notified in advance
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