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DM406/DM5406 User`s Manual - RTD Embedded Technologies, Inc.

1. INTERRUPT SELECT PULL UP DOWN RESISTORS PC BUS VO CONNECTOR PACER CLOCK SELECT ADDRESS ADDRESS DE RANGE AOUT 1 12 BIT SELECT D A 5 VOLTS CONVERTER 0 TO 5 VOLTS AOUT 2 0 TO 10 VOLTS l 12 VOLTS I 1 5 VOLTS DC DC l CONVERTER 15 VOLTS I 12 VOLTS H DM5406 ONLY a 5 VOLTS Fig 3 1 406 5406 Block Diagram A D Conversion Circuitry The DM406 and DM5406 perform analog to digital conversions on up to 8 differential or 16 single ended software selectable analog input channels The following paragraphs describe the A D circuitry Analog Inputs The input voltage range is jumper selectable for 5 to 5 volts 10 to 10 volts or O to 10 volts Software programmable binary gains of 1 2 4 and 8 let you amplify lower level signals to more closely match the module s input ranges Overvoltage protection to 35 volts is provided at the inputs A D Converter The AD678 12 bit successive approximation A D converter accurately digitizes dynamic input voltages in 5 microseconds for a maximum throughput rate of 200 kHz for the converter alone The AD678 contains a sample and hold amplifier a 12 bit A D converter a 5 volt reference a clock and a digital interface to provide a complete A D conversion function on a single chip Its low power CMOS logic combined with a high precision low noise design give you accurate results Conversions are initiated throu
2. Channel 1 1 mask 10 Channel 2 11 Channel 3 4 24 DMA Mode Register The DMA mode register is used to set parameters for the DMA channel you will be using The read write bits are self explanatory the read mode cannot be used with the 406 5406 Autoinitialization allows the DMA controller to automatically start over once it has transferred the requested number of bytes Decrement means the DMA controller should decrement its offset counter after each transfer the default is increment You can use either the demand or single transfer mode when transferring data The demand mode transfers data to the PC on demand for fastest transfer rate The single transfer mode forces the DMA controller to relinquish every other cycle so that the processor can take care of other tasks VO Port OBH AA T dz Channel Select Autoinitialization Transfer Mode 00 demand 00 Channel 0 01 single transfer 0 disable 01 Channel 1 10 block 1 enable 10 Channel 2 11 cascade 11 Channel 3 Offset Counter l 0 increment Read Write 1 decrement 01 write 10 read not used with 406 5406 Programming the DMA Controller To program the DMA controller follow these steps 1 Clear the byte pointer flip flop 2 Disable DMA on the channel you are using 3 Write the DMA mode register to choose the DMA parameters 4 Write the LSB of the page offset of your buffer 5 Write the MSB of the page offset of your buffer
3. DMA Flow Diagram Figure 4 9 This flow diagram shows you how to take samples and transfer the data directly into the computer s memory You can use DMA channel 1 or 3 to transfer data to the computer s memory The pacer clock can be used to set the sampling interval Program 8255 PPI Port B out Clear Registers Reset Program 8254 TCO amp TC1 for desired transfer rates Select Channel amp Gain Program DMA Controller Enable DMA amp External Trigger DMA Done 1 Stop Program Fig 4 9 DMA Flow Diagram 4 32 Interrupts Flow Diagram Figure 4 10 This flow diagram shows you how to program an interrupt routine for your 406 5406 The diagram parallels the interrupts discussion included earlier in this chapter You can use this diagram in conjunction with the detailed text in this chapter to develop an interrupt program for your module Clear Board Save startup IMR value Select IRQ source Save startup interrupt vector Clear IRQ bit in IMR Set IRQ bit in IMR Body of user program Vector new interrupt service Restore startup routine ISR interrupt vector Program interrugt Restore startup source IMR value Fig 4 10 Interrupts Flow Diagram Stop Program 4 33 D A Conversion Flow Diagram Figure 4 11 This flow diagram shows you how to generate a voltage output through the D A converter A conversion is initiated each time the high byte MSB is written to the D A
4. This header connector shown in Figure 1 7 lets you select the analog input voltage range and polarity The range is set by placing a jumper across the pair of pins labeled 20V giving you a 20 volt range or by placing a jumper across the pair of pins labeled 10V giving you a 10 volt range The polarity is selected by placing a jumper across the pins labeled UNI for 0 to 10 volts or BI for 5 or 10 volts Note that when you place a jumper across 20V you must place a second jumper across BI 10 volts The UNI polarity cannot be used with the 20 volt input range Figure 1 7 shows the three possible input voltage configurations N ac N c N c zz zu zz 2 2220 P6 P6 ES Fig 1 7a 5 to 5 volts Fig 1 7b 10 to 10 volts Fig 1 7c 0 to 10 volts Factory Setting Fig 1 7 Analog Input Range and Polarity Jumper P6 P7 Single Ended Differential Analog Inputs Factory Setting Single Ended This header connector shown in Figure 1 8 configures the 406 5406 for 8 differential or 16 single ended analog input channels When operating in the single ended mode three jumpers must be installed across the S pins When operating in the differential mode the jumpers must be installed across the D pins DO NOT install jumpers across both S and D pins at the same time P7 DU OO O DM O MD Fig 1 8 Single Ended Differential Analog Input Signal Type Jumpers P7 P8 DAC 1 Output Voltage Range Factory Setting 5 to 5 volts Th
5. dae er ICC ex soo Lm aw mm few 0 52 OM 296 smo BEE sw 81250 5 6 APPENDIX A 406 5406 SPECIFICATIONS A 2 406 5406 Characteristics Typical e 25 C Interface Switch selectable base address I O mapped Jumper selectable interrupts amp DMA channel Analog Input 8 differential or 16 single ended inputs Input impedance each channel ee ee Re ee Re Ee ee gt 10 megohms Gains software selectable oooooccccccnnnnnanananananonancnnnnnnnnnnnnonononononnnnnnnnnnnnnnos 1 2 4 amp 8 Gai in vet reds in roce dete eda PA 05 typ 0 25 max Irip t ranges em eene ty ete te ase ERES 5 10 or O to 10 volts Overvoltage protection ee ee RA Re ee AR conc nn ono ee Re aran ee 35 Vdc Common mode input voltage 0 esse sees ee ee RR ee ee Re ee ge 10 volts max Settling time gali 9 1 airada Been nt 5 usec max A D Converter EE N ENE N N EE EN AD678 PYPE scient td lacio etes Successive approximation Resol tlOn se tna ita 12 bits 2 44 mV 10V 4 88 mV 20V Linearity eee ge YT ees Inh 1 bit typ Conversion A O A 5 usec typ RE deere ale Le baton tad i tet boites ADA ett ted 100 kHz Pacer Clock Range using on board 8 MHZ clock ees ee ee ee ee ee 9 minutes to 5 usec Digital I O RR N a CMOS 82C55 Number of lines cia a c Re ate Ge Perle EE da 16 Logic compatibility iii NBA han a ete eier TTL CMOS Configurable with optional VO pull up pull dow
6. 3 bits DO through D3 Scanning continues until stopped For ex ample by programming channel 3 at BA 5 and four channels at BA 3 the scan will be 3 4 5 6 3 4 5 6 3 until stopped Figure 4 4 shows a diagram of this mode When using channel scan you must set bits D6 and D7 at BA 3 for the scan mode Conversions can be performed through software or using the pacer clock Use automatic channel scan when you want to continuously sample a sequence of channels Since the channel counter is automatically incremented after each conversion this mode is faster and easier than using the single conversion mode and setting the channel for each conversion from software See the SCAN program in BASIC on the example programs disk included with your board 4 14 START CONVERT PAcERcLock JL F1 TL TL TL TL TL TL SL _ SAMPLE TAKEN l 1 1 1 1 1 1 1 1 SAMPLED CHANNEL 2 3 4 5 2 3 4 5 2 Fig 4 4 Timing Diagram Channel Scanning Programmable Burst In this mode a sequence of channels from 2 to 16 is scanned a single time at the burst clock rate each time a burst trigger is applied The starting channel is the channel specified at BA 5 The number of channels to be scanned is specified at BA 3 When using burst you must set bits D6 and D7 at BA 3 for the burst mode A burst can be triggered using the Start Convert command at BA 0 or by the hardware source exter nal trigger timer counter out 2 or external gate 2
7. 6 Write the LSB of the number of bytes to transfer 7 Write the MSB of the number of bytes to transfer 8 Enable DMA on the channel you are using Programming the 406 5406 for DMA Once you have set up the DMA controller you must program the module for DMA The following steps list this procedure 1 Set up the 8255 PPI for Port B output 2 Set up the timer counters for the desired transfer rate 3 Enable DMA and external trigger 4 Monitor DMA done bit NOTE If the DMA is set up in the single transfer mode each DMA transfer takes two read cycles to com plete Therefore in single transfer you can run the module at speeds up to about 100 kHz so the DMA transfer rate can keep up with the board s conversion rate Rates faster than 100 kHz even in the demand mode may give unreliable results Monitoring for DMA Done There are two ways to monitor for DMA done The easiest is to poll the DMA done bit in the 406 5406 status register BA 0 While DMA is in progress the bit is clear 0 When DMA is complete the bit is set 1 The second way to check is to use the DMA done signal to generate an interrupt An interrupt can immediately notify your program that DMA is done and any actions can be taken as needed Both methods are demonstrated in the sample C and Pascal programs the polling method in the program named DMA and the interrupt method in DMASTR 4 25 Common DMA Problems Make sure that your buffer is large en
8. D1 DO Clearing the Board It is good practice to start your program by resetting the 406 5406 Y ou can do this by writing to the RESET port at BA 2 The value you write to this port is irrelevant After resetting the board following power up you must take an A D reading and throw it away to make sure the converter is initialized and contains no unwanted data Selecting a Channel To select a conversion channel or the starting channel for a scan or burst you must assign values to bits O through 3 in the PPI Port B port at BA 5 The table below shows you how to determine the bit settings Channels 9 16 are available in single ended operation only Note that if you do not want to change the gain setting also programmed through BA 5 you must preserve it when you set the channel oue ese To ont cus comal vss cur Tem Tom 1 4 12 Setting the Gain You may choose among the various levels of programmable gain by setting bits 4 and 5 in the PPI Port B port BA 5 The table below shows you how to determine the bit settings for the gain you need Note that if you do not want to change the channel setting also programmed through BA 5 you must preserve it when you set the gain Enabling and Disabling the External Trigger The external trigger enable bit at BA 5 enables the A D trigger source When this bit is enabled in the scan mode A D conversions are controlled by the on board or external pacer clock depending
9. 10010011 147 Output Output input 10011001 153 Input Output 10011010 Input input 10011011 155 OB 9 input input Input Input Input Input Output Output Input Input Output 10010010 Input Input Output When bit 7 of the PPI control word is set to O a write can be used to individually program the Port C lines D7 D6 Ds D4 Da D2 D1 Do Set Reset Bit Set Reset Function Bit 0 set bit to 0 0 active Bit Select 1 set bit to 1 000 PCO 001 PC1 010 PC2 011 PC3 100 PC4 101 PC5 110 PC6 1112 PC7 4 7 For example if you want to set Port C bit O to 1 you would set up the control word so that bit 7 is 0 bits 1 2 and 3 are 0 this selects PCO and bit 0 is 1 this sets PCO to 1 The control word is set up like this 0 X X X 0 0 0 1 Sets PCO to 1 written to BA 7 Set Reset Function Bit X don t care Set PCO Bit Select 000 PCO BA 8 8254 Timer Counter 0 Read Write A read shows the count in the counter and a write loads the counter with a new value Counting begins as soon as the count is loaded This counter is cascaded with TC1 to form the 32 bit on board pacer clock BA 9 8254 Timer Counter 1 Read Write A read shows the count in the counter and a write loads the counter with a new value Counting begins as soon as the count is loaded This counter is cascaded with TCO to
10. ARE LIMITED TO THE DURATION OF THIS WARRANTY IN THE EVENT THE PRODUCT IS NOT FREE FROM DEFECTS AS WARRANTED ABOVE THE PURCHASER S SOLE REMEDY SHALL BE REPAIR OR REPLACEMENT AS PROVIDED ABOVE UNDER NO CIRCUMSTANCES WILL REAL TIME DEVICES BE LIABLE TO THE PURCHASER OR ANY USER FOR ANY DAMAGES INCLUDING ANY INCIDENTAL OR CONSEQUENTIAL DAM AGES EXPENSES LOST PROFITS LOST SAVINGS OR OTHER DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PRODUCT SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL OR CONSE QUENTIAL DAMAGES FOR CONSUMER PRODUCTS AND SOME STATES DO NOT ALLOW LIMITA TIONS ON HOW LONG AN IMPLIED WARRANTY LASTS SO THE ABOVE LIMITATIONS OR EXCLU SIONS MAY NOT APPLY TO YOU THIS WARRANTY GIVES YOU SPECIFIC LEGAL RIGHTS AND YOU MAY ALSO HAVE OTHER RIGHTS WHICH VARY FROM STATE TO STATE D 3
11. Bypassing the processor in this way allows very fast transfer rates All PCs contain the necessary hardware components for accomplishing DMA However software support for DMA is not included as part of the BIOS or DOS leaving you with the task of programming the DMA controller yourself With a little care such programming can be successfully and efficiently achieved The following discussion is based on using the DMA controller to get data from a peripheral device and write it to memory The opposite can also be done the DMA controller can read data from memory and pass it to a periph eral device There are a few minor differences mostly concerning programming the DMA controller but in general the process is the same The following steps are required when using DMA Choose a DMA channel Allocate a buffer Calculate the page and offset of the buffer Set the DMA page register Program the DMA controller Program device generating data 406 5406 Wait until DMA is complete Disable DMA PO ANNE BN Fach step is detailed in the following paragraphs Choosing a DMA Channel There are a number of DMA channels available on the PC for use by peripheral devices The DM406 and DM5406 can use either DMA channel 1 or DMA channel 3 The factory setting is disabled You can arbitrarily choose one or the other in most cases either choice is fine Occasionally though you will have another peripheral device for example a tape backup or
12. DMA Done Flag D A Converter 2 MSB Read Write A read clears the DMA done flag at bit 1 BA 0 A write programs the DAC2 MSB four bits into DO through D3 D4 through D7 are irrelevant Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit11 Bit10 Bit9 Bit 8 Programming the 406 5406 This section gives you some general information about programming and the 406 5406 and then walks you through the major 406 5406 programming functions These descriptions will help you as you use the example programs included with the board and the programming flow diagrams at the end of this chapter All of the program descriptions in this section use decimal values unless otherwise specified The module is programmed by writing to and reading from the correct I O port locations These I O ports were defined in the previous section Most high level languages such as BASIC Pascal C and C and of course assembly language make it very easy to read write these ports The table below shows you how to read from and write to I O ports using some popular programming languages Assembly mov dx Address mov dx Address mov al Data out dx al In addition to being able to read write the I O ports on the 406 5406 you must be able to perform a variety of operations that you might not normally use in your programming The table below shows you some of the operators discussed in this section with an example of how each is used with Pascal C and BASIC Note that
13. OSC or XCK in the CLKO section of the header OSC is the on board 8 MHz clock and XCK is an external clock source you can connect through the external I O connector P2 45 To the left of the CLKO pins are three pairs of pins grouped as CLK2 in the diagrams These pins are used to select the clock source for TC2 OTI connects the output of TC1 the pacer clock output to the clock input of TC2 Installing a jumper here cascades all three timer counters a feature necessary when using SIGNAL MATH or SIGNAL VIEW software for data acquisition and control OSC is the on board 8 MHz clock and XCK is con nected to the same external clock source as CLKO XCK P2 45 The next group of pins on this header called PCLK lets you use the on board internal pacer clock or an external pacer clock connected through the TRIGGER IN pin on the I O connector P2 39 to control A D conver sions A jumper must be placed on PCK in order to use the internal pacer clock output from TC1 Or you can place the jumper across TRIG and connect any external pacer clock source to P2 39 to trigger the A D converter The TRIG pins select the hardware source used to trigger the burst mode when the external trigger enable bit at BA 5 is enabled Bursts can be triggered from one of three hardware sources TRIG an external trigger signal routed onto the board through P2 39 OT2 the output from timer counter 2 or EG2 an external gate EXT GATE 2 signal routed onto the board th
14. board the TS16 thermocouple sensor board the TB50 terminal board and XB50 prototype terminal board for easy signal access and prototype development the DM14 extender board for testing your module in a conventional desktop computer and XT50 twisted pair wire flat ribbon cable assembly for external interfacing Using This Manual This manual is intended to help you install your new module and get it running quickly while also providing enough detail about the module and its functions so that you can enjoy maximum use of its features even in the most complex applications We assume that you already have an understanding of data acquisition principles and that you can customize the example software or write your own application programs When You Need Help This manual and the example programs in the software package included with your board provide enough information to properly use all of the module s features If you have any problems installing or using this dataModule contact our Technical Support Department 814 234 8087 during regular business hours eastern standard time or eastern daylight time or send a FAX requesting assistance to 814 234 5218 When sending a FAX request please include your company s name and address your name your telephone number and a brief description of the problem CHAPTER 1 MODULE SETTINGS The DM406 and DM5406 have jumper and switch settings you can change if necessary for your application The modu
15. clock Read count value Load count register BA 9 8254 Timer Counter 2 Available for external use Read count value Load count register BA 10 8254 Timer Counter Control ord Disable ae Sharing a counter mode BA 11 D A Converter 1 LSB Reseved Program DAC LSB 2 version DAC1 LSB 2 version BA 12 D A Converter 1 MSB Reseved Program DAC1 MSB 2 version BA 13 Clear IRQ D A Converter 2 LSB Clear IRQ status Program DAC2 LSB 2 version BA 14 Clear DMA Done D A Converter 2 MSB Clear DMA done flag Program DAC2 MSB 2 version BA 15 BA Base Address 4 3 BA 0 Read Status Start Convert Read Write A read provides the six status bits defined below The end of convert bit goes high when a conversion is complete and does not go low until the data is read useful information when using external triggering to start conversions The DMA done bit goes high when you are in the DMA mode and the DMA transfer is complete The IRQ status bit goes high when an interrupt has occurred and stays high until a clear IRQ command is sent BA 14 D3 shows the status of the burst trigger source jumpered at P3 TRIG D5 shows whether interrupt sharing is enabled or disabled D6 shows the status of the PCLK line jumpered at P3 Unlike the EOC status at bit O the A D converter status D7 goes low when a conversion starts and then goes high as soon as the conversion is com pleted When the input has been sampled and a conversion
16. converter Clear Board Write low byte Write high byte Update DAC Stop Program Fig 4 11 D A Conversion Flow Diagram CHAPTER 5 CALIBRATION This chapter tells you how to calibrate the 406 5406 using the 406DIAG calibration program included in the example software package and the four trimpots on the module These trimpots calibrate the A D converter gain and offset 5 1 5 2 This chapter tells you how to calibrate the A D converter gain and offset The D A converter does not need to be calibrated The offset and full scale performance of the module s A D converter is factory calibrated Any time you suspect inaccurate readings you can check the accuracy of your conversions using the procedure below and make adjusts as necessary Using the 406DIAG diagnostics program is a convenient way to monitor conversions while you calibrate the module Calibration is done with the module installed in your system You can access the trimpots at the edge of the module Power up the system and let the board circuitry stabilize for 15 minutes before you start calibrating Required Equipment The following equipment is required for calibration Precision Voltage Source 10 to 10 volts Digital Voltmeter 5 1 2 digits e Small Screwdriver for trimpot adjustment While not required the 406DIAG diagnostics program included with example software is helpful when performing calibrations Figure 5 1 shows the module layout with t
17. is in progress this line goes low At this time the analog input channel can be changed allowing maximum throughput for scanning channels through software A write starts an A D conversion data written is irrelevant End of Convert A D CONVERTER Status 0 no EOC x i 1 conversion done s F EA P3 TRIG Status m 9 monitors the TRIG DMA Done line selected on P3 5 P3 PCLK Status PEA monitors the PCLK line PDE selected on P3 IRQ Sharing Status IRQ Status 0 Enabled 0 No IRQ 1 Disabled 1 IRQ BA 1 Read A D Data Update DAC Outputs Read Write Two successive reads provide the MSB first followed by the LSB for each A D conversion as defined below If a conversion is started before this data is read from the previous conversion the data will be lost A write simultaneously starts a D A conversion in both DACS data written is irrelevant If the data has not been updated since the last conversion the output of the DAC will not change y AER DIESEN x Bit11 Bit 10 Bit 9 Bit 8 D7 D6 DS D4 D3 D2 D1 DO Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 BA 2 Reset Write Only Resets certain bits or registers so that the board is ready to start conversions The data written is irrelevant the act of writing to this address clears the board A reset command sets the internal byte pointer to read the MSB on the next read resets the DRQ and IRQ registers clears the EPLD scan burst circuitry and clears
18. less you simply convert the result The key digital codes and their input voltage values are given for each range in the three tables which follow A D Bipolar Code Table 5V twos complement Input Voltage 44 998 volts MSB 0111 1111 1111 LSB 2 500 volts volts 00244 volts 5 000 volts A D Bipolar Code Table 10V twos complement Input Voltage Output Code 49 995 volts MSB 0111 1111 1111 LSB O volts 1 LSB 4 88 millivolts A D Unipolar Code Table 0 to 10V straight binary 4 16 Programming the Pacer Clock Two of the three 16 bit timer counters in the 8254 programmable interval timer are cascaded to form the on board pacer clock shown in Figure 4 3 When you want to use the pacer clock for continuous A D conversions you must program the clock rate To find the value you must load into the clock to produce the desired rate you first have to calculate the value of Divider 1 Timer Counter 0 and Divider 2 Timer Counter 1 shown in the diagram The formulas for making this calculation are as follows Pacer clock frequency Clock Source Frequency Divider 1 x Divider 2 Divider 1 x Divider 2 Clock Source Frequency Pacer Clock Frequency To set the pacer clock frequency at 100 kHz using the on board 8 MHz clock source this equation becomes Divider 1 x Divider 2 8 MHz 100 kHz gt 80 8 MHz 100 kHz After you determine the value of Divider 1 x Divider 2 you then divide the result by the least
19. on the setting of the PCLK jumper at P3 When disabled A D conversions are triggered from software Start Convert command for all modes except burst When this bit is disabled in the burst mode bursts are triggered by software and each conver sion in the burst is triggered by the on board or external pacer clock again depending on the setting of the PCLK jumper at P3 When enabled in the burst mode bursts are triggered by an external trigger the output of timer counter 2 or a signal brought onto the board through the EXT GATE 2 pin on P2 depending on the setting of the TRIG jumper at P3 Enabling and Disabling Interrupts Any time you use interrupts this bit at port BA 5 must be set high to enable the IRQ circuitry Types of Conversions The 406 5406 can perform single and multiple conversions channel scanning and bursts Figure 4 1 shows the basic timing diagram for a conversion 5 usec 9 Trigger End of Convert EOC Data BEEN MSB gt C LSB X Read Fig 4 1 A D Conversion Timing Diagram All Modes 4 13 Single Conversion In this mode a single specified channel is sampled whenever a value is written to the START CONVERT port BA 0 software trigger The active channel is the one specified in the CHANNEL GAIN SELECT port This is the easiest of all conversions It can be used in a wide variety of applications such as sample every time a key is pressed on the keyboard sample with eac
20. shown in the following diagrams Failure to do so may affect the accuracy of your results Single Ended When operating in the single ended mode connect the high side of the analog input to one of the analog input channels AIN1 through AIN16 and connect the low side to an ANALOG GND pins 18 and 20 22 on P2 Figure 2 2 shows how these connections are made Differential When operating in the differential mode twisted pair cable is recommended to reduce the effects of magnetic coupling at the inputs Your signal source may or may not have a separate ground reference When using the differential mode you should install a 10 kilohm resistor pack at location RN5 on the module to provide a reference to ground for signal sources without a separate ground reference First connect the high side of the analog input to the selected analog input channel AIN1 through AIN8 and connect the low side of the input to the corresponding AIN pin Then for signal sources with a separate ground reference connect the ground from the signal source to an ANALOG GND pins 18 and 20 22 on P2 Figure 2 3 shows how these connections are made 2 4 1 0 CONNECTOR SIGNAL SOURCE 1 our SIGNAL SOURCE 7 our Fig 2 2 Single Ended Input Connections 1 0 CONNECTOR P2 SIGNAL SOURCE 1 OUT SIGNAL SOURCE 7 OUT GND Fig 2 3 Differential Input Connections 2 5 Connecting the Trigger In and Trigger Out Pins Cas
21. the modulus operator is used to retrieve the least significant byte LSB of a two byte word and the integer division operator is used to retrieve the most significant byte MSB Language Modules Integer Division AND OR ELE poy a bMODc a bDIVc a bANDcja b ORC a bMODc a b c a bANDc a bORc Many compilers have functions that can read write either 8 or 16 bits from to an I O port For example Turbo Pascal uses Port for 8 bit port operations and PortW for 16 bits Turbo C uses inportb for an 8 bit read of a port and inport for a 16 bit read Be sure to use only 8 bit operations with the DM406 or DM5406 Clearing and Setting Bits in a Port When you clear or set one or more bits in a port you must be careful that you do not change the status of the other bits You can preserve the status of all bits you do not wish to change by proper use of the AND and OR binary operators Using AND and OR single or multiple bits can be easily cleared in one operation To clear a single bit in a port AND the current value of the port with the value b where b 255 2 Example Clear bit 5 in a port Read in the current value of the port AND it with 223 223 255 25 and then write the resulting value to the port In BASIC this is programmed as V INP PortAddress V V AND 223 OUT PortAddress V 4 10 To set a single bit in a port OR the current value of the port with the value b where b 2 Example Set bit 3 i
22. to 5 volts or O to 10 volts Data is programmed into a D A converter by writing two 8 bit words the LSB and the MSB The LSB contains the 8 lower bits DO through D7 and the MSB contains the 4 upper bits D8 through D11 D A conversions are automatically triggered for both channels through a single write operation Access through DMA is not available 8254 Timer Counter An 8254 programmable interval timer contains three 16 bit 8 MHz timer counters to support a wide range of timing and counting functions Two of the timer counters are cascaded and can be used internally for the pacer clock The third is available for counting applications or it can be cascaded to the other two timer counters i 3 Digital VO The 406 5406 has 16 TTL CMOS compatible digital I O lines which can be directly interfaced with external devices or signals to sense switch closures trigger digital events or activate solid state relays These lines are provided by the on board 8255 programmable peripheral interface chip Pads for installing and activating pull up or pull down resistors are included on the module Installation procedures are given at the end of Chapter 1 Module Settings What Comes With Your Module You receive the following items in your module package DM406 1 DM406 2 DM5406 1 or DM5406 2 interface module with stackthrough bus header Mounting hardware Example programs in BASIC Turbo Pascal and Turbo C with source code amp diagnos
23. ups or pull downs Locate the three hole pads on the board near the resistor packs They are labeled G for ground on one end and V for Vcc on the other end The middle hole is common PA is for Port A CL is for Port C Lower and CH is for Port C Upper Figure 1 12 shows these pads To operate as pull ups solder a jumper wire between the common pin middle pin of the three and the V pin For pull downs solder a jumper wire between the common pin middle pin and the G pin Figure 1 13 shows Port A lines with pull ups Port C Lower with pull downs and Port C Upper with no resistors PORT A PAO 7 Fig 1 13 Adding Pull ups and Pull downs to Digital I O Lines CHAPTER 2 INSTALLATION The 406 5406 is easy to install in your cpuModule or other PC 104 based system This chapter tells you step by step how to connect the module After you have made all of your connections you can turn your system on and run the 406DIAG board diagnostics program in cluded on your example software disk to verify that your module is working 2 1 2 2 Installation Keep the module in its antistatic bag until you are ready to install it in your cpuModule or other PC 104 based system When removing it from the bag hold the module at the edges and do not touch the components or connec tors Before installing the module in your system check the jumper and switch settings Chapter 1 reviews the factory settings and how to change them If y
24. 2 oo eens 1 4 P4 Interrupt Channel Select Factory Setting Jumper G Interrupt Channel Disabled 1 5 P5 DMA Request DMA Acknowledge Channel Factory Setting Disabled sess 1 6 P6 Analog Input Voltage Range and Polarity Factory Setting 3 volts ooonnnoccnocononononconoconccnncnnccnocnnonnos 1 7 P7 Single Ended Differential Analog Inputs Factory Setting Single Ended sess 1 7 P8 DAC 1 Output Voltage Range Factory Setting 5 to 5 volts sess 1 7 P9 DAC 2 Output Voltage Range Factory Setting 5 to 5 volts sse 1 7 S1 Base Address Factory Setting 300 hex 768 decimal essere ene 1 8 Pull up Pull down Resistors on Digital VO Lines esses eene nennen nennen nennen entree 1 9 CHAPTER2 INSTALLATION sea ee 2 1 Installation eere A ie BER E e eicere EE N 2 3 External VO Connech0ns nee rete A ia 2 3 Connecting the Analog Input Pins iie erret teet tee m een 2 4 Connecting the Trigger In and Trigger Out Pins Cascading Modules see 2 6 Connecting the Analog QUIAPO naka eene PA ion 2 6 Connecting the Timer Counters and Digital VO iese sees ses se Se Ge Se ee ee ee ee ee eene ene Re RA nenne 2 6 Running the 406DIAG Diagnostics Program essent rennen nennen rene GR entren ee Ge ee ee Se ee 2 6 CHAPTER 3 HARDWAR
25. 4 1 below As shown the module occupies 16 consecutive I O port locations The base address designated as BA can be selected using DIP switch S1 as described in Chapter 1 Module Settings This switch can be accessed without removing the board from the connector S1 is factory set at 300 hex 768 decimal The following sections describe the register contents of each address used in the I O map Table 4 1 DM406 DM5406 VO Map Address Register Description Read Function Decimal Read Status Start Convert Read status word Start A D conversion BA 0 Read converted data MSB first Simultaneously update DAC 1 and Read Data Update DACs then LSB DAC 2 2 version BA 1 Reset board so that it is ready to Reset Reserved start A D conversions BA 2 Program number of scan burst channels enable scan burst Scan Burst Read current settings select IRQ source BA 3 8255 PPI Port A Read Port A digital input lines Program Port A digital output lines BA 4 8255 PPI Port B Channel Gain Board Read channel amp gain external Program channel amp gain external Functions trigger enable IRQ enable trigger enable IRQ enable BA 5 EE PPI Port C Read Port C oz input lines EE Port C digital output lines BA 6 8255 PPI 8255 PPI Control Word Word Reserved Program PPI configuration PPI configuration BA 7 8254 Timer Counter O Used for pacer clock Read count value Load count register BA 8 8254 Timer Counter 1 Used for pacer
26. Bernoulli drive that also uses the DMA channel you have selected This will certainly cause erratic results and can be hard to detect The best approach to pinpoint this problem is to read the documentation for the other peripheral devices in your system and try to determine which DMA channel each uses Allocating a DMA Buffer When using DMA you must have a location in memory where the DMA controller will place data from the 406 5406 This buffer can be either static or dynamically allocated Just be sure that its location will not change while DMA is in progress The following code examples show how to allocate buffers for use with DMA In Pascal Var Buffer Array 1 10000 of Byte static allocation OT Var Buffer Byte dynamic allocation Buffer GetMem 10000 In C char Buffer 10000 static allocation OT char Buffer dynamic allocation Buffer calloc 10000 0 In BASIC DIM BUFFER 5000 Calculating the Page and Offset of a Buffer Once you have a buffer into which to place your data you must inform the DMA controller of the location of this buffer This is a little more complex than it sounds because the DMA controller uses a page offset memory scheme while you are probably used to thinking about your computer s memory in terms of a segment offset scheme Paged memory is simply memory that occupies contiguous non overlapping blocks of memory with each block being 64K one page i
27. Buffer o FP OFF amp Buffer Pascal Seg Ofs S Seg Buffer O Ofs Buffer BASIC VARSEG VARPTR S VARSEG BUFFER O VARPTR BUFFER 4 22 Once you ve determined the segment and offset multiply the segment by 16 and add the offset to give you the linear address Make sure you store this result in a long integer or DWORD or the results will be meaningless The page number is the quotient of the division of the linear address by 65536 and the offset into the page is the remainder of that division Below are some programming examples for Pascal C and BASIC In Pascal Segment SEG Buffer get segment of buffer Offset OFS Buffer get offset of buffer Linear Address Segment 16 Offset calculate a linear address Page LinearAddress DIV 65536 determine page corresponding to this linear address PageOffset LinearAddress MOD 65536 determine offset into the page In C segment FP SEG amp Buffer get segment of buffer offset FP OFS amp Buffer get offset of buffer linear address segment 16 offset calculate a linear address page linear address 65536 determine page corresponding to this linear address page offset linear address 65536 determine offset into the page In BASIC S VARSEG BUFFER O VARPTR BUFFER LA S 16 O PAGE INT LA 65536 POFF LA PAGE 65536 Beware Th
28. DM406 DM5406 User s Manual O Ul Real Time Devices Inc Il Accessing the Analog World DM406 DM5406 User s Manual UI REAL TIME DEVICES INC Post Office Box 906 State College Pennsylvania 16804 Phone 814 234 8087 FAX 814 234 5218 Published by Real Time Devices Inc P O Box 906 State College PA 16804 Copyright O 1993 by Real Time Devices Inc All rights reserved Printed in U S A 11 18 96 Table of Contents INTRODUCTION Rm i 1 Analog to Digital Conversion Na e e sin sok e e e dei de ie RAANG i 3 Digital to Analog Conversion aaa NANANA BANA ee ERE HE DE EROR E ea EEES Pope tere b RP irte RR i 3 8254 D mmer Co nter isis eese e OBI OI dti DU ete DR i 3 Digital WO ii ent EE o Do br ORE RERO E E re E iret RS i 4 What Comes With Your Module asesi saienisi Ge Se ee Ge NOS GANG encon non SA nr Ge entree entente ee ee ee ene i 4 Module Accessories ON i 4 Application Software and Driver sees norr Re Se ee GR ee Ge ee ee ee Gee Ge Ge EE RA Re EE Ge Ge AA Re ee Se Re ee TE i A Hardware Accessories Lan oto ape RE EE ER EE EE EK i 4 Using This Manual 52er etes iode te aec ee aie OR OR i 4 TIO ls NA ibA ERE ER P van RR GR EE i 4 CHAPTER 1 MODULE SETTINGS sea ei 1 1 Factory Configured Switch and Jumper Settings ee se Gee GR Ge Re Ge nennen nennen reet entree 1 3 P3 8254 Timer Counter Sources Factory Settings See Table 1 1 amp Figure 1
29. E DESCRIPTION 0 20u0002002002000000200200200n00n00n20000002000000000 ee see see See ees 3 1 A D Conversion CIFCUIEy 5 eon ee aba is 3 3 Analoge NPUts OER EE NE OR EE N ER EE EE MET 3 3 A D Ge LE 2 EE OR OR ME OE AE ER EN 3 3 EED LE AE AE ELE IERE EE EE EI nies 3 4 D A Converters 2 Module EE IR EE GER Se DERS Se eg See Ges Oe GEE SG SR EE SE DER EE DEE DS Pe be Ese Ee Ee ed SEN Ge beg ee Se ens Gee Se 3 4 BES Sel OE N re re ei e ei tren rdi eed tete d NA Po de t ES 3 4 Digital I O Programmable Peripheral Interface ees ese se see se Ge ee GR GNG GANG Re Se ee nono ee ee ee Ge nen nennen trennen 3 5 CHAPTER 4 MODULE OPERATION AND PROGRAMMING esse sesse sesse es esse se ese es ee se ese sees 4 1 Defining the VO ER EE e oett tet A tee bet tee GN hart e ped irte 4 3 BA 0 Read Status Start Convert Read Write esses eene nnne enne 4 4 BA 1 Read A D Data Update DAC Outputs Read Write essere nemen 4 4 BA x2 Reset Write Only nett eter EA EQ e N EE RR ER EG 4 4 BA F3 Scam Burst Read Write is ae ED EERS A D aeneae testen dee ast aes 4 5 BA 4 PPI Port A Digital VO Read Write ooooooccconionnonnconccnnconcnancnncnnnonononn non ee nn nono RR enne ee 4 5 BA 5 PPI Port B Channel Gain Board Functions Select Read Write a 4 5 BA 6 PPI Port C Digital VO Read Write esse see se se se Se Gee GR ee Ge ee ee non Ge crono rennen ener en
30. O connector P2 on the module When making this connection note that there is no keying to guide you in orientation You must make sure that pin 1 of the cable is connected to pin 1 of P2 pin 1 is marked on the board with a small square For twisted pair cables pin 1 is the dark brown wire for standard single wire cables pin 1 is the red wire 7 Make sure all connections are secure External I O Connections Figure 2 1 shows the 406 5406 s P2 I O connector pinout Refer to this diagram as you make your I O connec tions Note that 12 volts at pin 47 and 12 volts at pin 49 are available only if your computer bus supplies them these voltages are not provided by the board 2 3 DIFF S E DIFF S E AIN1 AIN1 AIN1 AIN9 AIN2 AIN2 AIN2 AIN10 AIN3 AIN3 AIN3 AIN11 AIN4 AIN4 AIN4 AIN12 AIN5 AINS AIN5 AIN13 AIN6 AIN6 AIN6 AIN14 AIN7 AIN7 AIN7 AIN15 AIN8 AIN8 AIN8 AIN16 AOUT 1 AOUT 2 ANALOG GND ANALOG GND ANALOG GND ANALOG GND TRIGGER IN EXT GATE 1 TRIGGER OUT EXT CLK 412 VOLTS 12 VOLTS DIGITAL GND T C OUT 1 T C OUT 2 EXT GATE 2 5 VOLTS DIGITAL GND DO HO HO DO O Do HA HO 6208 DS Se Ste E OIC OG 6969 OG Fig 2 1 P2 VO Connector Pin Assignments Connecting the Analog Input Pins The analog inputs on the module can be set for single ended or differential operation NOTE It is good practice to connect all unused channels to ground as
31. OR d e 8 MHz CLOCK OUNTE PIN 45 L EXT CLK COUNTER CLK o o 0 l 45 V GATE PIN 41 4 EXT GATE 1 OUT TIMER COUNTER CLK 1 GATE ak PIN 42 ore OUT 1 CLK2 I l 8 MHz O O TIMER l GLOCK COUNTER CLK O O 2 I GATE I N l OUT l PIN 44 T C OUT 2 l l l l PCLK l Pd O O l 5 a l PIN 39 L TRIGGER IN TRIG I we l I 5 O O O TRIGGER 5 l PIN 46 EXT GATE 2 INPUT l I l l GT2 I E l l Fig 4 7 8254 Programmable Interval Timer Circuit Block Diagram Each timer counter has two inputs CLK in and GATE in and one output timer counter OUT They can be programmed as binary or BCD down counters by writing the appropriate data to the command word as described in the I O map section at the beginning of this chapter One of two clock sources the on board 8 MHz crystal or the external clock P2 45 can be selected as the clock input to TCO or TC2 The diagram shows how these clock sources are connected to the timer counters Two gate sources are available at the I O connector P2 41 and P2 46 When a gate is disconnected an on board pull up resistor automatically pulls the gate high enabling the timer counter The output from timer counter 1 is available at the T C OUT 1 pin P2 42 and timer counter 2 s output is available at T C 2 OUT P2 44 where they can be used for interrupt generation as an A D trigger or for counting functions 4 27 The timer counte
32. abled 1 IRQ masked disabled End of Interrupt EOI Command After an interrupt service routine is complete the 8259 interrupt controller must be notified This is done by writing the value 20H to I O port 20H What Exactly Happens When an Interrupt Occurs Understanding the sequence of events when an interrupt is triggered is necessary to properly write software interrupt handlers When an interrupt request line is driven high by a peripheral device such as the 406 5406 the 4 18 interrupt controller checks to see if interrupts are enabled for that IRQ and then checks to see if other interrupts are active or requested and determines which interrupt has priority The interrupt controller then interrupts the proces sor The current code segment CS instruction pointer IP and flags are pushed on the stack for storage and a new CS and IP are loaded from a table that exists in the lowest 1024 bytes of memory This table is referred to as the interrupt vector table and each entry is called an interrupt vector Once the new CS and IP are loaded from the interrupt vector table the processor begins executing the code located at CS IP When the interrupt routine is completed the CS IP and flags that were pushed on the stack when the interrupt occurred are now popped from the stack and execution resumes from the point where it was interrupted Using Interrupts in Your Programs Adding interrupts to your software is not as difficu
33. alt its current process and execute another routine Upon completion of the new routine control is returned to the original routine at the point where its execution was interrupted Interrupts are very handy for dealing with asynchronous events events that occur at less than regular intervals Keyboard activity is a good example your computer cannot predict when you might press a key and it would be a waste of processor time for it to do nothing while waiting for a keystroke to occur Thus the interrupt scheme is used and the processor proceeds with other tasks Then when a keystroke does occur the keyboard interrupts the processor and the processor gets the keyboard data places it in memory and then returns to what it was doing before it was interrupted Other common devices that use interrupts are modems disk drives and mice Your 406 5406 can interrupt the processor when a variety of conditions are met By using these interrupts you can write software that effectively deals with real world events Interrupt Request Lines To allow different peripheral devices to generate interrupts on the same computer the PC bus has eight different interrupt request IRQ lines A transition from low to high on one of these lines generates an interrupt request which is handled by the PC s interrupt controller The interrupt controller checks to see if interrupts are to be acknowledged from that IRQ and if another interrupt is already in progress i
34. applications disabled Sets the DMA request DRQ and DMA Disabled DMA channel not P5 acknowledge DACK channel selected Sets the analog input voltage range and polarity 5 to 5 volts Selects single ended or differential analog input Single ended jumpers installed type on three S pins Sets the D A output voltage range for DAC 1 5 to 5 volts 5 Sets the D A output voltage range for DAC 2 45 5 to 5 volts Sets the address 300 hex 768 c32 069 DC1 N 00 000 B J4 J7 oOo opno o u C30 Cii o KI 0000000000 HI 508A 0000000000 0000000000 HI 508A Hoooooo0loo Hooooooooo 0000000 O 0 U o GOOD DSS REE a 000000000000 SA O Os OO o 00000000 99 000000 D Ro 000000 0000000000 00000000 oo oo 74HCT688 onm oo oo oo 00 82055 oo 00000000 000000 SS3uddv seve 000000 00000000 00000 O Made in USA Fig 1 1 Module Layout Showing Factory Configured Settings 1 3 P3 8254 Timer Counter Sources Factory Settings See Table 1 1 amp Figure 1 2 This header connector shown in Figure 1 2 lets you select the clock sources for the 8254 timer counters TCO and TC2 TCO and TC1 are cascaded to form the pacer clock This header is also used to configure the pacer clock input trigger input and GATE 2 sources Figure 1 3 shows a block diagram of the timer counter circuitry to help you in making these connections The clock source for TCO and TC1 is selected by placing a jumper on
35. at BA 0 When doing DMA transfers you will want to monitor the DMA done flag for a transition from low to high This tells you when the DMA transfer is complete and data has been placed in the PC s memory The ECC line is available for monitoring conversion status when performing single conversions not using DMA transfer When the EOC goes from low to high the A D converter has completed its conversion and the data is ready to read The EOC line stays high following a conversion until the data has been read Then the line goes back to low until the next conversion is complete 4 15 Reading the Converted Data Two successive reads of port BA 1 provide the MSB and LSB of the 12 bit A D conversion in the format defined in the I O map section at the beginning of this chapter The MSB must always be read first followed by the LSB The output code and the resolution of the conversion vary depending on the input voltage range selected Bipolar conversions are in twos complement form and unipolar conversions are straight binary When a bipolar value is read you must first convert the result to straight binary and then calculate the voltage The conversion formula is simple for values greater than 2047 you must subtract 4096 from the value to get the sign of the voltage For example if your output is 2048 you subtract 4096 2048 4096 2048 This result corresponds to 5 volts or 10 volts depending on your binary range For values of 2047 or
36. at must be set using the method shown above for setting multiple bits in a port The following example shows how this two step operation is done Example Assign bits 3 4 and 5 in a port to 101 bits 3 and 5 set bit 4 cleared First read in the port and clear bits 3 4 and 5 by ANDing them with 199 Then set bits 3 and 5 by ORing them with 40 and finally write the resulting value back to the port In C this is programmed as v inportb port address v v amp 199 v v 40 outportb port address v A final note Don t be intimidated by the binary operators AND and OR and try to use operators for which you have a better intuition For instance if you are tempted to use addition and subtraction to set and clear bits in place of the methods shown above DON T Addition and subtraction may seem logical but they will not work if you try to clear a bit that is already clear or set a bit that is already set For example you might think that to set bit 5 of a port you simply need to read in the port add 32 2 to that value and then write the resulting value back to the port This works fine if bit 5 is not already set But what happens when bit 5 is already set Bits O to 4 will be unaffected and we can t say for sure what happens to bits 6 and 7 but we can say for sure that bit 5 ends up cleared instead of being set A similar problem happens when you use subtraction to clear a bit in place of the method shown above Now that you
37. cading Modules The 406 5406 has an external trigger input P2 39 and output P2 43 so that conversions can be started based on external events or so that two or more modules can be cascaded and run synchronously in a master slave configuration By cascading two or more modules as shown in Figure 2 4 they can be triggered to start an A D conversion at the same time sampling uncertainty is less than 50 nanoseconds When you cascade modules be sure to set each module for a different base address see Chapter 1 or system contention will result NOTE When cascading modules the sampling uncertainty is less than 50 nanoseconds If this level of uncertainty is too great for your application you can connect the trigger signal to the trigger input of each board In this configuration the modules are not cascaded but rather driven by the same trigger pulse at the same time and the sampling uncertainty is reduced to less than 5 nanoseconds If you apply an external trigger to the board s trigger in pin note that a jumper should be installed on PCLK TRIG on P3 see Chapter 1 The module is triggered on the positive edge of the pulse and the pulse duration should be at least 100 nanoseconds 1 0 CONNECTOR P2 BOARD 1 MASTER SIGNAL SOURCE E 1 our Board SLAVE SIGNAL SOURCE 2 our Fig 2 4 Cascading Two Modules for Simultaneous Sampling Connecting the Analog Outputs For each of the two D A outputs connect the h
38. cal and C compilers allow you to identify a procedure function as an interrupt type and will automatically add these instructions to your ISR with one important exception most compilers do not automatically add the end of interrupt command to the procedure you must do this yourself Other than this and the few exceptions discussed below you can write your ISR just like any other routine It can call other functions and procedures in your program and it can access global data If you are writing your first ISR we recommend that you stick to the basics just something that will convince you that it works such as incrementing a global variable NOTE If you are writing an ISR using assembly language you are responsible for pushing and popping registers and using IRET instead of RET There are a few cautions you must consider when writing your ISR The most important is do not use any DOS functions or routines that call DOS functions from within an ISR DOS is not reentrant that is a DOS function cannot call itself In typical programming this will not happen because of the way DOS is written But what about when using interrupts Then you could have a situation such as this in your program If DOS function X is being executed when an interrupt occurs and the interrupt routine makes a call to DOS function X then function X is essentially being called while it is already active Such a reentrancy attempt spells disaster because DOS functions are n
39. cally across the desired IRQ channel Figure 1 4a shows the factory setting Figure 1 4b shows the interrupt source connected to IRQ3 This module supports an interrupt sharing mode where the pins labeled G connect a 1 kilohm pull down resistor to the output of a high impedance tri state driver which carries the interrupt request signal This pull down resistor drives the interrupt request line low whenever interrupts are not active Whenever an interrupt request is made the tri state buffer is enabled forcing the output high and generating an interrupt You can monitor the interrupt status through bit 2 in the status word I O address location BA 0 After the interrupt has been serviced the reset command returns the IRQ line low disabling the tri state buffer and pulling the output low again Figure 1 5 shows this circuit Because the interrupt request line is driven low only by the pull down resistor you can have two or more modules which share the same IRQ channel You can tell which module issued the interrupt request by monitoring each module s IRQ status bit If you are not planning on sharing interrupts or if you are not sure that your CPU supports interrupt sharing it is best to disable this feature and use the interrupts in the normal mode This will insure compatibility with all CPUs See chapter 4 for details on disabling the interrupt sharing circuit NOTE When you use multiple modules that share the same interrupt only one module sho
40. ce to use DOS function 35H get interrupt vector Most C and Pascal compilers provide a library routine for reading the value of a vector The vectors for the hardware interrupts are vectors 8 through 15 where IRQO uses vector 8 IRQ1 uses vector 9 and so on Thus if the 406 5406 will be using IRQ3 you should save the value of interrupt vector 11 Before you install your ISR temporarily mask out the IRQ you will be using This prevents the IRQ from requesting an interrupt while you are installing and initializing your ISR To mask the IRQ read in the current IMR at I O port 21H and set the bit that corresponds to your IRQ remember setting a bit disables interrupts on that IRQ while clearing a bit enables them The IMR is arranged so that bit 0 is for IRQO bit 1 is for IRQ1 and so on See the paragraph entitled Interrupt Mask Register IMR earlier in this chapter for help in determining your IRQ s bit After setting the bit write the new value to I O port 21H With the startup IMR saved and the interrupts on your IRQ temporarily disabled you can assign the interrupt vector to point to your ISR Again you can overwrite the appropriate entry in the vector table with a direct memory write but this is a bad practice Instead use either DOS function 25H set interrupt vector or if your compiler provides it the library routine for setting an interrupt vector Remember that vector 8 is for IRQO vector 9 is for IRQ1 and so on If you need
41. common denomi nator The least common denominator is the value that is loaded into Divider 1 and the result of the division the quotient is loaded into Divider 2 In our example above the least common denominator is 2 so Divider 1 equals 2 and Divider 2 equals 80 2 or 40 The table below lists some common pacer clock frequencies and the counter settings using the on board 8 MHz clock source After you calculate the decimal value of each divider you can convert the result to a hex value if it is easier for you when loading the count into the 16 bit counter To set up the pacer clock on the module follow these steps 1 Select a clock source the 8 MHz on board clock or an external clock source 2 Program Timer Counter 0 for Mode 2 operation 3 Program Timer Counter 1 for Mode 2 operation 4 Load Divider 1 LSB 5 Load Divider 1 MSB 6 Load Divider 2 LSB 7 Load Divider 2 MSB The pacer clock starts running as soon as the last divider is loaded It can be turned on and off by enabling and disabling the external trigger 8 MHz gt Timer Counter 0 Timer Counter 1 Divider 1 Divider 2 Pacer Clock Fig 4 6 Pacer Clock Block Diagram p r Clock Divider 1 Divider 2 acer VIOCK decimal hex decimal hex 100 kHz 2 0002 40 0028 100Hz 2 0002 40000 9C40 4 17 Interrupts What Is an Interrupt An interrupt is an event that causes the processor in your computer to temporarily h
42. cts it manufactures and produces to be free from defects in materials and workmanship for one year following the date of shipment from REAL TIME DE VICES This warranty is limited to the original purchaser of product and is not transferable During the one year warranty period REAL TIME DEVICES will repair or replace at its option any defective products or parts at no additional charge provided that the product is returned shipping prepaid to REAL TIME DEVICES AII replaced parts and products become the property of REAL TIME DEVICES Before returning any product for repair customers are required to contact the factory for an RMA number THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY PRODUCTS WHICH HAVE BEEN DAM AGED AS A RESULT OF ACCIDENT MISUSE ABUSE such as use of incorrect input voltages improper or insufficient ventilation failure to follow the operating instructions that are provided by REAL TIME DEVICES acts of God or other contingencies beyond the control of REAL TIME DEVICES OR AS A RESULT OF SERVICE OR MODIFICATION BY ANYONE OTHER THAN REAL TIME DEVICES EXCEPT AS EX PRESSLY SET FORTH ABOVE NO OTHER WARRANTIES ARE EXPRESSED OR IMPLIED INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND REAL TIME DEVICES EXPRESSLY DISCLAIMS ALL WARRANTIES NOT STATED HEREIN ALL IMPLIED WARRANTIES INCLUDING IMPLIED WARRANTIES FOR MECHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43. defines the addresses and INC contains the routines called by the main programs In the Pascal direc tory DM406 PNC contains all of the procedures needed to implement the main Pascal programs Analog to Digital SOFTTRIG Demonstrates how to use the software trigger mode for acquiring data EXTTRIG Similar to SOFTTRIG except that an external trigger is used MULTI Shows how to fill an array with data using the pacer clock Timer Counters TIMER A short program demonstrating how to program the 8254 for use as a timer Digital VO DIGITAL Simple program that shows how to read and write the digital I O lines Digital to Analog DAC Shows how to use the DACs Uses A D channel 1 to monitor the output of DACI WAVES A more complex program that shows how to use the 8254 timer and the DACs as a waveform generator Interrupts INTRPTS Shows the bare essentials required for using interrupts INTSTR A complete program showing interrupt based streaming to disk DMA DMA Demonstrates how to use DMA to transfer acquired data to a memory buffer Buffer can be written to disk and viewed with the included VIEWDAT program DMASTR Demonstrates how to use DMA for disk streaming Very high continuous acquisition rates can be obtained BASIC Programs These programs are source code files so that you can easily develop your own custom software for your module Analog to Digital SINGLE Demonstrates how to use the single convert internal trigger
44. ed to write to this port but it is a good habit to do so before programming the DMA controller Writing any value to this port clears the flip flop Address hex decimal Register Description 02 02 Channel 1 Page Offset write 2 bytes LSB first 03 03 Channel 1 Count write 2 bytes LSB first 06 06 Channel 3 Page Offset write 2 bytes LSB first 07 07 Channel 3 Count write 2 bytes LSB first 0A 10 Mask Register 0B 11 Mode Register write only 0C 12 Clear Byte Pointer Flip Flop write only DMA Mask Register The DMA mask register is used to enable or disable DMA on a specified DMA channel You should mask disable DMA on the DMA channel you will be using while programming the DMA controller After the DMA controller has been programmed and the DM5406 has been programmed to sample data you can enable DMA by clearing the mask bit for the DMA channel you are using You should manually disable DMA by setting the mask bit before exiting your program or if for some reason sampling is halted before the DMA controller has transferred all the data it was programmed to transfer If you leave DMA enabled and it has not transferred all the data it was programmed to transfer it will resume transfers the next time data appears at the A D converter This can spell disaster if your program has ended and the buffer has be reallocated to another application VO Port OAH Channel Select Mask Bit 00 Channel 0 0 unmask 01
45. ee Ge Ge ee ee dorer ee ee Ge Re Ge anno eren entren entrent entree 4 32 Interrupts Flow Diagram Figure 4 10 sse eene enne nennen etre nennen 4 33 D A Conversion Flow Diagram Figure 4 11 se ee Ge ee Ge ee ee be enne GR RR Re Se ee nenne 4 34 CHAPTER 5 CALIBRATION nasse dk es bee be PESE AA se eene KAG 5 1 Required Equipment net ete prede db eie t d Eee EE beta NG 5 3 AND Cala brat Omics cis EE RE EE De EROR rau EL ED 5 4 Unipolar Calibration sss 5 ne ee t petit RE PE e BER sn 5 4 Bipolar Calibration AE ER oH s ER AER RI RE et ae a erat o Pe te eas 5 5 Bipolar Range Adjustments 5 to 5 Volts sessi eene nennen Re Ge Se ee ee ee Re 5 5 Bipolar Range Adjustments 10 to 10 Volts se se se Ge Se ee Se Ge ee Ge Ge GR Ge nennen eene nennen 5 6 D A Calibration sssr EE OE EE OE RE OR EE EE EE 5 6 APPENDIX A 406 5406 SPECIFICATIONS eere eee see se See Se See SE Be sns Se Ee Se EE Be ee Ee Se EE A 1 APPENDIX B P2 CONNECTOR PIN ASSIGNMENTS esse sesse sesse ese ese see se ees se Se ee Be Ee ee Se ee B 1 APPENDIX C COMPONENT DATA SHEETS esse sesse esse ese se esse see se ese ese see se ees se ese se ees Se ese see ge Se ese C 1 APPENDIX D WARRANTY use D 1 iii iv 1 1 1 2 1 3 1 5 1 6 1 7 1 8 1 9 1 10 1 11 1 12 1 13 2 1 2 2 2 3 2 4 3 1 3 2 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 4 10 4 11 5 1 List of Illustrations M
46. er Requirements DM406 1 12 and 5 volts 1 3W DM406 2 12 and 5 volts 1 5W DM5406 1 5 volts 1 4W DM5406 2 5 volts 1 6W P2 Connector 50 pin right angle header Size 3 55 L x 3 775 W x 0 6 H 90mm x 96mm x 16mm A 4 APPENDIX B P2 CONNECTOR PIN ASSIGNMENTS B 1 B 2 DIFF S E DIFF S E AINt AINT C 2 AIN1 AIN9 AIN2 AIN2 3 2 AIN2 AINTO AIN3 AIN3 5 6 AINS AIN11 AIN4 AIN4 7 C8 AIN4 AIN12 AINS AINS 9 19 AINS AIN13 AIN6 Aine 1 12 AlN6 AIN14 AIN7 AIN7 4942 AIN7 AIN15 AIN8 AIN8 19 19 AIN8 AlN16 AOUT 1 29 ANALOG GND PIN 1 AOUT 2 ANALOG GND ANALOG GND 2 22 ANALOG GND PA7 6362 PC7 PAG 65 G9 Pcs pas 6268 Pcs PA4 PC4 Pas 61 G2 Pcs PA2 63 G2 Pc2 PA1 65 G9 Pct PAO 62 G3 Pco TRIGGER IN DIGITAL GND EXT GATE 1 T C OUT 1 TRIGGER OUT T C OUT 2 EXT CLK EXT GATE 2 412 VOLTS 45 VOLTS PIN 49 12 VOLTS DIGITAL GND NOTE On the DM5406 12 volts at pin 47 and 12 volts at pin 49 are available only if supplied by the computer bus P2 Mating Connector Part Numbers 1 746094 0 B 3 B 4 C 1 APPENDIX C COMPONENT DATA SHEETS Intel 82C54 Programmable Interval Timer Data Sheet Reprint Intel 82C55A Programmable Peripheral Interface Data Sheet Reprint APPENDIX D WARRANTY D 2 LIMITED WARRANTY Real Time Devices Inc warrants the hardware and software produ
47. ere is one big catch when using page based addresses The DMA controller cannot write properly to a buffer that straddles a page boundary A buffer straddles a page boundary if one part of the buffer resides in one page of memory while another part resides in the following page The DMA controller cannot properly write to such a buffer because the DMA controller can only write to one page without reprogramming When it reaches the end of the current page it does not start writing to the next page Instead it starts writing back at the first byte of the current page This can be disastrous if the beginning of the page does not correspond to your buffer More often than not this location is being used by the code portion of your program or the operating system and writing data to it will almost always causes erratic behavior and an eventual system crash You must check to see if your buffer straddles a page boundary and if it does take action to prevent the DMA controller from trying to write to the portion that continues on the next page You can reduce the size of the buffer or try to reposition the buffer However this can be difficult when using large static data structures and often the only solution is to use dynamically allocated memory Setting the DMA Page Register Oddly enough you do not inform the DMA controller directly of the page to be used Instead you put the page to be used into the DMA page register which is separate from
48. ere rele isa 2 5 Cascading Two Boards for Simultaneous Sampling eese 2 6 DM5406 Block di EE ORE tee ee Het dep tete tre bere eds 3 3 8254 Programmable Interval Timer Circuit Block Diagram sese 3 4 A D Conversion Timing Diagram All Modes eese sas sans sa emen enne 4 13 Timing Diagram Single Conversion se se Ge Se ee Ge ee Ge ee ee ee ener ennt rer cn eren enne 4 14 Timing Diagram Multiple Conversions ooooccccnnooncnnnonnnonononcnnnnnncnnconnonnconnonnconncn nono en nee entren nennen enne 4 14 Timing Diagram Channel Scanning eese ener etre cn non trennen nennen 4 15 Timang Diagram B rst nG tenons 4 15 Pacer Clock Block Diagram coo ere tee titres rre tl 4 17 8254 Programmable Interval Timer Circuit Block Diagram eene 4 27 Single Conversion Flow Diagram se ee ee ge Ge Ge Ge RA nennen treten nee tenen rennen eene en rennen 4 31 DMA Flow Diagram obe edere ree tee pde Deb e AR e epe 4 32 Interrupts Flow Diagrams EE ies septs rele re etie ned reete t ees 4 33 D A Conversion Flow Diagram see se ee Ge RA enne nennen nennen tenente teret tree nete tenete teretes 4 34 Module Layout sn rte o P HEU E EE EE N 5 3 vi INTRODUCTION The DM406 and DM5406 analog I O dataModules turn your IBM PC compatible cpuModule or other PC 104 computer into a high speed high performance data acqui
49. form the 32 bit on board pacer clock BA 10 8254 Timer Counter 2 Read Write A read shows the count in the counter and a write loads the counter with a new value Counting begins as soon as the count is loaded This counter can be cascaded to TCO and TC1 or it can be used independently BA 11 Disable Interrupt Sharing 8254 Control Word Read Write A read at this address disables the interrupt sharing circuit The circuit can be re enabled by resetting the CPU or cycling the power off and on A write accesses the 8254 control register to directly control the three timer counters BCD Binary 0 binary 1 2 BCD Counter Select 00 Counter 0 01 Counter 1 oo 10 Counter 2 Read Load 11 read back setting Counter Mode Select 000 Mode 0 event count 001 Mode 1 programmable 1 shot 00 latching operation 010 Mode 2 rate generator 01 read load LSB only 011 Mode 3 square wave rate generator 10 read load MSB only 100 Mode 4 software triggered strobe 11 read load LSB then MSB 101 Mode 5 hardware triggered strobe 4 8 BA 12 D A Converter 1 LSB Write Only Programs the DAC1 LSB eight bits BA 13 D A Converter 1 MSB Write Only Programs the DAC1 MSB four bits into DO through D3 D4 through D7 are irrelevant BA 14 Clear IRQ Status D A Converter 2 LSB Read Write A read clears the IRQ status bit at bit 2 BA 0 A write programs the DAC2 LSB eight bits BA 15 Clear
50. ftware Triggered Strobe The output is initially high When the initial count expires the output goes low for one clock pulse and then goes high again Counting is triggered by writing the initial count Mode 5 Hardware Triggered Strobe Retriggerable The output is initially high Counting is triggered by the rising edge of the gate input When the initial count has expired the output goes low for one clock pulse and then goes high again Digital VO The 16 8255 PPI based digital VO lines can be used to transfer data between the computer and external devices The digital input lines can have pull up or pull down resistors installed as described in Chapter 1 4 28 Example Programs and Flow Diagrams Included with the 406 5406 is a set of example programs that demonstrate the use of many of the module s features These examples are in written in C Pascal and BASIC Also included is an easy to use menu driven diagnostics program 5406DIAG which is especially helpful when you are first checking out your module after installation and when calibrating the module Chapter 5 Before using the software included with your module make a backup copy of the disk You may make as many backups as you need C and Pascal Programs These programs are source code files so that you can easily develop your own custom software for your module In the C directory DM406 H and DM406 INC contain all the functions needed to implement the main C programs H
51. gh software internally triggered or by an external trigger brought onto the board through the I O connector An on board or external pacer clock can be used to control the conversion rate Conver sion modes are described in Chapter 4 Module Operation and Programming 3 3 Data Transfer The converted data can be transferred through the PC data bus to PC memory in one of two ways by using the microprocessor or by using direct memory access DMA Data bus transfers take more processor time to execute They use polling and interrupts to determine when data has been acquired and is ready for transfer DMA places data directly into the PC s memory one byte at a time with minimal use of processor time DMA transfers are managed by the DMA controller as a background function of the PC letting you operate at higher throughput rates The maximum throughput rate of the module is 100 kHz D A Converters 2 Module Two independent 12 bit analog output channels are included on the DM406 2 and DM5406 2 The analog outputs are generated by two 12 bit D A converters with independent jumper selectable output ranges of 5 0 to 5 or 0 to 10 volts The 10 volt ranges have a resolution of 2 44 millivolts and the 5 volt range has a resolution of 1 22 millivolts Timer Counters An 8254 programmable interval timer provides three 16 bit S MHz timer counters to support a wide range of timing and counting functions Two of the timer counters TCO and TC1 a
52. h iteration of a loop or watch the system clock and sample every five seconds Figure 4 2 shows a timing diagram for single conversions See the SOFTTRIG sample program in C and Pascal and the SINGLE program in BASIC on the example programs disk included with your board START GONVERT Sl CH tt SL SAMPLE TAKEN TL CB MI SAMPLED CHANNEL Tati Fig 4 2 Timing Diagram Single Conversion Multiple Conversions In this mode conversions are continuously performed at the pacer clock rate The pacer clock can be internal or external depending on the setting of the PCLK jumper on P3 The maximum rate supported by the module is 100 kHz If you use the internal pacer clock you must program it to run at the desired rate This mode is ideal for filling arrays acquiring data for a specified period of time and taking a specified number of samples Figure 4 3 shows a timing diagram for multiple conversions See the MULTI sample programs in C and Pascal on the example programs disk included with your board PAGERCLODK S TL fil fb SE ME Kh qu NL SAMPLE TAKEN fl 1 1 1 1 1 1 1 1 SAMPLED CHANNEL 1 1 1 1 1 1 1 1 ae Fig 4 3 Timing Diagram Multiple Conversions Automatic Channel Scan In this mode the channel sampled is automatically incremented after each conver sion is complete The channel at which the scan starts is specified in the channel select bits of BA 5 The number of channels to be scanned is specified at BA
53. he four trimpots located along the top right edge Q ic c31 O ogg 20 Ps O On Jo J B 005m o u o gt DOO 10 5 5 810 5 5 0000 0000000000 om oo LEZLAV O Ox OO 0000000000 luz 00000000 000000 L6 Eg PC 000000 0000 L 0000000000 74HCT688 bbc 1OHbZ oo oo oo 82655 00 00000000 Made in USA O 959909599999 ENEE EEE Fig 5 1 Module Layout 5 3 A D Calibration Two procedures are used to calibrate the A D converter for all input voltage ranges The first procedure cali brates the converter for the unipolar range 0 to 10 volts and the second procedure calibrates the bipolar ranges 5 10 volts Table 5 1 shows the ideal input voltage for each bit weight for the unipolar straight binary range and Table 5 2 shows the ideal voltage for each bit weight for the bipolar twos complement ranges Unipolar Calibration Two adjustments are made to calibrate the A D converter for the unipolar range of 0 to 10 volts One is the offset adjustment and the other is the full scale or gain adjustment Trimpot TR4 is used to make the offset adjustment and trimpot TR2 is used for gain adjustment This calibration procedure is performed with the board set up for a O to 10 volt input range Before making these adjustments make sure that the jumpers on P6 are set for 10V and UNI Use analog input channel 1 and set it for a gain of 1 while calibrating the board Connect your precision voltage source to channe
54. igh side of the device receiving the output to the AOUT channel P2 17 or P2 19 and connect the low side of the device to an ANALOG GND P2 18 or P2 20 Connecting the Timer Counters and Digital I O For all of these connections the high side of an external signal source or destination device is connected to the appropriate signal pin on the I O connector and the low side is connected to any DIGITAL GND Running the 406DIAG Diagnostics Program Now that your module is ready to use you will want to try it out An easy to use menu driven diagnostics program 406DIAG is included with your example software to help you verify your module s operation You can also use this program to make sure that your current base address setting does not contend with another device 2 6 CHAPTER 3 HARDWARE DESCRIPTION This chapter describes the features of the DM406 and DM5406 hardware The major circuits are the A D the D A the timer counters and the digital I O lines 3 1 3 2 The406 5406 has four major circuits the A D the D A the timer counters and the digital I O lines Figure 3 1 shows the block diagram of the module This chapter describes the hardware which makes up the major circuits DATA DMA CONTROL AND SELECT 16 ANALOG INPUTS 8 DIFF 16 S E RANGE 5V TO 5V 0 TO 10V se VOLTS PROIN ALLE 16 10V TO 10V 0 TO 10 VOLTS AMELIEIER 210 VOLTS TRIGGER IN TRIGGER SELECT TRIGGER OUT
55. is header connector shown in Figure 1 9 sets the output voltage range for DAC 1 at 0 to 5 5 or O to 10 volts right to left on the header This header does not have to be set the same as P9 LOVA 8d 10 45 5 Fig 1 9 DAC 1 Output Voltage Range Jumper P8 P9 DAC 2 Output Voltage Range Factory Setting 5 to 5 volts This header connector shown in Figure 1 10 sets the output voltage range for DAC 2 at 0 to 5 5 or 0 to 10 volts right to left on the header This header does not have to be set the same as P8 6d ZING 1035 5 Fig 1 10 DAC 2 Output Voltage Range Jumper P9 1 7 S1 Base Address Factory Setting 300 hex 768 decimal One of the most common causes of failure when you are first trying your module is address contention Some of your computer s I O space is already occupied by internal I O and other peripherals When the module attempts to use I O address locations already used by another device contention results and the board does not work To avoid this problem the 406 5406 has an easily accessible DIP switch S1 which lets you select any one of 32 starting addresses in the computer s I O Should the factory setting of 300 hex 768 decimal be unsuitable for your system you can select a different base address simply by setting the switches to any one of the values listed in Table 1 2 The table shows the switch settings and their corresponding decimal and hexadecimal in parentheses va
56. know how to clear and set bits we are ready to look at the programming steps for the DM406 and DM5406 module functions A D Conversions The following paragraphs walk you through the programming steps for performing A D conversions Detailed information about the conversion modes is presented in this section You can follow these steps on the flow dia grams at the end of this chapter and in our example programs included with the board In this discussion BA refers to the base address Initializing the 8255 PPI The eight Port B lines of the 8255 PPI control the channel selection programmable gain programmable IRQ and external trigger and DMA enable Port B is programmed at I O address location BA 5 IRQ Enable IRQ disabled 1 IRQ enabled EXT PCK EXT TRIG Enable 0 Disabled 1 Enabled Channel Gain 00 x1 01 x2 10 x4 11 x8 Analog Input Channel Select 0000 chamnel 1 0001 chamnel 2 0010 channel 3 0011 channel 4 0100 channel 5 0101 channel 6 0110 channel 7 0111 channel 8 1000 channel 9 1001 channel 10 1010 channel 11 1011 channel 12 1100 channel 13 1101 channel 14 1110 channel 15 1111 channel 16 To use Port B for these control functions the 8255 must be initialized so that Port B is set up as a Mode 0 output port This is done by writing this data to the PPI control word at I O address BA 7 X don t care 1 X X X X 0 0 X D7 D6 DS Da D3 D2
57. l 1 Set the voltage source to 1 22070 millivolts start a conversion and read the resulting data Adjust trimpot TR4 until it flickers between the values listed in the table at the top of the next page Next set the voltage to 9 99634 volts and repeat the procedure this time adjusting TR2 until the data flickers between the values in the table Table 5 1 AD Converter Bit Weights Unipolar Straight Binary Ideal Input Voltage millivolts A DBit Weight Oto 10 Volts 0100 0000 0000 425000 0001 0000 0000 6250 5 4 Data Values for Calibrating Unipolar 10 Volt Range 0 to 10 volts Offset TR4 Converter Gain TR2 Input Voltage 1 22070 mV Input Voltage 9 99634 V 0000 0000 0000 1111 1111 1110 A D Converted Data 0000 0000 0001 1111 1111 1111 Bipolar Calibration Bipolar Range Adjustments 5 to 5 Volts Two adjustments are made to calibrate the A D converter for the bipolar range of 5 to 5 volts One is the offset adjustment and the other is the full scale or gain adjustment Trimpot TR1 is used to make the offset adjustment and trimpot TR2 is used for gain adjustment Before making these adjustments make sure that the jumpers on P6 are set for 10V and BI Use analog input channel 1 and set it for a gain of 1 while calibrating the board Connect your precision voltage source to channel 1 Set the voltage source to 4 99878 volts start a conversion and read the resulting data Adjust trimpot TR3 u
58. le is fac tory configured as listed in the table and shown on the layout diagram in the beginning of this chapter Should you need to change these settings use these easy to follow instructions before you stack the module with your computer system Also note that by installing resistor packs at three locations around the 8255 PPI and soldering jumpers in the associated Vcc ground pads you can configure your digital I O lines to be pulled up or pulled down This procedure is explained at the end of this chapter Factory Configured Switch and Jumper Settings Table 1 1 lists the factory settings of the user configurable jumpers and switch on the DM406 and DM5406 modules Figure 1 1 shows the module layout and the locations of the factory set jumpers The following paragraphs explain how to change the factory settings Pay special attention to the setting of S1 the base address switch to avoid address contention when you first use your module in your system Table 1 1 Factory Settings Switch Factory Settings Jumper Function Controlled Jumpers Installed Jumpers installed on CLK0 OSC Sets the clock sources for the 8254 timer counters CLK2 OT1 PCLK PCK selects A D trigger source selects GATE 2 source TRIG OT2 GT2 EG2 Connects one of four software selectable interrupt Jumper installed on G ground for Sources to an interrupt channel pulls tri state buffer buffer interrupt channels to ground G for multiple interrupt
59. lt as it may seem and what they add in terms of performance is often worth the effort Note however that although it is not that hard to use interrupts the smallest mistake will often lead to a system hang that requires a reboot This can be both frustrating and time consuming But after a few tries you ll get the bugs worked out and enjoy the benefits of properly executed interrupts In addition to reading the following paragraphs study the INTRPTS source code included on your 406 5406 program disk for a better understanding of interrupt program development Writing an Interrupt Service Routine ISR The first step in adding interrupts to your software is to write the interrupt service routine ISR This is the routine that will automatically be executed each time an interrupt request occurs on the specified IRQ An ISR is different than standard routines that you write First on entrance the processor registers should be pushed onto the stack BEFORE you do anything else Second just before exiting your ISR you must clear the interrupt status of the 406 5406 and write an end of interrupt command to the 8259 controller Finally when exiting the ISR in addition to popping all the registers you pushed on entrance you must use the IRET instruction and not a plain RET The IRET automatically pops the flags CS and IP that were pushed when the interrupt was called If you find yourself intimidated by interrupt programming take heart Most Pas
60. lues Make sure that you verify the order of the switch numbers on the switch 1 through 5 before setting them When the switches are pulled forward they are OPEN or set to logic 1 as labeled on the DIP switch package When you set the base address for your module record the value in the table inside the back cover Figure 1 11 shows the DIP switch set for a base address of 300 hex 768 decimal Decimal Hex 54321 Decimal Hex 54321 512 000 528 210 10001 544 220 10010 560 230 10011 5161 240 10100 592 250 10101 608 260 10110 624 1 270 10111 640 280 11000 656 290 11001 6721 GAD 11010 688 B0 11011 704 2C0 11100 720 CDO 11101 7361 20 11110 752 Go WERE 0 closed 1 open Fig 1 11 Base Address Switch S1 Pull up Pull down Resistors on Digital I O Lines The 8255 programmable peripheral interface provides 16 TTL CMOS compatible digital I O lines which can be interfaced with external devices These lines are divided into three groups eight Port A lines four Port C Lower lines and four Port C Upper lines Port B is used for internal board functions You can install and connect pull up or pull down resistors for any or all of these three groups of lines You may want to pull lines up for connection to switches This will pull the line high when the switch is disconnected Or you may want to pull lines down for connection to relays which control turning motors on and off These m
61. mode for acquiring data EXTTRIG Demonstrates how to use the external trigger to acquire data SCAN Demonstrates how to scan channels to acquire data DMA DMA Shows how to take samples and transfer them to PC memory using DMA 4 29 Timer Counters TIMER Digital VO DIGITAL Digital to Analog DASCAN A short program demonstrating how to program the 8254 for use as a timer Simple program that shows how to read and write the digital I O lines Demonstrates D A conversion 4 30 Flow Diagrams The following paragraphs provide descriptions and flow diagrams for some of the 406 5406 s A D and D A conversion functions These diagrams will help you to build your own custom applications programs Single Convert Flow Diagram Figure 4 8 This flow diagram shows you the steps for taking a single sample on a selected channel A sample is taken each time you send the Start Convert command All of the samples will be taken on the same channel and at the same gain until you change the value in the PPI Port B register BA 5 Changing this value before each Start Convert command is issued lets you take the next reading from a different channel at a different gain Program 8255 PPI Port B out Clear Registers Reset Select Channel amp Gain Change Channel or Gain Start Conversion Check End of Convert EOC 1 Read MSB Read LSB Stop Program Fig 4 8 Single Conversion Flow Diagram
62. n a port Read in the current value of the port OR it with 8 8 25 and then write the resulting value to the port In Pascal this is programmed as V Port PortAddress V V OR 8 Port PortAddress V Setting or clearing more than one bit at a time is accomplished just as easily To clear multiple bits in a port AND the current value of the port with the value b where b 255 the sum of the values of the bits to be cleared Note that the bits do not have to be consecutive Example Clear bits 2 4 and 6 in a port Read in the current value of the port AND it with 171 171 255 2 2 2 and then write the resulting value to the port In C this is programmed as v inportb port address v v amp 171 outportb port address v To set multiple bits in a port OR the current value of the port with the value b where b the sum of the individual bits to be set Note that the bits to be set do not have to be consecutive Example Set bits 3 5 and 7 in a port Read in the current value of the port OR it with 168 168 2 25 27 and then write the resulting value back to the port In assembly language this is programmed as mov dx PortAddress in al dx or al 168 out dx al Often assigning a range of bits is a mixture of setting and clearing operations You can set or clear each bit individually or use a faster method of first clearing all the bits in the range then setting only those bits th
63. n length The first page page O starts at the first byte of memory the second page page 1 starts at byte 65536 the third page page 2 at byte 131072 and so on A computer with 640K of memory has 10 pages of memory The DMA controller can write to or read from only one page without being reprogrammed This means that the DMA controller has access to only 64K of memory at a time If you program it to use page 3 it cannot use any other page until you reprogram it to do so When DMA is started the DMA controller is programmed to place data at a specified offset into a specified page for example start writing at byte 512 of page 3 Each time a byte of data is written by the controller the offset is automatically incremented so the next byte will be placed in the next memory location The problem for you when programming these values is figuring out what the corresponding page and offset are for your buffer Most compilers contain macros or functions that allow you to directly determine the segment and offset of a data structure but not the page and offset Therefore you must calculate the page number and offset yourself Probably the most intuitive way of doing this is to convert the segment offset address of your buffer to a linear address and then convert that linear address to a page offset address The table below shows functions macros for determining the segment and offset of a buffer aa mme om C FP SEG FP OFF s FP SEG amp
64. n resistors High level output voltage ooooocononcconococononcncnnoncnnnan ano nono corner emere 4 2V min Low level output voltage 1 1111 aan 0 45V max High level input voltage iese sesse see ese ee ee ee ee ee ee ee ee ee ee ee 2 2V min 5 5V max Low level input voltage sees sesse ee ee ee eke ee ee ee ede ee ee ee ee ee 0 3V min 0 8V max Iniput load current OE OR ER EE OE EE 10 HA Input capacitance BEE RR N Re ee dt 10 pF Output capacitance COUT O AMZ eee iste 20 pF D A Converter 2 Module leere nunne Ge AA Ee Ge AD7237 Analog outpults EEEE TTE T GO OE ON 2 channels Resolution EE EE ER eo etia et deu eue mee ie See 12 bits uiputrandes a o DE EE BORA e 0 to 5 5 or O to 10 volts Relative accuracy EA EE ALA AA NG USA An t1 bit max Full Scal accuracy ii eon nuc Di ees 5 bits max NO MANN al Ty nce e eade otc 1 bit max Settling time enm eee Pede e RE 10 usec max Timer Counters Es ke retiro na CMOS 82C54 Three 16 bit down counters 2 cascaded 1 independent 6 programmable operating modes Counter input source ul u Laan ee ee ke ee Re AA Re ee External clock 8 MHz max or on board 8 MHz clock Counter outputs ees ee ee Re e Available externally used as PC interrupts Counter gate source Uu LL ee ee ke ee Re ee Re nn External gate or always enabled Miscellaneous Inputs Outputs PC bus sourced 5 volts 12 volts ground A 3 Pow
65. ne 4 6 BA 7 8255 PPI Control Word Write Only esse se ee ein ete GR Re ee ee GR ee Re Ge ee GR eeta Re ee ee 4 6 BA 8 8254 Timer Counter 0 Read Write se ee ER Re GE RA GR ee ER Re enne entente nennen nennen esent nes 4 8 BA 9 8254 Timer Counter 1 Read Write sesse ee se ann ener ener ee ee ee ee ee ee Re enne 4 8 BA 10 8254 Timer Counter 2 Read Write esses eene enne enne ee ee Re ee nne ee rennen 4 8 BA 11 8254 Control Word Write Only iese esse se ee ee AR ee GR ee ee RA ee RA G0 terere tentent entere 4 8 BA 12 D A Converter 1 LSB Write Only ese esse esse ee Be ee Ge Ge AG ee Ge AE Be A E noma Ge nn sese ette nenne 4 9 BA 13 D A Converter 1 MSB Write Only 0 0 cee esse ese ee ee ee ee GR ee AR ee GR Re ee ee GR ee Re ee 4 9 BA 14 Clear IRQ Status D A Converter 2 LSB Read Write sess 4 9 BA 15 Clear DMA Done Flag D A Converter 2 MSB Read Write essen 4 9 Programming the 406 546 eem EO e tede Ue EO EE RE abad 4 10 Clearing and Setting Bits in a POTE ese se ese se ee ee eren Ge ee ee be ee ee ee ee ee ee 4 10 AID CONVERSIONS sisa etn ROG HE EE EE EE RE EE N 4 12 Im ahzing the 8255 PPL iz i eed tote EE OR EE ER pp nen 4 12 Clearing the Boardi ette EE EE EE EE EE EE 4 12 selecting d Channel na AE eee EP nir ea e Eo ER droves 4 12 Setting the Gam inb ON 4 13 Enabling and Disabling the External Trigger ses
66. nsfers the written data from Port C through P2 to an external device BA 7 8255 PPI Control Word Write Only When bit 7 of this word is set to 1 a write programs the PPI configuration The PPI must be programmed so that Port B is a Mode 0 output port as shown below X don t care AKA ci n eds sad a a 1 rise Flag idi C Lower output Mode Select dE ola 00 mode 0 01 mode 1 f Port B 10 mode 2 0 output 1 input Port A 0 output Mode Select 1 input 0 mode 0 1 mode 1 Port Upper Mote v a PE 0 output 1 input Group A a a En EE bi J 4 6 The table below shows the control words for the 16 possible Mode 0 Port I O combinations The control words which set Port B as an input cannot be used on the DM406 or DM5406 8255 Port I O Flow Direction and Control Words Mode 0 Group A Port C Upper Output Output Output 10000000 128 80 Output Input 10000001 129 81 Output Input Output 10000010 130 82 Output Input Input 10000011 131 83 Output Output Output 10001000 136 88 Output Output Input 10001001 187 89 Input Input Output 10001010 138 BA input Input 139 8B 144 145 a 146 2 ESE 1582 98 153 99 8 8 128 129 130 136 137 139 8 144 145 146
67. ntil it flickers between the values listed in the table below Next set the voltage to 4 99634 volts and repeat the procedure this time adjusting TR2 until the data flickers between the values in the table Data Values for Calibrating Bipolar 10 Volt Range 5 to 5 volts Offset TR1 Converter Gain TR2 Input Voltage 4 99878V Input Voltage 4 99634V 1000 0000 0000 0111 1111 1110 A D Converted Data 1000 0000 0001 0111 1111 1111 Table 5 2 A D Converter Bit Weights Bipolar Twos Complement mv Ideal Input Voltage millivolts A D Bit Weight 1111 1111 1111 244 488 000 0000 0000 0100 0000 0000 0010 0000 0000 001 0000 0000 000 1000 0000 000 0100 0000 000 0010 0000 000 0001 0000 0000 0000 0000 0 00 000 5 5 Bipolar Range Adjustments 10 to 10 Volts To adjust the bipolar 20 volt range 10 to 10 volts set the jumpers on P6 so that they are installed across the 20V pins and BI Then set the input voltage to 5 0000 volts and adjust TR3 until the output matches the data in the table below Data Value for Calibrating Bipolar 20 Volt Range 10 to 10 volts TR3 Input Voltage 5 0000V A D Converted Data 0100 0000 0000 D A Calibration The D A circuit requires no calibration The table below provides for your reference a list of the input bits and their corresponding ideal output voltages for each of the three output ranges Ideal Output Voltage millivolts DA a vn Misch 1499756
68. odule Layout Showing Factory Configured Settings esses 1 3 8254 Timer Counter Sources Jumpers P3 essent nennen 1 4 8254 Timer Counter Circuit Block Diagram see se Re SR ee Ge ee ee ee eene ener non ee ee 1 5 Interrupt Channel Select Jumper PA oo eee cece se ee ee ee ee NG Ge RA GR AR GR nennen nente Re ee Se ee 1 6 Pulling Down the Interrupt Request Line see ee se ee ee ee Ge bwas sno nennen Re Ge ee Se ee Se ee 1 6 DMA Request DMA Acknowledge Channel Jumper P5 sse RA Re Ge ee eie 1 6 Analog Input Range and Polarity Jumper P6 sessi enne nennen nennen trennen 1 7 Single Ended Differential Analog Input Signal Type Jumpers P7 esee 1 7 DAC 1 Output Voltage Range Jumper P8 ee ee see se ee nn non conocen nc ono cn rennen nennen nennen 1 7 DAC 2 Output Voltage Range Jumper P9 ees see se se ee eee eene neon nennen trennen 1 7 Base Address Switch ST a a oaa nte tte ta e A tees etr tede e 1 8 Pull up Pull down Resistor Circuitry esses eren ener nennen recono trennen nnne ee nee 1 9 Adding Pull ups and Pull downs to Digital VO Lines esee 1 10 P2 VO Connector Pin Assignments se se se ee Ge ee nennen tereti non GR cn rennen treten nennen 2 4 Single Ended Input Connections 5 e 280er BEE DER EDE GER est RR PEE EES se Ke Ese Es ee 2 5 Differential Input Connections i
69. of 12 lines each Group A Port A 8 lines and Port C Upper 4 lines Group B Port B 8 lines and Port C Lower 4 lines The eight lines in Port B are used for on board functions The 16 remaining lines Port A Port C Lower and Port C Upper are available for your use You can use these ports in one of these three PPI operating modes Mode 0 Basic input output Lets you use simple input and output operation for a port Data is written to or read from the specified port Mode 1 Strobed input output Lets you transfer I O data from Port A in conjunction with strobes or hand shaking signals Mode 2 Strobed bidirectional input output Lets you communicate bidirectionally with an external device through Port A Handshaking is similar to Mode 1 These modes are detailed in the 8255 Data Sheet reprinted from Intel in Appendix C 3 5 3 6 CHAPTER 4 MODULE OPERATION AND PROGRAMMING This chapter shows you how to program and use your 406 5406 It provides a complete description of the I O map a detailed description of programming operations and operating modes and flow diagrams to aid you in programming The example programs included on the disk in your module package are listed at the end of this chapter These programs written in Turbo C Turbo Pascal and BASIC include source code to simplify your applications programming 4 1 4 2 Defining the VO Map The I O map for the 406 5406 is shown in Table
70. ot written to support it This is a complex concept and you do not need to understand it Just make sure that you do not call any DOS functions from within your ISR The one wrinkle is that unfortunately it is not obvious which library routines included with your compiler use DOS functions A rule of thumb is that routines which write to the screen or check the status of or read the keyboard and any disk I O routines use DOS and should be avoided in your ISR The same problem of reentrancy exists for many floating point emulators as well meaning you may have to avoid floating point real math in your ISR Note that the problem of reentrancy exists no matter what programming language you are using Even if you are writing your ISR in assembly language DOS and many floating point emulators are not reentrant Of course there are ways around this problem such as those which involve checking to see if any DOS functions are currently active when your ISR is called but such solutions are well beyond the scope of this discussion 4 19 The second major concern when writing your ISR is to make it as short as possible in terms of execution time Spending long periods of time in your ISR may mean that other important interrupts are being ignored Also if you spend too long in your ISR it may be called again before you have completed handling the first run This often leads to a hang that requires a reboot Your ISR should have this structure Pu
71. otors turn on when the digital lines control ling them are high The Port A lines of the 8255 automatically power up as inputs which can float high during the few moments before the board is first initialized This can cause the external devices connected to these lines to operate erratically By pulling these lines down when the data acquisition system is first turned on the motors will not switch on before the 8255 is initialized To use the pull up pull down feature you must first install resistor packs in any or all of the three locations around the 8255 labeled PA PCL and PCH PA takes a 10 pin pack and CL and CH take 6 pin packs Figure 1 12 shows a blowup of the resistor pack locations 000000 5 000000 9 00000000 9 00 00 9 ona 00 A oo 00 9 00 00 o 00000000 o o 000000 00000000 oo oo ool oo oo oo oo EPLD oo 00000000 y 000000 0000000000 74HCT688 H000000000 00000000000 00000000 7noooooooooo Jloonooooo n onoo POT PCH 006000000000000000000000000000000 a HO000000000000000000000000000000 rs 0900900 og 0000 9000000 lododoodoodo oo 00 5 0000009 Q ooo B o CM o m o N 000000 00000000 oo oo onm oo F72LOHYZ sn o o o o o oo oo oo 8205 oo Ua Made in U Fig 1 12 Pull up Pull down Resistor Circuitry 1 9 After the resistor packs are installed you must connect them into the circuit as pull
72. ou need to change any settings refer to the appropriate instructions in Chapter 1 Note that incompatible jumper settings can result in unpredictable module operation and erratic response The DM406 and DM5406 come with a stackthrough P1 connector The stackthrough connector lets you stack another module on top of your module plugging it into the data bus through the pins on the non component side of the module To install the module follow the procedures described in the computer manual and the steps below 1 Turn OFF the power to your system 2 Touch a metal rack to discharge any static buildup and then remove the board from its antistatic bag 3 Select the appropriate standoffs for your application to secure the module when you install it in your system two sizes are included with the module 4 Holding the module by its edges orient it so that the P1 bus connector s pin 1 lines up with pin 1 of the expansion connector onto which you are installing the module 5 After carefully positioning the module so that the card edge connector is resting on the expansion connector gently and evenly press down on the module until it is secured on the connector NOTE Do not force the module onto the connector If the module does not slide into place remove it and try again Wiggling the module or exerting too much pressure can result in damage to the 406 5406 or to the computer module 6 After the module is installed connect the cable to I
73. ough to hold all of the data you program the DMA controller to transfer Check to be sure that your buffer does not straddle a page boundary Remember that the number of bytes for the DMA controller to transfer is equal to twice the number of samples This is because each sample is two bytes in size If you terminate sampling before the DMA controller has transferred the number of bytes it was programmed for be sure to disable DMA by setting the mask bit in the mask register Make sure that the board is not running too fast for DMA transfers D A Conversions The two D A converters can be individually programmed to convert 12 bit digital words into a voltage in the range of 5 0 to 5 or 0 to 10 volts DACI is programmed by writing the LSB containing bits 0 7 to BA 12 and then writing the MSB bits 8 11 to BA 13 DAC2 is identical with the LSB written to BA 14 and the MSB written to BA 15 The following table lists the key digital codes and corresponding output voltages for the D A converters DIA Bit Weight sono om oo 4 26 Timer Counters An 8254 programmable interval timer provides three 16 bit 8 MHz timer counters for timing and counting functions such as frequency measurement event counting and interrupts Two of the timer counters are cascaded and can be used for the pacer clock The remaining timer counter is available for your use Figure 4 4 shows the timer counter circuitry p3 I CLKO l VO CONNECT
74. re cascaded so that they can be used for the pacer clock The pacer clock is described in Chapter 4 You can use the remaining timer counter TC2 for counting applications or cascade it to TCO and TC1 for timing applications Figure 3 2 shows the timer counter circuitry P3 l 1 0 CONNECTOR l P2 8 MHz l COUNTER CLK PIN 45 EXT CLK GATE EXT GATE 1 OUT TIMER COUNTER CLK 1 GATE m PIN 42 p OUT 1 TIMER COUNTER CLK 2 GATE OUT I TIC OUT 2 PIN 39 A TRIGGER IN TRIGGER PIN 46 INPUT EXT GATE 2 Fig 3 2 8254 Timer Counter Circuit Block Diagram 3 4 Each timer counter has two inputs CLK in and GATE in and one output timer counter OUT They can be programmed as binary or BCD down counters by writing the appropriate data to the command word as described in Chapter 4 The command word also lets you set up the mode of operation The six programmable modes are Mode 0 Event Counter Interrupt on Terminal Count Mode 1 Hardware Retriggerable One Shot Mode 2 Rate Generator Mode 3 Square Wave Mode Mode 4 Software Triggered Strobe Mode 5 Hardware Triggered Strobe Retriggerable These modes are detailed in the 8254 Data Sheet reprinted from Intel in Appendix C Digital I O Programmable Peripheral Interface The programmable peripheral interface PPI is used for digital I O functions This high performance TTL CMOS compatible chip has 24 digital I O lines divided into two groups
75. rough P2 46 When the trigger enable bit at BA 5 is disabled bursts are triggered through software The last group of pins GT2 select the gate source for timer counter 2 s gate input This jumper is provided so that you can disconnect the GATE input for the third timer counter from the EXT GATE 2 pin at the I O connector and tie the gate high if you are using the EXT GATE 2 pin as a trigger source GT2 TRIG PCLK CLK2 CLKO These labels not on board P3 Fig 1 2 8254 Timer Counter Sources Jumpers P3 P3 I 1 0 CONNECTOR P2 l l CLKO Ae 8 MHz CLOCK TIMER I PIN 45 EXT CLK COUNTER CLK O O um O 0 I GATE PIN 41 EXT GATE 1 l OUT I i I l l l N l I l TIMER l COUNTER CLK l l 1 l GATE l l PIN 42 OUT l one OUT 1 CLK2 l ES l l O O 1 l 8 MHz O 0 44 lt l TIMER l CLOCK COUNTER CLK o Oo 2 l l GATE I l OUT l PIN 44 T C OUT 2 l l l l l l PCLK l per O l An 26 PIN 39 TRIGGER IN TRIG I O l O O N TRIGGER INPUT EXT GATE 2 Fig 1 3 8254 Timer Counter Circuit Block Diagram P4 Interrupt Channel Select Factory Setting Jumper G Interrupt Channel Disabled This header connector shown in Figure 1 4 lets you connect any one of four software selectable interrupt sources to an interrupt channel IRQ2 highest priority channel through IRQ7 lowest priority channel To activate a channel you must install a jumper verti
76. rs can be programmed to operate in one of six modes depending on your application The following paragraphs briefly describe each mode Mode 0 Event Counter Interrupt on Terminal Count This mode is typically used for event counting While the timer counter counts down the output is low and when the count is complete it goes high The output stays high until a new Mode 0 control word is written to the timer counter Mode 1 Hardware Retriggerable One Shot The output is initially high and goes low on the clock pulse following a trigger to begin the one shot pulse The output remains low until the count reaches 0 and then goes high and remains high until the clock pulse after the next trigger Mode 2 Rate Generator This mode functions like a divide by N counter and is typically used to generate a real time clock interrupt The output is initially high and when the count decrements to 1 the output goes low for one clock pulse The output then goes high again the timer counter reloads the initial count and the process is repeated This sequence continues indefinitely Mode 3 Square Wave Mode Similar to Mode 2 except for the duty cycle output this mode is typically used for baud rate generation The output is initially high and when the count decrements to one half its initial count the output goes low for the remainder of the count The timer counter reloads and the output goes high again This process repeats indefinitely Mode 4 So
77. se ese se ee se ee ee Re Gee RA ono conc GR GR Re co eene nennen nennen 4 13 Enabling and Disabling Interrupts uses ses ses eee tette ertt tea teet tee este stone 4 13 Types Of uci da daa 4 13 Starting an IAN ON 4 15 Monitoring Conversion Status DMA Done or End of Convert eese 4 15 Reading the Converted Data onse RE tere o tee epe en Ron 4 16 Programming the Pacer Clock MA Ira EER EE EE N 4 17 tei nare nite dr e t e E a ORE POE n ORE REESE 4 18 What Isan Interrupt iii ha NANG I ARR eR OE EE ON 4 18 Interrupt Request Lines RE EE AE EE eon EE EO ES 4 18 8259 Programmable Interrupt Controller se se ee Ge ee Ge ee ee ee Ge enne eren 4 18 Interrupt Mask Register IMR ise einige 8 o EK PEE ore OR Ri ER He Seg Ek 4 18 End of Interrupt EOD Command sees sees se es sees se es Ge see Ge Se Ge Ee e Ge GE Ee GR Ge Ge Ge SR Ge Ee SR Se E oe ed EE 4 18 What Exactly Happens When an Interrupt Occurs eise sesse ese ee see se ee ee Sk ee ee Ge ee ee ee ee ee Ge ee ee Re en 4 18 Using Interrupts in Your Programs tiere ten rte rhe re ete ahnen sn nn hs 4 19 Writing an Interrupt Service Routine ISR see se oe se ee Ge Se Ge Nas sans ener SR non neon entrent 4 19 Saving the Startup Interrupt Mask Register IMR and Interrupt Vector eese 4 20 Restoring the Startup IMR and Interrupt Vector iese ese se see se ee be GR Ge RA GR AR Re Ge Se nennen trennen 4 21 Common Interrupt Mis
78. set at TRIG on P3 If the external trigger enable bit D6 at BA 5 is disabled the busrt will be software triggered If this bit is enabled the burst will be hardware triggered The pacer clock internal or external sets the time between each sample in the burst Burst is used when you want one sample from a specified number of channels for each trigger Figure 4 5 shows a timing diagram for burst sampling Often the burst mode can be used for near simultaneous sampling from multiple input channels For critical simultaneous sampling applications a simultaneous sample and hold board can be used SS4 four channel and SS8 eight channel boards are available from Real Time Devices BURST TRIGGER TL fL o BURST CLOCK TUUL SLI SL LLL SAMPLE TAKEN FLILII FLILII SAMPLED CHANNEL Erz aia Fig 4 5 Timing Diagram Burst Starting an A D Conversion Software triggered single conversions are started by writing to the START CONVERT port at BA 0 The value you write is irrelevant For single conversions you must write to this port to initiate every conversion Multiple conversions are triggered by the pacer clock or by a software or hardware trigger burst mode They are started by the first pulse present after the trigger has been enabled Monitoring Conversion Status DMA Done or End of Convert The A D conversion status can be monitored through the DMA done flag or through the end of convert EOC bit in the STATUS port
79. sh any processor registers used in your ISR Most C and Pascal interrupt routines automatically do this for you Put the body of your routine here Clear the interrupt bit on the 406 5406 by writing any value to BA 14 Issue the EOI command to the 8259 interrupt controller by writing 20H to port 20H Pop all registers pushed on entrance Most C and Pascal interrupt routines automatically do this for you The following C and Pascal examples show what the shell of your ISR should be like In C void interrupt ISR void Your code goes here Do not use any DOS functions outportb BaseAddress 14 0 Clear 406 5406 interrupt outportb 0x20 0x20 Send EOI command to 8259 In Pascal Procedure ISR Interrupt begin Your code goes here Do not use any DOS functions Port BaseAddress 14 0 Clear 406 5406 interrupt Port 20 20 Send EOI command to 8259 end Saving the Startup Interrupt Mask Register IMR and Interrupt Vector The next step after writing the ISR is to save the startup state of the interrupt mask register and the interrupt vector that you will be using The IMR is located at I O port 21H The interrupt vector you will be using is located in the interrupt vector table which is simply an array of 256 bit 4 byte pointers and is located in the first 1024 bytes of memory Segment 0 Offset 0 You can read this value directly but it is a better practi
80. sition and control system Ultra compact for embedded and portable applications each 406 5406 series module features 8 differential or 16 single ended analog input channels 12 bit 5 microsecond analog to digital converter with 100 kHz throughput 5 10 or 0 to 10 volt input range Programmable gains of 1 2 4 amp 8 1 10 amp 100 optional Three conversion modes Programmable automatic channel scanning Programmable burst mode DMA transfer Trigger in and trigger out for external triggering or cascading boards 16 TTL CMOS 8255 based digital I O lines which can be configured with pull up or pull down resistors Three 16 bit timer counters two cascaded for pacer clock Two 12 bit digital to analog output channels with dedicated grounds 2 version 5 0 to 5 or 0 to 10 volt analog output range 5 volts only operation DM5406 only Example programs in BASIC Turbo Pascal and Turbo C and diagnostics software Note that the difference between the DM406 and DM5406 is the power supply requirements the DM406 requires 12 and 5 volts and the DM5406 requires 5 volts only The following paragraphs briefly describe the major functions of the module A more detailed discussion of module functions is included in Chapter 3 Hardware Operation and Chapter 4 Operation and Programming The board setup is described in Chapter 1 Module Settings Analog to Digital Conversion The analog to digital A D circuitry receives
81. t decides if the new request should supersede the one in progress or if it has to wait until the one in progress is done This prioritizing allows an interrupt to be interrupted if the second request has a higher priority The priority level is based on the number of the IRQ IRQO has the highest priority IRQ1 is second highest and so on through IRQ7 which has the lowest Many of the IRQs are used by the standard system resources IRQO is used by the system timer IRQ is used by the key board IRQ3 by COM2 IRQ4 by COMI and IRQ6 by the disk drives Therefore it is important for you to know which IRQ lines are available in your system for use by the module 8259 Programmable Interrupt Controller The chip responsible for handling interrupt requests in the PC is the 8259 Programmable Interrupt Controller To use interrupts you need to know how to read and set the 8259 s interrupt mask register IMR and how to send the end of interrupt EOI command to the 8259 Interrupt Mask Register IMR Each bit in the interrupt mask register IMR contains the mask status of an IRQ line bit O is for IRQO bit 1 is for IRQ1 and so on If a bit is set equal to 1 then the corresponding IRQ is masked and it will not generate an interrupt If a bit is clear equal to 0 then the corresponding IRQ is unmasked and can generate interrupts The IMR is programmed through port 21H ima mod imos nad mod nad ina IRad ion For all bits 0 IRQ unmasked en
82. takes ina bre err RERO a han 4 21 Data Transfers Using DMA iii heart en EHER 4 21 Choosing a DMA Channel gg ni catene ore eret REG ERE GE Odes 4 21 Allocating a DMA B ffer 5 en tem nre RE t he e D e CER pe nme bill 4 21 Calculating the Page and Offset of a Buffer ooncnnonncninonocnnonconononcnncnnnonnc crono no conc nennen nennen nnne etre nennen 4 22 Setting the DMA Page ESE ete PER ER AO ES 4 23 The DMA Controller si ie e RU RD Seu NG qe t a ERR iue etu etii 4 24 DMA Mask Register eec EC Er eter D RE EUR URGERE D e Y EE TUER RUE 4 24 DMA Mode Register ie dada 4 25 Programming the DMA Controller 5 3 ntt tr e HERR b DRR ED Ko RR ER BE sh spe 4 25 Programming the 406 5406 for DMA ee ee se se ee Se ee ee ee ee nennen nn cnn non een enne on non treten nennen trennen 4 25 Monitoring tor DMA Done ii Ese utet der ER o REOR UD OE rd 4 25 Common DMA Problems ngaa GATING e Pe Re ER RE oui EEE 4 26 D A COnVersIOnDS 4 ire ait eet ed te Ee e OE et E d ER Pete eR get etta 4 26 BESORG 4 27 Digital MO iaa ai 4 28 Example Programs and Flow Diagrams sesse sees sees ee see ee eke Se ee Ge ee Se nono nein net retener eene sonne san 4 29 Cand Pascal Programs se Bee RE ch EE 2 AI gU UOI nene E 4 29 BASIC BEE OE ER eR oed RE EE OR 4 29 al ABIE EE NE ette ants EE EE EE OE N EA Roe NAN 4 31 Single Convert Flow Diagram Figure 4 8 sessi nenne 4 31 DMA Flow Diagram Figure 4 9 iese sees see see
83. the DMA controller as shown in the table below The location of this register depends on the DMA channel being used DMA Channel Location of Page Register 83 131 82 130 4 23 The DMA Controller The DMA controller is a complex chip that occupies the first 16 bytes of the PC s I O port space A complete discussion on how it operates is beyond the scope of this manual only relevant information is included here The DMA controller is programmed by writing to the DMA registers in your PC The table below lists these registers Note that when you write 16 bit values to any of these registers such as to the Count registers you must write the LSB first followed by the MSB If you are using DMA channel 1 write your page offset and count to ports 02H and 03H if you are using channel 3 write your page offset and count to ports 06H and 07H The page offset is simply the offset that you calculated for your buffer see discussion above Count indicates the number of bytes that you want the DMA controller to transfer Remember that each digitized sample from the DM5406 consists of 2 bytes so the count that you write to the DMA controller should be equal to the number of samples x 2 1 The mask register and mode register are described below The clear byte pointer sets an internal flip flop on the DMA controller that keeps track of whether the LSB or MSB will be sent next to registers that accept both LSB and MSB Ordinarily you never ne
84. the DMA done bit BA 0 bit 1 BA 3 Scan Burst Read Write Bits DO through D3 program the number of consecutive analog input channels to be scanned or bursted The channel scan or burst begins with the channel selected at BA 5 Bits D4 and D5 program one of four IRQ sources available for generating interrupts The IRQ channel is set by the jumper on P4 The IRQ is enabled at bit 7 BA 4 5 Bits D6 and D7 enable the scan or burst mode Each time you start a new scan or burst you should first reset the board by writing to BA 2 or by programming these bits to disable scan burst and then follow that step by enabling the scan or burst mode This ensures that the EPLD scan burst counter circuitry is cleared A read tells you the bit settings DUM AG EED IRQ Source Select 00 A D start convert 01 DMA done 10 trigger P3 TRIG 11 pacer clock P3 PCLK Number of Channels Scanned 0000 1 chamnel 0001 2 channels 0010 3 channels 0011 4 channels 0100 5 channels 0101 6 channels 0110 7 channels 0111 8 channels 1000 9 channels 1001 10 channels 1010 11 channels 1011 12 channels 1100 13 channels 1101 14 channels 1110 15 channels 1111 2 16 channels Scan Burst Enable 00 disabled 01 reserved 10 scan enabled 11 burst enabled BA 4 PPI Port A Digital VO Read Write Transfers the 8 bit Port A digital input and digital output data between the board and an external de
85. tics software User s manual If any item is missing or damaged please call Real Time Devices Customer Service Department at 814 234 8087 If you require service outside the U S contact your local distributor Module Accessories In addition to the items included in your module package Real Time Devices offers a full line of software and hardware accessories Call your local distributor or our main office for more information about these accessories and for help in choosing the best items to support your module s application Application Software and Drivers Our custom application software packages provide excellent data acquisition and analysis support Use SIGNAL MATH for integrated data acquisition and sophisticated digital signal processing and analysis and SIGNAL VIEWTM for real time monitoring and data acquisition rtdLinx and rtdLinx NB drivers provide full featured high level interfaces between the 406 5406 and custom or third party software including Labtech Note book Notebook XE and LT Control rtdLinx source code is available for a one time nominal fee Hardware Accessories Hardware accessories for the 406 55406 include the MX32 analog input expansion board which can expand a single input channel on your module to 16 differential or 32 single ended input channels the OP series optoisolated digital input boards the MR series mechanical relay output boards the OR16 optoisolated digital input mechanical relay output
86. to program the source of your interrupts do that next For example if you are using the program mable interval timer to generate interrupts you must program it to run in the proper mode and at the proper rate Finally clear the bit in the IMR for the IRQ you are using This enables interrupts on the IRQ 4 20 Restoring the Startup IMR and Interrupt Vector Before exiting your program you must restore the interrupt mask register and interrupt vectors to the state they were in when your program started To restore the IMR write the value that was saved when your program started to I O port 21H Restore the interrupt vector that was saved at startup with either DOS function 35H get interrupt vector or use the library routine supplied with your compiler Performing these two steps will guarantee that the interrupt status of your computer is the same after running your program as it was before your program started running Common Interrupt Mistakes Remember that hardware interrupts are numbered 8 through 15 even though the corresponding IRQs are numbered 0 through 7 Two of the most common mistakes when writing an ISR are forgetting to clear the interrupt status of the 406 5406 and forgetting to issue the EOI command to the 8259 interrupt controller before exiting the ISR Data Transfers Using DMA Direct Memory Access DMA transfers data between a peripheral device and PC memory without using the processor as an intermediate
87. uld have the G jumper installed The rest should be disconnected Whenever you operate a single module the G jumper should be installed Whenever you operate the module with interrupt sharing disabled the G jumper should be removed vu U BR B D D EED gt oQ DO NO O 50 ND O NGO O db ww ND Fig 1 4a Fig 1 4b Factory Setting IRQ3 Selected Fig 1 4 Interrupt Channel Select Jumper P4 INT IRQ STATUS SOURCE INTERRUPT REGISTER INTERRUPT CLR Fig 1 5 Pulling Down the Interrupt Request Line P5 DMA Request DMA Acknowledge Channel Factory Setting Disabled This header connector shown in Figure 1 6 lets you select channel 1 or channel 3 for DMA transfers Both the DMA request DRQ and DMA acknowledge DACK lines must be jumpered for the same channel This is done by placing a jumper across the selected DRQ channel and a jumper across the same DACK channel The factory setting is disabled as shown in Figure 1 6a Figure 1 6b shows the module set for DMA transfers on channel 1 Note that if any other device in your system is already using the DMA channel you select channel contention will result causing erratic operation U UU al al O o o gt o gt xa QO Y QO o O Oo A o O WO A Fig 1 6a Fig 1 6b DMA Channel 1 Factory Setting Selected Fig 1 6 DMA Request DMA Acknowledge Channel Jumper P5 P6 Analog Input Voltage Range and Polarity Factory Setting 5 volts
88. up to 8 differential or 16 single ended analog inputs and converts these inputs into 12 bit digital data words which can then be read and or transferred to PC memory The module is factory set for single ended input channels The analog input voltage range is jumper selectable for bipolar ranges of 5 to 5 volts or 10 to 10 volts or a unipolar range of 0 to 10 volts The module is factory set for 5 to 5 volts Overvoltage protection to 35 volts is provided at the inputs The high performance A D converter supports fast settling software programmable gains of 1 2 4 and 8 A D conversions are performed in 5 microseconds and the maximum throughput rate is 100 kHz Conversions are controlled through software by an on board pacer clock or by an external trigger brought onto the board through the I O connector The converted data can be transferred to PC memory in one of two ways through the PC data bus or by using direct memory access DMA The mode of transfer is software selectable and the DMA channel is chosen by jumper settings on the board The PC data bus is used to read and or transfer data one byte at a time to PC memory In the DMA transfer mode you can make continuous transfers directly to PC memory without going through the processor Digital to Analog Conversion The digital to analog D A circuitry features two independent 12 bit analog output channels with individually jumper selectable output ranges of 5 to 5 volts O
89. vice A read transfers data from the external device through P2 and into PPI Port A a write transfers the written data from Port A through P2 to an external device BA 5 PPI Port B Channel Gain Board Functions Select Read Write A write programs the analog input channel and gain and enables the IRQ and external trigger Note that because some of the Port B bits are built into the EPLD writing to the 8255 control word does not automatically set the Port B bits to zero as it does in a typical 8255 configuration Therefore you must write a zero to Port B to ensure all bits are zero whenever you desire to reset this port Reading this register shows you the current settings IRQ Enable Analog Input 0 IRQ disabled Channel Select 1 IRQ enabled Channel Gain 0000 channel 1 0001 channel 2 1000 channel 9 1001 channel 10 EXT PCK EXT TRIG 00 x1 0010 channel 3 1010 channel 11 Enable 012x2 0011 channel 4 1011 channel 12 0 Disabled 10 x4 0100 channel 5 1100 channel 13 1 Enabled 11 x8 0101 channel 6 1101 channel 14 4 5 0110 channel 7 0111 channel 8 1110 channel 15 1111 channel 16 BA 6 PPI Port C Digital I O Read Write Transfers the two 4 bit Port C digital input and digital output data groups Port C Upper and Port C Lower between the board and an external device A read transfers data from the external device through P2 and into PPI Port C a write tra

DM406/DM5406 User`s Manual - RTD Embedded Technologies, Inc.

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