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78K0R/Kx3 16-bit Single-Chip Microcontrollers Flash Memory

1. Checksum error The checksum of the transmitted command frame or data frame does not match Protect error An already prohibited flag is to be enabled Negative acknowledgment NACK Command frame data is abnormal such as invalid data length LEN or no ETX Time out error C The status frame or data frame was not received within the specified time Abnormal MRG10 error termination D MRG11 error E Write error Writing security data has failed 102 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 14 4 Flowchart Security Set a com mand processing J y Wait from previous frame reception until next command transmission tcom y Command frame transmission processing Security Set Status ACK Timed out twri3 MAX Yes Time outerror C Wait from previous frame reception until next data frame transmission ER y Data frame transmission processing Security data Abnorm altermination ei Status frame received Status Timed out Im ra MAX Yes Va U Time outerror C Y Abnormaltermination ei S Status recei Status ACK Abnorm altermination ei Normalcom pletion A Applica
2. CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 10 44 D D78F1162 D78F1163 D78F1164 D78F1165 D78F1166 Application Note U18433EJ2V0AN 47 48 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING Device name list 4 4 Device name D78F1167 D78F1168 Application Note U18433EJ2V0AN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 10 Version Get Command 5 10 1 Description This command is used to acquire information on the 78KOR Kx3 device version and firmware version The device version value is fixed to OOH Use this command when the programming parameters must be changed in accordance with the 78KOR Kx3 firmware version Caution The firmware version may be updated during firmware update that does not affect the change of flash programming parameters at this time update of the firmware version is not reported Example Firmware version and reprogramming parameters Programming Firmware version parameters Upgrade that requires changing of flash V1 00 Parameter A programming parameters E V2 00 Upgrade of items that does not affect the Parameter B change of flash programming parameters E V3 00 5 10 2 Command frame and status frame Figure 5 24 shows the format of a command frame for the Version Get command and Figure 5 25 shows the status frame for the command Figure 5 24 Version Get Command Frame from Programmer to 78KOR Kx3 SOH LEN COM SUM ETX C5H 01H 01H Ch
3. Start of time measurement until start of reset command processing to min Initialization of UART hardware Has specified time elapsed until start of reset command processing Normal termination Application Note U18433EJ2VOAN 21 CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 4 2 Sample program The following shows a sample program for mode setting processing RRR RRR REKKEEKR ER ER RE RE ERE kikki ER KER REE KER RR RR EKER KEE RRA ARA RRA connect to Flash device ed Za ZA ERROR ER ERE REE KERR EKER EKER KER ER EKER KER RR RAR RARA AREA ARA RRA AY u16 fl con dev void extern void init_fl_uart void extern void init fl csi void extern void stop UARTO0 void ul6 rc NO_ERROR SRMKO true disable UART Rx INT UARTEO false disable UART H W stop UART0 TXD RxD Hi Z pFL_RES low RESET low pmFL_FLMDO PM_OUT FLMDO Low output pFL_FLMDO low FL VDD HI VDD high fl wait tDP wait pFL FLMDO hi FLMDO high fl wait tPR wait pFL RES hi RESET high rc check_ready_pulse check READY PULSE from target device if re return rc pulse width timing error start flto t01 start t01 wait timer init fl uart Initialize UART h w for Flash device control UARTEO true enable UART h w SRIFO false clear UART Rx IRQ flag SRMKO false enable UART Rx INT wh
4. To Target Board 123 APPENDIX A CIRCUIT DIAGRAMS REFERENCE Figure A 2 Reference Circuit Diagram of Programmer and 78KOR Kx3 Target Board FOKOR KxS Flash programmer sample application TARGET BOARD TOKERY Los From MAIN BOARD Application Note U18433EJ2VOAN 125 For further information please contact NEC Electronics Corporation 1753 Shimonumabe Nakahara ku Kawasaki Kanagawa 211 8668 Japan Tel 044 435 5111 http www necel com America NEC Electronics America Inc 2880 Scott Blvd Santa Clara CA 95050 2554 U S A Tel 408 588 6000 800 366 9782 http www am necel com Europe NEC Electronics Europe GmbH Arcadiastrasse 10 40472 D sseldorf Germany Tel 0211 65030 http www eu necel com Hanover Office Podbielskistrasse 166 B 30177 Hannover Tel 0511 33 40 2 0 Munich Office Werner Eckert Strasse 9 81829 M nchen Tel 0 89 92 10 03 0 Stuttgart Office Industriestrasse 3 70565 Stuttgart Tel 0 711 99 01 0 0 United Kingdom Branch Cygnus House Sunrise Parkway Linford Wood Milton Keynes MK14 6NP U K Tel 01908 691 133 Succursale Francaise 9 rue Paul Dautier B P 52 78142 Velizy Villacoublay C dex France Tel 01 3067 5800 Sucursal en Espana Juan Esplandiu 15 28007 Madrid Spain Tel 091 504 2787 Tyskland Filial Taby Centrum Entrance S 7th floor 18322 Taby Sweden Tel 08 638 72 00 Filiale Italiana Via Fabio Filzi 25 A
5. lt 6 gt lt 7 gt lt 8 gt Waits from the previous frame reception until the next command processing starts wait time tcom The low level is output data OOH is transmitted at 9 600 bps Wait state wait time t12 The low level is output data OOH is transmitted at 9 600 bps Wait state wait time t2c The Reset command is transmitted by command frame transmission processing A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twro MAX The status code is checked When ST1 ACK Normal completion A When ST1 ACK The retry count trs is checked The sequence is re executed from lt 5 gt if the retry count is not over If the retry count is over the processing ends abnormally B 6 4 3 Status at processing completion Status at Processing Completion Status Code Description Normal Normal acknowledgment The command was executed normally and synchronization completion A ACK between the programmer and the 78KOR Kx3 has been established Abnormal Checksum error The checksum of the transmitted command frame does not termination B match Negative acknowledgment Command frame data is abnormal such as invalid data length NACK LEN or no ETX Time out error C The status frame was not received within the specified time Application Note U18433EJ2VOAN 59 CHAP
6. 256 bytes 1 byte 1 byte Table 4 1 Description of Symbols in Each Frame Description Command frame header Data frame header Data length information 00H indicates 256 Command frame COM command information length Data frame Data field length Command number Checksum data for a frame Obtained by sequentially subtracting all of calculation target data from the initial value 00H in 1 byte units borrow is ignored The calculation targets are as follows Command frame LEN COM all of command information Data frame LEN all of data Footer of data frame other than the last frame Command frame footer or footer of last data frame The following shows examples of calculating the checksum SUM for a frame Application Note U18433EJ2V0AN 27 CHAPTER 4 COMMAND DATA FRAME FORMAT Command frame No command information is included in the following example of a Status command frame so LEN and COM are targets of checksum calculation SOH LEN COM SUM ETX 01H 01H 70H Checksum 03H Checksum calculation targets For this command frame checksum data is obtained as follows OOH initial value 01H LEN 70H COM 8FH Borrow ignored Lower 8 bits only The command frame finally transmitted is as follows SOH LEN COM SUM ETX 01H 01H 70H 8FH 03H Data frame To transmit a data frame as shown below LEN and D1 to
7. NACK LEN or no ETX Note Time out error C Data frame reception was timed out With the 78KOR Kx3 this command also results in errors in the following cases e Command information D01 DO2H DO2L D03 is invalid e The command frame includes the checksum error The data length of the command frame LEN is invalid The footer of the command frame ETX is missing The Reset command was not detected after setting the baud rate and receiving command frame data for 16 times Note If a time out error has occurred execute a hardware reset and re set to the flash memory programming mode Application Note U18433EJ2VOAN 63 CHAPTER 6 UART COMMUNICATION MODE 6 5 4 Flowchart 64 processing bou Rate Set v Wait from previous frame reception until next command transmission tcom Y Command frame transmission processing Baud Rate Set Wait from command frame transmission until Reset command transmission twrio Y Command frame transmission processing Reset No Status frame received Yes Kees completion oy Application Note U18433EJ2V0AN No twro MAX Time out error C gt J CHAPTER 6 UART COMMUNICATION MODE 6 5 5 Sample program The following shows a sample program for Baud Rate Set command processing KKK KKK KK K RK RK K K K KER KEK KR KR AS E7 Se
8. X Yes Checksum data SUM received No A lt lt Timedout gt M toa MAX H 7 x Reception time out error X J E Ba Yes Data frame footer Last data frame footer ETX 03H received or footer other than those of last data Lee frame ETB 17H No p Timed ou gt e on MAX Yes z Y y Reception time out error No J lt Checksum error S No ge X a X End of data frame V e Checksum error reception Ka PO Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 4 Reset Command 6 4 1 Processing sequence chart Reset command processing sequence Programmer 78KOR Kx3 e lt 2 gt Low level output 00H 9 600 bps lt 3 gt Wait t12 lt 4 gt Low level output 00H 9 600 bps E lt 5 gt Wait tac lt 6 gt Reset command frame transmission Es eel Status frame received within specified time Gan error C Mea lt 8 gt Status frame reception m So ACK other than ACK W than ACK WS count over ACK Yes No No K je Go to lt 5 gt y ae termination ee Bl A Note Do not exceed the retry count for the reset command transmission up to 16 times 58 Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 4 2 Description of processing sequence lt 1 gt lt 2 gt lt 3 gt lt 4 gt lt b gt
9. read 6 2 Data Frame Transmission Processing Flowchart 4 3 Data Frame Reception Processing The status frame silicon signature data frame version data frame and checksum data frame are received as a data frame For details of the flowchart of processing to receive data frames read 6 3 Data Frame Reception Processing Flowchart Application Note U18433EJ2VOAN 29 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 1 Status Command 5 1 1 Description The 78KOR Kx3 automatically transmits a status frame within a given period of time to report its operation status after issuing various commands such as write or erase After the programmer has issued each command if the Status command frame cannot be received normally by the 78KOR Kx3 due to problems based on communication or the like the status setting will not be performed with the 78KOR Kx3 As a result a busy response FFH not the status frame may be received In such a case retry each command 5 1 2 Status frame Figure 5 1 shows the status frame corresponding to each command Figure 5 1 Status Frame for Status Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H n ST1 ane STn Checksum 03H Remarks 1 ST1 to STn Status 1 to Status n 2 The length of a status frame varies according to each command such as write or erase to be transmitted to the 78KOR Kx3 30 Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PRO
10. termination B match Negative acknowledgment Command frame data is abnormal such as invalid data length NACK LEN or no ETX Time out error C The status frame or data frame was not received within the specified time Data frame error D The checksum of the data frame received as version data does not match 94 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 12 4 Flowchart Version Get Ki command processing Y Wait from previous frame reception until next command transmission tcom Y Command frame transmission processing Version Get Status frame received No twr12 MAX Yes F Time out error C gt Abnormal termination B Data frame version data received tro2 MAX Normal data frame A d Time out error C d 8 e Data frame error D J Normal completion A NE a Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 12 5 Sample program The following shows a sample program for Version Get command processing AEREA RE RARE RAR ERE RRA RR RRA RAR ERE KER RE RE KEKE ERE RE KEKE RR RR RR RARAS EY Get device firmware version command El d SE AEREA RARA RARE RRA RARA RARA ARRE RRA RAR RR RARE REE RR RR RR RR RARAS 1 u8 buf pointer to version date save area r ul6 error code VA AER
11. 13 CHAPTER 1 FLASH MEMORY PROGRAMMING 1 4 Information Specific to 78KOR Kx3 The programmer must manage product specific information such as a device name and memory information Table 1 2 shows the flash memory size of the 78KOR Kx3 and Figure 1 4 shows the configuration of the flash memory Table 1 2 Flash Memory Size of 78KOR Kx3 Device Name Flash Memory Size 78KOR KE3 HPD78F 1142 1PD78F1143 uPD78F1144 uPD78F1145 uPD78F1146 78KOR KF3 uPD78F1152 uPD78F1153 uPD78F1154 4PD78F1155 4PD78F1156 78K0R KG3 4PD78F1162 14PD78F1163 1PD78F1164 4PD78F1165 4PD78F1166 4PD78F1167 4PD78F1168 14 Application Note U18433EJ2VOAN CHAPTER 1 FLASH MEMORY PROGRAMMING 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB 2 KB r cack r ak lt Fig lt Block number gt Block COH Block BFH Block 80H Block 7FH Block 60H Block 5FH Block 40H Block 3FH Block 30H Block 2FH Block 20H Block 1FH Block 00H ure 1 4 Flash Memory Configuration lt Address gt lt Flash memory size gt 60000H 5FFFFH 40000H 3FFFFH 30000H OFFFFH 20000H 1FFFFH 18000H 17FFFH 10000H OFFFFH Remark Each block consists of 2 KB this figure only illustrates some parts of entire blocks in the flash memory Application Note U18433EJ2V0AN
12. 15 CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 1 Programmer Control Pins Table 2 1 lists the pins that the programmer must control to implement the programmer function in the user system See the following pages for details on each pin Table 2 1 Pin Description 78KOR Kx3 Procedure When Programmer Connecting Signal Name VO Pin Function Pin Name Mode signal FLMDO Voo voltage generation monitoring Von EVob 0 1 Note AVREF 0 1 Ground Vss EVss 0 1 AVss CLK Clock output RESET Reset signal RESET SI RxD Receive signal TOOLO SO TxD Transmit signal SCK Transfer clock Note When performing off board write operation connect this pin to Vpp When performing on board write operation supply the same power as in normal operation mode At this time make sure to set so that Von gt AVREF 0 1 Remark V Be sure to connect the pin x The pin does not have to be connected For the voltage of the pins controlled by the programmer refer to the user s manual of the device that is subject to flash memory programming 16 Application Note U18433EJ2VOAN CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 2 Details of Control Pins 2 2 1 Flash memory programming mode setting pin FLMDO The FLMDO pin is used to control the operating mode of the 78KOR Kx3 The 78KOR Kx3 operates in flash memory programming mode when a specific voltage is supplied to this pin and a reset
13. 6 8 1 Processing sequence chart Programming command processing sequence Programmer 78KOR Kx3 Wait from previous frame reception tcom until next command transmission A lt 2 gt Programming command frame transmission Ge y Time out ____ A gt EE Time out check for _ occurs lt 3 gt twr3 MAX status frame reception i Time out error C gt Status frame VS within specified time Status frame reception Reception status N ACK other than ACK Al Wait from previous frame reception s until next data frame transmission tros kg N N lt 6 gt Data frame user data transmission v Time out Time out check for lt gt z HES status frame reception twra MAX _ Status frame received within specified time x Time out error C 7 A EN lt 8 gt Status frame reception xe N v Reception status ST1 E Other than ACK ACK other than ACK 7 z X E L Abnormal termination B ACK SCH se E wee a Reception status ST2 ES ACK other than ACK J eg ENS ACK Abnormal termination D SS we J a No Go to lt 5 gt Yes Time out _____ oe Time out check for DS Ge X e occurs el status frame reception NUMBer o Ke blocks __ Status frame received within specified time Y X Eg A Timeout error C ra E a Status frame reception P Reception status ACK other than ACK Pi O
14. FLC_NO_ERR break continue case FLC_DFTO_ERR return rc break case C default return rc break case B RE khkkkkkkkkkkk kkk kkk KER ERE REE RAR RARE RRA RARA RAR RAS send data frame security setting data FERRERA RARE RARE RAR RE RARA RAR RARE RE RR AR RARA RAS fl wait tFD4 put dfrm ua 6 fl_txdata_frm true send securithi setting data re get_sfrm_ua fl_ua_sfrm tWT14 MAX get status frame re get_sfrm_ua fl_ua_sfrm tWT14 MAX 100 get status frame 100us is overhead switch rc case FLC_NO_ERR break continue case FLC_DFTO_ERR return rc break case C 104 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE default return rc break case B RR RR RRR RRKE KEKE RE REE RE ER RARA RRE R ARA RR RAR RRA JE Check internally verify St RRR RR RRRRKE KEKE ERE EERE RRR RARE REA EERE RR RAR RARAS re get_sfrm_ua fl_ua_sfrm tWT15_MAX get status frame switch rc case FLC_NO_ERR return rc break case A case FLC_DFTO_ERR return rc break case C default return rc break case B return rc Application Note U18433EJ2VOAN 105 CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS This chapter describes the parameter characteristics between the programmer and the 78KOR Kx3 in the flash memory programming mode Be sure to refer to the user s manual of the 78KOR Kx3 for electrical spe
15. SAH SAM SAL Verify start addresses EAH EAM EAL Verify end addresses Figure 5 16 Status Frame for Verify Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 a Checksum 03H Remark ST1 a Command reception result 5 7 3 Data frame and status frame Figure 5 17 shows the format of a frame that includes data to be verified and Figure 5 18 shows the status frame for the data Figure 5 17 Data Frame of Data to Be Verified from Programmer to 78KOR Kx3 STX LEN Data SUM ETX ETB 00H to FFH 02H Verify Data Checksum 03H 17H 00H 256 Remark Verify Data User program to be verified 38 Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING Figure 5 18 Status Frame for Data Frame from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 02H ST1 b ST2 b Checksum 03H Remark ST1 b Data reception check result ST2 b Verify result Note Even if a verify error occurs in the specified address range ACK is always returned as the verify result The status of all verify errors are reflected in the verify result for the last data Therefore the occurrence of verify errors can be checked only when all the verify processing for the specified address range is completed Read 6 9 Verify Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the f
16. b Data reception check result ST2 b Write result 36 Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 6 4 Completion of transferring all data and status frame Figure 5 14 shows the status frame after transfer of all data is completed Figure 5 14 Status Frame After Completion of Transferring All Data from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 c Checksum 03H Remark ST1 c Internal verify result Read 6 8 Programming Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program Application Note U18433EJ2V0AN 37 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 7 Verify Command 5 7 1 Description This command is used to compare the data transmitted from the programmer with the data read from the 78KOR Kx3 read level in the specified address range and check whether they match The verify start end address can be set only in the block start end address units 5 7 2 Command frame and status frame Figure 5 15 shows the format of a command frame for the Verify command and Figure 5 16 shows the status frame for the command Figure 5 15 Verify Command Frame from Programmer to 78KOR Kx3 SOH LEN COM Command Information SUM ETX 13H 01H 07H 3l SAH SAM SAL EAH EAM EAL Checksum 03H Verify Remark
17. data frame reception troz MAX Time out Data frame received occurs within specified time lt 6 gt Data frame silicon signature reception a Yo error C Normal PN Yes No ee 2 iii y E Gi RE Sue A Application Note U18433EJ2VOAN 89 CHAPTER 6 UART COMMUNICATION MODE 6 11 2 Description of processing sequence lt 1 gt lt 2 gt lt 3 gt lt 4 gt lt b gt lt 6 gt Waits from the previous frame reception until the next command transmission wait time tcom The Silicon Signature command is transmitted by command frame transmission processing A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twr11 MAX The status code is checked When ST1 ACK Proceeds to lt 5 gt When ST1 ACK Abnormal termination B A time out check is performed until data frame silicon signature data reception If a time out occurs a time out error C is returned time out time Ce MAX The received data frame silicon signature data is checked If data frame is normal Normal completion A If data frame is abnormal Data frame error D 6 11 3 Status at processing completion Status at Processing Completion Status Code Description Normal Normal acknowledgment The command was executed normally and silicon signature data completion A ACK was acq
18. from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 c Checksum 03H Remark ST1 c Internal verify result The following table shows the contents in the security flag field Table 5 4 Contents of Security Flag Field Item Contents Fixed to 1 Boot block rewrite disable flag 1 Enables boot block rewrite 0 Disable boot block rewrite Fixed to 1 Programming disable flag 1 Enables programming 0 Disable programming Block erase disable flag 1 Enables block erase 0 Disable block erase Chip erase disable flag 1 Enables chip erase 0 Disable chip erase Application Note U18433EJ2V0AN 53 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING The following table shows the relationship between the security flag field settings and the enable disable status of each operation Table 5 5 Security Flag Field and Enable Disable Status of Each Operation Operating Mode Command Security Setting Item Flash Memory Programming Mode Command Operation After Security Setting V Execution possible x Execution impossible A Writing and block erase in boot area are impossible Programming Chip Erase Block Erase Disable programming y x Disable chip erase x Disable block erase x Self Programming Mode e All commands can be executed regardless of the security setting values e Only retention of security setting
19. is released 2 2 2 Serial interface pin TOOLO The serial interface pin is used to transfer the flash memory writing commands between the programmer and the 78KOR Kx3 The following figure illustrates the connection of pins used Figure 2 1 Serial Interface Pin Programmer 78KOR Kx3 TxD RxD TOOLO Single wire UART communication Application Note U18433EJ2V0AN 17 CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 2 3 Reset control pin RESET The reset control pin RESET pin is used to control the system reset for the 78KOR Kx3 from the programmer The flash memory programming mode can be selected when a specific voltage is supplied to the FLMDO pin and a reset is released Figure 2 2 RESET Pin Programmer 78KOR Kx3 Any port gt _ gt RESET pin 2 2 4 Vop GND control pins The Von control pin is used to supply power to the 78KOR Kx3 from the programmer Connection of this pin is not necessary when it is not necessary to supply power to the 78KOR Kx3 from the programmer However this pin must be connected regardless of whether the power is supplied from the programmer when the dedicated programmer is used because the dedicated programmer monitors the power supply status of the 78KOR Kx3 The GND control pin must be connected to Vss of the 78KOR Kx3 regardless of whether the power is supplied from the programmer Figure 2 3 Vpp GND Control Pin Programmer 78KOR Kx3 Vo
20. put_cmd_ua FL_COM_RESET 1 fl_cmd_prm send RESET command rc get_sfrm_ua fl_ua_sfrm tWT0 MAX if rc FLC DFTO ERR Pi ELO 2 break yes case C if rc FLC_ACK ACK break yes case A else NOP continue case B if exit from loop switch rc case FLC_NO_ERR return rc break case A case FLC_DFTO_ERR return rc break case C default return rc break case B return rc Application Note U18433EJ2VOAN 61 CHAPTER 6 UART COMMUNICATION MODE 6 5 Baud Rate Set Command 6 5 1 Processing sequence chart Baud Rate Set command processing sequence Time out occurs Programmer Wait from previous frame reception until next command transmission lt 1 gt tcom 78KOR Kx3 lt 2 gt Baud Rate Set command frame transmission Wait from command frame lt 3 gt transmission until Reset command transmission twT10 The baud rate of UART is switched lt 4 gt to the value set by the Baud Rate Set command lt 5 gt Reset command frame transmission Time out check for status twro MAX frame reception lt 6 gt o y frame received within specified time Time out D Other than ACK Retry count ove j k No pm K Yes Go to lt 3 gt Abnormal termination B p Note Status frame reception Reception status ACK ACK Norm
21. teats eee eee eee eee eee eee nenene nn 12 1 3 2 Manipulating flash memory via command transmission reception e eeeeeeeeeeeeeeeeee 13 1 4 Information Specific to 78KOR KX3 eeseeeeeneee ena ae eee tana a AKASA KESK AKE AKASA KAS SA ASE nnmnnn 14 CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT oee ooo eee eee eee een nenene 16 2 1 Programmer Contool PiN Si eae e e e e see e di dee 16 2 2 Details of Control PiNS iii bi 17 2 2 1 Flash memory programming mode setting pin EL MDO 17 22 2 Senalintertace pin TOOLO green deen Ee tee EE eg 17 2 2 3 Reset control pin DESET 18 2 24 Voo GND control pins iii ini bens itd a dana 18 232 5 OMS anian om a ii 18 KC BASICO Ge nl EE 19 2 4 Setting Flash Memory Programming MOde cceecceseesseeeeeneeeeeeeeeseaeseseeeeeeeeeeseaeenseeeenenees 20 2 41 Mode setting lowchart ona ir 21 Elle e LEE 22 2 5 Single Wire UART Communication MOde cccecccssccesseeeeeeeseeeeeseeeeeeneeeeseeesseeseseeeenseeeeeenes 23 2 6 Shutting Down Target Power Supply scccsseccsseeeesseeeesseeeenseeesseeseseaeensneeeeeeeeseaeseneeesnseeeeeeees 23 2 7 Manipulation of Flash Memory cccccseeeceeeeneeseeeeeneeseeesneeseeesneeeseeesneeseeesneeseeeseeeseeesnenseeeenes 24 2 3 Command ist eseese es ce sete E ached KaK Adi 24 29 Status Lists EE 25 CHAPTER 3 BASIC PROGRAMMER OPERATION ccccssseeeeessseeeeessseeeeeseeceeeeseseeee
22. value that satisfies Condition 3 is 1 so the number of blocks to be selected and erased simultaneously is 1 only block 25 is then erased After block 25 is erased the next start block number is 26 and the number of blocks to be erased is 48 the values that satisfy Condition 1 are therefore 1 2 4 8 16 and 32 Moreover the values that satisfy Condition 2 are 1 and 2 the value that satisfies Condition 3 is 2 so the number of blocks to be selected and erased simultaneously is 2 blocks 26 and 27 are then erased After blocks 26 and 27 are erased the next start block number is 28 and the number of blocks to be erased is 46 the values that satisfy Condition 1 are therefore 1 2 4 8 16 and 32 Moreover the values that satisfy Condition 2 are 1 2 and 4 the value that satisfies Condition 3 is 4 so the number of blocks to be selected and erased simultaneously is 4 blocks 28 to 31 are then erased After blocks 28 to 31 are erased the next start block number is 32 and the number of blocks to be erased is 42 the values that satisfy Condition 1 are therefore 1 2 4 8 16 and 32 Moreover the values that satisfy Condition 2 are 1 2 4 8 and 32 the value that satisfies Condition 3 is 32 so the number of blocks to be selected and erased simultaneously is 32 blocks 32 to 63 are then erased After blocks 32 to 63 are erased the next start block number is 64 and the number of blocks to be erased is 10 the values that satisfy Con
23. 000B Actual Value Added Macro extension code 01111111B Added Macro function code 01000000B Added Device extension code 1 11011100B Added Device extension code 2 11111101B Added User flash ROM last address 11111111B 11111111B 00000000B OOFFFFH Not added Device name 01000100B D 00110111B 7 00111000B 8 01001111B P 00110001B 1 00110001B 1 00110100B 4 00110010B 2 00100000B 00100000B Not added Security flag information Any Same as left column Not added Boot block number fixed 00000001B 01H Not added Higher 8 bit side of flash shield window start block Any Same as left column Not added Lower 8 bit side of flash shield window start block Any Same as left column Not added Higher 8 bit side of flash shield window end block Any Same as left column Not added Lower 8 bit side of flash shield window end block Same as left column Not added Read 6 11 Silicon Signature Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program Application Note U18433EJ2VOAN 43 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5
24. 1 are therefore 1 2 4 8 16 32 and 64 Moreover the values that satisfy Condition 2 are 1 2 4 8 and 16 the value that satisfies Condition 3 is 16 so the number of blocks to be selected and erased simultaneously is 16 blocks 16 to 31 are then erased After blocks 16 to 31 are erased the next start block number is 32 and the number of blocks to be erased is 96 the values that satisfy Condition 1 are therefore 1 2 4 8 16 32 and 64 Moreover the values that satisfy Condition 2 are 1 2 4 8 16 and 32 the value that satisfies Condition 3 is 32 so the number of blocks to be selected and erased simultaneously is 32 blocks 32 to 63 are then erased After blocks 32 to 63 are erased the next start block number is 64 and the number of blocks to be erased is 64 the values that satisfy Condition 1 are therefore 1 2 4 8 16 32 and 64 Moreover the values that satisfy Condition 2 are 1 2 4 8 16 32 and 64 the value that satisfies Condition 3 is 64 so the number of blocks to be selected and erased simultaneously is 64 blocks 64 to 127 are then erased Therefore simultaneous selection and erasure is executed seven times 1 2 and 3 4 to 7 8 to 15 16 to 31 32 to 63 and 64 to 127 to erase blocks 1 to 127 so M 7 is obtained Application Note U18433EJ2V0AN CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS Block configuration when executing simultaneous selection and erasure when erasing blocks 1 to 1
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26. 27 lt Block number gt User area e m z v A AAA e 22 22 u V 2 D I je 2 22 2 0 NU gt v te m V m ee 2 TR OTT sc US eg lt lt lt Range of blocks that can be selected and erased simultaneously gt Application Note U18433EJ2V0AN di d di d di 113 CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS Example 2 114 Erasing blocks 5 to 10 N number of blocks to be erased 6 lt 1 gt lt 2 gt lt 3 gt lt 4 gt The first start block number is 5 and the number of blocks to be erased is 6 the values that satisfy Condition 1 are therefore 1 2 and 4 Moreover the value that satisfies Condition 2 is 1 and the value that satisfies Condition 3 is 1 so the number of blocks to be selected and erased simultaneously is 1 only block 5 is the erased After block 5 is erased the next start block number is 6 and the number of blocks to be erased is 5 the values that satisfy Condition 1 are therefore 1 2 and 4 Moreover the values that satisfy Condition 2 are 1 and 2 the value that satisfies Condition 3 is 2 so the number of blocks to be selected and erased simultaneously is 2 blocks 6 and 7 are then erased After blocks 6 and 7 are erased the next start block number is 8 and the number of blocks to be erased is 3 the values that satisfy Condition 1 are therefore 1 and 2 Moreover the
27. 3EJ2V0AN CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS b Calculation of the execution count M of simultaneous selection and erasure Calculation of the execution count M is illustrated in the following flowchart ER_BKNUM END_BKNO ST BKNO 1 ST_BKNO Start block number END_BKNO End block number ER_BKNUM Number of blocks to be erased SSER_BKNUM Number of blocks to be selected and erased simultaneously M Execution count of simultaneous selection and erasure SSER_BKNUM SSER_BKNUM 2 SSER_BKNUM lt 128 T o Condition 1 ER BKNUM gt SSER BKNUM Condition 2 ST BKNO SSER BKNUM Remainder is 0 ER BKNUM lt ER BKNUM SSER BKNUM Yes ER BKNUM 0 No End ST_BKNO lt ST BKNO SSER_BKNUM Note Based on the maximum value of SSER_BKNUM 128 obtain the value that satisfies Conditions 1 and 2 by executing SSER_BKNUM 2 Condition 3 is then satisfied Application Note U18433EJ2VOAN 111 CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS Example 1 112 Erasing blocks 1 to 127 N number of blocks to be erased 127 lt 1 gt lt 2 gt lt 3 gt lt 4 gt lt b gt lt 6 gt lt 7 gt The first start block number is 1 and the number of blocks to be erased is 127 the values that satisfy Condition 1 are therefore 1 2 4 8 16 32 64 and 128 Moreover the value that satisfies Condition 2 is 1 and the
28. 5 6 Programming Command coco 36 BB ON 36 5 6 2 Command frame and status jrame rnnt Ennn E AEEEEEEEEEEEAEE EEEn EEEE EEEE EE EEEn EEEn 36 5 6 3 Data frame and status fame ooooooonccccccnnnncnnooooccnoncnonnnnnnncnnnnnnnnnnnnnnnnn nn nan nnnnnnnnnrnnnnnnnncannnnnnnnnnneninnn 36 5 6 4 Completion of transferring all data and status frame eecceceeeeeeeeeeeeeeeeeeteaeeeeaeeteaeeeeaeeteaeeeeaeetias 37 5 7 Verify Commande EES EENS 38 BZ A E 38 5 7 2 Command frame and status frame pisite alaa Eea ae rn rca n nn Ea EE anas 38 BS Data tame andiStatUS TAME eden E eege dee eeh AE be eege 38 5 8 Block Blank Check Command cc scccceceseeceeeseeeeeeennnaeseensneeeensneeseeesnaeseeesnaeseeeseaeseenseaeseeeenes 40 5 81 Descriptions sai tite cise eh dia 40 5 8 2 Command frame and status jrame ooocconnocccnnoncccnononcnnnnnnononnnnnnnononnnnnnnnnnrnnnn rn naar rr n ran nn E EEEE Emnene 40 5 9 Silicon Signature Command concierne 41 5 91 2 Descriptions ee eesti eens sire ed dete ee nie tl ees 41 5 9 2 Command frame and status frame siise a e ae e aapa a Ea EE EE iaat 41 5 9 3 Silicon signature data frame uo daa MASA 42 5 9 4 78KOR KXS silicon Signature liSt esanen Een a aa EE E a REE SAREES 44 5 10 Version Get Command iio ciccacicancina ondaa idad duadaa aran mnane nnmnnn nnmnnn nnmnnn nnmnnn mnnn nnne 49 510 1 Description cia a BE a eet 49 5 10 2 Command frame and status fame ooooconnococonoccccnononcnnnnnnn
29. 9 4 78KOR Kx3 silicon signature list Table 5 3 78KOR Kx3 Silicon Signature Data List Description Length Byte Data Hex Vendor code NEC Extension code Extension code Function code Function information Device information Device information Internal flash ROM Transmitted from lower bytes of address last address Device name 4PD 78F1142 78F1152 78F 1162 78F1143 78F1153 78F 1163 78F1144 78F1154 78F1164 78F1145 78F1155 78F1165 78F1146 78F1156 78F1166 78F1167 78F1168 Security information Security information Boot block number The last block number of the boot cluster that is currently selected FSW block number FSW information Note 1 List of internal flash ROM last addresses Internal flash ROM 64 KB OOFFFFH 3 zs 128 KB O1FFEFH 192 KB 02FFFFH FFFFO2 256 KB 03FFFFH FFFFO3 384 KB O5FFFFH FFFFO05 512 KB 07FFFFH FFFFO7 Note 2 is on the next page 44 Application Note U18433EJ2V0AN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING Note 2 The device names are listed below Device name list 1 4 10 44 D Device name D78F1142 D78F1143 D78F1144 D78F1145 D78F1146 Application Note U18433EJ2V0AN 45 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING Device name list 2 4 10 44 D Device name D78F1152 D78F1153 D78F1154 D78F1155 D78F1156 Application Note U18433EJ2VOAN Device name list 3 4 Item Device name
30. ATING ENVIRONMENT 2 4 Setting Flash Memory Programming Mode To rewrite the contents of the flash memory with the programmer the 78KOR Kx3 must first be set to the flash memory programming mode by supplying a specific voltage to the flash memory programming mode setting pin FLMDO in the 78KOR Kx3 then releasing a reset The following illustrates a timing chart for setting the flash memory programming mode Figure 2 5 Setting Flash Memory Programming Mode lt 1 gt Power application Voo lt 2 gt FLMDO high level lt 3 gt Reset release serial programming mode setting lt 4 gt READY pulse 00 9600 bps input start 78K0R Kx3 programmer lt 5 gt LOW pulse 00 9600 bps output start programmer gt 78KOR Kx3 The relationship between the setting of the FLMDO pin after reset release and the operating mode is shown below Table 2 2 Relationship Between FLMDO Pin Setting After Reset Release and Operating Mode FLMDO Operating Mode Low GND Normal operating mode High Von Flash memory programming mode 20 Application Note U18433EJ2VOAN CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 4 1 Mode setting flowchart Transition processing to programming mode RESET pin low output FLMDO pin low output Voo pin high output Target power supply on bo min FLMDO pin high output ter min RESET pin high output Ready pulse check Abnormal termination
31. Application Note 78KOR Kx3 16 bit Single Chip Microcontrollers Flash Memory Programming Programmer uPD78F1142 uPD78F1152 uPD78F1162 uPD78F1143 uPD78F1153 uPD78F1163 uPD78F1144 uPD78F1154 uPD78F1164 uPD78F1145 uPD78F1155 uPD78F1165 uPD78F1146 uPD78F1156 uPD78F1166 uPD78F1167 uPD78F1168 Document No U18433EJ2VOANO0 2nd edition Date Published April 2007 N O NEC Electronics Corporation 2007 Printed in Japan MEMO 2 Application Note U18433EJ2VOAN NOTES FOR CMOS DEVICES VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction If the input of the CMOS device stays in the area between Vu MAX and Vin MIN due to noise etc the device may malfunction Take care to prevent chattering noise from entering the device when the input level is fixed and also in the transition period when the input level passes through the area between Vu MAX and Vin MIN HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction If an input pin is unconnected it is possible that an internal input level may be generated due to noise etc causing malfunction CMOS devices behave differently than Bipolar or NMOS devices Input levels of CMOS devices must be fixed high or low by using pull up or pull down circuitry Each unused pin should be connected to Voo or GND via a resistor if there is a possibility that it will be an output pin All handl
32. CESSING 5 2 Reset Command 5 2 1 Description This command is used to check the establishment of communication between the programmer and the 78KOR Kx3 after the communication mode is set The same baud rate must be set for the programmer and 78KOR Kx3 however the 78KOR Kx3 cannot detect its own baud rate generation clock frequency so the baud rate cannot be set The 78KOR Kx3 is enabled to detect the baud rate generation clock frequency by itself when OOH is transmitted twice at 9 600 bps from the programmer and the 78KOR Kx3 measures the low level width of OOH and calculates the average of the two sent signals The baud rate can consequently be set which enables synchronous detection in communication 5 2 2 Command frame and status frame Figure 5 2 shows the format of a command frame for the Reset command and Figure 5 3 shows the status frame for the command Figure 5 2 Reset Command Frame from Programmer to 78KOR Kx3 SOH LEN COM SUM ETX 01H 01H 00H Reset Checksum 03H Figure 5 3 Status Frame for Reset Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 1 ST1 Checksum 03H Remark ST1 Synchronization detection result Read 6 4 Reset Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program Application Note U18433EJ2VOAN 31 CHAPTER 5 DE
33. D4 are targets of checksum calculation STX LEN D1 D2 D3 D4 SUM ETX 02H 04H FFH 80H 40H 22H Checksum 03H checksum calculation targets For this data frame checksum data is obtained as follows OOH initial value 04H LEN FFH D1 80H D2 40H D3 22H D4 1BH Borrow ignored Lower 8 bits only The data frame finally transmitted is as follows STX LEN D1 D2 D3 D4 SUM ETX 02H 04H FFH 80H 40H 22H 1BH 03H When a data frame is received the checksum data is calculated in the same manner and the obtained value is used to detect a checksum error by judging whether the value is the same as that stored in the SUM field of the receive data When a data frame as shown below is received for example a checksum error is detected STX LEN D1 D2 D3 D4 SUM ETX 02H 04H FFH 80H 40H 22H 1AH 03H T Should be 1BH if normal 28 Application Note U18433EJ2VOAN CHAPTER 4 COMMAND DATA FRAME FORMAT 4 1 Command Frame Transmission Processing For details of the flowchart of processing to transmit command frames read 6 1 Command Frame Transmission Processing Flowchart 4 2 Data Frame Transmission Processing The write data frame user program verify data frame user program and security data frame security flag are transmitted as a data frame For details of the flowchart of processing to transmit data frames
34. E 6 9 5 Sample program The following shows a sample program for Verify command processing KKK KKK KK K KERR KR RR KERR KK K KK K K KKK KKK KR KEK KKK KK RR KKK RK ERK KKK KR RK KEK KK X Verify command RARE RRA RRA KERR KER K K K KR KR RK KKK A K KK RK KKK KK RR KKK KKK KK KKK KER KKK KK Z 1 u32 top start address i u32 bottom end address r u16 error code EEE AS ul6 fl_ua_verify u32 top u32 bottom u8 buf ul6 LE u32 send_head send_size bool is_end ERR RRR RR EKER ERE KER ER ERE RRR KE REE EERE ER RAR RR RRA ie set params E RRR RRRER ERE ERE EER RRR RARE KEE RR RE RAEE RAR RA RR RARAS set_range_prm fl_cmd_prm top bottom set SAH SAM SAL EAH EAM EAL FERERARERE RARA RARA RARA RR RR RR RAEE RAR RA RARAS L send command amp check status Kof RRR RRR R RRR RARA REA RRE RARA RARA RARE KERR RE RARA RR RARAS fl wait tCOM H wait before sending command put_cmd_ua FL_COM_VERIFY 7 CL cmd prm send VERIFY command rc get sfrm ua fl ua sfrm tWT6 MAX get status frame switch rc case FLC NO ERR break continue case FLC_DFTO_ERR return rc break case C default return rc break case B KERR kk KERR ERE RRR ERE RR KE REE EERE EEK RRR RA RRA send user data s RRR RRRR kikki kk RARA RRA RARA RR RR RRE RRA RAR RRA send_head top while 1 make send data frame if b
35. E RRA RARA RRA RARA RR RRA RRA RRE RAR ER RAR RR RR RARAS i u8 sig pointer to signature save area Aj r ul6 error code E A AN ul6 fl ua getsig u8 sig ul6 rc fl wait tCOM wait before sending command put cmd ua FL COM GET SIGNATURE 1 fl_cmd_prm send GET SIGNATURE command rc get sfrm ua fl ua sfrm tWT11 MAX get status frame switch rc case FLC NO ERR break continue case FLC_DFTO_ERR return rc break case C default return rc break case B re get_dfrm_ua fl_rxdata_frm tFD2_MAX get status frame if rc if error return rc case D memcpy sig fl_rxdata_frm OFS_STA_PLD fl_rxdata_frm OFS_LEN copy Signature data return rc case A 92 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 12 Version Get Command 6 12 1 Processing sequence chart Version Get command processing sequence Programmer Wait from previous frame reception lt 1 gt E SE 1 until next command transmission tcom 78KOR Kx3 lt 2 gt Version Get command frame transmission Time out check for status frame reception twr12 MAX Time out occurs Status frame received within specified time od lt 4 gt Status frame reception S out we Reception status ACK other than SE Other than ACK bes 20 termination aon Time out check for we ae
36. E data frame reception oa IMA Time out Data frame received Occurs within specified time lt 6 gt Data frame version data reception Time out error C A d an Zas ok yer No Ba Yes C error D a Application Note U18433EJ2VOAN 93 CHAPTER 6 UART COMMUNICATION MODE 6 12 2 Description of processing sequence lt 1 gt Waits from the previous frame reception until the next command transmission wait time tcom lt 2 gt The Version Get command is transmitted by command frame transmission processing lt 3 gt A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twri2 MAX lt 4 gt The status code is checked When ST1 ACK Proceeds to lt 5 gt When ST1 ACK Abnormal termination B lt 5 gt A time out check is performed until data frame version data reception If a time out occurs a time out error C is returned time out time Ce MAX lt 6 gt The received data frame version data is checked If data frame is normal Normal completion A If data frame is abnormal Data frame error D 6 12 3 Status at processing completion Status at Processing Completion Status Code Description Normal Normal acknowledgment The command was executed normally and version data was completion A ACK acquired normally Abnormal Checksum error The checksum of the transmitted command frame does not
37. EC Electronics products customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely To minimize risks of damage to property or injury including death to persons arising from defects in NEC Electronics products customers must incorporate sufficient safety measures in their design such as redundancy fire containment and anti failure features e NEC Electronics products are classified into the following three quality grades Standard Special and Specific The Specific quality grade applies only to NEC Electronics products developed based on a customer designated quality assurance program for a specific application The recommended applications of an NEC Electronics product depend on its quality grade as indicated below Customers must check the quality grade of each NEC Electronics product before using it in a particular application Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots Special Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems life support systems an
38. ERRARE RARE RAR AREA RARA RE RR RR RARA RRA RRA RE RR RR RRE RARE RA RR RR RR RARAS ul6 fl ua getver u8 buf ul6 rc fl wait tCOM wait before sending command put cmd ua FL COM GET VERSION 1 Cl cmd prm send GET VERSION command re get sfrm ua fl ua sfrm tWT12 MAX get status frame switch rc case FLC NO ERR break continue case FLC_DFTO_ERR return rc break case C default return rc break case B re get_dfrm_ua fl_rxdata_frm tFD2_MAX get data frame if re return rc case D memcpy buf Cl rxdata frm OFS STA PLD DFV LEN copy version data return rc case A 96 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 13 Checksum Command 6 13 1 Processing sequence chart Checksum command processing sequence Programmer 78KOR Kx3 Wait from previous frame reception sk until next command transmission tcom lt 2 gt Checksum command frame transmission B Time out check for lt 3 gt k A Time ou S status frame reception twris MAX occurs Status frame received within specified time lt 4 gt Status frame reception a S en oe Reception status SS ACK other than A A ACK Abnormal eres Time out check for Se SA se data frame reception tro MAX Time out occurs Data frame received Es within specified time P DM lt 6 gt Data frame checksum dat
39. Figure 1 1 System Outline of Flash Memory Programming in 78KOR Kx3 78KOR Kx3 Firmware Serial communication Programmer Flash memory 10 Application Note U18433EJ2VOAN CHAPTER 1 FLASH MEMORY PROGRAMMING 1 2 System Configuration Examples of the system configuration for programming the flash memory are illustrated in Figure 1 2 This figure illustrates how to program the flash memory with the programmer under control of a host machine Depending on how the programmer is connected the programmer can be used in a standalone mode without using the host machine if a user program has been downloaded to the programmer in advance For example NEC Electronics flash memory programmer PG FP4 can execute programming either by using the GUI software with a host machine connected or by itself standalone Figure 1 2 System Configuration Single wire UART communication mode LSB first transfer Host machine Programmer 78KOR Kx3 RS 232C USB Remark The 78KOR Kx3 can only communicate via the single wire UART communication mode Application Note U18433EJ2VOAN 11 CHAPTER 1 FLASH MEMORY PROGRAMMING 1 3 Programming Overview To rewrite the contents of the flash memory with the programmer the 78KOR Kx3 must first be set to the flash memory programming mode After that transmit commands from the programmer via serial communication and then rewrite th
40. GRAMMING PARAMETER CHARACTERISTICS 2 Simultaneous selection and erasure performed by Block Erase command 110 The Block Erase command of the 78KOR Kx3 is executed by repeating simultaneous selection and erasure which erases multiple blocks simultaneously The wait time inserted during Block Erase command execution is therefore equal to the total execution time of simultaneous selection and erasure To calculate the total execution time of simultaneous selection and erasure the execution count M of the simultaneous selection and erasure must first be calculated M is calculated by obtaining the number of blocks to be erased simultaneously number of blocks to be selected and erased simultaneously The following describes the method for calculating the number of blocks to be selected and erased simultaneously and the execution count M a Calculation of number of blocks to be selected and erased simultaneously The number of blocks to be selected and erased simultaneously should be 1 2 4 8 16 32 64 or 128 depending on which satisfies all of the following conditions Condition 1 Number of blocks to be erased gt Number of blocks to be selected and erased simultaneously Condition 2 Start block number Number of blocks to be selected and erased simultaneously Remainder is 0 Condition 3 The maximum value among the values that satisfy both Conditions 1 and 2 Application Note U1843
41. KR ER ERE REE RRR KEE KERR RE RR ERE RR RRA RR RR RARAS ul6 fl ua blk blank chk u32 top u32 bottom rc set range prm fl cmd prm u8 whole block num block num fl cmd prm 6 1 fl wait tCOM whole top get block num top bottom bottom put cmd ua FL COM BLOCK BLANK CHE 7 1 fl cmd prm rc get sfrm ua fl ua sfrm tWT8 MAX block num get status frame switch rc case FLC_NO_ERR return rc break case A case FLC_DFTO_ERR return rc break case C default return rc break case B PSLUEH EC 88 Application Note U18433EJ2VOAN set SAH SAM SAL get block num EAH EAM EAL check only user area or not wait before sending command CHAPTER 6 UART COMMUNICATION MODE 6 11 Silicon Signature Command 6 11 1 Processing sequence chart Silicon Signature command processing sequence Programmer 78KOR Kx3 Wait from previous frame reception lt 1 gt a SCH 1 until next command transmission tcom lt 2 gt Silicon Signature command frame transmission i E Time out check for Time out lt 3 gt occurs S status frame reception WT MAX Status frame received within specified time eee error C lt 4 gt Status frame reception Reception status S ACK other than e Other than ACK we ACK N Time out check for sm mtn lt 5 gt
42. ON OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface as a rule switch on the external power supply after switching on the internal power supply When switching the power supply off as a rule switch off the external power supply and then the internal power supply Use of the reverse power on off sequences may result in the application of an overvoltage to the internal elements of the device causing malfunction and degradation of internal elements due to the passage of an abnormal current The correct power on off sequence must be judged separately for each device and according to related specifications governing the device INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I O pull up power supply while the device is not powered The current injection that results from input of such a signal or I O pull up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device Application Note U18433EJ2V0AN e The information in this document is current as of January 2007 The information is subject to change without notice For actual design in refer to the latest publications of NEC Electronics data sheets or data books etc for the mo
43. OR kk EKER ER EEK KEKR RR RRA RARA RRA RR RAR RR RR AREA RRA RAR RARAS Write command d ARERERRARRRRR KEE ER REA RARA REA RK ERE RR RAR RRA RARE RAR RR RAR RR RARAS pe i u32 top Start address ZC i u32 bottom end address pa r ul6 error code Mi AFERERRRRRR RRA RRE RRA RARA RRA RRA RAR RARA RARA RARA RR RR RARAS define fl_st2_ua f l_ ua _sfrm OFS_STA _PLD 1 ul6 fl ua write u32 top u32 bottom ul6 rc u32 send head send size bool is end ul6 block num block num get block num top bottom get block num FERRERA RARA ERE REE RRA RARA RR REE RE RE RRA RR RRA RARAS JE set params E RR RRRRR REE KERR ERE RE RE RARA RR RAR RA ER RAR RRA RAS set_range_prm fl_cmd_prm top bottom set SAH SAM SAL EAH EAM EAL FERRERA RARE RAR RRE RRA RARA RR RRA RARE RRA RAR RARA EE ye send command amp check status ae FERRERA RARE RARE RARA RARA RR RRA RARE RRA RR RRA RARAS fl wait tCOM wait before sending command put cmd ua FL COM WRITE 7 fl_cmd_prm send Programming command rc get sfrm ua fl ua sfrm tWT3 MAX get status frame switch rc case FLC NO ERR break continue case FLC_DFTO_ERR return rc break case C default return rc break case B FERRERA RARE RE RARA RARE RARA RRA RRR RE RRA RR RRA RARAS send user data M FERRERA ARRE RARE RE RRA RARA RR RA RRA ER RAR RRA RRA S send_head top whi
44. RASE_CHIP 1 fl_cmd_prm send ERASE CHIP command rc get_sfrm_ua fl_ua_sfrm tWT1 MAX get status frame Jed switch rc case FLC NO ERR return rc break case A case FLC_DFTO_ERR return rc break case C default return rc break case B L return Tre Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 7 Block Erase Command 6 7 1 Processing sequence chart Block Erase command processing sequence Programmer lt 1 gt Wait from previous frame reception until next command transmission tcom 78KOR Kx3 lt 2 gt Block Erase command frame transmission Time ot lt 3 gt Time out check for occurs status frame reception 72 MAX Status frame received within specified time OR at lt 4 gt Status frame reception Time out error C f _ A ae Reception status ACK other than ACK EEE m Other than ACK EN Y Ge termination B 1 A E K a 70 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 7 2 Description of processing sequence lt 1 gt Waits from the previous frame reception until the next command transmission wait time tcom lt 2 gt The Block Erase command is transmitted by command frame transmission processing lt 3 gt A time out check is performed from command transmission until status frame reception If a time out occurs a time o
45. SCRIPTION OF COMMAND PROCESSING 5 3 Baud Rate Set Command 5 3 1 Description This command is used to change the baud rate for UART communication 9 600 bps by default After the Baud Rate Set command has been executed the Reset command must be executed to check synchronization at the changed baud rate The baud rate setting data is represented in 1 byte values 5 3 2 Command frame and status frame Figure 5 4 shows the format of a command frame for the Baud Rate Set command and Figure 5 5 shows the status frame for the command Figure 5 4 Baud Rate Set Command Frame from Programmer to 78KOR Kx3 SOH LEN COM Command Information SUM ETX 01H 05H 9AH D01 D02H D02L D03 sum 03H Note For details of the command information setting refer to Table 5 1 If data other than in Table 5 1 is set a time out error will occur If a time out error has occurred execute a hardware reset and re set the flash memory programming mode Remark D01 Synchronization correction mode DO2H DO2L Baud rate setting D03 Noise filter setting Table 5 1 Command Information Setting Synchronization Correction Mode D02H DO2L poss Microcontroller correction mode Fixed to OOH Fixed to OAH Noise filter 115 200 bps OOH Off Note 01H On Programmer correction mode Note Note Substitute the k value calculated by the expression below for DO2H DO2L in hexadecimal Make sure that the k value is greater
46. TER 6 UART COMMUNICATION MODE 6 4 4 Flowchart Reset command processing gt Wait from previous frame reception until next command transmission tcom Transmits 00 at 9 600 bps Wait t12 Y Transmits 00 at 9 600 bps y Wait bc Y Command frame transmission processing Reset Status frame received Yes No Yes twro MAX Time out error C y Retry count over A a SEH Ee completion A Abnormal termination B som A 60 Application Note U18433EJ2VOAN No CHAPTER 6 UART COMMUNICATION MODE 6 4 5 Sample program The following shows a sample program for Reset command processing KKK KKK KK K KR KR RK KERR KER KK K KR KR RK K K K KKK KEK KKK KR KR RK KKK KEK KKK KKK RK KEK KK X if Reset command Ey EEE AS i r ul6 error code FRA RARA RR K K K K K K A K RR K K K K K K KKK KKK RK RK KKK KK ERK KKK KEK KKK KK RR KKK KK ul6 f1l ua reset void ul6 LE u32 retry set uart0 br BR 9600 change to 9600bps fl wait tCOM wait set ua dir tx Change Mono wire UART transmit mode putc_ua 0x00 send 0x00 9600bps fl wait t12 wait putc_ua 0x00 send 0x00 9600bps set_ua_dir_rx Change Mono wire UART receive mode for retry 0 retry lt tRS retry fl_wait t2C wait
47. The Vop level of TOOLO can be achieved by using a pull up resistor the pin is Hi Z b Programming mode setting Reset command Vss EVss 0 1 AVss Von EVpp 0 1 AVREF 0 1 FLMDO RESET ommand frame C 00H 9600 bps Reset command Status frame TOOLO Transmission TOOLO Reception itro ba o O nk vere GE tor pp tos tui ba ti tec twro Remark In the above figure TOOLO is illustrated as two separate lines for the sake of description but it is actually a single line The Vop level of TOOLO can be achieved by using a pull up resistor the pin is Hi Z c Chip Erase command Block Erase command Block Blank Check command Oscillating Frequency Set command Command frame Status frame TOOLO Reception twr1 twr2 twrs x number of blocks Remark The descriptions in parentheses indicate operations of the 78KOR Kx3 118 Application Note U18433EJ2VOAN CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS d Baud Rate Set command Command frame Command frame Reset command Status frame TOOLO Reception Reception gt gt twr10 twro Remark The descriptions in parentheses indicate operations of the 78KOR Kx3 e Silicon Signature command Version Get command Command frame Status frame Data frame D DB twr11 twT12 tro1 Remark The descriptions in parentheses indicate operations of the 78KOR Kx3 f Checksum command Command frame Statu
48. a reception a ee n data frame e Yes No Nom Pa Yes Data frame SCH Dommen Application Note U18433EJ2VOAN 97 CHAPTER 6 UART COMMUNICATION MODE 6 13 2 Description of processing sequence lt 1 gt Waits from the previous frame reception until the next command transmission wait time tcom lt 2 gt The Checksum command is transmitted by command frame transmission processing lt 3 gt A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twrie MAX lt 4 gt The status code is checked When ST1 ACK Proceeds to lt 5 gt When ST1 s ACK Abnormal termination B lt 5 gt A time out check is performed until data frame checksum data reception If a time out occurs a time out error C is returned time out time Ce MAX lt 6 gt The received data frame checksum data is checked If data frame is normal Normal completion A If data frame is abnormal Data frame error D 6 13 3 Status at processing completion Status at Processing Completion Status Code Description Normal Normal acknowledgment The command was executed normally and checksum data was completion A ACK acquired normally Abnormal Parameter error The specified start end address is out of the flash memory termination B range or the start end address is not the start end address of the block Checksum erro
49. al completion A Note Do not exceed the retry count for the reset command transmission up to 16 times 62 Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 5 2 Description of processing sequence lt 1 gt Waits from the previous frame reception until the next command transmission wait time tcom lt 2 gt The Baud Rate Set command is transmitted by command frame transmission processing lt 3 gt Waits from command transmission until Reset command transmission wait time twr10 lt 4 gt The baud rate of UART communication is switched to the value set by the Baud Rate Set command lt 5 gt The Reset command is transmitted by command frame transmission processing lt 6 gt A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twro MAX lt 7 gt Since the status code should be ACK the processing ends normally A 6 5 3 Status at processing completion Status at Processing Completion Status Code Description Normal Normal acknowledgment The command was executed normally and the synchronization completion A ACK of the UART communication speed has been established between the programmer and the 78KOR Kx3 Abnormal Checksum error The checksum of the transmitted command frame does not termination B match Negative acknowledgment Command frame data is abnormal such as invalid data length
50. ansmission processing X P Data frame header STX 02H transmission v Wait between data transmissions E v Data length LEN transmission LEN bytes transmitted ym Yes Wait between data transmissions l Transmits 1 byte data Y Wait between data transmissions tor v Checksum data SUM transmission v Wait between data transmissions Bt No Last data frame Transmission of last data frame footer ETX 03H Transmission of footer other than those of last data frame ETB 17H A X End of data frame a transmission M Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 3 Data Frame Reception Processing Flowchart G Ke Data frame reception K processing J e ba Data frame header STX 02H 7 received Timed out gt No tror troz MAX v S Reception time out error S WH ER Data length LEN _ received No N Timed out gt tor MAX Yes JE o j x Reception time out error gt received gt Tno K d No Timed out gt tor MAX C gt Reception time out error y i M L N Tens SEN bytes received gt Yes E
51. atus frames ST1 and ST2 after the last data transmission indicate ACK the 78KOR Kx3 firmware automatically executes internal verify Therefore the Status command for this internal verify must be transmitted 5 6 2 Command frame and status frame Figure 5 10 shows the format of a command frame for the Programming command and Figure 5 11 shows the status frame for the command Figure 5 10 Programming Command Frame from Programmer to 78K0R Kx3 SOH LEN COM Command Information SUM ETX 40H 01H 07H SAH SAM SAL EAH EAM EAL Checksum 03H Programming Remark SAH SAM SAL Write start addresses EAH EAM EAL Write end addresses Figure 5 11 Status Frame for Programming Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 a Checksum 03H Remark ST1 a Command reception result 5 6 3 Data frame and status frame Figure 5 12 shows the format of a frame that includes data to be written and Figure 5 13 shows the status frame for the data Figure 5 12 Data Frame to Be Written from Programmer to 78K0R Kx3 STX LEN Data SUM ETX ETB H to FFH oa Write Data Checksum 03H 17H 00H 256 Remark Write Data User program to be written Figure 5 13 Status Frame for Data Frame from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 02H ST1 b ST2 b Checksum 03H Remark ST1
52. bited in the security setting Negative acknowledgment Command frame data is abnormal such as invalid data length NACK LEN or no ETX MRG10 error An erase error has occurred MRG11 error Write error Time out error C The status frame was not received within the specified time Application Note U18433EJ2VOAN 67 CHAPTER 6 UART COMMUNICATION MODE 6 6 4 Flowchart Chip Erase command processing y Waits from previous frame reception until next command transmission tcom y Command frame transmission processing Chip Erase Status frame No received Yes Time out error C Status ACK No 7 oy Normal completion A Abnormal termination B 68 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 6 5 Sample program The following shows a sample program for Chip Erase command processing KKK KKK KK K KR KR RK KERR KER K K K KR KR RK KKK KKK KEK KKK KKK RK KKK KR KKK KKK RR KKK Y px x I Erase all chip command Mel EJ KKK KKK KK K KERR KERR KER KKK KK RR KK KK KR KK RK KKK KR KR RK KKK KKK KKK KK RR KR KKK r u16 error code E KKK KKK KK K KER KKK KR KER KEK KK RR KK KKK RR KEK KKK KK RR KKK KKK KK KKK KERR KKK KK u16 fl ua erase all void ul6 LE f1_wait tCOM wait before sending command put_cmd_ua FL_COM_E
53. cifications when designing a programmer 1 Flash memory parameter characteristics a Flash memory programming mode setting time Voo to FLMDOT FLMDO to RESETT Ready start time from RESETT 100 ms Low level data0 Ready width 937 5 us 987 us Wait for low level data1 Wait for low level data2 Wait for Read command Low level data1 data2 width 937 5 us Note The low level width is the same as the 00H data width at 9 600 bps It includes the start bit and is therefore 0 data of 9 bits tLo is the low level width of the data transmitted from the 78KOR Kx3 firmware tu1 and tz are the low level widths of the data transmitted from the flash programmer 106 Application Note U18433EJ2V0AN CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS b Programming characteristics Condition Between data frame transmissions Data frame Se Data Data frame transmission transmission From status frame transmission until data frame transmission From status frame transmission until data frame Program command tFo2 8 7 us reception 1 From status frame transmission until data frame Verify command tros 145 us reception 2 From status frame transmission until data frame Security setting command reception 3 From status frame transmission until command frame reception Note Enable successive reception for the programmer Also set the time out time for the programmer to 3 second
54. ct the power supply again Application Note U18433EJ2V0AN 25 CHAPTER 3 BASIC PROGRAMMER OPERATION Figure 3 1 illustrates the general command execution flow when flash memory rewriting is performed with the programmer Figure 3 1 General Command Execution Flow at Flash Memory Rewriting General command flow Flash memory programming mode is set Reset command Baud Rate Set command Silicon Signature command J Block Blank Check command l Chip Erase command y Programming command l Security Set command v Flash memory programming mode is exited End PE Remark The Verify command and Checksum command can also be supported 26 Application Note U18433EJ2VOAN CHAPTER 4 COMMAND DATA FRAME FORMAT The programmer uses the command frame to transmit commands to the 78KOR Kx3 The 78KOR Kx3 uses the data frame to transmit write data or verify data to the programmer A header footer data length information and checksum are appended to each frame to enhance the reliability of the transferred data The following shows the format of a command frame and data frame Figure 4 1 Command Frame Format SOH LEN COM Command information variable length SUM ETX 1 byte 1 byte 1 byte Max 255 bytes 1 byte 1 byte Figure 4 2 Data Frame Format STX LEN Data variable length SUM ETX or ETB 1 byte 1 byte Max
55. d medical equipment for life support etc The quality grade of NEC Electronics products is Standard unless otherwise expressly specified in NEC Electronics data sheets or data books etc If customers wish to use NEC Electronics products in applications not intended by NEC Electronics they must contact an NEC Electronics sales representative in advance to determine NEC Electronics willingness to support a given application Note 1 NEC Electronics as used in this statement means NEC Electronics Corporation and also includes its majority owned subsidiaries 2 NEC Electronics products means any product developed or manufactured by or for NEC Electronics as defined above M8E 02 11 1 Application Note U18433EJ2VOAN Target Readers Purpose Organization How to Read This Manual Conventions INTRODUCTION This application note is intended for users who understand the functions of the 78KOR Kx3 and who will use this product to design application systems The purpose of this application note is to help users understand how to develop dedicated flash memory programmers for rewriting the internal flash memory of the 78KOR Kx3 The sample programs and circuit diagrams shown in this document are for reference only and are not intended for use in actual design ins Therefore these sample programs must be used at the user s own risk Correct operation is not guaranteed if these sample programs are used This ma
56. dition 1 are therefore 1 2 4 and 8 Moreover the values that satisfy Condition 2 are 1 2 4 and 8 the value that satisfies Condition 3 is 8 so the number of blocks to be selected and erased simultaneously is 8 blocks 64 to 71 are then erased After blocks 64 to 71 are erased the next start block number is 72 and the number of blocks to be erased is 2 the values that satisfy Condition 1 are therefore 1 and 2 Moreover the values that satisfy Condition 2 are 1 and 2 the value that satisfies Condition 3 is 2 so the number of blocks to be selected and erased simultaneously is 2 blocks 72 and 73 are then erased Therefore simultaneous selection and erasure is executed six times 25 26 and 27 28 to 31 32 to 63 64 to 71 and 72 and 73 to erase blocks 25 to 73 so M 6 is obtained Application Note U18433EJ2V0AN CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS Block configuration when executing simultaneous selection and erasure when erasing blocks 25 to 73 lt Block number gt lt Range of blocks that can be selected and erased simultaneously gt Application Note U18433EJ2V0AN 117 CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS 3 UART communication mode a Data frame TOOLO Transmission TOOLO Reception tor Remark In the above figure TOOLO is illustrated as two separate lines for the sake of description but it is actually a single line
57. e Command Frame from Programmer to 78KOR Kx3 SOH LEN COM Command Information SUM ETX 22H 01H 07H SAHSAMSALEAHEAMEAL Checksum 03H Block Erase Remark SAH SAM SAL Block erase start address start address of any block SAH Start address high bits 23 to 16 SAM Start address middle bits 15 to 8 SAL Start address low bits 7 to 0 EAH EAM EAL Block erase end address last address of any block EAH End address high bits 23 to 16 EAM End address middle bits 15 to 8 EAL End address low bits 7 to 0 Figure 5 9 Status Frame for Block Erase Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 Checksum 03H Remark ST1 Block erase result Read 6 7 Block Erase Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program Application Note U18433EJ2V0AN 35 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 6 Programming Command 5 6 1 Description This command is used to write the user program to the flash memory by transmitting write data after having transmitted the write start address and the write end address Internal verification is then executed after the last data has been transmitted and writing has been completed The write start end address can be set only in the block start end address units If both of the st
58. e flash memory The flowchart of programming is illustrated in Figure 1 3 Figure 1 3 Programming Flowchart Setting flash memory programming mode Lei vy Manipulation of flash memory via command transmission reception Manipulation completed End 3 GE 1 3 1 Setting flash memory programming mode Supply a specific voltage to the flash memory programming mode setting pin FLMDO in the 78KOR Kx3 and release a reset the flash memory programming mode is then set 12 Application Note U18433EJ2VOAN CHAPTER 1 FLASH MEMORY PROGRAMMING 1 3 2 Manipulating flash memory via command transmission reception The flash memory incorporated in the 78KOR Kx3 has functions to rewrite the flash memory contents The flash memory manipulating functions shown in Table 1 1 are available Table 1 1 Outline of Flash Memory Functions Function Outline Erase Erases the flash memory contents Write Writes data to the flash memory Verify Compares the flash memory contents with data for verify Acquisition of information Reads information related to the flash memory To control these functions the programmer transmits commands to the 78KOR Kx3 via serial communication The 78KOR Kx3 returns the response status for the commands The programming to the flash memory is performed by repeating these series of serial communications Application Note U18433EJ2VOAN
59. ecksum 03H Version Get Figure 5 25 Status Frame for Version Get Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 Checksum 03H Remark ST1 Command reception result Application Note U18433EJ2VOAN 49 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 10 3 Version data frame Figure 5 26 shows the data frame of version data Figure 5 26 Version Data Frame from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 06H DV1 DV2 DV3 FV1 FV2 FV3 Checksum 03H Remark DV1 Integer of device version fixed to OOH Read 6 12 Version Get Command for details on the flowchart of the processing sequence between the DV2 First decimal place of device version fixed to OOH DV3 Second decimal place of device version fixed to 00H FV 1 Integer of firmware version FV2 First decimal place of firmware version FV3 Second decimal place of firmware version programmer and the 78KOR Kx3 the flowchart of command processing and the sample program 50 Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 11 Checksum Command 5 11 1 Description This command is used to acquire the checksum data in the specified area For the checksum calculation start end address specify a fixed address in block units 2 KB starting from the top of the flash memory Checksum data is obtained by sequentially subtracti
60. eseseenenseeeeees 26 CHAPTER 4 COMMAND DATA FRAME FORMAT ccccsssececsssseceeessseeeeesseceesesseeeeeeseseenenseseeees 27 4 1 Command Frame Transmission Processing s ccsscsssseeeeeeeesseeseseeeenseeeeeeeeseaeseseeeenseeenenees 29 4 2 Data Frame Transmission Processing ccccessesceeeeeneeseeeeeneeseeeeeeseeenneeseeeseeseeesneesesennenseeesnes 29 4 3 Data Frame Reception Processing 2 se 22 eeeererennesnaee nenene ae aaa nana nana nan nn 29 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING eeeee eee eee eee nenene 30 5 1 Status Command iii ENEE 30 ENT RE le le EE 20 ee Lu EE 20 52 Reset Command ii NENNEN EEN EN a WE Description ine penen e OP 31 5 2 2 Command frame and status fame 31 5 3 Baud Rate Set Command iio ii dai dia 32 B S RE le le EE 32 5 3 2 Command frame and status fame 32 6 Application Note U18433EJ2VOAN 5 4 Chip Erase CoOmimand sceccccsccecseeeeeseeeeeeeeeceeseneeeeneneeeeaesesaaeeneeeeeeeeeescaesaseeeeneeeeeseeesaseaeseseaeenees 34 541 Descriptions cit Seti tiniest ete i ee erent ee tet a ees 34 5 4 2 Command frame and status frame ooocconnocccononccnnononcnnnnoocononnnnnncononnnnnnonnnrnnnn rn non nn rn rnnnn rn EAEEren nanen 34 5 5 Block Erase Command 20 iede eeler ege NEEN Eeer 35 551 RE le LEE 35 5 5 2 Command frame and status jrame ooocconnocccononcccnononcnnnnnnnononnnnnnnononcnnnnonnnnnnnn rn non nrrn ran EEEE EEEE naene 35
61. essing SEQUENCE ee eeeeeeeeeneeeeeeeneeeeeeaneeeteaaeeeeneaeeetesaaeeeeenaeeeeseeeeeesnneeetenaeees 59 6 4 3 Status at processing completion eeeeceeeceeeeeeteeeeeeeeeteaeeeeeeeseaeeeeeesaaeeeaeeeseeeeeeeeeeeeeeteeeeeeeteas 59 6 4 4 FIOWCMAM EE 60 6 45 Sample Program uc ee italia ted 61 6 5 Baud Rate Set Command cuina nnmnnn nennen 62 Application Note U18433EJ2V0AN 7 6 6 6 7 6 8 6 9 6 10 6 11 6 12 6 13 6 5 1 Processing sequence Chat edel cae e a deh A ea 62 6 5 2 Description of processing Sequence cccceseceeeeseeceeeneeceeesenseneeseeeeseneneeseeaseneneeeeeseseeeeseseeseneees 63 6 5 3 Status at processing completion ee ceceseeeeeeeeeneeeeeeeteaeeeeeeeseeeeeeeeecaaeeeeeesaaeeseeesaeesaeeseieeeeneeeeaes 63 6 5 4 Flowchart EE 64 60 55 Sample program z eens haters putes ia E 65 Chip Erase Command icsse gaion sceccccuecencceeaseestenecds dE 66 6 6 1 Processing Sequence Chart eisereen daea ieai ieks epa aiai EaR 66 6 6 2 Description of processing SOQUEenCe oooccccnonocccononcncnnonnnonnnnn cocoa nnrnnnnr o nn ran nrn naar rr rr nnnnn rr naar nrn rana nannnns 67 6 6 3 Status at processing completion ooooncccinninnnccnonccnnncncnncnnnnnncnnnncnnn cnn cnn anna n rra rannncnnnn 67 RE SE lee E 68 6 6 5 Sample program iii dade nee ents eee es ev eke ade 69 Block Erase Command commcccinnccnnnnnncncann cr 70 6 7 1 Processing Sequence EL TTT 70 6 7 2 Description o
62. essing sequence Programmer 78KOR Kx3 Wait from previous frame reception until next command transmission lt 2 gt Verify command frame transmission Time out_ occurs lt 3 gt Time out check for lt 1 gt tcom status frame reception bie MAX Time out error C N Status frame received within specified time Va Status frame reception SEI Ga Reception status ACK other than ACK S Other than ACK Mi E ee ae MA ae ACK Ce ee mere Wait from previous frame reception Abnormal termination Pla lt 5 gt Whoa Gen tro3 lt 6 gt Data frame user data for verify transmission Time ot Time out check for occurs Sa status frame reception twr7 MAX a Status frame received within specified time a Time out error C N M p es lt 8 gt Status frame reception ST1 ST2 ae je Abnormal termination B ACK O Reception status ST2 y Sa ACK other than ACK sal Other than ACK n ACK ao termination D aves v Al data frames Sa _ ited IS e Go to lt 5 gt 80 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 9 2 Description of processing sequence lt 1 gt lt 2 gt lt 3 gt lt 4 gt lt b gt lt 6 gt lt 7 gt lt 8 gt Waits from the previous frame reception until the next command transmission wait time tcom The Verify com
63. f processing Sequence ococcccnonccccononcncnnnonnnnnnnnnnnnnn nr rra rn rn ran nrn rar rre enn n nr eran rre rana nenas 71 6 7 3 Status at processing completion ooooncccinncninccnonccnonccconcnnonnncnnnncnnnn non c crac nr nar nn nn nara nc nn rca nnnncnnne 71 637 4 Flowchalt iia tada 72 6 75 Sample ele e TEE 73 Programming Command iii id 74 6 8 1 Processing sequente Chad dada 74 6 8 2 Description of processing Sequence ooccccnonccccononcnnnnnncnnnonnnnn ono nnrrnnnn nr nr nr nr nr nar KEE K RKK EKK R KKK 75 6 8 3 Status at processing completion ooooncccinnnnnncccnnccnnocnnoncnnnnnncnncncnnnnnon cnn nn nan cnn anna KARR KRKA ent 76 6 8 4 E e Oe EE 77 6 85 Sample DOS EE E E Edel id 78 Verify Comma ind DEE 80 6 9 1 Processing Sequence E EE 80 6 9 2 Description of processing Sequence cccceseceeeeeeeceeeseeeeeesenceeeeeeeeeseseneeseeasenenseneeseseeeeteneeeenteas 81 6 9 3 Status at processing completion eceeesceeeeeeeeeeeeeeeceaeeeeeeeseeeeeeeeessaeeeeeesaeeseeeesaeeseeeeneeeeeeeeaes 81 6 9 4 Flowchart 557 355 rds tie ste heh ta 82 BD Sample Programs ased z dese idee 83 Block Blank Check Command eeeeeeeeeee eee e cr 85 6 10 1 Processing Sequence Chart s eeee4 ree4eereeeneee ee ener a Ke KA SKK KKK KARA EKK KAS RAKA KKK Neen 85 6 10 2 Description of processing Sequence oooccccnonccccononcncnnnnnnnnnonnnnn nan nr rra rn nn rar nrn naar rre enn n rre ra
64. gt Wait from previous frame reception until next command transmission tcom lt 2 gt Chip Erase command frame transmission Time out lt 3 gt Time out check for occurs status frame reception Dun MAX is Status frame received within specified time ime out error C k WE yas Reception status ee lt 4 gt Status frame reception _ e adie than oo Other than ACK Sal ACK l 66 8 en minor Cormier Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 6 2 Description of processing sequence lt 1 gt Waits from the previous frame reception until the next command transmission wait time tcom lt 2 gt The Chip Erase command is transmitted by command frame transmission processing lt 3 gt A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twri MAX lt 4 gt The status code is checked When ST1 ACK Normal completion A When ST1 ACK Abnormal termination B 6 6 3 Status at processing completion Status at Processing Completion Status Code Description Normal Normal acknowledgment The command was executed normally and chip erase was completion A ACK performed normally Abnormal Checksum error The checksum of the transmitted command frame does not termination B match Protect error Chip erase or boot block rewrite is prohi
65. h size gt 256 KB number of blocks gt 128 4 See 2 Simultaneous selection and erasure performed by Block Erase command for the calculation method of the execution count of simultaneous selection and erasure 5 Time for 256 byte data transmission 6 Time for one block transmission 7 Reception must be enabled for the programmer before data frame transmission Also set the time out time for the programmer to 3 seconds or more 8 Enable successive reception for the programmer Also set the time out time for the programmer to 3 seconds or more A Remark is on the next page 108 Application Note U18433EJ2VOAN CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS Remark The waits are defined as follows lt twro to twra twr11 to twr16 gt The 78KOR Kx3 completes command processing between the MIN and MAX times and transmits a status frame For commands with a specified MAX time the programmer must wait for the start bit of the reception frame until the MAX time has elapsed and then perform time out processing See the corresponding note for commands without a specified MAX time lt twT10 gt The 78KOR Kx3 can perform the next communication after MIN after the communication immediately before has been completed The programmer must transmit the next data after the MIN time elapses after the communication immediately before has been completed Application Note U18433EJ2VOAN 109 CHAPTER 7 FLASH MEMORY PRO
66. igure 5 20 Status Frame for Block Blank Check Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 Checksum 03H Remark ST1 Block blank check result Read 6 10 Block Blank Check Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program 40 Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 9 Silicon Signature Command 5 9 1 Description This command is used to read information such as the write protocol information silicon signature of the device and security flag information If the programmer supports a programming protocol that is not supported in the 78KOR Kx3 for example execute this command to select an appropriate protocol in accordance with the values of the second and third bytes 5 9 2 Command frame and status frame Figure 5 21 shows the format of a command frame for the Silicon Signature command and Figure 5 22 shows the status frame for the command Figure 5 21 Silicon Signature Command Frame from Programmer to 78KOR Kx3 SOH LEN COM SUM ETX COH 01H 01H jm A Checksum 03H Silicon Signature Figure 5 22 Status Frame for Silicon Signature Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 Checksum 03H Remark ST1 Command reception result Application N
67. ile check flto timeout t01 no return rc start RESET command proc 22 Application Note U18433EJ2V0AN CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 5 Single Wire UART Communication Mode The TOOLO pin of the 78KOR Kx3 is used for single wire UART communication The communication conditions are as shown below Table 2 3 Single Wire UART Communication Conditions Description Baud rate Communication is performed at 9 600 bps until the Baud Rate Set command for baud rate setting command processing is transmitted The transmission rate is changed to the baud rate set by the Baud Rate Set command from the transmission of the Reset command for baud rate command processing For details of the settable baud rate refer to 5 3 Baud Rate Set Command Parity bit None Data length 8 bits LSB first Stop bit 2 bits programmer gt 78KOR Kx3 1 bit 78K0R Kx3 gt programmer Caution Set the same baud rate to the programmer and 78KOR Kx3 2 6 Shutting Down Target Power Supply After each command execution is completed shut down the power supply to the target after setting the RESET pin to low level as shown below Set other pins to Hi Z when shutting down the power supply to the target Caution Shutting down the power supply and inputting a reset during command processing are prohibited Figure 2 6 Timing for Terminating Flash Memory Programming Mode 1 Vo
68. ing related to unused pins must be judged separately for each device and according to related specifications governing the device PRECAUTION AGAINST ESD A strong electric field when exposed to a MOS device can cause destruction of the gate oxide and ultimately degrade the device operation Steps must be taken to stop generation of static electricity as much as possible and quickly dissipate it when it has occurred Environmental control must be adequate When it is dry a humidifier should be used It is recommended to avoid using insulators that easily build up static electricity Semiconductor devices must be stored and transported in an anti static container static shielding bag or conductive material All test and measurement tools including work benches and floors should be grounded The operator should be grounded using a wrist strap Semiconductor devices must not be touched with bare hands Similar precautions need to be taken for PW boards with mounted semiconductor devices STATUS BEFORE INITIALIZATION Power on does not necessarily define the initial status of a MOS device Immediately after the power source is turned ON devices with reset functions have not yet been initialized Hence power on does not guarantee output pin levels I O settings or contents of registers A device is not initialized until the reset signal is received A reset operation must be executed immediately after power on for devices with reset functions POWER
69. l6 error code RRR RRRR REE RRA ERE REE RR RR RR RARE RARA RE RR RR RRE REE RA RR RR RR RARAS ul6 fl ua getsum u16 sum u32 top u32 bottom ul6 rc FERRERA ERE ERE ERE EKER ERE RE RR RR ERR AER RAR RRA RARAS hs set params ey FERRERA ARRE RARE RE RRE RARA RRA RRA ERA RR RRA RARAS set params set_range_prm fl_cmd_prm top bottom set SAH SAM SAL EAH EAM EAL AAN ZS send command EAN fl wait tCOM wait before sending command put cmd ua FL COM GET CHECK SUM 7 fl_cmd_prm send GET VERSION command rc get sfrm ua fl ua sfrm tWT16 MAX get status frame switch rc case FLC NO ERR break continue case FLC_DFTO_ERR return rc break case C default return rc break case B FERRERA RARE RE RARE RARE RARA RR RRE ER RAR RRE RARAS pe get data frame Checksum data Es FERRERA RE RARE RARA RARE RARA RARA RRA RR RAR RA ARRAY rc get_dfrm_ua fl_rxdata_frm tFD1_MAX get status frame if rc if no error return rc case D sum El rxdata frm OFS STA _ PLD lt lt 8 El rxdata frm OFS STA PLD 1 SUM data return rc case A 100 Application Note U18433EJ2VOAN set CHAPTER 6 UART COMMUNICATION MODE 6 14 Security Set Command 6 14 1 Processing sequence chart Security Set command processing sequence Programmer 78KOR Kx3 Wait from previous frame reception slo until next command tran
70. le 1 make send data frame if bottom send head gt 256 rest size gt 256 is_end false yes not is end frame send_size 256 transmit size 256 byte Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE else is_end true send_size bottom send_head 1 transmit size bottom send_head 1 byte memcpy f1 txdata frm rom_buf send_head send_size set data frame payload send_head send_size fl wait tFD3 wait before sending data frame put_dfrm_ua send_size fl_txdata_frm is_end send user data rc get_sfrm_ua fl_ua_sfrm tWT4 MAX get status frame switch rc case FLC NO ERR break continue case FLC DFTO ERR return rc break case C default return rc break case B if fl st2 ua FLST_ACK ST2 ACK rc decode status fl sti ua No return rc case D if is_end break RRR RRR kikki kk ERE REE RRE RARA RRA AA RR RAR RR RRA Check internally verify Ey RRR RRRRRRKE KR RE KERR EER RARA RRA ARK RR RR RA RRA re get_sfrm_ua fl_ua_sfrm tWT5_MAX block_num get status frame again switch rc case FLC_NO_ERR return rc break case A case FLC_DFTO_ERR return rc break case C default return rc break case E return rc 79 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 9 Verify Command 6 9 1 Processing sequence chart Verify command proc
71. ledgment ACK Normal acknowledgment Checksum error Error returned if data in a frame transmitted from the programmer is abnormal Verify error Error returned if a verify error has occurred upon verifying data transmitted from the programmer Protect error Error returned if an attempt is made to execute processing that is prohibited by the Security Set command Negative acknowledgment NACK Negative acknowledgment MRG10 error Erase verify error MRG11 error Internal verify error or blank check error during data write Write error Write error Processing in progress BUSY Note Busy response Note During CSI communication 1 byte FFH may be transmitted as well as FFH as the data frame format Reception of a checksum error or NACK is treated as an immediate abnormal end in this manual When a dedicated programmer is developed however the processing may be retried without problem from the wait immediately before transmission of the command that results a checksum error or NACK In this event limiting the retry count is recommended for preventing infinite repetition of the retry operation Although not listed in the above table if a time out error BUSY time out or time out in data frame reception during UART communication occurs it is recommended to shutdown the power supply to the 78KOR Kx3 refer to 2 6 Shutting Down Target Power Supply and then conne
72. lowchart of command processing and the sample program Application Note U18433EJ2VOAN 39 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 8 Block Blank Check Command 5 8 1 Description This command is used to check if a block in the flash memory with a specified block number is blank erased state A block can be specified with the start address of the blank check start block and the last address of the blank check end block Successive multiple blocks can be specified 5 8 2 Command frame and status frame Figure 5 19 shows the format of a command frame for the Block Blank Check command and Figure 5 20 shows the status frame for the command Figure 5 19 Block Blank Check Command Frame from Programmer to 78KOR Kx3 SOH LEN COM Command Information SUM ETX 01H 08H Seh SAH SAM SAL EAH EAM EAL D01 Checksum 03H u Block Blank Check Remark SAH SAM SAL Block blank check start address start address of any block SAH Start address high bits 23 to 16 SAM Start address middle bits 15 to 8 SAL Start address low bits 7 to 0 EAH EAM EAL Block blank check end address last address of any block EAH End address high bits 23 to 16 EAM End address middle bits 15 to 8 EAL End address low bits 7 to 0 D01 00H When performing a block blank check for a single block 01H When performing a blank check for the complete area before erasing the chip F
73. lt 5 gt e When ST2 ACK Abnormal termination D lt 9 gt A time out check is performed until status frame reception If a time out occurs a time out error C is returned time out time twrs MAX x number of blocks lt 10 gt The status code is checked When ST1 ACK Normal completion A When ST1 ACK Abnormal termination E Application Note U18433EJ2VOAN 75 CHAPTER 6 UART COMMUNICATION MODE 6 8 3 Status at processing completion Status at Processing Completion Normal completion A Normal acknowledgment ACK Status Code Description The command was executed normally and the user data was written normally Abnormal termination B Parameter error The start end address is out of the flash memory range the specified start end address is not the first end address of the block or the write start address is larger than the end address Checksum error The checksum of the transmitted command frame or data frame does not match Protect error Write is prohibited in the security setting A boot block is included in the specified range and boot block rewrite is prohibited Negative acknowledgment NACK Command frame data or data frame data is abnormal such as invalid data length LEN or no ETX Time out error C The status frame was not received within the specified time Abnormal termination D E 76 MRG10 error MRG11 error Write err
74. mand frame data is abnormal such as invalid data length LEN or no ETX MRG11 error The flash memory of the specified block is not blank Time out error C The status frame was not received within the specified time 86 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 10 4 Flowchart Block Blank Check command processing y Wait from previous frame reception until next command transmission tcom y Command frame transmission processing Block Blank Check Status frame received No twrs MAX x number of blocks Yes Time out error C Abnormal termination d No Status ACK KE completion A Application Note U18433EJ2VOAN 87 CHAPTER 6 UART COMMUNICATION MODE 6 10 5 Sample program The following shows a sample program for Block Blank Check command processing RRR RERRREKRKE EKER ER ERK KERR KEE KEKE EKER ER ERE RRA RRA RARE REA RAR RR RR RARAS Block blank check command Zi S AEREA ERE REE EKER RR KER RRA REA RRA RR RRA RRA RARE RARE RRA RARA RR RARAS i u32 top i u32 bottom i u8 whole r ul6 top address of blank check bottom address of blank check lt 1 gt check w NON user flash lt 0 gt chek only user flash error code A x eee A RRR RERRRR EKER RE ER ERE REE RRR KEE ERE
75. mand is transmitted by command frame transmission processing A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twrs MAX The status code is checked When ST1 ACK Proceeds to lt 5 gt When ST1 ACK Abnormal termination B Waits from the previous frame reception until the next data frame transmission wait time tra User data for verifying is transmitted by data frame transmission processing A time out check is performed from user data transmission until status frame reception If a time out occurs a time out error C is returned time out time twr7 MAX The status code ST1 ST2 is checked also refer to the processing sequence chart and flowchart When ST1 ACK Abnormal termination B When ST1 ACK The following processing is performed according to the ST2 value e When ST2 ACK If transmission of all data frames is completed the processing ends normally A If there still remain data frames to be transmitted the processing re executes the sequence from lt 5 gt e When ST2 ACK Abnormal termination D 6 9 3 Status at processing completion Status at Processing Completion Status Code Description Normal Normal acknowledgment The command was executed normally and the verify was completion A ACK completed normally Abnormal Parameter error The start end address is out of the flash memor
76. n communication The commands used by the programmer and their functions are listed below Table 2 5 List of Commands Transmitted from Programmer to 78KOR Kx3 Command Number Command Name Reset Function Detects synchronization in communication Baud Rate Set Sets the baud rate for single wire UART Chip Erase Erases the entire flash memory area Block Erase Erases a specified area in the flash memory Programming Writes data to a specified area in the flash memory Verify Compares the contents in a specified area in the flash memory with data transmitted from the programmer Block Blank Check Checks the erase status of a specified block in the flash memory Silicon Signature Acquires 78KOR Kx3 information part number flash memory configuration etc Version Get Acquires version information of the 78KOR Kx3 and firmware Checksum Acquires checksum data of a specified area Security Set Sets security information 24 Application Note U18433EJ2VOAN CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 9 Status List The following table lists the status codes the programmer receives from the 78KOR Kx3 Status Code Status Command number error Table 2 6 Status Code List Description Error returned if a command not supported is received Parameter error Error returned if command information parameter is invalid Normal acknow
77. ng data in the specified address range from the initial value 0000H in 1 byte units 5 11 2 Command frame and status frame Figure 5 27 shows the format of a command frame for the Checksum command and Figure 5 28 shows the status frame for the command Figure 5 27 Checksum Command Frame from Programmer to 78KOR Kx3 SOH LEN COM Command Information SUM ETX BOH 01H 07H SAH SAM SAL EAH EAM EAL Checksum 03H Checksum Remark SAH SAM SAL Checksum calculation start addresses EAH EAM EAL Checksum calculation end addresses Figure 5 28 Status Frame for Checksum Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 Checksum 03H Remark ST1 Command reception result 5 11 3 Checksum data frame Figure 5 29 shows the format of a frame that includes checksum data Figure 5 29 Checksum Data Frame from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 02H CK1 CK2 Checksum 03H Remark CK1 Higher 8 bits of checksum data CK2 Lower 8 bits of checksum data Read 6 13 Checksum Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program Application Note U18433EJ2V0AN 51 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 12 Security Set Command 5 12 1 Description This command is used to perform security se
78. noncnnnoncnnnnnn cnn nnor o nr ran rr rr rn n rre r rre ren 98 6 13 3 Status at processing completion oooonnccnnnnninnoninccnnncncononconnncnnnn conan cnn ca ran cnnn rca 98 6 13 47 ElowchHaTtevmci A a ne eee 99 6 13 5 Sample progra putitas Aita 100 6 14 Security Set COMMANU ocmciccccnncnnncnnnnaccnrr rc 101 6 14 1 Processing Sequence Chal EE 101 6 14 2 Description of processing SEQUENCE ee eeeeeeeeteseeeeteneeeeeeeneeeteeaeeeeeeneeeeeeaeeesenaeeeeseaeeeessaneeeenaes 102 6 14 3 Status at processing completion ooooincccinninnccnonccnnnccnoncnnnnncnnnnncnnn cnn cnn cnn narran ran n narran rn 102 6 14 4 lee 103 6 14 5 Sample program eene tiv ae eed ie dite eh ei 104 CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS 106 APPENDIX A CIRCUIT DIAGRAMS REFERENCE ccccssseceeeseeeceenseseeeensneeeeeenseeeeeenseaeeeenees 122 Application Note U18433EJ2V0AN 9 CHAPTER 1 FLASH MEMORY PROGRAMMING To rewrite the contents of the internal flash memory of the 78KOR Kx3 a dedicated flash memory programmer hereafter referred to as the programmer is usually used This application note explains how to develop a dedicated programmer 1 1 Overview The 78KOR Kx3 incorporates firmware that controls flash memory programming The programming to the internal flash memory is performed by transmitting receiving commands between the programmer and the 78KOR Kx3 via serial communication
79. nual consists of the following main sections e Flash memory programming e Programmer operating environment e Basic programmer operation e Command data frame format e Description of command processing e UART communication mode e Flash memory programming parameter characteristics It is assumed that the reader of this manual has general knowledge in the fields of electrical engineering logic circuits and microcontrollers e To gain a general understanding of functions Read this manual in the order of the CONTENTS e To learn more about the 78KOR Kx3 s hardware functions See the user s manual of each 78KOR Kx3 product Data significance Higher digits on the left and lower digits on the right Active low representation Xxx overscore over pin or signal name Note Footnote for item marked with Note in the text Caution Information requiring particular attention Remark Supplementary information Numeral representation Binary XXXX or xxxxB Decimal XXXX Hexadecimal XXXXH Application Note U18433EJ2V0AN 5 CONTENTS CHAPTER 1 FLASH MEMORY PROGRAMMING ccccessscceeeseseeeeeseseeeenseseeeeeseeeeeseseseenenseseeees 10 TI e EE 10 1 2 Susteut Gopftgutratlorg Seege eege EENS ee ee 11 1 3 Programming Overview cccecccescceseteeeeseeeeeeeeesnaeeesneeeeeeeessaaesgeeeeeneeeescaesasaeeeeeeeesesaeseseenenseeeeees 12 1 3 1 Setting flash memory programming mode ceeeeeeeeeteeeeeenee tees
80. o Vpop EVob 0 1 AVREF mes GND Vss EVss 0 1 AVSS Note When performing off board write operation connect this pin to Von When performing on board write operation supply the same power as in normal operation mode At this time make sure to set so that Von gt AVreF o 1 2 2 5 Other pins For the connection of the pins that are not connected to the programmer refer to the chapter describing the flash memory in the user s manual of each device 18 Application Note U18433EJ2VOAN CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 3 Basic Flowchart The following illustrates the basic flowchart for performing flash memory rewriting with the programmer Figure 2 4 Basic Flowchart for Flash Memory Rewrite Processing r m ON Basic flow l Power application to target See Figure 2 5 y Mode setting reset release See 2 4 y Synchronization processing Reset command See 5 2 Communication speed setting Baud Rate Set command See 5 3 Signature acquisition Silicon Signature command See 5 9 f Command execution y eras pe processiig SS No S A completed Yes Y Target power shutdown processing Reset input and power shutdown during rewriting is See 2 6 prohibited because security information may be i lost G Es Application Note U18433EJ2V0AN CHAPTER 2 PROGRAMMER OPER
81. o i k d M NA i h i i RESET i i i i i Vt 1 1 Reset input Power shutdown Application Note U18433EJ2VOAN 23 CHAPTER 2 PROGRAMMER OPERATING ENVIRONMENT 2 7 Manipulation of Flash Memory The flash memory incorporated in the 78KOR Kx3 has functions to manipulate the flash memory as listed in Table 2 4 The programmer transmits commands to control these functions to the 78KOR Kx3 and checks the response status sent from the 78KOR Kx3 to manipulate the flash memory Table 2 4 List of Flash Memory Manipulating Functions Classification Function Name Chip erase Description Erases the entire flash memory area Clears the security flag Block erase Erases a specified block in the flash memory Write Writes data to a specified area in the flash memory Verify Compares data acquired from a specified address in the flash memory with data transmitted from the programmer on the 78KOR Kx3 side Blank check Block blank check Checks the erase status of a specified area in the flash memory Information Silicon signature acquisition Acquires writing protocol information acquisition Version acquisition Acquires version information of the 78KOR Kx3 and firmware Checksum acquisition Acquires checksum data of a specified area Security Security setting Sets security information Other Reset 2 8 Command List Detects synchronization i
82. ononnnnnnnononcnnnnnnnnrnnnn nn non n nn n ramon nr rnnnn rn nannnnn 49 5 10 3 Version data frame ionis n A ee ee rea edie 50 5 11 Checksum Command 2 eege EENS EEN ENEE ENEE ENEE NEE EEN 51 5 111 DIET L TEE 51 5 11 2 Command frame and status fame ooooconnococonoccccnononcnnnononononnnnnnnononnnnnnonnnrnnnn rn naar Annt EEEE EEEE Ennen 51 5 11 3 Checksum data frame cccccccccecsencceesenceeeesneeesceaeeeeseaeeceecaneeescaeeeeseaeeeesaaeeesecaeesessaseeesseneeesssaeess 51 5 12 Security Set Command saana e lena 52 5 12 11 Re le LTE 52 5 12 2 Command frame and status fame ooooconococononcccnononcnnnnnnnononnnnnnnononcnnnnonnn ron n nn non EEEE EEEE EEEE E Ennen 52 5 12 3 Data frame and status frame eee eeeeeeaeeeeeeeeeseeaaeeeeeeeseceaaeeeeeeeesseceeeeeeeeeseceuneeeeeees 53 5 12 4 Internal verify check and Status frame AA 53 CHAPTER 6 UART COMMUNICATION MODE 00ociocccccccccnncconnanannccnocnnnnnnnnannn cn nrnn nana ren nana 55 6 1 Command Frame Transmission Processing Flowchart oonmnccncnnnnnnnconnnnnecnsennnaernnnarrnnercnnns 55 6 2 Data Frame Transmission Processing Flowchart 2 cccccceseseeeeeeeceeeeeseneeeeeeeeeeeeneeneeneneeeees 56 6 3 Data Frame Reception Processing Flowchart oooonnnnninnnnncincnnnnnccocccnnenennn nana ccnnenn nara 57 EW Re dE D 58 6 4 1 Processing Sequence Chal cccsececeseneeeeseeeeeeseeeeeeseneeseneneeeceenenensenseseneeeeseneeaeneeseneesenensenseneaens 58 6 4 2 Description of proc
83. or A write error has occurred Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 8 4 Flowchart X Programming command processing until next command transmission Vv Wait from previous frame reception tcom y Command frame transmission processing Programming Y Status frame No received Yes Timed out twT3 MAX Yes P v N Time out error C X J pea Status ACK gt Yes F N Abnormal termination B Ae y fait from previous frame rece until next command transmi tFD3 v Data frame transmission processing User program T Status frame No received a Yes a No Timed out gt twra MAX Yes y s N Time out error C A o ST1 ACK DEER Yes Abnormal termination B BA sT2 ack O Yes E X Abnormal termination D x Se No All data frames transmitted _ Yes Re Status frame No received Yes D lt Timed out gt Mo ROE lt twrs MAX Status ACK Yes x number of E blocks z N Time out error C m KZ K AJ S Pa x Va Abnormal termination E A Normal completion A Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 8 5 Sample program 78 The following shows a sample program for Programming command processing ERR
84. or Security Set Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 a Checksum 03H Remark ST1 a Command reception result 52 Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 12 3 Data frame and status frame Figure 5 32 shows the format of a security data frame and Figure 5 33 shows the status frame for the data Figure 5 32 Security Data Frame from Programmer to 78KOR Kx3 STX LEN Data SUM ETX 02H 06H FLG BOT FSWS H FSWS L FSWE H FSWE L Checksum 03H Remarks 1 FLG Security flag BOT Boot cluster last block number fixed to 01H FSWS H Higher 8 bits of flash shield window start block number fixed to 00H FSWS L Lower 8 bits of flash shield window start block number FSWE H Higher 8 bits of flash shield window end block number fixed to OOH FSWE L Lower 8 bits of flash shield window end block number If the flash shield window is not to be set set FSWS to 0000H and the end block to the target device end block number Figure 5 33 Status Frame for Security Data Writing from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 b Checksum 03H Remark ST1 b Security data write result 5 12 4 Internal verify check and status frame Figure 5 34 shows the status frame for internal verify check Figure 5 34 Status Frame for Internal Verify Check
85. ote U18433EJ2VOAN APPENDIX A CIRCUIT DIAGRAMS REFERENCE TOKOR Kxa Flash programmer sample application MAIN BOARD E as Bela lt ecll e T rear Cd Jr JE 0 COLAS O CVC CEAN CEC OCH EO OC C Figure A 1 Reference Circuit Diagram of Programmer and 78KOR Kx3 Main Board T4HCOTS TSA eral 13 MSMS4 SEF P 7 H GMD AO TMO REESE EEE AN ao Ooo ut littriiirirooono TT 1 ITT Zi AUREFO 5 auss P10 Pi1 ADL vi E AMREF 1 ADO a Pea EVDD ES 5 PO1 Buses las AAA ASIE EF SSE Gee 66 WRI 65 ne Whe Eg xi T FZ313Y FCH E 14 s2 PCM2 Wi l RESET PCM L5 xTI Hart El 4MHz ls r tar ES 1 17 So ae 331 Pez CSG 18 ss 15 Pes P915 ES ERER Pad F914 100 ipe z l pos P gt 13 E ER 55 o Pas P912 52 23 s100 bail Es soog P210 E SE e 24 SC pos BF RESET 1 Lou Tt ines aes Pos D E NUEVO NR toe CA E RE PY P bp S S IC LTU E OP P Or Oo Ent Ion HD EDD DD be GMD aclara lara Jalea fito lol Ut DI OU OU BIO P PPP PLA EIS d d stat st d d d a D TIT GND E LCD VOD GD TC4050 150 3 gt 1a AT SS CHZ A E at CSS A us i e OD AH a i lu g RESET 16 f eu HS i 14 tr C4 i T1OUT L RIINH i RiouT H F T DSUB Pin 11 i 1 TLIN 5 rar Tarn HE L REINO RZOUT GND LS MAXZ32CPE L CS CHL To Host PC TT GND Application Note U18433EJ2VOAN
86. ote U18433EJ2VOAN 41 5 9 3 Silicon signature data frame CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING Figure 5 23 shows the format of a frame that includes silicon signature data Figure 5 23 Silicon Signature Data Frame from 78KOR Kx3 to Programmer 42 STX LEN Data 02H n VEN MET MSC DEC1 DEC2 UAE 3 DEV 10 Data continued SUM ETX SCF BOT FSWSH FSWSL FSWEH FSWEL checksum 03H Remarks 1 n LEN Data length VEN Vendor code NEC 10H MET Macro extension code MSC Macro function code DEC1 Device extension code 1 DEC2 Device extension code 2 UAE User flash ROM last address 3 bytes DEV Device name 10 bytes SCF Security flag information BOT Boot block number FSWSH Higher 8 bit side of flash shield window FSW start block FSWSL Lower 8 bit side of flash shield window FSW start block FSWEH Higher 8 bit side of flash shield window FSW end block FSWEL Lower 8 bit side of flash shield window FSW end block 2 For the vendor code VEN extension code MET function code MSC device extension code 1 DEC1 and device extension code 2 DEC2 the lower 7 bits are used as data entity and the highest bit is used as an odd parity The following shows an example Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING Table 5 2 Example of Silicon Signature Data Content Vendor code NEC Example of Silicon Signature Data 00010
87. ottom send head gt 256 vest size gt 256 is_end false yes not is_end frame send_size 256 transmit size 256 byte else send_head 1 byte is_end true send_size bottom send_head 1 transmit size bottom Application Note U18433EJ2VOAN 83 CHAPTER 6 UART COMMUNICATION MODE 84 memcpy f1 txdata frm buf send head send_size set data frame payload send_head send_size fl wait tFD3 put dfrm ua send size fl txdata frm is end rc get sfrm ua fl ua sfrm tWT7 MAX switch rc case FLC_NO_ERR break def case FLC_DFTO_ERR return rc break default return rc break if fl st2 ua FLST_ACK JAS STILO rc decode_status fl_st2_ua No return rc case if is_end break continue send user data get status frame continue case C case B ACK D send all user data yes return FLC_NO_ERR case A Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 10 Block Blank Check Command 6 10 1 Processing sequence chart Block Blank Check command processing sequence Programmer 78KOR Kx3 Wait from previous frame reception until next command transmission tcom lt 2 gt Block Blank Check command frame transmission twrs MAX A 3 Time out check for x Eeer eg Si Time out ie status frame reception occur
88. r The checksum of the transmitted command frame does not match Negative acknowledgment Command frame data is abnormal such as invalid data length NACK LEN or no ETX Time out error C The status frame or data frame was not received within the specified time Data frame error D The checksum of the data frame received as checksum data does not match 98 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 13 4 Flowchart e Checksum command a processing e Y Wait from previous frame reception until next command transmission tcom Y Command frame transmission processing Checksum Status frame received twr16 MAX Time out error C a Abnormal termination B Data frame checksum data received No tro1 MAX Normal data frame d Time out error C d 8 e Data frame error D J Normal completion A NE C Application Note U18433EJ2VOAN 99 CHAPTER 6 UART COMMUNICATION MODE 6 13 5 Sample program The following shows a sample program for Checksum command processing RRR RRRR RRR kk EEE REE ERE RRR KEKE EERE ER EERE EKER RR RR RRE RARA RRA RR ARRAY Je Get checksum command A AAN i u16 sum pointer to checksum save area i i u32 top start address pe i u32 bottom end address r u
89. r rra rra nennnns 86 6 10 3 Status at processing completion oooocccnonccnnccconcccnnnncnnononnncnnnanonnn cnn cn nana n ran cn rana nnn cnn Ree nK nan cancer 86 A said ie ie baie E via el eee eee ee nian 87 6 10 57 Sample program iii oi ld 88 Silicon Signature Command conmciccccncnnnnncnnannnan nenene Seana Kaa AKA ASSA KA ennnen mannm SARS nnmnnn nnna 89 6 11 1 Processing Sequence Chalt e4o eee4reeee4eer eee eee Kena Kn KaK KKK AKE KA EKK K ASK KK AK ia 89 6 11 2 Description of processing Sequence oooccccnonccccononcncnnnnnnonnnnn cnn nnnnnrnnnnr nr eee KKK nar KEE K KKK RK R KK 90 6 11 3 Status at processing completion oooooncccinnncnnccnoncccnoccnnncnconnncnnnn conc cnn cnn nn rn rca rnn narrar narran nn nnn cnn 90 GE MR CM ar EE EN 6 11 5 Sample program ege detente iden A anti dE 92 Version Get Command ccnminccccnnnnnnnncnnnr nnmnnn nennen 93 6 124 Processing sequence EL EE 93 6 12 2 Description of processing Sequence ooccccnnoccccononcncnnnnnconnnnnnnnnnnnrr nan nr nr nar n rn naar rre enn n nr rr nr n rn rana nenas 94 6 12 3 Status at processing completion ooonncccinnccnncccnoncnnnncncnncnnonnncnnnncnnnnnon cn ran nc nn rn KRK KARR nar n cri n ra nnncnnnn 94 6712 4 Flowchalt EE 95 612 5 Sample POMO eieiei ee Ee Eer EE 96 Checksum Command sisi esaii SEENEN EENS EENEG 97 Application Note U18433EJ2VOAN 6 13 1 Processing sequence TEE 97 6 13 2 Description of processing SEQUENCE cccononcccnononcnnno
90. reception If a time out occurs a time out error C is returned time out time twr13 MAX lt 4 gt The status code is checked When ST1 ACK Proceeds to lt 5 gt When ST1 ACK Abnormal termination B lt 5 gt Waits from the previous frame reception until the next data frame transmission wait time Cer lt 6 gt The data frame security setting data is transmitted by data frame transmission processing lt 7 gt A time out check is performed until status frame reception If a time out occurs a time out error C is returned time out time twria MAX lt 8 gt The status code is checked When ST1 ACK Proceeds to lt 9 gt When ST1 ACK Abnormal termination D lt 9 gt A time out check is performed until status frame reception If a time out occurs a time out error C is returned time out time twris MAX lt 10 gt The status code is checked When ST1 ACK Normal completion A When ST1 ACK Abnormal termination E 6 14 3 Status at processing completion Status at Processing Completion Status Code Normal completion A Normal acknowledgment ACK Description The command was executed normally and security setting data was set normally Abnormal Parameter error termination B Parameter BOT is not 01H the FSW setting block is not set so that the start block number is larger than the end block number or the FSW end block number is larger than the last block number
91. s blocks Status frame received within specified time lt 4 gt Status frame reception Time out error C Reception status ACK other than ACK Other than ACK ACK Abnormal termination B Normal completion A Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 10 2 Description of processing sequence lt 1 gt Waits from the previous frame reception until the next command transmission wait time tcom lt 2 gt The Block Blank Check command is transmitted by command frame transmission processing lt 3 gt A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twrs MAX x number of blocks lt 4 gt The status code is checked When ST1 ACK Normal completion A When ST1 s ACK Abnormal termination B 6 10 3 Status at processing completion Status at Processing Completion Status Code Normal completion A Normal acknowledgment ACK Description The command was executed normally and block blank check was executed normally Abnormal termination B Parameter error The end address is out of the flash memory range the start end address is not the first end address of the block or the value of parameter D01 is other than OOH or 01H Checksum error The checksum of the transmitted command frame does not match Negative acknowledgment NACK Com
92. s frame Data frame gt gt twr16 tro1 Remark The descriptions in parentheses indicate operations of the 78KOR Kx3 g Programming command Command frame Status frame Data frame 1 Status frame gt gt gt twr3 tro2 twra Data frame n Status frame Status frame TOOLO Ass Reception a D twr4 twts X number of blocks Remark The descriptions in parentheses indicate operations of the 78KOR Kx3 Application Note U18433EJ2VOAN 119 CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS 120 h Verify command Command frame Status frame Data frame Status frame gt lt gt twre tros twr7 Data frame n 1 Status frame Data frame n Status frame gt gt tw tros twr 5 Remark The descriptions in parentheses indicate operations of the 78KOR Kx3 i Security Set command Command frame Status frame Data frame Status frame Status frame e j e ore twr13 tros berg P twris i Remark The descriptions in parentheses indicate operations of the 78KOR Kx3 j Wait before command frame transmission Status frame Command frame TOOLO Transmission Reception tcom Remark The descriptions in parentheses indicate operations of the 78KOR Kx3 Application Note U18433EJ2V0AN MEMO Application Note U18433EJ2VOAN 121 APPENDIX A CIRCUIT DIAGRAMS REFERENCE Figures A 1 and A 2 show circuit diagrams of the programmer and the 78KOR Kx3 for reference 122 Application N
93. s or more Remark The waits are defined as follows lt tor tro2 tFD3 1FD4 tcom gt The 78KOR Kx3 is readied for the next communication after the MIN time has elapsed after completion of the previous communication lt DT tFD1 gt The 78KOR Kx3 is readied for the next communication after the MIN time has elapsed after completion of the previous communication Application Note U18433EJ2VOAN 107 CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS c Command characteristics Command Reset Condition Note 1 Chip Erase Product group Af 60 6 5 7 x total number of 1112 140 9 x total number of blocks ms blocks ms 19403 5 140 9 x total number of blocks 128 ms Product group B 812 9 5 7 x total number of blocks 128 ms 17 5 ms Block Erase 1 1 275 5 x execution count of simultaneous selection and erasure 137 9 x number of blocks to be erased ms Programming 47 2 ms Block 0 860 0 ms Other than block 0 16 3 ms Verify Block Blank Check Baud Rate Set Silicon Signature Version Get Security Set 20 0 Ls 843 7 ms Checksum Notes 1 Reception must be enabled for the programmer before command frame transmission Also set the time out time for the programmer to 3 seconds or more 2 Product group A Flash size lt 256 KB number of blocks lt 128 3 Product group B Flas
94. security setting see 5 12 Security Set Command 5 4 2 Command frame and status frame Figure 5 6 shows the format of a command frame for the Chip Erase command and Figure 5 7 shows the status frame for the command Figure 5 6 Chip Erase Command Frame from Programmer to 78KOR Kx3 SOH LEN COM SUM ETX 01H 01H Sn Checksum 03H u Chip Erase Figure 5 7 Status Frame for Chip Erase Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 Checksum 03H Remark ST1 Chip erase result Read 6 6 Chip Erase Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program 34 Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 5 Block Erase Command 5 5 1 Description This command is used to erase the content of flash memory of the block with the specified number A block can be specified with the first address of the block where erasing starts and the last address where erasing ends Successive multiple blocks can be specified Erasing cannot be performed however if erasing is prohibited due to the security setting see 5 12 Security Set Command 5 5 2 Command frame and status frame Figure 5 8 shows the format of a command frame for the Block Erase command and Figure 5 9 shows the status frame for the command Figure 5 8 Block Eras
95. smission tcom lt 2 gt Security Set command frame transmission Time out_ Time out check for ec EES ZE status frame reception twris MAX Status frame received within specified time lt 4 gt Status frame reception Z Reception status K ACK other than ACK n Ln fe GC Wait from previous frame reception oe al termination ELY until data frame transmission tros lt 6 gt Data frame security data transmission Time out J Time out check for lt occurs iis status frame reception twr14 MAX Status frame received within specified time S lt 8 gt Status frame reception Reception status AC K other than ACK Other than ACK ae Abnorm al termination a ACK Time out check for lt 9 gt _ occurs status frame reception twris MAX Status frame received within specified time Status frame reception S Reception status SCH ACK other than ACK Abnormal termination SR Application Note U18433EJ2VOAN 101 CHAPTER 6 UART COMMUNICATION MODE 6 14 2 Description of processing sequence lt 1 gt Waits from the previous frame reception until the next command transmission wait time tcom lt 2 gt The Security Set command is transmitted by command frame transmission processing lt 3 gt A time out check is performed from command transmission until status frame
96. st up to date specifications of NEC Electronics products Not all products and or types are available in every country Please check with an NEC Electronics sales representative for availability and additional information e No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics NEC Electronics assumes no responsibility for any errors that may appear in this document e NEC Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products No license express implied or otherwise is granted under any patents copyrights or other intellectual property rights of NEC Electronics or others e Descriptions of circuits software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples The incorporation of these circuits software and information in the design of a customer s equipment shall be done under the full responsibility of the customer NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits software and information e While NEC Electronics endeavors to enhance the quality reliability and safety of N
97. t baudrate command VA KKK KKK KK K KK K K K AK K K A K AK K K K KR K K K A K K K KKK KA KKK K KKK RK KKK KKK KKK KK RR KKK KK Z 1 u8 brid baudrate ID SCH r ul6 error code RRR ERE EER ERK RE RE RAR RRE EKER KEKE REE KERR ERE REE KEE RRR RARA RA RRA AS u16 fl_ua_setbaud u8 brid ul6 roy us br u32 retry 1_cmd_prm 0 0x00 D01 adjust by target device 1_cmd_prm 1 0x00 D02 adjust by target device 1_cmd_prm 2 0x0a D03 fixed value f1_cmd_prm 3 0x01 DO4 noise filter on fl wait tCOM wait before sending command put cmd ua FL COM SET BAUDRATE 1 4 fl_cmd_prm send Baudrate Set set flbaud brid change baud rate set uart0 br brid change baud rate h w retry tRS while 1 fl wait tWT10 put cmd ua FL COM RESET 1 f1_cmd prm send RESET command rc get sfrm ua fl ua sfrm tWT0 MAX get status frame if reit if retry continue else return rc break got ACK switch rc case FLC_NO_ERR return rc break case A case FLC_DFTO_ERR return rc break case C default return rc break case B return rc Application Note U18433EJ2VOAN 115200bps 115200bps command 65 CHAPTER 6 UART COMMUNICATION MODE 6 6 Chip Erase Command 6 6 1 Processing sequence chart Chip Erase command processing sequence Programmer 78KOR Kx3 lt 1
98. than 0003H k 8 x 10 x E BAUD RATE E READY pulse 9 600 bps error of the 78KOR during flash lead in Example 1 0 error for READY pulse low level 9 bits 9 600 bps length READY pulse 937 5 us When set to 250 000 bps E 1 00 k 0020H D02H 00H DO2L 20H 32 Application Note U18433EJ2VOAN CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING Example 2 5 error for READY pulse low level 9 bits 9 600 bps length READY pulse 984 375 ws When set to 250 000 bps E 1 05 k 0021H D02H 00H DO2L 21H Example 3 5 error for READY pulse low level 9 bits 9 600 bps length READY pulse 890 625 ys When set to 250 000 bps E 0 95 k 001EH D02H 00H DO2L 1EH Figure 5 5 Status Frame for Baud Rate Set Command from 78KOR Kx3 to Programmer STX LEN Data SUM ETX 02H 01H ST1 checksum 03H Remark ST1 Synchronization detection result Read 6 5 Baud Rate Set Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program Application Note U18433EJ2VOAN 33 CHAPTER 5 DESCRIPTION OF COMMAND PROCESSING 5 4 Chip Erase Command 5 4 1 Description This command is used to erase the entire contents of the flash memory In addition all of the information that is set by security setting processing can be initialized by chip erase processing as long as erasure is not prohibited by the
99. ther than ACK ae es ot Es X Abnormal termination E NE 74 Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 8 2 Description of processing sequence lt 1 gt Waits from the previous frame reception until the next command transmission wait time tcom lt 2 gt The Programming command is transmitted by command frame transmission processing lt 3 gt A time out check is performed from command transmission until status frame reception If a time out occurs a time out error C is returned time out time twr3 MAX lt 4 gt The status code is checked When ST1 ACK Proceeds to lt 5 gt When ST1 ACK Abnormal termination B lt 5 gt Waits from the previous frame reception until the next data frame transmission wait time trps lt 6 gt User data is transmitted by data frame transmission processing lt 7 gt A time out check is performed from user data transmission until data frame reception If a time out occurs a time out error C is returned time out time twra MAX lt 8 gt The status code ST1 ST2 is checked also refer to the processing sequence chart and flowchart When ST1 ACK Abnormal termination B When ST1 ACK The following processing is performed according to the ST2 value e When ST2 ACK Proceeds to lt 9 gt when transmission of all data frames is completed If there still remain data frames to be transmitted the processing re executes the sequence from
100. tion Note U18433EJ2VOAN Timedout 103 CHAPTER 6 UART COMMUNICATION MODE 6 14 5 Sample program The following shows a sample program for Security Set command processing LR RRRERRRE KEK EKR EEE REE KKK REE RR RRA REA KER EKER RRR EERE ERE KEKE REE RERER E Gre Gig Set security flag command Z RT Ir kkkkkkkkkkkkkk kk kkkk k kkkkkkkkkk kkkkkkkk kk kk kkkk kkk kkkkkkkkkk i u8 scf o Security flag data r u16 error code AEREA RRA ERE REE KR RARA RR RR RAR RRE RARE RR RR RRE RR ARRAY ul6 fl_ua_setscf u8 scf u8 bot u8 fsws u8 fswe ul6 rc RE RERRRRERE EKER REE REE RRA RARA RR RRA RARE RRA RAR RARAS ZS set params a FERRERA RARE RARA RARA RARA RRA RRE RE RRA RAR RARAS f1_cmd_prm 0 0x00 BLK must be 0x00 fl_cmd_prm 1 0x00 PAG must be 0x00 fl txdata frm 0 scf 0b11101000 FLG bit 7 6 5 3 must be 1 fl_txdata_frm 1 bot BOT fl txdata frm 2 0x00 FSWS High fl_txdata_frm 3 fsws FSWS Low fl_txdata_frm 4 0x00 ESWE High fl_txdata_frm 5 fswe FSWE Low RE RERRRREREEK ERR EER EKER RE RR RR RAR RARE RR kkk RRA RARAS L send command FRERERRRERARA RE RARE RE RRA RR RAR ERE RARA RR RAR RARAS fl wait tCOM wait before sending command put_cmd_ua FL_COM_SET_SECURITY 3 f1_cmd prm rc get_sfrm_ua fl_ua_sfrm tWT13 MAX get status frame switch rc case
101. ttings enabling disabling of write block erase chip erase and boot block rewriting and setting of flash shield window start end block number By performing these settings with this command rewriting of the flash memory by an unauthorized party can be restricted and the rewrite area for self programming can be specified Caution Even after the security setting additional setting of changing from enable to disable can be performed however changing from disable to enable is not possible If an attempt is made to perform such a setting a protect error 10H will occur If such setting is required all of the security flags must first be initialized by executing the Chip Erase command the Block Erase command cannot be used to initialize the security flags If chip erase or boot block rewrite has been disabled however chip erase itself will be impossible so the settings cannot be erased from the programmer Re confirmation of security setting execution is therefore recommended before disabling chip erase due to this programmer specification 5 12 2 Command frame and status frame Figure 5 30 shows the format of a command frame for the Security Set command and Figure 5 31 shows the status frame for the command Figure 5 30 Security Set Command Frame from Programmer to 78KOR Kx3 SOH LEN COM gommand SUM ETX Information 00H 00H 01H 03H AOH Security Set Checksum 03H Z c 2 Figure 5 31 Status Frame f
102. uired normally Abnormal Checksum error The checksum of the transmitted command frame does not termination B match Negative acknowledgment Command frame data is abnormal such as invalid data length NACK LEN or no ETX Time out error C The status frame or data frame was not received within the specified time Data frame error D The checksum of the data frame received as silicon signature 90 data does not match Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 11 4 Flowchart E Silicon Signature gt command processing Y Wait from previous frame reception until next command transmission AA Command frame transmission processing Silicon Signature tcom Status frame received Abnormal termination B twr11 MAX Yes de Time out error C Data frame silicon signature received Normal data frame d 8 e Data frame error D J Normal completion A NE C tro2 MAX ee d Time out error C Application Note U18433EJ2VOAN 91 CHAPTER 6 UART COMMUNICATION MODE 6 11 5 Sample program The following shows a sample program for Silicon Signature command processing BR RRRERRR EKER KER ER ERK RRA RR RRA RARA RAR ERR RRA RARE RARA RARA RARA RARAS Gre Get silicon signature command yA d E AEREA RARA RAR
103. ut error C is returned time out time twr2 MAX lt 4 gt The status code is checked When ST1 ACK Normal completion A When ST1 ACK Abnormal termination B 6 7 3 Status at processing completion Status at Processing Completion Status Code Normal completion A Normal acknowledgment ACK Description The command was executed normally and block erase was performed normally Abnormal Parameter error termination B The specified end address is out of the flash memory range or the specified start end address is not the first end address of the block Checksum error The checksum of the transmitted command frame does not match Protect error Write block erase or chip erase is prohibited in the security setting A boot block is included in the specified range and boot block rewrite is prohibited Negative acknowledgment NACK Command frame data is abnormal such as invalid data length LEN or no ETX MRG10 error An erase error has occurred Time out error C The status frame was not received within the specified time Application Note U18433EJ2VOAN 71 CHAPTER 6 UART COMMUNICATION MODE 6 7 4 Flowchart 72 Block Erase mn processing J EE Wait from previous frame reception until next command transmission tcom Y Command frame transmission processing Block Erase Status frame No recei
104. value that satisfies Condition 3 is 1 so the number of blocks to be selected and erased simultaneously is 1 only block 1 is then erased After block 1 is erased the next start block number is 2 and the number of blocks to be erased is 126 the values that satisfy Condition 1 are therefore 1 2 4 8 16 32 and 64 Moreover the values that satisfy Condition 2 are 1 and 2 the value that satisfies Condition 3 is 2 so the number of blocks to be selected and erased simultaneously is 2 blocks 2 and 3 are then erased After blocks 2 and 3 are erased the next start block number is 4 and the number of blocks to be erased is 124 the values that satisfy Condition 1 are therefore 1 2 4 8 16 32 and 64 Moreover the values that satisfy Condition 2 are 1 2 and 4 the value that satisfies Condition 3 is 4 so the number of blocks to be selected and erased simultaneously is 4 blocks 4 to 7 are then erased After blocks 4 to 7 are erased the next start block number is 8 and the number of blocks to be erased is 120 the values that satisfy Condition 1 are therefore 1 2 4 8 16 32 and 64 Moreover the values that satisfy Condition 2 are 1 2 4 and 8 the value that satisfies Condition 3 is 8 so the number of blocks to be selected and erased simultaneously is 8 blocks 8 to 15 are then erased After blocks 8 to 15 are erased the next start block number is 16 and the number of blocks to be erased is 112 the values that satisfy Condition
105. values is possible Boot block rewrite disable flag Same condition as that in flash memory programming mode on board off board programming Read 6 14 Security Set Command for details on the flowchart of the processing sequence between the programmer and the 78KOR Kx3 the flowchart of command processing and the sample program 54 Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE Command Frame Transmission Processing Flowchart o Command frame transmission processing X S y Command frame header SOH 01H transmission v Wait between data GE tor transmissions Y Data length LEN transmission Wait between data transmissions tor y Command number COM transmission gt x LEN 1 bytes Yes transmitted lt No Wait between data transmissions tor v Transmits 1 byte command information y Wait between data be tor transmissions v Checksum data SUM transmission v Wait between data anes tor transmissions v Command frame footer ETX 03H transmission y v fg K End of command frame transmission Jf X Application Note U18433EJ2VOAN 56 CHAPTER 6 UART COMMUNICATION MODE 6 2 Data Frame Transmission Processing Flowchart oa frame tr
106. values that satisfy Condition 2 are 1 and 2 the value that satisfies Condition 3 is 2 so the number of blocks to be selected and erased simultaneously is 2 blocks 8 and 9 are then erased After blocks 8 and 9 are erased the next start block number is 10 and the number of blocks to be erased is 1 the value that satisfies Condition 1 is therefore 1 This also satisfies Conditions 2 and 3 so the number of blocks to be selected and erased simultaneously is 1 block 10 is then erased Therefore simultaneous selection and erasure is executed four times 5 6 and 7 8 and 9 and 10 to erase blocks 5 to 10 so M 4 is obtained Application Note U18433EJ2V0AN CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS Block configuration when executing simultaneous selection and erasure when erasing blocks 5 to 10 lt Block number gt User area On a E T E T Th o A lt Range of blocks that can be selected and erased simultaneously gt Application Note U18433EJ2VOAN 115 CHAPTER 7 FLASH MEMORY PROGRAMMING PARAMETER CHARACTERISTICS Example 3 116 Erasing blocks 25 to 73 N number of blocks to be erased 49 lt 1 gt lt 2 gt lt 3 gt lt 4 gt lt b gt lt 6 gt The first start block number is 25 and the number of blocks to be erased is 49 the values that satisfy Condition 1 are therefore 1 2 4 8 16 and 32 Moreover the value that satisfies Condition 2 is 1 and the
107. ved EN Time out error C Abnormal termination B Yes Normal completion A lt P Application Note U18433EJ2V0AN CHAPTER 6 UART COMMUNICATION MODE 6 7 5 Sample program The following shows a sample program for Block Erase command processing KKK KKK KK K KK K K K AK K K A K AK K K K KR K K K A K KK A KK KA K KK K KKK RK KKK KEK KKK KK RR KR KKK Z EJ Erase block command E VA KKK KKK KK K KK K K K K K K A K AK K A KKK AS i u8 block block number ZZ r u16 error code Ze RRR RERER KERR REE ERR KER EKER KER EERE KEE RRR REE ERE RARE RAR RR KER RARA ARAS u16 fl ua erase blk u16 sblk ul6 eblk ul6 ele u32 wt2_max u32 top bottom top get top addr sblk get start address of start block bottom get bottom addr eblk get end address of end block set range prm fl cmd prm top bottom set SAH SAM SAL EAH EAM EAL wt2 max make wt2 max sblk eblk fl wait tCOM wait before sending command put_cmd_ua FL_COM_ERASE_BLOCK 1 6 fl_cmd_prm send ERASE CHIP command rc get_sfrm_ua fl_ua_sfrm wt2 max get status frame switch rc case FLC NO ERR return rc break case A case FLC_DFTO_ERR return rc break case C default return rc break case B return rea Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MODE 6 8 Programming Command
108. y range the termination B start end address is not the start end address of the block or the write start address is larger than the end address Checksum error The checksum of the transmitted command frame or data frame does not match Negative acknowledgment Command frame data is abnormal such as invalid data length NACK LEN or no ETX Time out error C The status frame was not received within the specified time Abnormal Verify error OFH ST2 A verify error has occurred termination D Application Note U18433EJ2VOAN 81 CHAPTER 6 UART COMMUNICATION MODE 6 9 4 Flowchart 82 Verify command N processing y Wait from previous frame reception until next command transmission tcom BA Command frame transmission processing Verify Status recei lt re MAX Sei Time out error C Abnormal termination ai Z Wait from previous frame reception until next data frame transmission TEDN Vv Data frame transmission processing User program Status frame received Y KR ee B i bnormal termination aa N SCH S C CA data frames transmitted ee Normalcompletion A gt A CN Application Note U18433EJ2VOAN CHAPTER 6 UART COMMUNICATION MOD

78K0R/Kx3 16-bit Single-Chip Microcontrollers Flash Memory

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