AT91EB55 Evaluation Board User Guide
Contents
1. 68701183 3ON QUN SnN TEMN 3INNJOUMN 0 001181 1008 190 27 90 d 18040 9 tar B 003 19 801 699A 3001 291 8671 zu Pa ne 13838 TSUN 9 0180 M 306 3ON GUN 0 MN 59 Dry 2971 0508 880 99 ddA ON 02011 31481 ON i ON SALISA ON 5 60609 8180 TY 8 29297 8027 SOM 91 101 ev 10 1 0101 HY 601 oly 801 6Y 201 ay 801 N soll m voll ev e 001 1 ov in EL AT91EB55 Evaluation Board User Guide 6 4 1709 28 05 Appendix B Schematics Figure 6 4 and EBI Expansion Connectors 010 9184 9180 9184 8184 70009 1 9 269 189 069 600 800 192 922 900 700 600 00 100 000 619 819 119 919 919 19 21 119 019 A699 82 19 99 5 79 9 09 19 A699 918110 184 and 10 90v sdy vay edy zay iav ody and 918100 98d and 100 ova and eov bey ozy and 86007 1184 9184 9180 ttad 8184 A 99 70009 1 9 074 1984 9284 080 7080 6080 0080 1080 0080 6184 952145 552145 7945 60002. 6 1 5 bir rm 6 1 Section 7 Appendix C Bill of Material 7 1 Section 8 Appendix D Flash Memory 8 1 AIMEL AT91EB55 Evaluation Board User Guide AMEL Section 1 Overview 1 1 Scope The AT91EB55 Evaluation Board enables real time code development and evaluation It supports the AT91M55800A This user guide focuses on the AT91 Evaluation Board as an evaluation and demonstra tion platform B Section 1 provides an overview B Section 2 describes how to setup the evaluation board W Section 3 describes the on board software B Section 4 contains a description of the circuit board Appendixes A and B cover configuration straps and schematics including pin connectors 1 2 Deliverables The evaluation board is supplied with a DB9 plug to DB9 socket straight through serial cable to connect the target evaluation board to a PC There is also a bare power lead with a 2 1 mm jack on one end for connection to a bench power supply The evaluation board is also delivered with a CD ROM that contains an evaluation ver sion of Software Development Toolkit and the documentation that outlines the AT91 microcontroller family The evaluation board is capable of supporting different kinds of debugging systems using an ICE interface or the on board Angel Debug Monitor Re
3. T ns E N 2 io 5 ol 0 gus 1 r R C588 850 o EHE jg S m Ei C Qn DIS 0 a u x B go BU g P4 2 1 Rev 1709C ATARM 28 Apr 05 Setting Up the AT91EB55 Evaluation Board 2 4 Jumper Settings 2 5 Powering Up the Board 2 6 Measuring Current Consumption on the AT91M55800A 2 7 Testing the AT91EB55 Evaluation Board 2 2 1709C ATARM 28 Apr 05 JP1 is used to boot on standard or user programs For standard operations set it in the STD position JP8 is used to select the core power supply of the AT91M55800A Operations at 2V not supported on the current silicon For more information about jumpers and other straps see Appendix A DC power is supplied to the board via the 2 1 mm socket J1 shown below in Figure 2 2 The polarity of the power supply is not critical The minimum voltage required is 7V Figure 2 2 2 1 mm Socket positive or negative 2 1 The board has a voltage regulator providing 3 3V The regulator allows the input volt age to be from 7V to 12V When you switch the power on the red LED marked POWER will light up If it does not switch off and check the power supply con
4. 300 3001 3401 989 50 280 59 2 3001 3001 3001 00 19 90 200 ador 980 189 09 719 TO 79007 A E 013H 3001 3001 3001 3001 34001 180 080 619 840 il F 969 tes 0610 N 89040 0900 toor N 34001 969 m ASUN og EMITA beg ONO 001 7 391 290 ae n m 08101181 x Mi wur E 142808 69 ano fo oer ano 15814 YN 158 9 WI 6001 t 2 090 5 71994 99 ks 08101111 x 3001 an 1 9180 M OL Wor A 99 34001 le i apn ENEIDA 86608 162 08101181 E ZN 390 1 14991 dl 13634 9180 79331 SMS A 99A 1 1OLZSNSLE9XYW 48808 is K 5 18019 00 QNO 4 A 9 seu 11 PT 031 13538 4 22 28 00370 veu 48 5 EAE 13538 88001 1250 5 T lt 3716879 00 2 uino Dm
5. BT1 M C588 T c58 3 6dr OSH s O 5 AR 9106 3 022 025 021 025 TP1 o 128K x8 512K x 8 017 016 N N 027 029 5 04 05 bd Ni lt x 0 LO 5 Edf 512K x 8 U30 D o 128K x 8 n QQ o CB14 CB13 in 299 012 UB 7 22 105 s3 8183683 H RR4 RR1 023 og 8 P5 91 55 Evaluation Board User Guide AMEL 6 2 1709 28 05 Appendix Schematics Figure 6 2 AT91EB55 Blocks Synopsis 183 51029
6. 180 mAH pile UL 1 1 BT1 3V Button Pile MH13654 N 3 position jumper jumper 5 2 Cele between 2 3 3 3 18 CB_NO C1 C2 C3 C4 C5 C12 C13 C16 C17 C18 C19 C22 C28 C29 C30 C31 C32 C36 C38 C39 C42 4 41 C49 C50 C51 C52 100 nF Ceramic X7R 10V C53 C54 C65 C66 C67 C68 C69 C70 C89 C90 C91 C94 C95 C96 5 4 C10 C11 C14 015 47 nF Ceramic X7R 10V C20 C21 C23 C24 6 6 C26 C27 22 pF Ceramic NPO 10V C25 C71 C72 C73 7 11 74 C75 C76 C77 10nF Ceramic X7R 16V C82 C83 C86 8 3 33 C37 C40 1 uF 16V Tantalum 16V 1096 TAJ 9 2 41 10 pF 16V Tantalum 16V 10 TAJ 10 3 C43 C47 C48 10 pF Ceramic NPO 10V 5 Adjustable Capacitor serial 11 1 C44 4 25 pF TZBX4 12 1 C45 68 pF 10 Ceramic X7R 10V 1096 18 1 C46 680 pF 10 Ceramic X7R 10V 10 14 2 C55 C59 22 pF 25V Ceramic X7R 25V 15 1 C57 10 uF 25V 25V ESR lt 0 509 0 5Arms 16 1 C58 100 pF 10V Tantalum 10V ESR lt 0 50 AT91EB55 Evaluation Board User Guide 7 1 Rev 1709 28 05 Appendix C Bill of Material 7 2 1709 28 05 Table 7 1 Bill of Material Continued Item Qty Part Designation 17 1 C60 3 3 1096 Ceramic X7R 25V 10 18 3 61 C62 C64 1 uF 1096 Ceramic X7R 10V 10 C78 C79 C80 C81 19 6 C84 C85 10 pF Ceramic X7R 16V D1 D2 D3
7. 09 4015481 3 6570 183 1270 801 gai 107901 quvoa 114100 1 4 107801 aol S3lHOW3N 171035 195 vas e olsodNn 11881801 6318011311 1VIH3S 183 701524 Prous JAVYS OLY 114405 5 22 1 158 017183 650 183 119 0 801 190 801 rolg E OISIAN e olsodNn 355 WHITIOHLNOODOYIIN 198 vas ISON 183 uo 5 183 6 3 AMEL AT91EB55 Evaluation Board User Guide 1709 28 05 40157271 101 401592011101 on on on on Kx 8 ON ON px ON ON ow p 1 on 0 S 02 01 iy Sh iv 1 8v 0v L 00 ov ov ly ov LL 11 ely ely 8 QL zy 8 QL Sv ely 0 3 SON TEMN ely 0 Ex 0 80 10 80 210 it sg 10 80 8689 ZE 490A E a a ZE 09 avo 40 ON ete doe 99A LL od 00 ______ iq LEE 110 0L 80 90 01 10 10 00 10 04 910 50 80 6 80 10 9 139 80 8 00 i 513 I
8. AMEL 7 3 1709 28 05 Appendix C Bill of Material 7 4 AIMEL AT91EB55 Evaluation Board User Guide 1709 28 05 AMEL Section 8 Appendix D Flash Memory The Figure 8 1 shows the embedded software mapping after the remap It describes the location for the different programs in the AT49BV162A flash memory and the division into sectors AT91EB55 Evaluation Board User Guide 8 1 Rev 1709C ATARM 28 Apr 05 Appendix D Flash Memory 8 2 1709C ATARM 28 Apr 05 Ox011FFFFF Not Used Led Swing Application example 0 01100000 Not Used 0x01011FFF Angel Debug Monitor 0x01006000 0x01005FFF Free Sector for Boot Upgrade 0x01004000 0x01000000 Flash Uploader Functional Test Software Boot Program AMEL Figure 8 1 EB55 Flash Memory Software Location 15 Sectors 1MB 64K byte sector User Mode 15 Sectors 64K Byte sector 1MB 1 Sector Standard Mode 64K Byte sector 5 Sectors 8K Byte sector 2 Sectors 8K Byte sector AT91EB55 Evaluation Board User Guide Revision History Doc Rev 1709A Date June 2001 Comments First Issue Change Request Ref 1709B 04 Aug 02 Pg 5 2 Default positiion of CB11 changed from closed to open 1709C 28 Apr 05 Global Most Flash references read as ATA9BV162V Figure 1 1 and global reference to 2 E2PROM and SPI removed or modified Global Reference
9. ISON 9294 OSIN 7000 00007 22 4 0001 71000 2338 0000 IHLN 100178 1398 Ld 00 9114 0001 79110 0398 77100 99012 844 SVOIL 24 83121 9Vd 78011 SVd Vd 93121 88011 24 VOIL 100 83121 OWd 28011 1284 21011 9884 83191 9284 18011 9284 0011 6284 14701 2884 08011 1284 OVOIL 0284 03191 6184 800 100 lt gt 6v 0 183 0000 793 O I 86097 86600 101084403 4016481 3 O I 0170 600 A699 and LSOIdSN 852145 aNd SNE 8184 2184 Had 0184 A699 68d 884 284 184 aNd 084 90ul 980 and 508 780 884 A699 Dld Vd and 2081 ei Vd 20817 Lid 019 10817 0194 008 64 A699 and 0 0 0 60 0 90 0 10 8609 TW ev uv V V W 7 Qno 1 718 N A699 109199 009 N 0 BT Uv 010 7000 03183 183 268 vid 198 008 010 008 60 80 BACOOA 10 90 908 54 90 908 oq 70 708 10 00 0 28 quo 208 SSON 9591 1508 008 gy 81 iy 91 818 BABOON easooa 91 918 3H Oly
10. 58 30 00 Chinachem Golden Plaza ASICIASSP Smart Cards Fax 33 4 76 58 34 80 77 Mody Road Tsimshatsui Zone Industrielle East Kowloon 13106 Rousset Cedex France Hong Kong Tel 33 4 42 53 60 00 Tel 852 2721 9778 Fax 33 4 42 53 60 01 Fax 852 2722 1369 1150 East Cheyenne Mtn Blvd Japan Colorado Springs CO 80906 USA 9F Tonetsu Shinkawa Bldg Tel 1 719 576 3300 1 24 8 Shinkawa Fax 1 719 540 1759 Chuo ku Tokyo 104 0033 Scottish Enterprise Technology Park Tel 81 3 3523 3551 Maxwell Building Fax 81 3 3523 7581 East Kilbride G75 OQR Scotland Tel 44 1355 803 000 Fax 44 1355 242 743 Literature Requests www atmel com literature Disclaimer The information in this document is provided in connection with Atmel products No license express or implied by estoppel or otherwise to any intellectual property right is granted by this document or in connection with the sale of Atmel products EXCEPT AS SET FORTH ATMELS TERMS AND CONDI TIONS OF SALE LOCATED ON ATMEL WEB SITE ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINE
11. D4 D5 Red LED H R 3mm T1 7mcd 20 10 D10 011 00 LED 60 21 1 D9 BAS32L Diode signal 22 1 D12 1N914 Diode signal Transil 12 8V 600W 23 1 D14 SMT6T15CA VBRmini 14 3V 24 1 D15 1N5817 Schottky diode 1A 0 45V 25 4 D16 D17 D18 D19 10 0060 Diode rectifying 0 62V 0 77A 26 1 F1 1000 mA Fuse rarm 1000 mA 30V 27 3 JP1 JP8 jumper 3P 3 point jumper 28 6 JP5 JP7 JP9 jumper NO 2 point jumper 29 1 J1 Jack Diameter 2 1mm Jack socket 2 1mm 30 1 L1 10 pH Self 10 at 1 and 500 kHz Sub D 9b Female socket right 31 1 P3 Sub D 9b F angle mechanical strength locking Sub D 9b Male socket right 32 1 P4 Sub D 9b M angle mechanical strength locking 33 1 P5 HE10 2x10 10 2x10 socket low profile right angle R3 R4 R5 R14 R15 R16 R17 R25 R26 R27 R31 R32 R33 34 27 R34 R35 R36 R37 100K Resistor 5 R38 R39 R40 R41 R51 R55 35 2 R56 R57 10K Resistor 5 R6 R7 R8 R9 R10 36 10 R11 R12 R13 R23 100R Resistor 5 R24 37 1 R18 270K Resistor 5 38 1 R20 287R 1 E48 Resistor 1 39 4 RR1 RR2 RR3 RR4 100K Resistance network 4 resistors with 1 common point 40 1 R29 OR Shunt OR R22 R42 R43 R44 41 16 45 R46 R48 R52 100K Resistor 5 R53 R54 AMEL AT91EB55 Evaluation Board User Guide Table 7 1 Bill of Material Continued Appendix C Bill of Material
12. TH gy av 18 ang ano 8H iy 9v gy 018 tV zy 8 871 88 encoon ESIN 2801 ISON OSIN 2808 QYON 0508 QHN 8047 18044 IMN OBMN ano 019 Vid 5 183 6 5 MEL AT91EB55 Evaluation Board User Guide 1709 28 05 Appendix B Schematics ZN W 06 0 915 112 1 36 dvoaezzexvin TXI 11650 oin 1 TXE ji 1 33030903 _ 2 aan 3 nozu alc 3001 1 5 or TORE 5774 ed diz 1000 10018 n TOXE 1 E 2 IY tr 9100 le ES 890 9 3 96 0 905 3000 3022 5 H9 020 4 un uo 49 8 veld 9 2 5 wo 1 535 02 8 8 008 m t 8 8 m 819 xr 0 11650 of 0818 10 2 E X 918 9 2101 H b 91 L A au duy sro 1 4 3
13. When the SW2 button is pressed B Reserved B When the SW4 button is pressed B The shutdown function from AT91M55800A is activated The power up can be achieved by pressing the S1 push button only Wake up function AT91EB55 Evaluation Board User Guide 3 1 Rev 1709C ATARM 28 Apr 05 On board Software When no buttons are pressed E Branch at address 0x01006000 B The Angel Debug Monitor starts from this address by recopying itself in external SRAM 3 3 Programmed The following table defines the mapping defined by the boot program Default Memory Mapping Table 3 1 Memory Map Part Name Start Address End Address Size Device U1 0x01000000 0x011FFFFF 2 Mbyte Flash AT49BV162A 02 03 0 02000000 0x0203FFFF 256 Kbyte SRAM The Boot Software Program and FTS and are in sectors 0 and 1 of the Flash device Sectors 3 to 7 support the Angel Debug Monitor Sector 24 at address 0x01100000 must be programmed with a boot sequence to be debugged This sector be mapped at address 0x01000000 or after a reset when the jumper JP1 is in the USER position 3 4 The Angel Debug Angel Debug Monitor is located in the flash from 0x01006000 up to 0x0100FFFF Monitor The boot program starts it if no button is pressed When Angel starts it recopies itself in SRAM in order to run faster The SRAM used by Angel is from 0x02020000 to 0x0203FFFF i e the highest half part of the SRAM The Angel on the A
14. Y 1 84501454 x i ISOW 882145 97 150 NI8 ezn 8600 18611191 411 01 126808 14 S ESO mE SSOIdSN 9 ENEOON vsoldsn 3148 2 86801481 2152 t 2521468 AE 66004 1821468 2140 115041 6 ON 052145 Sr 120 NI8 06904 084 ON ON un ON 400 4 ord 34001 RAEN 82 250458 3000 69 890 965 yos A 95N 18128 os 3048 ig Lat OSIN ON ISON A 09 9 ON He ON yoo 86H 13538 pope 14 ASHN 86600 sen A 99 9 o z z 01 128808 1 25060151 2150971 25 N 089 108 tg 9 9 B HIYAS 6k ON ON ON Yet ON ON 1 2 ON ON ON ON ON oo ON ON ON z 4900 80 gi 0901451 oN aN 9138 ON ON ON 398 L ON ON abs os 3048 8 8 ON OSIN m 91 ISON ON ov 2 001 N 3001 u ieu 800 13838 7204 ASNTATH ASUN Xs 4771083 8609 818291 A699A A 99A A 09N 7015248 91 55 Evaluation Board User Guide MEL 6 10 1709 28 05 AMEL Section 7 Appendix Bill of Material Table 7 1 Bill of Material Item Qty Reference Part Designation Li MnO2
15. dni 411188 6 i 03118815 D TSUN 91 5 8 890 ft ai 3001 7 i o 908 GSE mot K W 910 4001 1 86609 1 in 5 2 AIMEL AT91EB55 Evaluation Board User Guide 6 8 1709 28 05 Appendix Schematics Figure 6 8 Power Supply 140 9 VON 3AVS 219 T Ho pue alld vong Ae _ 066 608 70095068 PBAL NGPPA pey 088 ON 18040 ngadat 20 10 1 MINSA n 19109 1004 1581 p 180102 1104 1581 qppA Edl tdl 289060641 19 09 1104 159 1180102 1400 1581 zdl 19 3001 1 000 SSINGHS 0 38 90 0b d 219 10 5 01 4 92 30 10 2 38 034040 21 00000 ozn 8109ppA z d 122 380900 m 01006 PIS 16 mo o lt aus A 2 ON 78000 ON NHS Ld o 2 5401 3868 188 3482 vada 099 690 898 t Vu 2710 yer AOL gt 1 090 0890 NOOLONOL VOS LIS1NS 02 77000 sia lt o NGHS 61d Iu 58 ay 1 OIPPA t 113985 IMAS jx NOOL
16. layout diagram schematic shows an approximate floorplan for the board This has been designed to give the lowest board area while still providing access to all test points jumpers and switches on the board See Figure 6 1 in Appendix B Schematics The board is provided with four mounting holes one at each corner into which feet are attached The board has two signal layers and two power planes AIMEL AT91EB55 Evaluation Board User Guide AMEL Section 5 Appendix A Configuration Straps 5 1 Configuration By adding the I O and EBI expansion connectors users can connect their own peripher Straps 1 15 als to the evaluation board These peripherals may require more I O lines than available JP1 9 while the board is in its default state Extra lines be made available by disabling some of the on board peripherals or features This is done using the configuration straps detailed below Some of these straps present a default wire notified by the default men tion that must be cut before soldering the strap CB1 On board 54 Signal Closed NCS4 signal is connected to the expansion connector P1 B21 Open NCSA signal is not connected to the EBI expansion connector P1 B21 This authorizes users to connect the EBI expansion connector of this board to the MPI expansion connector of an AT91EB63 evaluation board without conflict problems ADCO Trigger
17. n n _tindino 03379 H T 00 ov 9 011 vaan 2180 10 10 ig Sa 39 989 ev n 0 NOON gt 101 89261438 ty zl say Wy 960 1100 10459 F SQ 60 qM 191731 geo 980 Lay 43318 901 5 au Ei Wwe T ear Eson 5 90 2438 12 sie duoi 33000 12i TM 5 vin 160 000 OSON 080 ya 5 NISL9W1 100 621 as 5 18 gg von ovo 5 2 lav EL 182 380200 ce 3 vanaf ep 17 88855 Zs 82508 u 99 8 5 8 5 s 5 22 5 85 9 31001 I A 5855 9 8 388828 RS m en 2224 55 95 s3 5 L WOL 200 184 WO wa z omo 984 SERRE 280 00 E 38402004 13809446 19 1 gt 1004 3 3A00MN 38s asovi o 138841 E _ 2 ero 183 nuo 8 5 15144 Wu 10 xo 98 gt 8184 Sma 9 405171 ae Te 0180 m 5 1709 28 05 Appendix B Schematics
18. 4001 A 09A H Is 10 T T A9 001 001 in 3001 yoo 170919 089 A 99 8001 218 40 2 n 8001 90 1 EAEIOA 86600 BACON 4 90 6 4 4 2100 e T B 1 WO 0080 9 5 D Wu A Na z 80001 68 YY 0 i 48011101 80 c uoo Ww 60 9 0180 WW wa 00 IMS 699A aor s NC 4 1 884 yoo 2 00 te tru 3001 J 037 48191 T T l 1eduin eso 801 A609N ON 3001 3001 eu 5 e 1 T 81600 86609 5 A 4 5 2 3 AT91EB55 Evaluation Board User Guide AIMEL 6 6 1709 28 05 Appendix B Schematics Figure 6 6 AT91M55800A lt 0184 162701 801 4
19. AIMEL AT91EB55 Evaluation Board User Guide 1709 28 05 AMEL Section 3 The On board Software 3 1 AT91EB55 The AT91EB55 Evaluation Board contains an AT49BV162A Flash device programmed Evaluation Board with default software Only the lowest eight 8 Kbyte sectors are used The remaining sectors are user definable and can be programmed using one of the Flash downloader solutions offered in the AT91 library When delivered the Flash device contains The Boot Software Program The Functional Test Software E The Angel Debug Monitor B A Default User Boot with a Default Application The boot and FTS and are in sectors 0 and 1 of the Flash These sectors are not locked for an easy on board upgrade The user must avoid overwriting this sector 3 2 The Boot The Boot Software Program configures the AT91M55800A and thus controls the mem Software ory and other board devices Program The Boot Software Program is started at reset if JP1 is in the STD position If JP1 is in the USER position the AT91M55800A boots from address 0x01010000 in the Flash which must have a user defined boot The Boot Software Program first initializes the master clock frequency at 32 MHz the EBI then executes the REMAP and checks the state of the buttons as described below As long as the SW1 button is pressed B All the LEDs light together The D1 LED remains lit until SW1 is released The Functional Test Software FTS is started
20. AT91EB55 Evaluation Board User Guide AMEL Table of Contents AMEL Section 1 E 1 1 SCODE mennaan PM LE 1 1 1 2 Deliverables 1 1 1 3 AT91EB55 Evaluation Board 1 1 Section 2 Setting Up the AT91EB55 Evaluation BONG 2 1 2 1 Electrostatic Warning eene 2 1 2 2 hedqulremments ed inei d n uu rera E e t d ee 2 1 238 Rem ta e EE Ead 2 1 2 4 Jumper Settings 2 2 25 Powering Up the 2 2 2 6 Measuring Current Consumption on the AT91M55800A 2 2 27 Testing the AT91EB55 Evaluation 2 2 Section 3 The On board Software 3 1 3 1 91 55 Evaluation 3 1 3 2 Boot Software 3 1 3 3 Programmed Default Memory Mapping 3 2 3 4 Angel Debug emn 3 2 Section 4 Circuit DE SCH DUO ener
21. DB9 Serial Connectors RS232 Battery Transceivers Power Supply AT91EB55 Evaluation Board User Guide AIMEL 1 3 1709 28 05 Overview 1 4 AIMEL AT91EB55 Evaluation Board User Guide 1709C ATARM 28 Apr 05 AMEL Section 2 Setting Up the AT91EB55 Evaluation Board The AT91EB55 Evaluation Board is shipped in protective anti static packaging The board must not be subjected to high electrostatic potentials A grounding strap or similar protective device should be worn when handling the board Avoid touching the compo nent pins or any other metallic element The AT91EB55 Evaluation Board itself Requirements in order to set up the AT91EB55 Evaluation Board are B DC power supply capable of supplying 7V to 12V 1 A not supplied 2 1 Electrostatic Warning 2 2 Requirements 2 3 Layout Figure 2 1 shows the layout of the AT91EB55 Evaluation Board Figure 2 1 Layout of the AT91EB55 Evaluation Board AT91EB55 Evaluation Board User Guide o 128Kx8 512K x8 02 us P1 o 128K x8 512K x 8 03 LJ 8 RR4 RAB ARI Sw2 20 20 20 Et nm m n E 0 u4 z0 Dogg onien 91 55800 33 eU D 0165 a Ones 50 2 u27 U26 5 13000
22. E 380200 09001 oldan 1907801 3 00 1 oraaa 152 lt lt pe oH Guo 55 SESSESESSSES SLIL SESE 5555 o9 88 852212512663 58 5558555 BRES 8882 FESS oa 98 5 06 S mone 25 1QXH 76100 2508 0000 3 1000 ZOXY 10000 01101 Hoaf 380200 t 3009 3009 6244 Ido lads ids lads OSIN OSIN 77000 ISON ISON 75808 SSN 08904 9244 5 ug 3001 16004 1244 94 ib 90 880 25904 82 4 sa by 669 88004 62d va H E i N 0 0 2 4 2 T 10 m 8 6 ano HE 100 ew neviauoN E i 114001 tsp 119001 ay 9 ki 5 2 V sor inox ozy nagar 980 L9 Taano lt 4 6770049 E Sup eem i 189 98114 0100 96201004 ee 003 0 22 08770 801 100 z jm 008 aly 08019 lt gt 3 n zu M HT X001 o 8 gii 1800 91 ely ine ZHY89L ZE 20 yoz 01 M 318VN3 ON eh 11 ng1suN VOOSSSNILELV ev anu 8188 zit a U cin HY 9 oso 29 590 201 ow 1 VANS 9 ano 91 411 12 4000 89261438 3001 818 T xyi
23. Input Command Closed ADCO trigger input ADOTRIG is controlled by the PA4 PIO line Open ADCO trigger input ADOTRIG is not connected to the PA4 PIO line This authorizes users to connect the corresponding lines to their own resources via the I O expansion connector CB3 ADC1 Trigger Input Command Closed ADC 1 trigger input AD1TRIG is controlled by the PIO line Open ADC1 trigger input AD1TRIG is not connected to the PA7 PIO line This authorizes users to connect the corresponding lines to their own resources via the I O expansion connector AT91EB55 Evaluation Board User Guide 5 1 Rev 1709 28 05 Appendix A Configuration Straps 5 2 1709C ATARM 28 Apr 05 CB4 Temperature Sensor Enabling Closed The temperature sensor device is connected to the ADC channel 1 AD1 input Open The temperature sensor device is not connected to the ADC channel 1 AD1 input This authorizes users to connect the corresponding ADC channel to their own resources via the I O expansion connector CB5 Analog Converter Peripherals Loopback Closed DAC Channel 0 is connected to ADC Channel 4 for test purposes Open DAC Channel 0 is not connected to ADC Channel 4 This authorizes users to connect the corresponding Analog Channels to their own resources via the I O expansion connector CB6 Analog Converters Peripherals Loop
24. Item Qty Reference Part Designation SW1 SW2 SW3 Push button with black SW4 43 1 SW5 TP 33 Push button with red cabochon 44 2 51 52 Push Button CMS Push button 45 4 1 TP2 TP4 Test Point Corner CMS Test point 46 1 U1 49 162 70 Flash 2M bytes x 16 bits 470 1 U4 U5 IDTzivisdsAiopH 21816 memon Taak x ets double implantation 48 1 U6 74LVCO4AD Reverser LVC serial 49 1 U8 74LV244D Buffer 50 1 U9 74LV125D Tri state buffer 51 1 U10 MAX3223ECAP Driver RS232 ESD E 52 1 U12 AT91M55800A Microcontroller 53 1 U13 LM61BIM3 Temperature sensor 54 2 U14 U15 REF192GS Reference of voltage 2V5 0 5 55 1 U16 74LVC74AD D flip flop LVC serial 56 1 U30 74LCX74 D Flip Flop LCX serial 57 2 U17 U18 2 7 Timeout 1 ms 58 1 U19 LT 1507CS8 3 3 Voltage Regulator DC DC 59 1 U20 LTC 1503CS8 2 Voltage Regulator DC DC 4 21 AT45DB321 TC AATE a according to availability 61 1 023 EEPROM 64K bytes 62 2 U27 U29 74LV138D Decoder 3 to 8 63 1 U28 AT25256W 10SC 2 7 EEPROM 32K bytes 64 1 2 Crystal 32768 kHz 2 32768 20 ppmat 65 1 4 Crystal 16 MHz 2 16 MHZ 30ppm at 66 4 PS1 PS2 PS3 PS4 Board Support Plastic bases H gt 10mm Note 1 The EB55 is equipped with SRAM U2 U3 or U4 U5 the difference lies in case type AT91EB55 Evaluation Board User Guide only The choice is made according to availability
25. OWOL NOOLONOL 188 4482 NOLHS 4g 910 W000 z 0 990 n 4 mag 4 0 EE 1d n 990 6650 0511 ein 4 6 9 AMEL AT91EB55 Evaluation Board User Guide 1709 28 05 Not Mounted 172 2501 9 2521 20001 PER 3045 029 01 OSIN i Qon 9 ISON BABOOA a 199 SO 79109 gen 3001 3001 5 28H 01 128808914 8 ON oN ON ON BON ON EARN ON Hen ON KARN ON 3001 6 S2 fer 5501458 889 ON os HELL 245 SON rn OSIN ISON 3001 668 dit 13538 Asng au 2 4SHN LASITA gen BADIA 01 128808914 ON ON ON ON 80 ON 6 5 STON ON ON Jon ON gt 30001 80 1591458 898 3909 CORE arn OSIM 3 E oN 8 ISON S 3001 5 13538 SUN oon ASNETAGE H 1 0 86609 ceu zn m 84699 1 8 18611191 58 x5 xy ys 4085 14789 801 20
26. SON 515 AV o ISON 91 91 LW L W aly ev oly ev SV zy 9 V Sly 6 oiv zy 9 V giv 0f 9 a Dy M ye ag y i Nap Mee oM 8v zm 8v 8 oN on x on on ON ex 2 2 3215 3 3215 an 114009 40581 40 1 34001 34001 34001 34001 89 29 19 L L 81600 86007 86690 8690 a aw set aw hoy gy Hew V ey sw S v V ny OW z 9 y gw 10 91 1 Qv oW 0 zz 91 9 z ov gy gy SL 9 ___ E gy gy 3 _ av am 2130 ZW an 801718 aM ed 10 ed S 10 S 810 sz 20 010 50 sz 1 um 20 8680 8 9006 QNS 99A 8 amp 100 10 L6 22 80 6 110 62 E 60 90 62 8 10 04 30 00 910 01 9 LZ 80 10 08 50 821 00 3ON GEN 30 13 1801 30400 elay 34 9 TSON rv e 8 rv e 5 ev tv SLY nt v gv sw nt v v oy ve JV 3 IW SE Qu w 38 av ee LN CU n av en 3215 Appendix Schematics 6 3 14009 POS 40
27. SS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice Atmel does not make any commitment to update the information contained herein Atmel s products are not intended authorized or warranted for use as components in applications intended to support or sustain life Atmel Corporation 2005 All rights reserved Atmel logo and combinations thereof Everywhere You Are and others are registered trademarks of Atmel Corporation or its subsidiaries the ARM Powered logo and others are the registered trademarks of ARM Limited Printed on recycled paper Other terms and product names may be the trademarks of others 1709C ATARM 28 Apr 05
28. T91EB55 can be upgraded regardless of the version programmed on it Note 1 the debugger is started through ICE while the Angel monitor is on the Advanced Interrupt Controller AIC and the USART channel are enabled 3 2 91 55 Evaluation Board User Guide 1709C ATARM 28 Apr 05 AMEL 4 1 AT91M55800A Processor 4 2 Expansion Connectors and JTAG Interface 4 2 1 Expansion Connector 4 2 2 EBI Expansion Connector Section 4 Circuit Description Figure 6 1 in Appendix B Schematics shows the AT91M55800A The footprint is for a 176 pin TQFP package Strap CB15 enables the user to choose between the standard ICE debug mode and the JTAG boundary scan mode of operation The operating mode is defined by the state of the JTAGSEL input detected at reset Jumper JP5 can be removed by the user to allow measurement of the current demand by the whole microcontroller and Vppcore Jumper can be removed to mea sure the core microcontroller consumption Vppcore See Figure 6 8 in Appendix B Schematics Jumper JP9 can be removed by the user to allow measurement of the current demand by the APMC and RTC microcontroller modules See Figure 6 8 in Appendix B Schematics The two expansion connectors expansion connector and EBI expansion connector and the JTAG Interface are described below The and EBI expansion connectors pin outs and positions are comp
29. and DAC Peripheral Connections 4 5 Power and Crystal Quartz 4 2 1709C ATARM 28 Apr 05 An ARM standard 20 pin box header P5 is provided to enable connection of an ICE to the JTAG inputs on the AT91 This allows code to be developed on the board without using system resources such as memory and serial ports The schematics in Figure 6 3 and Figure 6 9 in Appendix B Schematics show one AT49BV162A 2 Mbyte 16 bit Flash one AT24C512 64 Kbyte EEPROM one AT25256 32 Kbyte EEPROM two 128K 512K x 8 SRAM devices and four AT45DB321 4 Mbyte serial data Flash devices The SPI devices are accessible through a 4 to 16 line decoder and by using the Chip Select Decode feature of the AT91 SPI peripheral PCSDEC bit of the SPI Mode Register Note 91 55 is fitted with two 128K x 8 SRAM devices and one AT45DB321 serial DataFlash device U21 AT24C512 The AT24C512 64 Kbyte EEPROM and AT25256 32 Kbyte EEPROM are not fitted Strap JP1 shown on the schematic is used to select which part of 1 Mbyte of the flash is to be accessed This is to enable users to flash download their application in the second part of the flash and to boot on it Two of the ADC and DAC channels are loop backed together DAO AD4 DA1 on ADO Two 2 5V voltage reference devices are fitted on the board and connected to the DAVREF and ADVREF inputs See Figure 6 6 in Appendix B Schematics The user can fit other voltage reference value devic
30. atible with the other evaluation boards except for the expansion connector pin out and position of the 40 so that users can connect their prototype daughter boards to any of these evaluation boards For the expansion connector rows A and B are position and pinout compatible The expansion connector makes the general purpose GPIO lines and Ground available to the user Configuration straps CB2 CB3 4 CB5 CB6 13 CB14 and CB17 are used to select between the I O lines being used by the evaluation board or by the user via the expansion connector The connector is not fitted at the factory however the user can fit any 32 x 3 connector on a 0 1 2 54 mm pitch The schematic illustrated in Figure 6 4 in Appendix B Schematics also shows the Bus expansion connector which like the expansion connector is not fitted at the factory The user can fit any 32 x 2 connector on a 0 1 2 54 mm pitch to gain access to the data address chip select read write oscillator output and wait request pins VCC3V3 and Ground are also available on this connector Configuration strap CB1 when open allows the user to connect the EBI expansion connector to the expansion connector of an AT91EB63 evaluation board without fearing any conflict problem AT91EB55 Evaluation Board User Guide 4 1 Rev 1709C ATARM 28 Apr 05 Circuit Description 4 2 3 JTAG Interface 4 3 Memories 4 4 ADC
31. back Closed DAC Channel 1 is connected to ADC Channel 0 for test purposes Open DAC Channel 1 is not connected to ADC Channel 0 This authorizes users to connect the corresponding Analog Channels to their own resources via the I O expansion connector CB9 On board Boot Chip Select Closed NCSO select signal is connected to the Flash memory Open NCSO select signal is not connected to the Flash memory This authorizes users to connect the corresponding select signal to their own resources via the EBI expansion connector CB10 Flash Reset Closed The on board reset signal is connected to the Flash RESET input Open The on board reset signal is not connected to the Flash RESET input CB11 Boot Mode Strap Configuration Open The BMS MCU input pin is set for the microcontroller to boot on an external 16 bit memory at reset Closed The BMS MCU input pin is set for the microcontroller to boot on an external 8 bit memory at reset AT91EB55 Evaluation Board User Guide AMEL Appendix Configuration Straps CB13 CB14 EEPROM Enabling Closed E PROM communication is enabled Open E PROM communication is disabled This authorizes users to connect the corresponding PIO to their own resources via the expansion connector CB15 JTAGSEL 1 20 The MCU standard ICE debug feature is enabled 2 3 IEEE 1149 1 JTAG bounda
32. ery backup consumption The JP6 strap allows the user to connect the electrical and mechanical ground The AT91EB55 evaluation board is supplied with two 128K bytes x 8 SRAM memories If however the user needs more than 256K bytes of memory the devices can be replaced with two 512K x 8 3 3V 10 15 ns 5 giving in total 1024K bytes The AT91EB55 evaluation board is supplied with one 4 MB Serial Data Flash If the user needs more storage memory 3 additional footprints are provided to fit AT45DB321 devices giving a total of 16M bytes AIMEL AT91EB55 Evaluation Board User Guide AMEL Section 6 Appendix B Schematics 6 1 Schematics The following schematics are appended E Figure 6 1 PCB Layout E Figure 6 2 AT91EB55 Blocks Synopsis E Figure 6 3 EBI Memories E Figure 6 4 and EBI Expansion Connectors E Figure 6 5 Push Buttons LEDs and Serial Interface W Figure 6 6 AT91M55800A Figure 6 7 Reset and JTAG Interface B Figure 6 8 Power Supply Figure 6 9 SPI and Memories The pin connectors are indicated on the schematics Expansion External Bus Interface Figure 6 4 P2 I O Expansion Connector Figure 6 4 Serial A Serial Interface Figure 6 5 P4 Serial Serial Interface Figure 6 5 P5 JTAG Interface Figure 6 7 AT91EB55 Evaluation Board User Guide 6 1 Rev 1709C ATARM 28 Apr 05 Appendix B Schematics Figure 6 1 PCB Layout
33. es from this family REF19x from Analog Devices as the footprints are compatible A temperature sensor LM61 Figure 6 6 in Appendix B Schematics is connected to the AD1 input and is placed near the 32 768 kHz crystal quartz It enables the user to take into account the frequency drift due to temperature evolutions using a software program The With a resistor bridge 10 provides the following value VDDCORE This voltage be measured by AD2 input and allows the user to select the running clock accordingly The board features two quartz crystals a 32 768 kHz one connected to the RTC low power oscillator of the AT91M55800A and 16 MHz one connected to the main oscillator The AT91M55800A Master Clock can be derived from the 32 768 kHz crystal quartz or the 16 MHz crystal quartz depending on the programming of the APMC registers The on chip oscillators together with one PLL based frequency multiplier and the prescaler results in a programmable Master Clock between 500 Hz and 33 MHz AIMEL AT91EB55 Evaluation Board User Guide 4 6 Push Buttons LEDs Reset and Serial Interface Circuit Description Components for the PLL filter are fitted by default on the board Figure 6 6 in Appendix B Schematics They are calculated to provide a 32 MHz multiplier factor of 2 and settling time of 160 us Master Clock frequency The Voltage Regulator provides 3 3V to the board and will light t
34. fer to the EB55 Getting Started tutorial documents for recommendations on using the evaluation board in a full debugging environment 1 3 The AT91EB55 The board consists of AT91M55800A together with several peripherals Evaluation Board two serial ports B Reset push button B An indicator which memorizes a reset appearance B Memory clear for the reset indicator B Four user defined push buttons AT91EB55 Evaluation Board User Guide 1 1 Rev 1709C ATARM 28 Apr 05 Overview 1 2 1709C ATARM 28 Apr 05 B Fight LEDs E 256K byte of 16 bit SRAM upgradable to 1 MB 2M bytes of 16 bit Flash of which 1 MB is available for user software 4M bytes of Serial Data Flash upgradeable to 16 W 2x32 pin EBI expansion connector 3 x 32 pin I O expansion connector 20 pin JTAG interface connector If required user defined peripherals can also be added to the board See Appendix for details AIMEL AT91EB55 Evaluation Board User Guide Overview Figure 1 1 AT91EB55 Block Diagram AT91M55800 8K byte Reset BAM Controller ARM7TDMI Processor EBI Expansion Connector JTAG ICE Connector 16 MHz Clock XTAL Generator Push Interrupt Buttons Controller Watchdog Timer Reset Serial Controller Data Flash yo Expansion Connector Sensor 2 Vppio and Supply 32 768 kHz XTAL
35. he red POWER LED D11 when operating This Voltage Regulator can be turned off by using the APMC shutdown feature when the JP7 jumper is closed See Figure 6 8 in Appendix B Schematics A wake up push button S1 is provided to exit this mode Alternatively the user can program a RTC alarm to awake the voltage regulator Power can be applied via the 2 1 mm connector to the regulator in either polarity because of the diode rectifying circuit Another regulator allows the user to power the 91 55800 core with 3 3V or 2V by the mean of the JP8 jumper A 3V battery is provided on board Figure 6 8 in Appendix B Schematics to power the RTC and APMC It has been provided to ensure the power supply for approximately 1 year The IRQO TIOAO PB17 and PB19 switches are debounced and buffered A supervisory circuit has been included in the design to detect and consequently reset the board when the 3 3V supply voltage drops below a typical 3 0V threshold Note that the threshold can change depending on the board production series The supervisory circuit also provides a debounced reset signal This device can also generate the reset signal case of watchdog timeout as the pin NWDOVF of the AT91M55800A is nected on its input MR The assertion of this reset signal will light the red RESET LED D10 and if the CLEAR RESET push button is pressed the LED D10 will unlight Another supervisory circuit separately
36. initializes the microcontroller embedded JTAG ICE interface when the 3 3V supply voltage drops below a typical 3 0V threshold Note that this voltage can change depending on the board production series The sepa rated reset lines allow the user to reset the board without resetting the JTAG ICE interface while debugging bill An RC device has been fitted on board to ensure a correct power on reset for the bat tery power supply modules first power up or when has been disconnected This RC network has been calculated to generate a valid 300 ms mini mum pulse width NRSTBU signal The schematic Figure 6 5 in Appendix B Schematics also shows eight general pur pose LEDs connected to Port B PIO pins PB8 to PB15 Two 9 way D type connectors P3 4 are provided for serial port connection Serial Port A P3 is used primarily for host PC communication and is a DB9 female con nector TXD and RXD are swapped so that a straight through cable can be used CTS and RTS are connected together as are DCD DSR and DTR Serial Port B P4 is a DB9 male connector with TXD and RXD obeying the standard RS 232 pin out Apart from TXD RXD and Ground the other pins are not connected A MAX3223 device U10 and associated bulk storage capacitors provide RS 232 level conversion AT91EB55 Evaluation Board User Guide AIMEL 4 3 1709 28 05 Circuit Description 4 7 Layout Drawing 4 4 1709C ATARM 28 Apr 05 The
37. nections The battery BT1 provides a 3V power supply to the Advanced Power Management Con troller and the Real Time Clock In order to power up this module the user must first close the JP9 jumper The board is designed to generate the power for the AT91 product only through the jumpers JP5 and JP9 This feature enables measure ments to be made on the current consumption of the AT91 product See Appendix A for further details In order to test the AT91EB55 Evaluation board the following procedure should be performed 1 Hold down the SW1 button and power up the board or generate a reset and wait for the light sequence on each LED to complete All the LEDs light once and the D1 LED remains lit 2 Release the SW1 button The LEDs D1 to D7 light up in sequential order If an error is detected all the LEDs will light up twice The LEDs represent the following devices D1 for the internal SRAM D2 for the external SRAM AIMEL AT91EB55 Evaluation Board User Guide Setting Up the AT91EB55 Evaluation Board D3 for the external Flash B 04 reserved D5 for the SPI data flash B D6 reserved D7 for the USART B D8 for the ADC and DAC If a test is not carried out the corresponding LED remains unlit and the test sequence restarts AT91EB55 Evaluation Board User Guide AIMEL 2 3 1709 28 05 Setting Up the AT91EB55 Evaluation Board 2 4
38. oHG su dew 4 1 4 1 91 55800 4 1 42 Expansion Connectors and JTAG 4 1 4 2 1 Expansion Connector sse 4 1 4 2 2 Expansion Connector 4 1 4 2 8 JTAG Interface 4 2 4 3 4 2 4 4 ADC and DAC Peripheral 4 2 45 Power and Crystal 2 20 2 1 nennen nennen 4 2 4 6 Push Buttons LEDs Reset and Serial Interface 4 3 4 7 4 4 Section 5 Appendix A Configuration 5 1 51 Configuration Straps CB1 15 JP1 9 5 1 91 55 Evaluation Board User Guide i 1709C ATARM 28 Apr 05 Table of Contents 1709C ATARM 28 Apr 05 5 2 Power Consumption Measurement Straps 5 JP9 5 4 5 3 Ground Links JP6 5 4 5 4 Increasing Memory Size 5 4 Section 6 Appendix B
39. ry scan feature is enabled CB16 R eturn TCK ICE Signal Synchronization 1 2 The TCK signal from the JTAG interface can be synchronized with MCKO signal and returns to the JTAG interface RTCK 2 30 The TCK and RTCK ICE signals are not synchronized with MCKO CB17 Voltage Measurement Closed The power supply is connected to the ADC Channel 2 AD2 input through a resistor bridge divisor ratio 1 2 Open The power supply is not connected to the ADC Channel 2 AD2 input This authorizes users to connect the corresponding ADC Channel to their own resources via the I O expansion connector CB18 Flash Configuration Open Should be open when an AT49BV162A is fitted on the board Closed Should not be closed when an AT49BV162A is fitted on the board JP1 User or Standard Boot Selection 2 3 The first half of the Flash memory is accessible at its base address 1 2 The second half of the Flash memory is accessible at its base address This authorizes users to download their own application software in this part and to boot on it JP2 Push Button Enabling Open SWh1 4 inputs to the AT91 are valid Closed SW1 4 inputs to the AT91 are not valid This authorizes users to connect the corresponding PIO to their own resources via the expansion connector AT91EB55 Evaluation Board User Guide 5 3 AMEL 1709 28 05 Appendix A Configuration Straps 5 2 Power Con
40. sumption Measurement Straps JP5 JP9 5 3 Ground Links JP6 5 4 Increasing Memory Size 5 4 1709C ATARM 28 Apr 05 JP3 RS 232 Driver Enabled Open The RS 232 transceivers are enabled Closed The RS 232 transceivers are disabled This authorizes users to connect the corresponding PIO to their own resources via the expansion connector JP7 Power Shut down Feature Open The power supply shut down feature is disabled Closed The power supply shut down feature is enabled The user may shut down the board main power supply by using the APMC shut down feature The system may be awakened by pushing the S1 Wake Up push button or by programming an alarm in the RTC module JP8 Core Power Supply Selection 2 3 The MCU core is powered by a 3 3V power supply 1 2 Not supported on the current microcontroller revision Note 1 Hardwired default position To cancel this default configuration cut or place the wire a jumper on the board The JP5 strap enables the user to connect an ammeter to measure the AT91M55800A global consumption and Vppio when Vppcore power supply is derived from Vppio JP8 in position The user can measure the core consumption by connecting another ammeter between JP8 1 2 or 2 3 depending on the power supply used to power the core The JP9 strap enables the user to connect an ammeter to measure the AT91M55800A APMC RTC modules batt
41. to SRAM downloader removed Section 3 2 SW2 button usage changed to reserved Section 3 4 0x1004000 changed to 0x1006000 Section 4 3 changes to information and note Figure 6 3 AT49BV162A associated to 01 Table 6 9 name changed U23 and U28 shown as Not Mounted Table 7 1 item 46 parts column shows AT49BV162A 70TI Figure 8 1 illustration replaced CSR 05 199 AT91EB55 Evaluation Board User Guide AIMEL 1709 28 05 EE Atmel Corporation Atmel Operations 2325 Orchard Parkway Memory RF Automotive San Jose CA 95131 USA 2325 Orchard Parkway Theresienstrasse 2 Tel 1 408 441 0311 San Jose CA 95131 USA Postfach 3535 Fax 1 408 487 2600 Tel 1 408 441 0311 74025 Heilbronn Germany Fax 1 408 436 4314 Tel 49 71 31 67 0 49 71 31 67 2340 Regional Headquarters Microcontrollers Europe 2325 Orchard Parkway 1150 East Cheyenne Mtn Blvd Atmel Sarl San Jose CA 95131 USA Colorado Springs CO 80906 USA Route des Arsenaux 41 Tel 1 408 441 0311 Tel 1 719 576 3300 Case Postale 80 Fax 1 408 436 4314 Fax 1 719 540 1759 CH 1705 Fribour Switzerland La Chantrerie Biometrics Imaging Hi Rel MPU Tel 41 26 426 5555 BP 70602 High Speed Converters RF Datacom Fax 41 26 426 5500 44306 Nantes Cedex 3 France Avenue de Rochepleine Tel 33 2 40 18 18 18 BP 123 Asia Fax 33 2 40 18 19 60 38521 Saint Egreve Cedex France Room 1219 Tel 33 4 76
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