melscqna
Contents
1. 11 11 12 12 13 13 14 14 i Driver Design Specification 1 Target Device s and Protocol 1 1 Introduction This section defines the types of I O Devices that are targeted by this driver 1 2 Device Manufacturer Mitsubishi Electric 1 3 Device Definition Melsec QnA Ethernet interface module type AJ71QE71 This interface module provides communication with Melsec QnA PLCs via Ethernet The Melsec QnA driver can connect with up to 8 TCP IP channels per AJ71QE71 interface module One channel port is used for communication with a primary Melsec QnA PLC the other ports can then be used for setting up additional Ethernet communication links to remote I O modules Besides that the primary Melsec QnA PLC is also able to communicate with other PLC CPUs via a MELSECNET network MELSECNET 10 MELSECNET II or MELSECNET B connected to the primary PLC The limit of 8 channels per Ethernet AJ71QE71 interface module is a is set by the amount of fixed buffers on this module The driver itself has an upper limit of 32 communication channels this is a driver setting which can be changed if the need arises The Melsec QnA driver also communicates with AJ71QE71 B5 A1SJ71QE71 B2 and A1SJ71QE71 B5 Ethernet interface modules 1 4 Communications Method 10BASE5 or 10BASE2 Ethernet cable 1 5 Communications Hardware Configuration 1 5 1 Wiring Diagrams The following functional layout diagrams illustrates the connection between Citect and the2. Melsec QnA Ethernet interface module type AJ71QE71 In these configurations the primary QnA Series PLC itself is connected to a MELSECTNET 10 network The nodes which are marked as remote can be occupied by a Citect Workstation Figure 3 5 1 1 Connection Diagram Using 10BASE5 Ethernet I1OBASES Coaxial Cable a MELSECNET 10 MELSCQNA DOC 26 09 00 4 i ver Design Specification Figure 3 5 1 2 Connection Diagram Using 10BASE2 Cheapernet Terminator T shape Adapter MELSECNET 19 1 5 2 1 0 Device Settings Concerning data exchange the driver will support both Binary Mode SW2 on front panel of AJ71QE71 OFF and ASCII Mode SW2 on front panel of AJ71QE71 ON Normally SW1 and SW8 will be OFF while SW3 and SW7 will be ON SW4 6 are not used Important information for using Citect For Detailed information see Appendix A SW1 OFF SW2 OFF ON SW3 OFF SW7 ON SW8 OFF Mode 0 SW1 is TCP timeout control SW2 is Communications type Mitsubishi Programming software MMPlus needs this to be set to ASCII Mode ON Citect normally uses Binary Mode OFF but a parameter should allow the selection of ASCII Mode ON SW3 is Self start enabling disabling of PLC OFF Self start Disabled ON Self start Enabled SW7 is Write Protecting the PLC OFF Writing Prohibited ON Writing Approved SW8 is Initial timing setting of PLC OFF Quick start ON Normal start start after a dela
3. ASCII Mode as well SW3 Self start mode setting MELSCQNA DOGC 26 09 00 14 Driver Design Specification Selects the start mode when the QE71 is booted OFF Runs following Y19 initial processing request signal ON Reads the parameters in the EEPROM buffer memory regardless of the Y19 initial processing request signal after power has been turned on or the module reset and then conducts initial processing of the contents This switch should be OFF SW4 SW6 Usage not possible Fixed to OFF SW7 CPU communications exchange timing setting Write Protect the PLC OFF Writing Prohibited ON Writing allowed If you want to write to the PLC then make sure this is ON SW8 Initial Timing Setting Select the Timing which starts Initial Processing OFF Quick Start Start without Delay when entirely constructed in a single network OFF Normal Start start after a 20 sec delay when entirely constructed in multiple networks So far OFF has always worked for Citect MELSCQNA DOC 26 09 00 15
4. Citect for Windows Driver Specification Extract MELSCQNA Driver Alain Walgraeve 1998 09 03 Alain Walgraeve 1998 09 25 Version 1 0 7 CiT Driver Design Specification Contents 1 TARGET DEVICE S AND PROTOCOL 1 1 Introduction 1 2 Device Manufacturer 1 3 Device Definition 1 4 Communications Method 1 5 Communications Hardware Configuration 1 5 1 Wiring Diagrams 1 5 2 1 O Device Settings 1 5 3 Software Setup 1 6 Special Requirements 1 7 Maximum Request Length 2 USER INTERFACE 2 1 Introduction 2 2 Driver Name 2 3 Boards Form 2 3 1 Board Type 2 3 2 Address 2 3 3 IO Port 2 3 4 Interrupt 2 3 5 Special Opt 2 4 Ports Form 2 4 1 Baud Rate 2 4 2 Data Bits 2 4 3 Stop Bits 2 4 4 Parity 2 4 5 Special Opt 2 5 10 Devices Form 2 5 1 Protocol 2 5 2 Address 2 6 Pull down lists Help 2 7 10 Device Variable Types 2 7 1 Formats and types Citect data types 2 7 2 MELSCQNA DBF Entries MELSCQNA DOGC 26 09 00 d Ma A A A ARA A o 0 MAAN NN WNNNNNWNNNN NN ON 2 8 PROTDIR DBF 2 9 Parameters and INI options 2 9 1 2 9 2 2 10 2 11 2 12 2 13 2 14 2 15 Standard Parameters Driver Specific Parameters Remapping Driver Specific Errors Driver Error Help Debug Messages Stats Special Counters Hints and Tips 3 REFERENCES 3 1 References 4 APPENDIX A 4 1 AJ71QE71 B5 A1SJ71QE71 B2 and A1SJ71QE71 B5 Hardware MELSCQNA DOC 26 09 00 Driver Design Specification 10 10 10 10 10 10
5. L DY lt hexno gt DIGITAL M lt no gt DIGITAL B lt hexno gt DIGITAL L lt no gt DIGITAL F lt no gt DIGITAL V lt no gt DIGITAL S lt no gt DIGITAL SM lt no gt DIGITAL SB lt hexno gt DIGITAL TS lt no gt DIGITAL TC lt no gt DIGITAL SS lt no gt DIGITAL SC lt no gt DIGITAL CS lt no gt DIGITAL CC lt no gt DIGITAL TN lt no gt NT BCD LONG LONGBCD STRING NT BCD LONG LONGBCD STRING NT BCD LONG LONGBCD STRING NT BCD LONG LONGBCD STRING NT BCD LONG LONGBCD STRING NT BCD LONG LONGBCD STRING NT BCD LONG LONGBCD STRING NT BCD LONG LONGBCD STRING NT BCD LONG LONGBCD STRING SN lt no gt CN lt no gt D lt no gt W lt hexno gt SW lt hexno gt SD lt no gt R lt no gt ZR lt hexno gt Z lt no gt NT BCD LONG LONGBCD STRING Read Write Where lt no gt decimal number lt hexno gt hexadecimal number 2 7 2 MELSCQNA DBF Entries TEMPLATE UNIT TYPE RAW TYPE BIT WIDTH LOW HIGH COMMENT X X 0 0 1 0 Ox1FFF Input relay Y X 1 0 1 0 Ox1FFF Output relay DX X 2 0 1 0 Ox1FFF Link input DY X 3 0 1 0 Ox1FFF Link output M U 4 0 1 0 8191 Internal relay BY X 5 0 1 0 Ox1FFF Link relay L U 6 0 1 0 8191 Latch relay F U 7 0 1 0 2047 Annunciator V U 8 0 1 0 2047 Edge relay SM U 9 0 1 0 2047 Special relay See table in 4 7 above for allowed range of addresses in commands MELSCQNA DOGC 26 09 00 9 Driver Design Specification SB X 10 0 1 0 Ox7FF Special relay for link S U 11 0 1 0 8191
6. NA DOGC 26 09 00 10 Driver Design Specification 2 12 Driver Error Help The following entries should be included in the Citect PROTERR DBF spec file PROTOCOL MASK ERROR MESSAGE REFERENCE ACTION COMMENT MELSCQNA 10000 MELSCQNA Section 17 1 3 of Error Code the QnA Ethernet Interface Module User s Manual 2 13 Debug Messages The driver will incorporate trace functionality to allow support and advanced users to assess their own syslog traces for the protocol The trace information will be communicated to Citect by means of parameters to the channel debug function as described in Chapter 7 of the DDK V2 0 The following actions can be traced if the focused communication channel is placed into the appropriate debug mode writing data Driver calls debug with title parameter Transmit buffer parameter pointer to the channel request buffer length parameter the request length reading data Driver calls debug with title parameter Receive buffer parameter pointer to the channel response buffer length parameter the response length communication errors a In case of general communication errors Driver first calls debug with title parameter ERROR Transmit buffer parameter pointer to the channel request buffer length parameter the request length Then driver calls debug with title parameter Receive buffer parameter pointer to the channel
7. Step relay TS U 12 0 1 0 2047 Timer Contact TC U 13 0 1 0 2047 Timer Coil SS U 14 0 1 0 2047 Integrating timer Contact SC U 15 0 1 0 2047 Integrating timer Coil CS U 16 0 1 0 1023 Counter Contact CC U 17 0 1 0 1023 Counter Coil TN U 18 1 16 0 2047 Timer Current value SN U 19 1 16 0 2047 Integrating timer Current value CN U 20 1 16 0 1023 Counter Current value D U 21 1 16 0 12287 Data register W X 22 1 16 0 Ox1FFF Link register SW X 23 1 16 0 Ox7FF Special register for link SD U 24 1 16 0 2047 Special register R U 25 1 16 0 32767 File register block access ZR X 26 1 16 0 OxFE7FF File register seq access Z U 27 1 16 0 15 Index register 2 8 PROTDIR DBF FILE BIT BLOCK MAX LENGTH OPTIONS MELSCQNA MELSCQNA 2048 2048 Ox33f 2 9 Parameters and INI options 2 9 1 Standard Parameters Block 256 Delay 0 should be increased to lower CPU load MaxPending 2 Polltime 0 Timeout 2000 msec 2 sec Mitsubishi recommends a default value of 10 sec Retry 2 Mitsubishi recommends a default value of 3 WatchTime 30 sec 2 9 2 Driver Specific Parameters None 2 10 Remapping Not supported 2 11 Driver Specific Errors Driver Error Code Mapped to Meaning of Error Code Hexadecimal Generic Error label 10000h Code is the Error Code code Consult section 17 1 3 of the QnA Ethernet Interface Module User s Manual see 8 References and Contacts for details on the Error Code MELSCQ
8. e TCP not UDP Previously the format for the address was a b c d port eg 192 9 2 50 1280 2 5 IO Devices Form 2 5 1 Protocol MELSCQNA 2 5 2 Address The CPU number 0 64 or 255 You can specify the CPU monitoring time using the optional parameter Tt after the CPU number It should be possible to specify the network number 0 239 or 255 by using optional parameter Nn after the CPU number only useful for MELSECNET 10 PLC networks Finally we need to have the ability to specify the ASCII Mode for data exchange by using optional parameter A the default is Binary Mode The address format is a Tt Nn A Where a CPU number 0 to 64 or 255 in decimal t CPU monitoring time parameter units 250 ms The default is 10 n Network number 0 to 239 or 255 in decimal The default network number is 0 NOTE An in depth description of the Network and CPU numbering policy can be found in section 10 1 of the QnA Ethernet Interface Module User s Manual see 8 References and Contacts 2 6 Pull down lists Help The following entries should be included in the Citect HELP DBF spec file TYPE DATA FILTER PROTOCOL MELSCQNA a MELSCQNA DOGC 26 09 00 8 Driver Design Specification 2 7 IO Device Variable Types 2 7 1 Formats and types IO Device Type Citect data Citect data types Description format Special Usage Limitations Valid Ranges X lt hexno gt DIGITAL Y lt hexno gt DIGITAL DX lt hexno gt DIGITA
9. hing On Line and Good Standard Display of communication exchange completion BSY ON Executing OFF Not Executing Display during execution of communication exchange processing SW ERR CPU error CPU type error or rotary switch error display ON Error OFF Normal COM ERR ON Communication Exchange Abnormality Bad Thing CPU R W ON Exchanging data with CPU TRAN S ON Data link command request executing TRAN R ON Data link RECV command request waiting FTP ON FTP server function operating B1 B8 Communication line connection status ON Open completed OFF Closed state TEST ON Self diagnosis executing TEST ERR ON Error during self diagnosis Operation Mode Switch 0 On Line 1 Off Line 2 Execute a self diagnosis test using a self loopback test 3 Execute a RAM Test 4 Execute a ROM Test 4 Execute an EEPROM Test 6 F Not Used Communication Exchange condition setting Switches SW1 TCP Timeout error temporary circuit process selection Selection of Circuit processing t the time of a transmission of a TCP time out error OFF Close the circuit ON Do Not Close the Circuit For Citect keep it OFF SW2 Data Code Selection Type of Data Communications OFF Binary Mode ON ASCII Mode Mitsubishi has released a Windows version of their programming software that uses ASCII Mode for communicating with the Module Citect normally uses Binary Mode but there should be an ability to use the
10. response buffer length parameter the response length b For timeout errors Driver first calls debug with title parameter ERROR Transmit buffer parameter pointer to the channel request buffer length parameter the request length MELSCQNA DOGC 26 09 00 11 Driver Design Specification Then driver calls debug with title parameter Timeout buffer parameter pointer to the channel response buffer dummy length parameter the response length dummy 2 14 Stats Special Counters Purpose Meaning of this counter M T DCBs to inqueue Number of messages transmitted EE EEE SE SS EE See 2 15 Hints and Tips MELSCQNA DOC 26 09 00 12 Driver Design Specification 3 1 References DRIVER DEVELOPMENT KIT V2 0 February 1996 Edition for Citect Windows Ci Technologies Pty Limited MELSEC Q series Programmable Controller User s Manual QnA Ethernet Interface Module type AJ71QE71 B5 A1SJ71QE71 B2 A1SJ71QE71 B5 Manual number IB NA 66661 C MELSCQNA DOC 26 09 00 13 Driver Design Specification 4 Appendix A 4 1 AJ71QE71 B5 A1SJ71QE71 B2 and A1SJ71QE71 B5 Hardware The B2 has a Coax connector for 10Base2 and the B5 has an AUI connector for 10Base5 type connections Mitsubishi recommend using a Transceiver with SQETEST or Heartbeat functionality if using the B5 model Indicators on the front of the Module RUN ON Normal OFF Bad Thing Normal Operation Display RDY Flas
11. y of 20 seconds 1 5 3 Software Setup The PLC must be programmed to operate the AJ71QE71 interface A sample program will be given in Appendix A at a later stage in the testing phase of the driver 1 6 Special Requirements None MELSCQNA DOGC 26 09 00 5 Driver Design Specification 1 7 Maximum Request Length 2048 bits 256 bytes MELSCQNA DOGC 26 09 00 6 Driver Design Specification 2 User Interface 2 1 Introduction This section defines how the user will see the driver This relates directly to how the Citect forms need to be filled out and any special INI options For the kernel the debug trace messages and the Stats Special counters are documented 2 2 Driver Name MELSCQNA 2 3 Boards Form 2 3 1 Board Type TCPIP 2 3 2 Address 0 2 3 3 IO Port Leave blank 2 3 4 Interrupt None 2 3 5 Special Opt Leave blank not used was previously used as the ACPU time out in milliseconds in form time default t2500 2 4 Ports Form 2 4 1 Baud Rate This field is not used 2 4 2 Data Bits This field is not used 2 4 3 Stop Bits This field is not used 2 4 4 Parity This field is not used 2 4 5 Special Opt The AJ71QE71 Ethernet module s TCP IP address and port number in the form MELSCQNA DOGC 26 09 00 7 Driver Design Specification la b c d Pp T Where a b c d is the destination IP address using decimal numbers n is the destination port number in decimal T forces the TCPIP driver to us
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