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FlashLINK JTAG programming cable for PSD and uPSD

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1. wv UM0044 Sf i User manual FlashLINK JTAG programming cable for PSD and uPSD Features e Allows PC or Notebook parallel port to program uPSD and PSD devices using PSDsoft Express software development tool e Supports IEEE 1149 1 JTAG signals TCK TMS TDI TDO Supports additional signals TSTAT and TERR to reduce programming time e Single FlashLINK Cable assembly supports both 3 3V and 5V target devices with no manual configuration Target device may operate from 2 7V to 5 5V e Flying Lead cable included to adapt to any target connector using 0 025 square posts LoopTest cable included to validate PC parallel port operation Overview The family of Flash PSD and uPSD devices offer In System Programming ISP allowing a completely blank device to be programmed while soldered to a circuit board This simplifies manufacturing and provides an effective way to update products after they are in use Flash PSD and uPSD devices comply to the core requirements of the IEEE 1149 1 JTAG specification However these devices do not support boundary scan functions Instead they support ISP and some uPSD devices support emulation through JTAG The FlashLINK cable assembly shown in Figure 1 will perform ISP only on uPSD and PSD devices not memory or logic devices from other vendors The software development tool PSDsoft Express is a Windows based program which operates the FlashLINK cable assembly PSDsoft Express may
2. cable to the FlashLINK Adaptor and also connect it to your target circuit board just as if you are ready to program the device 2 Turn on the power on the target device and then click the Connect Test button in the HW Setup box This test involves the circuit traces on your circuit board If there is a failure it is likely due to signal routing or signal integrity on the target circuit board or the PC may have compatibility problems with the parallel port driver used by PSDsoft Express Note If either test fails you will see a window pop up that allows you to email in the problem Please do so and we will assist you ky 715 www BDTIC com ST Circuit examples UM0044 4 4 1 Note Note 4 2 8 15 1 Circuit examples 4 pin JTAG The first example shown in Figure 3 uses the standard JTAG signals 4 pin JTAG This is the default configuration in PSDsoft Express 4 pin JTAG The recommended pull up resistors and decoupling capacitor are near the JTAG connector Figure 3 Circuit example for 4 pin JTAG SIGNAL S USER PC BOARD DIRECTION 5 DURING 400k 400K JTAG OPERATION TMS TCK TER or I O GENERAL I O GENERAL I O TDI TDO EQUIPMENT GENERAL 10 Voc 0 CONNECTS HERE JTAG PROGRAMMING TEST UPSD or PSD Port C USER I O SIGNALS SYSTEM RESET CIRCUITY connect directly to RESET Inpu
3. definition on FlashLINK adaptor 4 2 Connector definition 5 3 SoftWare cepe T 6 3 1 Diagnostic Tesis dob AG RE EG doce Rare PR ME ES 6 3 1 1 tte pico E We Cael waa he 3 1 2 Connect Test aeree Rd Rara a da aree E Des 6 4 examples iucunda RIO odo qure wu due e doi de ira uu 8 4 1 PE ER IER Paca stu ands 8 4 2 MEE OUI cH PT TIT 8 4 3 Multiplexed JTAG PSD only 9 5 Chaining JTAG 11 Appendix FlashLINK 12 6 Contact information iiec cesta 23 Erat RR EE ER n Rm ae a 13 7 Revision history 14 ky 3 15 www BDTIC com ST Pin definition on FlashLINK adaptor UM0044 1 Pin definition on FlashLINK adaptor Table 1 Pin description for 14 pin FlashLINK adaptor connector 1 Pin Signal Description Type 1 Signal 1 JEN JTAG Enable active low when JTAG traffic is present OC Source 2 TRST Mis Ies on target active low optional per IEEE OC GND Signal Ground 4 CNTL Generic Control signal OC Source TDI JTAG IEEE 1149 1 Serial Dat
4. herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLIC
5. 7 TXL 4 01 z iet 012 SEIENT ii OGL dlor 6 LISSNI V DA 1 1 g i SWL or za 1a NISY VIDA T a 9 s IvISL E IL 30A 106 NO 10 0 Nip Nat ix La 1 aoor aoor 90 59 lp x X 5 VOSA E X di VSOSTWYSNG ly IVISL leu 9 VSOSTVISING Ly INO Yeu a t TAX VSOSTVPSING NISU Yea oi n i TRAN _ azi ator NISL pem 3 NX 80 2 05 azn IVISL NISAL X gt DW Do D Ndf pstaa SIL XL l SDA 106 30A 0 1 on 4001 4001 4001 4001 IINId OPZOWEL 19 o 29 7 0010 OINId 5 2 vA w 00 ZA SWL TU A wel 4 YN 204 666666666466 34233 z 22 ale XL ord ze M ona vin Ir X001 6 er FlashLINK schematic Appendix A www BDTIC com ST 12 15 UMO0044 Contact information 6 Contact informa
6. ATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2007 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 15 15 www BDTIC com ST
7. Example for Multiplexed JTAG pins PSD only uPSD 100k Typ SIGNAL i J USER PC BOARD ENG JTAG OPERATION TMS PCO TCK PC1 or PC2 TSTAT TERR 4 9 x TDI PC5 eee TDO PC6 CONNECTS HERE PLD INPUT PC7 PSD only not PSD Port C SYSTEM RESET CIRCUITY MISC USER I O SIGNALS connect directly to RESET Input on PSD AI08866b Note 1 For5VuPSD3xxx devices pull up resistors and Vcc on the JTAG connector should be connected to 5V system Vpp 2 For3 3V uPSD3xxx devices pull up resistors and Vcc pin on the JTAG connector should be connected 3 3V system Voc 3 TSTAT and TERR are not part of the IEEE 1149 1 Specification 10 15 y www BDTIC com ST UMO0044 Chaining JTAG devices 5 Note Note ky 1 Chaining JTAG devices The IEEE 1149 1 specification allows chaining more than one device in a JTAG chain uPSD and PSD devices may be included in this JTAG chain However PSDsoft Express will place devices from other vendors into BYPASS Mode keeping them passive in the chain when programming uPSD and PSD devices Conversely when other vendors JTAG control software is operating the JTAG chain uPSD and PSD devices may be placed into BYPASS Mode Figure 6 shows an example of a JTAG chain with three devices including a device from another manufacturer This example also shows how to use 6 pin JTAG in a chaining situation Chaining must be configured in PSDsof
8. a Input Source 6 TSTAT JTAG ISP Programming Status to speed programming Destination optional 7 Voc DC source from target 2 7V to 5 5V 8 RST Target system reset recommended OC Source 9 TMS JTAG IEEE 1149 1 Mode Select Source 10 GND Signal Ground 11 TCK JTAG IEEE 1149 1 Clock Source 12 GND Signal Ground 13 TDO JTAG IEEE 1149 1 Serial Data Out Destination 14 TERR JTAG ISP Programming Error Status to speed Destination programming optional Note 1 Open Collector pulled up to Voc inside FlashLINK Adaptor 2 Notsupported by PSDsoft Express signals remain inactive 3 All signal grounds are tied together inside FlashLINK Adaptor 4 Thetarget must supply Vcc to the FlashLINK Adaptor 2 7V to 5 5VDC 15mA max at 5 5V Not all 14 signals are required for all applications Here is how they are used 6 Core signals that must be connected TDI TDO TMS TCK Vcc GND e 2 Optional signals that reduce programming time as much as 3096 TSTAT and TERR 1 Optional signal to control multiplexing of JTAG signals PSD only or to indicate JTAG activity JEN e 1 Optional IEEE 1149 1 signal for JTAG chain reset TRST e 1 Optional but recommended signal to allow FlashLINK to reset target system after ISP RST e 1 Optional generic control signal to target system from FlashLINK CNTL 2 Two additional ground lines to help reduce EMI if a ribbon cable is used These ground lines sandwich the TCK signal in the ribbon cabl
9. be downloaded at no charge from www st com psm PSDsoft Express supports device chaining meaning more than one uPSD or PSD device can reside in a single JTAG chain Also other devices memory logic from other vendors may reside in the JTAG chain but these devices will stay in BYPASS Mode PSDsoft Express will generate BSDL JAM STAPL and SVF files for use with 3rd party JTAG programming equipment The four basic JTAG pins TCK TMS TDI TDO on uPSD devices are dedicated to operate as JTAG pin at all times However the four JTAG pins on PSD devices may also be used for general I O functions ST has created two optional JTAG signals TSTAT and TERR to reduce programming times These pins supply programing status on signal pins rather than having to scan out the status serially for each byte programmed in Flash memory Program times using this method 6 pin JTAG can be as much as 30 less than the standard method 4 pin JTAG January 2007 Rev 5 1 15 www st com www BDTIC com ST UMO0044 2 15 Figure 1 FlashLINK cable assembly Mates parallel port 108862 PG p DB 25 Cable M F straight through wiring L T DB 25 Cable FlashLINK Adapter LT Flying lead cable 12WIRES 1 Target device 6 inches 1 14 pin ribbon cable may also be used Not supplied in FL 101 Kit 4 www BDTIC com ST UM0044 Contents Contents 1 Pin
10. e These two ground signals are not present on the flying lead cable 4 15 ky www BDTIC com ST UMO0044 Connector definition 2 Note Note Note 1 Connector definition There is no industry standard JTAG connector Each device manufacturer differs ST has a specific connector and pinout for the FlashLINK Adaptor The connector scheme on the FlashLINK connector can accept a standard 14 pin ribbon cable connector 2 rows of 7 pins on 0 1 centers standard keying or any other user specific connector that can slide onto 0 025 square posts The pinout for the FlashLINK Adaptor connector is shown in Figure 2 A standard ribbon cable is a good way to quickly connect to the target circuit board If a ribbon cable is used then the receiving connector on the target system should be the same connector type with the same pinout as the FlashLINK Adaptor shown in Figure 2 The JTAG signal TDI is sourced from the FlashLINK Adaptor and should be routed on the target circuit board so that it connects to the TDI input pin of the PSD or uPSD device The JTAG signal TDO is an input received by the FlashLINK Adaptor and is sourced by the PSD or uPSD device on its TDO output pin See Figure 3 on page 8 Figure 4 on page 9 and Figure 5 on page 10 for more information Figure 2 Pinout for FlashLINK adaptor and target system JTAG connector KEY WAY 108867 This diagram perspective is looking into the face of the s
11. hrouded male connector the FlashLINK Adaptor 0 025 inch 0 635mm posts on 0 100 inch 2 54mm centers Connector reference Molex 70247 1401 Recommended ribbon cables for quick connection of the FlashLINK Adaptor to the end product Samtec HCSD 07 D 06 00 01 S N Digikey M3CCD 14065 ND TDO is a signal destination on the FlashLINK and a signal source on the target board 2 TDlis a signal source on the FlashLINK and a signal destination on the target board 5 15 www BDTIC com ST Software UM0044 3 Note 3 1 6 15 Software The FlashLINK cable assembly is driven by the software development tool PSDsoft Express available at no charge from www st com psm With this tool you define the pin functions memory map and PLD configuration of PSD or uPSD devices add microcontroller firmware to be programmed into Flash memory then generate a single file to program into the device an object file with the filename extension obj PSDsoft Express will then use the FlashLINK cable assembly to program this object file into the PSD or uPSD device Other operations include erase verify upload and blank check See the PSDsoft Express User Manual for more detail Be sure to use the latest version of PSDsoft Express Updates are available from www st com psm Diagnostic tests PSDsoft Express also performs some diagnostic tests for the PC parallel port and FlashLINK cable assembly Loop test Should be run first
12. in Figure 5 illustrates one method to multiplex JTAG signals with general I O functions PSD only not available on uPSD In this example the PLD input pin at PC7 was chosen this could be any PLD input pin to control how the JTAG pins operate The signal JEN from the FlashLINK Adaptor drives PC7 When JEN is active logic low the JTAG pins operate as JTAG When JEN is inactive logic high the JTAG pins operate as general I O You must configure this in PSDsoft Express by declaring the JTAG pins as general I O not dedicated JTAG pins then configure one PLD input pin PC7 in this example then you must define an equation which will toggle the JTAG pin operation between JTAG and general I O To define this equation in PSDsoft Express 1 Click on the JTAG Enable Tab in the Design Assistant window 2 Write the equation for the internal node jtagsel which controls the function of JTAG pins jtagsel logic high is JTAG logic low is I O For the example in Figure 5 the equation should be jtagsel PC7 so you would just have to type PC7 in the equations box and PSDsoft Express will do the rest Note You can click on the Show Eq button to see the resultant equation ky 9 15 www BDTIC com ST Circuit examples UM0044 JEN controls the tri state buffers on the general I O pins to avoid signal conflict when Note operating in JTAG Mode or General I O Mode Figure 5 Circuit
13. t Express 1 Click on the JTAG ISP box in the lower left corner of the PSDsoft Express main flow diagram 2 pop up dialog box will appear and ask how many devices are in the JTAG chain If you click More than you will go to the JTAG Operations window that allows you to define the number of devices in the chain as well as their position If you do not see this dialog box that asks how many devices are in the JTAG chain pull down the Preferences menu of the main PSDsoft Express window and re enable this option question Figure 6 Example of Chaining JTAG Devices FlashLink Adapter Connector 13 PSD or uPSD 1 optional IJEN ITRST 2 optional 1 L3 poer 4 optional 8 recommended 1 1 NJO ja Any JTAG Device in ByPass Mode 12 x 1 1 1 1 1 straight through 1 ribbon cable 1 1 1 1 1 1 1 2 row 7 position System Reset Circuitry JTAG Chaining for PSD or uPSD and other JTAG compalibledevices A 08863 All Ground pins are connected together inside the FlashLINK assembly 11 15 www BDTIC com ST UMO0044 FlashLINK schematic FlashLINK adaptor schematic Figure
14. t on yPSD AI08864b For 5V uPSD3xxx devices pull up resistors and Vcc pin on the JTAG connector should be connected to 5V system Vpp For 3 3V uPSD3xxx devices pull up resistors and Voc pin on the JTAG connector should be connected to 3 3V system Voc 6 pin JTAG The second example in Figure 4 uses the two additional and optional JTAG signals TSTAT and TERR to reduce programming time To configure this in PSDsoft Express just click on pin PC3 or pin PC4 and choose Dedicated JTAG function These two signals must be used as a pair so choosing either one for JTAG will assign both to dedicated JTAG function www BDTIC com ST UM0044 Circuit examples Figure 4 Circuit example for 6 pin JTAG SIGNAL USER PC BOARD SUN JTAG OPERATION TMS PCO TMS TCK PC1 TCK or VO PC2 TSTAT TERR Lum TDI PCS TDI EQUIPMENT TDO PC6 TDO CONNECTS HERE GENERAL I O PC7 Veo PSD or PSD Port C GND RST SIGNALS SYSTEM CIRCUITY connect directly to RESET Input on uPSD Note 1 For 5V uPSD3xxx devices pull up resistors and Vcc pin on the JTAG connector should be connected to 5V system Vpp 2 For3 3V uPSD3xxx devices pull up resistors and Vcc pin on the JTAG connector should be connected to 3 3V system Voc 3 TSTAT and TERR are not part of the IEEE 1149 1 Specification 4 3 Multiplexed JTAG PSD only The third example
15. tion For current information on ST Flash PSD and uPSD products please consult our pages on the world wide web at www st com psm If you have questions or comments concerning the matters raised in this document please send them to the following email address apps psdQ st com Please include your name company location and phone number 13 15 www BDTIC com ST Revision history UMO0044 7 14 15 Revision history Table 2 Document revision history Date Revision Changes 1 0 First issue written in WSI format Front page and back two pages in ST format added to the PDF file 30 Jan 2002 1 1 Any references to Waferscale WSI EasyFLASH and PSDsoft 2000 updated to ST ST Flash PSD and PSDsoft Express 13 Nov 2003 2 0 Reformatted 09 Mar 2004 3 0 Republished Figure 3 Figure 4 Figure 5 updated by adding clearer JTAG connection labeling 06 Sep 2005 4 0 Notes associated with above Figures renumbered Figure 7 updated connecting pin 13 to pin 8 for the DB25 connector D t ref tt 26 Jan 2007 50 ocument reformatted Figure 7 updated 4 www BDTIC com ST UM0044 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described
16. to test basic operation of the PC parallel port and the FlashLINK cable assembly LoopTest will wrap FlashLINK signal outputs back into FlashLINK signal inputs for signal path verification Connect test Is optional to test system performance and check the JTAG signal path all the way through the target circuit board including PSD or uPSD device To run these tests install and run PSDsoft Express on your PC or laptop 1 Connect the six foot long DB 25 cable to your PC parallel port on one side and to the FlashLINK Adaptor on the other side 2 Click mouse on the JTAG ISP programmer box at the bottom left of the PSDsoft Express main flow diagram 3 Select single or multiple JTAG devices depending on your target configuration single is most common then click on the Hardware Setup HW Setup box at the lower part of the JTAG Operations window For LoopTest 1 Connect the small loop test adaptor cable not the flying lead cable to the 14 pin connector on the FlashLINK Adaptor 2 Connect the red lead of the loop test connector to a Vcc source 5V 3 3V and connect the black lead of the loop test connector to ground 3 In the HW Setup box click the Loop Test box to run the test If it fails be sure that your are supplying Vcc and ground and also make sure that the PC s parallel port is enabled For Connect Test www BDTIC com ST UM0044 Software 1 Connect the Flying Lead cable or a ribbon

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