Ipso Facto Issue 27
Contents
1. Ipso Facto ISSUE 27 JANUARY 1982 INDEX PAGE PUBLICATION OF THE ASSOCIATION OF COMPUTER CHIP EXPERIMENTERS ACE 1981 Executive 2 EdiLOrSs Corner cccccccscscscorccacscvccseccesvesvecterce eesecccecsescee 3 Members J Netronics Full Basic and the Infamous D 94916 5 8 6 5 45 gt 595459569 gt 6696 gt 5 gt 5499 5 64 HEX Keyboard for the Elf ce eececeecseseceeesoveeceecenovevoeeseeeeoseoseo 16 1802 to 5 100 Bus Convertef cconscrccrvccccccscorcvecccocvsecescososesone 18 Hardware Clock for the 1802 25st enevnttba sseveceeoveses evo sse 26 1802 PF00680 SPRECH Simple Software Voice 5 3 Club tommniqiEasso vaes 4o 5vvssdess utat VS bonaost sob Netessrsesueczus IPSO FACTO is published by the ASSOCIATION OF COMPUTER CHIP EXPERIMENTERS A C E a non profit educational organization Information in IPSO FACTO is believed to be accurate and reliable However no responsibility is assumed by IPSO FACTO or the ASSOCIATION OF COMPUTER CHIP EXPERIMENTERS for its use nor for any inf2. Note 2 DI2 Note 2 DI3 Note U DI7 Note 2 GND GND Note 3 GND Note 3 MWR Ag AL A2 A6 A7 A8 Note 1 A13 Note 1 Ail Note i DI4 Note 2 DI5 Note 2 DI6 Note 2 DIL Note 2 DIf Note 2 Note 3 GND 3 See Figure 3 for latch circuit for Address lines to 15 2 All See Figure 2 for data latch All See Figure 2 for circuit data 4 Other S 100 lines may have to be added as required by individual boards 1892 To 2 L U3a 4 3 16 25 28 5 U3c R W 44 Quest Only m Quest Connect to 5 Netronics Pin 67 of 86 pin bus FIGURE 5 2 FROM f A A2 6V AS Ab A7 4 34 37 67 25 5 5 32 PARTS LIST vi uz BILS96 I7 HLS SY 14 5 us Vo 4042 o s ifg 895 TO 5 6 A NOTABLE ASSEMBLER LOADER by D Stevens 4 Washington Sq Village 13R N Y N Y USA 10012 This routine allows one to assemble long object files without using tape disk it can produce an object file with length RAM 3 I wrote it because I am tired of hand assembling my codes and do not have a terminal or an assembler just an ELF II with 8 RAM The source which is machine code address instruc tions is usually less than twice as long as the assembled object file routine fits in 3 pages and runs slowly needing for
3. 110 LET 16 120 Usx 16 I 130 LET JaI 16 1140 TsI 16 J 150 LET 16 160 BzJ 16 K 170 LET L K 16 180 16 400 LET V R 410 OSUB 500 420 LET V 8 450 GOSUB 500 440 LET VaT 450 GOSUB 500 560 LET V U 55 GOBUB 500 70 GOSUB 1000 95 100 IF IF IF IF IF V lt 10 Y310 11 12 V213 14 V215 RETURN PRINT V RETURN PRINT END GOTC 570 PRINT PRINT FRINT PRINT PRINT PRINT tA EU pU TINY BASIC HEX TO DECIMAL ROUTINE LET 10 LET BsIL C212 LET D 13 LET 14 LET F 15 PRINT INPUT FOUR HEX DIGITS EACH FOLLOWED BY COMMAS PRINT EXCEPT LAST DIGIT MAX 7 F F F INPUT U T V W 0201 61 6 16 Ts 16 16 V V 16 X U T V W PRINT X END PRINT MEMORY DISPLAY PROGRAM PRINT PRINT ENTER THE STARTING ADDRESS AS FOLLOWS PRINT WHERE N EQUALS EACH HEX DIGIT GO SUB 1010 LET Y X PRINT ENTER LAST ADDRESS THE SAME way GO SUB 1010 LET ZZ X REM CLEAR SCREEN AND SPACE PLOT 12 PRINT LET X Y GO SUB 110 LET W PEEK Y LET X W REM SET BYTE FLAG FOR HEX OUTPUT ROUTINE LET P21 GO SUB 110 IF Y lt Z 1 THEN GO TO 56 END N N N N MAX 7 F F F 10 REM HEX OUTPUT ROUTINE LET Is x 16 U X 16 I LET J 1 16 T I 16 LET K J 16 82 J 16 K LET L K 16 RzK 16 L LET VsR IF P21 GOTO 435 GOSUB 500 LET V S GOSUB 500 REM RESET FLAG IF SET LET P 0 LET
4. GOSUB 500 LET V U GOSUB 500 REM ALLOW TWO SPACES PRINT n RETURN IF V lt 10 GOTO 970 IF V210 PR IF Vsil PR van IF V 12 PR V 13 PR 14 PR IF V 15 PR RETURN PRINT V RETURN REM HEX TO DECIMAL ROUTINE LET 210 LET 11 LET 0412 LET 15 LET E 14 LET Fal5 INPUT U T V W Usut16 16 16 TeT 16 16 V2v16 X U T4V W RETURN 11 THE MEGABYTE ELF by R Siddall 40 Cadillac Ave Downsview Ontario Canada M3H 152 INTRODUCTION UP TO NOW FEW HOBBYISTS HAVE FOUND THE 64K ADDRESSIBILITY LIMIT OF THE 1802 BE MUCH OF A PROBLEM THE SITUATION MAY SOON CHANGE HOWEVER WITH THE APPEARENCE ON THE MARKET OF 64K X 1 RAM CHIPS AND THE CONSTANTLY DECREASING COST OF OTHER LESS CAPACIOUS MEMORY CHIPS IT MAY SOON BE NECESSARY TO FIND A WAY TO EXPAND THE USABLE MEMORY SPACE TO ADDRESS THE PROBLEM IF YOU WILL PARDON THE PUN I HAVE DEVISED A MEMORY MANAGEMENT SCHEME THAT WOULD PERMIT AN 1802 BASED COMPUTER TO USE UP TO 1 MEGABYTE OF MEMORY IN 64K SEGMENTS OTHER BENEFITS OF MY SCHEME WOULD BE A MEMORY PROTECTION CAPABILITY AND AN ABILITY TO SEPARATE THE PROGRAM SPACE FROM THE ADDRESS SPACE THIS SYSTEM IS AT PRESENT MERELY THEORETICAL BUT IT IS RELATIVELY STRAIGHTFORWARD AND I HOPE TO MAKE A BREADBOARD IMPLEMENTATION SOMEDAY I ALSO INVITE OTHERS TO TRY IT OUT AND LET ME KNOW WHAT PROBLEMS I HAVE FAILED TO FORSEE ACCESSING 1 MEGABYTE REQUIRES A 20 BIT ADD
5. FIGURE 1 is for alook control see table 1 When the 8255 is reset all 24 bits three 8 bit ports normally float this circuit RI R16 will pull these lines high This would normally place the clock in a HOLD atate stopping the time increment Therefore PCO bit O port 0 is inverted before going to the chip select pin on the olook This removes all control including HOLD from the el clock and allows it to continue keeping time upper portions of ports A and B PAl 7 and PBIL 7 are not used PAL 7 is tied to ground through 10K resistors to avoid having to strip them off in software during olook READ ADDRESSING Since I use other 8255s in my system the schematic shows 711315 providing CS for the clock s 8255 Using this arrangement 16 different PPIs can be selected yielding 48 8 bit I O ports Many good methods of high order address latching and chip selection have appeared in Ipso Facto This one works for Since you may not have an interest in this expansion idea you may wish to use an alternate method of chip select which eliminates the 711330 741832 7ULS15l and 7118371 figure 2 Out the trace on the Netronios Giant Board between pin 8 A13 and pin 16 A10 Run a line from A13 pin 8 to point chip select see clock schematic A10 pin 16 should be tied high to disable the ROM The 8255 will now have addresses FOOOH to The Demo program Will run unmodified with this
6. cut the trace to Pin 70 after the junction of Di and 13 5 Wire up the Auto Switch circuit as shown in Figure 3 6 The total system should now be wired as shown in Figure 2 At this point one note of caution is in order If the Full BASIC board is removed from the system Pin 70 on the GIANT BOARD must be reconnected for cassette read operation I have been using Full BASIC with this modification for several days now and have encountered no problems As long as one remembers that the cassette will take priority over the math chip as described earlier there should be no problems interesting Side effect of this modification is that the LED acts as cassette signal present indicator which is cute if not functional SYSTEM LEAVE CUT BUSS CASS INPUT SEE SCHEMATIC FIGURE 3 AUTO SWITCH CASSETTE INPUT FROM A14 PN 4 5 c1 GIANT BOARD 10 PIN 2 FULL BASIC NON POLARIZED QUTPUT PIN 70 FULL FULL BASIC INPUT 5 BOARD FROM JUNCTION OF DI AND D3 FULL BASIC BOARD CD4066 C 5 FIGURE 3 EF2 LINE AUTO SWITCH FULL BASIC BORD NOTE Of 15 SHOWN BACKWARDS ON METRONICS SCHEMATIC FMURME V SYSTEM METRO0MNKS MEID TINY BASIC PROGRAMS by G Caughman 3795 Somerset Dr Marqetta Georgia USA 30064 DECIMAL TO HEX CONVERSION ROUTINE 10 REM INPUT DECIMAL VALUE AND THIS ROUTINE WILL REM CONVERT TO AN EQUIVALENT HEX VALUE 100 INPUT
7. Al5 The required circuit is in Figure 3 This will latch the 8 high order addr bits and then the lower 8 address bits This is because the S 100 board specifications require that the full 16 bit address be present on the bus at the same time For both the Quest Super Elf and the Netronics Super Elf U3a U3b and U3c are required to invert the 1802 signals to the required S 100 signals Construction The entire circuit can be built on one S 100 interface card by either wire wrapping or point to point connections If the Super Elf or the Elf II with Quest Adapter board is used only a 50 conductor cable and 5 100 prototyping card are needed If only an Elf II is used a Kludge Card for the 86 pin bus an S 100 prototyping card and appropriate cable will be required In either case 5 100 mother board will be required Elf II Note In some cases transistor Ql on all 4K Static RAM cards will have to be replaced with a higher speed transistor Also sometimes diode D4 on the Giant Board will have to be replaced with a higher speed germanium diode If there are any questions or comments on the interface outlined here please send a SASE Self Addressed Stamped Enveloped along with your questions and I will try to help you out 5 100 ia f Notes Signal name 8VDC 1 Elf TI o 19 FIGURE 1 1802 Signal name 15 Note 1 12 Note 1 9 Note 1 101 Note 2 DOP Note 2 410 Note 1
8. Bump memory pointer R9 69 99 Check if finished with recording FB 40 Last recording page of memory is 40 C6 Skip halt if not finished 00 00 Halt 6F 49 Get byte from memory F6 Shift right 71 3E 75 Check the EF3 line F9 80 If EF3 1 then set most significant bit of D 75 36 79 F9 00 If EF3 0 then reset most significant bit of D 79 29 Bump memory pointer 59 Store byte back in memory for safe keepings 28 Bump 8 bit counter 88 Check if finished with this byte 32 65 If so start working on a new byte 88 8 Keep timing smooth 30 69 If not continue as usual
9. SEX R9 LDI X01 SEGMENT POINTER 0 D 1 STR R9 SAVE ON STACK IN SEGMENT 2 OUTI SWITCH DATA SEGMENT BACK TO 1 DEC R9 LOOP LDR RA GET BYTE TO BE COPIED SEX RS OUTI SWITCH DATA SEGMENT TO 2 DEC R STR RB STORE IN DATA SEGMENT 2 SEX R9 OUTI SWITCH DATA SEGMENT TO 1 DEC R9 INC RA INC RB DEC RC GLO RC BNZ LOOP BRANCH BACK UNTIL RC IS ZERO GHI RC BNZ LOOP END HEXKEYBOARD FOR THE ELF by Here is another simple keyboard that will replace the data switches on the original ELF The original circuit was taken from ETI Magazine September 77 60 and modified to hold the data into two latches The circuit uses TTL chips because they were handy and cost me almost nothing The circuit could be modified to use CMOS or LSTTL The keypad comes from a sur plus calculator keyboard bought from Rdio Shack It was modi fied to make it a 16 spst switches arrangement with one side common This was done by cutting the printed circuit and re wiring the switches There are various surplus kevboard on the market and it should be easy to do the same with any keyboard providing you have accessto the switches or the printed circuit Most keyboard are matrix type so they have to be modified to work in this circuit 16 spst switches could also be used push button type Use IC socket for your circuit The control circuit was built on a small phenolic board and screwed under the keypad with 12 wires coming out 8 data 45v gerd str
10. The demo program does not use HOLD on READ due partly to this requirement see figure 5 The 10 and D10 digits are special The H10 digit contains flags for PM and 2l hour operation The D10 digit contains a flag for leap year table 2 The 30 second adjust causes 1 minute to be added to the LSB of the minutes if seconds are 30 or more as the seconds are set to If less than 30 seconds only the seconds are affected Battery backup is provided by 2 alkaline penlight cells Backup is not required it is recommended It is a pain to reload the clock every time the computer has been powered down Just ask TRS 80 model owner The very low drain of the 5832 should give many months years of service Time regulation is through C1 Decrease C1 to speed the FIGURE 3 clock increase C1 to slow the clock SOFTWARE The clock demo was written for an ELF II using the Netronics video board and the 8255 at FFOOH Cenker s BASIC ver 5 this program uses about 1 5K of memory without REMs The program is easily altered to run at any location by changing line 60 and indicates hexidecimal in Quest BASIC The clock READ did not use HOLD since BASIC tied up the clock too long and caused it to lose time Constant interrogation of the clock should be done in machine code The time and date is updated on the CRT about every 4 seconds A more frequent update can be achieved by leaving out the unnecessary statements a
11. above for 650 00 US I will ship My cost was over 1 000 Also ASR33 Teletype W Modern Everything works except tape reader unrealiable 250 US Included full documentation including schematics with diagrams Also some spare parts A D Barksdale Garbee II 1601 Clayton Avenue Lynchburg Virginia 24503 USA Phone 804 384 2470 NETRONICS FULL BASIC AND THE INFAMOUS EF 2 LINE by J Vaal 6535 Velmar Dr Ft Wayne Indiana USA 46811 After reading the last several issues of Ipso Facto I almost regretted that I ordered Netronics Full BASIC last Winter Well Full BASIC LEV III At arrived a couple weeks ago complete with a user manual chock full of errors including the ending address of the program My two biggest complaints about this system are 1 The RPN format is not identical to HP calculators and 2 The modifications to the GIANT BOARD significantly degrade the performance of the cassette read hardware Problem 1 be evidenced by solving the equation 52 62 Quickly you can see the difference in stack operations Unfortunately I do not have a solution to this problem Problem 2 which I believe is actually two sub problems can be neatly solved The first as described by Franklin in Issue 17 where the math chip holds the EF2 line low occurs only when an error is detected by the math chip and the program is terminated or when the user terminates the program during math function exe
12. signal When a cassette signal is present 1 is charged to 5 volts which enables SW3 to put the cassette signal the buss SW2 is_simply an inverter of the output of SW1 and turns off the Full BASIC EF2 signals SW4 optional LED turns on when the cassette line takes control When no cassette signal is present SW4 is turned on and the Full BASIC board has control of the EF2 line This modification eliminates the ac coupling of the cassette signal to the buss and allows a cassette read even when the Full BASIC board would be holding EF2 low It should be noted however that after the program is loaded it still may be necessary to enter PR CL to resume normal operation of Full BASIC This is because the LOAD routine does not reset the math chip This circuit does give priority to cassette operations and therefore the cassette recorder should not be operated during Full BASIC program execution CONSTRUCTION DETAILS The circuit shown in Figure 3 may be readily added to the Full BASIC board in the area reserved for user hardware in the lower right hand corner of the board The following modifications are necessary 1 Remove the luf capacitor and the two diodes that were added to the GIANT BOARD for Full BASIC 2 Connect a wire from A12 Pin kh where the capacitor was to Pin 84 3 Connect wire the mother board between pins 84 of the GIANT and Full BASIC board sockets 4 On the Full BASIC board
13. 01F0 AND THE SEGMENT WERE CHANGED FROM 0 TO 2 THE NEXT INSTRUCTION EXECUTED WOULD BE THE ONE AT LOCATION 201F1 TO GET AROUND THIS A PROGRAM SEGMENT CHANGE CONVENTION OF SOME KIND WOULD HAVE TO BE SET UP MY SUGGESTION IS THAT EVERY SEGMENT USED AS A PROGRAM SEGMENT HAVE A SEP RO INSTRUCTION IN LOCATION 0000 AND AN OUT1 INSTRUCTION IN LOCATION FFFF THIS COULD BE IMPLEMENTED IN HARDWARE THEN TO CHANGE PROGRAM SEGMENTS THE PROCEDURE WOULD BE AS FOLLOWS SWITCH THE PC TO A REGISTER OTHER THAN RO POINT X REGISTER TO A BYTE CONTAINING TWO NEW SEGMENT ADDRESSES POINT REGISTER RO TO THE ENTRY POINT OF THE PROCRAM TO BE EXECUTED IN THE NEW SEGMENT BRANCH TO LOCATION FFFF CONTROL WOULD THEN JUMP TO THE OUTI INSTRUCTION AT LOCATION FFFF THE SEGMENT WOULD CHANGE THE NEXT INSTRUCTION EXECUTED WOULD BE THE SEP RO INSTRUCTION AT LOCATION 0000 OF THE NEW SEGMENT CAUSING A BRANCH TO THE DESIRED PROGRAM TO TAKE ADVANTAGE OF THE SEPARATE ADDRESS SPACE SPECIAL ASSEMBLER AND BASIC SOFTWARE WOULD HAVE TO BE DEVELOPED FOR EXAMPLE ADDRESS LABELS WOULD HAVE TO BE MARKED SOMEHOW AS TO WHETHER THEY WERE ADDRESSES IN THE PROGRAM OR DATA SPACE EXISTING SOFTWARE WOULD STILL RUN BUT IT WOULD BE CONFINED TO THE USUAL 64K MEMORY PROTECTION INHERENT IN THIS SCHEME IS A USEFUL FORM OF MEMORY PROTECTION IF THE PROGRAM AND DATA SEGMENTS ARE DIFFERENT IT IS IMPOSSIBLE FOR THE PROGRAM TO BE CLORBERED BY A STRA
14. 1 Hz could be used to flash lights I suppose you could even use these signals for interrupts What about the clock How about this FETCH DIGIT interrupt driven timer wi Countdown timer with HOLD capability Event control BSR control system a ron ene timestamping The design is relatively simple the applications are FIGURE 5 many From control to display this clock oan be useful addition to any system Ref OKI data sheet March 1980 Intel data manual October 1977 pp 6 223 to 6 240 30 TABLE 1 demo program variables sunmary term hex value decimal value used in program for A FFOO 65280 B FFO1 65281 2 65282 FFO3 65283 E 90 1l F 20 32 G 50 80 H 80 128 TABLE 2 clock functions olook clock data address seconds lsb 70000 seconds 0001 minutes lsb 0010 minutes msb 0011 hours lsb 0100 hours msb 0101 week 0110 day lsb 0111 msb 1000 month lsb 1001 month msb 1010 year 18 1011 year msb 1100 ELF memory address port I ELF memory address port clk adr ELF memory address port clk contl ELF memory address 8255 contl port control for 8255 A input port C enable clk SELECT READ port C enable clk SELECT HOLD WRITE 8255 oontrol ports A B C are outputs M em Oc SO cent ete 0 ERN me S
15. 9D 17 32 58 OC FB 70 0150 5C 2 2C FA OF F9 CO 5C 30 1B FB 50 5C 2C 0160 2C OC OF F9 30 5C 30 1B 99 89 AB 2B 19 19 0170 19 E9 OB F7 AC 2B 29 77 BC IB 29 29 8B 52 E2 0180 8A 3A 8A 9B 52 9A 32 FE 1B 9B 52 64 22 0190 FB 68 BE 1B OB FE 3B 9 DE 00 F6 F6 F6 F6 F6 01A0 FE FC AA 30 C5 30 8 30 DC 30 E2 DE 00 DE 00 0180 30 F9 OB FA OF FC 02 1B FF 01 B7 30 7D OB B5 0160 D4 03 27 30 7D CO 02 16 9B 58 18 8B 58 28 D4 02 0100 9D E7 32 D8 18 18 17 07 30 BF D4 02 4A 47 01 0 30 BF 98 58 18 8B 58 28 D4 02 4A 9D E7 F2 OIFO 18 18 47 B5 D4 03 27 30 D9 FA OF 30 B7 9F BA 0200 8F AA DE 08 29 09 AF 29 09 B9 8F A9 12 42 B7 42 0210 A7 42 BE 02 AE D5 4B 32 27 FF 0132 2 01 32 0220 3D FF 0132 46 DE 00 F8 68 2B CO 01 BF 1B OB 52 0230 8D F4 AD 2B 52 9D 74 BD 2D CO 01 7D 4B 52 9D 0240 F4 BD OB AD 30 4B BD 30 42 DE 01 FA OF 8 0250 0260 0270 0280 0290 02 0 0280 02 0 0200 02E0 02 0 0300 0310 0320 0330 0340 0350 0360 0370 0380 0390 03A0 03B0 03C0 03D0 0400 0410 0420 0430 0440 0450 0460 0470 0480 0490 04 0 0480 04CO 04D0 04 0 04 0 0500 0510 0520 0530 0540 0550 0560 0570 0580 0590 05 0 05 0 26 Ave Decater Illinois USA 62526 Last spring I ordered an OKI real time olook oslendar to fill a need for time keeping my ELF My circuit built around this is memory m
16. B32 v 2 H U d NR EE 24 w N B i KN 5 N ORTI Seele A 3 TIL ss s a A a ITD mls Q 1 ol N 3 v I im i 898 5 s i fe 0000 0000 1000 1001 1002 1004 1005 1004 1007 1009 100B 100 100E 1010 1011 1012 1013 1014 1015 1016 1017 1018 1014 101 101 101F 34 J3E3t JE 363 3 4E 3 3E 3 JE JE 3 3E 3 3 3 36 3 3 3 3E 184 36 3E 3E 3 JE ESE 3 30 3 3 3 3E IE 3E E EIE 3E 3E IE IE IE EIE EIE E IEEE E xc RE RR e WHERE TO 63 Y TO 47 SCREEN LOCATION 324V 3 X 2 HEX POINT PLOTTER 6847 SEMIGRAPHIC SIX MODE 64 48 CREATED 9 NOV 1981 REV 0 02 13 NOV 81 SEITE HE HE HE HE HEHEHE HE HE HEHE IE MEAE JE HE E E E RHEE ENTRY PROGRAM LABEL IS JUMPLOT SOURCE OBJCODE PLOTOUT ASM LISTING PLOTLIST AUTHOR JORGEN MUNCK DESCRIPTION THESE ROUTINES WERE WRITTEN TO BE USED WITH PITTMAN S TINY BASIC USR FUNCTION 058 4195 CLEAR SCREEN USR 4096 X PLOT POINT 3t 3 3
17. E HEHE 3 HE 3 3 3E 3 3 JC 3E 3 3 3 3E 3 3F3F3F3F3F3F3F3F3F3F3F3F3F3F3F3F3F3F3F3F3F3F3E HF HF 3E 3E HF E 3E 3F E HF 3F 3E 4F 3F 3F HF 3t JE 3E 3 HE HE 3E 3E 3E 3E TE 3E 3E 36 3E 3E 3E 3 3E E 3 3 30 JE 3E 3E 3 JE 3E 3E 3 3 JE 3E HF JE JE 3E 3E 3E 9 JE HF HE 3E 3E 3E TE JE JE IE JE 3E JE 3F EQUATES ZEROS EGU 0 ORG 1000H INITLZ GLO A D lt RA 1 lt Yi PHI 47 PERMISSIBLE LDI ZEROS CLEAR OUT FOR CT OF Y 3 PLO SHL SHIFT 0 INTO DATA FLAG YCOOR GHI A GET Y INTO ACCUMULATOR SUBT SMI 03 SUBTRACT 3 DF 0 IF BORROW BNF QUOTY IF BORROW THEN QUOTIENT DONE INC A ELSE INCR REG FOR Y 3 BR SUBT QUOTIENT COUNT QUOTV ADI 403 FIX FOR LAST SUBTRACT PHI 8 AND STORE IN RB 1 MUL T GLO A GET Y 3 FROM SHL MULTIPLV SHL 32 SHL SHL SHL PLO A STORE 32 X Y 3 IN LDI SCREEN HOME BNF IF DF 32 16 lt 9 BITS ADCI ZEROS ADD OVERFLOW TO LSB OF RA 1 HOMEHI PHI A SAVE CURSOR HIGH PORTION XCOOR GLO 8 X ARG 2 0 63 PERMISSIBLE QUOTX SCREEN CHROW CHCOL SIX FIVE FOUR THREE TWO ONE SCRNCLR CLEAR SHR STR SHLC SEP ORG LDI PHI LDI PLO SEX LDI STXD GHI XRI BNZ 20 10 08 04 02 01 gt N PUSH REMA
18. INDER OF X INTO DF SAVE X 2 CLEAR ACCUMULATOR PUSH DF INTO ACCUM AND SAVE REMAINDER OF X 2 GET 32 X Y 3 COMBINE WITH X 2 SCREEN ADDRESS COMPLETE V 3 REMAINDER ROW MULTIPLY BY 2 SAVE GET REMAINDER FROM X 2 DF 1 IF REMAINDER WAS A ONE GET ROW INFO INTO ACCUM ADD CARRY TEST FOR POSITION OF PIXEL THESE ARE HEXADECIMAL WEIGHTING FOR PIXEL POSITIONING STORE IN MEMORY FOR OR GET OLD PIXEL OR IN NEW PIXEL AND RESTORE TO VDG MEMORY RETURN LOAD SCREEN BOTTOM HI BYTE AND LO BYTE SET X FOR CLEARING LOAD ZEROS FOR BLACK BACKGROUND GET HI ADDR TO TEST IF DONE 36 1072 E2 2 RESTORE 2 1073 DS SEP 5 AND RETURN 1074 END BACKGROUND FOR POINTSET HOME e r x Y 65 471 Sy CHARACTER POSITION FOR ANY Y 307a PIXELS L LINE a QUOTIENT EO CHARACTER Position QUOTIENT PEON 3 ROW OF GRAPHICS CHARACTER REMAINDER DG gt OF CHARACTER REMAINDER COLUMN 5 BIT POSITION ROW 2 t COLUMN Le 32 PIXEL ikke eset a DATA vw SCREEN ADDRESS 37 SPRECH SIMPLE SOFTWARE VOICE SYNTHESIZER by P G Liescheski III 4510 Duval St 203 Austin Texas 78751 SPRECH is an output software package which can give the 1802 a voice It basically accepts an ASCII numeric character in RF l or a binary nibble least si
19. K and all mode indicators factory assembled and tested all original Netronics and RCA documentation almost all Questdata and IPSO FACTO newsletter 200 00 or best offer Alain Jacynas 3093 Allard Montreal P Q Canada H4E 2M8 Phone DAY 514 282 6530 EVENING 514 761 7447 FOR SALE 1 Netronics ELF II 80 00 2 Netronics 4K Static Memory each 78 00 1 Case Computer 25 00 1 5 Amp Power Supply 30 00 1 GIANT BOARD 1 0 35 00 1 Netronics Protobard 15 00 1 Netronics Video display board with ASCII K B 150 00 and RF Modulator only Most chips socketed professionally assembled All manuals included OR Everything for 500 00 with Tiny Basic on Tape Will consider trade for 8 disck drives Also available Olivetti daisy wheel KSR terminal 85 232 Interface inc e 2 350 00 NEW S Carter 8086 Islington Ave Woodbridge Ontario L4L 1W3 Phone 851 2921 FOR SALE NM by Joe Matherly Room 222A 460 NE 215th 5 Miami Florida 33179 Tel 305 653 4900 NETRONICS ELF II 4K Boards fully socketed all chips included DIP Switch addressing excellent working condition All 3 for 130 00 or 50 00 each if sold separately I ll pay postage FOR SALE Quest Super Elf with Expansion Board 11 on board options Godbout 8K 5100 video Quest Super Color 6847 based board partially assembled ASC11 Keyboard Full manuals and documentation with some programs on cassette tapes Quest Tiny Basic included All the
20. NT W M M D D Y Y INPUT 7 14 10 9 8 13 12 T 7 zT 7 1 REM RANGE FOR DAY OF WEEK IS 0 6 SUNDAY SATURDAY INPUT LEAP YEAR Y OR N D IF D Y T 9 T 9 44Ol REM 2 FOR LEAP YEAR REM INPUT PRESS RETURN TO ENTER TIME DATE E REM ENTER TIME ON QUEUE REM 32 POKE D H sREM SET UP 8255 PORTS AS OUTPUTS POKE C G REM PORT C CLK CONTROL CLOCK WRITE REM FOR I 1 0 13 B I 1 REM SET CLK ADDRESS LINES POKE A T I sREM SHOVE T I INTO CLOCK NEXT I POKE D E REM MAKE PORT AN INPUT PORTS B amp ARE OUTPUTS POKE C F REM CLOCK READ REM CLS FOR 1 TO 7 READ USED FOR DAY OF WEEK NEXT I REM PRINT CHR l REM CURSOR HOME REM FOR 1 1 TO 13 POKE B I 1 REM CLOCK ADDRESS LINES T I PEEK A REM LOAD T I NEXT I T T DEFAULT IF INT T 6 02 gt 0 T IF 1 THEN IF INT T 6 08 gt 0 T HRS REM IF 3 THEN 24 HR FORMAT IF T 6 2 IF T 6 7 6 6 STRIP OF BIT 2 IF T 6 7 T 6 2T 6 408 REM STRIP OFF BIT 3 IF 9 3 T 9 T 9 4OL REM STRIP OFF BIT 2 PRINT TIME 5T 6 7T 5 5 s sT Lh 5T 3 5 s 51 2 T 1 PRINT T PRINT A T 7 41 PRINT TAB 10 5 T 11 57 10 5 T 9 T 8 5 57T 13 1 12 GOTO 530sREM GO UPDATE TIME AND DATE FOR DISPLAY DATA SUNDAY MONDAY TUESDAY WEDNESDAY THURSDAY DATA FRIDAY SATURDAY END MSMS
21. RESS 4 BITS MORE THAN IS PROVIDED BY THE 1802 ARCHITECTURE IN MY SCHEME TWO 4 BIT NYBBLES WOULD BE LATCHED OFF THE DATA BUS BY AN 1 0 INSTRUCTION IN THE PROGRAM BEING EXECUTED ONE OF THESE WOULD BE USED AS THE SEGMENT ADDRESS I E ADDRESS BITS 17 20 WHENEVER THE PROGRAM COUNTER REGISTER IS BEING USED TO ACCESS MEMORY DURING THE FETCH CYCLE AND WHENEVER AN IMMEDIATE OR BRANCH INSTRUCTION IS BEING EXECUTED THE OTHER SEGMENT ADDRESS IS USED FOR ALL OTHER MEMORY ACCESSES INCLUDING DMA REQUESTS THE PROGRAMMER MAY CHOOSE TO MAKE THESE TWO SEGMENT ADDRESSES POINT TO THE SAME SEGMENT OR HE CAN HAVE A 64K PROGRAM SPACE AND A 64K DATA SPACE SIMULTANEOUSLY ACCESSIBLE HARDWARE FIGURE I SHOWS THE HARDWARE REQUIRED 15 A STANDARD 1852 I O PORT CONTROLLED BY AN I O LINE FROM THE CPU IT HOLDS ONTO THE SEGMENT ADDRESSES SENT TO IT BY THE CPU WHEN THE APPROPRIATE OUTPUT INSTRUCTION IS EXECUTED AN RC CIRCUIT ON THE CLEAR PIN COULD BE USED TO SET BOTH SEGMENT ADDRESSES TO 0 AT POWER ON IC2 AND IC4 CONSTITUTE A LOGICAL ARRAY WHICH DISTINGUISHES WHETHER AN INSTRUCTION BEING FETCHED ON THE DATA BUS WILL REQUIRE DATA TO BE READ FROM THE PROGRAM SPACE I E VIA REGISTER P OR THE DATA SPACE VIA REGISTER X OR ANY REGISTER OTHER THAN THE TRUE FALSE OUTPUT OF THIS LOGICAL ARRAY IS HELD AFTER A FETCH CYCLE IN ONE HALF OF 4018 DUAL D LATCH ICG 1 CALL THIS CIRCUIT FIG 2 THE INSTRUCTION DATA DISCRIMINATOR IC5 IS
22. SSI ts Sr rss net comments seconds are automatically set to zero when clk is written into bit 2 high PM bit 3 high 2l hour range 0 6 0 Sunday bit 2 leap year P TT OS TS A TS LT na SID GMES A Goma A ee s 2 210121 HOLD MUST BE Low Reap MUST BE HIGH ALLOW INT PULSES FIGURE 6 2N2222 i FIGURE 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270 280 290 300 310 320 330 340 350 360 370 31 REMHHHHHHHHHHHHHHHHHHHHHHEHE REMHHHE CLOCK DEMO J SWOFFORD 11 27 81 REMiHHEHHHUIEHOHHBHHUHHHEHEHBHBBHNHE SET MEMORY POINTERS s A FF00 B FFO1 C GFFO2 D GFFO3 REM DATA USED FOR CONTROL E 490 H 480 REM 8255 CONTROL BYTES F 20 G 50 REM CLOCK CONTROL BYTES DIM T 13 REM INITIALIZE T B N REM INITIALIZE B REM REMiHiH INPUT TIME DATE CLS INPUT CHANGE TIME DATE Y OR A IF A z N GOTO 450 IF A lt gt Y GOTO 160 PRINT INPUT TIME IN THIS FORMAT PRINT H H M M INPUT 6 5 4 3 T 2 20 T 1 0 REM SECONDS ARE SET TO ZERO BY CLK ANYWAY INPUT 2l HOUR B IF 6 6 08 00 0 270 REM BIT 3 INDICATES 2l HR FORMAT INPUT A M OR P M c IP 0 T 6 T 6 40l REM SET 2 FOR REM REM PRINT INPUT DATE IN THIS FORMAT PRI
23. T 0 WITH THE OTHER 15 SEGMENTS AVAILABLE AS APL WORKSPACES APL 15 MY FAVOURITE LANGUAGE IT WOULD BE NICE IF RCA OR SOME ENTERPRISING SECOND SOURCER CAME OUT WITH A ONE CHIP CMOS IC CONTAINING THE ABOVE CIRCUITRY WITHOUT THE 4515 BUT INCLUDING A LATCH TO TAKE OFF THE UPPER ADDRESS BYTE THE WHOLE THING COULD BE DONE IN A SINGLE 40 PIN IC WHICH WOULD ADD A LOT OF POWER TO THE 1802 SERIES AND ALSO MAKE LIFE EASIER FOR US HOMEBREWERS 34 5 sto lt 6C1 ue a i Ic3 KN j d 1 0 4 sag GJ DATA BUS FIGURE 1 MEMORY MANAGEMENT CIRCUIT meu 2 INSTRUCTION DATA TOR 04 01 15 CONCLUSION AS I SAID EARLIER THIS WHOLE SCHEME IS JUST THEORY AT THE MOMENT UNFORTUNATELY I AM NOT VERY WELL EQUIPPED FOR THE AMOUNT OF BREADBOARDING THAT THIS SYSTEM WOULD ENTAIL I WELCOME ANYONE ELSE TO TRY IT OUT AND SEND ME ANY COMMENTS THEY MAY HAVE LISTING I SAMPLE PROGRAM TO COPY DATA BETWEEN SEGMENTS BEEEEEEEKERERKEEKEREREEEEEKEEEEEKREEEEKEEEEEKEESEREEKKEEEEEKSE THIS PROGRAM COPIES DATA FROM SEGMENT 1 TO SEGMENT 2 x RS STACK POINTER FOR DATA SEGMENT 1 R9 STACK POINTER FOR DATA SEGMENT 2 RA CONTAINS START ADDRESS OF DATA IN SEGMENT 1 RB CONTAINS DESTINATION ADDRESS IN SEGMENT 2 RC CONTAINS NUMBER OF BYTES TO BE COPIED SEX RS 121 X02 SEGMENT POINTER P 0 D 2 STR RS SAVE ON STACK IN SEGMENT 1 OUTI SWITCH DATA SEGMENT TO 2 DEC RS
24. The club is currently field testing a prototype EPROM board designed to accommodate 2716 32 64 single 5 volt supply EPROM 28 pin JEDEC standard expect to be able to offer the board for sale by 31 March 1982 Current projects underway include a redesigned club 44 pin buss back plane and a new micro processor board for the club buss Forth Hil made an excellent presentation on FORTH at the 8 December 1981 club meeting His work on FORTH 1 well advanced and I should be able to report ordering information in the next newsletter Interested FORTH uses should be approaching FIG and Mountainview Press for appropriate documentation Best Article Issue 26 P Liescheski The Shroedinger Equation MEMBERS CORNER FOR SALE by Chuck Reid 423 Huxley Ave Sarnia Ontario 75 471 Canadian Funds 2 Netronics 4K Static Ram Boards 50 00 each 1 Netronics 4K Static Ram Board 25 00 memory bug needs trouble shooting 1 Netronics Giant Board 20 00 1 Netronics AP 1 5 Amp Power Supply 20 00 1 SSM VBIC Video Display Board 100 00 1 Netronics VDB Video Display Board 150 00 All boards fully functional except where noted and fully socketed except Giant Board FOR SALE BASIC NETRONICS ELF II factory assembled and tested brand new condition Netronics metal cabinet and cover 1 4 K Ram UHF channel 33 modulator 5V power supply Quest interface board with hexdisplays up to 65
25. This may be mdified to fill a buffer and write to tape or disk rather than to memory 23 If error the source data is detected the program branches to C000 This error branch address can be changed it is at 036C in the object code in the listing and at 0842 in the source part of the listing The routine at C000 or wherever should save R9 and The error table below lists the possible error conditions Error Table R3 Diagnosis 019B illegal data at RB 01 4j the source was not changed is the source ROM 0180 illegal data at RB 0227 illegal data at 1 0281 RB points to the last byte of a name which wasn t found 02C6 illegal data at R9 0305 illegal data at R9 1 Summary of Usage l Set up the source file a First five bytes are uu vv 68 xx yy b No mnemonics Final byte not compiler instruction 68 2 Put the assembler at 0100 3 Put anerror handling routine at 000 or an address you pick 4 Set up R8 R9 and RA 5 Do SCRT call to 0100 6 If the routine exits to the error routine use the table above 7 If the routine makes a normal exit check R8 and the data in the R8 stack Listing of Assembler Object Code 0100 E2 8E 73 9E 73 87 73 97 73 82 FF 24 7 92 7F 00 0110 B7 F8 03 BE F8 5D AE DE 04 19 19 D4 03 38 05 40 0120 FO 68 FF 02 D4 03 8C 17 07 32 69 8A 73 9A 73 17 0130 47 BA BB 07 AB AC 1B 1 D4 02 2 47 BD 12 0140 42 BA 02 D4 02 E7
26. USED TO DISCRIMINATE BETWEEN FETCH AND AN EXECUTE CYCLE THE OTHER HALF IC6 PUTS OUT A TRUE FALSE SIGNAL AND ITS INVERSE DEPENDING 12 ON WHICH OF THE SEGMENT ADDRESSES IS USED IN THE SUBSEQUENT FETCH IS A 4019 4 OF 8 SELECTOR WHICH PUTS OUT EITHER ONE OR THE OTHER SEGMENT ADDRESS FROM 1 DEPENDING ON THE OUTPUT OF 6 IC8 IS A 4 TO 16 LINE DECODER WHICH WILL SELECT THE SEGMENT OF MEMORY REQUIRED I HAVE SPECIFIED CMOS ICS THROUGHOUT THE CIRCUIT BUT I FULLY REALIZE THAT TIMING WILL PROBABLY BE A CRITICAL FACTOR AND SOME OR ALL OF THE ICS MAY HAVE TO BE STIL OR EVEN ECL EQUIVALENTS TO THE CHIPS INDICATED TO MAKE THE SYSTEM WORK SOFTWARE THE 1852 I 0 PORT WHICH HOLDS THE SEGMENT ADDRESSES CAN BE TIED TO ANY AVAILABLE 1 0 LINE ON THE 1802 IN WHAT FOLLOWS I ASSUME IS TIED TO NO AN 70UTI 61 INSTRUCTION CAN THEN BE USED TO WRITE THE SEGMENT ADDRESSES TO THIS PORT THE HIGH ORDER 4 BITS OF THE BYTE STORED IN THE PORT WOULD CONTAIN THE PROGRAM SEGMENT WHILE THE LOW ORDER 4 BITS WOULD CONTAIN THE DATA SEGMENT THE DATA SEGMENT CAN EASILY BE CHANGED AT ANY TIME UNDER PROGRAM CONTROL LISTING I GIVES A SMALL PROGRAM THAT WOULD COPY DATA FROM SEGMENT 1 TO SEGMENT 2 CHANGING THE PROGRAM SEGMENT WOULD BE A LITTLE MORE DIFFICULT SINCE THE PROGRAM COUNTER WOULD BE UNAFFECTED BY THE CHANGE OF SEGMENT ADDRESS FOR EXAMPLE IF THE INSTRUCTION THAT CHANGED THE SEGMENT ADDRESS WERE AT LOCATION 0
27. Y DATA POINTER OR FOR THE SYSTEM TO ATTEMPT TO EXECUTE DATA FURTHERMORE DATA IN SEGMENTS OTHER THAN THE TWO ACTIVE ONES CANNOT BE ACCESSED AT ALL UNLESS AN ERRONEOUS OUT 1 INSTRUCTION IS EXECUTED FRONT PANEL FUNCTIONS WITH A BIT OF ADDITIONAL HARDWARE A FEW USEFUL FRONT PANEL FEATURES COULD BE ADDED FOR EXAMPLE OUTPUT OF 6 COULD BE USED TO LATCH OUT THE CURRENT TRUE PROGRAM COUNTER FROM THE ADDRESS LINES ACTIVE SEGMENT ADDRESS ES COULD BE DISPLAYED ON THE FRONT PANEL THE PROGRAM AND DATA SEGMENTS COULD BE CONTROLLED FROM THE FRONT PANEL BY OVERRIDING THE OUTPUT OF IC7 OTHER CONSIDERATIONS OF COURSE IT WOULD NOT BE NECESSARY TO ACTUALLY HAVE A MEGABYTE OF STORAGE OR EVEN 64K TO TAKE ADVANTAGE OF THIS SCHEME IN THE SYSTEM I ENVISAGE SEGMENT 0 WOULD CONSIST ENTIRELY OF ROM AND WOULD CONTAIN THE OPERATING SYSTEM STARTUP PROGRAMS MONITOR INTERPRETERS MATHEMATICAL SUBROUTINES ETC SEGMENT 1 WOULD BE RAM BUT PART OF IT WOULD BE RESERVED FOR USE BY THE OPERATING SYSTEM TO STORE DATA MAINTAIN STACKS PASS PARMETERS ETC SEGMENTS 3 TO F WOULD BE AVAILABLE TO THE USER IF NOT USED FOR MEMORY ONE OR MORE OF THE SEGMENTS COULD BE USED FOR MEMORX MAPPED 1 0 SOME OF THE SEGMENTS COULD BE MISSING ALTOGETHER OR COULD CONTAIN LESS THAN 64K IT WOULD OF COURSE BE UP TO THE USER TO REMEMBER WHERE THE HOLES ARE IN HIS ADDRESS SPACE ONE IDEA THAT INTRIGUES ME IS TO HAVE A 64K APL INTERPRETER IN SEGMEN
28. a the e assembler will store useful data described below R9 should point to the start of a source file and RA should point to the end of the file last byte in the file should not be part of 68 address specifier if it is add 00 to the end of your source Note the 00 at the end of the source listing of the assembler The source should start with uu vv 68 03 xx yy where uu vv is the memory location where the object code will be put by the assembler and xx yy is the load address where the code will run The assembler output should not overwrite the source During assembly the high address byte of the source byte being processed is displayed On return only registers R8 R9 RA and RF are changed R9 now has uu vv and RA points to the end of the object code just generated The source is modified 68 4J patterns are changed to 68 17 or to 68 3J patterns If a 681 combination occurs and the referenced add ress is on a different page the assembled program possibly will not be ok So a list of all such questionable references is made with R8 the stack pointer This stack grows upward If for instance on entry R8 was 1400 and on exit R8 was 1404 then 1400 1401 is the address in the source of a questionable combination and also 1402 1403 Entries are also made if a 68 3 combination refers to an address which is on the same page The routine at 0327 0337 puts out the object bytes the 5F instruction
29. apped via 8255 PPI and allows access to time in hours minutes and seconds and the date as well as the day of week Time can be kept in either 12 or 21 hour format and leap year compensation is provided My system has the 8255 located at FFOOH to FFO3H Unfortunately the Netronics monitor inter feres with locations beyond FDFFH so some ELF II owners may wish to locate the 8255 elsewhere as I did enable the Netronios monitor only for FOOOH to FOFFH as it should have been anyway INTERFACING THE CLOCK The data sheet from OKI shows a suggested arrangement using the Intel 8255 PPI Since I already had a few spares it seemed the easiest route to take The capabilities of the PPI are too ex tensive to cover here so I will be concerned with only those aspects which affect this application Memory locations FFOOH to FFO3H will be assumed All three of the 8255 1 0 ports are used The PPI operates here in mode in two configurations one to read from the clock and one to write to the clock see figure 1 These states are 8255 created by writing into location for clock WRITE and 90H for clock READ These bytes control how the 8255 itself operates An 80H will allow port A to be an output port ports and remain output ports for both clock READ and clock WRITE Similarly 90H allows port A to input the data nibble from the clock data lines Port is used to pro vide the clock address nibble and port
30. cution The capacitor diode modification to the GIANT BOARD is not actually intended to and will not solve this problem I believe however that the degradation of the cassette read hardware as a result of this modification is a far more significant problen Figure 1 is a block diagram of the affected portions of the system when Full BASIC is installed Capacitor Ca is added to the GIANT BOARD because the output of 12 Pin 4 is normally low Diode Db is a clamp on the output signal during cassette read and maintains the proper de operating level The problem with this modification is that it partially defeats the purpose of the cassette read circuit 12 This amplifier is intended to square up the cassette signal but capacitor Ca reduces the effectiveness of this circuit Diodes Da GIANT_BOARD Di and D3 BASIC board comprise a wired OR so that the EF2 line may be shared AUTO SWITCH CIRCUIT OPERATION Figure 2 is a block diagram of the system where the Full BASIC GIANT BOARD modifications are removed and the Auto Switch modifications added to the Full BASIC board This circuit Figure 3 is essentially an automatic switch that connects either the cassette read or the Full BASIC EF2 signals to the buss basic circuit consists of four components U1 CD 4066 quad bi lateral switch R1 R2 and Ci R3 and the LED are optional AUTO SWITCH CIRCUIT OPERATION continued SW1 acts as a buffer for the A12 GIANT BOARD EF2
31. emory between addresses 0100 and 4000 is examined If the amplifier is not too noisy the memory should be filled with primarily zeros and occasional non zero patches These non zero patches or blocks of memory are merely the digitalized sound of each number The first block should represent the sound for zero while the second block should represent the sound of one and so on The data block for the sound of zero is moved to memory locations 0100 02FF while the data for one is moved to 0300 04 and so on until the number F The voice data will occupy 8K of memory since the sound for each number can be contained within two pages of memory After this task the memory contents between locations 0000 and 20FF should be saved on tape for safe keepings Now with this the voice synthesizer can be used For hardware an amplifier with speaker should have its input connected to the Q line see figure 1 To test the program and data one should execute the TEST routine at location 0000 With this one can enter a number on the hexpad After pressing the I key the sound of that number will be regenerated This routine will allow one to easily check the sound quality of each number In order to use SPRECH in conjunction with a monitor one should patch the monitor s output routine so that the INTERFACE routine will be called at location 000 The routine assumes that the output ASCII byte is contained RF 1 Also it is assumed that R3 is the pr
32. errangement I have tried this it works It should be possible to place switoh on the Giant to switch from the monitor to the clock and vice versa If you are using Netronics Full BASIC the only way to into BASIC is through the monitor You may want to develop the idea in figure 3 gt Tocs using SFi to enable the clock once BASIC has been entered I have not tried this modular appearance of the address and FIGURE 2 select circuitry is to emphasize the idea of using presently available circuitry you may already have in your system you have the upper address bits already latched from some other project try connecting those lines to the 711330 at point eliminating the 7413374 I should mention that the Netronics memory board has these address bits already latched and marked on the board itself I have not tried using them how ever Note that CMOS was not used I have had no problems using TTL but you may wish to use the 710 series anyway Row ON GIANT BOARD 28 THE CLOCK The MSM5832 is basically a digital watch in a DIP package Each of the 13 digits available HH MM 88 W MM DD YY must be called for one at a time This is done by addressing the digit to be read written don t confuse with the ELF address data lines commanding the clock and reading writing the clock see figure The HOLD line should not be high for more than one second in order that the clock can increment
33. f loss of staff postal disruptions lack of articles etc apologize for such inconvenience however they are generally caused by factors beyond the control of the club MEMBERSHIP POLICY A membership is contracted on the basis of a club year September through the following August Each member is entitled to among other privileges of membership all 6 issues of Ipso Facto published during the club year EDITORS CORNER o am sure you are pleasantly surprised to see a newsletter so soon after receiving Number 26 There is a reason for our haste Canada Post Corporation has raised postage by over 100 effective January 1 1982 This cost increase was beyond the club s budgeted increase and quite frankly beyond our ability to absorb Since we operate on a annual subscription basis we have no mechanism to generate more revenue from our members so we must cut costs By mailing this issue in 1981 we saved considerable postage costs Unfortunately it will not be enough After much deliberation the executive decided to restrict the size of newsletters to 42 pages the size of issues 26 and 27 Forty two pages will still permit the editors to create a broad ranging newsletter which is just under the weight ceiling of level 2 first class mail rates So far now the 60 page encyclopedia newsletter is gone We will still meet our commitment for 6 newsleters for this club year Your comments would be appreciated Club Products
34. gnificant from the accumulator D and synthesizes the sound of that hexidigit It is mainly intended as a software novelty however it may be quite useful in conjunction with a monitor SPRECH is basically a digital voice recorder Its algorithm is basically similar to that used by Bobby R Lewis in QUESTDATA Vol 2 2 p 1 The RECORD routine is used to generate the raw voice data After manipulation and rearrange ment of this data the TEST and INTERFACE routine can be used to regenerate the sounds of the hexidigits 0 1 2 3 F The TALK routine is the basic subroutine which regenerates the sound from the data in memory TALK performs the inverse function of RECORD The most difficult part of this package to implement is the voice digital ization and the voice data manipulation After this task SPRECH should be quite simple to use First this software must be entered into the 1802 computer It is assumed that this package will be executed from a monitor which sets R2 as Stack pointer R3 as program counter and uses R4 and R5 for SCRT Call and Return registers Some form of audio device such as a tape recorder or an amplifier with microphone must have its output properly connected to the EF3 line With this the RECORD routine is executed at location 005 After pushing the I key the numbers between 0 and F are quickly but clearly pronounced into the microphone The recording period should last for about twenty 20 seconds After this the m
35. instance 20 seconds to process its own source 5 pages and needing 200 seconds to process my operating system source 15 pages object length 08A0 requires only 3 pages because it keeps no tables will run much faster and can be used a loader if just the high address bytes are computed The source for the assembler has no mnemonics only op codes and address data address data is given in strings of bytes all beginning with 68 For example the address of a particular op code is given the name AB by preceeding the code with 68 61 AB it is given the name CD EF by preceeding it with 68 62 CD In the source file a short branch to these locations would be 30 68 11 AB and 30 68 12 CD EF When the assembler encounters a data form such as is in the left column below it performs the action described in the right column Now look at the source listing of the assembler first two bytes tell the assembler to write the object code starting at 1000 the 68 03 01 00 tells the assembler that the load address of the object code is 01 00 next data up to 0417 is op codes compare with the object code listing 0418 is 68 22 01 26 then more op codes At 0112 in the object listing the byte 03 occurs instead name 01 26 is defined at 0823 the 68 62 01 26 and the address of the following byte is 035D Data String Compiler Action 68 00 A 68 will be inserted in the object code 68 01 xx
36. inue to check for Non numeric ASCII code Check for Numeric ASCII code A F Convert ASCII code to a binary number Jump to TALK Momentary Delay for Non numeric ASCII code Delay Loop Bump Delay Counter Return to Monitor TALK A Routine that regenerates sound from voice data 0032 01 02 F8 00 8 08 43 99 49 22 3B 52 Mask off upper nibble of D Calculate page address of voice data block which represents the number in D Store Page number in R9 Calculate amp Store end address on stack Finish the voice block address in R9 Set up R8 as 8 bit counter Get a byte from voice block using R9 as memory pointer Store it on stack Check if finished with voice block Skip return if not finished Return Fili in the skip gap Bump stack pointer assume X 2 Get voice byte from stack Shift right Toggle Q according to DF bit Q 1 if DF 1 40 7 0 0 if DF 0 52 52 Push processed voice byte back onto stack 28 Bump 8 bit counter 88 Check if finished with the voice byte 32 3E If finished with byte then fetch the next voice byte from memory C4 C4 Keep timing smooth 30 43 If not continue as usual with the voice byte RECORD A Routine to produce the voice data 005 F8 00 Start recording of voice page of memory 9 Set up R9 as memory pointer F8 01 B9 61 3F 61 Wait for I key depression 63 37 63 65 F8 08 A Set up R8 as 8 bit counter 19
37. nd not calling for the date everytime 29 COMMENTS Information on obtaining parts is in order The MSM5832 and crystal 32 768 Hz is available form several sources including Concord Computer Products 1971 So State College Anaheim Ca 92806 Digi Key Hiway 32 South P O Box 677 Thief River Falls Mn 56701 Both suppliers provide the data sheet 8255 and other ICs are available from just about anywhere The trimmer C1 is sold by Jameco 1355 Shoreway Road Belmont 94002 The components can be mounted on Radio Shack perf board P N 276 1395 For those of us who aren t made of money here are a couple of suggestions Don t throw away 5832 that digital watch You may be able to use the small crystal in it like I did 32 760Hz As for the other parts try a hamfest I have saved millions by doing my parts procurement at hamfests Ask any amateur radio operator for information on where and when One aspect of the 5832 which I have FIGURE l not mentioned is the interrupt signals figure 6 While I have not made use of them in this circuit 1 15045 there are many ways to utilize these pulses which I smars rope others will find For example the 1021 Hz Clock and 1 Hz could be combined a software controlled beeper see figure 7 while the clock is not being accessed The 60 Hz pulse could be used for a time base in an UPS Uninterruptable Power Supply system The
38. obe enter The extra switch replace the IN switch in the original ELF I call it ENTER A led kbd ready indicates the circuit is ready to accept another byte When the second digit is pressed a data ready strobe is generated and inverted to drive an EF line on the 1802 I am including a short program that will input data in memory sequencely it uses EF2 for input strobe a M N 2 2222 DATA READY INVERSION To DAWE LINE TO CONTROL CIRCUIT HEX KEYBOARD DIOSES 1N914 1802 TO 5 100 BUS CONVERTER by David W Schuler 3032 Avon Road Bethlehem Pa 18017 U S A Theory of Operation Bus buffer Ul is used to buffer the data lines from the 1802 Since the S 100 bus has separate data in out lines the chip select of the buffer is always enabled pins 1 and 19 0 U2 is used to strobe the data from the 100 bus onto the 1802 bi directional data bus when a memory read 15 requested The chip select of U2 is generated by U3a and U4a on the Elf II only On the Elf II pin 1 of U4a is connected to pin 69 of the 86 pin bus on the main board This line indicates if an on board memory address has been selected If pin 69 0 the S 100 buffer is disabled If pin 69 1 the S 100 bus buffer is enabled when a memory read request is received The Netronics Elf II also requires a latch for the upper 8 address bits A8 to
39. ogram counter R2 is the stack pointer and SCRT is used The routine will ignore ASCII characters which are not considered to be numeric In its initial testing the package could reproduce the sound with fair quality Some problems are encountered with B C D and E These numbers tend to sound the same This flaw could be the result of a poor audio system The audio system used in the initial test was a tape recorder connected to the tape I O ports of the computer A filtering system as described by James C Anderson in BYTE Vol 6 2 p 36 may improve the sound quality It is hoped that this voice synthesizer package can be put to some practical use Register Assignments R2 Stack Pointer R3 Program Counter R4 5 Call register R5 SCRT Return register R8 8 bit Counter 9 Data Memory pointer RF 1 ASCII Output code pass Basic Hardware Setup Amplifier Amplifier Microphone Speaker 7 39 SPRECH Phillip Liescheski III 10 16 81 TEST Voice Tester 0000 00 02 37 02 6C D4 00 30 00 INTERFACE 000A 9F 15 D4 00 19 FF 07 25 F8 FF 27 C4 C4 32 wait delay Get number from Hexpad Input 4 Call TALK Do it again Monitor Interface Get ASCII character from RF 1 Check for Non numeric ASCII code Check for Numeric ASCII code 0 9 Convert ASCII to binary number Call TALK Return to monitor Cont
40. rigements of patents or other rights of third parties which may result from its use 1981 82 EXECUTIVE THE ASSOCIATION COMPUTER CHIP EXPERIMENTERS President John Norris 416 239 8567 Vice President Ken Bevis 416 277 2495 Treasurer Mike Franklin 416 878 0740 Secretary Tony Hill 416 523 7368 Directors Bernie Murphy 416 845 1630 Fred Pluthero 416 389 4070 Newsletter Membership Bob Silcox 416 681 2848 Earle Laycock Production Manager Mike Franklin 416 878 0740 Program Convener Bernie Murphy Editors Fred Feaver Bert Dekat Steve Carter Bob Siddall Tony Hill Tutorial Seminars Ken Bevis Fred Feaver 416 389 4070 Advertizing Fred Pluthero John Myszkowski Draughtsman Publication Dennis Mildon John Hanson Hardware amp Ken Bevis 416 277 2495 Software Wayne Bowdish 416 388 7116 R and U Don McKenzie Fred Pluthero Product Mailing Ed Leslie 416 528 3222 Dave Belgrave CLUB MAILING ADDRESS A C E c o Bernie Murphy 102 Street East Oakville Ontario Canada L6H 1H6 Phone 416 845 1630 CLUB MEETINGS Meetings are held on the second Tuesday of each Month September through June at 7 30 in Room 8123 Sheridan College 1430 Trafalgar Road Oakville Ontario A one hour tutorial proceeds each meeting The college is located approximately 1 0 km north of the on the west side All members and interested visitors are welcome ARTICLE SUBMISSIONS The majority of the con
41. tent of Ipso Facto is voluntarily submitted by club members While we assume no responsibility for errors nor for infringement upon copyright the Editorial staff verify article content as much as possible We can always use articles both hardware and software of any level or type relating directly to the 1802 or to micro computer components periferals products etc Please specify the equipment or support software upon which the article content applies Articles which are typed are prefered and usually printed first while handwritten articles require some work Please please send original not photocopy material We will return photocopies of original material if requested Photocopies usually will not reproduce clearly ADVERTISING POLICY ACE will accept advertising for commercial products for publication in Ipso Facto at the rate of 25 per quarter page per issue with the advertiser submitting camera ready copy 11 advertisements must be pre paid PUBLICATION POLICY The newsletter staff assume no responsibility for article errors nor for infringement upon copyright The content of all articles will be verified as much as poss ble and limitations listed ie Netronics Basic only Quest Monitor required requires 16K at 0000 3FFF etc newsletter staff wil attempt to publish Ipso Facto by the first week of Issue 25 Oct 81 26 Dec 81 27 Feb 82 28 Apr 82 29 Jun 82 and 30 Aug 82 Delays may be incurred as a result o
42. yy The address of the next byte in the object code will be the address of the last byte in the object code plus xx yy This isa SKIP instruction to the compiler 68 02 xx yy The low byte of the address of the next byte in the object code will be yy The high byte will be the high byte of the last byte plus xx 68 03 xx yy The address of the next byte in the object code will be xx yy This is an ORG instruction to to the compiler 02 68 11 j bytes The low byte of the address associated with the name will be inserted 68 23 3 bytes The high byte of the address associated with the name will be inserted 68 31 j bytes The high and low bytes of the address associated with the name will be inserted 68 4j j bytes preprocessor changes the source file as follows if the current object address is on the same page as the address of the name the 4j will be changed to 1j and the byte preceeding the 68 will be changed from xy to Oherwise the 4j will be changed to 3j and the byte preceeding the 68 will be changed to Cy 68 6j j bytes The name is associated with the address of the next byte of the object code The name is a statement label 68 7j j bytes hhll The name refers to address hhll This is an EQUATE instruction to the compiler The routine is used as follows It is assumed that your SyStem uses SCRT ssembler object code is put at 0100 0308 R8 should point to the low address end of a RAM are
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