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WS3 – Developing Drivers for Altera SoC

1. M memcpy msgdma IRQ K CR demo driver subsys O SDRAM 26 HARD 27 MEMORY CONTROLLER 28 29 65 2015 Altera Corporation Public JAN DTE RYA m demo devmem target demonstration F2H IRQ memcpy msgdma IRQ GES GES demo driver subsys O es RAM 1K F2H AXI 01 demo devmem d 03 MSGDMA reads from ROM Cortex A9 Cluster MEMORY CONTROLLER 66 2015 Altera Corporation Public JAN DTE RYA m demo devmem target demonstration 01 demo devmem d 03 MSGDMA writes to RAM 67 Cortex A9 Cluster wer CR demo driver subsys O MEMORY CONTROLLER 30 2015 Altera Corporation Public JAN DTE RYA m dev mem summary Using dev mem to mmap IO space into your user space application can be quick and convenient with little overhead mmap ing dev mem allows you to have peek and poke access into the IO space of your FPGA hardware mmap ing dev mem will NOT allow you have access to kernel space memory or any other user space memory outside your own application s memory mmap ing dev mem will NOT allow you to register an interrupt handler or interact with hardware interrupts in any Way 68 2015 Altera Corporation Public JAN DTE RYA ge Beginning device driver development 2015 Altera Corporation Public Some helpful pointers and documentation The Altera linux socfpga
2. Kerne demo module 09 c DMA Space static struct of device 1d demo driver dt 1ids 1 For this example we bind f i pie we compatible demo memcpy_msgdma with the memcpy_msgdma end of table device static int platform probe struct platform device pdev y d Cut Our probe function starts off acquire the probe lock pretty much the same CUC get our csr memory resource sa e doe ae reserve our csr memory region cH sas 1oremap our csr memory region Qe ei doe as initialize the DMA controller CUL a get our desc memory resource CU E uas 1oremap our desc memory region ml Eua 17 2015 Altera Corporation Public ANU S ON Kerne demo module 09 c DMA Space d pot eegen d We kmalloc a buffer for our if g kmalloc ptr 4k streaming driver and we pr_err kmalloc failed n allocate a coherent buffer for goto bad_ex1t_1ounmap_desc our coherent driver GFP_KERNEL J the_demo_dma_xx pdev_dev amp pdev dev coherent non cacheable be demo dma xx pdev dev g dma handle 4k GFP_KER if Cg coherent ptr Ak NULL pr err dma alloc coherent failed 4KB n goto bad exit kfree J g coherent ptr 1m fama aoc coherent Cthe_demo_dma xx pdev dev MA DEVICE BUFFER SIZE amp g dma handle 1m GER KERNEL if Cg coherent ptr 1m NULL pr err dma alloc coherent failed 1MB n goto
3. bad exit freeirg free irq Cg demo driver irq amp the platform driver bad exit 1ounmap 1ounmap Cg 10remap addr bad exit release mem region release mem region g demo driver base addr g demo driver size bad exit return upC amp g dev probe sem W 5 pr info platform probe bad exit n If we get an error during return ret val probe then we may need to remove the systs files we ve already created 2015 Altera Corporation Public JAN DTE RYA Kernel demo_module_06 c sysfs files Space static int platform_remove struct platform device pdev 1 ix aC Lu as the platform driver driver amp driver attr interval the platform driver driver driver attr irq delays stop our timer and disable our timer hardware interrupts 1owrite32 ALTERA AVALON TIMER CONTROL STOP MSK IOADDR ALTERA AVALON TIMER CONTROL g t1 mer base ensure there 1S no pending IRQ do 1 10 result 1oread32 IOADDR ALTERA AVALON TIMER STATUS g timer base 10 result amp ALTERA AVALON TIMER STATUS TO MSK while 10 result 0 free irq Cg demo driver irq amp the platform driver 1ounmap Cg 10remap addr release mem region g demo driver base addr g demo driver size if Cdown interruptible amp g dev probe sem Our release function return ERESTARTSYS needs to remove the systs una Fa o D files in addition to what it upC amp g dev probe sem already did pr info
4. exercise the sysfs entries cat sys bus platform drivers demo driver 11t target cat sys bus platform drivers demo_driver_11t increment cat sys bus platform drivers demo driver 11t 1increment cat sys bus platform drivers demo driver 11t 1increment cat sys bus platform drivers demo driver 11t 1ncrement cat sys bus platform drivers demo driver 11t decrement cat sys bus platform drivers demo driver 11t decrement cat sys bus platform drivers demo driver 11t complement cat sys bus platform drivers demo driver 11t 1increment cat sys bus platform drivers demo driver 11t 1increment cat sys bus platform drivers demo driver 11t 1increment cat sys bus platform drivers demo driver 11t decrement cat sys bus platform drivers demo driver 11t complement rmmod demo module 11 observe remove module fails rmmod demo module 11t remove module rmmod demo module 11 remove module oui 2015 Altera Corporation Public NOTE R A E Take Home Lab m 2015 Altera Corporation Public What You ll Need lt A supported development kit ALTERA AV SOC Altera ALTERA CV SOC Altera ARROW SOCKIT Arrow CHITICALLINK MITYSOM DEVKIT Critical Link DEO NANO SOC Terasic MACNICA HELIO 12 13 or 14 Macnica Ablank SD Card for your development kit Toinstall the workshop target environment that boots the above boards Communication cables Provides connectivity between host and target
5. 2 32 64 128 Port Sei 4 de 1 32 64 bit Port AXI 32 64 128 AXI 32 64 128 250MHz FPGA LOGIC 300 MHz 300 MHz PCle Gen 3 X 8 Controller Hard IP PCS amp FEC Interlaaken PCS 10G KR FEC PHY Notes 1 Integrated direct memory access DMA 2 Integrated ECC 2015 Altera Corporation Publi 3 DDR3 4 amp LP DDR3 SDRAM Support fo HPS Memory Ol 4251 High Level Block Diagram FPGA HPSto FPGA Configuration FPGA to HPS Control FPGA to SDRAM ARM Cortex A9MPCore HPS CPUO CPU1 ARM Cortex A9 ARM Cortex A9 NEON FPU NEON FPU 32 KB I 32 KB I 32 KB D 32 KB D ALL Multi port DDR L2 Cache 512 KB SDRAM Controller TMC Trace Debug Port Low Speed Peripherals Timers GPIO UART SPI I2C CAN 25 2015 Altera Corporation Public 26 Technology Processor Performance Total Power Dissipation Max PCI Express Hard IP Memory Devices oupported Max HPS DDR Data Width EMAC Cores NAND Device Supported SD MMC devices supported FPGA Logic Density Range LEs FPGA Core Performance 2015 Altera Corporation Public 28nm 925 MHz 100 Gen 2 x4 DDR2 DDR3 DDR3L LPDDR2 40 bit 32 bit ECC EMAC x 2 8 bit SD SDIO MMC 25 110K 260 MHZ 28nm 1 05 GHZ 100 Gen 2 x8 DDR2 DDR3 DDR3L LPDDR2 40 bit 32 bit ECC EMAC x 2 8 bit SD SDIO MMC 3 0 450K 307 MHz A Comparison Cyclone V SoC Arria V SoC Arria 10 SoC
6. 7 O 2015 Altera Corporation Public JAN DTE RYA e The Two Best Sources for Linux Development Information Linux Kernel Documentation he most complete and most essential Linux kernel documentation Included with the Linux kernel source code local GIT repo gt Documentation Documentation bash Konsole File Edit View Bookmarks Settings Help dj NO_HZ txt KWrite File Edit View Bookmarks Tools Settings Help NO_HZ Reducing Scheduling Clock Ticks This document describes Kconfig options and boot parameters that can reduce the number of scheduling clock interrupts thereby improving energy efficiency and reducing OS jitter Reducing OS jitter is important for some types of computationally intensive high performance computing HPC applications and for real time applications There are three main ways of managing scheduling clock interrupts also known as scheduling clock ticks or simply ticks l Never omit scheduling clock ticks CONFIG HZ PERIODIC y or CONFIG NO HZ n for older kernels You normally will not want to choose this option 8 2015 Altera Corporation Public The Two Best Sources for Linux Development Information An open source OS breeds open source information o bo boot time reduction x 3 C D https www google com search q embedded linux boot time reduction amp oq emb Google boot time reduction linux 0 No
7. Console UART USB gadget mass storage and networking Linux machine native or VM 4GByte RAM minimum Serial terminal application Putty minicom or similar for console UART communication with target 213 2015 Altera Corporation Public NOTE R A E Obtaining Lab Files and Instructions SoC SW workshop series getting started page http www rocketboards ora foswiki Projects So0CSWWorkshopSeriesGettingStarted WS3 lab instructions are posted to Rocketboards org http www rocketboards org foswiki Projects WS3DevelopingDriversForAlteraso GLinux RocketBoards org ou are here Projects WS3 Developing Drivers for Altera SoC Linux S Edit 4 Attach amp New lt lt More WS3 OU aes T DE ed PIRE This is the third of thre IOps iding a of the SoC Linux driver development concepts Last modified by ProFromDover on 01 Jun 2015 00 59 r26 Details State running Full description Ob card Image Locate WS3 Lab README Target Orientation 214 92015 Altera Corporation Public NOTE YA E What You Will Accomplish Configure your host development environment Build an example misc driver Build a test application for the misc driver Modify the uio pdrv genirq template and build it Build a test application for the UIO driver Load all of the above onto your dev kit target Run the test applications to verify proper driver functionali
8. Kernel Space 92 2015 Altera Corporation Public Kernel demo module 03 c platform driver Space include lt linux module h gt We create an array of include linux platform device h E cus uk of device id s where we specify static struct of device id demo driver dt ids 1 compatible strings that the i kernel will use to bind our driver to compatible demo driver 1 0 i Eu Y any devices represented in the end of table device tree when our module is inserted This will automatically MODULE DEVICE TABLECof demo driver dt ids trigger our driver probe if the device tree contains a compatible static struct platform driver the platform driver 1 device entry probe platform probe remove platform remove driver 1 We also define an instance for our name demo driver 3 platform driver Owner THIS MODULE Of match table demo driver dt ids Fe Shutdown unused Suspend unused resume unused 1d table unused 93 2015 Altera Corporation Public JAN DTE RYA Kernel demo module 03 c platform driver Space 01 static int platform probe struct platform device pdev 03 pr infoC platform probe entervn pr infoC platform probe exit n 05 return 0 N 6 08 static int platform remove struct platform device pdev 09 1 LO pr info platform remove enter Xn pr infoC platform remove exitin return
9. WS3 Developing Drivers for Altera SoC Introduction to writing linux device drivers for the Altera SoC FPGA 2015 Altera Corporation Public Altera SW SoC Workshop Series SW Workshop 1 Altera SoC SW Development Overview SW Workshop 2 Introduction to Linux on Altera SoC SW Workshop 3 Developing Drivers for Altera SoC Linux D 2015 Altera Corporation Public NB S RYAN 3 Agenda Essential Information Resources SoC Device Overview Developing Drivers Detailed agenda later Take Home Lab AN S A 2015 Altera Corporation Public Welcome Here s What You Can Expect Today Experienced Linux Developers New Linux Developers Find a familiar embedded Linux An exposure to the linux driver development flow model Standard linux device driver model The fundamental APIs that are Guide to SoCFPGA resources leveraged by most device drivers Essential Linux learning and documentation resources Hardware Developers Everyone HW handoff to Linux driver SoC FPGA architecture specific development flows information SW driver implications of HW SoC FPGA recommendations and architecture best practices 2015 Altera Corporation Public JAN DTE RYA ge Essential Information Resources Where to learn more a non exhaustive list 2015 Altera Corporation Public Linux Foundation Training Linux Developer cl
10. void demo driver map RAM OFST RAM SPAN void do fill ramCvoid demo driver map read STDIN_FILENO void demo driver map RAM OFST RAM SPAN j void do dma rom ram void memcpy msgdma map volatile unsigned long memcpy msgdma csr base memcpy msgdma map volatile unsigned long memcpy msgdma desc base memcpy msgdma map MEMCPY MSGDMA DESC PHYS OFST unsigned long temp make sure the DMA is not busy and the descriptor buffer is empty temp memcpy msgdma Cer base ALTERA MSGDMA CSR STATUS REG if temp amp ALTERA MSGDMA Cep BUSY MASK 0x00 error 0 O dma 1s busy before first use ex1t EXIT FAILURE if C temp ALTERA MSGDMA Cap DESCRIPTOR BUFFER EMPTY MASK 0x00 error O O dma descriptor buffer is not empty before first use ex1t EXIT FAILURE j 58 2015 Altera Corporation Public JAN DTE RYA e demo devmem c example Space void validate system features void E e Pr atn CUT s CLIE sa cs CU ta gt aC sas r CU ts as CU sas r CU ta as test to see that the demo driver device entry exists in the sysfs dirname DEMO_DRIVER_SYSFS_ENTRY_DIR We use the run time device tree dp opendir dirname models to validate the system if closedir dp 1 that we re running in before we start touching any hardware 7 test to see that the demo driver device entry exists in the procfs dirname DEM
11. Public GIT server Enables the SoC community to support Linux RocketBoards org 10 2015 Altera Corporation Public JAN DTE RYA e 11 RocketBoards org Resources GIT RocketBoards org Welcom to RocketBoards org GSRD and other Accelerate devel pment by exchanging ideas with the open source community Refe rence BT gn S Discover the rightYesources for your embedded solutions Use one of the a en community oriente development boards for the SoC targeted for people MEA 7 gt Te t i gt KA 8 e interested in exploriNg and prototyping their applications 5 Get started now RFI Registration amp Archives Starting point for documentation Projects s Community Getting started ia 9 T Altera SoC Development Board Register a Project D amp Mailing Lists Arrow SoCKit Evaluation Board Project Hosting d Git Web EBV SoCrates Evaluation Board List All Projects Register on RocketBoards or Macnica Helio SoC Evaluation Kit Search Projects What s new Embest Technology launches the Altera SoC based Lark Board Posted 01 Dec 2014 15 50 Linux Kernel and U Boot update Posted 04 Sep 2014 16 52 Altera joins The Linux Foundation Posted 09 Oct 2014 15 13 Triple Speed Ethernet with mSGDMA Linux Example Design is now available Posted 21 Jul 2014 01 43 New RGMII design update to latest Kernel v3 16 and U Boot update
12. remove the module Custom API 2015 Altera Corporation Public demo module 11 User Space demo module 11 demo increment demo decrement demo comp l ement Kernel Space 205 2015 Altera Corporation Public demo module 11t User Space SYSFS SYSFS SYSFS SYSES target increment decrement comp l ement demo module 11t demo module 11 vau demo_decrement demo complement Kernel Space 206 2015 Altera Corporation Public Kernel demo module 11 c Custom API Space void demo increment uint32 t target i target 1 demo 1ncrement void demo decrement uint32 t target i target 1 emo decrement void demo complement uint32 t target We simply export some entry points that become available target target in kernel space once our module is loaded emo complement Static int demo_init void i pr infoC demo init enter An pr infoC demo init exit n return 0 j static void demo exit voi1d i pr info demo exit enter n pr info demo exit exit n j 207 92015 Altera Corporation Public ANU S n YAN e 208 Kernel demo module 11t c Custom API Space Static int demo_init void i Culos sCUlss r CU u as CUT as aC sas e CU Ge os ret_val create ret_val ret_val ret_val ret_val return 0 This test module defines a number of
13. the uio info irq g demo driver irgq 159 2015 Altera Corporation Public NOTE R A E Kerne demo module 08 c uio device Space register the uio device sema init 153 ret val pdev gt dev amp the_uio_info if Cret_val pr warn Could not register device N demo_ulov goto bad exit 1ounmap Then we register our uio go platform probe flag 1 device upC amp g dev probe sem pr info C platform probe exit n return 0 bad exit 1ounmap 1ounmap Cg 10remap addr bad exit release mem region release mem region g demo driver base addr g demo driver size gt bad exit return upC amp g dev probe sem pr infoC platform probe bad_exit n return ret val 160 2015 Altera Corporation Public AN U S RYA D Kerne demo module 08 c uio device Space Jl static int platform remove struct platform device pdev Our remove function 03 Dr info platform remove enterin unregisters the uio device 1ounmap Cg 10remap addr release mem region g demo driver base addr g demo driver size if Cdown interruptible amp g dev probe sem return ERESTARTSYS g platform probe flag 0 upC amp g dev probe sem pr infoC platform remove exitin return 0 161 2015 Altera Corporation Public NOTE R A D demo module 08 c uio device 01 static struct uio info the uio info 2 name demo uio version 1 0 irq f
14. 0 E We define our probe and remove functions 94 O 2015 Altera Corporation Public JAN DTE RYA e Kernel demo_module_03 c platform driver Space Static int demo_init void 02 int ret val pr info demo init enter n ret val platform driver_register Gthe_p1 atform driver if Cret val pr err platform driver register returned d n ret val return ret val j pr info demo init exit n return 0 j static void demo exit void i pr info demo exit enter Xn platform driver_unregister the_platform driver pr infoC demo exit exit n j We register our platform driver in our module init function and we unregister our platform driver in our module exit function 95 2015 Altera Corporation Public JAN DTE RYA 96 demo module 03 ko target demonstration 1nsmod demo module 03 ko insert the module find sys name demo find sysfs entries ls 1 sys module demo module 03 drivers this 1s a link to the driver entry ls sys module demo module 03 this looks like the module we saw before ls sys bus platform drivers demo driver 3 this 1s a platform driver entry this links to the device entry ls 1 sys bus platform dr1ivers demo driver 3 ff230000 driver we can unbind the device echo ff230000 driver gt sys bus platform drivers demo driver 3 unbind ls sys bus platform drivers demo driver 3 and we see the result we can bind the device ec
15. 80 2015 Altera Corporation Public JAN DTE RYA 81 Kernel demo module 01t c a tainted module Space 1 diff u demo module 01 c demo module O1t c demo module O1t c demonstrates a demo module O01 c intel LL demo module Olt c tainted module simply by GG 34 8 34 10 GE commenting out the module init demo init MODULE LICENCE macro module exit demo exit C MODULE LICENSE GPL MODULE AUTHOR Driver Student One lt dso company com gt er Student Two lt dst organization org gt Demonstration Module 1 the most basic module example Demonstration Module 1t tainted module example 00 AN S A 2015 Altera Corporation Public Building the module Once we have the environment set up with pointers to the cross compiler tools and the kernel output directory and we ve created a Kbuild file and a Makefile for our project and we ve written our module source C file then all we need to do to build it is run make The output of a successful module build will be a ko file This is the file that we can copy over to our target and load as a module to run it on the target 82 2015 Altera Corporation Public JAN DTE RYA ge modinfo 1 modinfo demo module O1 ko filename version description author author license srcversion depends vermagic CUt demo module O1 ko 1 0 Demonstration Module 1 the
16. ALTERA AVALON TIMER STATUS TO MSK while Che status 0 manage potential race for spin lock with irq handler j write the new period value 1owrite32 new period IOADDR ALTERA AVALON TIMER PERIODLI CO timer base 1owrite32 new period gt gt 16 IOADDR ALTERA AVALON TIMER PERIODH g timer base initialize the MAX MIN variables g max irq delay 0 g min irq delay OxFFFFFFFF 144 2015 Altera Corporation Public NOTE R A E Kerne demo module 07 c misc device Space start the timer if new interval gt 0 10wr1te32 ALTERA AVALON TIMER CONTROL ITO MSK ALTERA AVALON TIMER CONTROL CONT MSK ALTERA AVALON TIMER CONTROL START MSK IOADDR ALTERA AVALON TIMER CONTROL g timer base release the 1rq lock spin unlock irqrestore amp g irq lock flags break Case IOC GET MAX DELAY acquire the irq lock spin lock irgqsave C amp g 1irq lock flags capture the shared data values max irq delay g max irq delay release the 1rq lock spin unlock irqrestore amp g irq lock flags if put user nax rq delay uint32 t arg lt 0 1 up amp dev gt sem pr info demo tmr dev 1octl put user exitvn return EFAULT J break Details of switch case GET MAX DELAY Uses put user instead of copy to user 145 9 2015 Altera Corporation Public NOTE YA D demo module 07 c misc device static const
17. MODULE PARM DESC param int array an array of int parameters Remember those MODULE macros that we saw before MODULE PARAM DESC will put these strings in the module which makes them visible to modinfo dumps 88 2015 Altera Corporation Public JAN DTE RYA Kernel demo module 02 c module parameters Space Static int demo_init void uin param byte param byte dxn param short param short uin param ushort param ushort d n param int param int u n param uint param uint X Idvn param long param long X luin param ulong param ulong An param charp pr info param int array count d n param int array count param int array 0 param int array 1 param int array 2 param int array 3 pr infoC demo init enter n pr info C An pr info param byte 0x 02X pr info param short 0x 04X pr infoC param ushort 0x 04X pr info param int 0x 08X pr info param uint 0x 08X pr infoC param long 0x 081 pr infoC param ulong 0x 081 pr 1nfo param bool dxn param bool pr info param charp s pr info C Xn pr infoC param int array 0 d n pr info param int array 1 d n pr 1info param int array 2 din pr info param int array 3 d n pr info Xn pr info C demo init exit n return 0 j This example simply dumps all the parameter values from it s init routine 89 20
18. addr Toremap o deno d river base addr g demo driver size if g_ioremap_addr NULL 1 pr err ioremap failed g demo driver base addrAn goto bad exit release mem region J g timer base g_ioremap_addr TIMER_OFST Now we can reserve our memory region and remap it into an IO pointer that our driver can use 108 2015 Altera Corporation Public AN U S RYA D Kerne demo module 05 c reserve memory register irq space initlal1 ipheral timer hardware 1o result oreadiACrOADOR ALTERA AVALON TIMER STATUS S timer base 1o result amp AVALON TIMER STATUS TO MSK ALTERA AVALON TIMER STATUS RUN MSK if Go result 0 pr err peripheral timer hardware incorrect initial state goto bad exit iounmap S clk rate 10 1 period 100ms OADDR ALTERA AVALON TIMER PERIODL g timer base period 100ms 16 IOADDR ALTERA AVALON TIMER PERIODH g timer base Now that we have an IO pointer we can initialize our timer hardware 109 2015 Altera Corporation Public NOTE R A E Kernel demo module 05 c reserve memory register irq space regist upt handler ret val Jii deno c river irq demo driver interrupt handler 0 the platform driver driver name amp the platform driver Now we can register our if ret val t a IRQ handler and start our pr err request irq failed hardwar goto bad exit iounmap timer har IWare
19. calling clk_get and then Ok get rate AN S A demo module 04 ko target demonstration 1 insmod demo module 03 ko insmod demo module 04 ko rmmod demo module 03 rmmod demo module 04 1nsmod demo module 04 ko rmmod demo module 04 insert the first module notice probe insert the second module no probe remove the first module remove the module insert the module notice probe printk remove the module dk CHE RH dt dk ls proc device tree ls proc device tree sopc 0 ls proc device tree sopc 0 bridge 0xc0000000 ls proc device tree sopc 0 br1dge 0xc0000000 driver 0x100030000 hexdump C proc device tree sopc 0 br1dge 0xc0000000 driver 0x100030000 compatible hexdump C proc device tree sopc40 br dge4d0xc0000000 dr ver40x100030000 name reg 0 7 br dge address 8 11 span hexdump C proc device tree sopc 0 br1dge 0xc0000000 driver 0x100030000 reg ranges 0 7 bridge address 8 11 processor address 12 15 span hexdump C proc device tree sopcQ0 br1dge0xc0000000 ranges interrupts 0 3 type 4 7 number 8 11 flags hexdump C proc device tree sopc 0 bridge 0xc0000000 driver 0x100030000 interrupts printf d n number convert the hex interrupt number to decimal expr number 32 add 32 to the interrupt number for actual GIC IRQ this 1s a phandle hexdump C proc device tree sopc 0 br1dge 0xc0000000 driver 0x100030000 1nterrupt parent Observe the output on the printk c
20. delay elapsed ticks statistics that are read out with the irq delays file clear the interrupt 10wr1te32 0 TOADDR_ALTERA_AVALON_TIMER_STATUS g_timer_base HANDLED 5 126 2015 Altera Corporation Public NOTE R A E demo module 06 ko target demonstration insmod demo module 06 ko insert the module find sys name demo find all sysfs entries ls sys bus platform drivers demo driver 6 view the sysfs files dump the sysfs files cat sys bus platform drivers demo driver 6 1nterval cat sys bus platform drivers demo driver 6 1rq delays run this about 5 times once per second to verify the 10 IRQ per second speed cat proc interrupts grep demo change the IRQ speed to 100 per second echo 100 gt sys bus platform dri1ivers demo driver 6 1interval run this about 5 times once per second to verify the 100 IRQ per second speed cat proc interrupts grep demo dump the sysfs files Use a calculator to compute the cat sys bus platform drivers demo driver 6 irq delays number of CPU clocks the IRQ cat sys bus platform drivers demo driver 6 interval response takes change the IRQ speed back to 10 per second echo 10 gt sys bus platform drivers demo driver 6 1interval run this about 5 times once per second to verify the 10 IRQ per second speed cat proc interrupts grep demo cat sys bus platform drivers demo driver 6 1nterval cat sys bus platform drivers
21. most basic module example Driver Student Two lt dst organization org gt Driver Student One lt dso company com gt GPL 53D0236960C81C1164COF6D 3 10 31 1tsi SMP mod unload ARMv7 p2v8 1 modinfo demo module Olt ko filename version description author author srcversion depends vermagic CUt demo module Olt ko 1 0 Demonstration Module 1t tainted module example Driver Student Two lt dst organization org gt Driver Student One dso company com 53C8A51D7CA7ED5FB6C7217 3 10 31 1tsi SMP mod unload ARMv7 p2v8 Once our module is built we can use modinfo to see what the MODULE macros defined about our module Notice the lack of a license property for the demo module O1t ko module 2015 Altera Corporation Public demo module 01 ko target demonstration cat proc sys kernel tainted smod cat proc modules insmod demo module OI ko cat proc sys kernel tainted smod insmod demo module Or ko cat proc sys kernel tainted smod cat proc modules find sys name demo ls sys module demo module 01 cat sys module demo module 0O1 taint cat sys module demo module Olt taint rmmod demo module Olt rmmod demo module 01 smod cat proc sys kernel tainted ls sys module tail var log messages THE dk dk CHE dk k dt E HH GE dk dk dk dk should be O untainted should be Not tainted this 1s what lsmod formats for you insert our module should
22. ne na C 7 4 J 7 90 Posted 29 Sep 2014 17 30 read on here O 2015 Altera Corporation Public News and U pd ates RocketBoards org Useful Links GSRD User Manual Getting Started Guides he best starting point for Linux development lt 2219 Linux Using Prebu ED Card Image Connecting to Board Web Server http www rocketboards org foswiki Documentation GSRD Connecting to Board Using SSH Running Sample Linux Applications Compiling the Hardware Design Generating and Compiling the Preloader Generating the Device Tree Compiling Angstrom Linux Distribution e Creating and Updating SD Card GSRD FPGA Programming FPGA Programming with Quartus Il Programmer Using System Console Angstrom Getting Started Device ree Generator User Guide http www rocketboards org foswiki Documentation GSRD141 Device TreeGenerator Programming FPGA from HPS http www rocketboards org foswiki Documentation GSRD131 Programming PGA 12 O 2015 Altera Corporation Public JAN DTE RYA e SoCFPGA Linux Code Repositories on GitHub Public git repos for SoCFPGA https github com altera opensource Migrated from RocketBoards us C 8 GitHub Inc US https github com altera opensource Rocketboards org git repos nO GitHub longer updated Explore Features Enterprise E Altera Opensource http rocketboards org Filters linux socfpga C 4 bi Linux development re
23. offset RAM SPAN read function just loff t next offset offset count IS e oun t implementing the opposite void ram ptr data flow CE if Cdown interruptible amp dev sem 1 pr info demo ram dev write sem interrupted exit n return ERESTARTSYS j dev gt wr1te_count if C offset gt max offset 1 up amp dev gt sem pr infoC demo ram dev write offset gt max offset exit n return EINVAL 1f C offset max offset 1 up amp dev gt sem pr infoC demo ram dev write offset max offset exit n return ENOSPC 139 2015 Altera Corporation Public NOTE R A E Kernel demo module 07 c misc device Space 1f next_offset gt max_offset count next offset max offset temp count count i ram ptr g 1oremap addr RAM OFST n our write we ram ptr offset copy from user and memcpy toio while Ctemp count gt 0 4 Py int this loop count IO BUF SIZE if Ctemp count lt IO BUF SIZE this loop count temp count if Ccopy_fron_user ev 10 buf user buffer this_loop_count 4 up amp dev gt sem pr info C demo ram dev write copy from user exit n return EFAULT HET Eran ptr amp dev gt 10_buf this loop count emp count this loop count user buffer this loop count ram ptr this loop count J dev write byte count count offset count up amp dev gt sem pr_info demo
24. param bool 1 We start by defining initialized global static char param charp i variables these are the default values module param param byte byte S IRUGO unless overridden when loaded module param param short short S IRUGO module param param ushort ushort S IRUGO l module param param int int S IRUGO Then this module param macro module param param uint uint S IRUGO informs the kernel that these variables module param param long long S IRUGO are parameters to the module module param param ulong ulong S IRUGO module param param bool bool S IRUGO o module param param charp charp S IRUGO Ps This is an array parameter example here static int param int array 1 2 3 4 y static unsigned int param int array count module param array param int array int amp param int array count S IRUGO 2015 Altera Corporation Public JAN DTE RYA Kerne demo module 02 c module parameters Space MODULE PARM DESC param byte a byte parameter MODULE PARM DESC param short a short parameter MODULE PARM DESC param ushort a ushort parameter MODULE PARM DESC param int a int parameter MODULE PARM DESC param uint a uint parameter MODULE PARM DESC param long a long parameter MODULE PARM DESC param ulong a ulong parameter MODULE PARM DESC param bool a bool parameter MODULE PARM DESC param charp a charp parameter
25. s primary embedded engineering center Austin provides access to one of the richest embedded processing talent bases in the world 20 O 2015 Altera Corporation Public Altera SoC Product Portfolio LOW END SoCs MID RANGE SoCs HIGH END SoCs Lowest Power Form Factor amp Cost High Performance with Low Power Form Factor amp Cost Highest Performance amp System Bandwidth LL O E Stratix 10 t Soc C 7 e 14nm Intel Tri Gate e 64 bit Quad ARM A53 MP Arria 2 10 Core T Soc Optimized for Max Performance per Watt O li e 20nm TSMC 4 KLE T Arria dt 4 5 GHz Dual ARM ONEK 2009 Soc Cortex A9 MPCore e 17G Transceivers e e 28nm TSMC e 1333 MHz DDR4 Cvclone V e 1 05 GHz Dual ARM Upto 660 KLE y SoC Cortex A9 MPCore Up to 3356 Multipliers t e 10G Transceivers 18x19 S 925 MHz Dual ARM Upto462KLE el Cortex A9 MPCore a Up to 2136 Multipliers a 5G Transceivers 18x19 g 400 MHz DDR3 O 25 to 110 KLE Up to 224 Multipliers 18x19 SS DEVICE AVAILABILITY Availability of SoC devices across product portfolio 24 O 2015 Altera Corporation Public JAN DTE RYA e ARM Public Processor Offering Stratix 10 Application Processor Cyclone V Arria V Arria 10 d Cortex R7 CORTEX R Tuer Cortex R4 CORTEX M E Real time control Cortex M1 Cortex MO Cortex MO Microcontroller SECURCORE SC100 SC300 Secure AAA O 201
26. struct file operations demo map dev fops 1 Owner THIS MODULE open demo map dev open release demo map dev release read demo map dev read mmap demo map dev mmap L static struct miscdevice demo map dev device minor MISC DYNAMIC MINOR name demo map fops amp demo map dev Tops 146 2015 Altera Corporation Public Kernel Space Our demo map device registers functions for open release read and mmap This allows user space to mmap our device similar to what we did in the dev mem example The read function allows us to emulate IRQ polling in much the same way as a UIO device does we ll demonstrate a UIO device later AN S A Kerne demo module 07 c misc device Space static ssize t demo map dev read struct file fp char user user buffer size t count loff t offset d struct demo map dev dev fp private data uint32 t cur irq cnt CUt if Cdown interruptible amp dev sem 1 pr infoC demo map dev read sem interrupted exit n return ERESTARTSYS j dev gt read_count if C offset 0 1 up amp dev gt sem pr_info demo_map_dev_read offset 0 exit n return EINVAL j if count 4 up amp dev gt sem pr infoC demo map dev read count 4 exit n return EINVAL j The demo map read function starts by validating the input arguments for the exact count requirements that we
27. temp count 10 buf rom ptr this loop count V apy ues hor amp dev 10 buf this loop count 1 upC amp dev sem pr info demo rom dev read copy to user exit n return EFAULT j didis scd temp count this loop count In this example we user buffer this loop count demonstrate rom ptr this loop count memcpy_fromio along with copy to user but in dev read byte count count fact on the Cortex A9 it offset count would be safe to simply p en use copy_to_user alone pr info demo rom dev read exit n That may not be the case SO ENCORE on all CPU architectures however 135 2015 Altera Corporation Public NOTE R A E 136 Kernel demo module 07 c misc device Space static loff t demo rom dev llseek struct file fp loff t offset int mode i 2015 Altera Corporation Public CUT struct demo rom dev dev fp private data loff t max offset ROM SPAN loff t next offset if Cdown interruptible amp dev sem 1 pr info C demo rom dev llseek sem interrupted exit n return ERESTARTSYS j Our demo rom llseek routine allows user space to seek within our ROM t space swit next offset offset k next offset fp f pos offset next offset max offset dev gt lseek_count break default up amp dev gt sem pr infoC demo rom dev llseek bad mode exit n return EINVAL ANOT
28. to j generate interrupts ret_val EBUSY ur timer and enable our timer hardware interrupts LTERA AVALON TIMER CONTROL ITO MSK ALTERA AVALON TIMER CONTROL CONT MSK ALTERA AVALON TIMER CONTROL START MSK IOADDR ALTERA AVALON TIMER CONTROL Co timer base 1o result OADDR ALTERA AVALON TIMER STATUS g timer base 1o result amp ALTERA AVALON TIMER STATUS RUN MSK if Go result 0 r timer and disable our timer hardware interrupts LTERA AVALON TIMER CONTROL STOP MSK IOADDR ALTERA AVALON TIMER CONTROL g timer base pr err peripheral timer hardware failed to start goto bad exit freeirq 110 2015 Altera Corporation Public NOTE YA E l l Kernel demo module 05 c reserve memory register irq space latform probe flag 1 2 g dev probe sem And we can clean things pr_info platform probe exitAn up and return from our a S probe function bad_ex1t irq _demo_driver_irg amp the_platform_driver Note the bad exit return AMA labels at the bottom of the function _demo_driver_base_addr g demo driver size Je an x This construct allows us to pr info platform probe bad_exit n unwind any allocations return ret val we ve made in the opposite order that we created them in bad exit You can also see that we release the semaphore with up 111 2015 Altera Corporation Public NOTE R A D l
29. 0 if copy from user g kmalloc ptr 4k next_io_buf_ofst user buffer this_loop_count 1 up amp dev gt sem pr info demo dma st write copy from user exit n return EFAULT 2015 Altera Corporation Public JAN DTE RYA 183 184 demo module 09 c DMA dma handle dma map single dev pdev dev g kmalloc ptr Ak ofst this loop count e OL pie dev dma handle J last_dma_handle_3 last dma handle 2 last dma handle 1 last dma handle O dma handle 1owr1ite32 dma handle g ioremap desc addr 1owrite32 ram ptr g ioremap desc addr 1owrite32 thi1s loop count g ioremap desc addr 1owr1te32 START_DMA_MASK g ioremap desc addr while get dma busyO 0 if wait event interruptible g 1irq wait queue cut C O 5 o as 28 HI Oc G cut Cut J 2015 Altera Corporation Public last_dma_handle_2 last_dma_handle_1 last_dma_handle_0 DMA Kernel Space DESC READ ADDRESS REG DESC WRITE ADDRESS REG DESC LENGTH REG DESC CONTROL REG get dma busy 0 1 Then it dma maps it to a dma handle before the AN S A Kerne demo module 09 c DMA Space ev pdev dev last this loop count ev pdev dev last this loop count ev gt pdev_dev last this loop count Then it dma unmaps the dma handle after the DMA if last if last ev gt pdev_dev
30. 15 Altera Corporation Public AN S A demo module 02 ko target demonstration insmod demo module 02 ko insert the module without parameters rmmod demo module 02 remove the module insmod demo module 02 ko param byte 0x12 param shortz0x3456 param ushort 0x789A param_1nt 0x3CDEFO12 param uint20x3456789A param long Ox3CDEF012 param ulongz0x3456789A param bool 2n param charp hello tim param int array 5000 6000 7000 insert the module with parameters P all A a PE A EA o E ls sys module demo module 02 notice the parameters directory ls sys module demo module 02 parameters notice the parameter files cat sys module demo module 02 parameters param bool cat sys module demo module 02 parameters param byte hexdump C cat sys module demo module 02 parameters param charp cat sys module demo module 02 parameters param int cat sys module demo module 02 parameters param int array cat sys module demo module 02 parameters param long printf Ox 08x n cat sys module demo module 02 parameters param long rmmod demo module 02 remove the module Observe the output on the printk console 90 2015 Altera Corporation Public JAN DTE RYA Platform drivers For more information Documentation driver model platform txt Documentation devicetree 2015 Altera Corporation Public demo module 03 User Space demo module 03 demo driver subsys O demo driver 1 0
31. 2b0000 FFT SUB DATA BASE Oxff2c0000 FFT SUB FFT STADAPTER O BASE Oxff2d0000 This is an example of the base addresses of the FPGA based Qsys peripherals from the perspective of the Cortex A9 processor NOTE this is a very small portion of the total contents of the header file macros 2015 Altera Corporation Public Creating System Header Files 1 grep Ns H BASE qsys_headers hps_0 h define define define define define define define define define define define define define define define define define define define define define define ONCHIP_MEMORY2_0_BASE 0x0 SYSID_QSYS_BASE 0x1000 INTR_CAPTURER_O_BASE 0x6000 VALIDATOR SUBSYS O BASE 0x10000 MEMCPY MSGDMA CSR BASE 0x20000 MEMCPY MSGDMA DESCRIPTOR SLAVE BASE 0x20020 DEMO DRIVER SUBSYS O0 BASE 0x30000 FIFO O IN CSR BASE 0x40000 FIFO 0 IN BASE 0x40020 FIFO O0 OUT BASE 0x40030 FIFO 1 IN CSR BASE 0x44000 FIFO 1l IN BASE 0x44020 FIFO L OUT BASE 0x44030 FIFO 2 IN CSR BASE 0x48000 FIFO 2 IN BASE 0x48020 FIFO 2 OUT BASE 0x48030 FFT SUB SGDMA TO FFT CSR BASE 0x80000 This is an example of the base addresses of the FPGA based Qsys peripherals from the perspective of the HPS AXI bridges Below is an example of the IRQ values from the same perspective NOTE this is a very small portion of the total contents of the header file macros FFT SUB SGDMA TO FFT DESCRIPTOR SLAVE BASE 0x90000 FFT SUB SG
32. 32 ALTERA AVALON TIMER CONTROL ITO MSK ALTERA AVALON TIMER CONTROL CONT MSK ALTERA AVALON TIMER CONTROL START MSK IOADDR ALTERA AVALON TIMER CONTROL CO timer base else stop our timer and disable our timer hardware interrupts 1owrite32 ALTERA AVALON TIMER CONTROL STOP MSK IOADDR ALTERA AVALON TIMER CONTROL Cg timer base ensure there 1s no pending IRQ do 1 1o result 10read32 IOADDR ALTERA AVALON TIMER STATUS g timer base 10 result amp ALTERA AVALON TIMER STATUS TO MSK while 10 result 0 j return 0 j A basic UIO driver would rely on user space code to perform this coordinated with a write to the driver 166 2015 Altera Corporation Public NOTE R A E demo module 08 ko target demonstration 1 1nsmod demo module 08 ko insert module find dev name ulo find the device node find sys name uio find sysfs entries ls sys class u10 u100 display uio contents ls sys class u1io u100 maps display maps entry ls sys class u1io u100 maps mapO display mapO entry cat sys class u1io u100 maps mapO0 dump the mapO entries run this block as one copy paste operation exec 7 dev uioO open dev uio0 for rd wr for I in 12 345 do dd bs 4 count 1 O amp 7 hexdump Cv read an IRQ event done dd 1f dev zero bs 4 count 1 gt amp 7 disable IRQs dd bs 4 count 1 O amp 7 hexdump Cv read an IRQ event the las
33. 5 Altera Corporation Public NOS RYA 28nm SoC System Architecture Hard Processor System HPS Processor Dual core ARM Cortex A9 MPCore processor ARM Cortex A9 ARM Cortex A9 NEON FPU NEON FPU Up to 5 250 MIPS 1050 MHz per core maximum L1 Cache L1 Cache NEON coprocessor with double precision FPU 32 KB 32 KB L1 caches per core 512 KB shared L2 cache sn Multiport SDRAM controller DDR3 DDR3L DDR2 LPDDR2 wwen Integrated ECC support High bandwidth on chip interfaces HMM ARKA SO I SdH gt 125 Gbps HPS to FPGA interface 125 Gbps FPGA to SDRAM interface jore pepe Cost and power optimized FPGA fabric M1OKmemory and Lowest power transceivers me Up to 1 600 GMACS 300 GFLOPS Up to 25Mb on chip RAM IHHHHHI hn Hard Multiport DDR Hard 3 5 6 More hard intellectual property IP PCle9 and SDRAM Controller 2 PCIe and 10 Gbps Transceivers memory controllers son asod ng 19435 YO dy Notes 1 Integrated direct memory access DMA 93 O 2015 Altera Corporation Public 2 Integrated ECC 24 ARM CORTEX A9 MP ARM CoreSight Multicore Debug Trace ARM Cortex A9 ARM Cortex A9 MP Core MP Core NEON SIMD FPU NEON SIMD FPU 32 KB 1 D w Parity 32 KB 1 D w Parity 512 KB L2 CACHE SHARED w ECC Accelerator Coherency Port 64 bit AXI Coherent Bus Interface onoop Control Unit
34. ACP 512K L2 CACHE demo driver subsys O SDRAM RAM 1K MEMORY INTERCONNECT ROM 1K F2H IRQ Core 1 M memcpy msgdma The demo driver subsys 0 peripheral is a custom Qsys component that presents one opaque slave interface to the system Internally it contains a RAM a ROM and an Interval Timer that can generate an interrupt 34 2015 Altera Corporation Public JAN DTE RYA e Driver Demonstration Hardware Cortex A9 Cluster F2H IRQ 32K I 32K D 32K I 32K DS 32k I 32K0 32KI 32k0 cH 512K L2 CACHE demo driver subsys O R RAM 1K HARD L3 MEMORY INTERCONNECT chic ROM 1K LWH2F AXI CONTROLLER INTERVAL TIMER IRQ There are three FIFO components that have a slave interface for writing data into the FIFO and another slave interface for reading data out of the FIFO In this block diagram the FIFO is represented with only one slave interface for simplicity 35 AN S A 2015 Altera Corporation Public Driver Demonstration Hardware M memcpy_msgdma py_msg IRQ demo driver subsys O RAM 1K Las CAE A INTERVAL Timer RG Cortex A9 Cluster 32K IS 32K DS The memcpy msgdma component can be used to DMA data thru the F2H AXI bridge which allows us to DMA data to from anywhere in the HPS core or peripherals attached to the LWH2F and H2F AXI bridges in the FPGA 2015 Altera Corpo
35. AVALON TIMER PERIODL CO t1 mer base raw periodh 10read32 IOADDR ALTERA AVALON TIMER PERIODH CO ti mer base i The interval sysfs file that calculate the current timer interval show function and raw status amp ALTERA AVALON TIMER STATUS RUN MSK store function so this file if raw status ii can be read and written t 0 d else 1 Meet from user space This period raw periodl amp 0x0000FFFF show function allows us to CCraw periodh lt lt 16 OxFFFF0000 read the current timer IRQ period 1 l interval g demo driver clk rate period interval j Note the use of spinlocks return senprintf buf PAGE SIZE irq interval u per second n interval j 1292 92015 Altera Corporation Public NOTE R A E l Kernel demo module 06 c sysfs files Space static ssize t interval store struct device driver driver const char buf size t count 1 CUT conve Input string to the requested new interval value result buf 0 amp new interval if reste This is the interval store return EINVAL function lt allows us to range check the requested new interval value change the IRQ interval of if new interval 100 the timer hardware return EINVAL calculate the new period value Note the use of spinlocks 1f new interval 0 new period g demo driver clk rate new interval 1 else new period g demo driver cl
36. C Hardware Documentation Resources Hard Processor System Technical Reference Manuals Available in Device Handbooks https www altera com products soc portfolio cyclone v soc support html https www altera com products soc portfolio arria v soc support html https www altera com products soc portfolio arria 10 soc support htm Contain Functional Descriptions Peripheral Contain Control Register Address Map and Definitions These are also available online at the links above in HTML and PDF formats HPS SoC Boot Guide Cyclone V SoC amp Arria V SoC AN709 HPS SoC Boot Guide Arria 10 SoC included in HPS TRM in Arria 10 Device Handbook ARM Documentation Site Documentation available for all ARM IP Cortex A9 amp A53 MP Cores FPU NEON GIC ARM Peripherals etc Requires free registration Refer to HPS TRM for IP core names and revision information http infocenter arm com help index sp 16 2015 Altera Corporation Public JAN DTE RYA ge Essential SoC Software Documentation Resources Altera SoC Embedded Design Software SoC EDS Tools User Guide Linux amp Baremetal Software Development Tools Overview HPS Preloader User Guide HPS Flash Programmer User Guide SD Card Boot Utility Getting Started Guides Preloader Linux Bare Metal Debug HW Library http www alterawiki com wiki SoCEDSGettingStarted SoC HPS Release Notes SoC Abstra
37. C platform remove exit n return 0 120 2015 Altera Corporation Public NOTE R A E l Kernel demo module 06 c sysfs files Space static ssize t irq delays show struct device driver driver char buf unsigned long flags The irq delays sysfs file uint32 t max irgq delay eech ieri aia ing delay that we create registers a show function so this file a i ra lock m can be read from user icd s rq_lock flags space This file allows us capture the shared data values to read the max and min max irq delay g max irq delay IRQ delay stats stored by min irq delay g min irq delay the IRQ handler d S perge E rq lock flags Note the use of spinlocks if max irq del gt return buf PAGE SIZE no IRQ delays yet n retu rn senprintf buf PAGE SIZE max 0x 08X u n min 0x 08X u n max_1rq_delay max irq delay min irq delay min i1irq delay Note the DRIVER ATTR DRIVER ATTRCi rq delays S IRUGO irq delays show NULL macro registering show function only AN S A 191 2015 Altera Corporation Public Kernel demo module 06 c sysfs files Space static ssize t interval show struct device driver driver char buf CUT irq lock g irq lock flags capture the relevant hardware registers raw status 1oread32 IOADDR ALTERA AVALON TIMER STATUS g timer base raw periodl 10read32 IOADDR ALTERA
38. DMA FROM FFT CSR BASE 0xa0000 FFT SUB SGDMA FROM FFT DESCRIPTOR SLAVE BASE 0xb0000 FFT SUB DATA BASE 0xc0000 FFT SUB FFT STADAPTER D BASE 0xd0000 1 grep rRQ 0 qsys_headers hps_0 h define define define define MEMCPY MSGDMA CSR IRQ DEMO DRIVER SUBSYS O0 IRQ 8 FFT SUB SGDMA TO FFT CSR IRQ 4 EET SUB SGDMA FROM FFT CSR IRQ 3 2015 Altera Corporation Public 46 Creating Device Trees 1 sopc2dts help sopc2dts 14 1 f3b984376d464370083edffbe85dd18a2bb42a80 Usage sopc2dts arguments Required Arguments 1nput sopcinfo file gt The sopcinfo file Coptional in gui mode Required 1 sopcinfo file Short for input Optional Arguments board boardinfo file board description file can be used multiple times Optiona bridge ranges lt none bridge child gt what to describe in bridges address translations Op bridge removal lt all balanced none gt Bridge removal strategy Optional help Show this usage info and exit Optional verbose Show Lots of debugging info Optional gui Run in gui mode Optional clocks Show clocks in Device Tree Source graph Optional conduits Show conduit interfaces in graph Optional version Show version information and exit Optional mimic sopc create header files Try to mis behave like sopc create header f no timestamp Don t add a timestamp to generated files Optional output filename The output
39. E RYA Kerne demo module 07 c misc device Space 01 if next offset lt 0 1 02 up amp dev gt sem 03 pr info demo rom dev llseek negative offset exit n 04 return EINVAL 05 0 1f next_offset gt max offset 08 next offset max offset 10 fp f pos next offset up amp dev gt sem pr 1nfo demo rom dev llseek exit n 4 return next_offset 137 2015 Altera Corporation Public ANU amp RYA e Kernel demo module 07 c misc device Space static const struct file operations demo ram dev fops 1 Our demo ram device Owner THIS MODULE isters gt writ functi Open demo ram dev open regis ers a write Tunc lon release demo ram dev release in addition to the functions read demo ram dev read that our demo rom device write demo ram dev write istered This allow Ilseek demo ram dev llseek registered Isa OWS 15 user space to write and read our RAM hardware Static struct miscdevice demo ram dev device 1 minor MISC DYNAMIC MINOR name demo ram fops amp demo ram dev fops 138 2015 Altera Corporation Public ANU amp RYA e Kerne demo module 07 c misc device Space static ssize t demo ram dev write struct file fp const char user user buffer size t count loff t offset f Our demo ram write struct demo ram dev dev fp private data function is similar to the loff t max
40. Files to Software Environment sopcinfo hps 1sw handoff hps ew handoff soc system hps 0 sequencer defines h sequencer c sequencer auto inst init c sequencer_auto h sequencer_auto_ac_init c soc_system_hps_0 h1of 2015 Altera Corporation Public The SOPCINFO file is created by Qsys during system generation This database can be used to create system header files and device trees for the software environment The sopc create header files utility can generate a variety of header file and macro file formats and the sopc2dts utility can create device trees representing the Qsys system 41 Hardware Handoff Files to Software Environment 1s r sopcinfo hps isw handoff SOC System sopcinfo hps ew handoff soc system hps 0 tclrpt h tclrpt c system h soc system hps O h1of sequencer h 2015 Altera Corporation Public sequencer defines h sequencer c sequencer auto inst init c sequencer_auto h sequencer_auto_ac_init c sdram 1o h 1d hps xml emi f xml alt types h The hps isw handoff directory is created by Quartus during compilation and contains information about the HPS configuration from Qsys and Quartus This collection of files is used by the BSP generator to create a customized preloader for the HPS core to run at boot time to configure the HPS core as defined by Qsys and Quartus 42 2015 Altera Corporation Public Creating System H
41. Kernel demo module 05 c reserve memory register irq space 01 1rqreturn t demo driver interrupt handler int 1rq void dev 1d vin 02 i1 03 i he interrupt 04 IOADDR ALTERA AVALON TIMER STATUS g timer base 06 return IRQ HANDLED TOW 07 3 This is what our IRQ 08 handler looks like 112 02015 Altera Corporation Public NOTE R A D Kerne demo module 05 c reserve memory register irq space static int platform remove struct platform device pdev d uint32 t 10 result pr info platform remove enter n stop our timer and disable our timer hardware interrupts 10wr1te32 ALTERA AVALON TIMER CONTROL STOP MSK IOADDR ALTERA AVALON TIMER CONTROL CO timer base ensure there 1S no pending IRQ do 1 1o result 1oread32 IOADDR ALTERA AVALON TIMER STATUS g timer base 10 result amp ALTERA AVALON TIMER STATUS TO MSK while 10 result 0 demo driver irq amp the platform driver dr demo driver base addr g demo driver size if down interruptible ao dev probe sem Our release function FO Pistas simply releases all the latform probe flag 0 resources that we Bl dev probe sem allocated in probe and it pr info C platform remove exit n shuts down our timer return 0 hardware j 2015 Altera Corporation Public JAN DTE RYA 113 114 demo module 05 ko target demonstration demo devmem s insm
42. O DRIVER PROCFS ENTRY DIR dp opendir dirname if closedir dp fetch the clocks value out of our device entry filename DEMO_DRIVER_CLOCKS_ENTRY fd open filename O_RDONLY result read fd clocks array 4 if close fd 1 59 2015 Altera Corporation Public JAN DTE RYA 60 demo devmem h example expected values for the physical base address and clock frequency of the demo define define define define define define driver hardware DEMO DRIVER PHYS BASE 0xFF230000 DEMO DRIVER SYSFS ENTRY DIR sys bus platform devices ff230000 driver DEMO DRIVER PROCFS ENTRY DIR proc device tree sopc 0 bridge 0xc0000000 driver 0x10 DEMO DRIVER FREQ 50000000 DEMO DRIVER CLOCKS ENTRY proc device tree sopc 0 bridge 0xc0000000 cut clocks H2F_USER1_CLOCK_PHANDLE_ENTRY proc device tree clocks clk 0 l1nux phandle expected values for the physical base addresses of the memcpy msgdma core define define define define define MEMCPY MSGDMA CSR PHYS BASE OxFF220000 MEMCPY MSGDMA DESC PHYS BASE OxFF220020 MEMCPY MSGDMA DESC PHYS OFST MEMCPY MSGDMA DESC PHYS BASE MEMCPY MSGDMA CSR PHYS MEMCPY MSGDMA REG NAMES ENTRY proc device tree sopc 0 br1dge 0xc0000000 msgdma 0x1 MEMCPY MSGDMA REG NAMES VALUE 0x63 0x73 0x72 0x00 0x64 0x65 0x73 0x63 0x72 Ox6f 0x72 Ox5f 0x73 Ox6c 0x61 0x76 0
43. ON TIMER CONTROL CO t1 mer base x 1 Se g return count irq lock flags DRIVER ATTRCinterval S IWUGO S IRUGO interval show interval store The end of our store function Note the use of spinlocks Note the DRIVER ATTR macro registering a show and store function 125 2015 Altera Corporation Public ANU amp RYA e l Kernel demo module 06 c sysfs files Space Our IRQ handler gets a 1irqreturn t demo driver interrupt handler int irq void dev 1d f little more complicated in Cut this example get the current timer value Note the use of spinlocks 1owrite32 0 IOADDR ALTERA AVALON TIMER SNAPL g timer base raw snapl 1oread32 IOADDR ALTERA AVALON TIMER SNAPL CO timer base raw snaph 1oread32 IOADDR ALTERA AVALON TIMER SNAPH g timer base Snap raw snapl OxOOOOFFFF Craw_snaph lt lt 16 OxFFFFOOOO get the current period value raw periodl 1oread32 IOADDR ALTERA AVALON TIMER PERIODL g timer base raw periodh 1oread32 IOADDR ALTERA AVALON TIMER PERIODH g timer base period raw periodl OxOOOOFFFF CCraw periodh lt lt 16 OxFFFFOOOO calculate response delay and update MAX MIN variables elapsed ticks period snap if Celapsed ticks gt g max irq delay This handler saves off g_max_1 rq del ay elapsed ticks some performance if Celapsed ticks lt g min irq delay g min irq
44. _demo_tmr_fd exit EXIT SUCCESS 152 2015 Altera Corporation Public NOTE R A E 153 e User ioctl test c Space void do get interval int dev demo tmr fd 1 Here are the get and set interval int result functions unsigned long interval result dev demo tmr fd IOC GET INTERVAL amp interval if result error 1 errno s d ioctl failed __FILE__ LINE J printf current IRQ interval is lu interrupts per second n interval void do set interval int dev demo tmr fd 4 int result result dev demo tmr fd IOC SET INTERVAL amp g new interval if result d error 1 errno s d ioctl failed FILE LINE printf IRQ interval set to lu interrupts per second n g new interval 2015 Altera Corporation Public JAN DTE RYA e User ioctl test c Space void do get max delay Cint dev demo tmr fd 1 Here are the get max and min delay int result functions unsigned long delay result dev demo tmr fd IOC GET MAX DELAY amp delay 1f result error 1 errno s d ioctl failed __FILE__ __LINE__ printf Maximum IRQ service delay 1s lu t cks n delay void do get min delay int dev demo tmr fd int result unsigned long delay result dev demo tmr fd IOC GET MIN DELAY amp delay if result error 1 errno s d ioctl failed __FILE__ LINE printf Minimum IRQ service delay 1s lu t cks n d
45. _ram_dev_write exitXn return count 140 2015 Altera Corporation Public NOTE R A E Kernel demo_module_07 c misc device Space Ji static const struct file operations demo tmr dev Tops 1 Our demo tmr device 07 Owner THIS MODULE isters leas open demo tmr dev open regis ers an open release release demo_tmr_dev_release and ioctl function This 05 unlocked ioctl demo tmr dev ioctl allows user space to GH interact with our timer 08 static struct miscdevice demo tmr dev device 1 hardware minor MISC_DYNAMIC_MINOR name demo tmr fops amp demo_tmr_dev_fops 141 2015 Altera Corporation Public NOTE R A D Kerne demo module 07 c misc device Space static long 02 demo tmr dev ioctl struct file fp unsigned int cmd unsigned long arg i x xc Laus if Cdown_interruptible amp dev gt sem 1 pr infoC demo tmr dev ioctl l sem interrupted exit n return ERESTARTSYS edat RES Our ioctl boils down to a switch statement switch cmd Case IOC SET INTERVAL DEN o Eh SE Case IOC GET INTERVAL sal basis Case IOC GET MAX DELAY wa oi E s us Case IOC GET MIN DELAY sal basis default up amp dev gt sem pr_info demo_tmr_dev_1octl bad cmd exitin return EINVAL j up amp dev gt sem pr infoC demo tmr dev 1ioctl exit n return O0 O 2015 Altera Corporation Public NOTE R A E Kernel demo module 07 c misc
46. ace static const struct file operations demo dma st fops Owner THIS MODULE read demo dma st read Our streaming and coherent write demo oma st write drivers register the same Ilseek demo dma xx llseek i Se P functions the llseek is actually the same function static struct miscdevice demo dma st device 1 for both implementations minor MISC DYNAMIC MINOR name demo_dma_st fops amp demo dma st Tops L static const struct file operations demo dma co Tops Owner THIS MODULE read demo dma co read write demo Oma co write Ilseek demo dma xx llseek I static struct miscdevice demo dma co device minor MISC DYNAMIC MINOR name demo_dma_co fops amp demo_dma_co_fops 2015 Altera Corporation Public JAN DTE RYA 176 Kernel demo module 09 c DMA Space static ssize t demo dma co read struct file fp char user user buffer size t count loff t offset x CUT EE ram ptr g dma handle 1m ram ptr offset e c ct 1lowrite32 ram ptr g ioremap desc addr DESC READ ADDRESS REG 1owrite32 g dma handle Ak next dma io buf ofst g ioremap desc addr DESC WRITE ADDRESS REG 1owrite32 this loop count g 1ioremap desc addr DESC LENGTH REG 1owrite32 START DMA MASK g ioremap desc addr DESC CONTROL REG descriptor configuration temp dma count this loop count ram ptr this loop c
47. ample refers to functions and objects provided by the kernel or 08 standard system calls there is a yellow highlight behind the red text 53 2015 Altera Corporation Public JAN DTE RYA demo devmem c example int main int argc char argv 1 vs CUE rs ra CU ta as int devmem fd void demo driver map void memcpy msgdma map int result validate the system features validate system features User Space In the demo devmem c example that is provided with this workshop we can see how our user space application starts off The first few things that it does is attempt to validate its environment verify that DEMO DRIVER PHYS BASE is page aligned if DEMO DRIVER PHYS BASE amp sysconf SC PAGE SIZE 1 j verify that MEMCPY MSGDMA CSR PHYS BASE is page aligned i f MEMCPY_MSGDMA_CSR_PHYS_BASE 8 sysconf _SC_PAGE_SIZE 1 1 J parse the command line arguments parse cmdline Cargc argv 2015 Altera Corporation Public User demo devmem c example Space open the dev mem device Then we open dev mem and Em fg e py enen O RDWR 0 SYNC we mmap the base addresses cut to our demo driver hardware j and our memcpy_msgdma hardware mmapO the base of our demo driver hardware 44 demo driver map mmap NULL sysconf SC PAGE SIZE PROT READ PROT WRITE MAP SHARED devmem
48. andler int irq void dev 1d F The IRQ handler for this spin lock C amp g irq lock CUt example is similar to sake up intertuptiblec 2 e before with the addition g_1rq_wa1t_queue return TRO gt of the wake up event signal which is what the read function will ultimately pend on 149 2015 Altera Corporation Public NOTE R A E Kernel demo module 07 c misc device Space static int demo map dev mmap struct file fp struct vm area struct vma DE struct demo map dev dev fp private data The demo map mmap if down interruptible amp dev sem function maps our IO return ERESTARTSYS region into a user space dev gt mmap_count sate pointer as noncached memory if vma vm end vma gt vm_start PAGE SIZE up amp dev gt sem return EINVAL j vma vm page prot pgprot noncached vma vn page prot vma vm pgoff g demo driver base addr PAGE SHIFT if Cremap pfn range vma vma vm start vma vm pgoff PAGE SIZE vma vm page prot up 4dev gt sem return EAGAIN j up amp dev gt sem pr infoC demo map dev mnap exit n return 0 j 150 2015 Altera Corporation Public NOTE R A E User demo map test c Space int main int argc char argv i We provide a test application to drive adc 1 the mmap functionality of our parse the command line arguments demo map driver This looks basically the same as our dev m
49. ap miscdevice structure Struct file private data struct ler pos SEEK SET SEEK CUR SEEK END joctl from user space 30 2015 Altera Corporation Public JAN DTE RYA Developing Drivers Agenda 4 of 4 Demonstration Module 8 introduce uio device uio info structure uio register device uio unregister device down trylock Demonstration Module 9 introduce dma kmalloc dma alloc coherent dma map single dma unmap single dma mapping error Demonstration Module 10 multiple device instances NIT LIST HEADY kzalloc list add platform set drvdata iminor list for each list entry struct file f flags Demonstration Module 11 introduce custom API EXPORT SYMBOL Demonstration Module 11t test custom API 31 2015 Altera Corporation Public JAN DTE RYA e Our demonstration hardware environment for the workshop 2015 Altera Corporation Public Driver Demonstration Hardware Cortex A9 Cluster F2H IRQ M memcpy msgdma py msg IRQ demo driver subsys 0 RAM 1K INTERCONNECT AA This is a very simplified block diagram of the Altera HPS and FPGA system that is used to demonstrate the concepts described in this workshop Please see the Qsys system for more detail 33 2015 Altera Corporation Public JAN DTE RYA m Driver Demonstration Hardware Cortex A9 Cluster
50. as it should clearly specify what rights anyone else has to use this code and what obligations they assume if they do The demonstration modules provided in this workshop all carry the GPLv2 license shown above For more information on open source software licenses please see http opensource org licenses 2015 Altera Corporation Public JAN DTE RYA 77 78 Kernel demo module 01 c the most basic module Space finclude lt linux module h gt Every module has an init and an exit ex ni Sd function There are some macros that you could invoke if you just pr_info demo_init enterAn want some rather standard pr info demo init exit n ae D boilerplate init and exit functionality but every module will have an init l and exit entry point static void demo_ex1t void 1 pr infoC demo exit enter n pr info demo exit exit n j module init demo init module exit demo exit MODULE LICENSE GPL MODULE AUTHOR Driver Student One lt dso company com gt MODULE AUTHOR Driver Student Two lt dst organization org gt MODULE_DESCRIPTION Demonstration Module 1 the most basic module example MODULE VERSION 1 0 2015 Altera Corporation Public JAN DTE RYA demo module 01 c the most basic module Space include lt linux module h gt static int demo 1init void pr infoC demo init enter n pr infoC demo init exit n return 0 j static void demo
51. asses are designed to help participants Learn how to develop an embedded Linux product Become familiar with and learn to write device drivers Get practical experience with the Linux kernel Learn how to work with the Linux developer community Developer Courses e LFD331 Developing Linux Device Drivers e FD405 Building Embedded Linux with the Yocto Project e LFD411 Embedded Linux Development e LFD414 Introduction to Embedded Android Development e LFD205 How to Participate with the Linux Community e LFD211 Introduction to Linux for Developers e LFD262 Developing with Git e FD312 Developing Applications for Linux e LFD320 Linux Kernel Internals amp Debugging e LFD415 Inside Android An Intro to Android Internals e LF D432 Optimizing Linux Device Drivers for Power Efficiency htto training linuxfoundation org linux courses development training i PN S LI LINUX FOUNDATION Linux Documentation Resources GIT Distributed revision control system to enable distributed collaboration On line documentation amp training hitp git scm com doc https training github com Denx U Boot Manual Complete documentation from the folks who wrote Das U Boot hito www denx de wiki U Boot Documentation Free Electrons Complete training materials posted free lt hitp free electrons com docs Device Tree for Dummies
52. atform drivers demo driver 7 1rq delays 1loctl test x THE dk dk cHE dk k Gk k dt GE Gh Observe the output on the printk ioctl test n console rmmod demo module 07 2015 Altera Corporation Public JAN DTE RYA m 155 UIO device User Space I O 56 2015 Altera Corporation Public 157 UIO templates in the kernel source tree socfpga 3 10 1tsi find drivers uio name c drivers u10 u10 c drivers u10 u10_netx c drivers u10 u10_sercos3 c drivers u10 u10_cif c drivers u10o uio pdrv c drivers uio uio dmem genirq c drivers uio uio pruss c drivers u1io uio pdrv genirq c drivers u10 u10_aec c drivers uio uio pci generic c Its worth noting that there are some useful templates in the kernel source tree for simple platform driver implementations driven by a device tree entry these can be easily modified to provide basic functionality by simply adding a compatibility string to them The fundamental concept of a UIO driver is that it simply exposes the raw hardware registers to user space and does nothing within kernel space to really control any of the hardware details Our UIO example does not use the UIO framework in that basic way instead it builds on the framework that we started with in the previous demonstration modules such that our kernel space code does interact more directly with the hardware in certain situations We just plug that functionality into the framework that is defined b
53. bad exit dma free coherent 4k Then we allocate a coherent buffer for our 1M file emulation buffer 172 2015 Altera Corporation Public NOTE R A E Kerne demo module 09 c DMA Space register our interrupt handler Then we register a couple init waitqueue head amp g rg wait queue ii ii misc devices a coherent enable the DMA global IRQ mask and streaming driver CUt register misc device demo dma co sema ini1t amp the demo dma xx sem 1 ret val misc register amp demo dma co device if Cret val 0 pr warn Could not register device N demo_dma_cov goto bad exit freeirgq j register misc device demo dma st ret val misc register amp demo dma st device if Cret val 0 pr_warn Could not register device demo_dma_st goto bad exit deregister demo dma co CUE ss 173 2015 Altera Corporation Public NOTE R A E Kerne demo module 09 c DMA Space 01 1rqreturn t demo driver interrupt handler int irq void dev 1d 02 1 le 1 03 spin lock amp g irq locl This is our IRQ handler clear the IRQ state 10wr1te32 ALTERA MSGDMA CSR IRQ SET MASK g_1oremap_csr_addr CSR STATUS REG spin unlock amp g 1rq lock LO wake up 1nterruptible amp g rg wait queue 11 return IRO_HANDLED 174 2015 Altera Corporation Public ANU amp RYA e 175 Kerne demo module 09 c DMA Sp
54. be remove driver platform driver register platform driver unregister manually binding unbinding from user space Demonstration Module 4 extract hardware details from DT platform get resource platform get irq clk get clk get rate manually validating device tree information from procfs Demonstration Module 5 reserve memory and enable IRQ down interruptible up request mem region release mem region ioremap iounmap request irq free irq resource size loread32 iowrite32 basic interrupt handler 29 O 2015 Altera Corporation Public JAN DTE RYA e Developing Drivers Agenda 3 of 4 Demonstration Module 5t test memory reservation and IRQ resource contention demonstration Demonstration Module 6 introduce sysfs entries driver create file driver remove file DRIVER ATTR spin lock irqsave spin lock irqrestore spin lock spin unlock scnprintf kstrtoul interrupt handler sysfs show store functions manual interaction with sysfs entries from user space Demonstration Module 7 introduce misc device sema init misc register misc deregister memcpy fromio memcpy toio copy from user copy to user get user put user wait event interruptible wake up interruptible pgprot noncached remap pfn range file operations structure lt open release read write Ilseek unlocked ioctl mm
55. be 4096 GPL out of tree should be Tainted G insert our tainted module should be 4097 proprietary oot should be Tainted P our modules appear PO and 0 find our modules in sysfs see what the directory contains should be O GPL out of tree should be PO propprietary oot remove our modules still tainted still tainted these are all the modules in tree the printk messages from console If you re target has not been freshly booted you re kernel may already be tainted l so consider rebooting the target to start with a fresh untainted environment 84 2015 Altera Corporation Public Module parameters For more information include linux moduleparam h 2015 Altera Corporation Public demo module 02 User Space parameters demo module 02 Kernel Space 86 2015 Altera Corporation Public Kerne demo module 02 c module parameters Space define module parameters We can define parameters for our static unsigned char param byte OxFF static short param short OxFFFF module which allows us to pass In static unsigned short param ushort OxFFFF command line arguments to override sd HIE parem rne coupe SEE these default values at runtime when static unsigned int param uint OxFFFFFFFF i d didus ik static long param long OxFFFFFFFF we insmod or modprobe the module static unsigned long param ulong OxFFFFFFFF static bool
56. ction Layer SoCAL API Reference X lt SoC EDS install dir gt ip altera hps altera_hps doc socal html index html Hardware Manager API Reference X lt SoC EDS install dir gt ip altera hps altera_hps doc hwmgr html index html GCC Documentation X lt SoC EDS install dir gt ds 5 documents gcc getting_started html Bare Metal Compiler lt SoC EDS installation directory gt host_tools mentor gnu arm baremetal share doc sourceryg arm altera eabi 17 2015 Altera Corporation Public JAN DTE RYA ge Essential SoC Software Tools Online Videos ARM DS 5 Altera Edition Toolchain https youtu be HV6NHr6gLx0 DS 5 Altera Edition Bare metal Debug and Trace https youtu be u xKybPhcHlI DS 5 Altera Edition FPGA adaptive Linux Kernel Debug and Trace https youtu be IrR SfVZd18 Debugging Linux applications on the Altera SoC with ARM DS 5 https youtu be ZcGGEjkYWOc FPGA adaptive debug on the Altera SoC using ARM DS 5 https youtu be 2NBcUv2 I xbl Streamline Profiling on Altera SoC FPGA Part 1 Setup https youtu be X k9ImXQ Tio Streamline Profiling on Altera SoC FPGA Part 2 Running Streamline https youtu be Tzbd7gldKgY 18 2015 Altera Corporation Public JAN DTE RYA ge SoC Device Overview 2015 Altera Corporation Public Altera Investment in Embedded Technologies Altera established Austin Technology Center ATO in 2011 Altera
57. demo driver 6 1rq delays rmmod demo module Op 127 2015 Altera Corporation Public NOTE R A E Misc device For more information Documentation ioctl ioctl decoding txt Documentation ioctl ioctl number txt 2015 Altera Corporation Public demo module 07 User Space demo map test 1loctl test SY SES SYSFS DEV 1rq_delays interval demo_rom demo_ram demo_tmr demo_module_07 demo driver 7 1oremap demo_driver_subsys_0 demo driver 1 0 Kernel Space 129 2015 Altera Corporation Public demo module 07 c misc device static int platform probe struct platform device pdev i xc register misc device dev rom 1 demo rom dev device CUL us dev ram dev sem 1 vV demo ram dev device if rer v se CU dev tmr ev sem 1 demo tmr dev device if ret va DE e sas dev map dev sem 1 demo map dev device if ret va CU J 130 2015 Altera Corporation Public Kerne Space We start our probe function in much the same way as before We use misc register to register 4 different devices with the kernel AN S A Kernel demo module 07 c misc device Space eii Our probe function ends in ad exi demo tmr dev device much the same Way as bad exit am before We may have to demo ram dev device deregister our misc bad
58. device Space Case IOC SET IAL iF Getusernew_interval uint32_t arg lt 0 4 up 4dev gt sem pr info demo tmr dev ioctl get user exitin return EFAULT range check the requested new interval value if new interval gt 100 up amp dev gt sem pr info demo tmr dev ioctl new interval gt 100 exit n return EINVAL calculate the new period value 1f new interval 0 new period Cg demo driver clk rate new interval 1 else new period g demo driver clk rate acquire the irq lock spin lock irqsave C amp g 1irq lock flags stop the interval timer 1owrite32 ALTERA AVALON TIMER CONTROL STOP MSK IOADDR ALTERA AVALON TIMER CONTROL Cg timer base Details of switch case SET INTERVAL Uses get user instead of copy from user 2015 Altera Corporation Public AN S A Kerne demo module 07 c misc device Space ensure there 1s no pending IRQ that we are blocking the status 1oread32 IOADDR ALTERA AVALON TIMER STATUS g timer base the status amp ALTERA AVALON TIMER STATUS TO MSK if Che status 0 do 1 1f we are blocking release the lock to allow IRQ handler to execute acquire the lock and check again spin unlock irqrestore amp g irq lock flags spin lock 1rqsave C amp g 1irq lock flags the status 10read32 IOADDR ALTERA AVALON TIMER STATUS g timer base the status amp
59. e function in much the same way as before reserve our memory region 1oremap our memory region 1nitialize our peripheral timer hardware register our interrupt handler start our timer and enable our timer hardware interrupts 117 2015 Altera Corporation Public NOTE R A D Kernel demo module 06 c sysfs files Space create ret_val the_platform_driver driver driver_attr_irq_delays if Cret_val 0 pr_errC failed to create irq delays sysfs entry goto bad exit stop timer J ret val rivercereatesfie sche n1 atform driver driver driver attr interval if Cret val 0 pr err failed to create interval sysfs entry goto bad exit remove irq delays j Then we create a couple g pl atfo rm p robe fl ag 1 of systs files with the upC amp g dev probe sem driver create file call pr infoC platform probe exit n return 0 118 2015 Altera Corporation Public AN U S RYA E Kernel demo module 06 c sysfs files Space the platform driver driver driver attr irq delays UII driver remove le bad exit stop timer 1owrite32 ALTERA AVALON TIMER CONTROL STOP MSK IOADDR ALTERA AVALON TIMER CONTROL CO ti mer base ensure there is no pending IRQ do 1 10 result 1oread32 IOADDR ALTERA AVALON TIMER STATUS g timer base 10 result amp ALTERA AVALON TIMER STATUS TO MSK while 10 result 0
60. e DEMO DRIVER FR unsigned long timeout period f timeout period unsigned long timer snaps 1l 4 unsigned long timer snaps h 4 We use the mmap ed pointer int i in our C code just like any other pointer if timer is not running start it ifCCtimer base ALTERA AVALON TIMER STATUS REG amp ALTERA AVALON TIMER STATUS RUN MS printf Timer not currently running initializing and starting timer n timeout period timer basel ALTERA AVALON TIMER PERIODL REG timeout period timer base ALTERA AVALON TIMER PERIODH REG timeout period gt gt 16 timer base ALTERA AVALON TIMER CONTROL REG ALTERA AVALON TIMER CONTRO j Dump the timer registers printf status 0x 08lxin timer base ALTERA AVALON TIMER STATUS REG printf control 0x 08lxin timer base ALTERA AVALON TIMER CONTROL REG printf period 0x 081X n timer base ALTERA AVALON TIMER PERIODL REG printf period h Ox 081X n mer base ALTERA AVALON TIMER PERIODH REG printf snap 0x 08lxin timer base ALTERA AVALON TIMER SNAPL REGI printf snap h 0x 081X n timer basel ALTERA AVALON TIMER SNAPH REG 2015 Altera Corporation Public JAN DTE RYA demo devmem c example Space void do dump rom void demo driver map 1 write STDOUT_FILENO void demo driver map ROM OFST ROM SPAN j A few more examples void do dump ram void demo driver map 1 write STDOUT_FILENO
61. e header files utility can create a memory map view from the perspective of any of the masters in the Qsys system In the default mode demonstrated above all masters in the Qsys system have a header file created for their view of the memory mapped system The macros in these headers can be useful when writing applications and drivers that interact with the FPGA based peripherals 2015 Altera Corporation Public JAN DTE RYA Creating System Header Files 1 grep Ns H BASE qsys headers hps O arm a9 Oh define define define define define define define define define define define define define define define define define define define define define define ONCHIP MEMORY2 O0 BASE 0xc0000000 SYSID QSYS BASE Oxff201000 INTR CAPTURER OU BASE Oxf f206000 VALIDATOR SUBSYS 0 BASE Oxff210000 MEMCPY MSGDMA CSR BASE Oxff220000 MEMCPY MSGDMA DESCRIPTOR SLAVE BASE Oxff220020 DEMO DRIVER SUBSYS O BASE Oxff230000 FIFO O IN CSR BASE Oxff240000 FIFO O0 IN BASE Oxff240020 FIFO O OUT BASE Oxff240030 FIFO 1 IN CSR BASE Oxff244000 FIFO 1 IN BASE Oxff244020 FIFO 1 OUT BASE Oxff244030 FIFO 2 IN CSR BASE Oxff248000 FIFO 2 IN BASE Oxff248020 FIFO 2 OUT BASE Oxff248030 FFT SUB SGDMA TO FFT CSR BASE Oxff280000 FFT SUB SGDMA TO FFT DESCRIPTOR SLAVE BASE Oxff290000 FFT SUB SGDMA FROM FFT CSR BASE Oxff2a0000 FFT SUB SGDMA FROM FFT DESCRIPTOR SLAVE BASE Oxff
62. eader Files 1 sopc create header files help Usage sopc create header files lt sopc gt OPTION This utility creates header files from your SOPC Builder system description By default the header files are in cpp format and have a h suffix Other formats may be selected with the appropriate command line option Options CUT as Supported header file formats type suffix uses example h h C C header file for cpp define FOO 12 output m4 m4 macro file for m4 m4 define FOO 12 formats sh Sh shell scripts FOO 12 mk mk makefiles FOO 12 pm pm Perl scripts macros FOO 12 By default multiple header files are created There 1s one header file for the entire system and one header file for each master group in each module A master group is a set of masters in a module in the same address space In general a module may have multiple master groups Addresses and available devices are a function of the master group r CU ta as 43 Creating System Header Files mkdir qsys headers 1 sopc create header files soc system sopcinfo output dir qsys headers 1 Ts qsys headers axi bridge for acp 128 Oh fft sub sgdma to fft h lw mm bridge h fft ddr bridge h fpga only master h memcpy msgdma mm read h fft sub DDR h hps O0 arm a9 Oh memcpy msgdma mm wr1te h fft sub h hps 0 arm a9 1 h SOC System h fft sub mm bridge O h hps_0_bridges h fft_sub_sgdma_from_fft h hps_0 h The sopc creat
63. elay 154 2015 Altera Corporation Public ANU amp RYA e demo module 07 ko target demonstration 1nsert module observe devfs entries read from rom write to rom read from ram write to ram verify write dump first 64 ram bytes dump first 64 rom bytes 1nsmod demo module 07 ko ls dev grep demo dd if dev demo_rom hexdump C dd 1f dev zero ofz dev demo rom dd if dev demo_ram hexdump C dd 1f dev zero ofz dev demo ram dd if dev demo_ram hexdump C dd if dev demo_ram bs 64 count 1 hexdump Cv dd if dev demo_rom bs 64 count 1 hexdump C dk dk dk dk dk k dt GE dk demonstrate llseek by copying 4 bytes from offset 56 in rom to offset 16 in ram dd 1f dev demo rom of dev demo ram bs 1 count 4 skip 56 seek 16 dd if dev demo_ram bs 64 count 1 hexdump Cv verify the operation demo map test h run demo map test demo map test o hexdump C dump rom demo map test a hexdump C dump ram dd if dev urandom demo map test f fill ram verify ram dump the timer registers demonstrate demo map read the result 1s the irq count returned at the next IRQ event demonstrate ioctl demo map test a hexdump C demo map test t for I in 12 3 4 do dd if dev demo_map bs 4 count 1 hexdump C done cat sys bus platform drivers demo_driver_7 interval 1octl test g echo 100 gt sys bus platform dri1ivers demo driver 7 1interval 1octl test g cat sys bus pl
64. em parse cmdline argc argv 3 _ example but this example uses 77 dev demo map instead open the dev demo map device dev demo map fd open dev demo map O_RDWR O SYNC 1f Cdev demo map fd lt 0 1 perror dev demo map open ex1lt EXIT FAILURE mmapO the base of our demo_driver hardware demo_dr ve r_map I mmaptNuLL sysconf SC PAGE SIZE PROT READ PROT WRITE AP SHARED dev demo map fd 0 if demo driver map MAP FAILED 1 perror dev demo map mmap close dev demo map fd ex1lt EXIT FAILURE 151 2015 Altera Corporation Public NOTE R A E e User ioctl test c Space int main int argc char argv i We provide a test application to drive the loctl functionality of our demo tmr driver int dev demo tmr fd parse the command line arguments parse cmdline argc argv open the dev demo tmr device dev demo tmr fd open dev demo tmr O_RDWR O SYNC 1fCdev demo tmr fd lt 0 perror dev demo tmr open ex1lt EXIT FAILURE j perform the operation selected by the command line arguments if g get interval NULL do get interval dev demo tmr fd ifCg set interval NULL do set interval dev demo tmr fd if g get max delay NULL do get max delay dev demo tmr fd ifCg get min delay NULL do get min delay dev demo tmr fd if g help I NULL do_help close dev
65. emo fifo dev L 1 pr err kzalloc failed n goto bad exit return 2015 Altera Corporation Public AN S A 191 demo module 10 c Multiple Device Instances Space demo fifo dev structure initialize the P n Mom fo dev name NAME BUF SIZE demo fifo d g dev index INIT LIST HEAD amp the demo f1ifo dev dev list sema init amp the demo fi1ifo dev dev sem 1 init waitqueue head amp the demo fifo dev wait queue the demo fifo dev the demo fifo dev the demo fifo dev the demo fifo dev the demo fifo dev the demo fifo dev the demo fifo dev the demo fifo dev the demo fifo dev the demo fifo dev the demo fifo dev ret val EINVAL 2015 Altera Corporation Public Then we initialize the newly gt 1n_res NULL Out res NULL allocated device structure gt in_csr_res NULL The name being the most apparent item that we will 1oremap 1n addr NULL 1oremap out addr NULL see in user space 1oremap in csr addr NULL open for read 0 open for write 0 gt miscdev minor MISC DYNAMIC MINOR gt m1scdev name the demo fi1fo dev name gt miscdev fops amp demo fifo Tops demo module 10 c Multiple Device Instances Space get our three expected memory resources rO platform get resource pdev IORESOURCE MEM 0 if CrO NULL Dr ert IORESOURCE_MEM O does not exi
66. es Cut with increment the S n up and exit g dev index and store our the demo fifo dev dev list amp g dev list alc cL d i device structure into the dev the demo fifo dev platform driver data p 195 2015 Altera Corporation Public NOTE YA E Kernel demo module 10 c Multiple Device Instances Space 01 static const struct file operations demo fifo fops 1 We can open release read 02 Owner THIS MODULE e 03 pen demo To open and write our FIFO device 04 release demo fifo release C read demo fifo read write demo fifo write AV A IA VU NAT V Ji NY i y d c AO 31 196 92015 Altera Corporation Public ANU amp RYA e Kernel demo module 10 c Multiple Device Instances Space static int demo fifo open struct inode ip struct file fp Our open routine needs to struct demo fifo dev the demo fifo dev NULL search thru our device list to uint32 t this minor locate our device instance uint32 t access mode that matches the device struct list head next list entry ine found v6 0 thats being opened if Cdown interruptible amp g dev list sem The device minor number is return ERESTARTSYS Ge GE what identifies this for us iminorCip ist forc cttnext list entry ist 1 e_demo_fifo_dev next_list_entry struct demo fifo dev dev list this min
67. ev mem 2015 Altera Corporation Public Trivial access to FPGA hardware from user space Often when we begin developing a custom piece of FPGA hardware we know that we will eventually want to have a nice pretty driver that presents a convenient API into user space for applications to interact with but in the early days of developing the hardware we dont even know if it s working properly and we may still have numerous iterations that we apply to the hardware before it stabilizes into the ultimate thing for which we want to create a driver At this early point in time it can be much less overhead to simply peek and poke at the hardware with some basic stimulus thru a user space application that mmap s the hardware using dev mem n some cases this dev mem approach may be all you ever need 51 2015 Altera Corporation Public demo devmem User Space demo devmem memcpy msgdma demo driver subsys O Kernel Space 52 2015 Altera Corporation Public Color coded indicator of user kernel space example User Color Key for Code Examples Space The general context of the code example 1s not highlighted at all just black text 3 The focus of a code example is highlighted in red text If you ignore everything else on the page in black text make sure you take note of the red text that 1s highlighted as it 95 1s relevant to the example when the f a code ex
68. exit deregister demo rom gesch 7 misc deregister amp deno ron dev devi ce evices on error Cwut conditions j static int platform remove struct platform device pdev l Our remove function DELLE simply removes our misc demo map dev device FM PEE demo tmr dev device demo ram dev device misc deregister demo rom dev device CU 131 2015 Altera Corporation Public NOTE R A D Kernel demo module 07 c misc device Space 01 static const struct file operations demo_rom_dev_fops Our demo rom device Owner THIS MODULE Ten bon open demo rom dev open registers an open release release demo rom dev release read and llseek function read demo rom dev read Ilseek demo rom dev llseek 07 09 static struct miscdevice demo rom dev device minor MISC DYNAMIC MINOR name demo rom fops amp demo rom dev fops 132 9 2015 Altera Corporation Public AN OS RYA demo module 07 c misc device static int demo rom dev open struct inode 1p struct file fp 1 struct demo rom dev dev amp the demo rom dev CUt if Cdown interruptible amp dev sem return ERESTARTSYS fp private data dev dev gt open_count up amp dev gt sem pr_info demo_rom_ dev open exit n Kernel Space In this example our open and release functions don t really do much other than count some statistics fo
69. exit void pr info demo exit enter n These macros export the symbols pr info demo exit exit n for the init and exit functions such j that the kernel code that loads your emo init module can identify these entry emo exit points MODULE LICENSE GPL MODULE AUTHOR Driver Student One lt dso company com gt MODULE AUTHOR Driver Student Two lt dst organization org gt MODULE DESCRIPTION Demonstration Module 1 the most basic module example MODULE VERSION 1 0 79 O 2015 Altera Corporation Public JAN DTE RYA e Kernel demo module 01 c the most basic module Space finclude lt linux module h gt There are a collection of macros uin nitr used to identify various attributes o about a module These strings get E auda m ie E packaged into the module and can coi e een be accessed by various tools y The most important module static void demo exit void description macro is the ener IE eee pr info demo exit enter n MODULE LICENSE macro If this pr infoC demo exit exitin macro is not set to some sort of GPL y license tag then the kernel will module init demo init become tainted when you load module ex1t demo exit your module GPL Se Student One lt dso company com gt MODULE AUTHOR Driver Student Two lt dst organization org gt MODULE DESCRIPTION Demonstration Module 1 the most basic module example MODULE VERSION 1 0
70. expect to fulfill anything else is considered an error 147 92015 Altera Corporation Public NOTE YA D Kerne demo module 07 c misc device Space cur irq cnt get current irq count while Ccur irq cnt get current irq count up _irg_walt_gueue if cur irq cnt get current irq count 4 pr info C demo map dev read wait interrupted exit n return ERESTARTSYS if Cdown interruptible amp dev sem pr info demo map dev read sem interrupted exit n return ERESTARTSYS J current irq count cur if copy tocuser user buffer amp cur irq cnt count up amp dev gt sem pr info demo map dev read copy to user exitin return EFAULT j dev read byte count count up amp dev gt sem pr info demo map dev read exit n return count The heart of the demo map read function is waiting for the next IRQ event to occur 148 2015 Altera Corporation Public NOTE R A D Kernel demo module 07 c misc device Space static inline uint32 t get current irq count void The read function d uint32 t current count leveraged this helper unsigned long flags function to query the IRQ count in a safe fashion to spin lock irqsave amp g irq lock flags cc iz Mi current count g irq count avoid race conditions spin unlock irqrestore amp g irq lock flags return current count j 1irqreturn t demo driver interrupt h
71. fd DEMO DRIVER PHYS BASE 1fCdemo driver map MAP FAILED CUt mmap the base of our memcpy msgdma hardware memcpy msgdma map mnap NULL sysconf SC PAGE SIZE PROT READ PROT WRITE MAP SHARED devmem fd MEMCPY MSGDMA CSR PHYS BASE 1f memcpy_msgdma_map MAP FAILED i ce CU 55 2015 Altera Corporation Public JAN DTE RYA demo devmem c example Space perform the operation selected by the command line arguments ifCg_print_timer NULL do_print_timer demo_driver_map 1f g_dump_rom I NULL do dump rom demo driver map if Cg dump ram I NULL do dump ram demo driver map if g fill ram I NULL do fill ramCdemo driver map ifCg dma rom ram I NULL do dma rom ram memcpy msgdma map if g_help NULL do_help munmap everything and close the dev mem file descriptor result E river map sysconf SC PAGE SIZE if result lt ra CU ta gt j result BI sysconf SC PAGE SIZE if result lt Cut Then we can use those pointers that we mmap ed and then NE ne fe munmap them when we re exi IT SUCCESS finished and close dev mem 56 2015 Altera Corporation Public JAN DTE RYA 57 User demo devmem c example Space void do print timer void demo driver map volatile unsigned long timer base demo driver map TIMER OFST double f timeout period double 0 010 double 1 doubl
72. ffset struct demo fifo dev the demo fifo dev fp gt private data CU if Cdown interruptible amp the demo fifo dev dev sem 1 Cut We only accept a modulo 4 j count if count amp 4 1D 1 ar Our write blocks on a full FIFO and waits for the read routine to clear the wait queue while Cioread32 the demo fifo dev ioremap in csr addr FIFO LEVEL REG gt FIFO MAX FILL LEVEL up 1f he demo fifo dev wai1t queue 10read32 the demo fifo dev 1oremap in csr addr FIFO LEVEL REG lt FIFO MAX FILL LEVEL 1 pr info demo fifo write wait interrupted exit n return ERESTARTSYS if Cdown interruptible amp the demo fifo dev dev sem 1 ce CUE ao j j 5 201 2015 Altera Corporation Public NOTE R A E demo module 10 c Multiple Device Instances Space fifo level ioread32 the demo fifo dev 1oremap in Cer addr FIFO LEVEL REG while f1fo_1 FILL LEVEL 1 if temp data user buffer 4 1 up e demo fifo dev dev sem pr info demo fifo write copy to user exit n return EFAULT 1owrite32 temp data the demo fifo dev ioremap in addr FIFO DATA REG Then we write whatever we can into the FIFO up to user buffer 4 fifo_level this count 4 count count 4 if count 0 break dev sem the demo fifo dev wait queue And we wake the wait queue i return this count when we re f
73. filename Optional pov component name The point of view to generate from Defaults to the first cp pov type lt cpu pci gt The point of view device type Optional reset Show reset interfaces in graph Optional sort lt none address name label gt Sort components by Optional streaming Show streaming interfaces in graph Optional type lt dtb dtb hex8 dtb hex32 dtb char arr dts uboot kernel gt The type of output t bootargs lt kernel args gt Default kernel arguments for the chosen section of the DTS sopc parameters lt node cmacro all gt what sopc parameters to include in DTS Optional 2015 Altera Corporation Public JAN DTE RYA m Creating Device Trees sopc2dts input soc system sopcinfo output soc system dts N board hps common board info xml bridge removal all clocks board board info ALTERA CV SOC xml The sopc2dts utility can create 1 cat soc system dts device tree entries for the FPGA based Qsys components represented in the SOPCINFO fifo 0 f1foQ0x100040020 file compatible ALTR fifo 14 1 ALTR fifo 1 0 reg 0x00000001 0x00040020 0x00000004 gt CU Las 0x00000001 0x00040030 0x00000004 gt These device tree entries can 0x00000001 0x00040000 0x00000020 gt be compiled by the dtc ES Mg UE uc esp s compiler into a binary device clocks amp clk 0 y end fifo 0x100040020 fifo_0 tree blob that is used by the linux kernel t
74. form probe struct platform device pdev int ret val struct resource r int irq struct clk clk We retrieve the memory unsigned long clk rate regions allocated by our pr infoC platform probe enter n device by calling platform get resource ret val EINVAL i ource r dev IORESOURCE_MEM 0 if r pr info r start 0x 08lx n long unsigned int r gt start pr info r end 0x 08lx1n long unsigned int r end pr info r name s n r name if r gt start PAGE_MASK 1 CUE if CCCr end r gt start 1 gt PAGE SIZE CU else pr_err IORESOURCE_MEM O does not exist n goto bad exit return g demo driver base addr r start 100 2015 Altera Corporation Public NOTE R A E 101 demo module 04 c extracting from device tree ge ource if irg lt CUT as j else 1 pr info irq d n irq j g demo driver irq irq ge ck resource clk CI get apdev dev NULL if IS clk 1 CUE as else 1 cTk rate EE pr_info cik lu HZ n clk rate g_demo_driver_clk_rate clk_rate J pr_info platform_probe exitin return 0 bad exit return pr infoC platform probe bad_exit n return ret val 2015 Altera Corporation Public Kerne Space We retrieve the irq that our hardware is allocated by calling platform get irq We retrieve our clock information by
75. g dev probe sem return ARTSYS Note that we acquire a semaphore for the driver resources with the down interruptible call if Cg platform probe flag 0 goto bad exit return ret val EINVAL get our first memory resource r platform get resource pdev IORESOURCE MEM 0 if Cr NULL 1 Dr ert IORESOURCE MEM O does not exist n goto bad_exit_return j g demo driver base a g demo driver size 106 2015 Altera Corporation Public AV U S RYA D Kernel demo module 05 c reserve memory register irq space get our interrupt resource irq platform get irq pdev 0 if Cirg lt 0 1 pr err irq not available n goto bad exit return Then we retrieve our IRQ number and our clock demo driver irq irq i g_dademo_ariver_1 Fa irq information get our clock resource clk clk_get amp pdev gt dev NULL if IS ERR CIK i1 pr err clk not available n goto bad exit return else 1 J Clk rate clk_get_rate clk 107 2015 Altera Corporation Public ANU amp RYA e Kernel demo module 05 c reserve memory register irq space ret val EBUSY reserve our memory re demo driver mem region g demo driver size demo driver hw region if Cdemo driver mem region NULL pr err request mem region failed g demo driver base addr Xn goto bad exit return j ioremap our m ion g ioremap
76. ho ff230000 driver gt sys bus platform drivers demo driver 3 bind ls sys bus platform drivers demo driver 3 and we see the result rmmod demo module 03 remove the device Observe the output on the printk console 2015 Altera Corporation Public JAN DTE RYA Extracting information from the device tree For more information Documentation devicetree Documentation clk txt 2015 Altera Corporation Public Retrieving our properties from the device tree There are three properties that are of significant interest to most hardware blocks and the software drivers that control them Memory region every hardware peripheral will likely consume some span of the address map and the driver needs to know where that is so that it can map it to a pointer that can interact with that region Interrupt signal peripherals that rely on a hardware interrupt signal need to know what interrupt line that event is signaled on so that an interrupt handler may be registered to handle it Clock some peripherals that are sensitive to their clock properties will need to know what those details are 98 2015 Altera Corporation Public JAN DTE RYA ge demo module 04 User Space demo module 04 demo driver subsys O demo driver 1 0 Kernel Space 99 2015 Altera Corporation Public Kernel demo module 04 c extracting from device tree Space static int plat
77. ice Space static int demo uio release struct uio info info struct inode inode TEE do resol Our release routine stop our timer and disable our timer hardware interrupts 1owrite32 ALTERA AVALON TIMER CONTROL STOP MSK IOADDR ALTERA AVALON TIMER CONTROL CO t1 mer base ensure there 1S no pending IRQ do 1 10 result 1oread32 IOADDR ALTERA AVALON TIMER STATUS g timer base 10 result amp ALTERA AVALON TIMER STATUS TO Mk while 10 result 0 g demo uio dev sem ups 0 A basic UIO driver would rely on user space code to perform this prior the device being munmap ed AN S A 164 2015 Altera Corporation Public Kerne demo module 08 c uio device Space 01 1rqreturn t demo uio interrupt handler int irq struct uio info dev info 03 snapshot the current timer value Our rq handler 1owrite32 0 IOADDR ALTERA AVALON TIMER SNAPL CO timer base clear the interrupt 10wr1te32 0 TOADDR_ALTERA_AVALON_TIMER_STATUS g_timer_base return IRQ HANDLED A basic UIO driver would rely on user space code to perform this following a read from the driver AN S A 165 2015 Altera Corporation Public Kernel demo module 08 c uio device Space static int demo uio irqcontrol struct uio info info s32 ro on LT ii m nr Our irgcontrol routine if Cirq_on i1 start our timer and enable our timer hardware interrupts 1owrite
78. inished 202 2015 Altera Corporation Public 203 demo module 10 ko target demonstration insmod demo module 10 ko find dev name demo find sys name demo insert the module observe the device nodes observe the sysfs files ls sys bus platform drivers demo driver 10 notice the 3 devices bound create 3 random data files dd 1f dev urandom of random0 bin bs 256K count 1 dd 1f dev urandom of random1l bin bs 256K count 1 dd 1f dev urandom of random2 bin bs 256K count 1 start 3 separate processes to write dd if random0 bin of dev demo_f1fo_0 dd ifzrandoml bin ofz dev demo fifo 1 dd 1f random2 bin of dev demo_fifo_2 read back the first 1K of data from dd if dev demo fifo O ofzrandomO out dd 1f dev demo_fifo_1 of randoml out dd 1f dev demo_fifo_2 of zrandom2 out the random files to a different fifo bs 1024 amp bs 1024 amp bs 1024 amp each fifo bin bs 1024 count 1 bin bs 1024 count 1 bin bs 1024 count 1 read back the remaining data from all the fifos dd 1f dev demo_fifo_0 ofzrandomO out dd 1f dev demo_fifo_1 of random1_out dd 1f dev demo_fifo_2 of random2_out wait mdSsum bin rmmod demo module 10 2015 Altera Corporation Public bin bs 1024 count 255 conv notrunc seek 1 amp bin bs 1024 count 255 conv notrunc seek 1 amp bin bs 1024 count 255 conv notrunc seek 1 amp wait for background processes validate the in out data files
79. k rate lock g irq lock flags stop the interval timer 1owrite32 ALTERA AVALON TIMER CONTROL STOP MSK IOADDR ALTERA AVALON TIMER CONTROL CO timer base 123 2015 Altera Corporation Public NOTE R A E Kernel demo module 06 c sysfs files Space ensure there 1s no pending IRQ that we are blocking the status 1ioread32 IOADDR ALTERA AVALON TIMER STATUS g timer base the status amp ALTERA AVALON TIMER STATUS TO MSK 1 p S Note the use of spinlocks 1f we are blocking release the lock to allow IRQ handler to execute acquire the lock and check again g irq lock flags g irq lock flags the status 10read32 IOADDR ALTERA AVALON TIMER STATUS g timer base the status amp ALTERA AVALON TIMER STATUS TO MSK while Che status 0 J write the new period value 1owrite32 new period IOADDR ALTERA AVALON TIMER PERIODL g timer base 1owrite32 new period gt gt 16 IOADDR ALTERA AVALON TIMER PERIODH g timer base initialize the MAX MIN variables g max irq delay 0 g min irq delay OxFFFFFFFF 124 2015 Altera Corporation Public NOTE R A E Kerne Space demo module 06 c sysfs files start the timer 1f new interval 0 1O0wr1te32 ALTERA AVALON TIMER CONTROL ITO MSK ALTERA AVALON TIMER CONTROL CONT MSK ALTERA AVALON TIMER CONTROL START MSK IOADDR ALTERA AVAL
80. lags O handler demo uio interrupt handler Open demo uio open 07 release demo uio release 08 Irgcontrol demo uio irqcontrol 162 2015 Altera Corporation Public Kerne Space Our uio info struct Kerne demo module 08 c uio device Space static int demo uio open struct uio info info struct inode 1node t Our open routine LI Cut LI a Li g demo uio dev sem 0 return EAGAIN initialize our peripheral timer hardware 1o result 1oread32 IOADDR ALTERA AVALON TIMER STATUS g timer base 10 result amp ALTERA AVALON TIMER STATUS TO MSK ALTERA AVALON TIMER STATUS RUN MSK if Go result 0 pr err peripheral timer hardware incorrect initial state return EIO J period 1s g_demo_driver_clk_rate 1 1owrite32 period 1s IOADDR ALTERA AVALON TIMER PERIODL g timer base 1owrite32 period 1s gt gt 16 IOADDR ALTERA AVALON TIMER PERIODH g timer base start our timer and enable our timer hardware interrupts 1O0wr1te32 ALTERA AVALON TIMER CONTROL ITO MSK ALTERA AVALON TIMER CONTROL CONT MSK ALTERA AVALON TIMER CONTROL START MSK IOADDR ALTERA AVALON TIMER CONTROL CO timer base return 0 A basic UIO driver would rely on user space code to perform this once the device was mmap ed 163 92015 Altera Corporation Public NOTE R A D Kerne demo module 08 c uio dev
81. last th s_loop_count if last if last sa Cle a 2015 Altera Corporation Public JAN DTE RYA 185 186 2015 Altera Corporation Public demo module 09 ko target demonstration insmod demo module 09 ko create a couple random files dd 1f dev urandom of random_co bin bs 1M count 1 dd 1f dev urandom of random_st bin bs 1M count 1 write to coherent DMA device and read from coherent DMA device dd 1f random_co bin ofz dev demo dma co bs 1024 dd ifz dev demo dma co of zrandom co data bin bs 1024 write to streaming DMA device and read from streaming DMA device dd 1f random_st bin ofz dev demo dma st bs 1024 dd if dev demo dma st of random st data bin bs 1024 write to coherent DMA device and read from streaming DMA device dd 1f random_co bin ofz dev demo dma co bs 1024 dd ifz dev demo dma st of random co2st data bin bs 1024 write to streaming DMA device and read from coherent DMA device dd 1f random_st bin of dev demo_dma_st bs 1024 dd if dev demo dma co of random_st2co_data bin bs 1024 compare all the files md5sum bin rmmod demo module 09 Multiple Device Instances en 2015 Altera Corporation Public demo module 10 User Space DEV DEV demo_f1fo_0 demo_f1fo_1 f1fo_0 ALTR f1fo 14 1 fifo 1 ALTR f1fo 14 1 fifo_2 ALTR f1fo 14 1 DEV demo f1fo 2 demo module 10 demo driver 10 1oremap Kernel Space 188 2015 Alte
82. lp MAKE C KDIR M PWD help modules MAKE C KDIR M PWD modules gt modules install MAKE C KDIR M PWD modules install 2015 Altera Corporation Public JAN DTE RYA Ready to write some code 2015 Altera Corporation Public demo module 01 User Space demo module 01 Kernel Space 76 2015 Altera Corporation Public JAN DTE RYA m Licensing Se Copyright C 2015 Altera Corporation This program is free software you can redistribute it and or modify it under the terms of the GNU General Public License as published by the Free Software Foundation either version 2 of the License or at your option any later version This program is distributed in the hope that it will be useful but WITHOUT ANY WARRANTY without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE See the GNU General Public License for more details You should have received a copy of the GNU General Public License along with this program if not write to the Free Software Foundation Inc 59 Temple Place Suite 330 Boston MA 02111 1307 USA The last thing that most folks care to think about when they start writing a piece of software is the legal licensing requirements of the software they are about to write But if you ever plan to share your software with anyone else this is one of the most important pieces of the source file
83. m Web Images Maps Shopping More v Search tools About 131 000 results 0 37 seconds Embedded Linux boot time reduction Free Electrons free electrons com services boot time Making your embedded Linux systems boot faster Investigating boot time issues and applying optimization techniques that dont require a redesign Free Electrons Embedded Linux Experts free electrons com v Embedded Linux kernel and Android development training and consulting services Buildroot commercial support Embedded Linux boot time reduction Offering our broad embedded Linux development experience through our 42 295 views How to boot an uncompressed Linux kernel on ARM 38 199 views Youve visited this page 4 times Last visit 11 1 14 2 Update on boot time reduction techniques with figures T events linuxfoundation org opdenacker boot time p Linux Foundation http free electrons com doc training boot time gt That s where you will find extensive 9 O 2015 Altera Corporation Public JAN DTE RYA m RocketBoards org Altera SoC Linux Community Portal The source for SoC FPGA Linux info Golden System Reference Design GSRD Updates on latest releases Step by step getting started guides SoC FPGA Mailing List RFI Active community participation in answering SoC FPGA and Linux questions Example Projects Applications and Designs From Altera and the SoC community
84. m Cyclone V SoC Arria V SoC Arria 10 SoC 20nm 1 5 GHz 6096 4096 Lower Gen 3 x8 DDR4 3 LPDDR2 3 QDRIV RLDRAM III Hybrid Memory Cube 72 bit 64 bit ECC EMAC x 3 8 bit and 16 bit SD SDIO MMC 4 5 with eMMC 160 660K 500 MHz kd ll LL Developing Drivers 2015 Altera Corporation Public Developing Drivers Agenda 1 of 4 Driver Demonstration Hardware Overview Hardware architecture to software development communication options Sopc create header files sopc2dts Accessing FPGA hardware from user space dev mem mmap munmap runtime device tree inspection application build example Driver development environment setup ARCH CROSS COMPILE OUT DIR Kbuild file Makefile Demonstration Module 1 the most basic module example Source code licensing module init module exit MODULE LICENSE MODULE 0 Demonstration Module 1t tainted module example kernel tainting modinfo insmod Ismod rmmod procfs sysfs module statistics 2015 Altera Corporation Public JAN DTE RYA Developing Drivers Agenda 2 of 4 Demonstration Module 2 introduce module parameters module param module param array MODULE PARAM DESC sysfs module parameters entries Demonstration Module 3 introduce platform driver of device id structure compatible strings MODULE DEVICE TABLE platform driver structure pro
85. n Public NOTE R A E Kernel demo module 10 c Multiple Device Instances Space verify that we found all three resources And after all that we just if Che demo fifo dev 1in res NULL 4 fu th ly f d pr err no resource found for in n VE y that we actually tounc goto bad exit kfree the demo fifo dev each named resource that j we were looking for if Cthe demo fifo dev 0out res NULL 4 pr err no resource found for out n goto bad exit kfree the demo fifo dev j if Cthe demo fifo dev 1in csr res NULL pr err no resource found for in_csr n goto bad exit kfree the demo fi1ifo dev j 194 2015 Altera Corporation Public NOTE R A E Kernel demo module 10 c Multiple Device Instances Space reserve our memory regions We initialize our FIFO 2 ei Ch as ioremap our memory regions hardware CUT as initialize the FIFO hardware fifo level 1oread32 the demo fifo dev 10remap in Cer addr FIFO LEVEL REG while Cfifo level gt 0 1oread32 the demo fifo dev 1oremap out addr FIFO DATA REG fifo level J fifo_level ioread32 the_demo_fifo_dev gt 1oremap_in_csr_addr FIFO_LEVEL_REG if fifo_level 0 pr err fifo initialization failed goto bad exit 1iounmap in Cer j And finally we add our ret val EINVAL device to a global list that we register misc device demo fifo track our device instanc
86. ng mtd serio 2015 Altera Corporation Public JAN DTE RYA Device Tree Documentation socfpga 3 10 1ts1 cat Documentation devicetree bindings clock altr socfpga txt Device Tree Clock bindings for Altera s SOCFPGA platform An example of some bindings documentation 1 Documentation devicetree bindings clock clock bindings txt This binding uses the common clock binding 1 Required properties compatible shall be one of the following altr socfpga pll clock for a PLL clock altr socfpga perip clock The peripheral clock divided from the PLL clock altr socfpga gate clk clocks that directly feed peripherals and can get gated reg shall be the control register offset from CLOCK MANAGER s base for the clock clocks shall be the input parent clock phandle for the clock This is either an oscillator or a pll output Optional properties fixed divider If clocks have a fixed divider value use this property clock cells from common clock binding shall be set to 0 Optional properties fixed divider If clocks have a fixed divider value use this property clk gate For socfpga gate clk clk gate contains the gating register and the bit index div reg For socfpga gate clk div reg contains the divider register bit shift and width 49 O 2015 Altera Corporation Public JAN DTE RYA e Accessing FPGA hardware starting off simple with a user space application mmap d
87. o define the peripheral space available on demo driver subsys 0 driver40x100030000 the target compatible demo driver 1 0 demo driver 1 0 reg 0x00000001 0x00030000 0x00001000 interrupt parent amp hps O arm gic O0 CUT 5 NOTE newer u boot versions interrupts 0 48 4 are driven by device tree clocks amp clk 0 definitions as well as the kernel however u boot and the kernel cut require their own unique device tree definitions generated 2015 Altera Corporation Public separately JAN DTE RYA m end driver 0x100030000 demo driver subsys 0 47 48 Device Tree Documentation Device Tree for Dummies http events l1inuxfoundation org sites events f1les sl1des petazzoni device tree dummies pdf Some publicly available information on device tree socfpga 3 10 1ts1i ls R Documentation devicetree Documentation devicetree OO INDEX bindings booting without of txt usage model txt Documentation devicetree bindings arc 12C net sound arm 110 nvec Spi ata input open pic txt staging bus interrupt controller pci thermal COX 1ommu phy timer clock leds pinctrl tty cpufreg lpddr2 power usb crypto mai lbox powerpc vendor prefixes txt dma marvell txt power supply video drm media pwm virtio eeprom txt memory controllers regulator w1 fb metag reset watchdog fpga mfd resource names txt x86 gpio mips rng x1linx txt gpu misc rtc hwmon mmc serial hwr
88. od demo module Oh ko cat proc interrupts grep demo cat proc interrupts grep demo cat proc interrupts grep demo cat proc 1omem grep demo dk CHE RH dk dk stop the timer hardware insert module observe IRQ occurring observe IRQ occurring observe IRQ occurring observe reserved memory 4 demo module O5t ko 15 a test module that we force to reserve the same resources that demo module 05 ko has already reserved We can see which of those actions fail and which 4 of those actions succeed insmod demo module O05t ko base 0xff230000 1rq 80 THE dk dk GE dk rmmod demo module 05 Observe the output on the printk console 2015 Altera Corporation Public observe printk request mem region failed 1oremap succeeded request irq failed remove module Creating sysfs files ER 2015 Altera Corporation Public demo module 06 User Space SY SES SYSFS irg_delays interval demo module Op demo driver 6 ioremap Kernel Space 116 2015 Altera Corporation Public demo driver subsys O demo driver 1 0 Kernel demo module 06 c sysfs files Space 01 static int platform probe struct platform device pdev d Mu e Eh EEN D e Ch sus Clos saCUlsa ss s CUT ss Clos vs CUE rs CUE e CU Ge ss get our clock resource uo y o Y Y o ox X acquire the probe lock get our first memory resource We start our prob
89. onsole 102 2015 Altera Corporation Public JAN DTE RYA ge demo module 04 ko target demonstration 2 list all the phandles sorted find proc device tree name linux phandle sort list all the phandle values sorted then you can locate the interrupt parrent phandle find proc device tree name linux phandle sort xargs hexdump C verify the phandle ls proc device tree sopcQ0 1ntcQOxfffed000 hexdump C proc device tree sopc 0 intc Oxfffed000 1inux phandle this 1s a phandle hexdump C proc device tree sopc 0 br1dge 0xc0000000 driver 0x100030000 clocks verify the phandle ls proc device tree clocks clk 0 hexdump C proc device tree clocks clk 0 1l1nux phandle verify the clock frequency hexdump C proc device tree clocks clk 0 clock frequency printf d n frequency Observe the output on the printk console 103 92015 Altera Corporation Public NOTE R A E Reserving memory regions and registering IRQ handlers 2015 Altera Corporation Public 104 demo module 05 User Space demo module 05 PES demo driver subsys O demo driver 1 0 Kernel Space 105 92015 Altera Corporation Public Kernel demo module 05 c reserve memory register irq space static int platform probe struct platform device pdev sa CU Loss pr infoC platform probe enter n ret val EBUSY We start by retrieving our memory resource J 1 ck if
90. or if Che demo fifo dev miscdev minor this minor 1 found 1t 1 break J upC amp g dev list sem if Cfound it 0 return ENXIO 197 2015 Altera Corporation Public NOTE R A E Kernel demo module 10 c Multiple Device Instances Space fp f flags O_ACCMODE We ensure that we only d l case TO v allow one file descriptor be if the demo fifo dev open for read 0 be associated with reading ee gedet or writing the device at a the demo fifo dev open for read 1 time 1 e demo fifo dev open for write 0 return EBUSY SCH the demo fifo dev open for write 1 We determine this from the k access mode of the file case 1f the_demo_fifo_dev gt open_for_read 0 return EBUSY if Che demo fifo dev open for write 0 return EBUSY the demo fifo dev open for read 1 the demo fifo dev open for write 1 break default return EINVAL j fp private data the demo fifo dev return 0 198 2015 Altera Corporation Public NOTE R A E demo module 10 c Multiple Device Instances Space static ssize t demo fifo read struct file fp char user user buffer size t count loff t offset d struct demo fifo dev the demo fifo dev fp gt private data Cut if Cdown interruptible amp the demo fifo dev dev sem 1 Cut We only accept a modulo 4 y count Dx T ORNE 8 F 2D 1 Our read block
91. ount LI E next dma 1o buf ofst this loop count Our coherent read starts to if next dma io buf ofst PAGE SIZE directly interact with the next dma io buf ofst 0 g dma handle 4k 2015 Altera Corporation Public JAN DTE RYA Kernel demo module 09 c DMA Space while temp user count gt 0 if Ctemp dma count gt 0 1owrite32 ram ptr g ioremap desc addr DESC READ ADDRESS REG 1owrite32 g dma handle Ak next dma io buf ofst g ioremap desc addr DESC WRITE ADDRESS REG 1owrite32 this loop count g ioremap desc addr DESC LENGTH REG 10wr1te32 START_ZDMA_MASK g ioremap desc addr DESC CONTROL REG descriptor configuration temp dma count this loop count ram ptr this loop count next dma 1o buf ofst this loop count if next dma 1o buf ofst gt PAGE SIZE next dma io buf ofst 0 else while get dma busyO 0 if Cwait event interruptible g irq wait queue get dma busy 0 1 D e EK E j Continues to directly interact with the g dma handle Ak 177 2015 Altera Corporation Public NOTE R A E Kernel demo module 09 c DMA Space Culos sa CU aa sa CUT axa 178 92015 Altera Corporation Public while Cget dma fill level gt 0 if wait event interruptible g i1irq wait queue get dma fill level 0 1 J if copy_to_user user_buffer g_coherent_ptr_4k next user 1o buf ofst
92. pository for socfpga Updated 6 hours ago meta altera BitBake 0 WO Yocto Layer for SoCFPGA Angstrom specific branches Updated 3 days ago angstrom socfpga Shell 0 WO Angstrom repository with updated layers file 13 O 2015 Altera Corporation Public ANU S RYA e Several Ways to Learn Instructor led training Face to face with an Altera expert Training Engineer 20 courses to choose from 8 hour classes Virtual classes taught via WebEX Can ask questions to Altera expert Training Engineer Course content same as instructor led classes 1 2 day sessions 200 topics available 30 minutes in length Videos free and always available YouTube videos 4 minutes each 2015 Altera Corporation Public SoC Classes Available Instructor led or virtual classes Designing with an ARM based SoC Developing Software for an ARM based SoC Online classes Hardware Design Flow for an ARM based SoC Software Design Flow for an ARM based SoC SoC Hardware Overview the Microprocessor Unit SoC Hardware Overview Interconnect and Memory SoC Hardware Overview System Management Debug and General Purpose Peripherals SoC Hardware Overview Flash Controllers and Interface Protocols SoC Bare metal Programming and Hardware Libraries Getting Started with Linux for Altera SoCs 15 2015 Altera Corporation Public JAN DTE RYA e Essential So
93. r demonstration return 0 static int demo_rom_dev_release struct inode 1p struct file fp 1 struct demo rom dev dev fp gt private_data z CUT if Cdown interruptible amp dev sem return ERESTARTSYS dev gt release_count up amp dev gt sem pr_info demo_rom_dev_release exit n return 0 133 92015 Altera Corporation Public AN S A Kerne demo module 07 c misc device Space static ssize t Our demo rom read demo rom dev read struct file fp char user user buffer i mene routine allows user space size t count loff t offset to read from our ROM iN memory in our hardware if Cdown interruptible amp dev sem 1 pr infoC demo rom dev read sem interrupted exit n return ERESTARTSYS dev gt read_count 1f C offset gt max offset 1 up amp dev gt sem pr infoC demo rom dev read offset gt max offset exit n return EINVAL 1f C offset max offset 1 up amp dev gt sem pr infoC demo rom dev read offset max offset exit n return O0 J if next_offset gt max offset count next offset max offset temp count count rom ptr g 1oremap addr ROM OFST rom ptr offset 2015 Altera Corporation Public JAN DTE RYA 134 Kerne demo module 07 c misc device Space while Ctemp count gt 0 1 int this loop count IO BUF SIZE if Ctemp count lt IO BUF SIZE this loop count
94. ra Corporation Public Kernel demo module 10 c Multiple Device Instances Space static struct of device 1d demo driver dt 1ids 1 i compatible ALTR fifo 14 1 i end of table Static int demo_init void x int ret val Foro g dev index 0 g dev list ev list sem 1 We bind this example with devices matching this compatible string Our init routine clears a global index that we track each instance of our driver that be bind to each device ret val platform driver register amp the platform driver if Cret val 0 pr err platform driver register returned d n ret val return ret val J return 0 j 2015 Altera Corporation Public AN S A 190 Kerne demo module 10 c Multiple Device Instances Space static int platform probe struct platform device pdev i int ret val struct resource r0 NULL struct resource rl NULL struct resource r2 NULL struct resource temp res NULL struct demo fifo dev the demo fifo dev uint32 t fifo level if Cdown interruptible amp g dev list sem return ERESTARTSYS ret val ENOMEM Our probe routine allocates the storage for our device structure rather than using a statically allocated structure like the previous examples allocate a demo f1 structure the demo fifo dev sizeof struct demo fifo dev GER KERNEL 1f Cthe d
95. ration Public AN S A How do we get our hardware system definition into the software domain 2015 Altera Corporation Public Hardware details into software development flow lt One of the first challenges that we encounter if we want to write software to interact with our FPGA hardware is communicating the hardware architecture details into our software development environment The Altera Quartus and Qsys tools provide various pieces of output that can help us accomplish this with automated output from the Qsys system generation flow and the Quartus compilation flow he following slides describe what the hardware tools output and some utilities that can be applied to that output to create something that can be easily digested by the software development flow 38 2015 Altera Corporation Public Hardware Handoff Files to Software Environment 01 ls r sopcinfo hps_i sw_handoff 03 soc_system sopcinfo 05 hps_1sw_handoff soc_system_hps_0 06 tclrpt h sequencer_defines h 07 tclrpt c sequencer c 08 system h sequencer auto inst init c 09 soc system hps O hiof sequencer auto h sequencer h sequencer auto ac init c 39 2015 Altera Corporation Public sdram 1o h 1d hps xml emi f xml alt types h These files are generated in the Quartus project directory as a result of Qsys system generation and Quartus compilation AN S A Hardware Handoff
96. readelf arm linux gnueabihf size arm linux gnueabihf strings arm linux gnueabihf strip The typical Linaro GCC tools for ARM linux development arch firmware kernel Module symvers sound The standard kernel block fs lib net System map COPYING include MAINTAINERS README tools source tree output CREDITS init Makefile REPORTING BUGS usr directory crypto ipc mm samples virt Documentation Kbuild modules builtin scripts vmlinux drivers Kconfig modules order security vmlinux o 2015 Altera Corporation Public Kbuild file t Kbui ld zg rn Lo We start with a standard Kbuild file et By Ve to define what modules we wish to obj m demo module 02 0 TEE Tow dis daga ri build in our development directory 5 obj m demo module 04 0 obj m demo module 05 0 obj m demo module O05t o obj m demo module 06 obj m demo module 07 obj m demo module 08 obj m demo module 09 obj m demo module 10 obj m demo module 11 gt Obj m demo module 11t o O O O O O O 73 2015 Altera Corporation Public ANU S RYA e 74 Makefile 1 cat Makefile 22 ifndef OUT DIR We use a standard module Cerror OUT DIR is undefined bad environment Makefile in our development you point OUT DIR to the linux kernel build output directory 5 directory 5 endif 98 KDIR OUT DIR default MAKE C KDIR M PWD gt clean MAKE C KDIR M PWD clean he
97. repository is located on rocketboards org git clone glt git rocketboards org linux socfpga glt Module writers should be familiar with the Kbuild environment used by the kernel build flow linux socfpga Documentation kbuild linux socfpga Documentation kbuild modules txt Module writers should be familiar with the kernel coding style especially if you plan to upstream your work linux socfpga Documentation CodingStyle OUT DIRY scripts Lindent source file gt OUT_DIR scripts checkpatch pl file strict source file gt Kernel tainting linux socfpga Documentation oops tracing txt GIT resources and documentation http git scm com http gitref org 70 2015 Altera Corporation Public JAN DTE RYA ge Setup the development environment ARCH should be arm for the Cortex A9 export WARS a rn CROSS_COMPILE should point into the target cross compiler tools directory and contain the prefix used by all the target tools in that directory export CROSS COMPILE Cut soc workshop toolchain bin arm linux gnueabihf OUT_DIR should point into the linux kernel build directory that s where the config file resides for the kernel that we re building against export OUT DIR cut soc workshop socfpga 3 10 tsi When we re going to be compiling drivers against the kernel that we built for our target platform it s rather convenient to define these
98. s on an empty FIFO and waits for the write routine to clear the wait queue while ioread32 the_demo_f1fo_dev gt 1oremap_1n_csr_addr FIFO LEVEL REG 0 1 up E if he demo fifo dev wait queue 10read32 the demo fifo dev 1oremap in csr addr FIFO LEVEL REG 0 pr info demo fifo read wait interrupted exit n return ERESTARTSYS if down interruptible C amp the demo fifo dev dev semi 1 pr info demo fifo read sem interrupted exitXn return ERESTARTSYS 199 2015 Altera Corporation Public NOTE R A E demo module 10 c Multiple Device Instances Space fifo level ioread32 the demo fifo dev 1oremap in Cer addr FIFO LEVEL REG while Cfifo level gt 0 temp data 1oread32 the demo fifo dev 1oremap out addr FIFO DATA REG 1f Been butter amp temp data 4 up e demo fifo dev dev sem pr info demo fifo read copy to user exitvn return EFAULT Then we read whatever we HI gt 2 can out of the FIFO up to fifo_level this_count 4 count count 4 if count 0 break dev sem the demo fifo dev wait queue return this count And we wake the wait queue y when we re finished 200 2015 Altera Corporation Public Kernel demo module 10 c Multiple Device Instances Space static ssize t demo fifo write struct file fp const char user user buffer size t count loff t o
99. set ak ts us dma handle dma map single dev pdev dev g kmalloc ptr 4k f ofst this loop count iF CENS NEC ev gt pdev_ dev dma handle 1 up amp dev gt sem Us Our streaming read first dma_maps the g kmalloc ptr 4k to a dma_handle last dma handle 1 last dma handle 0 before the DMA This performs the last dma handle O dma handle cache maintenance for us 1owrite32 ram ptr g 1ioremap desc addr DESC READ ADDRESS REG 1owrite32 dma handle g 1oremap desc addr DESC WRITE ADDRESS REG 1owrite32 this loop count g 1ioremap desc addr DESC LENGTH REG 1owrite32 START DMA MASK g ioremap desc addr DESC CONTROL REG descriptor configuration temp dma count this loop count ram ptr this loop count next dma 1o buf ofst this loop count if next dma 1o buf ofst gt PAGE SIZE next dma io buf ofst 0 2015 Altera Corporation Public JAN DTE RYA 181 Kernel demo module 09 c DMA Space g kmalloc ptr 4k next dma 1o buf ofst if re er dma handle 1 up ev gt sem j while temp user count gt 0 1 if Ctemp dma count gt 0 dma handle CUT as ast_dma_handle_0 last_dma_handle_1 dma handle last dma handle O 1owrite32 ram ptr g ioremap desc addr DESC READ ADDRESS REG 1owrite32 dma handle g ioremap desc addr DESC WRITE ADDRESS REG 1owrite32 this loop count g ioremap desc addr DESC LENGTH REG 10
100. st n goto bad_exit_kfree_the_demo_fifo_dev We expect the FIFO devices to present three memory rl platform get resource pdev IORESOURCE MEM 1 resources if rl NULL Dr ert IORESOURCE_MEM 1 does not exist n goto bad_ex1t_kfree_the_demo_f1fo_dev J j r2 platform get resource pdev IORESOURCE MEM 2 if r2 NULL pr_err IORESOURCE_MEM 2 does not exist n goto bad_exit_kfree_the_demo_fifo_dev 192 2015 Altera Corporation Public NOTE R A E demo module 10 c Multiple Device Instances Space associate the resources for in out and in csr if Clstrcmp rO name in the demo fifo dev in res else 1f strcmp rl name 1n the demo fifo dev 1in res rl rO We don t assume the order else if strcmp r2 name in in which the resources are the demo fifo dev in res r2 presented our software the demo fifo dev out res r0 resource belongs to which else if strcmp ri gt name out register set So we figure the demo f1 fo dev out res r1 that out by the name else if strcmp r2 name out uu the demo fifo dev out res r2 associated with each resource if lstrcmp rO gt name in csr the demo fifo dev in csr res r0 else if strcmp rl name in csr the demo fifo dev in csr res rl else if strcmp r2 name in csr the demo fifo dev in csr res r2 193 92015 Altera Corporatio
101. stalled 04 demo devmem h 05 demo devmem t 06 demo devmem o hexdump Cv 07 demo devmem a hexdump Cv 08 dd 1f dev zero demo devmem f 09 demo devmem a hexdump Cv 10 demo devmem d 11 demo devmem a hexdump Cv 62 O 2015 Altera Corporation Public JAN DTE RYA e demo devmem target demonstration 01 demo devmem t 03 CPU reads from timer registers 63 Cortex A9 Cluster F2H IRQ M memcpy msgdma IRQ K CR CR demo driver subsys O aos 24 25 a RAM 1K ge MEMORY F2HAXI S LS ROM 1K ard CONTROLLER T 28 SLLWH2F AXL MA AL INTERVAL TIMER IRQ j 29 2015 Altera Corporation Public JAN DTE RYA m 64 demo devmem target demonstration 01 demo devmem o 02 03 CPU reads from ROM 04 05 06 07 08 09 10 ll 12 13 Cortex A9 Cluster ep Core O Core 1 M 15 Coreo Corea 17 32K IS 32KD 32K IS 32K DS 17 saris 3205 _ 32615 32x05 19 2 ww 21 22 A ee S fifo o demo driver subsys 0 25 pi ton 26 MEMORY oN ROK 28 CONTROLLER INTERVAL TIMER IRQ 29 30 2015 Altera Corporation Public JAN DTE RYA m demo devmem target demonstration 01 demo devmem a 03 CPU reads from RAM Cortex A9 Cluster O mw 32K I 32K D 32K I 32K D zi NU F2H IRQ
102. sysfs files platform driver register amp the platform driver that we can interact with our custom API through the sysfs entries driver create file amp the platform driver driver amp driver attr target driver create file amp the platform driver driver amp driver attr increment driver create file amp the platform driver driver amp driver attr decrement driver create file amp the platform driver driver amp driver attr complement bad exit remove decrement file driver remove file amp the platform driver driver amp driver attr decrement bad exit remove increment file driver remove file amp the platform driver driver amp driver attr increment bad exit remove target file driver remove file C amp the platform driver driver amp driver attr target bad exit platform driver unregister platform driver unregister amp the platform driver bad exit return return ret val ANU amp RYA 2015 Altera Corporation Public Kernel demo module 11t c Custom API Space static uint32 t g target static ssize t target show struct device driver driver char buf i E return scnprintf buf PAGE SIZE 0x 08XNn g target static ssize t target store struct device driver driver const char buf size_t count int result unsigned long new target convert the input string to the requested new target value result kstrtoul buf 0 amp new targe
103. t if result 0 return EINVAL These are our target g_target new_target variable access return count routines j DRIVER ATTR target S IWUGO S IRUGO target show target store 209 2015 Altera Corporation Public ANU S RYA e Kerne demo module 11t c Custom API Space static ssize t increment show struct device driver driver char buf i demo increment amp g target return scnprintf buf PAGE SIZE Ox 08x n g target DRIVER_ATTR 1ncrement S IRUGO increment show NULL static ssize t decrement show struct device driver driver char buf d demo decrement amp g target return scnprintf buf PAGE SIZE 0x 08x1n g target DRIVER ATTR decrement S IRUGO decrement show NULL static ssize t complement show struct device driver driver char buf d demo complement amp g target return scnprintf buf PAGE SIZE 0x 08x1n g target DRIVER ATTR Ccomplement S_IRUGO complement show NULL 3 D These are our target increment decrement and complement access routines 2015 Altera Corporation Public JAN DTE RYA demo module 11 ko target demonstration insmod demo module 11lt ko observe module insert fails 1nsmod demo module 11 ko insert module insmod demo module 11lt ko insert module find sys name demo observe entries created ls sys bus platform drivers demo driver 11t observe sysfs files
104. t command of the previous block should stall forever A C and run this block next dd 1f dev zero bs 4 count 1 tr NOO0 377 gt amp 7 enable IRQs for I 1n 12 34 5 do dd bs 4 count 1 O amp 7 hexdump Cv read an IRQ event done finally run this command exec 7 lt gt dev nul close dev u100 2015 Altera Corporation Public JAN DTE RYA demo module 08 ko target demonstration 2 91 demo uio test h demo uio test t 093 demo uio test o hexdump C demo uio test a hexdump C 35 dd 1f dev urandom demo uio test f 06 demo uio test a hexdump C 97 Is sys class u10 u100 98 cat sys class u1o u100 event 99 dd 1f dev u100 bs 4 count 1 hexdump Cv printf d n hex number cat sys class u1io u100 event rmmod demo module 08 168 2015 Altera Corporation Public THE dk dk k dk A ik dk dk GE dk run demo uio test exercise timer regs dump rom dump ram fill ram dump ram to verify observe the event entry dump the event entry read another IRQ convert the hex number to dec verify event count matches remove module 2015 Altera Corporation Public 169 demo module 09 User Space DIVA DIAY demo_dma_st demo_dma_co demo module 09 demo driver 9 dma alloc coherent 4k pese EE memcpy msgdma dma alloc coherent 1M demo mencpy_msgdma Kernel Space 170 2015 Altera Corporation Public
105. this_loop_count up amp dev gt sem j temp user count this loop count user buffer this loop count next user io buf ofst this loop count if next user 1o buf ofst gt PAGE SIZE next user 1o buf ofst 0 Continues to directly interact with the g dma handle 4k AN S A 179 Kernel demo module 09 c DMA Space static ssize t demo dma co write struct file fp const char user user buffer size t count loff t offset CU while Ctemp count gt 0 while get_dma_fill_level gt 2 if walt_event_interruptible g_ rg_wait_gueue get dma fill level lt 2 1 CE j if Ceop from user g coherent ptr 4k next_io_buf_ofst user buffer this_loop_count 1 vs GI E scs j 1owrite32 g dma handle Ak next io buf ofst og ioremap desc addr DESC READ ADDRESS REG 9 iowrite32 ram ptr g_ioremap_desc_addr DESC WRITE ADDRESS REG 5 oO 1owrite32 thi1s loop count o c g ioremap desc addr DESC LENGTH REG O Q jowrite32 START_DMA_MASK I g_ioremap_desc_addr DESC CONTROL REG ssa e tias i i M d Our coherent write directly interacts with the g dma handle 4k as well AN S A 2015 Altera Corporation Public 180 Kerne demo module 09 c DMA Space static ssize t demo dma st read struct file fp char user user buffer size t count loff t offset 1 e CUT ram ptr g dma handle 1m ram ptr off
106. three variables in our environment so the kernel makefiles have access to their values To compile a kernel module our architecture is always going to be arm we need to have access to the cross compiler tools that the kernel was built with and we need to have access to the kernel output directory so our module can inherit the kernel configuration that we re running on the target 71 O 2015 Altera Corporation Public JAN DTE RYA e 72 Setup the development environment 1 echo 1CROSS COMPILE Cut soc_workshop toolchain bin arm linux gnueabihf 1 ls arm linux gnueabihf addr2 line arm linux gnueabihf ar arm linux gnueabihf as arm linux gnueabihf c arm linux gnueabihf c f11t arm linux gnueabihf cpp arm linux gnueabihf ct ng config arm linux gnueabihf dwp arm linux gnueabihf elfedit arm l1inux gnueabihf g arm l1inux gnueabihf gcc arm linux gnueabihf gcc 4 9 2 arm linux gnueabihf gcc ar arm linux gnueabihf gcc nm arm linux gnueabihf gcc ranlib arm linux gnueabihf gcov arm linux gnueabihf gdb 1 ls OUT_DIR cut soc_workshop toolchain bin arm linux gnueabihf gfortran arm linux gnueabihf gprof arm linux gnueabihf ld arm linux gnueabihf ld bfd arm linux gnueabihf ldd arm linux gnueabihf ld gold arm linux gnueabihf nm arm linux gnueabihf objcopy arm inux gnueabihf objdump arm linux gnueabihf pkg config arm linux gnueabihf pkg config real arm linux gnueabihf ranlib arm linux gnueabihf
107. ty lt Run a validation program Verifies the lab was completed Submit results amp feedback 215 2015 Altera Corporation Public ANU amp RYA E Thank You Ef 2015 Altera Corporation Public All rights reserved ALTERA ARRIA CYCLONE ENPIRION MAX MEGACORE NIOS QUARTUS and STRATIX words and lagos O are trademarks of Altera Corporation and registered in the U S Patent and Trademark Office and in other countries All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www altera com legal
108. wr1te32 START_ZDMA_MASK g ioremap desc addr DESC CONTROL REG descriptor configuration se CUC ss Then it continues to dma map the g kmalloc ptr 4k again 2015 Altera Corporation Public JAN DTE RYA m Kernel demo module 09 c DMA Space else while get dma busyO 0 if Cwait event interruptible g irq wait queue get dma busy 0 1 D o uas j while oer dma fill level gt 0 1 if wait event interruptible g 1irq wait queue get dma fill level 0 1 SCIL j if last d last dma handle 1 O0 else if O 0 d midi en de last dma handle last dma handle O 0 j if copy to user user buffer g kmalloc ptr 4k next user 1o buf ofst this loop count 1 a CUE M i d Then it dma unmaps the dma handle before using the g kmalloc ptr 4k 2015 Altera Corporation Public JAN DTE RYA 182 Kerne demo module 09 c DMA Space static ssize t demo dma st write struct file fp const char user user buffer size t count loff t offset Cu wc ibas ram ptr g dma handle 1m The streaming write uses the e TE F offset g kmalloc ptr 4k first while Ctemp count gt 0 1 while oer dma fill level gt 2 if wait event interruptible g irq wait queue get dma fill level lt 2 1 Class J if Clast dma handle 3 0 dma unmap single dev pdev dev last dma handle 3 this loop count DMA TO DEVICE last dma handle 3
109. x65 0x00 define define MEMCPY_MSGDMA_REG_ENTRY proc device tree sopc 0 bridge O0xc0000000 msgdma 0x1000200 MEMCPY_MSGDMA_REG_VALUE 0x00 0x00 0x00 0x01 0x00 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x02 0x00 0x20 0x00 0x00 0x00 0x10 define define define define define 2015 Altera Corporation Public driver hardware map Various system parameters that ROM OFST 0 define our hardware and device ROM SPAN eie tree values we can validate RAM OFST ROM OFST ROM SPAN M F RAM_SPAN 1024 against at run time from user TIMER OFST RAM_OFST RAM_SPAN space demo devmem build script 01 b n sh 33 type t CROSS_COMPILE gcc gt dev null 2 amp 1 echo echo ERROR cross compiler tools are not visible in the environment echo IT exit 1 08 3 A typical gcc invocation is all it 9 takes to build the application CROSS_COMPILE gcc V march armv7 a V mfloat abi hard V mfpu vfp3 V mthumb 1nterwork V mthumb 02 g N feliminate unused debug types N std gnu99 V W H wall V werror V WC compat Wwrite strings N Wstrict prototypes V pedantic V 0 demo devmem V demo devmem c 61 O 2015 Altera Corporation Public JAN DTE RYA e demo devmem target demonstration Ol alias ls 1s colorznever if you d like to disabled colored output for lei 02 cd examples drivers this 1s where the example programs are in
110. y UIO An example of the basic UIO template usage is demonstrated in the lab work that accompanies the WS3 session 2015 Altera Corporation Public JAN DTE RYA e demo module 08 User Space ulo0 demo_module_08 demo driver 8 1oremap demo_dr ver_subsys_0 demo dr ver 1 0 Kernel Space 158 2015 Altera Corporation Public Kernel demo module 08 c uio device Space static int platform probe struct platform device pdev CU acquire the probe lock Cut get our first memory resource We start our probe se bars P am M B function in much the same get our interru resource I way as before We get our clock resource reserve our memory Zl E region and then configure reserve our memory region E us X the uio info struct 10remap our memory region CHE A basic UIO driver would initialize uio info struct uio mem array the uio info mem O0 memtype UIO MEM PHYS not be concerned about Che uio info mem 0 addr r gt start reserving the memory the uio info mem O size resource size r region Or ioremap ing the the uo info mem 0 name the uio info mem O0 internal addr g 1oremap addr demo uio driver hw region IO space since the kernel space UIO driver would for Ci 1 i lt MAX UIO MAPS i not be interacting with the the uio info mem 1 size 0 hardware directly initialize uio info irq

WS3 – Developing Drivers for Altera SoC

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WS3 &ndash; Developing Drivers for Altera SoC

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WS3 – Developing Drivers for Altera SoC