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User Manual STK85xx - TQ

1. I 3 4 MIN Backup Batter Supply from AC ES Adapter Supply from ATX supported 1 not supported by CPU module 2 not supported by STK85xx a common I O voltage with TSEC1 b only via RS232 transceiver on module c only 24 bits present NSTK85xx UM 106 Page 13 of 39 ID components STK85 xx User Manual Further deviating signals can be guided in the area of Test Extension strips refer 4 3 by differential assignment of the Module Connector An overview of the differential assignment is shown in Illustration 2 TOM8349 1OM8555 TOMS8560 TOM2349 1OM8555 TOMS8560 T MS8560 TOM8555 TOMS349 LBUS LEUS LEUS Ra MPH1 DebugiTest D ebugiTestp E IO1 GTMT1 LEUS TSECZHOT TSEC TSEC TSEC1102 TSEC TSEC1 FB FEG IDehug TestiDebugiTest IR DMA IRQ DMA J IRGIOZ Debug Test Debug Test Debug Test hMan CPU Bon CPU Nan cPLI R5232 R5232 R5232 A PCIFEC UART zres XEM PDILUART UART 4 MP X Illustration 2 Overview Module Pin outs 4 1 2 Precautions for operation with TQM8349L 47L STK85xx in Rev 100 was not developed for operation with a TQM8349L 47L But operation with it is possible due to the Pin compatibility of the Module e Functional limitations refer 4 1 1 e Additional circuits and configuration possibilities refer below e References to PCI Bus Clocking refer 4 2 5 STK85xx UM
2. 5 Mechanical Specification 5 1 Dimensions STK85xx is mechanically compatible with the ATX Form factor of PC Motherboards The outer dimensions of STK85xx are 305 mm 244 mm The following Illustration shows the important dimensions 304 8 12 00 288 28 11 35 18 52 D 65 581 54 11 10 124 48 4 90 78 74 3 10 E Ye rum 10 16 0 40 154 94 6 10 154 84 6 10 227 33 8 95 243 84 9 60 233 68 9 20 227 33 8 85 124 48 4 50 281 94 11 10 Illustration 7 Dimensioned Drawing STK85xx NSTK85xx UM 106 Page 37 of 39 IT components STK85 xx User Manual 6 Safety requirements and protection provisions 6 1 Climatic and installation conditions Ambient Temperature 0 50 C Storage Temperature 25 70 C Protection Class IPOO no special protection against foreign bodies and moisture 6 2 Reliability and durability The components are designed for a typical durability period of 5 years 6 3 Environment protection We contribute to environment protection by environment friendly processes operating tools and products To reuse the used product it is manufactured in such a manner that it can be easily repaired STK85xx UM 106 Page 38 of 39 oe i Hus sjueuodui02 O I Aq 90020 90 FINN XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH STK85 xx User Manual If components 7 Enclosures 7 1 Further documents 1 MPC8560 Integrate
3. Hus sjueuodui02 O I Aq 90070 90 FINN XXS8YLS STK85xx UM 106 02006 by TQ Components GmbH Pi OLE e STK85 xx User Manual ID components signal ADDR 4 0 0b0001 PHY address 3 1 PAUSE Advertise pause capabilities SLEEP 0 Disable sleep mode 0 Disable power down mode Auto negotiation 10 100 MBit full half duplex Fast Ethernet Interrupt PHY interrupt disabled 1 2 PHY interrupt connected to IRQ8 Fast Ethernet Management data interface Management data interface disabled 1 2 Management data interface enabled X47 X50 Fast Ethernet MII multiplexinc FCC1 FCC2 FCC3 FEC disabled a b FCC1 selected TQM8560 only X47 2 X50 2 a c FCC2 selected TQM8560 only X50 2 1 FCC3 TQM8560 FEC TQM8540 X50 2 3 selected Note Setting a d gives a contention with UARTO on TQM8555 41 4 2 3 Parallel Rapid I O HIP Slot Rapid I O combined with PCI Rapid I O Data on X3 Rapid I O supply on X60 X78 PCI X on X103 For individual Signal assignment refer to the RIO Rapid I O schematic Controller RIO in CPU on TQ Module External clock up to 500 MHz is possible Jumper STK85xx HIO enables direct connection of two STK85xx via X3 Reference Use of Parallel Rapid I O is not recommended by Freescale Please contact your sales representative in case you intend to use Parallel Rapid I O Transmit Clock Mode Cfg rio clk 0 1 Rapid I O receive cl
4. Page 11 of 39 RS 232 IF GBit Ethernet 1 GBit Ethernet 2 Fast Ethernet an RJ 45 SubD 9 Plug tech ENMON JTAG IF Par Port an Ry 45 an RU 45 100BASE THO BASE T MR EG 8 EE RL 1 ET EE ER T i 3 PT AIT ral ASI TOU HUM IQBASE T l LU JUR jn Di at I exiema JTAGICOP IF POWER AV gt 33V OSSJAKVH245 QS34XVH245 Reset Key eve 32 Bit BusSwih 32 Bit BusSwitch Module IF Power Distribution amp Control ADC 25 TSEC1 16 FOC 3 Switch open for POL X Mode Jumper for Boardkorfiguration PCI Slot1 PCI Slotz2 PC device3 S34 XVH245 32 Bit BusSwilch An QS34 XVH245 37 Bil BusSwilch L QS34 XVH245 32 Bit BusSwitch S Socket Controller PCI1520 TI 3 3V Portpins on Pin Rows Ports D Socket Power Switch TP92226 IT 2 Nos PC Card Socket Connector Pin Rows for Viodule signals RIO A 1 0 Slot 2 Mos PC Card Socket PCI Illustration 1 Block circuit diagram PS 2 1F Mouse amp Keyboard Per i Frue CompactPCl Slot yellow Key Pin Rows 30 Test PLDs PCI Control Logic for STK85XX Board Test p embedded in oO ehh PCI X JTAG Chain PGH kork Distribution I I IL T osm nemne nuns o CPC Erertaltti Wa Jung STKADS T Q LI n FL inm vases mens Bloolallagramm z n PC Card T eee TOc ina 2 x lt 9 L 90 L INXXS8MIS Haw sjueuodui02 O Aq 90020 IO components STK85 xx
5. 4 4 9 Power Supply 3 3 V rrnnernnnnnnnnnornnnnnnnrvnnvnnnnnnrvnnnnnnnnsnnnnnnnnnnsnnnnnnnnnsnnnnnnnnnsrnnnnnnnnsenennnnn 32 4 4 10 Power Supply 2 5 V sssssssssssssseeseeeenne nennen nennen nnn nnns naar nnn nna nnn nnns nnns 32 TN PN 32 15 TET 33 GO PID CON Sin 33 STK85xx UM 106 Page 2 of 39 F E Qe Hu sjueuodui02 O I Aq 90070 90 FINN XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH STK85 xx User Manual TO components M2 TE A H 33 4 5 3 Scan chain JTAG and Programmer adaptor eese 33 4 5 4 Testing pins seesssssssssssssseseeeenennnen nennen nnnm nnnm nnne nnne nnne nnne nnne nnns 35 2 PUTE 35 46 J mpers Description e 36 5 MECHANICAL SEN 37 S MEE ie cmm 37 6 SAFETY REQUIREMENTS AND PROTECTION PROVISIONS rrrrrnrrvvrrnnnrrrrvnvrnnnnrrrnnrnnnsnn 38 Sek ne det knee Me 00650100 0 PE 38 62 FN NNN ERE 38 eno MEME saa sl Le le E EEr Anea E aE aeanoea AERON 38 E ENGCO URE EEE ENE 39 7 1 Further 00160 cT 39 NSTK85xx UM 106 Page 3 of 39 In components Illustration 1 Illustration 2 Illustration 3 Illustration 4 Illustration 5 Illustration 6 Illustration 7 List of Figures Block circuit diagram ccccceeeccccseeeeecceeeeeeeseaeeeeeaeeeeessaeeeessaeeeeeseneeeesseeeeesageeeeeeas 11 Overview Module PIIiJOUlS cc cecicccccecstssccecccecccsteseseseseeesel snsdnostoeseeseieescaceeaeeeanaseeds 14 Structure
6. 47L rrnnnnnnnnnnnnnnnrrvvnnnrnnnnnnnrsrrnnnnrnnnnsnnne 14 4 1 3 Precautions for operation with TQM8555 41 rrrnrnnnnrrnnnnnnnnnrnnnnrnnnnnnnnnrennnnrnnnnnnnnee 15 414A Local BUS EEE EE EE 15 LP MEME da INEGI Ve EEE 16 BENN 16 221 TEN 16 NE TOEO 17 4 2 2 Fast Ethernet rrrnenrnnnrnvnnnrrnvnnnrnvnnennnnnrennnnrrnnnnsrnnnnnrnnnnnennnnnrnnnnnennnnnrnnnnnrnnnnnsnnnnnsen 18 12 PN NNN 19 2 NNN 20 2271 SN 20 4242 UN 21 225 Pl Pluss 21 a2 POBE ON 23 A oe os NN 24 22 SMP MN 24 42 54 PO Gard IMeENE06 ss psp 25 EEE GE EE SSN SSS 25 4 2 7 Ger at VG 6 ee eee ee ee EU 26 4 3 Test PINNE 26 44 Mioma GE EE 26 4 4 1 JTAG Debug Interface rrrrrnnrnrvnrnnnrvvvnnnnrrvrnnnnrerrnnnrrnnnnnnrrnrnnnnrenrnnnnennnnnrrnnnnnnsenn 26 4 4 2 JTAG Debug Interface via Parallel Port rrrrnnrrrnnnnnrrvnnnnnrervnnnrenvrnnnrrnnnnnnnennnnnnnen 27 EE EE EE 27 4 4 4 General Purpose LEDS rronnnnnnnnrnnnnnnvrnrrnnnnnrennrnnnnnrnnrnnnnrnennnnnnsnnsennnnnnnssrnnnnnnsnsernnnnnn 28 LES EOM FEN 29 44 6 Buller battery TOM Fl C S E 29 4 4 7 Power 10 Ae 29 4 4 7 1 Supply from the DC power supply ccccccceccseeeeeeeeeeeeeeeeeeeseeeeseeeeeeeaeeeeeeseaeees 31 4 4 7 2 Supply from the ATX power supply ccccccseeeeeceeeeeeeeeeseeeeseeeeeseeeeeeesesaeeeeens 31 4 4 7 3 Supply from a regulated power supply 24V DOC rrrrrnrnnnrrrvvnnnrnnnrrvvvnnnnnrrrernnnnnn 31 Ado FT 31
7. User Manual 3 2 Brief Description e 2 GBit Ethernet e 1 Fast Ethernet e 1 Parallel Rapid I O e 2 RS232 Interface RXD TXD e 1 PCI X e 1 Compact PCI e 2 PC Card Interface e 2 CAN e 2 PS 2 Interface Keyboard Mouse e Module Connector for TQM85xx or TQM83xx e JTAG Debug Interface e Reset Button e Circuit Jumper for Monitor Enable Signal e General Purpose LEDs e Buffer battery for RTC on the TQ Module e Power supply from the DC power supply ATX power supply or regulated 24V power supply A STK85xx UM 106 Page 12 of 39 Hquuc sjueuodui02 O Aq 90020 90 FINN XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH STK85 xx User Manual 4 Electronic Specification 4 1 Module in components 4 1 4 Functions depending on the installed Module type There are limitations to the usage of the functions available on the module or provided by the Function TQM8560 TQM8540 TQM8555 TQM8541 TQM8349L TQM8347L GBit Ethernet TSEC1 ji i i GBit Ethernet FCC1 FCC2 FCC3 FEC STK85xx RS232 1 RS232 2 Parallel Rapid O ee on ee b b ner en PCI as PCI X VM 4 a PCI1 64 Bit pO PCR 1 USB High Speed USB Full Speed CAN NO 1 Es 1 1 CAN PS 2 PS2 0 JTAG Debug Rest MEE General Purpose LEDs on TSEC1 General Purpose General Purpose
8. is inserted refer also Jumper X109 under 4 2 5 4 Status Control Register Bit Type Description 1 O 0 1 PCI X Capability 0b00 PCIXCAP open PCI X 133 MHz 0b01 reserved 0b10 PCIXCAP pull down PCI X 66 MHz 0b11 PCIXCAP connected to ground not PCI X capable Compact PCI Capability 0b00 reserved 0b01 reserved 0b10 CPCICAP pull down PCI X 66 MHz NSTK85xx UM 1 06 Page 23 of 39 x J It components STK85 xx User Manual N Bit Type Description 1 O E 0b11 CPCICAP connected to ground not PCI X capable SS PCI X Present 1 M 0 PRSNT 14 connected to ground card present 1 PRSNT 14 open no card present PCI X Present 2 0 PRSNT2 connected to ground card present 1 PRSNT2 open no card present Compact PCI Present 0 CPCI_PRESENT connected to ground card present 1 CPCI_PRESENT open no card present 0 at least one detected card not 66 MHz capable or no card detected on board PC Card controller is not 66 MHz capable 1 all detected cards 66 MHz capable 13 R W PCI X Enable 0 Compact PCI Slot and PC Card Controller disconnected PCI X possible reset state entered on HRESET 1 Compact PCI Slot and PC Card Controller connected to PCI A RTO BP R j O oj Jumper PCI X Enable Open Compact PCI Slot and PC Card Controller connected to PCI 2 1 Compact PCI Slot and PC Car
9. layer is correct 4 2 5 PCI PCI X e Controller PCI in CPU on TQM8560 40 PCI1 on TQM8349L 47L and TQM8555 41 e 3 3 V Signal 5 V intolerant e Clocking in Rev 1xx designed for TQM85xx PCI CLK OUTO and PCI CLK OUT 2 7 not used refer Illustration 4 and Illustration 5 STKB5xx UM 1 06 Page 21 of 39 J LAM TO components gt STKBS xx User Manual N STK85xx L CLKB USRO CLKB USRO CLKB USRt CLKB USR Zero e CLKB_USR_FBOUT CLKB USR FBIN Zero FEE Delay PCI CLK OUTO PCI CLK OUT1 PCI CLK OUT7 PCI SYNC IN PCI SYNC OUT Illustration 5 Structure PCI Clocks with TQM83xx Connections of REQ GNT Signals REQ GNT O O PCI PCIX Slot Compact PCI Slot STK85xx UM 106 F FEE Hquc sjueuoduJ05 O Ag 90070 9O0LF IN 1XXS98MIS STK85xx UM 106 02006 by TQ Components GmbH Jr y STK85 xx User Manual ID components REQ GNT Function SC eC PCI connections compatible with Freescale ADS except for IRQ6 instead of IRQ4 Device Slot Interrupt connections ADIO 8 PP M66EN determined by cards in PCI X and Compact PCI slot 1 2 M66EN forced low manually force 33 MHz Mode 4 2 5 1 PCI Bus Control e Status Control Register realized in PLD D21 e Control via Local Bus e Provides PCI Status signals Card Detect and Capability Signals e Controls the FET Switch for the PCI X Mode e Sets the PC Card Controller to the Reset mode as soon as at least a 66 MHz card
10. not be copied reproduced translated changed or distributed completely or partially in electronic or machine readable or in any form 1 8 Disclaimer TQ Components GmbH does not take the guarantee of the information given in this manual being latest correct and complete or of good quality as well as its further usage Liability claims against TQ Components GmbH referring to material or idea related damages caused due to usage or non usage of the information given in the manual or caused due to usage of erroneous or incomplete information are basically exempted as long as there are no proven intentional or negligent debts by TQ Components GmbH TQ Components GmbH explicitly reserves the rights to change or add to the contents of these manuals or parts of it without special notifications STK85xx UM 106 Page 8 of 39 pi as Hus sjueuodui02 O I Aq 90020 90 FINN XXGS8MLS STK85xx UM 106 2006 by TQ Components GmbH STK85 xx User Manual If components 1 9 Revision History Rev Date Name Pos Modification 103 25 10 05 JTR Compilation from STK85xx KO 006 034105 JIR Completion 09 1105 JIR Acceptthe results of the internal testing ME NENNEN 14 4 2 41 3 Headings TQM8347L and TQM8541 added 424 1 4 24 2 Disambiguation Configuration matrix 4 2 5 1 Implementation Status Control Register added 21 11 05 Correction Nu
11. supply X83 3 12 V from ATX power suppl VCC5 INN X85 1 X85 2 5 V supply from internal 5 V power supply or ATX power supply VCCS5VF X92 1 5 V supply to or from TQ module VCC5V X21 2 X8 3 5 V supply to STK85xx board 3 3 V supply from internal 3 3 V power supply or ATX power supply ka i 3 3 V supply to TQ module used by voltage regulators VCC3V3ID VCC3V3 X35 6 X45 1 3 3 V supply to STK85xx board STK85xx UM 106 3 3 V supply to TQ module VCC5V_P X78 1b 4b 5 V supply to PCI X78 1c 4c used directly Page 30 of 39 t Haws sjueuodui02 O Aq 90070 90 FINN XXGS8MLS STK85xx UM 106 2006 by TQ Components GmbH pg STK85 xx User Manual ID components Voltage Reference Pin X60 1b 4b 1V_PHY X87 1 1 V supply for GBit PHYs VBAT X86 1 DGND X81 3 X82 2 X83 2 Digital Ground X85 3 X86 2 X87 2 X92 2 4 4 7 1 Supply from the DC power supply e Power Supply Cincon Electronics TR70A18 01A03 18 V 3 9 A e Connection to the low voltage socket X24 internal conductor is positive e Generating 3 3 and 5 V on STK85xx through the regulator is automatically deactivated while connecting it to an AT X power supply adaptor e Available power is sufficient for the module TQM8560 40 TQM8349L 47L STK85xx and PC Cards however without PCI Compact PCI Plug in Card Jumper X41 3 3 V Enable Internal 3 3 V supply disabled 1 2 Internal 3 3 V supply enabled X62 5 V Enable Inter
12. 106 Page 14 of 39 Haws sjueuoduio2 O Aq 90070 90 WA XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH OLE e STK85 xx User Manual ID components A STK85xx UM 1 06 Page 15 of 39 J LVDD2 Separate TSEC2 I O voltage Caution No power sequencing guaranteed X38 6 X1 138 2 5 V via green wire power sequencing ok Caution No power sequencing guaranteed X38 6 X1 134 3 3 V via green wire power sequencing ok Note As LVDD2 will be supplied by the PHY via the CPU s I O protection diodes leaving L VDD2 open will also work under laboratory conditions Configuration Signals at Reset SEL CLKIN DIV CFG CLKIN STK85xx TRIG IN DIV X14 Pin 7 0 J SOO J CLKIN PCI SYNC OUT 1 1 CLKIN PCI SYNC OUT 2 1 oed po SEL RESET SOURCE CFG RESET STK85xx TRIG OUT SOURCE 0 2 X14 Pin 8 0 J 0b000 or 00010 I2C EEPROM High Speed I2C EEPROM Low Speed not recommended use 0b010 instead Z open not connected 4 1 3 Precautions for operation with TQM8555 41 STK85xx in Rev 100 was not developed for operation with a TQM8555 41 But operation with it is possible due to the Pin compatibility of the Module e Functional limitations refer 4 1 1 e NO special precautions are required 4 1 4 Local Bus e Connected components PCI Bus Control PLD D21 A D Converter Control PLD D39 e Further PLD as Bus drive D37 S 99 In components
13. EC2 TX 0 7 or TSEC1 TXD 0 7 LED s Reference Signal Description gt Port Signal active high Port Signal active high am ee ml le le ml Nr Port Signal active high Port Signal active high Port Signal active high Reference Signal Description 1 G TSEC2 TXDO active high TSEC2 TXD1 active high TSEC2 TXD2 active high PCI AD43 General Purpose Output as configured by X30 X67 TSEC1 TXD4 TSEC2 TXD5 active high STK85xx UM 106 Page 28 of 39 PCI AD44 General Purpose Output as configured by X30 X67 TSEC2 TXD3 active high Hus sjueuodui02 O I Aq 90020 90 WA XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH STK85 xx User Manual lo components TSEG1 TXDS 00 00 00 00 0 0 0 V32 PCI AD41 General Purpose Output as configured by X30 X67 TSEC2 TXD6 active high 33 TSEC1 TXD6 V PCI AD40 General Purpose Output as configured by X30 X67 TSEC2 TXD7 active high TSEC1 TXD7 Jumper X30 General Purpose LEDs PCI TSEC LEDs driven by TSEC1 TSEC2 1 2 LEDs driven by PCI AD X67 General Purpose LEDs TSEC1 2 LEDs driven by TSEC2 1 2 LEDs driven by TSEC1 TQM8349L only 4 45 Fan Connection e Available on the socket X80 for individual Signal assignment refer to the Fan schematic e 5V 12 V possible as an assembly option e Input speed can be applied to the Interrupt IRQ7 Jumper F
14. For technology in Guality User Manual STK85xx STK85xx UM 106 27 06 2006 mum mane spon UeMawd 16 06 2006 J Trepte STK85xx Checked 27 06 2006 STK85xx UM 106 Fa Tri CAN TQ C Docs Documentations STK85xx STK85xx UM 106 doc Sample revision 001 C TQ Systems GmbH All the information included in this document is strictly confidential Transfer of the illustrations and information to a third party requires a written consent of TQ components GmbH h In components Table of Contents STK85 xx User Manual 1 ABOUT THIS NC 5 1 1 Terms and COnventiOns ccccccscceecceeceeseeeeeceeeeceeeesaeeeeeeeesseeeeeeeesseeaeeeeeesseaeeeeeessaaeeeeeeeeas 5 1 2 Acronyms and Definitions rrnnrrnnnnnrvnnnnrvvnnnrnvnnnrrnnnnrennnnrennnnrennnnrennnnnennnnnrnnnnnennnnnennnnsnen 6 To 0 OE y ERE 7 1 4 Handling ESD TIPS Vee 7 1 5 Registered Trademark rrrnnnnnrnnnnnnnrnnrnnnnrnnnnnnrrnnnnnrrnnnnnnrnnnnnnnrnnnnnssrnnnnnnsnnnnnnnennnnnnsrnnnnnnsene 7 EE RR 8 LT NNN 8 UP MEME e Eoo 8 Uo REVISON 0 RM 9 o CENERAL e S 10 B SEN RENTE hhv 11 o1 BAND 11 2e BIDO DION EEE EEE 12 4 ELECTRONIC SPECIFICATION ccccccccccssssseeeeeeccseeesseeeeececeeeeussseeeeeeseseeaasseeeeeeeeseeeaas 13 EE 13 4 1 1 Functions depending on the installed Module type rrrrrrnrrrvrrnnrrvvrrnnvrvennnnrrennnnnnnenn 13 4 1 2 Precautions for operation with TOQM8349L
15. Local BUS c cccceecceeceeceeeceeceeceeeeeeeeeneeeeeseeeeeeneeneeeeeseeneeseeseeneeneesennenens 16 Structure PCI Clocks with TQMBBB5Xx eseeseeen m Hmmm mre 22 Structure PCI Clocks with TQMBS3Xx eseseeenm mmis 22 VAN Nl 30 Dimensioned Drawing STK85XX rrrnnrnnennnnnnnvnnnnnrennnnnrrennnnnrennnnsnennrnnsnsnnnnnsnennnnnsnen 37 A STK85xx UM 106 Page 4 0f39 STK85 xx User Manual Hqw sjueuodui02 O Aq 90070 901 WA XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH e STK85 xx User Manual ID components 1 About this Manual This manual contains the technical information about the STK85xx specifications 1 1 Terms and Conventions This symbol represents the handling of electrostatic sensitive modules and or components These components are often damaged destroyed with the transmission of a voltage higher than about 50V Human body usually notices electrostatic discharges only above approximately 3 000V This symbol indicates the possible use of voltages greater than 24V Please note the relevant statutory regulations in this regard Non compliance with these regulations can lead to serious damage to your health and also cause damage destruction of the component This symbol indicates the possible source of danger Acting against the procedure described can lead to possible damage to your health and or cause damage destruction of the material used This symbol represents important detail
16. N3 PLD on TQ module TN4 D2 X1 CPU on TQ module Programmer connector PLDs suitable for the Lattice Programmer adapter PCI Bus Control PLD Bus Driver PLD TN1 TN2 TN3 PLD on TQ module TN4 Further JTAG adaptors assignment refer power supply diagram Device Fast Ethernet PHY LXT971A Gbit Ethernet PHY 88E1111 TSEC1 Gbit Ethernet PHY 88E1111 TSEC2 STK85xx UM 106 Page 34 of 39 d a Hus sjueuodui02 O I Aq 90020 90 FINN XXS8YLS STK85xx UM 106 2006 by TQ Components GmbH y STK85 xx User Manual ID components Other programmer adaptors Connector Device Description X40 D11 PS 2 Controller PIC16F627 mates with Microchip programming tools e g ICD2 4 5 4 Testing pins e Signals that are used only for the module tests are not guided to the module connector but to the testing point on the lower side of the module e All test points can be directly contacted by the test pins soldered in the STK85xx circuit board diameter 1 37 mm length unloaded fitted with springs 15 5 12 mm e If the signals are not available on other connectors the signals are provided on X74 X74 Pin TestPin Description Signal Description 4 Flash on TQ module WP ACC pins connected together 2 TN8 CFG ERR PLD on TQ module configuration error PJ MER g re CFG RDY eee gjestenes lt 8 DGND 4 5 5 CPU Type e The processor t
17. SOUTO O Transmit data RS232 level 5 GND GND Ground gt 1 RESIN RESIN Reset input connected to Reset input of supervisor circuit RS232 level tolerant 0 Reset 1 No reset STK85xx UM 106 Page 20 of 39 Hus sjueuodui02 O 1 Aq 90020 90 FINN XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH e STK85 xx User Manual ID components Signal Signal Type Description TQM8560 TQM8540 ENMONH ENMON Temporary input for MON85xx MON83xx software RS232 level tolerant 0 Interactive Mode responds to RS232 commands 1 Initial Mode initialize CPU and start application 2 RXD1 UART SINO I Receive data RS232 level UART SOUT1 with TQM8349L 47L AUUART SIN1 with TQM8349L 47L 4 242 SCC2 UART1 e Available on the socket X18 below for individual Signal assignment refer to the RS232 amp Reset Taster schematic e Controller SCC2 TQM8560 or DUART TQM8540 TQM8555 41 in CPU on the TQ Module e Transceiver on TQ Module or optionally MAX3222 on STK85xx for Module without the Transceiver e Signal RXD TXD provided with the Transceiver Jumper X61 RXD2 UART SIN14 Usage Not connected on STK85xx transceiver on module may still be active 1 2 Connected to X18 via transceiver on STK85xx Connected to PS 2 controller Note With board Rev 1xx label X61 2 written in copper of top layer is wrong should be X61 1 However pin 1 marking square pad bottom
18. STK85 xx User Manual Y PCI Control Status PCI Bus Control EN Supply Test Analog Input Illustration 3 Structure Local Bus Local Bus Local Bus Dri river 4 2 External interfaces External interfaces are interfaces that are meant for specification driven operations for example they can be used for installation in a casing It has an ESD fuse and if required an EMV circuit 4 2 1 GBit Ethernet 4 2 1 1 TSEC1 e Available on the socket X17 on the right side from the connector For individual Signal assignment refer to the GBit Ethernet 1 schematic e Controller TSEC1 in CPU on the TQ Module e PHY Marvell 88E1111 D13 PHY Address 2 e Transducer integrated in the RJ 45 socket HALO HFJ12 1G01E X17 e Interrupt by IRQ8 is possible e Reset configuration for PHY can be derived from the configuration matrix Assembly options Usable Interface Mode Mil Mode MDIMode Properties gt Z h O GMII 1000Base T 1125 MHz data rate 8 bit data width 100 10Base T 25 MHz max data rate 4 bit data width Configuration matrix Configuration Bits PHYADDR A 0 eo 0 PHY E 2 ENA PAUSE 0 IDisablePause ANEG 3 0 0b1001 Auto Neg advertise only 1000Base T a Mi Crossover disabled duplex forced slave ENA XC 9 m MDI Crossover disabled DIS 125 DIS 125 125 MHz clock enabled HWCFG_MOD n GMII to copper E 3 0 DIS FC 1 Disable fiber copper aut
19. Y address 1 ENA PAUSE 0 Disable Pause ANEG 3 0 0b1001 Auto Neg advertise onl NSTK85xx UM 1 06 Page 17 of 39 x J Tr EUM STK85 xx User Manual N ok bits kl slave ENA XC ig MDI Crossover disabled DIS 125 125 MHz clock enabled HWCFG MOD m GMII to copper E 3 0 DIS_FC AEN Disable fiber copper auto selection DIS SLEEP 1 Disable energy detect SEL TWSI 0 Select MDC MDIO interface INT POL INTn signal is active low 75 50 OHM EN 50 Q termination for fiber don t care Reference Signal LED LINK10 Low 10 Link Up High 10 Link Down V41 LED LINK100 Low 100 Link Up High 100 Link Down High 1000 Link Down V75 LED DUPLEX Low Full Duplex High Half Duplex Blink Collision V79 LED RX Low Link Up High Link Down Blink Receiving V80 LED TX Low Transmitting High Not Transmitting Note LED drivers are configurable and may be used for other purposes Jumper TSEC2 Interrupt PHY interrupt disabled 1 2 PHY interrupt connected to IRQ8 4 2 2 Fast Ethernet schematic Module PHY Intel LXT971A PHY Address 3 lsolation module HALO TG110 5050N2 Interrupt via IRQ8 is possible Configuration signal SD TP 0 _ Twisted pair TX slew rate 3 0 ns Available on the socket X43 for individual Signal assignment refer to the Fast Ethernet Controller FCC 1 2 3 TQM8560 FEC TQM8540 or FCC 1 2 TQM8555 41 in CPU on the TQ Page 18 of 39
20. an Speed Signal Fan Speed Interrupt disabled 1 2 Fan Speed Interrupt connected to IRQ7 4 4 4 6 Buffer battery for RTC Connected to the VBAT of the Module Lithium battery Type CR2032 3 V 235 mAh G4 Socketed convertible Alternative connection possibilities for Buffer voltage to X86 For pin assignment refer 4 4 7 Protection against excess current by series resistance Reverse current lock by a Diode in the Series with R939 subsequently added 4 4 7 Power Supply STKB5xx UM 1 06 All important power supply is available through the screw clamp or strips Feeding in and removing only for testing and is the responsibility of the user The power supply can be differentiated between the supply and user for testing e g current metering user responsibility refer Illustration 6 Page 29 of 39 J SE ID components STK85 xx User Manual N R2114 R2115 R2116 AG VIN VCC5V_INN R138 Adapter P X91 TT R130 inhibit mE R931 R1000 VCC3V3_INN 1 R938 R999 R929 R930 R1001 ES R934 R928 X91 C R130 X91 HI R130 Illustration 6 Supply structure Voltage and connection possibilities Voltage Reference Pin Description R131 R1002 R1003 R2113 VCCSV P PCI VCCSV Board VCC5VF TQ VCC3V3ID Module VCC3V3 P pc WO PCI VOC3V3 a eve FTW 5 GBit PHYs IW_PHY gt GBit PHYS 12V PCI 12V pg X82 1 Input voltage from AC adapter X83 1 12 V from ATX power
21. cable 26 pole pole connector and 25 pole Sub D connector in Crimp technology as shown in the JTAG via PPORT schematic Jumper JTAG Debug Parallel TCK TCK not connected TCK not connected 1 1 O 1 2 TCK from parallel port connected to CPU JTAG Debug Parallel TDI TDI not connected 1 2 TDI from parallel port connected to CPU JTAG Debug Parallel TMS TMS not connected 1 2 TMS from parallel port connected to CPU 4 43 Reset Reset Key S1 effects the Signal RESIN Additional connection possibilities for external Reset Key Reset and Power LED to X75 for Signal assignment refer power supply diagram Self Reset with TQM85xx all Revisions are possible configurable Jumper TQM8560 1xx 2xx Self Reset Compatibilit TQM8560 40 Rev 1xx and 2xx No Self Reset possible TQM8560 40 newer revisions TQM8555 41 Self Reset circuitry is on the module always use this setting 2 TQM8560 40 Rev 1xx and 2xx Self Reset possible compatible to newer versions and TQM8555 41 TQM8560 40 newer revisions TQM8555 41 Don t use this setting Permanent Reset 1 2 RESIN tied low Self Reset Disable Open Normal operation Self Reset possible depending on module type and X6 setting Pull up 2k2 on RESIN no self reset possible STK85xx UM 1 06 Page 27 of 39 J It components STK85 xx User Manual Y 4 4 4 General Purpose LEDs e 32 LEDs to Port A e 8 LEDs optionally to PCI AD 47 40 TS
22. controlled by PCI Bus Control PLD PC Card Controller Reset forced manuall 4 2 6 CAN Two Full CAN 2 0b compatible interfaces Available on the socket X25 for individual Signal assignment refer to the JTAG COP amp CAN schematic Controller 2 AS82527 on TQ Module Transceiver TJA1050 Philips Reference Current drain via X25 is the user s responsibility no measures are provided against short circuit or overload The maximum permissible power is 100 mA Jumper Ground on Interface X25 Pin 6 open 1 2 X25 Pin 6 connected to DGND 5 V on Interface X25 Pin 9 open 1 2 X25 Pin 9 connected to VCC5V Termination CAN1 Open No termination 1 Termination 120 Q Termination CAN2 Termination 120 Q J SE o ID components STK85 xx User Manual 4 2 7 PS 2 Interfaces e wo PS 2 Interfaces Keyboard and mouse e Available on the socket X32 above green mouse below blue keyboard For individual Signal assignment refer to the Keyboard Mouse schematic e Controller PIC16F627 on STK85xx Connected to the TQM Module via RS232 e Refer the special document PS2RS232 SZ 008 for description of the interface converter Jumper 1 2 9 10 SCC2 TQM8560 UART1 TQM8540 TQM8555 41 UART2 TQM8349L 3 4 11 12 SCC3 primary TQM8560 UARTO TQM8555 41 6 13 14 4 3 Test Extension strips All relevant signals of the module connector are guided to the strip in a 2 54mm grid The assignment of this stri
23. d Controller disconnected PCI X possible 4 2 5 2 PCI X Slot e HIP Slot Rapid I O combined with PCI Rapid I O data on X3 Rapid I O supply on X60 X78 PCI X on X103 for individual Signal assignment refer to the PCI X 1 0 Slot 3 3V Slot1 schematic e Clock frequency max 133 MHz only this slot all other PCI Devices can be detached by the FET switch controlled by the PCI Bus Control PLD or Jumper e 3 3 V Signal 5 V intolerant 4 2 5 3 Compact PCl Slot e 64 Bit Compact PCI available on socket X46 For individual Signal assignment refer to the Compact PCI Slot 2 schematic e Clock frequency max 66 MHz e 3 3 V Signal 5 V intolerant STK85xx UM 106 Page 24 of 39 Hu sjueuodui02 O I Aq 90020 90 FINN XXGS8MLS STK85xx UM 106 2006 by TQ Components GmbH STKB5xx UM 1 06 Page 25 of 39 STK85 xx User Manual NTT in components 4 2 5 4 PC Card Interface e Two PC Card Slots Available on X44 For individual Signal assignment refer to the PC Card Slot A amp B schematic Controller PCI1520 on STK85xx Connection via a 32 Bit PCI 33 MHz Reference As the Controller can work only till a max of 33 MHz clock frequency it is set to Reset Mode as soon as a card of at least 66 MHz is inserted LED Reference Signal V61 MFUNC4 active PC Card Socket Activity high configurable may be used for other purposes Jumper X109 PC Card Controller Reset Open PC Card Controller Reset
24. d Processor Hardware Specifications MPC8560EC Rev 3 2 Freescale Semiconductor Inc 06 2005 2 MPC8555E Integrated Communications Processor Reference Manual MPC8555ERM Rev 1 Freescale Semiconductor Inc 08 2004 STK85xx UM 106 Page 39 of 39
25. d when the power supply is received from the ATX power supply e Available on the screw clamp X81 1 X81 2 refer 4 4 7 e Synchronous regulator LTC1628 with external MOSFETs e Ceramic input and output condensers 4 4 10 Power Supply 2 5 V e Available on the screw clamp X87 3 2V5 PHY refer 4 4 7 e Synchronous regulator TPS40003 with external MOSFETs e Ceramic input and output condensers 4 4 11 Power Supply 1 V e Available on the screw clamp X87 1 1V PHY refer 4 4 7 e Synchronous regulator TPS40003 with external MOSFETs e Ceramic input and output condensers STK85xx UM 106 Page 32 of 39 Ga i Hus sjueuodui02 O I Aq 90070 90 FINN XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH OLE e STK85 xx User Manual in components 4 5 Test Functions 4 5 1 A D Converter Control via a PLD via JTAG via Local Bus the required PLD Program has not yet been created A D Converter National ADC12048 8 channels resolution 13 Bit or 12 Bit Signs Utilized for measuring the power supply and reference voltage on the Module and STK85xx optional free usage for general metering is possible Change in the assembly 0 Q voltage divider connection to X19 Voltages metered for testing purposes Signal 10 9 IV PHY 1 V supply for GBit PHYs HP 2V5 PHY 2 5 V supply for GBit PHYs 1 2 VBAT RTC Backup Voltage 3 not connected R1006 removed to prevent G4 from being discharging when p
26. mber of FEC s with TQM8540 27 06 06 4 4 7 3 Added Supply from a regulated power supply 24V DC STK85xx UM 06 Page 9 of 39 In components 2 General The Starter kit STK85xx Rev 105 is a universal development board for PowerQUICC II and PowerQUICC II Pro based Mini Module like TQM8560 TQM8349L and its derivatives It directly provides all important functions and interfaces of the Mini Module to the user In addition extra functions e g RTC buffering and PC Card Controller are implemented There are several installation possibilities Development Board in the Software Development Development Board in the Hardware Development for implementation and for testing the application specific additional functions Demonstration Board for presentations and trade fairs Standard product for directly installation at the client side Internal installation during product qualification and during testing a small batch of the existing and future Mini Modules STK85 xx User Manual N STK85xx UM 106 Page 10 of 39 Hus sjueuodui02 O I Aq 90020 90 FINN XXGS8MLS in components iaqram t D S4rnmblohe In deen Dokument mnbhalimnemn Imformobtbonen sind streng vertroullsk zu behondaln Ere TVallergobe der Dortellungen und Hernin bador der schriftfehen GZustlmrmrmurg san TQ S ertere ircul STK85 xx User Manual 3 System Architecture Block diagram TQM85XX Starterkit vnz ATX Poser Pack
27. nal 5 V supply disabled 1 2 Internal 5 V supply enabled 4 4 7 2 Supply from the ATX power supply Reference To ensure a sufficiently good compensation during load variation an additional input capacity of 6 4700 uF a VCC3V3_INN must be provided e ATX power supply Bicker BEA 530 or similar 300 W with Remote Sensing for 3 3 V e Connection to the X65 e Available power is sufficient for the Module TQM8560 40 TQM8349L 47L STK85xx PC Cards and PCI Compact PCI Plug IN cards e Basic load 1 A at 5 V is automatically connected during operation with AT X power supply R117 R125 WARNING Basic Load will be hot 4 4 7 3 Supply from a regulated power supply 24V DC e 24VDC 20 on X82 1 DGND on X82 2 e This is the recommended power supply for STK85xx Attention there is a plus mark close to X82 This plus mark is for PCB adjustment only it does not mark the polarity of the supply voltage 4 4 8 Power Supply 5 V e Active only when the power supply is received from the board power supply VCC5V INN deactivated when power supply is received from the ATX power supply A STK85xx UM 1 06 Page 31 of 39 J LU 9 IT components STK85 xx User Manual e Available on the screw clamp X85 1 X85 2 refer 4 4 7 e Synchronous regulator LTC1628 with external MOSFETs e Ceramic input and output condensers 4 4 9 Power Supply 3 3 V e Active only when the power supply is received from the board power supply VCC3V3_INN deactivate
28. o selection DIS SLEEP 1 Disable energy detect STK85xx UM 106 Page 16 of 39 Hus sjueuodui02 O I Aq 90070 90 FINN XXS8HLS STK85xx UM 106 02006 by TQ Components GmbH OLE e STK85 xx User Manual ID components Configuration Value Bits SEL TWSI 0 Select MDC MDIO interface INT POL INTn signal is active low 75 50 OHM 0 5090 termination for fiber don t care LEDs Reference Signal Description Z High 10 Link Down High 100 Link Down High 1000 Link Down LED_DUPLEX Low Full Duplex High Half Duplex Blink Collision LED_RX Low Link Up High Link Down Blink Receiving Low Transmitting High Not Transmitting TSEC1 Interrupt PHY interrupt disabled PHY interrupt connected to IRQ8 4 2 1 2 TSEC2 e Available on the socket X17 on the right side from the connector For individual Signal assignment refer to the GBit Ethernet 2 schematic e Controller TSEC2 in CPU on the TQ Module e PHY Marvell 88E1111 D28 PHY Address 1 e Transducer integrated in RJ 45 Socket HALO HFJ12 1G01E X17 e Interrupt by IRQ8 is possible e Reset configuration for PHY can be derived from the configuration matrix Assembly options Usable Interface Mode MII Mode MDI Mode GMII 1000Base T 125 MHz data rate 8 bit data width 100 10Base T 25 MHz max data rate 4 bit data width Configuration matrix Configuration bits PHYADDR A4 0 0500001 PH
29. ock is the source of the transmit clock Rapid I O transmit clock inputs RIO TX CLK IN and RIO TX CLK INf are the source of the transmit clock CCB clock is the source of the transmit clock default Determined by TQM8560 40 reset configuration Configuration Jumpers NSTK85xx UM 1 06 Page 19 of 39 SE J Tr ETUR STK85 xx User Manual N X63 External Rapid I O Clock Config Signal External clock multiplied by M External clock divided by 2 External clock disabled External clock enabled 4 2 4 RS232 Reference UART1 of TQM8349L 47L corresponds to the UARTO of TQM8560 40 and TQM8555 41 Jumper both interfaces X12 1 2 Transceiver disabled 1 2 4 2 4 1 SCC1 UARTO Available on the upper socket X18 for Individual signal assignment as well as suggested Null modem cable refer to the RS232 amp Reset Taster schematic Controller SCC1 TQM8560 or DUART TQM8540 TQM8555 41 in CPU on the TQ Module Transceiver on TQ Module or optionally MAX3222 on STK85xx for Module without Transceiver Signals RXD TXD provided with Transceiver RTS and DTR as static Signals for the Monitor Functions Reset Enable Monitor Software Pinouts Signal Signal Type Description TQM8560 TQM8540 ENMONH ENMON Temporary input for MON85xx MON83xx software RS232 level tolerant 0 Interactive Mode responds to RS232 commands 1 Initial Mode initialize CPU and start application TXD1 UART
30. oduct Violation of this guideline can result in damage destruction of the module and cause danger to your health Improper handling of your TQ product would render the guarantee invalid Proper ESD handling The ESD components must be used in workplaces which are suitable for their handling in order to avoid damage or destruction 1 5 Registered Trademark TQ component GmbH aims to pay attention to the copyrights of all the used graphics and texts in all the publications strives to use the graphics and texts created by themselves or use license free graphics and texts All the brand names and trademarks mentioned in the publication and if necessary protected by a third party unless specified otherwise in writing are without any limitation subjected to the specifications of the current copyright laws and the proprietary laws of the present registered proprietor One should not conclude on the basis of just the entry that brands and trademarks are not protected through the rights of a third party STKB5xx UM 1 06 Page 7 of 39 J CNN h MON STK85 xx User Manual In components 1 6 Imprint TQ Components GmbH Schul Street 29 D 82234 Wessling Tel 49 0 8153 9308 333 Fax 49 0 8153 9308 134 Email info tgqc de Web http www tq components com 1 7 Copyright Copyright protected 2006 by TQ Components GmbH Without the written consent of TQ Components GmbH this instruction manual may
31. ower off 8 VCCSVUN 3 3 V supply for TQ module 6 VREF DDR SDRAM reference voltage on TQ module 4 5 2 Test PLDs 4 5 3 STKB5xx UM 1 06 Almost each Signal for JTAG Test should be guided to an un programmed PLD PLD Lattice LC4032V 75TN48C Reference The internal Pull Ups are activated in an un programmed state In order to solve the signal quality problems by unfavorable Routing and or high load each individual Pin of the Test PLDs can be separated by a 0 Q resistance Further in the case of problems 0 Q resistance can be replaced by a higher value e g 47k with the help of the internal Pull Up For the current status refer to the Test PLDs schematics and parts list Scan chain JTAG and Programmer adaptor All the JTAG capable components form a single scan chain for the entire STK85xx refer below The PLD on the TQ Module can be contacted by testing pins and X55 The PLDs can be used in the normal mode besides the pure JTAG function and should be programmed accordingly PLDs can also be contacted separately Scan chain 1 Top most component is the last in the JTAG chain Page 33 of 39 J CP lo components STK85 xx User Manual i i ont D67 e ae ee pg ee D350 D63 fre DB d r r CC Di bk Do fe Test PLD DH LE D52 e D40 S e D57 e DB fe 00 Deo D42 pr 0 pg fr Dg pre D43 ee Scan chain 2 Top most component is the last in the JTAG chain TN1 TN2 T
32. p is to be derived from the Supply Voltage Strips Power Distribution schematic X13 Port A X8 Port B X20 Port C X22 Port D X51 I2C Modules X72 2C PC Card Controller Configurations EEPROM Option X14 MSRCID Trigger MDVAL X21 Test MDC Reserved X23 MECC X70 DMA X68 Local Bus Addresses Data X69 Local Bus Control signal X35 TSEC1 X5 TSEC2 X39 Clocks X38 Resets X33 Interrupts 4 4 Internal Interfaces Internal interfaces are interfaces that are not available to the outside when operated according to regulations They are used exclusively for lab operations so that one can assume the appropriate ESD precautions of the external test structure Thus ESD fuse and EMV circuit are not required 4 4 1 JTAG Debug Interface e Available on the socket X1 1 e Signal assignment compatible to 1 For Details refer to the JTAG via PPORT schematic STK85xx UM 106 Page 26 of 39 Hus sjueuodui02 O I Aq 90070 90 FINN XXGS8MLS STK85xx UM 106 2006 by TQ Components GmbH 4 4 2 pg RE STK85 xx User Manual lo components JTAG Debug Interface via Parallel Port simple JTAG Debug Interface for connection to the PC Parallel Port compatible to MPCBDM by VAS GmbH refer http www vas gmbh de software mpcbdm BDM Interface is guided on a 16 pole strip PC Interface is provided as SubD 25 strip Pin Assignment for 25 pole 1 1 cable with connector socket Connection to the PC with a flat
33. s or aspects for working with TQ products This specification is used to state the complete file name with its Filename ext corresponding extension Examples of application e g e Specifying memory partitions Instructions Examples Reference Cross reference to another section figure or table e Processing a script STKB5xx UM 1 06 Page 5 of 39 J X hy i STK85xx UM 106 In components 1 2 Acronyms and Definitions The following terminology and abbreviations are used pon oowoo 0000 EEPROM Electrically Erasable Programmable Read Only Memory Byte wise re writable DENNCCTC REN SMD SCC Serial Communication Control TSEC Triple Speed Ethernet Controller UART Universal Asynchronous Receiver Transmitter Page 6 of 39 pi STK85 xx User Manual Y Hquuc sjueuodui02 O Aq 90070 90 FINN XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH e STK85 xx User Manual ID components Universal Serial Bus 1 3 Tips on Safety Improper or incorrect handling of the product can substantially reduce its life span 1 4 Handling ESD Tips General handling of your TQ products The handling and use of your TQ product may be done exclusively by qualified personnel Ensure that while using your TQ product particularly while plugging in out of modules changing jumper settings or connecting other external devices the power supply is not connected to your TQ pr
34. ype can be changed within the CPU through the circuit of the TESTSEL Signals e The change is not a documented feature there is no functional guarantee Jumper CPU Type Original CPU type as determined by TQ module 1 TQM8560 40 TESTSEL z low force to 8540 TQM8555 41 TESTSELO low force to 8541 TQM8349L 47L TEST SEL low force to 8349E TQM8560 40 TESTSEL high force to 8560 TQM8555 41 TESTSELO high force to 8555 TQM8349L 47L TEST SEL high force to 8347E STKB5xx UM 1 06 Page 35 of 39 J 1 X STK85 xx User Manual N In components 4 6 Jumpers Description The following table shows the available Jumper The possible settings are described in the associated chapters X53 Fast Ethernet Management data 1 2 Enabled interface X47 X50 Fast Ethernet MII multiplexing a d FCC3 TQM8560 X50 2 3 FEC TQM8540 selected External Rapid I O clock Disabled Shutdown RS232 Transceiver Disabled SHDNH Disabled Not connected Determined by cards All slots active Controlled by PLD Pf MEMIMEM Open Open No termination No termination No interface selected Disabled Disabled Compatibilit TQM8555 41 X30 General Purpose LEDs PCI 1 2 PCI AD TSEC X79 FanSpeedSigal Open Disabled 2 STK85xx UM 106 Page 36 of 39 Hus sjueuodui02 O I Aq 90070 90 FINN XXGS8MLS STK85xx UM 106 02006 by TQ Components GmbH STK85 xx User Manual If components

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