RL78/G1C Utilising I²C in Slave Mode for Cubesuite+
Contents
1. 4 Click Go to start the program execution IIC S will be displayed on the debug LCD 5 When a valid read request is sent from a master device the RSK will respond correctly and display RD on the debug LCD 6 When a valid write request is sent from a master device the RSK will store the write data into the simulated EEPROM memory and display WR on the debug LCD 7 If the RSK displays ERR it means the program has detected a failed IIC transmission Reset both the master slave devices and retry R01AN1737EG0100 Rev 1 00 Page 5 of 6 Nov 11 2013 RENESAS RL78 G1C Utilising I C in Slave Mode for Cubesuite Website and Support Renesas Electronics Website http www renesas com Inquiries http www renesas com contact All trademarks and registered trademarks are the property of their respective owners RO1AN1737EG0100 Rev 1 00 Page 6 of 6 Nov 11 2013 RENESAS Revision History Description Rev Date Page Summary 1 00 Nov 11 2013 First edition issued A 1 General Precautions in the Handling of MPU MCU Products The following usage notes are applicable to all MPU MCU products from Renesas For detailed usage notes on the products covered by this document refer to the relevant sections of the document as well as any technical updates that have been issued for the products 1 Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pin2. Fao 4 07 00 or later SH RX REC M16C H8 project a Drop here to open the project l In following case the build options also can be converted EC file mntpj From the HEW RX compiler package V 1 00R00 or later project to the CubeSuite RX project a Open Sample RSK Project B Select an RSK project template from those installed IE EJ Main Tutorial Project a Open Sample Project B Many sample projects that can be built immediately are provided After selecting the desired project from the list below press the GO button and specify the destination folder to copy the selected sample project 78K0 78K0R AL78 Rx ve50 78KO_KC2 L_Tutorial_Analysis so 78KO_KC2 L_Tutorial_Basic_Operation 78KO_KF2_Tutorial_Analysis Fl Fa Fa Fa Je FE F Fa Je Fu Fa fe pi DISCONNECT RO1AN1737EG0100 Rev 1 00 Page 2 of 6 Nov 11 2013 RENESAS RL78 G1C Utilising I C in Slave Mode for Cubesuite From the menu bar select File gt Project gt Open Project File Edit View Project Build Debug Tool Window Help E Start ee Create New Project 2 Open Project Favorite Projects gt Project Tree CubeSuite will open a dialog Navigate to the unzipped IIC_Slave folder located in RSKRL78G1C_Workspace Select the IIC_Slave mtpj file Click lt Open gt i Open Project w GO JE RSKRL78G1C_Workspace IC_Slave 45 lI Search tC Stave p Organize v New folder v Fl or Favorites
3. a reset only release the reset line after the operating clock signal has become stable When switching the clock signal during program execution wait until the target clock signal has stabilized When the clock signal is generated with an external resonator or from an external oscillator during a reset ensure that the reset line is only released after full stabilization of the clock signal Moreover when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress wait until the target clock signal is stable 5 Differences between Products Before changing from one product to another i e to a product with a different part number confirm that the change will not lead to problems The characteristics of an MPU or MCU in the same group but having a different part number may differ in terms of the internal memory capacity layout pattern and other factors which can affect the ranges of electrical characteristics such as characteristic values operating margins immunity to noise and amount of radiated noise When changing to a product with a different part number implement a system evaluation test for the given product Notice Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorpor
4. b Name Date modified Type ME Desktop D cgisre 26 07 2013 02 46 File folder sb Downloads IC_Slave 04 07 2013 12 14 MTP File S Recent Places Libraries E Documents d Music E Pictures B videos i JE Computer amp BED7010 C a Removable Disk S2 T Transfer AAI a lt m Lal File name IC_Slave hg Project File mtpi x A Progress Status dialog will appear briefly whilst CubeSuite loads the project l Se Loading project RO1AN1737EG0100 Rev 1 00 Page 3 of 6 Nov 11 2013 RENESAS RL78 G1C Utilising I C in Slave Mode for Cubesuite 3 Opening Sample Code and Source Files Once the project has been opened the source code and all dependant files can be opened in the editor by expanding the folders in the Project Tree window and double clicking the files listed All files have been grouped according to their file type PESIS g Bile Edit Wew Project Build Debug Tool Window Help O38 5 UB Ue See Project E RSF 10G Microcontrolll A CATSKOR Build Too DL RLTOER Seria Debug Ti 3 s software is supplies by Renesas Electronics Corporation and ss only T Program Aneheer Anah intended for use with Renesas products ther uses are authorized This x File software is owned by Renesas Electronics Corporation and ts protected under mc all applicable laws incluss opyright laws BE Startup 7 THIS SOFTWARE IS PROVIDED ND RENESAS MAKES N
5. files and dependant files whose filenames are prefixed with r_ were generated using Application Leading Tool RO1AN1737EG0100 Rev 1 00 Page 4 of 6 Nov 11 2013 RENESAS RL78 G1C Utilising I C in Slave Mode for Cubesuite 5 Code Execution Demonstrates usage of the IIC interface in slave mode by simulating an EEPROM memory device similar to the Renesas RIEX24xxx series The memory capacity is 8 bytes The IIC interface is configured to respond when addressed with the slave device address OxA0O Modifications The IIC pull up resistors are connected to Board_VDD by default This is correct for power configurations where Board_VDD is 5V For power configurations where Board_VDD is 3 3V the IIC pull up resistors should be connected to Board_SV by removing R83 and fitting R84 Please refer to the schematics document and component placement diagram in the User Manual to help locate components Instructions 1 Connect a compatible EEPROM memory device as follows EEPROM RSK SDA gt SDA JAI pin 25 SCL gt SCL JA1 pin 26 GND gt Any ground point Ensure the device is powered as its datasheet specifies 2 Build and download the sample code to the RSK 3 Open the Watch window from the menu bar View gt Watch gt Watch 1 Add the g_master_data global variable to the Watch 1 window by right clicking on the variable and selecting Register to Watch 1 The variable will act as the simulated EEPROM memory
6. O WARRANTIES REGARDING L Code Generator THIS SOFTWARE WHETHER EXPRESS LIED OR STATUTORY INCLUDING BUT NOT r eg egee LIMITEO TO WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE hj reg egeh NON I T AL ARE EXPRESSLY IHE r egege anere A E r eg icac ho r eg _iea h ANY REASON RELATED TO THIS SOFTWARE 2VEN a reg Jica_usersc BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES reg intpe wathout notice changes te tha a neguntph 3 y aty By using tha r egintp usere you agree to the addit req eye a wang Link E reg teyh 20 jira renesans com disclaimer E r eg key user S cogmeodivedi 22 r eg maine reg parte to rcg porh rcg port_userc r egsysteminit 2 c EJ r egue 3 chasm CATEKOR aj reg tuh Tha cg tau usere A rcguserdefinesh m rdr C Source Files I Dependencies C Text Fites 1 rights reserved gi mt f all Messages S fl j Ja z Tis i Fa jfa Ija yw m Pe Line V119 Column 1 Insert Western European Windows oy DISCONNECT 4 Source Code Functionality The source code project is specifically written to run on the appropriate RSK However this source code can be useful as an example even without the RSK The project was written using source files containing API functions generated using Code Generator The project will contain a C source file r_cg_main c This source file includes the C function main All source
7. aE N ESAS APPLICATION NOTE RL78 G1C RO1AN1737EG0100 Rev 1 00 Utilising 1 C in Slave Mode for Cubesuite Nov 11 2013 Introduction The purpose of this Application Note is to show the user how to add the associated RL78 G1C sample code to a new or existing CubeSuite workspace as well as give an explanation of what the sample code does The sample code provided with this Application Note demonstrates usage of the I2C Interface in Slave Mode The program runs on the RL78 G1C RSK and demonstrates usage by simulating an EEPROM memory device similar to the Renesas RIEX24xxx series Target Device RL78 G1C Development environment IDE Cubesuite Compiler CA78KOR Hardware Renesas Starter Kit for RL78 G1C Contents Te AMS tall tiOn resino SA S 2 2 Creating the Project Workspace cscceeecceceeeceeeeeeeeneeeeeeeeceaeeeeaaeseneecaeeecaaeseeeaesseeeseaeeesaeseeneeenaes 2 3 Opening Sample Code and Source FileS c ccceccceesceceeeeeeeeeeeeeaeeeeneeceeeesaaeeeeaaeseeeeeseeeesaeeseeeeeaes 4 4 Source Code Functionality 0 2 0 c ccccceecececeeeeeceeeeeeeaeeeeeeeeeeeeeceaeeeeaaeseeaeeseeeeecaaeseeaaesseeeessaeeseaeeseaeeesaes 4 5 Code EXO Cutan s ssena a a e a a a a aaa aa ataa aaa aea Naena aas 5 R01AN1737EG0100 Rev 1 00 Page 1 of 6 Nov 11 2013 RENESAS RL78 G1C Utilising I C in Slave Mode for Cubesuite 1 Installation This section assumes CubeSuite IDE is already installed on the user s persona
8. ation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration modification copy or otherwise misappropriation of Renesas Electronics product Renesas Electronics products are classified according to the following two quality grades Standard and High Quality The recommended applications f
9. ed by you or third parties as a result of unauthorized use of Renesas Electronics 12 Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries 7tENESAS SALES OFFICES Renesas Electronics Corporation http www renesas com Refer to http www renesas com for the latest and detailed information California Eastern Laboratories Inc 4590 Patrick Henry Drive Santa Clara California 95054 U S A Tel 1 408 919 2500 Fax 1 408 988 0279 Renesas Electronics Europe Limited Dukes Meadow Millboard Road Bourne End Buckinghamshire SL8 5FH U K Tel 44 1628 651 700 Fax 44 1628 651 804 Renesas Electronics Europe GmbH Arcadiastrasse 10 40472 D sseldorf Germany Tel 49 211 65030 Fax 49 211 6503 1327 Renesas Electronics China Co Ltd 7th Floor Quantum Plaza No 27 ZhiChunLu Haidian District Beijing 100083 P R China Tel 86 10 8235 1155 Fax 86 10 8235 7679 Renesas Electronics Shanghai Co Ltd Unit 301 Tower A Central Towers 555 LanGao Rd Putuo District Shanghai China Tel 86 21 2226 0888 Fax 86 21 2226 0999 Renesas Electronics Hong Kong Limited Unit 1601 1613 16 F Tower 2 Grand Century Place 193 Pr
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12. l computer PC Create a new folder and name it as RSKRL78G1C_Workspace Copy the zipped file an_r01an1737eg0100_rl78g1c_iic zip available in the Application Note package downloaded from the website to this folder Extract the IIC_Slave zip file to the RSKRL78G1C_Workspace folder 2 Creating the Project Workspace Open CubeSuite IDE by clicking the Windows Start button select All Programs gt Renesas Electronics CubeSuite gt CubeSuite G Cub File Edit View Project Build Debug Tool Window Help Set DX BO TEETE V 0O s SSB SB Project Tree ax E start x 08 Learn About GibeSuite W E We recommend reading the tutorial to find out what can be done in CubeSuite GO The tutorial contains the information on how to effectively use CubeSuite Create New Project B new project can be created GO new project can also be created by reusing the file configuration registered to an existing project Open Existing Project B Loads the project of CubeSuite Can also be opened directly from the following link Recent Projects Favorite Project Mao 1 RSKRL78G1C_Sample Nothing 2 tem 3 RTC Open Existing CubeSuite High performance Embedded Workshop PM Project B The project created with the old IDE can be converted to the CubeSuite project Support version a High performance Embedded Workshop a
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15. s in the manual The input pins of CMOS products are generally in the high impedance state In operation with an unused pin in the open circuit state extra electromagnetic noise is induced in the vicinity of LSI an associated shoot through current flows internally and malfunctions occur due to the false recognition of the pin state as an input signal become possible Unused pins should be handled as described under Handling of Unused Pins in the manual 2 Processing at Power on The state of the product is undefined at the moment when power is supplied The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied In a finished product where the reset signal is applied to the external reset pin the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed In a similar way the states of pins in a product that is reset by an on chip power on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified 3 Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited The reserved addresses are provided for the possible future expansion of functions Do not access these addresses the correct operation of LSI is not guaranteed if they are accessed 4 Clock Signals After applying
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