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20XM50-00 E5 User Manual - Diamond Point International

1. Autodetected parameters Parameter VET Parameter User alias Description Standard Default String Access ccbclkhz CCB clock frequency decimal Hz Yes Read only clun MENMON controller unit number that Yes Read only MENMON used as the boot device hexadecimal cons Selected console Set to name of first Yes Read only selected console cpu CPU type as ASCII string e g Yes Read only MPC8548E cpuclkhz CPU core clock frequency decimal Hz Yes Read only dlun MENMON device unit number that Yes Read only MENMON used as the boot device hexadecimal flashO Flash size decimal kilobytes Yes Read only framo FRAM size decimal kilobytes Yes Read only immr Physical address of CCSR register Yes Read only block memO RAM size decimal kilobytes Yes Read only mem1 Size of SRAM decimal kilobytes Yes Read only memclkhz Memory clock frequency decimal Hz Yes Read only MEN Mikro Elektronik GmbH 55 20XM50 00 E5 2014 02 25 MENMON Parameter is Parameter User alias Description Standard Default String Access mm Info whether primary or secondary Yes Read only MENMON has been used for booting either smm or pmm mmst Status of diagnostic tests as a string Yes Read only nmac0 1 2 MAC address of Ethernet interface x Yes Read only 0 n Format e g 00112233445566 Set automatically according to serial number of the board pcicl
2. aser erhRIbr en yer eb rds eed 19 1 3 Installing Operating System Software 0 000000 08 20 2 Functional Description ev rrr e rU RR REFIERE PCIE E KU 21 2 1 Power Supply iens et bee e es ere khe haeo deb piden dudes 21 2 2 Board SUPEIVISION 24 4 cioe cod eng 9p RICE RU NERA RAO Ud 21 23 Real Time Clock i221 eio Rer eR sa RS EEHERUR S SE 21 2A i Processor COLE n ose Verse we okie ee Stee RIPE PR 22 24 1 General orto etes roar TIR dee SEES 22 2 4 2 Thermal Considerations cc eiute or oaw ee enwecee 22 2 9 BUS SUUE sy specu 1926 3 CI ULA A UXOR Qai C TOU deans tp gd 23 25 1 Host to PCl Bridge bos sh hebr eee 23 2 52 Local PCI BUSES 254 neds e ERR edo Beds Rd E dps 23 2 6 Memory and Mass Storage 0 cee eese 24 2 0 11 DRAM System Memoty i ore meo kar E SDERESEITS 24 2 0 2 RAM Re Ue AIRE RRET ER ERE PRESS 24 263 SRAM ausser res d ore S ka req dened 24 2104 BootPElash daturi itd pucr pepe 9 codi odios 24 203 EEPROM 2 cedido pte mids Eee E agentes 24 20 0 Senal XA ATA coca cn weno PORE PUES Pens 24 2 USB Interfaces ezepo RR tireda PR IR E ROS e 25 2 8 Ethernet Interfaces s soo sistas re ort dae Setups bi 25 29 GPIO ii 355 EEUU 26 2 10 PCI Bxpress Intetface a4 29er 1p Euer eR BA LR ok 26 2 41 BSMeXDIGSSS ux 3b URL UOOHE UU dou Hee a a CU oda dopo 27 2 11 1 Mechanical Concept 2 re ht RR e RR 27 2 11 2 Thermal iC once pts 5 53 pbo pep pep rashes ters PEG 27 2 11 3 ESMexpress Co
3. lt size gt Execute a HWACT script ARP Dump network stack ARP table B DC no lt addr gt Set display clear breakpoints BIOS DBG lt mask gt net cons lt clun gt Set MENMON BIOS or network debug level set debug console BO lt addr gt lt opts gt Call OS bootstrapper BOOTP lt opts gt Obtain IP config via BOOTP C BWLLNAX lt addr gt lt val gt Change memory CHAM lt clun gt Dump FPGA Chameleon table CONS Show active consoles CONS ACT lt clun1 gt lt clun2 gt Test console configuration CONS BAUD lt baud gt Change baud rate instantly without storing CONS GX clun Test graphics console D lt addr gt lt cnt gt Dump memory DBOOT clun lt dlun gt lt opts gt Boot from disk DCACHE OFF ON Enable disable data cache DIAG lt which gt VTF Run diagnostic tests DSKRD lt args gt Read blocks from RAW disk DSKWR lt args gt Write blocks to RAW disk EE xxx lt arg gt Persistent system parameter commands EER xxx lt arg gt Raw serial EEPROM commands ERASE lt D gt lt O gt lt S gt Erase Flash sectors FI from to val Fill memory byte GO lt addr gt Jump to user program H Print help HELP lt D gt List board information ICACHE OFF ON Enable disable instru
4. OOFF FFFF Nearly Free 16 MB Ox 01D0 0000 O1DF FFFF 2MB Heap2 Ox O1E0 0000 O1EF FFFF 1MB Text Reloc Ox O1FO 0000 O1F1 FFFF 128 KB Stack Ox O1F2 0000 O1F4 FFFF 128 KB Stack for user programs and operating system boot Ox O1F5 0000 O1FE FFFF 640 KB Heap Ox O1FF 0000 O1FF FFFF 64 KB Not touched for OS post mortem buffer i e VxWorks WindView or MDIS debugs requires ECC to be turned off 0x 0200 0000 End of RAM Free or download area 3 73 2 X Boot Flash Memory Map Table 18 MENMON Boot Flash memory map Flash Offset CPU Address Size Description Ox 00 00000x FFOO 0000 14 MB Available to user 128 KB Ox DE 0000 0x FFDE 0000 128 KB System parameter section in boot Flash if useflpar system parameter is set to 1 Ox EO 0000 0x FFEO 0000 1 MB Secondary MENMON Ox FO 00000x FFFO 0000 1 MB Primary MENMON MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 MENMON 3 7 4 MENMON BIOS Logical Units The following table shows fixed assigned CLUNs All other CLUNs are used dynamically Table 19 MENMON Controller Logical Units CLUNs CLUN HE Description 0x02 ETHERO Ethernet 0 ETHA 0x03 ETHER1 Ethernet 1 ETHB 0x04 ETHER2 Ethernet 2 ETHC 0x06 USB USB controller 0x08 UART to USB COM MPC854X DUART channel 0 0x0A TOUCH Touch console if present 0x10 SATAO SATA port 0 0x11 SATA1 SATA port 1
5. Single step user program SERDL lt passwd gt Update Flash using YModem protocol SETUP Open interactive Setup menu UNZIP src size lt opt gt lt dest gt lt size gt Unzip memory zipped by gzip USB lt bus gt Init USB controller and devices on a USB bus USBT lt bus gt lt p1 gt lt p5 gt Shows the USB device tree USBDP lt bus p1 p5 gt d lt x gt Display modify USB device path MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Organization of the Board Organization of the Board To install software on the board or to develop low level software it is essential to be familiar with the board s address and interrupt organization 4 1 Memory Mappings Table 27 Memory map processor view CPU Address Range Size Description 0x 0000 0000 End of RAM 512 1024 SDRAM 2048 MB Ox 8000 0000 DFFF FFFF 1536 MB PCle Memory Space Ox E000 0000 E7FF FFFF 128 MB PCI1 Memory Space Ox E800 0000 EFFF FFFF 128 MB PCI2 Memory Space Ox F000 0000 F00F 0000 128 MB CCSR Ox F200 0000 F200 3FFF Config PLD Ox F300 0000 F301 FFFF FRAM opt Ox F400 0000 F41F FFFF SRAM opt Ox FBOO 0000 FBFF FFFF 16 MB PCIe I O ISA Space Ox FCOO 0000 FCOO 7FFF 32 KB PCI I O Space Ox FF00 0000 FFFF FFFF 16 MB Flash Table 28 Address mapping for PCI CPU Address Range Interface Mapped to PCI Space
6. 0x12 SATA2 SATA port 2 0x20 All other devices dynamically detected on PCI or FPGA devices 0x40 Telnet console 0x41 HTTP monitor console Table 20 MENMON Device Logical Units DLUNS CLUN DLUN pros None Description 0x06 0x00 USB USB controller 0x10 0x00 SATAO Disk at SATA port 0 0x11 0x00 SATA1 Disk at SATA port 1 0x12 0x00 SATA2 Disk at SATA port 2 The actual disks can be selected through command USBDP see also page 61 MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 MENMON 3 7 5 System Parameters System parameters are parameters stored in EEPROM Some parameters are automatically detected by MENMON such as CPU type and frequency The parameters can be modified through the EE xxx command via the command line 3 75 1 Physical Storage of Parameters Most parameters are stored in the 1024 byte serial EEPROM on the XM50 If required you can configure MENMON to store some strings in boot Flash rather than in EEPROM 3 75 2 Start up with Faulty EEPROM If a faulty EEPROM is detected i e the checksum of the EEPROM section is wrong the system parameters will use defaults The behavior is the same if the EEPROM is blank The default baud rate is 9600 3 75 3 XM50 System Parameters Note Parameters marked by Yes in section Parameter String are part of the MENMON parameter string Table 21 MENMON XM50 system parameters
7. C conduction or convection cooled environment As all ESMexpress modules it is embedded in a covered frame This ensures EMC protection and allows efficient conductive cooling Air cooling is also possible by applying a heat sink on top of the cover Where operating temperatures are moderate the module may even do without the frame and cover with a suitable low power processor and airflow ESMexpress modules are firmly screwed to a carrier board and come with rugged industry proven connectors supporting high frequency and differential signals Only soldered components are used to withstand shock and vibration and the design is optimized for conformal coating All ESMexpress modules support a single 95x125mm form factor For evaluation and development purposes an ATX carrier board is available The ESMexpress module can be evaluated on a COM Express carrier board via an adapter from ESMexpress to COM Express MEN Mikro Elektronik GmbH 2 20XM50 00 E5 2014 02 25 Diagram SDRAM Gb Ethernet EEPROM Gb Ethernet MPC8548 ee UART to USB PCI Bus 33 PCI to USB poss ors MPC8543 PCle x4 x8 PCI Bus 66 PC to SATA MPC8548 3ports MEN Mikro Elektronik GmbH 3 20XM50 00 E5 2014 02 25 Technical Data Technical Data CPU PowerPC PowerQUICC HT MPC8548 MPC8548E MPC8543 or MPC8543E 800 MHz up to 1 5 GHz Please see Standard Configurations for available standard versions e50
8. 55022 radio disturbance EC 61000 4 2 ESD EC 61000 4 3 electromagnetic field immunity IEC 61000 4 4 burst IEC 61000 4 5 surge IEC 61000 4 6 conducted disturbances BIOS MENMON Software Support Linux VxWorks QNX on request support of the FPU is currently not provided by QNX INTEGRITY Green Hills Software support available Please contact Green Hills for further information OS 9 on request For more information on supported operating system versions and drivers see online data sheet MEN Mikro Elektronik GmbH 6 20XM50 00 E5 2014 02 25 Configuration Options Configuration Options CPU Several PowerQUICC III types with different clock frequencies MPC8548 or MPC8548E GHz 1 2 GHz 1 33 GHz or 1 5 GHz MPC8543 or MPC8543E 800 MHz or 1 GHz Memory e System RAM 512 MB 1 GB or 2 GB With or without ECC SRAM OMB or 2 MB FRAM 0 KB or 128 KB I O Ethernet Only two channels instead of three with MPC8543 PCI Express links one x8 link Reduces operation temperature range because of higher DDR SDRAM clock Software Support QNX on request support of the FPU is currently not provided by QNX OS 9 on request Please note that some of these options may only be available for large volumes Please ask our sales staff for more information For available standard configurations see online data sheet MEN Mikro Elektron
9. Gbit s per lane GPIO 1 line from board controller via ESMexpress connector Usable for LED Miscellaneous Real time clock with GoldCap or battery backup on the carrier board Temperature sensor power supervision and watchdog Electrical Specifications Supply voltage power consumption 12V 9 16 V 12 W approx Mechanical Specifications Dimensions 95 mm x 125 mm conforming to ESMexpress specification ESMexpress PCB mounted between a frame and a cover Weight 250 g incl cover and frame Environmental Specifications Temperature range operation 50 85 C Tcase ESMexpress cover frame screened e Temperature range storage 50 85 C Relative humidity operation max 95 non condensing Relative humidity storage max 9596 non condensing Altitude 300 m to 3 000 m Shock 15 g 11 ms EN 60068 2 27 Bump 10 g 16 ms EN 60068 2 29 e Vibration sinusoidal 1 g 10 Hz 150 Hz EN 60068 2 6 Conformal coating on request MTBF 209 732h 40 C according to IEC TR 62380 RDF 2000 MEN Mikro Elektronik GmbH 5 20XM50 00 E5 2014 02 25 Technical Data Safety PCB manufactured with a flammability rating of 94V 0 by UL recognized manufacturers EMC EMC behavior depends on the system and housing surrounding the ESMexpress module MEN has performed general successful EMC tests for ESMexpress using the XCI evaluation carrier according to EN
10. MENMON Memory Map orii ss eher ER RUPEE WE 23 3 7 4 MENMON BIOS Logical Units 00 54 3 15 System Paraimelets lt 5 cope mieso ar cause ERE 35 3 8 MENMON Commands 32 37 95 sandero wapa ole i es ade 60 4 Organization of the Board eeeeeeeeee e n 62 4 1 Memory Mappings 2 scots59 cases ca aera San PE oisi oria 62 4 2 Interrupt Handling 0 550204 00 cea sees eae dees eas cease cae ee 63 4 3 SMB DEVES 12 05 5 4 6 4 4 deine tore Wine bre Neher EEEE 63 44 Onboard PCI Devices iss ena sud 2038408005 0 inica itakos 64 5 JADBendiX Qe tee ee a Se ae rom eae 65 5 1 Literature and Web Resources o cdvcasweoteeis skew ea eee 65 NM CE 65 Sele SAIS Nd ceNIPC Re bd DI MEE IE 65 SA MERB UT 65 SA Bthermnet iso eR Imre theme Shih 65 SD JBGIEXD G58 5 5p EO RS ET bo Ue Ere tecti pro 65 5 2 Finding out the Board s Article Number Revision and Deal NUmDGE 25 5 9 Graton ese EEEE O E 66 MEN Mikro Elektronik GmbH 14 20XM50 00 E5 2014 02 25 Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Map ot the board cover side i sso rera 17 Map of the board connector side 2 2 eee eee eee 18 ESMexpress thermal concept cooling wings between frame and COVER aid fare MUnm Tm 28 AE12 COM Express adapter board Map of the board 36 MENMON State diagram Degrad
11. as the Ethernet Internal Loopback Test but requires an external loopback connector Before sending frames the link state is monitored If it is not ok within 2 seconds the test fails Note A loopback connector makes a connection between the following pins of the 8 pin Ethernet connector 1 3 2 6 4 7 5 8 Checks Connection between CPU and LAN controller Connection between LAN controller and PHY Connection between PHY and physical connector Does not check nterrupt line e All LAN speeds 3 6 2 SDRAM SRAM and FRAM Table 10 MENMON Diagnostic tests SDRAM SRAM and FRAM Test Name Description Availability SDRAM Quick SDRAM connection test Always Groups POST AUTO SDRAM X Full SDRAM test Always Groups NONAUTO ENDLESS SRAM Quick SRAM test XM50 is known to have Groups POST AUTO SRAM SRAM_X Full SRAM test Groups NONAUTO ENDLESS FRAM Quick FRAM test XMBO is known to have Groups POST AUTO FRAM FRAM X Full FRAM test Groups NONAUTO ENDLESS MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 MENMON 3 6 2 1 Quick RAM Test This quick test checks most of the connections to the RAM chips but does not test all RAM cells It executes very quickly within milliseconds This test is non destructive saves restores original RAM content Checks All address lines All data lines Byte enable signals ndirectly checks clock and other control signals Does not che
12. cance aom arbe Oe ada 5 poate Seeds dees 51 Table 17 MENMON Address map full featured mode 33 Table 18 MENMON Boot Flash memory map 0 00005 23 Table 19 MENMON Controller Logical Units CLUNS 54 Table 20 MENMON Device Logical Units DLUNS 54 Table 21 MENMON XM50 system parameters Autodetected parameters 55 Table 22 MENMON XM50 system parameters Production data 56 Table 23 MENMON XM50 system parameters MENMON persistent parameters eesis Succeed eevee t Vg aay pa cs duly e od eels peed 57 Table 24 MENMON XM50 system parameters VxWorks bootline parameters 23 ome ks e n bar eve d pd vas decades don a seas 59 Table 25 MENMON Reset causes through system parameter rststat 59 Table 26 MENMON Command reference lsleeel lees 60 Table 27 Memory map processor View ssleee eee 62 Table 28 Address mapping fot PCL oos ebbe bERRRERS 62 Table 29 Dedicated interrupt line assignment 0 000000 eee 63 Tabl 30 PCLIRQ line mapping uidere eid hr em m ene 63 Table 31 PCIe IRQ Ime Mapping 534 2p ome tente EP t ENO CEDE Ie 63 Table 32 SMDB devIG8s us uec eem pA OI rette mie daw mene 63 Table 33 Onboard PCI deviGes sso Gascon up DS eo wales REP OE E die dts 64 MEN Mikro Elektronik GmbH 16 20XM50 00 E5 2014 02 25 Getting Started 1 Getting Started This chapter gives an overview
13. for industry standard interfaces with processors that implement the embedded category of the Power Architecture technology The MPC8548 3 offers a double precision floating point auxiliary processing unit APU up to 512 KB of level 2 cache up to four integrated 10 100 1Gbits s enhanced three speed Ethernet controllers with TCP IP acceleration and classification capabilities a DDR DDR2 SDRAM memory controller a programmable interrupt controller two PC controllers a four channel DMA controller a general purpose I O port and dual universal asynchronous receiver transmitters DUART The MPC8548 3 is available with MPC8548 3E or without an integrated security engine with XOR acceleration Table 1 Processor core options on XM50 Processor Type Core Frequency L2 Cache Encryption Unit Ethernet Ports MPC8548 1 GHz 1 2 GHz 1 33 GHz or 512 KB No 3 1 5 GHz MPC8548E 1 GHz 1 2 GHz 1 33 GHz or 512 KB Yes 3 15 GHz MPC8543 800 MHz or 1 GHz 256 KB No MPC8543E 800 MHz or 1 GHz 256 KB Yes 2 4 2 Thermal Considerations The XM50 generates around 12 W of power dissipation when operated at 1 33 GHz The ESMexpress module is enclosed inside a cover and frame and therefore provides a flexible thermal interface that can be used as needed to fulfill the thermal needs of the application Typically you should use it for conduction cooling or convection cooling It depends on the system configuration and airflow
14. per lane One x8 link is also possible on request but this reduces the XM50 s extended operation temperature range The following table shows which lanes must be used for each link type Table 2 Possible PCI Express link configurations PCle Lane PCIe Link Configuration PCIE B7 co PCIE B3 x4 PCIE B2 PCIE B1 x2 PCIE BO x1 Note PCIE_BO 3 are standard PCIE_B4 7 are an additional option The interface can be accessed on the ESMexpress connector You can find the pinout for the PCI Express signals in Table 3 Pin assignment of ESMexpress connector J1 pins 61 120 on page 30 Table 5 Pin assignment of ESMexpress connector J2 pins 61 120 on page 32 and Table 6 Pin assignment of ESMexpress connector J2 pins 1 60 on page 33 MEN Mikro Elektronik GmbH 26 20XM50 00 E5 2014 02 25 Functional Description 2 11 ESMexpress ESMexpress is a Computer On Module COM SOM standard that is especially ruggedized and provides a high performance low power architecture for harsh environments The ESMexpress concept has been developed for applications that require highly robust electronics to ensure safe and reliable operation even in severe environments e g in railways and avionics industrial automation and medical engineering or mobile applications in general Together with an application specific carrier board it forms a semi custom solution for industrial hars
15. pin 1 to pin 2 on the debug connector TDI pin of debugger with GND If the abort pin is detected asserted the secondary MENMON is not invoked and MENMON uses default parameters such as baud rate console port This is useful if a secondary MENMON has been programmed that does not work or if you have misconfigured a system parameter Note that when a JTAG debugger is connected the abort pin is always read as active Note The test connector is not assembled in standard versions of XM50 However it is possible to connect the two pins You should do so only if you are absolutely sure about what you are doing In any case power off the system before you connect the abort pins The test connector pins are accessible at the bottom side of the PCB Figure 7 MENMON Position of abort pins on test connector bottom side Cooling wing O 1 Qo r 4 O Cooling wing ESMexpress connectors SuIM Sui oo5 Q o o oa ES oa Cooling wing O f amp amp i 1O Cooling wing MEN Mikro Elektronik GmbH 52 20XM50 00 E5 2014 02 25 MENMON 3 7 3 MENMON Memory Map 3 23 1 MENMON Memory Address Mapping Table 17 MENMON Address map full featured mode Address Space Size Description Ox 0000 0000 0000 1400 5KB Exception vectors 0x 0000 3000 0000 3FFF 4KB MENMON parameter string Ox 0000 4200 0000 42FF 256 bytes VxWorks bootline Ox 0000 4300
16. to the ESMexpress standard MEN Mikro Elektronik GmbH 36 20XM50 00 E5 2014 02 25 Functional Description Installing the ESMexpress Module on a COM Express Carrier M Align the ESMexpress connectors and the mounting holes of the adapter and the module and plug the AE12 adapter firmly onto the ESMexpress module M Install the ESMexpress module on the adapter using the following mounting holes and the seven M2x4 cross recess pan head screws included in the delivery of the adapter ESMexpress Connectors on top side of board COM Express Connectors MEN Mikro Elektronik GmbH 37 20XM50 00 E5 2014 02 25 Functional Description V Turn the module around and insert five 2 5x18 cross recess countersink head screws also included in the delivery into the five COM Express mounting holes on the top of the ESMexpress module ESMexpress p Vj corer connectors on bottom side M Install the five 2 5x5 standoffs on the bottom of the adapter Mi Plug the ESMexpress module AE12 assembly onto the COM Express carrier board MI Screw the adapter onto the COM Express carrier board using five M2 5x4 screws ESMexpress module AE12 adapter board Standoff COM Express carrier MEN Mikro Elektronik GmbH 38 20XM50 00 E5 2014 02 25 MENMON 3 MENMON 3 1 General MENMON is the CPU board firmware that is invoked when the system is powered on The basic tasks of MENMON are Initial
17. use a driver provided by MEN article number 13T005 70 third party or go to the FTDI web site www ftdichip com FTDrivers htm and download a driver there MI Connect a Windows PC to USB port 7 of XC1 UART to USB COM interface To do this you need a suitable USB cable type A to A included with XC1 Audio out ETHB ETHC USB2 USB3 MI Power up the system Mi Start up a terminal program on your Windows PC e g HyperTerm and open a terminal connection MI Set your terminal connection to the following protocol 9600 baud data transmission rate 8 data bits 1 stop bit No parity M When the terminal connection is made press Enter Now you can use the MENMON BlIOS firmware see detailed description in Chapter 3 MENMON on page 39 MEN Mikro Elektronik GmbH 19 20XM50 00 E5 2014 02 25 Getting Started If you enter command LOGO on the MENMON prompt the terminal displays a message similar to the following Secondary MENMON for MEN MPC8548 Family XM50 Betal 5work2 c 2007 2008 MEN Mikro Elektronik GmbH Nuremberg MENMON 2nd Edition Created Jun 12 2008 10 45 08 CPU Board XM50 00 CPU MPC8548 Serial Number 4 CPU MEM Clk 1386 198 MHz HW Revision 00 00 00 CCB ILBC Clllks 396 50 MHz PCII PCI2 32Bit 66MHz 32Bit 33MHz PCIe x4 DDR2 SDRAM 512 MB ECC on 3 0 3 8 FRAM SRAM 128 2048 kB Produced FLASH 16 MB Last repair Reset Cause Power On Carrier Board XC01 00
18. 0 PowerPC core with MMU and double precision embedded scalar and vector floating point APU Integrated Northbridge and Southbridge Memory e 2x 32 KB L1 data and instruction cache 512 KB 256 KB L2 cache integrated in MPC8548 MPC8543 Up to 2 GB SDRAM system memory Soldered DDR2 with or without ECC Up to 300 MHz memory bus frequency depending on CPU 16 MB boot Flash 2 MB non volatile SRAM With GoldCap or battery backup on the carrier board 128 KB non volatile FRAM e Serial EEPROM 8 kbits for factory settings Serial ATA SATA Three ports via ESMexpress connector SATA Revision 1 x support Transfer rates up to 150 MB s 1 5 Gbit s Via PCI to SATA bridge USB Six USB 2 0 host ports via ESMexpress connector OHCI and EHCI implementation Data rates up to 480 Mbit s One USB client port via ESMexpress connector Via UART to USB converter Data rates up to 115 2 kbit s 16 byte transmit receive buffer Handshake lines none MEN Mikro Elektronik GmbH 4 20XM50 00 E5 2014 02 25 Technical Data Ethernet Three 10 100 1000Base T Ethernet channels with MPC8548 E Two 10 100 1000Base T Ethernet channels with MPC8543 E Two LED signals per channel for LAN link and activity status and connection speed Accessible via ESMexpress connector PCI Express One x1 or one x2 or one x4 link via ESMexpress connector e PCIeG 1 x support Data rate 250 MB s in each direction 2 5
19. 014 02 25 Functional Description 2 6 Memory and Mass Storage 2 6 1 DRAM System Memory The board provides up to 2 GB onboard soldered DDR2 double data rate SDRAM on nine memory components incl ECC The memory bus is 72 bits wide and operates at up to 300 MHz physical depending on the processor type Depending on the board version the SDRAM may have ECC error correcting code ECC memory provides greater data accuracy and system uptime by protecting against soft errors in computer memory 2 6 2 FRAM The board has up to 128 KB non volatile FRAM memory connected to the local bus of the CPU The FRAM does not need a back up voltage for data retention 2 6 3 SRAM The board has up to 2 MB non volatile SRAM memory connected to the local bus of the CPU For data retention during power off the SRAM must be supplied with a back up voltage of 3 3 V via J1 pin Vbatt J1 55 using an external GoldCap or battery device mounted on the carrier board 2 6 4 Boot Flash The board has 16 MB of onboard Flash It is controlled by the CPU Flash memory contains the boot software for the MENMON operating system bootstrapper and application software The MENMON sectors are software protected against illegal write transactions through a password in the serial download function of MENMON cf Chapter 3 5 1 Update via the Serial Console using SERDL on page 44 2 6 5 EEPROM The board has an 8 kbit serial EEPROM for factory data 2 6 6
20. 2 29 GND SE 30 GND 27 28 25 26 1 2 23 GND 24 GND 21 22 PCIE_CLK_B_REF 19 20 PCIE CLK B REF 17 GND 18 GND 15 16 13 14 11 GND 12 GND 9 10 7 8 5 GND 6 GND 3 4 1 2 MEN Mikro Elektronik GmbH 33 20XM50 00 E5 2014 02 25 Functional Description Table 7 Signal mnemonics of 120 pin ESMexpress connectors Signal Direction Function Power GND Ground Vbatt 3V battery voltage Power PS ON amp out Enable signal for external power supply Management pwR_OK in Power OK signal from external power supply RESET_IN in Reset signal from carrier board RESET_OUT out Reset signal from CPU board PCI Express PCIE_CLK_AO_REF out Reference clock AO 100 MHz option for x1 PCIE CLK AO REF link on J1 PCIE CLK B REF out Reference clock B 100 MHz PCIE CLK B REF PCIE B 3 0 _RX in Differential PCle receive lines lanes 0 to 3 PCIE B 3 0 RX PCIE B 3 0 TX out Differential PCle transmit lines lanes 0 to 3 PCIE B 3 0 TX PCIE B 7 4 _RX in Differential PCle receive lines lanes 4 to 7 PCIE B 7 4 RX option for x8 link PCIE B 7 4 TX out Differential PCle transmit lines lanes 4 to 7 PCIE B 7 4 TX option for x8 link SATA SATAO_RX SATAO RX in Differential SATA receive lines port 0 SATAO_TX SATAO TX out Differential SATA transmit lines port 0 SATA1_RX SATA1_RX in Differential SATA recei
21. 2 SATA Serial ATA International Organization SATA IO www serialata org 5 1 3 USB USB Implementers Forum Inc www usb org 5 1 4 Ethernet ANSI IEEE 802 3 1996 Information Technology Telecommunications and Information Exchange between Systems Local and Metropolitan Area Networks Specific Requirements Part 3 Carrier Sense Multiple Access with Collision Detection CSMA CD Access Method and Physical Layer Specifications 1996 IEEE www ieee org Charles Spurgeon s Ethernet Web Site Extensive information about Ethernet IEEE 802 3 local area network LAN technology www ethermanage com ethernet InterOperability Laboratory University of New Hampshire This page covers general Ethernet technology www iol unh edu services testing ethernet training 5 1 5 PCI Express PCI Special Interest Group www pcisig com MEN Mikro Elektronik GmbH 65 20XM50 00 E5 2014 02 25 Appendix 5 2 Finding out the Board s Article Number Revision and Serial Number MEN user documentation may describe several different models and or hardware revisions of the XM50 You can find information on the article number the board revision and the serial number on two labels attached to the board Article number Gives the board s family and model This is also MEN s ordering number To be complete it must have 9 characters Revision number Gives the hardware revision of the board Serial number Unique identifica
22. 20XM50 00 ES 2014 02 25 XM50 ESMexpress COM with PowerPC MPC8548 Module without cover and frame Men XM50 ESMexpress COM with PowerPC MPC8548 XM50 ESMexpress COM with PowerPC MPC8548 The XM50 is a computer on module of the ESMexpress family controlled by an integrated PowerPC MPC8548 or MPC8543 CPU processor optionally with encryption unit with clock frequencies between 800 MHz and 1 5 GHz Together with an application specific carrier board it forms a semi custom solution for industrial harsh mobile and mission critical environments The XM50 accommodates up to 2 GB of directly soldered ECC main memory and supports other memory like USB Flash on the carrier board It also features industrial FRAM and SRAM Interfaces from the MPC8548 are all routed from the XM50 for availability on any ESMexpress carrier board Those interfaces include up to three Gigabit Ethernet channels 8 PCI Express lanes for one link x4 x2 or x1 or x8 as an option triple SATA 6 USB host ports and one USB client realized using a UART to USB converter Additional COM interfaces can be made available on the carrier board via USB to COM conversion The XM50 comes with MENMON support This firmware BIOS can be used for bootstrapping operating systems from disk Flash or network for hardware testing or for debugging applications without running any operating system The XM50 is screened for operation in a 50 C to 85
23. Description Ox 8000 0000 9FFF FFFF PCIe 0x 8000 0000 9FFF FFFF PCle memory space MEM prefetchable BARS Ox A000 0000 DFFF FFFF PCle Ox A000 0000 DFFF FFFF PCle memory space MEM non prefetchable BARs Ox E000 0000 E7FF FFFF PCI Ox E000 0000 E7FF FFFF PCI1 memory space MEM Ox E700 0000 EFFF FFFF PCI2 Ox E700 0000 EFFF FFFF PCI2 memory space MEM Ox FBOO 0000 FBFE FFFF PCle Ox 0000 0000 00FE FFFF PCle ISA memory ISA Ox FBFF 8000 FBFF FFFF PCle Ox 0000 7FFF I O PCle I O space Ox FCOO 0000 FCO00 7FFF PCI Ox 8000 FFFF I O PCH I O space 1 PCD not available for MPC8543 MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Organization of the Board 4 2 Interrupt Handling Interrupt handling is done via the 12 external interrupt lines of the CPU IRQ 11 0 While IRQ lines 8 to 10 are used as PCI interrupt lines and lines 0 to 3 for PCIe see tables below the Ethernet function unit interrupt is routed to a dedicated interrupt line The mapping is as follows Table 29 Dedicated interrupt line assignment MPC854X External Interrupt Line Function IRQO Ethernet Table 30 PCI IRQ line mapping MPC854X IRQ PCI Interrupt Assigned Number Input Line pancuen MENMON IRQ8 INTA SATA 0x8 IRQ9 INTB 1st USB Controller Ox9 USBO 1 2 IRQ10 INTC 2nd USB Controller OxA USB3 4 5 Table 31
24. Diagnostic tests hardware monitor Test Name Description Availability LM81 LM81 basic access test Always Groups POST AUTO 3 6 6 Touch Table 14 MENMON Diagnostic tests touch Test Name Description Availability TOUCH Touch controller communication test Carrier board is known to Groups POST AUTO ENDLESS have a touch controller This test tries to communicate over the SPI bus with the touch controller on the carrier board by sending an Identify command to the controller Checks SPI connection to touch controller Does not check Connection between touch controller and touch panel MEN Mikro Elektronik GmbH 49 20XM50 00 E5 2014 02 25 MENMON 3 6 7 RTC Table 15 MENMON Diagnostic tests RTC Test Name Description Availability RTC Quick presence test of RTC Always Groups POST AUTO RTC_X Extended test of RTC Always Groups NONAUTO ENDLESS 3 6 71 RTC Test This is a quick presence test of the real time clock RTC and is executed on POST Checks Presence of RTC I2C access Does not check If RTC is running RTC backup voltage 3 6 7 2 Extended RTC Test Checks Presence e g I2C access RTC is running Does not check RTC backup voltage MEN Mikro Elektronik GmbH 50 20XM50 00 E5 2014 02 25 3 7 3 7 1 Consoles MENMON Configuration and Organization MENMON You can select the active consoles by means of sys
25. N Mikro Elektronik GmbH 30 20XM50 00 E5 2014 02 25 MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Functional Description Table 4 Pin assignment of ESMexpress connector J1 pins 1 60 61 59 57 55 53 51 49 47 45 43 41 39 37 Vbatt PWR OK SMB DATA SMB CLK GPOUT LED 56 54 52 50 48 46 44 42 12V PS_ON RESET_IN RESET_OUT GND Functional Description Table 5 Pin assignment of ESMexpress connector J2 pins 61 120 119 PCIE_BO_TX 120 PCIE_BO_RX 117 PCIE_BO_TX 118 PCIE BO RX 115 GND 116 GND 118 PCIE B1 TX 114 PCIE B1 RX 111 PCIE B1 TX 112 PCIE B1 RX 109 GND 110 GND 107 PCIE B2 TX 108 PCIE B2 RX 105 PCIE B2 TX 106 PCIE B2 RX 103 GND 104 GND 101 PCIE B8 TX 102 PCIE B3 RX 99 PCIE B3 TX 100 PCIE B3 RX 119 120 97 GND 98 GND 91 GND 92 GND veg GND 61 EN PCIE TBLA oo FCIE Do h 85 GND 86 GND 22 6o a IE a EXE 79 GND 80 GND 73 GND 74 GND 71 72 69 70 67 GND 68 GND 65 66 63 64 61 62 The PCI Express pins shown in zi olor are available as an option for a x8 link MEN Mikro Elektronik GmbH 32 20XM50 00 E5 2014 02 25 Functional Description Table 6 Pin assignment of ESMexpress connector J2 pins 1 60 59 60 57 58 55 56 53 GND 54 GND 51 52 49 50 47 GND 48 GND 45 46 43 44 41 GND 42 GND 39 40 61 62 a g 35 GND 36 GND 59 60 33 E 34 31 3
26. PCle IRQ line mapping PCI Interrupt Line Assigned Number MPCOSSXIRG Input PCle Interface MENMON IRQO INTA OxFO IRQ1 INTB OxF1 IRQ2 INTC OxF2 IRQ3 INTD OxF3 4 3 SMB Devices Table 32 SMB devices lC Bus Address Function 0x0 Ox5E LM81 hardware monitor OxA2 Real time clock 0xA8 CPU EEPROM 0xD2 Clock generator 0x1 OxAC Reserved for carrier board EEPROM MEN Mikro Elektronik GmbH 63 20XM50 00 E5 2014 02 25 Organization of the Board 4 4 Onboard PCI Devices Table 33 Onboard PCI devices Interface Device Number Vendor ID Device ID Function Interrupt PCI 0x00 0x1057 0x0013 PCI host bridge in MPC854X 0x10 0x1095 0x3114 SATA INTA PCI2 0x00 0x1057 0x0013 PCI host bridge in MPC854X 0x11 0x1033 0x0035 1st USB Controller USBO 1 2 INTB 0x00E0 0x12 0x1033 0x0035 2nd USB Controller USB3 4 5 INTC Ox00E0 PCle 0x00 0x1957 0x0013 PCIe bridge in MPC854X MEN Mikro ElektronikGmbH 4 64 ETT Y Y Fa uS 64 20XM50 00 E5 2014 02 25 Appendix 5 Appendix 5 1 Literature and Web Resources e XM50 data sheet with up to date information and documentation www men de products 15XM50 html XCI data sheet with up to date information and documentation www men de products 08 XCO01 html 5 1 1 PowerPC MPC8548 MPC8548E PowerQUICC JII Integrated Processor Family Reference Manual MPC8548ERM 2007 Freescale Semiconductor Inc www freescale com 5 1
27. Rev 00 01 00 Serial 3 MM E T RIMAERAADE H Note Don t power off the XM50 now otherwise the USB to UART interface on the host PC will be disconnected M Observe the installation instructions for the respective software 1 3 Installing Operating System Software The board supports Linux VxWorks INTEGRITY QNX and OS 9 By standard no operating system is installed on the board Please refer to the operating system installation documentation on how to install the software b You can find any software available on MEN s website MEN Mikro Elektronik GmbH 20 20XM50 00 E5 2014 02 25 Functional Description 2 Functional Description The following describes the individual functions of the board and their configuration on the board There is no detailed description of the individual controller chips and the CPU They can be obtained from the data sheets or data books of the semiconductor manufacturer concerned Chapter 5 1 Literature and Web Resources on page 65 2 1 Power Supply The XM50 board is supplied with 12V 9 to 16V only via ESMexpress connectors J1 J2 All other required voltages are generated on the board 2 2 Board Supervision The board features a temperature sensor and voltage monitor A voltage monitor supervises all used voltages and holds the CPU in reset condition until all supply voltages are within their nominal values In addition the board contai
28. Serial ATA SATA The XM50 provides three serial ATA channels through a PCI to SATA converter that is connected to the PowerPC processor via a dedicated 66 MHz PCI bus On board versions with the MPC8543 processor PCI to SATA shares one 33 MHz PCI bus with PCI to USB The SATA channels are led to the ESMexpress connector The SATA interfaces supports transfer rates up to 1 5 Gbits s You can find the pinout for the SATA signals in Table 3 Pin assignment of ESMexpress connector J1 pins 61 120 on page 30 MEN Mikro Elektronik GmbH 24 20XM50 00 E5 2014 02 25 gt gt Functional Description 2 7 USB Interfaces The XM50 provides six USB 2 0 host ports with OHCI EHCI implementation and one USB client port at the ESMexpress connector The six host ports are controlled via PCI to USB bridges from the PowerPC processor while the client port is driven by a UART to USB converter The UART to USB interface supports data rates up to 115 2 kbits s It has no handshake lines In connection with USB to UART driver software it can be used as a COM interface and is supported by MENMON as a console device You can find the pinout for the USB signals in Table 3 Pin assignment of ESMexpress connector J1 pins 61 120 on page 30 and Table 4 Pin assignment of ESMexpress connector J1 pins 1 60 on page 31 2 8 Ethernet Interfaces The XM50 has up to three Ethernet interfaces controlled by the CPU All channels support up to 1000 Mbits s
29. and full duplex operation Please note that ETHC is not available on board versions with the MPC8543 processor You can find the pinout for the Ethernet signals in Table 4 Pin assignment of ESMexpress connector J1 pins 1 60 on page 31 The unique MAC address is set at the factory and should not be changed Any attempt to change this address may create node or bus contention and thereby render the board inoperable The MAC addresses on XM50 are ETHA 0x 00 CO 3A 87 xx xx ETHB 0x 00 CO 3A 88 xx xx ETHC 0x 00 CO 3A 89 xx xx where 00 CO 3A is the MEN vendor code 87 88 and 89 are the MEN product codes and xx xx is the hexadecimal serial number of the product which depends on your board e g 00 2A for serial number 000042 See Chapter 5 2 Finding out the Board s Article Number Revision and Serial Number on page 66 MEN Mikro Elektronik GmbH 25 20XM50 00 E5 2014 02 25 Functional Description 2 9 GPIO The XM50 provides one GPIO pin driven by the board controller for user defined options or for a board status LED This LED can be made available on the carrier board You can find the GPIO pin in Table 4 Pin assignment of ESMexpress connector J1 pins 1 60 on page 31 2 10 PCI Express Interface The PowerPC processor supports four PCI Express lanes which can be used as one xl or one x2 or one x4 link Any link supports a data rate of 250 MB s in each direction with a bandwidth of 2 5 Gbits s
30. ards gradually became RoHS compliant WEEE Application The WEEE directive does not apply to fixed industrial plants and tools The compliance is the responsibility of the company which puts the product on the market as defined in the directive components and sub assemblies are not subject to product compliance In other words Since MEN does not deliver ready made products to end users the WEEE directive is not applicable for MEN Users are nevertheless recommended to properly recycle all electronic boards which have passed their life cycle Nevertheless MEN is registered as a manufacturer in Germany The registration number can be provided on request Copyright 2014 MEN Mikro Elektronik GmbH All rights reserved Germany MEN Mikro Elektronik GmbH Neuwieder StraBe 3 7 90411 Nuremberg Phone 49 911 99 33 5 0 Fax 49 911 99 33 5 901 E mail info men de www men de MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 France MEN Mikro Elektronik SAS 18 rue Ren Cassin ZA de la Ch telaine 74240 Gaillard Phone 33 0 450 955 312 Fax 33 0 450 955 211 E mail info men france fr www men france fr USA MEN Micro Inc 860 Penllyn Blue Bell Pike Blue Bell PA 19422 Phone 215 542 9575 Fax 215 542 9577 E mail sales menmicro com www menmicro com Contents Contents 1 Getting Started co so heb S ex arbe oe UE UR m P nesses 17 LI Map ot the Board esa uu oe domorum pulita 17 1 2 First Operation
31. ck SDRAM cells Burst mode 3 6 2 2 Extended RAM Test This full featured memory test allows to test all RAM cells Depending on the size of the SDRAM this test can take up to one minute It tests 8 16 or 32 bit access each with random pattern and single and burst access On each pass this test first fills the entire memory starting with the lowest address with the selected pattern using the selected access mode and then verifies the entire block This test is destructive Checks All address lines All data lines All control signals All SDRAM cells 3 6 3 EEPROM Table 11 MENMON Diagnostic tests EEPROM Test Name Description Availability EEPROM I2C access Magic nibble check Always Groups POST AUTO ENDLESS This test reads the first EEPROM cell over SMB and checks if bits 3 0 of this cell contain the magic nibble OxE MEN Mikro Elektronik GmbH 48 20XM50 00 E5 2014 02 25 MENMON 3 6 4 USB Table 12 MENMON Diagnostic tests USB Test Name Description Availability USBO USB5 USB device access sector 0 Always access Groups NONAUTO ENDLESS The test performs a sector 0 read from the Flash disk without verifying the content of the sector Checks USB control lines Data Data Basic USB transfer Does not check IRQ signals Partition table or file system on disk 3 6 5 Hardware Monitor Test Table 13 MENMON
32. ction cache IOI Scan for BIOS devices LM81 Show current voltage and temperature values LOGO Display MENMON start up text screen LS lt clun gt lt dlun gt lt opts gt List files partitions on device MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 MENMON Command Description MC lt addr1 gt lt addr2 gt lt cnt gt Compare memory MII lt clun gt lt reg gt lt val gt Ethernet MII register command MO lt from gt lt to gt lt cnt gt Move copy memory MS lt from gt lt to gt lt val gt Search pattern in memory MT lt opts gt lt start gt lt end gt lt runs gt Memory test NBOOT lt opts gt Boot from network NDL lt opts gt Update Flash from network NETSTAT Show current state of networking parameters PCI PCI probe PCIC dev lt addr gt bus lt func gt val PCI config register change PCID dev lt bus gt lt func gt PCI config register dump PCIR List PCI resources PCI VPD lt devNo gt lt busNo gt lt capld gt PCI Vital Product Data dump PFLASH lt D gt lt O gt lt S gt lt A gt Program Flash PGM XXX args Media copy tool PING host lt opts gt Network connectivity test RELOC Relocate MM to RAM RST Cause an instant system reset RTC xxx lt arg gt Real time clock commands S lt addr gt
33. ed Mode Full Mode 40 MENMON State diagram main state llle esses 41 MENMON Position of abort pins on test connector bottom side 52 Labels giving the board s article number revision and serial MUM DER oa osos ned plex EMG additque Oasis REE oS 66 Tables Table 1 Processor core options on XMDO uds ce RR eem a waned 22 Table 2 Possible PCI Express link configurations 26 Table 3 Pin assignment of ESMexpress connector J1 pins 61 120 30 Table 4 Pin assignment of ESMexpress connector J1 pins 1 60 31 Table 5 Pin assignment of ESMexpress connector J2 pins 61 120 32 Table 6 Pin assignment of ESMexpress connector J2 pins 1 60 33 Table 7 Signal mnemonics of 120 pin ESMexpress connectors 34 Table 8 MENMON Program update files and locations 44 Table 9 MENMON Diagnostic tests Ethernet llle esee 46 Table 10 MENMON Diagnostic tests SDRAM SRAM and FRAM 47 Table 11 MENMON Diagnostic tests EEPROM 0 0000 48 Table 12 MENMON Diagnostic tests USB slslseeeeeeeeees 49 Table 13 MENMON Diagnostic tests hardware monitor 49 Table 14 MENMON Diagnostic tests touch lees eres 49 Table 15 MENMON Diagnostic tests RTC 2 0 0 0 eee eee eee eee 50 Table 16 MENMON System parameters for console selection and COMMGUTANON
34. ering the Setup Menu Command Line During normal boot you can abort the booting process in different ways during the self test depending on your console With a touch panel press the Setup button to enter the Setup Menu With a text console press the s key to enter the Setup Menu With a text console press ESC to enter the command line By default the self test is not left until 3 seconds have elapsed measured from the beginning of the self test even if the actual test has finished earlier to give the user a chance to abort booting and enter the Setup Menu You can modify the self test wait time through MENMON system parameter stwait see page 57 MEN Mikro Elektronik GmbH 42 20XM50 00 E5 2014 02 25 d a MENMON 3 3 Configuring MENMON for Automatic Boot You can configure how MENMON boots the operating system either through the Setup Menu or through the command line In the Basic Setup Menu you can select the boot sequence for the bootable devices on the XM50 The selected sequence is stored in system parameter mmstartup as a string of MENMON commands For example if the user selects Int CF Ether None the mmstartup string will be set to DBOOT 0 NBOOT TFTP You can view and modify this string directly using the Expert Setup Menu option Startup string or through the command line command EE MMSTARTUP See also MENMON 2nd Edition User Manual for further details 3 4 Calibrating the Touc
35. es on this medium conforming with this name pattern for selection 3 5 4 Automatic Update Check MENMON s automatic update check looks for some special files on an external medium connected to the first USB port USBO However the XM50 implementation does not support program update here but can boot from the external medium The file that is searched for has a name stored in system parameter bf or bootfile or if this is empty BOOTFILE If this file is found it is assumed that the external medium is supposed to be booted from To allow MENMON to locate this file it must be in the root directory of a DOS FS This works on unpartitioned media or on drives with one partition MENMON does not automatically start the boot but presents the following menu to the user Detected an update capable external medium gt Ignore continue boot Boot from external medium If there is no user input for 5 seconds after the menu appears booting continues MEN Mikro Elektronik GmbH 44 20XM50 00 E5 2014 02 25 MENMON 3 5 5 Updating MENMON Code gt Updates of MENMON are available for download from MEN s website MENMON s integrated Flash update functions allow you to do updates yourself However you need to take care and follow the instructions given here Otherwise you may make your board inoperable A In any case read the following instructions carefully Please be aware that you do MENMON updates at your own risk Afte
36. fault gateway Empty string No Read write h nethost Host IP address used when booting Empty string No Read write over NBOOT TFTP hostname VxWorks name of boot host Empty string No Read write netaddr Access the IP address part of netip No Read write parameter netsm Access the subnet mask part of netip No Read write parameter procnum VxWorks processor number decimal O No Read write S VxWorks start up script Empty string No Read write tn netname Host name of this machine Empty string No Read write unitnum VxWorks boot device unit number 0 No Read write decimal 3 75 4 Reset Cause Parameter rststat The following rststat values are possible When MENMON starts up it determines the reset cause and sets system parameter rststat accordingly Table 25 MENMON Reset causes through system parameter rststat rststat Value Description cbrst Board was reset by carrier board pwon Power On swrst Board was reset by software by means of the board s reset controller wdog Board was reset by watchdog timer unit MEN Mikro Elektronik GmbH 59 20XM50 00 E5 2014 02 25 3 8 MENMON MENMON Commands The following table gives all MENMON commands that can be entered on the XM50 MENMON prompt You can call this list also using the H command Table 26 MENMON Command reference Command Description lt reg gt val Display modify registers in debugger model ACT lt addr gt
37. h mobile and mission critical environments 2 11 1 Mechanical Concept ESMexpress modules are embedded in a frame and a cover and are firmly screwed to a carrier board The frame and the cover ensure 100 EMC protection Only soldered components are used to withstand shock and vibration and the design is optimized for conformal coating All ESMexpress modules support a single 95 x 125 mm form factor 2 11 2 Thermal Concept ESMexpress modules are equipped with eight cooling wings for conductive cooling The heat generated on the board is transported to the frame and the cover via the cooling wings The frame and the cover however are only part of the thermal solution for a module They only provide a common interface between the ESMexpress module and implementation specific thermal solutions The module can e g be cooled via conductive cooling where the heat is transported to a housing or a heat sink built on top of the cover Where operating temperatures are moderate the module may even do without the frame and cover with a suitable low power processor and airflow MEN Mikro Elektronik GmbH 27 20XM50 00 E5 2014 02 25 Functional Description ESMexpress connectors Oo o o oa ES oa Screws connecting the frame and cover Don t remove Please contact MEN s sales team for further information MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Functional Description 2 11 3 ESMexpress Co
38. h Screen You can enter the touch panel calibration function through the Setup Main Menu This function is also entered automatically during the self test if you hit the touch screen at any position outside the Setup button You may have missed the Setup button because the touch panel was incorrectly calibrated Follow the instructions on the screen to complete calibration See also MENMON 2nd Edition User Manual for further details MEN Mikro Elektronik GmbH 43 20XM50 00 E5 2014 02 25 MENMON 3 5 Updating Boot Flash 3 5 1 Update via the Serial Console using SERDL You can use command SERDL to update program data using the serial console The following table shows the XM50 locations Table 8 MENMON Program update files and locations File Name Password for Extension Typical File Name SERDL Location SMM 14XM50 00 01 02 5MM MENMON Secondary MENMON FXxx MYFILE F000 Starting at sector xxx in boot Flash Exx MYFILE E00 Starting at byte xx in EEPROM 3 5 2 Update from Network using NDL You can use the network download command NDL to download the update files from a TFTP server in network The file name extensions locations and passwords are the same as for the SERDL command 3 5 3 Update via Program Update Menu MENMON scans an external medium connected to the first USB port USBO for files named 74XM50 SMM The Program Update Menu will then give a list of all fil
39. if an additional heat sink is needed or not In any case you should check your thermal conditions and implement appropriate cooling See also Chapter 2 11 2 Thermal Concept on page 27 Please note that if you do not use the cover and frame supplied by MEN and or no A heat sink warranty on functionality and reliability of the XM50 may cease If you have any questions or problems regarding thermal behavior please contact MEN MEN Mikro Elektronik GmbH 22 20XM50 00 E5 2014 02 25 Functional Description 2 5 Bus Structure 2 5 1 Host to PCI Bridge The integrated host to PCI bridge is used as host bridge and memory controller for the PowerPC processor All transactions of the PowerPC to the PCI bus are controlled by the host bridge The FRAM SRAM and boot Flash are connected to the local memory bus of the integrated host to PCI bridge The PCI interface is PCI bus Rev 2 2 compliant and supports all bus commands and transactions Master and target operations are possible Only big endian operation is supported 2 5 2 Local PCI Buses Two local PCI buses are controlled by the integrated host to PCI bridge One is connected to the PCI to USB bridge and runs at 33 MHz The other connects the PCI to SATA bridge and operates at 66 MHz Board versions with the MPC8543 processor only have one local PCI bus operating at 33 MHz The I O voltage is fixed to 3 3V The data width is 32 bits MEN Mikro Elektronik GmbH 23 20XM50 00 E5 2
40. ik GmbH 7 20XM50 00 E5 2014 02 25 Product Safety Product Safety A Electrostatic Discharge ESD Computer boards and components contain electrostatic sensitive devices Electrostatic discharge ESD can damage components To protect the board and other components against damage from static electricity you should follow some precautions whenever you work on your computer Power down and unplug your computer system when working on the inside Hold components by the edges and try not to touch the IC chips leads or circuitry Use a grounded wrist strap before handling computer components Place components on a grounded antistatic pad or on the bag that came with the component whenever the components are separated from the system Store the board only in its original ESD protected packaging Retain the original packaging in case you need to return the board to MEN for repair MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 About this Document About this Document This user manual is intended only for system developers and integrators it is not intended for end users It describes the hardware functions of the board connection of peripheral devices and integration into a system It also provides additional information for special applications and configurations of the board The manual does not include detailed information on individual components data sheets etc A list of literature is given in the append
41. in state Main State MENMON s SETUP do start network servers Screen oriented Main menu J A s pressed C E Screen Menu Init gt Init on chip MMBIOS devs PCI autoconfig RTC init FPGA load Init further MMBIOS devs Check for user abort No user intervention Selftest Touch pressed outside setup TouchCalib do touch calibration S Perform self tests ES User abort or degraded mode User abort or Self test error and stignfault false Check for user abort y No user intervention di Auto Update Check ON do check for update media Execute Auto update dialog when suitable medium found Leave dialog after 5 seconds os E Booting Execute mmstartup string mmstartup empty Jump to bootstrapper i No user intervention v v MenmonCli entry start network servers do process command line User abort or Boot failure MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 MENMON 3 2 Interacting with MENMON To interact with MENMON you can use the following consoles UART to USB COM via UART to USB interface Touch panel TFT interface if present Telnet via network connection HTTP monpage via network connection The default setting of the COM ports is 9600 baud 8 data bits no parity and one stop bit 3 2 1 Ent
42. ix History Issue Comments Date E1 First edition 2008 07 10 E2 Corrected USB device number and IDs in PCI 2008 11 27 device table corrected SMB device table added MTBF value E3 General update minor errors corrected 2011 07 28 E4 Clarified technical data and options added Table 31 2012 02 01 PCle IRQ line mapping general improvements minor errors corrected E5 Removed all ANSI VITA 59 references minor errors 2014 02 25 corrected MEN Mikro Elektronik GmbH 9 20XM50 00 E5 2014 02 25 Pi italics bold monospace comment hyperlink IRQst IRQ in out About this Document Conventions This sign marks important notes or warnings concerning the use of voltages which can lead to serious damage to your health and also cause damage or destruction of the component This sign marks important notes or warnings concerning proper functionality of the product described in this document You should read them in any case Folder file and function names are printed in italics Bold type is used for emphasis A monospaced font type is used for hexadecimal numbers listings C function descriptions or wherever appropriate Hexadecimal numbers are preceded by Ox Comments embedded into coding examples are shown in green color Hyperlinks are printed in blue color The globe will show you where hyperlinks lead directly to the Internet so you can look for the latest information on
43. ize the CPU and its peripherals PCI PCle auto configuration Perform self test Provide debug diagnostic features on MENMON command line Interaction with the user via touch panel TFT display if supported by ESMexpress carrier Boot operating system Update firmware or operating system The following description only includes board specific features For a general T description and in depth details on MENMON please refer to the MENMON 2nd Edition User Manual MEN Mikro Elektronik GmbH 39 20XM50 00 E5 2014 02 25 3 1 1 State Diagram MENMON Figure 5 MENMON State diagram Degraded Mode Full Mode f Degraded Mode M _ mh S do CPU early init Check if secondary MENMON valid NC y Secondary MENMON not valid or abort pin set Y DegradedStartup StartupPrologue N Determine clocks 12C controller init Secondary MENMON valid SYSPARAM init SS Init early MMBIOS devs Check for D pressed Parse SO DIMM SPD Init DRAM Check for d pressed ud DRAM test J DRAM ok l Relocating 7 C a D d pressed DRAM not working v MainState A d Full Mode y A FullStartup UN Init heap in DRAM StartupPrologue i V J MainState l NL ie MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Secondary MENMON Figure 6 MENMON State diagram ma
44. khz PCI bus clock frequency system input Yes Read only clock decimal Hz rststat Reset status code as a string see Yes Read only Chapter 3 7 5 4 Reset Cause Parameter rststat on page 59 usbdp USB boot device path in format Yes Read only bus gt 1st_port_no gt gt last_port_no e g 00 gt 02 gt 01 for USB bus 0 port no 1 2 port no 2 1 1 If implemented Table 22 MENMON XM50 system parameters Production data Parameter aer Parameter User alias Description Standard Default String Access brd Board name Yes Read only brdmod Board model mm Yes Read only brdrev Board revision xx yy zz Yes Read only prodat Board production date MM DD YYYY Yes Read only repdat Board last repair date MM DD YYYY Yes Read only sernbr Board serial number Yes Read only MEN Mikro ElektronikGmbH 00 E 36 20XM50 00 E5 2014 02 25 MENMON Table 23 MENMON XM50 system parameters MENMON persistent parameters Parameter eus Parameter User alias Description Standard Default String A ces bsadr bs Bootstrapper address Used when BO l0 No Read write command was called without arguments hexadecimal 32 bits cbr baud Baudrate of all UART consoles dec 9600 Yes Read write cond con3 CLUN of console 0 3 hex see OxFF auto No Read write Chapter 3 7 1 Consoles on page 51 eccsth ECC single bit error threshold 32 No Read
45. line Signal names followed by or preceded by a slash indicate that this signal is either active low or that it becomes active at a falling edge Signal directions in signal mnemonics tables generally refer to the corresponding board or component in meaning to the board or component out meaning coming from it Vertical lines on the outer margin signal technical changes to the previous issue of the document MEN Mikro Elektronik GmbH 10 20XM50 00 E5 2014 02 25 About this Document Legal Information Changes MEN Mikro Elektronik GmbH MEN reserves the right to make changes without further notice to any products herein Warranty Guarantee Liability MEN makes no warranty representation or guarantee of any kind regarding the suitability of its products for any particular purpose nor does MEN assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages TO THE EXTENT APPLICABLE SPECIFICALLY EXCLUDED ARE ANY IMPLIED WARRANTIES ARISING BY OPERATION OF LAW CUSTOM OR USAGE INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE OR USE In no event shall MEN be liable for more than the contract price for the products in question If buyer does not notify MEN in writing within the foregoing warranty period MEN shall ha
46. nnectors The XM50 is connected to the carrier board via two 120 pin connectors Connector types 2 row 120 pin high speed receptacle 0 5mm pitch e g Samtec QSH 060 01 L D A K Mating connector 2 row 120 pin high speed plug connector 0 5mm pitch Note In the following pinout tables the ESMexpress J connectors are shown as if seen through the cover IA side and PCB i e the pin layout position of pin 1 will be the same on a carrier board Cf Figure 1 Map of the board cover side page 17 and Figure 2 Map of the board connector side page 18 ESMexpress connectors on bottom side I g E f s O MEN Mikro Elektronik GmbH 29 20XM50 00 E5 2014 02 25 Functional Description Table 3 Pin assignment of ESMexpress connector J1 pins 61 120 19 PCIE_AO_TX 120 PCIE A0 RX 117 PCIE_A0_TX 118 PCIE_AO_RX 115 GND 116 GND 113 PCIE_CLK_AO_REF 114 111 PCIE CLK AO REF 112 109 GND 110 GND 107 108 105 106 103 104 2 101 102 99 100 119 120 97 GND 98 GND 95 SATAO_TX 96 SATAO_RX 93 SATAO TX 94 SATAO RX 91 GND 92 GND 89 SATA1 TX GND ag SATA1_RX BH SATA1 TX 88 SATA1_RX 85 GND 86 GND P 93 SATA2_TX 84 SATA2_RX 81 SATA2 TX 82 SATA2 RX 79 GND 80 GND 62 z The PCI Express pins shown in grey color are available on request for a x1 link e g for special XM50 versions without a J2 connector ME
47. nnectors oc soe Re 29 2 11 4 Using an ESMexpress Module on a COM Express Carrier Boards RTT 36 3 MENMON 336 hevetURR E LEER RA REEL WERL VENE RO ERE RO EPA 39 SES ncUM mE 39 3 1 1 State Diagram ee 06 4 04 sces o RR rp eR 40 3 2 Interacts with MENMON 22 2020 nb ebbe ee greed erda 42 3 2 1 Entering the Setup Menu Command Line 42 3 3 Configuring MENMON for Automatic Boot 43 34 Calibrating the Touch Screen over netEPETEIDIU EE PP 43 3 Updating Boot Flash 3 sse te RR nempe wt 44 MEN Mikro Elektronik GmbH 13 20XM50 00 E5 2014 02 25 Contents 3 5 Update via the Serial Console using SERDL 44 3 5 2 Update from Network using NDL 44 3 5 3 Update via Program Update Menu 44 354 Automate Update Check 52 rocher en 44 3 9 29 Updating MENMON Code cc cp essa o Ry erede 45 3 6 Diagnostic Tests 2s zoo e ope RR a HE ER TEE E 46 JOL ihent un ooh eres ied a s extant uve ida 46 3 6 2 SDRAM SRAM and FRAM 0 00 eese 47 310 3 SBBPRONL xod ERIS o RES eee E O o E eae ss 48 S04 USD cedere oer edd s a rd at 6d tas to pali mea 49 3 65 Hardware Monitor Test llle 49 9400 NouMo sienna Edd e POP NO ip steep op 49 3 0 7 IRIQ uuu RI otrie a kE i CR PES E EE US Re 50 3 7 MENMON Configuration and Organization 51 SU Consoles saa xoa Su EEE RORGOS CERCA UE pa 5i 32 ADON Pine rente open PIDE REE ON aba al ae 32 3 7 3
48. ns a PLD watchdog that must be triggered After configuration the CPU serves the PLD watchdog The watchdog timeout is automatically set to 1 12 s after the first trigger pulse by the CPU The watchdog can be enabled or disabled through MENMON and can be triggered by a software application This function is normally supported by the board support package see BSP documentation 2 3 Real Time Clock The board includes an RA8581 real time clock Interrupt generation of the RTC is not supported For data retention during power off the RTC must be supplied with 3V via J1 pin Vbatt J1 55 using an external GoldCap or battery device mounted on the carrier board A control flag indicates a back up power fail condition In this case the contents of the RTC cannot be expected to be valid A message will be displayed on the MENMON console in this case MEN Mikro Elektronik GmbH 21 20XM50 00 E5 2014 02 25 Functional Description 2 4 Processor Core The board is equipped with the MPC8548 or MPC8543 processor which includes a 32 bit PowerPC e500 core the integrated host to PCI bridge Ethernet controllers and UARTs 2 4 1 General The MPC8548 3 family of processors integrates an e500v2 processor core built on Power Architecture technology with system logic required for networking telecommunications and wireless infrastructure applications The MPC8548 3 is a member of the PowerQUICC III family of devices that combine system level support
49. of the board and some hints for first installation in a system 1 1 Map of the Board The following board map shows the board assembly from its cover side top and connector side bottom The cover includes holes for mounting the ESMexpress module onto a COM Express carrier Figure 1 Map of the board cover side ESMexpress connectors on bottom side Top cover O Screw holes to install ESMexpress module on a COM Express carrier MEN Mikro Elektronik GmbH 17 20XM50 00 E5 2014 02 25 Getting Started KY O Coolingwing i N ESMexpress Frame connectors O Holes for mounting screws on carrier board Screws connecting the frame and cover Don t remove MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 i d Getting Started 1 2 First Operation You can use the following check list when installing the board for the first time and with minimum configuration using a Windows host PC M Power down the system M Install the XM50 on your ESMexpress carrier board making sure that the ESMexpress connectors are properly aligned To provide a better example we assume that you are using MEN s standard evaluation carrier XC1 which provides the necessary connections for a Windows host PC You can find more information on the XC1 in the XC1 User Manual which is available for download on MEN s website Mi Install a USB to UART driver on your host PC You can
50. r an incorrect update your CPU board may not be able to boot WARNING After a MENMON update the hardware revision displayed by MENMON will most probably be different from the actual hardware revision of your CPU board because MENMON follows MEN s hardware revision updates Do the following to update MENMON M Unzip the downloaded file e g 14xm50 00_01_02 zip into a temporary directory M Power on your XM50 M Connect a terminal emulation program with the UART to USB port of your XM50 and set the terminal emulation program to 9600 baud 8 data bits 1 stop bit no parity no handshaking if you haven t changed the target baud rate on your own M Reset the XM50 by pressing the reset button on the carrier board or through software e g reboot command under VxWorks M Press ESC immediately after resetting the XM50 Mi In your terminal emulation program you should see the MenMon gt prompt M Enter SERDL MENMON to update the secondary MENMON You should now see a C character appear every 3 seconds M In your terminal emulation program start a YModem download of file l4xm50 00 01 02 smm for example with Windows Hyperterm select Transfer gt Send File with protocol YModem MI When the download is completed reset the XM50 You can change the baud rate at runtime using command cons baud See Table 26 MENMON Command reference page 60 If you want to accelerate file transfer you can select a higher ba
51. s If 0 MENMON disables the watchdog timer before starting the operating system Note The XM50 watchdog supports only the following values 0 Disable watchdog timer 11 Short time out 1 12 seconds 260 Long time out 26 0 seconds Parameter m Parameter User alias Description Standard Default String Access tdp Telnet server TCP port decimal 1 No Read write tries Number of network tries 20 No Read write tto Minimum timeout between network 0 No Read write retries decimal in seconds u00 u15 User parameters hex 16 bits 0x0000 No Read write updcdis Disable auto update check bool 0 No Read write useflpar Store kerpar and mmstartup parameters 0 No Read write in boot Flash rather than in EEPROM bool vmode Vesa Video Mode for graphics console 0x0101 No Read write hex wat Time after which watchdog timer shall 0 disabled No Read write If FRAM is implemented 2 If SRAM is implemented MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Table 24 MENMON XM50 system parameters VxWorks bootline parameters MENMON Parameter Parameter User alias Description Standard Default String Access bf bootfile Boot file name 127 chars max Empty string No Read write bootdev VxWorks boot device name Empty string No Read write e netip IP address subnet mask e g Empty string No Read write 192 1 1 28 ffffff00 g netgw IP address of de
52. sonable attorney fees arising out of directly or indirectly any claim or personal injury or death associated with such unintended or unauthorized use even if such claim alleges that MEN was negligent regarding the design or manufacture of the part In no case is MEN liable for the correct function of the technical installation where MEN products are a part of Trademarks All products or services mentioned in this publication are identified by the trademarks service marks or product names as designated by the companies which market those products The trademarks and registered trademarks are held by the companies producing them Inquiries concerning such trademarks should be made directly to those companies Conformity MEN products are no ready made products for end users They are tested according to the standards given in the Technical Data and thus enable you to achieve certification of the product according to the standards applicable in your field of application MEN Mikro Elektronik GmbH ll 20XM50 00 E5 2014 02 25 About this Document RoHS Since July 1 2006 all MEN standard products comply with RoHS legislation Since January 2005 the SMD and manual soldering processes at MEN have already been completely lead free Between June 2004 and June 30 2006 MEN s selected component suppliers have changed delivery to RoHS compliant parts During this period any change and status was traceable through the MEN ERP system and the bo
53. tem parameters con0 con3 and configure the console through parameters ecl gcon hdp and tdp MENMON commands CONS xxx also give access to the console settings see Chapter 3 8 MENMON Commands page 60 Table 16 MENMON System parameters for console selection and configuration Parameter alias Description Default User Access cbr baud Baud rate of all UART consoles decimal default 9600 baud 8n1 9600 Read write cono con3 CLUN of console 0 3 CLUN 0x00 disable CLUN 0xF F Autoselect next available console conO is implicitly the debug console cono 08 UART to USB COM con7 00 none con2 00 none con3 00 none Read write ecl CLUN of attached network interface hex CLUN 0x00 none CLUN 0x FF first available Ethernet OxFF Read write gcon CLUN of graphics device to display boot logo CLUN 0x00 disable CLUN 0xF F Autoselect first available graphics console OxFF AUTO Read write hdp HTTP server TCP port decimal 0 don t start telnet server 1 use default port 23 else TCP port for telnet server Read write tdp Telnet server TCP port decimal 0 don t start HTTP server 1 use default port 80 else TCP port for HTTP server Read write MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 MENMON 3 7 2 Abort Pin Since the XM50 has no real abort button it is simulated by connecting
54. tion assigned during production If you need support you should communicate these numbers to MEN Figure 8 Labels giving the board s article number revision and serial number Complete article number due ES 641517 Revision number Serial number MEN Mikro Elektronik GmbH 66 20XM50 00 E5 2014 02 25
55. ud rate in MENMON and then set the terminal emulation program accordingly MEN Mikro Elektronik GmbH 45 20XM50 00 E5 2014 02 25 MENMON 3 6 Diagnostic Tests 3 6 1 Ethernet Table 9 MENMON Diagnostic tests Ethernet Test Name Description Availability ETHERO Ethernet 0 1 2 ETHA B C internal Always ETHER1 loopback test except ETHER with an ETHER2 Groups POST AUTO MPC8543 processor ETHERO X Ethernet 0 1 2 ETHA B C external Always ETHER1 X loopback test except ETHER with an ETHER2 X Groups NONAUTO ENDLESS MPC8543 processor 3 6 1 1 Ethernet Internal Loopback Test The test configures the network interface for loopback mode on PHY verifies that the interface s ROM has a good checksum verifies that the MAC address is valid not OXFFFFFF sends 10 frames with 0x400 bytes payload each verifies that frames are correctly received on the same interface If the network interface to test is the currently activated interface for the MENMON network stack the interface is detached from the network stack during test and reactivated after test Checks Connection between CPU and LAN controller Connection between LAN controller and PHY Does not check Connection between PHY and physical connector Interrupt line All LAN speeds MEN Mikro Elektronik GmbH 46 20XM50 00 E5 2014 02 25 3 6 1 2 MENMON Ethernet External Loopback Test This test is the same
56. ve lines port 1 SATA1_TX SATA1 TX out Differential SATA transmit lines port 1 SATA2_RX SATA2 RX in Differential SATA receive lines port 2 SATA2_TX SATA2 TX out Differential SATA transmit lines port 2 MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Functional Description Signal Direction Function Ethernet ETH_A_LED_ACT out Signal for activity status LED port A ETH_A_LED_LINK out Signal for link status LED port A ETH_A0 ETH_AO in out Media Dependent Interface 0 data differential pair port A ETH_A1 ETH At in out Media Dependent Interface 1 data differential pair port A ETH_A2 ETH_A2 in out Media Dependent Interface 2 data differential pair port A ETH_A3 ETH_A3 in out Media Dependent Interface 3 data differential pair port A ETH A REF out Port A reference voltage ETH B LED ACT out Signal for activity status LED port B ETH B LED LINK out Signal for link status LED port B ETH_BO ETH BO in out Media Dependent Interface 0 data differential pair port B ETH_B1 ETH_B1 in out Media Dependent Interface 1 data differential pair port B ETH_B2 ETH_B2 in out Media Dependent Interface 2 data differential pair port B ETH_B3 ETH_B3 in out Media Dependent Interface 3 data differential pair port B ETH B REF out Port B reference voltage ETH C LED ACT amp out Signal for activit
57. ve no liability or obligation to buyer hereunder The publication is provided on the terms and understanding that 1 MEN is not responsible for the results of any actions taken on the basis of information in the publication nor for any error in or omission from the publication and 2 MEN is not engaged in rendering technical or other advice or services MEN expressly disclaims all and any liability and responsibility to any person whether a reader of the publication or not in respect of anything and of the consequences of anything done or omitted to be done by any such person in reliance whether wholly or partially on the whole or any part of the contents of the publication Conditions for Use Field of Application The correct function of MEN products in mission critical and life critical applications is limited to the environmental specification given for each product in the technical user manual The correct function of MEN products under extended environmental conditions is limited to the individual requirement specification and subsequent validation documents for each product for the applicable use case and has to be agreed upon in writing by MEN and the customer Should the customer purchase or use MEN products for any unintended or unauthorized application the customer shall indemnify and hold MEN and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and rea
58. write ecl CLUN of attached network interface OxFF No Read write hex gcon CLUN of graphics screen hex see OxFF auto No Read write Chapter 3 7 1 Consoles on page 51 hdp HTTP server TCP port decimal 1 No Read write kerpar Linux Kernel Parameters 399 chars Empty string No Read write max Part of VxWorks bootline if useflpar 0 400 chars max if useflpar 1 Idlogodis Disable load of boot logo bool 0 No Read write mmstartup Start up string Empty string No Read write startup 256 chars max if useflpar 0 512 chars max if useflpar 1 nobanner Disable ASCII banner on start up 0 No Read write noecc Do not use ECC even if board supports 0 No Read write it bool nspeed0 1 3 Speed setting for Ethernet interface AUTO Yes Read write 0 3 Possible values AUTO 10HD 10FD 100HD 100FD 1000 Stdis Disable POST bool 0 No Read write stdis XXX Disable POST test with name XXX 0 No Read write bool stdis ether Internal ETHERO 1 2 loopback stdis fram FRAM test stdis sram SRAM test stdis touch Touch controller test stignfault Ignore POST failure continue boot 1 No Read write bool stwait Time in 1 10 seconds to stay at least in 30 No Read write SELFTEST state decimal 0 Continue as soon as POST has finished MEN Mikro Elektronik GmbH 57 20XM50 00 E5 2014 02 25 MENMON reset the system after MENMON has passed control to operating system decimal in 1 10
59. y status LED port C ETH C LED LINK out Signal for link status LED port C ETH_C0 ETH_CO in out Media Dependent Interface 0 data differential pair port C ETH_C1 ETH_C1 in out Media Dependent Interface 1 data differential pair port C ETH_C2 ETH_C2 in out Media Dependent Interface 2 data differential pair port C ETH_C3 ETH_C3 in out Media Dependent Interface 3 data differential pair port C ETH C REF out Port C reference voltage Other SMB CLK in out SMBus clock SMB DATA in out SMBus data GPOUT LED in out User defined general purpose output GPOUT30 of MPC854x MEN Mikro Elektronik GmbH 20XM50 00 E5 2014 02 25 Functional Description 2 11 4 Using an ESMexpress Module on a COM Express Carrier Board The AE12 adapter card offers the possibility to evaluate an ESMexpress module on a COM Express carrier board It complies with the COM Express Type 2 basic form factor On its top side the AE12 has ESMexpress connectors for connecting the ESMexpress module On the bottom side the AE12 card is equipped with standard COM Express connectors for plugging it onto the COM Express carrier Figure 4 AE12 COM Express adapter board Map of the board ESMexpress Connectors COM Express Connectors on bottom side of board LJ The pin assignment of the COM Express connectors is compliant to the COM Express standard The pin assignment of the ESMexpress connectors is compliant

20XM50-00 E5 User Manual - Diamond Point International

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