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Manual - Thiim A/S

1. DE for iz0 iswBoards i PIO_GetConfigAddressSpace i amp wBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x x x SlotID x x i wBase wirq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux PIO_DriverClose NOTE the PIO_PISO EXE file is valid for all PIO PISO cards Execute PIO_PISO EXE to get the following information e A list all of PIO PISO cards installed in this PC e A list all of resources allocated to every PIO PISO cards e A list of wSlotBus amp wSlotDevice for specified PIO PISO card identification User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 55 5 4 2 Diagnostic program for WINDOWS The software utility PIO_PISO EXE is designed for Windows 95 98 NT For more detailed information about this file please refer to the Readme txt in Windows 95 98 NT development toolkit It is useful for all PIO PISO series cards e Follow these steps to setup the toolkit Step 1 Toolkit Softwares Manuals Step 2 AGREE Step 3 PCI Bus DAQ Card Step 4 PIO_PISO Step 5 Install Toolkits for WINDOWS 98 98 or NT After executing the utility all detail information for all PIO PISO cards that have been installed in the PC will be shown as follows f PIO PISO series card Ox0001 OxD
2. Figure 4 3 2 The circuit diagram of external device 1 for the digital outputs of PISO A64 e The resistance of R1 R32 is 330 ohm e LEDs 1 32 are light emitting diodes e Pin 1 20 are GND signal for DO_0 DO_15 DO_16 DO_31 e Pin 18 37 are voltage signal for DO_0 DO_15 DO_16 DO_31 input DC 5V 24V User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 45 Here s the circuit diagram for external device 2 From the CON2 of PISO C64 Power Supply ICP DAS J l U CE OFF On 20 DN 37 VO CONNECTOR BLOCK 37 Vlotage Output COM 1 Y m g A A A A Y ACA m le y ES Im sl lan Io m g A r jai y AER m g a ES A A y x m g a N A m g a a A E JA AA m le w x 5 z m o a A m o pe A A A MES m o a a m g ES Oo A A m o a o Figure 4 3 3 The circuit diagram of external device 2 for the digital outputs of PISO C64 e The resistance of R33 R64 is 330 ohm e LEDs 33 64 are light emitting diodes e Pin 1 20 are GND signal for DO_32 DO_47 DO_48 DO_63 e Pin 18 37 are voltage signal for DO_32 DO_47
3. 5 00 V U CE 20 DN 37 VO CONNECTOR BLOC Vlotage Output m isi y m g A ds A A m D A Zo A A Aca Im O gt m ju y Pia A E AT m D A de AA A A m le m le A A y Yo m ju me ATA A A Y m T yX Figure 4 3 2 The circuit diagram of external device 1 for the digital outputs of PISO C64 e The resistance of R1 R32 is 330 ohm e LEDs 1 32 are light emitting diodes e Pin 1 20 are GND signal for DO_0 DO_15 DO_16 DO_31 e Pin 18 37 are voltage signal for DO 0 DO 15 DO 16 DO 31 input DC 5V 24V User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 44 Here s the circuit diagram for external device 1 From the CON1 of PISO A64 Power Supply ICP DAS Super 2 5 00 V U DN 37 VO CONNECTOR BLOC AAA ANNAN NADAN AAA Vlotage Output
4. Pin assignment of CON2 via extension User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 16 2 6 Pin Assignment of PISO P64 CON1 Pin assignment i Piso P64 NEE x O External DC DC 1 DC DC2 E Power GND External J3 J4 DI 0 15 1 Power GND 20 DI 16 31 DIO 2 DI 16 d O e j Ed DI 17 CON2 DI2 40 PIN DI 18 DI3 DI 19 DI4 PCI BUS DI 20 DI5 DI 21 DI6 DI 22 DI7 DI 23 DI8 10 bie n ek CON2 Pin assignment DI 25 DI 26 CON2 D I External CON2 D I External DI11 13 PowerGND 4 Power GND DI 27 DI12 14 DI32 3 DLAs DI 28 DIT8 15 DI33 5 pene DI 29 DI34 7 DI 50 DI 10 12 DI 14 16 DI 30 DI 51 DI 15 17 2135 External DI 31 DI36 11 DI 52 Power DI 0 15 18 37 DI 16 31 DI37 13 DI 53 External DI38 15 DI 54 Power N C 19 DI39 17 DI 55 DI40 19 DI 56 DI41 21 DI 57 DI 42 DI 58 DI 43 DI 59 CON2 Pin assignment ae D160 External DI 45 DI 61 Power GND External DI 46 DI 62 Power GND DI 32 47 1 20 DI 48 63 DI 47 DI 63 DI 32 2 Bias CON2 DIl Power CON2 D I External Power DI 33 3 P a i CON2 D I Power N C DI34 4 N C DI 50 N C DI 35 DI 51 DI 36 DI 52 DI 37 DI 53 DI 38 DI 54 DI 39 DI 55 DI 40 DI 56 DI 87 Extension Cable DI 58 DI 41 DI 42 DI 43 DI 59 DI 44 DI 60 DI 4
5. Address Read Write RESET control register wBaser2 Aux control register wBase 3 Aux data register Same INT mask control register Wbase 7 JAux pin status register Same Wbase 0x2a INT polarity control register Same AA NU A AA WBase 0xd0 Read data from DI 32 DI 39 WBase 0xd4 Read data from DI 40 DI 47 WBase 0xd8 Read data from DI_48 DI 55 WBase 0xdc Read data from DI 56 DI 63 Reserved Note Refer to Sec 3 1 for more information about wBase Val inportb wBase 0xc0 read from D O 7 Val inportb wBase 0xc4 read from D I 8 15 Val inportb wBase 0xc8 read from D l 16 23 Val inportb wBase 0xcc read from D l 24 31 Val inportb wBase 0xd0 read from D l 32 39 Val inportb wBase 0xd4 read from D l 40 47 Val inportb wBase 0xd8 read from D l 48 55 Val inportb wBase 0xdc read from D l 56 63 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 30 3 4 3 PISO C64 VO Mapping The PISO C64 A64 VO addresses are mapped as follows Address Read Write RESET control register wBase 2 _ Aux control register wBase 5__ INT mask control register WBase 7 Aux pin status register Same INT polarity control register Same AA AN A AAA wBase 0xd0 Reserved Write data to DO 32 to DO 39 wBase 0xd4 Reserved Write data to DO 40 to DO 47 wBase 0xd8 Reseved Write data to DO 48 to DO 55 wBase 0xdc Reserved WritedatatoDO 56toDO 63 Note Refer to Sec 3 1
6. DO 59 DO 60 Extension Cable DO 61 DO 44 14 DO 45 15 DO 46 16 DO 62 DO 47 17 External DO 63 Power DO 32 47 18 37 DO 48 63 A NC 19 External 37 Pin cable conversion 40 Pin Power Pin assignment of CON2 via extension User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 18 3 VO Control Register 3 1 How to Find the I O Address The plug amp play BIOS will assign a proper VO address to every PIO PISO series card in the power on stage The fixed IDs of PIO PISO series card are given as follows OLD Version Item Sub Vender Sub Device Sub Aux Version PISO C64 0x80 0x08 0x00 Rev1 0 3 0 PISO P64 0x80 0x08 0x10 Rev1 0 3 0 PISO P32C32 0x80 0x08 0x20 Rev1 0 4 0 PISO A64 0x80 0x08 0x50 Rev1 0 2 0 PISO P32A32 0x80 0x08 0x70 Rev1 0 2 0 Vendor ID 0xE159 Device ID 0x02 New Version Item Sub Vender Sub Device Sub Aux Version PISO C64 0x0280 0x00 0x00 Rev4 0 PISO P64 0x0280 0x00 0x10 Rev4 0 PISO P32C32 0x0280 0x00 0x20 Rev5 0 PISO A64 0x8280 0x00 0x50 Rev3 0 PISO P32A32 0x8280 0x00 0x70 Rev3 0 Vendor ID 0xE159 Device ID 0x01 We provide all necessary functions as follows 1 PIO Driverlnit amp wBoard wSubVendor wSubDevice wSubAux 2 PIO_GetConfigAddressSpace wBoardNo wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice 3 Show PIO PISO wSubVendor wSubDevice
7. Figure 4 1 6 The circuit diagram of external device 2 for the D l of PISO P32C32 P32A32 e The D l of CON1 of PISO P32C32 is set to external power e Pin 19 is the GND signal for DI 0 DI 15 e Pin 18 is the voltage signal for DI_0 DI_15 input DC 5V 24V User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 39 4 2 The example of PISO P64 e Here s the circuit diagram of D I for PISO P64 External Cable fg PCI BUS External Device 1 External Device 2 Figure 4 2 1 Digital inputs for PISO P64 e Refer to Figure 4 2 2 for the circuit diagram of external device 1 e Refer to Figure 4 2 3 for the circuit diagram of external device 2 SWITCH ONE ON B a e User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 40 Here s the circuit diagram for external device 1 From the CON1 of PISO P64 sd i O CONNECTOR BLOCK 1 AWW ed co T 1000 a Figure 4 2 2 The circuit diagram of external device 2 for the digital inputs of PISO P64
8. wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpacel i 1 wlrq save all resource of this card Step3 Control the PISO P32C32 P32A32 directly wBase wConfigSpace 0 0 get base address the card_0 outport wBase 1 enable all D VO operation of card_0 wBase wConfigSpace 1 0 get base address the card_1 outport wBase 1 enable all D I O operation of card_1 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 23 Find the configure address space of your PISO P64 card Step1 Detect all PISO P64 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x10 for PISO P64 wRetVal PIO Driverlnit amp wBoards wSubVendor wSubDevice wSubAux printf There are d PISO P64 Cards in this PC n wBoards Step2 Save resource of all PISO P64 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i awBase amp wirg amp t1 amp t2 amp t3 amp t4 amp t5 printf nCard_ d wBase x wirq x i wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpacel i 1 wlrq save all resource of this card Step3 Control the PISO P64 directly wBase wConfigSpace 0 0 get base address the card_0 outport wBase 1 enable all D VO operation of card_0 wBase wConfigSpace 1 0 get base address the card_1 outport wBase 1 enable all D
9. e P32C32P32A32 TC DEMO gt gt demo program source code e P32C32P32A32 TC DIAG gt gt pio_piso auto detect program e P32C32P32A32 TC LIB PIO H gt library header file e P32C32P32A32 TC LIB PIO C gt library source file e P32C32P32A32 TC LIB TCLIB BAT gt batch compiler file e P32C32P32A32 TC LIB TCPIO_L LIB gt I O port large mode e P32C32P32A32 TC LIB TCPIO_H LIB gt I O port huge mode e P32C32P32A32 TC LIB IOPORT_L LIB gt I O port large mode e P32C32P32A32 TC LIB IOPORT_H LIB gt I O port huge mode e AP32C32P32A32TCIDEMONPIO H gt library header file e P32C32P32A32 TC DEMO DEMO1 C gt demo source file e AP32C32P32A32TCIDEMOIDEMO2 C gt demo2 source file e AP32C32P32A32TCIDEMOIDEMO3 C gt demo3 source file e 1P32C32P32A32TCIDEMOIDEMO1 PRJ gt TC project file e AP32C32P32A32TCIDEMOIDEMO 2 PRJ gt TC project2 file e AP32C32P32A32TCIDEMOIDEMOS PRJ gt TC projects file e P32C32P32A32 TC DEMO DEMO1 EXE gt demo1 execution file e 1P32C32P32A32TCIDEMOIDEMO 2 EXE gt demo2 execution file e AP32C32P32A32TCIDEMOIDEMOS EXE gt demo3 execution file User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 48 e P32C32P32A32 TC DIAG PIO H gt library header file e P382C32P32A32 TC DIAG PIO_PISO C gt I O source code e P32C32P32A32 TC DIAG PIO_PISO PRJ gt TC project file e P32C32P32A32 TC DIAG PIO_PISO EXE gt VO execution file
10. C64A64 MSC DIAG PIO_PISO C C64A64 MSC DIAG MAKE1 BAT gt VO port large mode gt VO port huge mode gt library header file gt demo1 source file gt BC project file 2 demo1 execution file gt library header file gt VO source code gt BC project file gt VO execution file gt for library source code gt demo program source gt pio_piso auto detect gt library header file gt library source file gt batch compiler file gt VO port large mode gt VO port huge mode gt VO port large mode gt VO port huge mode gt library header file gt demo1 source file gt demoi batch file gt demo1 execution file gt library header file gt VO source code gt batch file C64A64 MSC DIAG PIO_PISO EXE gt VO execution file User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 54 5 4 Diagnostic program Find all PIO_PISO series cards in this PC system Step 1 plug all PIO_PISO cards into PC Sl Step 2 run PIO_PISO EXE EA ES AAA Ne HER AGE A AAN include PIO H WORD wBase wlrg WORD wBase2 wlra2 int main int i j j1 j2 3 j4 k jj dd j11 j22 j33 j44 WORD wBoards wRetVal WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char c float ok err clrscr wRetVal PIO_Driverlnit amp wBoards Oxff Oxff Oxff for PIO PISO printf nThrer are d PIO PISO Cards in this PC wBoards if wBoards 0 exit 0 printf n
11. Ud U CE 20 DN 37 I O CONNECTOR BLOCK 37 BEB RRB RRB RBRERBRRRR RR RRS Y EE EEEEE EES ENE 19 o o Ac Am A A m o m ic o A Ale Ale Im O ho A A A A mj jam i m o o o o A er Am a A m o a o rd A A m E o o a m o ls acj fac fact far fac fac fat A o o A m E i A A m z o Figure 4 1 4 The circuit diagram of external device 2 for the digital outputs of PISO P32C32 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 36 From the CON2 of PISO P32A32 LI U o DN 37 I O CONNECTOR BLOCK SBERERBRE BRE RBRB BRB RBRBRRBRRRE 1 uu au aed Raed Mad Raed Maal Mal Raed Mal aed Ma Heel Mal ll 2 o E m o y y m o D o i m o MM y al dar EJ r m o Ms ed y m o D N m o y aL Mw Y y o x o S m y SIE SIE rd m o rd m o m o D a m o a y D o m o 3 A m o
12. 20 pin flat cable User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 15 2 5 Pin Assignment of PISO P32C32 P32A32 CON1 Pin assignment Os MN Piso Ps2cs2 MH Oo CON1 DO External VP1 TEDT TEDZ DC DC 1 P32A32 GND 1 CON1 DO External 20 GND Pa DIO 21 DOO DI 1 22 DO1 4 DI 2 23 DO2 DI 3 24 DO3 DI 4 25 DO4 DI5 26 DO5 PCI BUS DI6 27 DO6 DI7 28 DO7 DI8 29 DO8 DI9 3 D i A DI10 EE Ros CON2 Pin assignment 31 DO10 DI 11 DI 12 pS DOTI CON2 DO External CON2 DO External 33 DO12 GND GND DI 13 34 DO13 DI16 DO16 Dis 35 DO14 DI17 DO17 DI15 17 56 Dois DI18 DO18 CONT DNCOMIATE 37 CON1 DO External DI19 D019 CON1 DI COM1B 19 Power Diab voz DI21 DO21 DI22 D022 CON2 Pin assignment D123 Do23 DI24 D024 DI25 D025 DI26 DO26 CON2 DO External GND 1 CON2 DO External DI27 DO27 20 GND DI16 2 DI28 DO28 21 DO16 DI 17 3 D129 D029 22 DO17 DI 18 4 DI30 DO30 23 DO18 DI19 5 DI31 DO31 24 DO19 DI 20 6 CON2D 1 COM2A bbe DO Extenal 25 DO20 ower DI 21 7 CON D I COM2B N C dl 26 DO21 DI 22 8 N C N C 27 DO22 DI 23 9 28 DO23 DI 24 0 29 DO24 DI 25 11 30 DO25 DI 26 12 31 DO26 DI 27 13 32 DO27 DI 28 14 33 DO28 DI 29 15 i 34 D029 lt q Extension Cable DI30 16 35 DO30 DI 31 17 36 DO31 CON2 D I COM2A 18 7 CON2 DO External CON2 D ICOM2B 19 Power 37 Pin cable conversion 40 Pin o ON OO FF WO N a ae ee ek ak ak ao a BU N O
13. e C64A64 TC DIAG PIO_PISO PRJ e C64A64 TC DIAG PIO_PISO EXE e C64A64 BC LIB gt e C64A64 BC DEMO gt e C64A64 BC DIAG gt e C64A64 BC LIB PIO H e C64A64 BC LIB PIO C e C64A64 BC LIB BCLIB BAT e C64A64 BC LIB BCPIO_L LIB e C64A64 BC LIB BCPIO_H LIB gt library header file gt VO source code gt I O project file gt I O execution file gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file gt VO port large mode gt VO port huge mode User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 53 C64A64 BC LIB IOPORT_L LIB C64A64 BC LIB IOPORT_H LIB C64A64 BC DEMO PIO H C64A64 BC DEMO DEMO1 C C64A64 BC DEMO DEMO1 PRJ C64A64 BC DEMO DEMO1 EXE C64A64 BC DIAG PIO H C64A64 BC DIAG PIO_PISO C C64A64 BC DIAG PIO_PISO PRJ C64A64 BC DIAG PIO_PISO EXE C64A64 MSC LIB gt C64A64 MSC DEMO gt code C64A64 MSC DIAG gt program C64A64 MSC LIB PIO H C64A64 MSC LIB PIO C C64A64 MSC LIB MSCLIB BAT C64A64 MSC LIB MSCPIO_L LIB C64A64 MSC LIB MSCPIO_H LIB C64A64 MSC LIB IOPORT_L LIB C64A64 MSC LIB IOPORT_H LIB C64A64 MSC DEMO PIO H C64A64 MSC DEMO DEMO1 C C64A64 MSC DEMO MAKE1 BAT C64A64 MSC DEMO DEMO1 EXE C64A64 MSC DIAGI PIO H
14. s the circuit diagram for external device 1 From the CON1 of PISO P32C32 TI Power Supply 5 00 V Un U CE 20 DN 37 MO CONNECTOR BLOCK 37 PORO DONA ODA D D o 25 D 2 rd v N D a 5 oee AAA D o Figure 4 1 2 The circuit diagram of external device 1 for the digital outputs of PISO P32C32 T From the CON1 of PISO P32A32 UI O DN 37 I O CONNECTOR BLOCK 37 Voltage Output COM OFF On Q BEB RB RB RRB RR RBRPRBRRRR PRS me 2s 2s 23 23 2s 23 25 D o Figure 4 1 3 The circuit diagram of external device 1 for the digital outputs of PISO P32A32 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 35 e Resistance for R1 R16 is 330 ohm e LEDs 1 6 are light emitting diodes e Pin 1 20 are the GND signal for DI 0 DI 15 DO 0 DO 15 e Pin 18 37 are the voltage signal for DI 0 DI 15 DO 0 DO 15 input DC 5V 24V e Here s the circuit diagram for external device 2 From the CON2 of PISO P32C32 E
15. 1 i lt 0x80 i i lt lt 1 outportb wBase 0xc0 i DO_07 to DO_00 outportb wBase 0xc4 i DO_15 to DO_08 outportb wBase 0xc8 i DO_23 to DO_16 outportb wBase 0xcc i DO_31 to DO_ 24 printf nD 31 0 Output Value 02x 02x 02x 02x i 1 1 1 sleep 1 if i Ox80 i 0x01 break if kbhit 0 c getch if c q c Q C 27 return delay 1 y end of while end of for PIO_DriverClose User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 58 5 5 2 DEMO2 for PISO P32C32 P32A32 N EE EN EE EE AM EE LAE EA EA Demo 2 Digital input of PISO P32C32 P32A32 eh Step 1 The circuit diagram of hardware refer to Sec 4 1 Step 2 run demo2 EXE ES A we AA My NI O hn earn en TO ed O a include lt dos h gt include PIO H int main WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice BYTE i j1 j2 j3 j4 char c WORD wBoards wRetVal clrscr wRetVal PIO_Driverlnit amp wBoards 0x80 0x08 0x20 for PISO P32C32 0x80 0x08 0x70 for PISO P32A32 printf n 1 Threr are d PISO P32C32 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO P32C32 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 i lt wBoards i PIO_GetConfigAddressSpace i awBase amp wirgq amp wSubVen
16. C 27 return delay 1 end of while end of for PIO_DriverClose User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 64 5 7 Demo program for PISO C64 A64 EE EER LIG DU EES BE EE ERG DEE EE EEN EEN IG EE GEGONS Demo 1 Digital Output of PISO C64 e Step 1 The circuit diagram of hardware refer to Sec 4 3 Step 2 run demo1 EXE I ee ee eA A N BELA ERA AS E ES E IS ET include lt dos h gt include PIO H int main char c BYTE i WORD wBoards wRetVal WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice clrscr wRetVal PIO_Driverlnit amp wBoards 0x80 0x08 0x00 for PISO C64 0x80 0x08 0x50 for PISO A64 printf n 1 Threr are d PISO C64 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO C64 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 iswBoards i PIO_GetConfigAddressSpace i amp wBase amp wirgq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x SubID x x x SlotID x x wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice step 1 enable all D I O port outportb wBase 1 enable DVO step 2 Digital output from DO_0 to DO 63 Al while 1 printf n n Digital output of PISO C
17. DO_32 DO_63 input DC 5V 24V User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 46 Here s the circuit diagram for external device 2 From the CON1 of PISO A64 Power Supply ICP DAS Super 2 5 00 V O U DN 37 VO CONNECTOR BLOC AAA ANNAN NENE DOI Vlotage Output COM Figure 4 3 4 The circuit diagram of external device 1 for the digital outputs of PISO A64 e The resistance of R1 R32 is 330 ohm e LEDs 1 32 are light emitting diodes e Pin 1 20 are GND signal for DO_0 DO_15 DO_16 DO_ 31 e Pin 18 37 are voltage signal for DO_0 DO_15 DO_16 DO_ 31 input DC 5V 24 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 47 5 Demo Program There are many demo programs provided on floppy disk or CD ROM After software installation the following driver will be installed into your hard disk 5 1 Program file list for PISO P32C32 P32A32 e P32C32P32A32 TC gt gt for Turbo C 2 xx or above e P32C32P32A32 BC gt gt for Borland C 3 X above e P32C32P32A32 MSC gt gt for Microsoft C 5 X above e P32C32P32A32 TC LIB gt gt for library source code
18. Figure 4 1 5 The circuit diagram of external device 2 for the digital outputs of PISO P32A32 e Resistance for R17 R32 is 330 ohm e LEDs 17 32 are light emitting diodes e Pin 1 20 are the GND signal for DI 16 DI 31 DO 16 DO 31 e Pin 18 37 are the voltage signal for DI 16 DI 31 DO 16 DO 31 input DC 5V 24V User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 37 e Here s the circuit diagram for D l of PISO P32C32 P32A32 From the CON1 of PISO P32C32 P32A32 CE 20 DN 37 VO CONNECTOR BLOCK Figure 4 1 6 The circuit diagram of external device 1 for the D of PISO P32C32 P32A32 e The D I of CON1 for PISO P32C32 is set to internal power e Pin 19 is the GND signal for DI_O DI_15 e Pin 18 is the voltage signal for DI_O DI_15 input DC 5V 24V User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 38 From the CON2 of PISO P32C32 P32A32 ee Power Supply ICP DAS Super 2 5 00 V POWER CE Vlotage Output COM OFF ON 20 DN 37 I O CONNECTOR BLOG
19. e P382C32P32A32 BC LIB gt gt for library source code e P382C32P32A32 BC DEMO gt gt demo program source code e P382C32P32A32 BC DIAG gt 2 pio_piso auto detect program e P32C32P32A32 BC LIB PIO H gt library header file e P382C32P32A32 BC LIB PIO C gt library source file e P32C32P32A32 BC LIB BCLIB BAT gt batch compiler file e P32C32P32A32 BC LIB BCPIO_L LIB gt I O port large mode e P32C32P32A32 BC LIB BCPIO_H LIB gt I O port huge mode e P382C32P32A32 BC LIB IOPORT_L LIB gt I O port large mode e P382C32P32A32 BC LIB IOPORT_H LIB gt I O port huge mode e P32C32P32A32 BC DEMO PIO H gt library header file e P32C32P32A32 BC DEMO DEMO1 C gt demo1 source file e P32C32P32A32 BC DEMO DEMO2 C gt demo2 source file e P32C32P32A32 BC DEMO DEMO3 C gt demo3 source file e P32C32P32A32 BC DEMO DEMO1 PRJ gt BC project file e P32C32P32A32 BC DEMO DEMO2 PRJ gt BC project2 file e P32C32P32A32 BC DEMO DEMO3 PRJ gt BC project3 file e P32C32P32A32 BC DEMO DEMO1 EXE gt demo1 execution file e P32C32P32A32 BC DEMO DEMO2 EXE gt demo2 execution file e P32C32P32A32 BC DEMO DEMO3 EXE gt demo3 execution file e P382C32P32A32 BC DIAG PIO H gt library header file e P32C32P32A32 BC DIAG PIO_PISO C gt I O source code e P32C32P32A32 BC DIAG PIO_PISO PRJ gt TC project file e P32C32P32A32 BC DIAG PIO_PISO EXE gt VO executi
20. e The D I of CON1 of PISO P64 is set to internal power User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 41 Here s the circuit diagram of external device 2 From the CON2 of PISO P64 DN 37 VO CONNECTOR BLOCK Figure 4 2 3 The circuit diagram of external device 2 for the digital inputs of PISO P64 e The D l of CON2 of PISO P64 is set to internal power User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 42 4 3 The example of PISO C64 A64 e Here s the D O circuit diagram for PISO C64 A64 PISO C64 DB 37 PCI BUS External Device 1 External Device 2 Figure 4 3 1 The example of digital outputs for PISO C64 A64 e Refer to Figure 4 3 2 for the circuit diagram of external device 1 e Refer to Figure 4 3 3 for the circuit diagram of external device 2 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 43 Here s the circuit diagram for external device 1 From the CON1 of PISO C64 Power Supply ICP DAS
21. for more information about wBase outportb wBase 0xc0 Val write to D O 0 7 outportb wBase 0xc4 Val write to D O 8 15 outportb wBase 0xc8 Val write to D O 16 23 outportb wBase 0xcc Val write to D O 24 31 write to D O 32 39 f write to D O 40 47 write to D O 48 55 write to D O 56 63 outportb wBase 0xd0 Val outportb wBase 0xd4 Val outportb wBase 0xd8 Val outportb wBase 0xdc Val gt AO A A User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 31 3 4 4 RESET Control Register Read Write wBase 0 Note Refer to Sec 3 1 for more information about wBase When the PC is first powered on the RESET signal is in Low state This will disable all D VO operations The user has to set the RESET signal to High state before any D I O commands are given outportb wBase 1 RESET High gt all D VO are enabled now outportb wBase 0 RESET Low gt all D I O are disabled now 3 4 5 AUX Control Register Read Write wBase 2 Aux0 Note Refer to Sec 3 1 for more information about wBase Aux 0 gt this Aux is used as a D I Aux 1 gt this Aux is used as a D O When the PC is first powered on All Aux signals are in Low state All Aux are designed as D for all PIO PISO series cards Please set all Aux to D I state User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 32 3 4 6 AUX Data Register Read Write wBase 3
22. 1 O operation of card_1 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 24 Find the configure address space of your PISO C64 A64 card Step1 Detect all PISO C64 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x00 for PISO C64 wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x50 for PISO_A64 wRetVal PIO Driverlnit amp wBoards wSubVendor wSubDevice wSubAux printf There are d PISO C64 Cards in this PC n wBoards Step2 Save resource of all PISO C64 A64 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp awBase amp wirq amp t1 amp t2 amp t3 amp t4 amp t5 printf nCard_ d wBase x wlrq x i wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpaceli 1 wlrq save all resource of this card Step3 Control the PISO C64 A64 directly wBase wConfigSpace 0 0 get base address the card_0 outport wBase 1 enable all D I O operation of card_0 wBase wConfigSpace 1 0 get base address the card_1 outport wBase 1 enable all D I O operation of card_1 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 25 3 1 3 Show PIO PISO Show PIO PISO WSubVendor wSubDevice wSubAux e wSubVendor gt subVendor ID of board you are seeking e wSubDevice gt subDevice ID of board you are seeking e wSubAux gt subAux ID of board you are seeking This functio
23. 5 DI 61 Di4 si 37 Pin cable conversion 40 Pin DI 47 External DI 63 Power DI 32 47 37 DI 48 63 N C External Power Pin assignment of CON2 via extension User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 17 2 7 Pin Assignment of PISO C64 A64 CON1 Pin assignment PISO C64 External Power GND External DO 0 15 1 Power GND 20 DO 16 31 DO 16 DO 17 DO 18 DOO DO1 DO 2 DO3 DO 4 DO5 DO6 DO7 DO 19 PCIBUS DO 20 DO 21 DO 22 DO 23 DO 24 DO DO 25 CON 2 Pin assignment DO 11 DO 12 o ON OO FF WOW N o DO8 DN 2 DO 26 DO 27 CON2 D O 32 47 CON2 D O 48 63 5 oe DO32 3 DO 48 DO 13 DO 14 po DO33 5 DO 49 DO 30 E DO15 17 DOSE 7 xternal DO 31 Boas a posi Power DO 0 15 18 37 DO 16 31 po36 11 DO 52 N C 19 External Power AA oa fF OQ DO 50 DO 37 13 DO 53 DO38 15 DO 54 CON2 Pin assignment DO 39 17 DO 55 DO40 19 DO 56 External DO41 21 DO 57 Power GND External DO 32 47 1 Power GND 20 DO 48 63 DO 43 25 DO 59 DO 42 23 DO 58 DO 32 2 DO 48 DO 44 27 DO 60 DO 33 3 DO 49 DO 45 29 DO 61 DO 34 DO 50 DO 46 31 DO 62 DO 35 DO 51 DO 47 33 DO 63 DO 36 CON2 D O 35 CON2 D O DO 52 32 47 48 63 DO 37 N C 37 N C DO 53 DO 38 N C 39 N c DO 54 DO 39 DO 55 DO 40 DO 41 DO 56 DO 57 DO 42 12 DO 58 DO 43 13
24. 64 for i 1 i lt 0x80 i i lt lt 1 outportb wBase 0xc0 i DO_07 to DO_00 outportb wBase 0xc4 i DO_15 to DO_08 outportb wBase 0xc8 i DO_23 to DO 16 outportb wBase 0xcc i DO_31 to DO_24 outportb wBase 0xd0 i DO_39 to DO_ 32 outportb wBase 0xd4 i DO_47 to DO_40 outportb wBase 0xd8 i DO_55 to DO_48 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 65 outporib wBase 0xdc i DO 63 to DO 56 printf nThe CON1 of PISO C64 printf nD31 0 Output Value 02x 02x 02x 02x1n i 1 1 1 printf nThe CON2 of PISO C64 printf nD63 32 Output Value 02x 02x 02x 02xn i 1 1 1 sleep 1 if i 0x80 i 0x01 break if kbhit 0 c getch if c q c Q c 27 return delay 1 y end of while end of for PIO_DriverClose User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 66
25. 64 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO P64 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 iswBoards i PIO_GetConfigAddressSpace i amp wBase amp wirg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x x x SlotID x x i wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice step 1 enable all D I O port SE outportb wBase 1 enable D I O step 2 Digital input from DI 0 to DI 63 while 1 for printf n Digital input of PISO P64 1 ri inportb wBase 0xc0 DI 07 to DI 0 r2 inportb wBase 0xc4 DI_15 to DI_08 r3 inportb wBase 0xc8 DI 23 to DI_16 rd inportb wBase 0xcc DI 31 to DI 24 r5 inportb wBase 0xd0 DI_39 to DI_32 r6 inportb wBase 0xd4 DIl_47 to DI_40 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 63 r7 inportb wBase 0xd8 DI_55 to DI_48 r8 inportb wBase 0xdc DI 63 to DI 56 printf nThe CON1 of PISO P64 printf nD31 0 Input Value 02x 02x 02x 02xn r4 r3 r2 r1 printf nThe CON2 of PISO P64 printf nD63 32 Input Value 02x 02x 02x 02x n r8 r7 r6 r5 sleep 1 if kbhit 0 c getch if c q C Q
26. 800 PISO 730 Board Name User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 56 5 5 Demo program for PISO P32C32 P32A32 Demo 1 Digital Output of PISO P32C32 P32A32 Step 1 The circuit diagram of hardware refer to Sec 4 1 Step 2 run demo1 EXE Y hel Mr EE DEERE ORES OEE BNE Es ET NE OE EET SESAN include lt dos h gt include PIO H int main char c BYTE i WORD wBoards wRetVal WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice clrscr wRetVal PIO_Driverlnit 8wBoards 0x80 0x08 0x20 for PISO P32C32 0x80 0x08 0x70 for PISO P32A32 printf n 1 Threr are d PISO P32C32 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO P32C32 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 iswBoards i PIO_GetConfigAddressSpace i amp wBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x SsubID x x x SlotID x x wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 57 step 1 enable all D VO port outportb wBase 1 enable D I O step 2 Digital output from DO Oto DO 31 while 1 printf n n Digital output of PISO P32C32 n for i
27. CON1_1 8 CON1_ 20 Isolation bank 3 DI 16 to DI_31 Power CON2_18 Ground CON2_19 Isolation bank 4 DO_16 to DO_31 Power CON2_37 Ground CON2_1 amp CON 2 20 All four banks are fully isolated from each other User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 8 The board layout of PISO P64 is as follows 32 Channels Digital Input O oran BY Piso P64 NEE ve we O 32 Channels iek ai al Digital Input LED1 LED2 DC DC 1 LED3 LED4 mae foe ame ER E J1 J3 J4 PCI BUS Figure 2 1B Board layout of PISO P64 Default LED 1 power indicator for DI_O to DI_15 LED 2 power indicator for DI_16 to DI_31 LED 3 power indicator for DI_32 to DI 47 LED 4 power indicator for DI 48 to DI 63 3000V isolation 3000V isolation 3000V isolation 3000V isolation J1 select internal external power for DI_O to DI_15 J2 select internal external power for DI 16 to DI 31 J3 select internal external power for DI 32 to DI 47 J4 select internal external power for DI 48 to DI 63 SS EES Swe was EE Isolation bank 1 DI 0 to DI 15 Power CON1 18 Ground CON1 1 Isolation bank 2 DI 16 to DI 31 Power CON1 37 Ground CON1_ 20 Isolation bank 3 DI 32 to DI 47 Power CON 2 18 Ground CON 2 1 Isolation bank 4 DI 48 to DI 63 Power CON2 37 Ground GON 2 20 All four banks are fully isolated from each other The DC DC1 provides the internal power supply for banks 1 amp 2 The DC DC2
28. DIAGPIO BAT gt batch file e P32C32P32A32 MSC DIAG PIO_PISO EXE gt VO execution file User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 50 5 2 Program file for PISO P64 e P64 TC gt e P64 BC gt e P64 MSC gt e P64 TC LIB gt e P64 TC DEMO gt e P64 TC DIAG gt e P64 TC LIB PIO H e P64 TC LIB PIO C e P64 TC LIB TCLIB BAT e P64 TC LIB TCPIO_L LIB e P64 TC LIB TCPIO_H LIB e P64 TC LIB IOPORT_L LIB e P64 TC LIB IOPORT_H LIB e P64 TC DEMO PIO H e P64 TC DEMO DEMO1 C e P64 TC DEMO DEMO1 PRJ e P64 TC DEMO DEMO1 EXE e P64 TC DIAG PIO H e P64 TC DIAG PIO_PISO C e P64 TC DIAG PIO_PISO PRJ e P64 TC DIAG PIO_PISO EXE e P64 BC LIB gt e P64 BC DEMO gt e P64 BC DIAG gt e P64 BC LIB PIO H e P64 BC LIB PIO C e P64 BC LIB BCLIB BAT e P64 BC LIB BCPIO_L LIB e P64 BC LIB BCPIO_H LIB gt for Turbo C 2 xx or above gt for Borland C 3 X above gt for Microsoft C 5 X above gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file gt VO port large mode gt VO port huge mode gt VO port large mode gt VO port huge mode gt library header file gt demo1 source file gt TC project1 file 2 demo1 execution file gt library header f
29. HITECTURE iese ee ee ee ee ee ee ee ee se ee ee ee GR Re AA Ge ee ee ee GR Re ee RA ee ee ee Ge ee ee Re ee 13 2 4 DAUGHTER BOARDS Vr Ge Se ED ee ese tee EE EG Ge EE ER ier Es 15 LAT DBZ EE EE EE RE EE EE aa 15 AN N ET N EE EE EE EE A EE 15 NM Ee O 15 2 5 PINASSIGNMENT OF PISO PA2CO2 POPASP ee ee ee ee ee ee ee ee ge ee ee ee ee Re ee ee ee ge ee ee Re ee 16 2 6 PIN ASSIGNMENT OF PISO P64 iese ee ee ee ee ese ee ee ee GR Re ee GRA ee ee GR Re ee RA ee ee ee Ge ee ee Re ee 17 2 7 PIN ASSIGNMENT OF PISO C64 AG64 ee ee ees ee ee ee ee ee GR ee ee ee GR Re ee ek Re ee ee ee Ge ee ee Re ee 18 VO CONTROL REGISTER eaire iartain esia Ge ee KG Se ok ae Gee EKG GEGEWE Ge GES N ae Gee ERGE GE GEREP DE ERSAK eN 19 3 1 HOW TOFIND THEO ADDRESS is ss Ee dee kk ie as a al eiii 19 ZLI eN ie RE ER EE OR ER EE 20 3 1 2 PIO GetConfigAddressSpaCe iii ee ER RR AA AR ee AR RA ee ee ee Ge ee ee anno 23 34 3 Show PIOPIO biases tacos Ge add zie etd gee be Ee Eg OE Re geed ee be deleted 26 3 2 THE ASSIGNMENT OF I O ADDRESS uie ese ees se ee ee ee ek se ee ee ee GR Re ek Re AA ee ee AR Ek Ak Ge ek ee ee AR Ge ke 27 3 3 ENABLEING VO OPERATION se ies iaa Ke Ge REG Ge ese VR hada 28 34 THEVOADDRESS MAP Redes eg se dd iaa 28 34 1 PISO P32C32 P32A32 VO MapDPING iese ee ee ee ee ee ee Ge RA ee Re EAn ee ee ee 29 3 4 2 PISO P64 VO Mapping SEE AA AAA 30 34 3 PISO C64 A64 VO Mapping uu eeue een seek se eek ee eek ee ee oe ee eke G
30. Oxff Oxff Find all PIO_PISO printf nThere are d PIO_PISO Cards in this PC wBoards if wBoards 0 exit 0 Step2 Save resources for all PIO ISO cards installed in this PC printf n for i 0 icwBoards i PIO_GetConfigAddressSpace i amp wBase amp wlrg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x x x SlotID x x i wBase wirq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 20 Find all PISO P32C32 P32A32 cards in this PC Step1 Detect all PISO P32C32 P32A32 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x20 for PISO _P32C32 wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x70 for PISO P32A32 wRetVal PIO Driverlnit amp wBoards wSubVendor wSubDevice wSubAux printf There are d PISO P32C32 Cards in this PC n wBoards Step2 Save resource of all PISO P32C32 P32A32 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wlrg amp wID1 amp wID2 amp wID3 amp wID4 amp wlD5 printf nCard_ d wBase x wirq x i wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpacel i 1 wlrq save all resource of this card Find all PISO P64 card
31. PISO P32C32 P32A32 P64 C64 A64 User s Manual Warranty All products manufactured by ICP DAS are warranted against defective materials for a period of one year from the date of delivery to the original purchaser Warning ICP DAS assumes no liability for damages consequent to the use of this product ICP DAS reserves the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use not for any infringements of patents or other rights of third parties resulting from its use Copyright Copyright 1999 by ICP DAS All rights are reserved Trademark The names used for identification only may be registered trademarks of their respective companies User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 1 Tables of Contents 1 INTRODUCTION ciclo Se Ge Er Ee Ge De vie AE AA evi ieee Se EE idad 4 LAL SPECIFICATION Scribd 4 12 ORDER DESCRIPTION ci A En setae 5 1 21 OPTIONS A A AA asada eden dese a a COSTE arse 5 1 3 PCI DATA ACQUISITION FAMILY eise ee ee ee ee ee ee ee ee Ge ee ee ee GR Re ee ee AR ee GR Re ee RA ee ee ee Ge ee ee Re es 6 1 4 PRODUCT CHECK Tostado 7 HARDWARE CONFIGURA TlON 2 2ccccseececesssnecesnsrcecnsnnnseceensnneecnensnsecsenensecesnanenenenanees 8 21 BOARD LAYOUT fics A AS ee Ge 8 2 2 ISOLATED D A ARCHITECTURE OE OE EE EE EE 11 2 3 ISOLATED D O ARC
32. R DB 24PRD 24 channel power relay board DB 16P8R 16 channel isolated D l and 8 channel relay output board DB 24POR 24 channel Photo MOS output board DB 24SSR 24 channel Solid State output board DB 24C 24 channel open collector output board ADP 37 PCI extender 50 pin OPTO 22 header to DB 37 for PCI Bus I O boards ADP 50 PCI extender 50 pin OPTO 22 header to 50 pin header for PCI Bus VO boards User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 5 1 3 PCI Data Acquisition Family We provide a family of PCI BUS data acquisition cards These cards can be divided into three groups as follows 1 PCl series first generation isolated or non isolated cards PCI 1002 1202 1800 1802 1602 multi function family non isolated PCI P16R16 P16C16 P16POR16 P8R8 D I O family isolated PCI TMC12 timer counter card non isolated 2 PlO series cost effective generation non isolated cards PIO 823 821 multi function family PIO D168 D144 D96 D64 D56 D48 D24 D I O family PIO DA16 DA8 DA4 D A family 3 PISO series cost effective generation isolated cards PISO 813 A D card PISO P32C32 P32A32 P64 C64 A64 D I O family PISO P8R8 P8SSR8AC P8SSR8DC D I O family PISO 730 730A D I O card PISO DA2 Channel to Channel Isolated D A card User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 6 1 4 Product Checklist In addition to this manual the package includes the following items e One PISO P32C32 P32A32 P64 C64 A64 card
33. R RA AA ee Re ee RA cane 5 4 2 Diagnostic program for WINDOWS iese ee ee RA ee ee ee GR Re AA ee Re ee GR Re ee ee 5 5 DEMO PROGRAM FOR PISO P32C32 P32A32 ee ee ees se ee ee ee ee ee GR Re ee ee ee Re ee ee ana 5 5 1 DEMO1 for PISO P32C32 P3RLA3S2 ee ee ee esse se ee ee se ee ee ee ee ee Re ee ee Ge Re ee ee Re 5 5 2 DEMO2 for PISO P32C32 P3B2A382 ee ee ee ese se ee ee se ee ee ee ee Re ee ee ee nr ee ee ee ge 5 5 3 DEMOS3 for PISO P32G32 P32AJ2 ee ee ee ese n ee ee ee ee RR Re ee ee ee Re ee ee ge 5 6 DEMO PROGRAM FOR PISO POA ee ees ee ee ee ee ee GR Re Ak Re ee ee ek AR AA ee ee GR Re ee RA ka 5 6 1 DEMOT for PISO PG64 ee ee ese ee ee ee se ee ee a ee GE E ee Ge ee ee Ge AA ee ee AA ee ee ee ee ee 5 7 DEMO PROGRAM FOR PISO C64 A64 uuu ee ee ee ee ee ee Re ee ee AR ee AR Re AA Ge ee ee ee ee Re ee ee Re ee 5 7 1 DEMOT for PISO C64 A64 ee ee ese se ee ee se ee ee ee ee ee ee Ge ee ee ee ee ee Re ee ee ee Re ee ee ee ee User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 3 1 Introduction The PISO P32C32 consists of 32 channels of isolated D I amp 32 channels of isolated D O Current Sinking The PISO P32A32 consists of 32 channels of isolated D I amp 32 channels of isolated D O Current Sourcing The PISO P64 consists of 64 channels of isolated D l The PISO C64 consists of 64 channels of isolated D O Current Sinking The PISO A64 consists of 64 channels of isolated D O Current Sourcing The D I specificatio
34. d D O Architecture Current sinking External Power D out External GND External Power PISO P32C32 PISO C64 Figure 2 3 2 Typical Applications of D O Current sinking User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 13 Figure 2 3 3 Isolated D O Architecture Current sourcing External Power o D out External GND External Power PISO P32A32 PISO A64 NOTE 1 The 11 12 4 132 must be lt 100 mA 2 The R1 R2 4 R32 are current limit resistors They must be designed to let 11 12 amp 132 lt 100 mA 3 If the internal resistance of the external device is large enough the R can be omitted 4 D1 D2 amp D31 are common cathode diodes for switching inductive loads They can be used as relay drivers hammer drivers lamp drivers display drivers line drivers amp logic buffers User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 14 2 4 Daughter Boards 2 4 1 DB 37 The DB 37 is a general purpose daughter board for D sub 37 pins It is designed for easy wiring connections 2 4 2 DN 37 The DN 37 is a general purpose daughter board for DB 37 with DIN Rail Mounting It is designed for easy wiring connections 2 4 3 DB 8125 The DB 8125 is a general purpose screw terminal board It is designed for easy wiring connection One DB 37 amp two 20 pin flat cable headers are used in the DB 8125 DB 8125 for DB 37 or
35. dor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x SubID x x x SlotID x x wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice step 1 enable all D VO port outportb wBase 1 enable D I O User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 59 step 2 digital input from DI 0 to DI_31 while 1 for printf n n Digital input of PISO P32C32 j1 inportb wBase 0xcO Oxff DI_07 to DI_00 j2 inportb wBase 0xc4 Oxff DI_15 to DI_08 j 3 inportb wBase 0xc8 0xff DI_23 to DI_16 j4 inportb wBase Oxcc Oxff DI 31 to DI_24 a AN printf nD 31 0 Input Value 02x 02x 02x 02x j4 j3 j2 j1 sleep 1 if 0x80 i 0x01 break if kbhit 0 c getch if c q c Q c 27 return delay 1 y end of while y end of for PIO_DriverClose User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 60 Demo 3 Digital I O test of PISO P32C32 P32A32 gi Step 1 The circuit diagram of hardware refer to Sec 4 1 Step 2 run demo3 EXE of RIES Pernt Naw A hk Als E en FE ed es si a A E include lt dos h gt include PIO H int main WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice BYTE i j1 j2 j3 j4 char c WORD wBoards wRetVal clrscr wRetVal PIO_Driverlnit 8wB
36. e One driver diskette or CD ROM e One release note It s recommended to read the release note first All important information will be given in the release note It tells 1 Where you can find the software driver amp utility 2 How to install software amp utility 3 Where is the diagnostic program 4 FAQ Attention If any of these items are missing or damaged contact the dealer from whom you purchased the product Please save the shipping materials and carton in case you want to ship or store the product in the future User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 7 2 Hardware configuration 2 1 Board Layout The board layout of PISO P32C32 P32A32 is as follows Digital input 0 15 Digital Input 16 31 Digital Output 0 15 O sz gt gt PISO P32C32 E prO Digital Output16 31 N oe LED1 LED 2 DC DC 1 PISO P32A32 DC DC 2 LED3 LED4 Et JP2 PCI BUS Figure 2 1A Board layout of PISO P32C32 P32A32 JP1JP2 EE INTERNAL site EXTERNAL Default settling LED1 Power indicator forDO_0 toDO_15 LED2 Power indicator for DI 0 to DI 15 LED3 Power indicator for DO 16 to DO 31 LED4 Power indicator for DI 16 to DI 31 JP1 Select internal external power for DI 0 to DI 15 3000V isolation JP2 Select internal external power for DI 16 to DI 31 3000V isolation Isolation bank 1 DI 0 to DI 15 Power CON1 18 Ground CON1_ 19 Isolation bank 2 DO 0 to DO 15 Power CON1 37 Ground
37. e all PISO P32C32 P32A32 P64 C64 A64 from this PC 4 Install one PISO P32C32 P32A32 P64 C64 A64 into the PC s PCI_slot2 Run PIO_PISO EXE amp record the wSlotBus2 amp wSlotDevice2 5 Repeat 3 amp 4 for all PCI_slots Record all results wSlotBus amp wSlotDevice Here is a possible sample record PC s PCI slot WslotBus WSlotDevice Slot_1 0 0x07 Slot_2 0 0x08 Slot_3 0 0x09 Slot 4 0 Ox0A PCI BRIDGE Slot_5 1 0x0A Slot_6 1 0x08 Slot_7 1 0x09 Slot_8 1 0x07 The above procedure will record all wSlotBus amp wSlotDevice in this PC with the values mapped to the card s physical slot in the PC This mapping will not be changed for any PIO PISO cards Because this mapping won t change it can be used to identify the specified PIO PISO card as follows Step1 Record all wSlotBus amp wSlotDevice Step2 Use PIO_GetConfigAddressSpace to get the wSlotBus amp wSlotDevice for the specified card Step3 The user can identify the specified PIO PISO card if he compares the two results User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 27 3 3 Enabling VO Operation When the PC is first powered on D I O operations are disabled The enable disable of D I O is controlled by the RESET signal The powered on states are given as follows e All D I O operations are disabled e All D O latch register are clear The user has to initialize before using these D I O pa
38. e ee ee ek ee ek ek eek 31 344 RESET Control Register se ese esse ee ee ee ee eke Gee ee ee GR ee GRA Ak Ge ee ee Ge ee GR ee Aa 32 345 AUX Control Register EE ssa aa 32 34 6 AUX Dala Registo ii ER EE ER ane eae Ali nih ae ee 33 3 4 7 INT Mask Control Register iii se ee ee GR Re AA RR ee ee GR Re ee GRA ee ee ee ee ee Re ee 33 34 8 Aux Status Registe sers EE Es sd EE iei Eg de EA SE ged ee Gee Ee 33 THE APPLICATIONS OF DIGITAL VO ees se ee ee ss se ee ees se ee ee Ge Ge ee Ee Ge Ee ee Ge Ge ee ee Ge ee 34 4 1 THE EXAMPLE OF PISO P32C32 P32A32 ee ee ese ee ee ge ee ee ge ee se ee ee ee ee ee ee se ee ee ee ee ge ee 34 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 2 4 2 THE EXAMPLE OF PISO P64 eie ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee 4 3 THE EXAMPLE OF PISO CG4AGA ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee 5 DEMO PROGRAM conciernen 5 1 PROGRAM FILE FOR PISO P32C32 P32A32 eie ee ee ee esse ee ee ge ee ee ee ee ee ee ee ee ge ee ee Re ea 5 2 PROGRAM FILE FOR PISO PO4 eise ees esse a e EA AE ek Ge ek Ke Re AR ek GR enn 5 3 PROGRAM FILE LIST FOR PISO CGA AGA ee ee ee ee ee ee ee se ee ee ee GR Re ek Ge cn ee cnn Re ee ee ana 5 4 DIAGNOSTIC PROGRAM eie ee ee ee Ge ee ER GR ee Re Re Re Re Ge ee RA Gee ee ER GR ee Re Re Ge ee 5 4 1 Diagnostic program for DOS eie ese ee A
39. ea eal a Pe Note Refer to Sec 3 1 for more information about wBase When the Aux is used as D O the output state is controlled by this register This register is designed for future applications Please do not change this register 3 4 7 INT Mask Control Register Read Write wBase 5 o b b b b b b fo Note Refer to Sec 3 1 for more information about wBase This register is designed for future applications Please do not change this register 3 4 8 AUX Status Register Read Write wBase 7 Note Refer to Sec 3 1 for more information about wBase Aux0 3 reserved aux4 7 Aux ID User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 33 4 The applications of Digital VO 4 1 The PISO P32C32 P32A32 e The circuit diagram of D O of PISO P32C32 P32A32 is as follows External Cable DN 37 Board External Device 1 External Device 2 Figure 4 1 1 Digital inputs outputs for PISO P32C32 P32A32 e Figure 4 1 2 PISO P32C32 shows the circuit diagram of external device 1 e Figure 4 1 3 PISO P32A32 shows the circuit diagram of external device 1 e Figure 4 1 4 PISO P32C32 e Figure 4 1 5 PISO P32A32 OE ET SWITCH ON gt hon na E o 0 OFF User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 34 shows the circuit diagram of external device 2 shows the circuit diagram of external device 2 e Here
40. his card User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 22 3 1 2 PIO GetConfigAddressSpace PIO_GetConfigAddressSpace wBoardNo wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice e wBoardNo 0 to N gt totally N 1 boards found by PIO_Drivelnit e wBase gt base address of the board control word e wlrg gt allocated IRQ channel number of this board e wSubVendor gt subVendor ID of this board e wSubDevice gt subDevice ID of this board e wSubAux gt subAux ID of this board e wSlotBus gt hardware slot ID1 of this board e wSlotDevice gt hardware slot ID2 of this board The user can use this function to save resources of all PIO PISO cards installed in this system Then the application program can directly control all functions of the PIO PISO series card Find the configure address space for your PISO P32C32 P32A32 card Step1 Detect all PISO P32C32 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x20 for PISO _P32C32 wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x70 for PISO _P32A32 wRetValsPIO Driverlnit amp wBoards wSubVendor wSubDevice wSubAux printf There are d PISO P32C32 Cards in this PC n wBoards Step2 Save resources for all PISO P32C32 P32A32 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i awBase amp wlrq amp t1 amp t2 amp t3 amp t4 amp t5 printf nCard_ d wBase x wlrq x
41. ile gt batch compiler file gt VO port large mode gt VO port huge mode gt VO port large mode gt VO port huge mode gt library header file gt demo1 source file gt demoi batch file 2 demo1 execution file gt library header file gt VO source code gt batch file P64 MSC DIAG PIO_PISO EXE gt VO execution file User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 52 5 3 Program file list for PISO C64 e C64A64 TC gt e C64A64 BC gt e C64A64 MSC gt e C64A64 TC LIB gt e C64A64 TC DEMO gt e C64A64 TC DIAG gt e C64A64 TC LIB PIO H e C64A64 TC LIB PIO C e C64A64 TC LIB TCLIB BAT gt for Turbo C 2 xx or above gt for Borland C 3 X above gt for Microsoft C 5 X above gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file e C64A64 TC LIB TCPIO_L LIB gt VO port large mode e C64A64 TC LIB TCPIO_H LIB gt VO port huge mode e C64A64 TC LIB IOPORT_L LIB gt VO port large mode e C64A64 TC LIB IOPORT_H LIB gt I O port huge mode e C64A64 TC DEMO PIO H gt library header file C64A64 TC DEMO DEMO1 C C64A64 TC DEMO DEMO1 PRJ C64A64 TC DEMO DEMO1 EXE gt demo1 source file gt TC project file gt demo1 execution file e C64A64 TC DIAG PIO H e C64A64 TC DIAG PIO_PISO C
42. ile 2 VO source code 2 TC project file gt VO execution file gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file gt VO port large mode gt VO port huge mode User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 SI P64 BC LIB IOPORT_L LIB P64 BC LIB IOPORT_H LIB P64 BC DEMO PIO H P64 BC DEMO DEMO1 C P64 BC DEMO DEMO1 PRJ P64 BC DEMO DEMO1 EXE P64 BC DIAG PIO H P64 BC DIAG PIO_PISO C P64 BC DIAG PIO_PISO PRJ P64 BC DIAG PIO_PISO EXE P64 MSC LIB gt P64 MSC DEMO gt P64 MSC DIAG gt P64 MSC LIB PIO H P64 MSC LIB PIO C P64 MSC LIB MSCLIB BAT P64 MSC LIB MSCPIO_L LIB P64 MSC LIB MSCPIO_H LIB P64 MSC LIB IOPORT_L LIB P64 MSC LIB IOPORT_H LIB P64 MSC DEMO PIO H P64 MSC DEMO DEMO1 C P64 MSC DEMO MAKE1 BAT P64 MSC DEMO DEMO1 EXE P64 MSC DIAG PIO H P64 MSC DIAG PIO_PSIO C P64 MSC DIAG PIO BAT gt VO port large mode gt VO port huge mode gt library header file gt demo1 source file gt BC project file gt demo1 execution file gt library header file gt VO source code gt BC project file gt VO execution file gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source f
43. l GND GND Internal T o External GND o External Power Internal External source signal 5V Ot OV o GND PISO P32C32 PISO P3A32 PISO P64 Figure 2 2 2 Typical Applications of D I with internal power supply User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 II Configure 2 External power supply External Power Supply GND Internal GND DC 5V 24V Internal R 3K WW o External Power o External GND PISO P32C32 PISO P32A32 PISO P64 Figure 2 2 3 Isolated D l Architecture with external power supply External Power Supply GND Internal x GND DC 5V 24V Internal R 3K F AN External source signal PISO P32C32 PISO P32A32 PISO P64 Figure 2 2 4 Typical Applications of D l with external power supply User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 12 2 3 Isolated D O Architecture The PISO P32C32 amp the PISO C64 share the same architecture and the PISO P32A32 amp the PISO A64 share the same architecture Here are block diagrams related to the D O Figure 2 3 1 Isolate
44. n will show a text string for these special sublDs This text string is the same as defined in PIO H The demo program is as follows wRetVal PIO_Driverlnit wBoards Oxff Oxff Oxff find all PIO PISO series card printf nThere are d PIO PISO Cards in this PC wBoards if wBoards 0 exit 0 printf n for i 0 i lt wBoards i PIO_GetConfigAddressSpace i awBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x x x SlotID x x i wBase wirq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 26 3 2 The Assignment of I O Address The Plug amp Play BIOS will assign the proper I O address to each PIO PISO series card If there is only one PIO PISO board identify the board as card_0 However if there are two PIO PISO boards in the system identifying which board is card_0 becomes more difficult The software driver can support a max of 16 boards It is difficult to find the card NO The easiest way to identify which card is card_0 is to use wSlotBus amp wSlotDevice as following 1 Remove all PISO P32C32 P32A32 P64 C64 A64 cards from this PC 2 Install one PISO P32C32 P32A32 P64 C64 A64 card into the PC s PCI_sloti Run PIO PISO EXE record the result wSlotBusi amp wSlotDevice1 3 Remov
45. ns of PISO P32C32 PISO P64 amp PISO P32A32 are the same 1 1 Specifications Isolated digital input e Input voltage 5V to 30V e Input impedance 3K e Isolation voltage Using internal power 3000V Using external power 3750V e Response time 30K Hz max Isolated digital output e Isolation voltage 3750V e Open collector output 100 mA 30V per channel e Response time 4K Hz typical I O channels D l channels D O channels PISO P32C32 32 32 PISO P32A32 32 32 PISO P64 64 0 PISO C64 0 64 PISO A64 0 64 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 4 Other specifications PC compatible PCI bus Four isolated I O banks Operating Temperature 0 C to 60 C Storage Temperature 20 C to 80 C Humidity 0 to 90 non condensing Dimensions PISO P32C32 P32A32 180mm X 105mm PISO P64 180mm X 105mm PISO C64 A64 180mm X 105mm Power Consumption PISO P32C32 P32A32 5V 600mA typical PISO P64 5V 400mA typical PISO C64 A64 5V 800mA typical 2 Order Description ee oe o o o o oo i PISO P32C32 PCI bus with 32 bit D I 32 bit D O Current Sinking PISO P32A32 PCI bus with 32 bit D I 32 bit D O Current Sourcing PISO P64 PCI bus 64 bit D I PISO C64 PCI bus 64 bit D O Current Sinking PISO A64 PCI bus 64 bit D O Current Sourcing 2 1 Options DB 24P DB 24PD 24 channel isolated D l board DB 24R DB 24RD 24 channel relay board DB 24P
46. oards 0x80 0x08 0x20 for PISO P32C32 0x80 0x08 0x70 for PISO P32A32 printf n 1 Threr are d PISO P32C32 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO P32C32 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 iswBoards i PIO_GetConfigAddressSpace i awBase amp wirgq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x SsubID x x x SlotID x x wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice step 1 enable all D I O port outportb wBase 1 enable D I O step 2 DO_0 to DO 31 send to DI 0 to DI 31 while 1 printf n n PISO P32C32 test by itself jy for i 1 ji lt O0x80 i i lt lt 1 outportb wBase 0xc0 i DO_07 to DO_00 outportb wBase 0xc4 i DO_15 to DO_08 outportb wBase 0xc8 i DO_23 to DO 16 outportb wBase 0xcc i DO_31 to DO_24 delay 1 about to wait 1m sec j1 inportb wBase 0xc0 0xff DI_07 to DI_00 j2 inportb wBase 0xc4 Oxff DI 15 to DI_08 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 61 j3 inportb wBase 0xc8 0xff DI 23 to DI 16 j4 inportb wBase Oxcc Oxff DI 31 to DI_24 printf nD 31 0 Output Value 02x 02x 02x 02x i 1 1 1 printf nD 31 0 Input Value 02
47. on file e P32C32P32A32 MSC LIB gt gt for library source code e P32C32P32A32 MSC DEMO gt gt demo program source User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 49 code e P382C32P32A32 MSC DIAG gt 2 pio_piso auto detect program e P382C32P32A32 MSC LIB PIO H gt library header file e P382C32P32A32 MSC LIB PIO C gt library source file e P32C32P32A32 MSC LIB MSCLIB BAT gt batch compiler file e 1P32C32P32A32MSCILIBIMSCPIO_L LIB gt I O port large mode e P32C32P32A32 MSC LIB MSCPIO_H LIB gt I O port huge mode e 1P32C32 P32A32 MSC LIB IOPORT_L LIB gt I O port large mode e P32C32 P32A32 MSC LIB IOPORT_H LIB gt VO port huge mode e P32C32P32A32 MSC DEMO PIO H gt library header file e P32C32P32A32 MSC DEMO DEMO1 C gt demo1 source file e P32C32P32A32 MSC DEMO DEMO2 C gt demo2 source file e 1P32C32P32A32MSCIDEMOIDEMO3 C gt demo3 source file e P32C32P32A32 MSC DEMO MAKE1 BAT gt demo1 batch file e P32C32P32A32 MSC DEMO MAKE2 BAT gt demo2 batch file e P32C32P32A32 MSC DEMO MAKE3 BAT gt demo3 batch file e P32C32P32A32 MSC DEMO DEMO1 EXE gt demo1 execution file e P32C32P32A32 MSC DEMO DEMO2 EXE gt demo2 execution file e P32C32P32A32 MSC DEMO DEMO3 EXE gt demos execution file e P382C32P32A32 MSC DIAG PIO H gt library header file e 1AP32C32P32A32MSCIDIAGIPIO PSIO C gt I O source code e 1AP32C32P32A32MSCI
48. provides the internal power supply for banks 3 amp 4 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 9 The board layout of PISO C64 A64 is as follows 32 Channels Digital Output 32 Channels gt gt PISO C64 Pee pee Digital Output PISO A64 LED1 LED2 LED3 LED4 DB 37 PCI BUS Figure 2 1C Board layout of PISO C64 A64 LED 1 power indicator for DO 0 to DO 15 LED 2 power indicator for DO 16 to DO_31 LED 3 power indicator for DO_31 to DO_47 LED 4 power indicator for DO_47 to DO_63 Isolation bank 1 DO 0 to DO 15 Power CON1 18 Ground CON1_1 Isolation bank 2 DO 16 to DO _ 31 Power CON1_ 37 Ground CONT1 20 Isolation bank 3 DO 32 to DO 47 Power CON 2 18 Ground CON 2 1 Isolation bank 4 DO 48 to DO 63 Power CON 2 37 Ground CON2_20 All four banks are fully isolated from each other User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 10 2 2 Isolated D I Architecture The D I architecture of the PISO P32C32 P32A32 amp the PISO P64 are the same Select either internal or external power to supply photo couple digital input power Here are diagrams for the various configurations Configure 1 Internal power supply Default Setting PIN19 for P32C32 P32A32 PIN1 20 for P64 GND Internal External GND External Power Internal PIN18 for P32C32 P32A32 PIN18 37 for P64 VA o External Power O Externa
49. rts To do so follow these recommended steps Step 1 Enable all D I O operation Step 2 Read from D I or write to D O Refer to DEMO1 C for demo program 3 4 The I O Address Map PIO PISO series card VO addresses are automatically assigned by the main ROM BIOS of the main board You can also re assign the VO addresses It is strongly recommended to use the assigned I O address The Plug amp Play BIOS will assign the proper I O address to each PIO PISO series card User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 28 3 4 1 PISO P32C32 P32A32 I O Mapping The PISO P32C32 P32A32 VO addresses are mapped as follows Address Read Write RESET control register Woase 2 _ Aux control register Wbase 5 INT mask control register Wbase 7 Aux pin status register Same Wbase 0x2a INT polarity control register HE ss sd Note Refer to Sec 3 1 for more information about wBase outportb wBase 0xc0 Val write to D O 0 7 outportb wBase 0xc4 Val write to D O 8 15 outportb wBase 0xc8 Val write to D O 16 23 outportb wBase 0xcc Val write to D O 24 31 Val inportb wBase 0xc0 read from D O 7 Val inportb wBase 0xc4 read from D 1 8 15 Val inportb wBase 0xc8 read from D l 16 23 Val inportb wBase 0xcc read from D l 24 31 User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 29 3 4 2 PISO P64 VO Mapping The PISO P64 I O addresses are mapped as follows
50. s in this PC Step1 Detect all PISO P64 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x10 for PISO P64 wRetVal PIO Driverlnit amp wBoards wSubVendor wSubDevice wSubAux printf There are d PISO P64 Cards in this PC n wBoards Step2 save resource of all PISO P64 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wlrg amp wID1 amp wID2 amp wID3 amp wID4 amp wlD5 printf nCard_ d wBase x wlrq x i wBase wirq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpaceli 1 wlrq save all resource of this card User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 21 Find all PISO C64 A64 cards in this PC Step1 Detect all PISO C64 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x00 for PISO C64 wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x50 for PISO A64 wRetVal PIO Driverlnit amp wBoards wSubVendor wSubDevice wSubAux printf Threr are d PISO C64 Cards in this PC n wBoards Step2 save resource of all PISO C64 A64 cards installed in this PC for i 0 i lt wBoards i PIO GetConfigAddressSpaceli amp wBase amp wlra amp wID1 amp wID 2 amp wID3 amp wID4 amp wID5 printf nCard_ d wBase x wirq x i wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpacel i 1 wlrq save all resource of t
51. wSubAux All functions are defined in PIO H Refer to Chapter 4 for more information The important driver information is given as follows User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 19 1 Resource allocated information wBase BASE address mapping in this PC wlra IRQ channel number allocated in this PC 2 PIO PISO identification information wSubVendor subVendor ID of this board e wSubDevice subDevice ID of this board wSubAux subAux ID of this board 3 PC s physical slot information wSlotBus hardware slot ID1 in this PC s slot position wSlotDevice hardware slot ID2 in this PC s slot position The utility program PIO_ PISO EXE will detect amp show all PIO PISO cards installed in this PC Refer to Chapter 5 for more information 3 1 1 PIO Driverlnit PIO Driverlnit amp wBoards wSubVendor wSubDevice wSubAux e wBoards 0 to N gt Number of boards found in this PC e wSubVendor gt SubVendor ID of board you are seeking e wSubDevice gt SubDevice ID of board you are seeking e wSubAux gt SubAux ID of board to you are seeking This function can detect all PIO PISO series cards with your system Implementations is based on the PCI plug amp play mechanism 1 It will find all PIO PISO series cards installed in this system amp save all their resource in the library Find all PIO PISO cards in this PC Step 1 Detect all PIO PISO series cards in this PC wRetVal PIO_Driverlnit wBoards Oxff
52. x 02x 02x 02x n j4 j3 j2 1 if i j1 printf nD VO 7 0 error in here n putch 0x07 putch 0x07 putch 0x07 if i j2 printf nD VO 15 8 error in here n putch 0x07 putch 0x07 putch 0x07 if i j3 printf nD VO 24 16 error in here n putch 0x07 putch 0x07 putch 0x07 if i j4 printf nD VO 31 25 error in here n putch 0x07 putch 0x07 putch 0x07 if iz j1 8 i j2 8 i j3 amp i j4 printf The Digital VO test of PISO P32C32 by itself OK n if i Ox80 i 0x01 break if kbhit 0 c getch if c q C Q C 27 return delay 1 end of while y end of for PIO_DriverClose User s Manual PISO P32C32 P32A32 P64 C64 A64 9 9 2004 V3 2 62 5 6 Demo program for PISO P64 5 6 1 DEMO1 for PISO P64 vhs A oe he et De ASE ee KLA GELAG et ee Poet E GELAG SE ay Demo 1 Digital Input of PISO P64 Step 1 The circuit diagram of hardware refer to Sec 4 2 Step 2 run demo1 EXE di je EE SEILE SELA AA EA LARR ENE SI AE ERE SLAE IRE IR AE TRERS CREED HAAS CREME e include lt dos h gt include PIO H int main char c BYTE i r1 r2 r3 r4 r5 r6 r7 r8 WORD wBoards wRetVal WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice clrscr wRetValsPIO Driverlnit amp wBoards 0x80 0x08 0x10 for PISO P64 printf n 1 Threr are d PISO P

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