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2. Scale 1 1 on letter size paper Dimensions shown below are in inches millimeters Part Weight per unit gram 0 0774 2a 2 0 1968 5 00 LEAD 1 nomo i MES IDENTIFICATION T AF 0 0200 0 51 0 1497 3 80 8765 0 2440 6 20 N ds 0 2284 5 80 Y 1 1 gt 2260 9 74 p 9 0590 0 99 12314 RS 1 0 0200 0 51 ip 0 0500 1 2744 777 0 0158 0 55 E 0 010 0 25 0 25 CO B 9 0500 1 27 LAND PATTERN RECOMMENDATION ws 0 0196 0 50 0 0098 0 25 5 0 0688 1 75 ELLE 0 0532 1 35 ae 0 0098 0 25 opos 0 0075 0 19 SEATING PLANE GAGE PLANE _ EAM 8 MAX bs m LEADS 350 0140 0 56 KO TEES EAD NOTES UNLESS OTHERWISE SPECIFIE n EADS 1 STANDARD LEAD FINISH 200 MICROINCHES 5 08 MICRONS MINIMUM SO 0 150 WIDE 8 LEADS LEAD TIN SOLDER ON COPPER THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH e u
3. lt ee DUDAS 5255022225 Sided gt 8 4440 gt 822222222222 20 q quu 99 lt 5 gn 595 222222 4 Version 0 4 4 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved lt MST6E16GS Sta Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor PIN DESCRIPTION MCU Interface PinType Function WRZ _______ w SVtoeram MCUBusWDZacielou hz uowswem in AE gh Spi sck Output not Sv tolerant SPI Flash Serial Clock 146 _ 5950 not 5v tolerant SPI Flash Serial Data 58 52 Output not 5V tolerant SPI Flash Chip Select 59500 ____ w 5V tolerant 8 Flash Serial Data Output m9 INT HWRESET Schmitt Trigger Input Hardware Reset active high w 5V tolerant Analog Video Interface PinType Function Pin 77 CVSiYCModeCampVotageBypsss J4 Re I S Rem Intel ADC Reference T HSYNCO Trigger Input Analog HSYNC Input from Channel 0 w 5V tolerant VSYNCO Schmitt Trigger Input Analog VSYNC Inp
4. INO Id HH 805 M VIS gm 7 001 TOS CA 0CHd SNO nm 9 t EE 0 dA DS a m 5 W vds OP yr 5 JOA ON 6 sun 9 TT 7 TOIND TTA 9 001 E Y 2 C I d JOA 080 ISCOWd TOTA A p MGONYA Kguwex 2 V Old 9149144 Jo PAS 25 6 6005 O TAgH 8 HDVd UOISTADY 9716 VIVNIWWAL LOIALOUdITHILSIN IL arda INAH AS vas ay DS odad ddH IINGHAS vas TOS mt SL dor cro LSPA cera 4 m 9 1258 WA CAV IA 901 nv 090 SL dor Sr ra SL 4007 _ 1901 Jur UA IA IA AULD An td HOLIAS MLP APA SUT SOOT AUT 909 _ MOI T IAV 090 Sa OF 090
5. IAF oue T3QDA JwNIDLND TONY 1HDL3A 37125 LINA C3 UNddV ONY AO El LSCS LO3NNDO 83183ANI ONY AO CINDAH SIG3N I4 1 21412448 SOLIANNOD 4 1 0001 11925 1235 Ov 15412 53H23 9 92 3658 FIOHNISN 40 300301 LNAOW 3015 803 XVW 8408 SI NDILS3SNI 3805 310 835 1430 CIMOTW uw OTF SI 3ONVai IL 131 12345 0176 c 1 N 0 TA TA 1135 XXXXXX 197 1 109 7012 UL 8 d0O G v6N Tov Ix 9 3 ONINI 22916 gt 2m 25 LEER cgo 0c iav iav 448 401 Corn WWR dI XENV OW HLS lt Inet 0001 31925 eX eX NUIL23S lt Nese ees m gt ro re Wug d XDON m 2 gt 25 90 11 8002 DSHIN 53102 19549 IMOS NY 31 0 15 119189 34 UN N23 A38 0 07 s3uo idp fW 30 401551090 3nouiw i4od parui AUD 0 pasojDsip 100 0 02 sauo adp Ny 30 i4adoud aui si Siu 21 0 21 28 T420HW04 V2 No Repro
6. Copyright AU Optronics Inc January 2003 All Rights Reserved T315XW02 VS Specs ver 0 1 17 30 No Reproduction and Redistribution Allowed AUO 5 Mechanical Characteristics The contents provide general mechanical characteristics for the model T315XW02 VS In addition the figures 760 0mm Outline Dimension 450 0mm Bezel Opening 703 6mm Vertical 398 3mm in the next page are detailed mechanical drawing of the LCD Active Display Area Horizontal Copyright AU Optronics Inc January 2003 All Rights Reserved T315XW02 VS Specs ver 0 1 20 30 No Reproduction and Redistribution Allowed Front Get P wLIP ome MOLE I a 1 H a 5 1 L LT RECE ZPECIFICATUUM 1 PART ME SEAR 2 POTETER CONNECTOR SPLCIFICATIII PART ME CHHL i A SHEID TIL ERW 10 BE 25 1 4 EFTS UHLE 5 1 TEE D D HAE P horren T pte x WERT 4 n the Aren i BLACK EPDE 1 Bezel pering hz u i i f OSTAECIMM DORG AREA CENTER AS GLIDA OCopyright AU Optronics Inc 21 29 Specs Ver 0 1 T315XW02 VS No Reproduction and Redistribution Allowed January 2003 All Rights Reserved Back Ph riga Fe rrai H ieee Dau ee e ioe is wa er ee prar ree
7. fiL ALt 001 o n 1270 FTI TA LAM 99 OL AL NAL AS d door Col t TOS 71 Vds _ 41001 1001 m Kis 090 9 090 81 SI aS 09A AS d 9021 AS d AS L ILNO Q TNI Reet 6 E o VANDAL 8 HI guor HI SZ TOC OL AL 440 0ccO uj any 610 8772 02 lt MOOT WTA T 2 ii ZLNO epey INI TOCMVS ALG Ali d OST MGONVA AguAeXTOOGHOS dIAV 8383 V ff 913915 JO 19945 Z7 S 6007 8 8 UOISTADY IoquinN 9716 OIGAV LOWLOuUd 9T49 LSIAL IL WA aust GND 190 4 gt w lo OT 40 amor 6192 Dx ws T A Or A perce oN o W 0 LI zr 5090 e cz 090 9 6 6092 9098 ucc 7 MEALS falta 1099 anzz Ue S CHd 9NO a g s NE Bn XI 2098 20940 ZINISLVGH 9082 MNIS LV CIND E IND M e 0292 89931 gt gt e 1091 o
8. me 82 82 metemeded _ om 3 3 1 1 output port t open colector _ rue 4 4 3 2 s s 3 3 deemphasis output forcapactor Ao 6 6 4 4 decoupling input for capacitor _ peo 7 7 5 S _ eo ooo M 8 8 7 7 tuner AGC TakeOver Point TOP for resistor adjustment 9 9 FC bus data input and output FC bus clock input 12 12 11 11 sound intercarrier output and MAD select with resistor ne 3 34 wac 36 17 _ ViF AGCtorcapactor O OO me 3 o me 19 mtemmeded 7 ee 23 aa MM differential input 1 and MAD select with resistor SIF2 SIF differential input 2 and MAD select with resistor 28 connected 09 7 2003 Oct 02 88 Philips Semiconductors controlled single and multistandard alignment free IF PLL demodulators TDA9885T TDA9886T MHC 109 Product specification TDA9885 TDA9886 AFD 6 TDA9885TS MHC110 1 Not connected for TDA9885T 1 Not connected for TDA9885TS Fig 2 Pin configuration for SO24 a lt TDA9885HN TDA9886HN terminal 1 index area Bottom view 1 Not connected for TDA9885HN Fig 4 Pin configuration for HVQFN32 2003 Oct 02
9. ar GND fro and Sigal Rewmniwvs m 19 mme m mak x ue m GND proma Sil Resins x mw jvSCwmdimde __ 3s GND __ ar Wess OT m Rees o ew fron an sman O GN Note 1 All GND ground pins should be connected together and should also be connected to the LCD s metal frame All Vcc power input pins should be connected together 2 For Pin 10 27 and 28 panel will not damage if negligently connect these pins to high or low OCopyright AU Optronics Inc January 2003 AII Rights Reserved T315XW02 VS Specs ver 0 1 9 30 No Reproduction and Redistribution Allowed AUO BACKLIGHT CONNECTOR PIN CONFIGURATION 1 Electrical specification ee ar gt bpuVolage Input Voltage DDE 340 voc __ ADC ADC Input Current Stable on Condition YDDB 24 Input Power Stable on Condition FODDE VDDBE 24V 6 ADC On Off Contro Dimming Conirel Current DIM External PWM Control Current VLC m Wa d 10 50 1 5 100 I External PWM Duty D External Frequency Note 1 Measurement condition Rising time 20 ms VDDB 10 90 Note 2 VDIM 3 3V MAX 100 bri
10. B M4 Gee IMVERTER tea I IET Ll __ _____ _ E _ SECTION 7 PETAIL SCALE LOO OCopyright AU Optronics Inc 22 30 Specs ver 0 1 T315XW02 VS No Reproduction and Redistribution Allowed January 2003 All Rights Reserved AUO 1 General Description This specification applies to the 42 inch Color TFT LCD Module T420HW04 V2 This LCD module has a TFT active matrix type liquid crystal panel 1920x1080 pixels and diagonal size of 42 inch This module supports 1920x1080 Full HD mode Non interlace Each pixel is divided into Red Green and Blue sub pixels or dots which are arranged in vertical stripes Gray scale or the brightness of the sub pixel color is determined with a 8 bit gray scale signal for each dot The T420HW04 V2 has been designed to apply the 8 bit 2 channel LVDS interface method It is intended to support displays where high brightness wide viewing angle high color saturation and high color depth General Information items Specification Unt Noe Bawesoensm o owes m Surface Treatment Anti Glare coating Haze 11 Hard coating 3H Copyright AU Optronics Inc January 2008 All Rights Reserved T4
11. Copyright AU Optronics Inc January 2008 All Rights Reserved T420HW04 V2 11 28 No Reproduction and Redistribution Allowed AUO 3 3 Signal Timing Specifications This is the signal timing required at the input of the User connector All of the interface signal timing should be satisfied with the following specifications for it s proper operation Timing Table DE only Mode Vertical Frequency Range A 60Hz Sew une Ls ow io Petes m on oo we Te Horizontal Section Blanking masta Copyright AU Optronics Inc January 2008 All Rights Reserved T420HW04 V2 12 28 No Reproduction and Redistribution Allowed AUO 4 Optical Specification Optical characteristics are determined after the unit has been ON and stable for approximately 60 minutes in a dark environment at 25 The values specified are at an approximate distance 50cm from the LCD surface at a viewing angle of and 0 equal to LCD module SR3 or equivalent Fig 4 1 Optical measurement equipment and method me CR 1 Contrast Ratio 4000 5000 Surface Luminance white 400 500 2 Luminance Variation Sure 5p fo 18240004000 Response Time Average Tr 65 ms 4 5 Gray to Gray CoorCoodiates oo RD o o rR To doso To
12. mo 7 2 1 TOS AV TIOS AV M TOS mow IOS nv MINTO sr i oo TLAV S cor f LLWMVOS Tore p MGONVA 2OGHOS ndur Teuruuo VV Hn xa OIHOLSIN 19945 CC S 6007 YV 8 7 HOVd UOISIAOM JoquinN dot CIVNIAWAL LOHfONd9L49 LSIN WE S 9nir LAO NI OHGIA ES 6 MAA 1 OAGIA 9AV 8 gt L q Omo T 158 nv 9 Neo 0 CHd 9ND I 108 AV m GND SL 5 E 11445 7 ND Vow On Deny TOEf TOS AV jno T now rs Neo TOS 108 ND aN 5 ND mo T S IA R ND JO A WO TOS TEND 165 rex occa leer s goorf voorf e 9 gt WE e 595352064 a ANC Lb OA Or UA CAV IA 17430 ANTZ TCA ANTZ WX IND 860r f e ds sz dg sz do 4 _ sz dor 6874
13. Basic Operations amp Circuit Description Main Electric Components 1 MODULE There are 1 pc panel and 3 pcs PCB including 1 pc INVERTER board L 1 pc INVERTER board R 1 pc T CONTROL board 2 SIGNAL PROCESS There are 3 pcs PCBs including 1 pc Main digital board With Tuner board Ass y 1 pc Keypad board 1 pc Remote Control Receiver board 3 POWER There are 1 pc PCB for power 33 PCB function 1 Power board 1 Input voltage 1007 2407 50 60 7 Input range AC 90 Min 250V Max auto regulation 2 b d provide power for PCBs 24V for Inverter 5Vsb for standby 5V for signal power 12V for Audio Amp power 12V for Tuner power and LCD pannel 2 Main Video InterFace board abe Decoder the video signal CVBS S VIDEO from analog to digital Signal Converter the Video signals CVBS S VIDEO and graphics signal HDMI VGA YPbPr from internace to progressive 3 Converter the Digital to fit the panel display mode and output the LVDS signal to Panel 4 Converter the TV input signal from IF to video and SIF signal S 5 Converter the digital and analog audio signal to tone controlled signal to audio AMPFILER 4 KEY board To get the main button control on LCD TV as SOURCE MENU CHANEL CHANEL VOL VOL STANDBY functions 5 Remote Control board 6 T Receive the remote signal and a
14. Input Rise and Fall Times 5 ns VIN Input Pulse Voltages 0 2VCC to 0 8 V Our Output Timing Reference Voltages 0 5VCC to 0 5VCC V Note 1 Output Hi Z is defined as the point where data out is no longer driven Input and Output Timing Reference Levels Input Levels 0 8 Vcc Figure 21 AC Measurement Waveform Winbond Electronics Corporation ADVANCE INFORMATION 06 28 05 57 Winbond Confidential Information flash Do not copy or distribute to unauthorized parties 2M 4M AND 8M BIT SERIAL FLASH MEMORY W25X20 W25X40 AND W25X80 Table 10 AC Electrical Characteristics Preliminary Symbol Alt Description Min Typ Max Unit FR fc Clock frequency for Fast Read OBh andallother D C 68 MHz instructions except Read Data 03h Clock freq Read Data instruction 03 D C 33 MHz 7 Clock High Low Time for Fast Read OBh 3Bh 7 ns and all other instructions except Read Data 03h tCRLH tcRLL Clock High Low Time for Read Data instruction 8 ns tcu cH Clock Rise Time peak to peak 0 1 V ns 2 Clock Fall Time peak to peak 0 1 V ns tSLCH tcss CS Active Setup Time relative to CLK 5 ns tCHSL CS Not Active Hold Time relative to CLK 5 ns tDVCH tosu Data In Setup Time 2 ns tCHDX Data In Hold Time 5 ns tCHSH CS Active Hold Time relative to CLK 5 ns tSHCH CS Not Active Setup Time relative to CLK 5 ns tSHSL CS Deselect Time 100 ns tsHaz ibis Output
15. 13 mA VIN 2 0V 75ohm 26 mA Notes 1 For Max or Min conditions use appropriate value specified under Electrical Characteristics for the applicable device type 2 Typical values at 5 0V 25 C ambient and maximum loading 3 Not more than one output should be shorted at one time Duration of the test should not exceed one second 4 Measured by the voltage drop between S1 S2 and D I O pins at indicated current through the switch ON resistance is deter mined by the lower of the voltages on the S1 S2 and D I O pins 2 PS7032C 08 07 97 61 PI5V330 1 PER JC OM LOW ON RESISTANCE WIDEBAND VIDEO QUAD 2 CHANNEL MUX DEMUX Dynamic Characteristics Over the Operating Range TA 40 C to 85 C 5V 5 Parameter Description Test Conditions Turn On Time RL 75ohm 20 pF see Fig 6 25 5 ns Turn Off Time RL 75ohm 20 pF see Fig 6 3 dB Bandwidth 150ohm see Fig 7 Crosstalk 100hm RL 150ohm 10 MHz see Fig 7 Differential Gain RL 1500hm f 3 58 MHz see Fig 5 Differential Phase RL 1500hm f 3 58 MHz see Fig 5 Input Enable Capacitance Vin O0V f 1 MHz Capacitance Switch Off Vin OV f 1 MHz Capacitance Switch On Vin OV f 1 MHz Off Isolation RL 150 10 MHz see Fig 7 Notes 1 This parameter is determined by device characterization but is not pr
16. PS7032C 08 07 97 60 PI5V330 1 PER JC OM LOW ON RESISTANCE WIDEBAND VIDEO QUAD 2 CHANNEL MUX DEMUX Maximum Ratings Above which the useful life may be impaired For user guidelines not tested storage Temperature 65 C to 150 C Ambient Temperature with Power Applied 40 C to 85 Stresses greater than those listed under MAXIMUM Supply Voltage to Ground Potential Inputs amp Vcc Only 0 5V to 7 0V RATINGS may cause permanent damage to the de vice This is a stress rating only and functional opera supply Voltage to Ground Potential Outputs amp D O Only 0 5V to 7 0V tion of the device at these or any other conditions DC Input Voltage _0 5V to 7 0 above those indicated in the operational sections of this specification is not implied Exposure to absolute DC Output Current maximum rating conditions for extended periods may Power Dissipation affect reliability Parameters Description Test Conditions VANALOG Analog Signal Range Input HIGH Voltage Guaranteed Logic HIGH Level Input LOW Voltage Guaranteed Logic LOW Level Input HIGH Current Max VIN Vcc Input LOW Current Vcc Max VIN GND Analog Output Leakage Current 0 lt 51 S2 SVcc Switch Off Clamp Diode Voltage Vcc Min IiN 18mA Short Circuit Current SI S2 D 0V Input Hysteresis at Control Pins Switch On Resistance Vcc Min ViN71 0V 7
17. STOP CONDITION A low to high transition of SDA with SCL high is a stop condition After a read sequence the stop command will place the EEPROM in a standby power mode refer to Start and Stop Definition timing diagram ACKNOWLEDGE All addresses and data words are serially transmitted to and from the EEPROM in 8 bit words The EEPROM sends a zero to acknowledge that it has received each word This happens during the ninth clock cycle STANDBY MODE The AT24C01A 02 04 08 16 features a low power standby mode which is enabled a upon power up and b after the receipt of the STOP bit and the completion of any internal operations ATMEL 3256D SEEPR 1 1 03 71 851 SOIC I Top View End View B COMMON DIMENSIONS Unit of Measure mm Side View Note These drawings are for general information only Refer to JEDEC Drawing MS 012 Variation AA for proper dimensions tolerances datums etc 10 7 03 TITLE DRAWING NO REV AMEL 1150 E Cheyenne Min Bivd 851 8 lead 0 150 Wide Body Plastic Gull Wing 851 B S Springs 80906 Small Outline SOIC AT24C014 02 04 08 16 3256D SEEPR 1 1 03 72 1999 FAIRCHILD d SEMICONDUCTOR m FDS9435A Single P Channel Enhancement Mode Field Effect Transistor GeneralDescription Features SO 8 P Channel enhancement mode power field effect 5 3A 30 V Roson
18. Fig 3 Pin configuration for SSOP24 89 Product specification Philips Semiconductors TDA9885 TDA9886 controlled single and multistandard alignment free IF PLL demodulators 814 021 5 eAnisod indino 5 9 92 lY QVINOIS TOS vas LL 22 62 gZ GZ 6L ZL VL OOV N 39 004 dn O 001 AG cL gt 5 99 1eunj 027 5 3 1 04 indino ii Q dU 027 9886VQ L 988691 02 12 8l jndino SgAO uomeoi dde 163 seinseeui euondo G886VCL 40 pejoeuuoo JON 2 MYS 40 pesn ue dO DDV JA sindino uid 1 6 1 pue NHS886VQLL 10 Sjequinu 9 G 4d 06 ax 01 ju OL 4l IN33d cc 2003 Oct 02 90 Philips Semiconductors Product specification controlled single and multistandard TDA9885 TDA alignment free IF PLL demodulators 9885 TDA9886 SSOP24 plastic shrink small outline package 24 leads body width 5 3 mm SOT340 1 0 2 5 5 mm LL LL 1 r1 1 scale DIMENSIONS mm are the original dimensions A 1 1 1 pp
19. Tis bh al phrasis Dare dili discussed ey HI ee prr s Cure 2 8 ig is od vd SLIP HD Hid PT OT Ls Be een SILL THM HD COMI OCHM TSSOCK LI NOLS MOA Copyright AU Optronics Inc January 2003 All Rights Reserved 21 27 No Reproduction and Redistribution Allowed T260XW02 VQ Spec 1 0 L m we AUO Rear View mus TNE SHS GH 01235 cux odx MOLI s 21900 Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 22 27 No Reproduction and Redistribution Allowed AUO 1 General Description This specification applies to the 31 51 inch Color TFT LCD Module T315XW02 VS This LCD module has a TFT active matrix type liquid crystal panel 1366x768 pixels and diagonal size of 31 51 inch This module supports 1366x768 XGA WIDE mode Non interlace Each pixel 1s divided into Red Green and Blue sub pixels or dots which are arranged in vertical stripes Gray scale or the brightness of the sub pixel color is determined with a 8 bit gray scale signal for each dot The T315XW0O2 VS has been designed to apply the 8 bit 1 channel LVDS interface method It is intended to support displays where high brightness wide viewing angle high color saturation and hig
20. 0 21 1 80 0 38 0 20 8 4 5 4 7 9 1 03 s 0 8 8 8 0 5 2 i Note 1 Plastic or metal protrusions of 0 2 mm maximum per side are not included OUTLINE So EUROPEAN ISSUE DATE VERSION PROJECTION 2003 Oct 02 91 MODEL ZHUHAI JINSHENG PRODUCT ELECTRONICS CO LTD SPECIFICATION DESCRIPTION PAL PLL TUNER NO ITEM DESCRIPTION 1 GENERAL 1 1 Supply Voltage True 5V Device low power dissipation 1 2 Control System bus control of tuning 1 3 Tuning System PLL controlled tuning 1 5 Receiving System PAK B G 1 6 Receiving Channels Full frequency range from 45 75MHz to 863 25 MHz BAND 5 511 1 45 75MHz 160 25MHz Mid band 168 25MHz 464 25MHz High band 471 25MHz 863 25MHz 15 4 Intermediate Frequency System B G Picture Carried 38 90 Color Carried 34 47 Sound Carried 33 40 unit MHz 1 8 Antenna Input Impedance VHF UHF CATV 75 ohm unbalanced 1 9 Output Impedance 75 unbalanced 1 10 Weight 37g 3g 1 11 xn DY He Un A PIN CURR Tuning Voltage 1 7mA Tuner supply voltage 5V B of PLL mixer T33V i Note 6 7 selected by customer 92 MODEL ZHUHAI J INSHENG PRODUCE 5 511 5 1 ELECTRONICS CO LTD SPECIFICATION _ DESCRIPTION PAL PLL TUNER NO ITEM SPECIFICATION 1 13 Operating Temperature 10 0 60 Standard 25 1 14 Relative Humidity to 90 Standard 6
21. 1 8V lo 0 15 mA Note 1 Vj min and max are reference only and are not tested AT24C014 02 04 08 16 M 70 ees A 724 01 02 04 08 16 AC Characteristics Applicable over recommended operating range from T4 40 C to 125 C Vec 2 7V to 5 5V CL 1 TTL Gate and 100 pF unless otherwise noted Parameter Clock Frequency SCL Clock Pulse Width Low Clock Pulse Width High Noise Suppression Time Clock Low to Data Out Valid lur Time the bus must be free before a new transmission can start 1 Start Hold Time sta Start Setup Time tap DAT Data In Hold Time toy Data In Setup Time Inputs Rise Time Inputs Fall Time lsU sTO Stop Setup Time toy Data Out Hold Time Write Cycle Time Endurance 5 0V 25 C Byte Mode Note 1 This parameter is characterized and is not 100 tested Device Operation CLOCK and DATA TRANSITIONS The SDA pin is normally pulled high with an exter nal device Data on the SDA pin may change only during SCL low time periods refer to Data Validity timing diagram Data changes during SCL high periods will indicate a start or stop condition as defined below START CONDITION A high to low transition of SDA with SCL high is a start condition which must precede any other command refer to Start and Stop Definition timing diagram
22. ur IS IA ROT g ANEW WOT TA AXES SIVLVd i Te dace IN OONASA 0 1504 OONASH wan wad ser IWOG Sc IND ore wiv waa wr ct AAAY core ica ur dONIA UIT Dp uaa xr FIN ONIDOS 5 508 5A TA waa aaa TOYA dONID Z FND 5A 1A pes sm wr LE Xda Ocdsn WONID lt 9119 wr 450 CKIAV dONIH fz Na Tas ZI Wd 02451 INONId Na VOA TA 024850 dI 6T NIB TA qaqa arta IGA INIDOS 505 5 TA Bn SD Ids MOS 145 dINId LT dao wis gpr 145 145 WHA pa Pare ziii sr 225 145 peg oo gp wr VOS 6019 S ACT d vas Vdodd vas ot 5 zp Lxdd E maan ms ger DUVS VOLYIMLOH WTI TXaM AL 5 CAVS Tram ms ssp CVs NOVXW 9010 QWI MS 9ST L IH IA dA MS SI INMd 9 IX IH IA BOT vas GG ddAVAFT d eT Yoda T a E 2280 mva pnn D 105 voaa 55 2 5825 Re Sesh Sam INI 505595204222 gt 002 gt 2 g
23. 0 045 Vs 10 V transistors are produced using Fairchild s proprietary high Roson 0 075 V4 4 5 V cell density DMOS technology This very high density process is especially tailored to minimize on state resistance High density cell design for extremely low and provide superior switching performance These devices High power and current handling capability in a widely are particularly suited for low voltage applications such as used surface mount package notebook computer power management and other battery powered circuits where fast switching low in line power loss and resistance to transients are needed SOT 23 SuperSOT 6 SuperSOT 8 50 8 SOT 223 SOIC 16 Absolute Maximum Ratings 25 C unless otherwise noted lb Drain Current Continuous Note 1a A aie Operating and Storage Temperature Range 55 to 150 C THERMAL CHARACTERISTICS Roa Thermal Resistance Junction to Ambient 1a CAN Roc Thermal Resistance Junction to Case Note 1 25 CAN 9 1999 Fairchild Semiconductor Corporation FDS9435A Rev C 73 Electrical Characteristics T 25 C unless otherwise noted Parame Max Uns OFF CHARACTERISTICS Dansare Beacons V ON CHARACTERISTICS Note 2 Gate Threshold Voltage Vos Ves Ip 250 Gate Threshold Voltage Temp Coefficient I 250 pA
24. 14 negative loudspeaker terminal 2 GND2 15 ground channel 2 16 supply voltage channel 2 OUT2 17 positive loudspeaker terminal 2 8 Functional description 9397 750 06861 Product specification 8 1 The TDA8944J is a stereo BTL audio power amplifier capable of delivering 2 x 7 W output power to an 8 load at THD 10 using a 12 V power supply and an external heatsink The voltage gain is fixed at 32 dB With the three level MODE input the device can be switched from standby to mute and to operating mode The TDA8944J outputs are protected by an internal thermal shutdown protection mechanism and a short circuit protection Input configuration The TDA8944J inputs can be driven symmetrical floating as well as asymmetrical In the asymmetrical mode one input pin is connected via a capacitor to the signal ground which should be as close as possible to the SVR electrolytic capacitor ground Note that the DC level of the input pins is half of the supply voltage Vcc so coupling capacitors for both pins are necessary The input cut off frequency is B 1 2 1 For Rj 45 and 220 nF 1 _ 2 2 45 x 10 x 220 x 107 As shown in Equation 1 and 2 large capacitor values for the inputs are not necessary so the switch on delay during charging of the input capacitors can be minimized This results in a good low frequency response and good switch on beh
25. C TLEAD Lead Temperature See Note 2 C VESD Electrostatic Discharge Voltage Human Body Model 2000 to 2000 V Note 1 This device has been designed and tested for the specified operation ranges Proper operation outside of these levels is not guaranteed Exposure beyond absolute maximum ratings listed above may cause permanent damage 2 Compliant with JEDEC Standard J STD 20C for small body Sn Pb or Pb free Green assembly and the European directive on restrictions on hazardous substances RoHS 2002 95 EU Std JESD22 A114A C1 100 pF R1 1500 ohms R2 500 ohms Table 6 Operating Ranges Symbol Parameter Conditions Min Max Unit Vcc Supply Voltage 2 7 3 6 V TA Ambient Temperature Operating Industrial 40 85 C Note 1 Vcc voltage during Read can operate across the min and max range but should not exceed 10 of the programming erase write voltage Table 7 Power up Timing and Write Inhibit Threshold Symbol Parameter Min Max Unit tvs VCC min to CS Low 10 Us Time Delay Before Write Instruction 1 10 ms Vwi Write Inhibit Threshold Voltage 1 2 V Note 1 These parameters are characterized only Vcc VCC max Program Erase and Write Instructions are Ignored CS Must Track Vcc VCC min Read Instructions Device is Fully Allowed Accessible Figure 20 Power up Timing and Voltage Levels Winbond Electronics Corporation ADVANCE INFORMATION 06 28 05 56 Win
26. PWM 100 Note 2 Measurement condition Rising time 20 ms VDDB 10 90 Note 3 a Uniformity and flicker do not guarantee below 20 dimming control b 1096 dimming control is function okay and no backlight shut down Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 14 27 No Reproduction and Redistribution Allowed AUO 3 7 2 Input Pin Assignment CN1 CIO114M1HRL LF Cvilux VDDB main power DC input 24V VDC VDDB main power DC input 24V VDC VDDB main power DC input 24V VDC VDDB main power Default Inverter OK Low GND 0 0 8V Inverter NG Open collector BL on off Open High 3 3V for BL ON Low GND for BL OFF 13 ADIM Internal PWM 0V22096 3 8V 100 OPEN 100 lt NC When External PWM gt External PWM 10 100 POUN lt NC When Internal PWM gt Note Pin13 and Pin14 can t be used at the same time DET Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 15 27 No Reproduction and Redistribution Allowed AUO 3 7 3 Power Sequence for Inverter 3 Dh 24 WV 909 DDE 1 05 GHD VDIM PWM Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 16 27 No Reproduction and Redistribution Allowed AUO 4 Optical Specification Optical characteristics are determined after the unit has been ON and stable fo
27. Ry 033 GREEN e 0290 BE G B 0 03 E LL LLL LE mE B 0000 0 WHITE 0200 0 0290 o Viewing Angle ix axis right 07 axis left o 180 0 89 axis up 907 0 89 y axis down 9 0 04 89 Copyright AU Optronics Inc January 2008 All Rights Reserved T420HW04 V2 17 28 No Reproduction and Redistribution Allowed AUO 5 Mechanical Characteristics The contents provide general mechanical characteristics for the model T420HW04 In addition the figures in the next page are detailed mechanical drawing of the LCD Horizontal typ 983 0mm Outline Dimension Vertical typ 5 6 0mm Depth typ 52 5mm with inverter Bezel Area Horizontal typ 939 0mm Vertical typ 531 0mm Active Display Area ina t Surface Treatment Anti Glare coating Haze 11 Hard coating 3H Copyright AU Optronics Inc January 2008 All Rights Reserved T420HW04 V2 20 28 No Reproduction and Redistribution Allowed 2D drawing i 6 8 L 9 5 y 0007 009 x 2 y0 20 6002 nsHIN 0631 r Wy saiuouidg ny ome 809 152 195 12715 062 9 0029012 6 ropes CEN LIVDIN ONIAVa A1 cao 0 jus T 2 1 x WW
28. ra ud dogs OIGNV VDA qN5 qn 0 PT ANTZ Ga CX IA ES 7 tees T wor 187 VW SgpM d d d Ore mzz 0 sro dero dsro ATA IA Gp VODA ra ds EINE wr ws TA JULP SHPO Lb ESPA 090 AT Ei NIS VO IA JULP Tc Spro NID VOA auze ped 951 err osra SOS IA HT 06 090 91 SOF I 9 TUN kp NIE VOR ter Le Wa TS oro vds ds SLY SLPM ANTZ T MIA AV GND 71 20901 2071 S4 z V60t f Z9 v1 sera IND amp ANTZ ANTZ AND 8092 Tad E ANTZ cdd Qd IX IA 0 TOPA TA IA ANTZ GND ATA JA A IA 0 o AGDNV 568 TOUM AT E 9IH9LSIN 10 19945 25 6 6000 8 HDVd UOISTADY 9716 ZNIHOLIMS LOUf O Id 9TH9 LSIN 7 IL 001 mor Le Soa S 21001 ESEA TED mI mo COS IA gt X001 OS AS 4 001 gol SL Seu YED BEA or mo TDS IA OBEAK F GEN 8060 gt X001 anzz 906 N 766 20
29. v S 0 rs 892 i 507 25 E ST x m 5206 2 X 2 X 2 Corr NOLLO3S E g 5 70 S UA 55 TA Ny D 1 fe 1 1 93 1 1 77 A A 1 i f 9 SER 2ND 13 12 2v n 5 6 pen 13 19 vy e Ie d v 925 5 oooo x y NY 2 5 NY lj gt lt 98 0 ee a MEE 013 63 5 9 e gill 5 52 2 9 5 a 898 o 5 o BO be v v 80 M 5 eet p i v 2 NZ NN v gt e 53 Y Y CZ EE 11 XM 5 acy o v NY q Si a 1 0 v 1 834 b Ww ND D D A G 2 AA IND omm 6 Or Cu 25 vy E5052 y 7 a v XOY 8 E 03 o o o o o v Bl 00000t E 0901292 lle R H H B H H o o Fw e 5 n EIS an SS 7 xis cC Quay 081 097 CES le T 0 20 6002 ASHLN NY 81 21 8002 fISHLN 90 11 8002 ASHLN NY 61 60 8002 NY 1191 NO
30. 2V VTH VIL VCIM OV 5 The performance of the Lamp in LCM for example life time or brightness is extremely influenced by the characteristics of the DC AC Inverter So all the parameters of an inverter should be carefully designed so as not to produce too much leakage current from high voltage output of the inverter When you design or order the inverter please make sure unwanted lighting caused by the mismatch of the lamp and the inverter no lighting flicker etc never occurs When you confirm it the LCD Assembly should be operated in the same condition as installed in your instrument 6 Do not attach a conducting tape to lamp connecting wire If the lamp wire attach to conducting tape TFT LCD Module have a low luminance and the inverter has abnormal action because leakage current occurs between lamp wire and conducting tape 7 The relative humidity must not exceed 80 non condensing at temperatures of 40 C or less At temperatures greater than 40 C the wet bulb temperature must not exceed 39 C When operate at low temperatures the brightness of CCFL will drop and the life time of CCFL will be reduced Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 7 27 No Reproduction and Redistribution Allowed AUO 3 2 Interface Connections LCD connector CN1 Starconn 093G30 B0001 A 1 Pin No Symbol Description Default 12V DC Regulated LVDS Option Low Open for Normal NS High
31. 3000Vac 50Hz x 10mA AH Input To FG 1500Vac 50Hz 1Hminute x 10mA t i Output To FG Non Isolated AVE Open FG and Output return Vise Ss HDZ1804 3A BS X21 1804300R PCB HDZ1804 3A Page 6 of 9 3 Safety rs RARE The power supply shall compliance with the following Criterion 1 UL60065 2 EN60065 3 GB8988 2001 4 BRERA TE EMC 4 1 EMI a The power supply shall compliance with the following Criterion Df FHE Conduction Emission EN55022 CLASS GB9254 CLASS FCC PART15 CLASS B 2 45 5 Radiated Emission EN55022 CLASS GB9254 CLASS FCC PART15 CLASS B fr GAAP Lah EX The power board should be assembled in customer s product to test for passing the regulations 4 2 EMS FB DLL E The power supply shall compliance with the following Criterion 0 ESD HEPIE GB17626 2 1998 1EC61000 4 2 2 EFT GB17626 4 1998 1EC61000 4 4 3 Surge ERI GB17626 5 1998 1EC61000 4 5 1 5 5 Environmental Requirement 5 1 88 Temperature Operating Ambient 5 to Non operating Ambient 10 C to 80 C 5 2 Humidity Operating From 10 to 90 relative humidity non condensing 765 535 Non operating From 5 to 95 relative humidity non condensing 7675 75 5 3 Al
32. B G D K Antenna Input DIN Type x 1 VGA D Sub 15 Pin Type x 1 HDMI Ver 1 3 Connector x 2 S Video Input Mini Din 4 Pin Terminals x 1 Video Input RCA Terminals x 3 Component Video YPbPr x 2 RCA Terminals Stereo Audio x 3RCA x 1 Phone Jack for VGA DVI Input Terminal 1 set of Audio Output Terminals RCA L amp R 1 set of Video Output RCA Terminals 1 set of S PDIF Output RCA Terminals Outline Size LxWxH mm 799x88x529 914x93x595 1022x93x65 without stand 799x236x564 914x236x034 1022x256x 12 with stand Temperature 0C 40C Working 20 80 Non condensing 4 Supported Signal Modes A VGA Mode Horizontal Vertical Resolution Frequency Frequency KHz Hz 640 x 480 31 50 60 00 Note 1 When in VGA mode you d better choose the resolution of 1024 x 768 2 You re suggested to use the VGA connecting cord of not more than 5 meters to ensure the appropriate picture quality B YPbPr Mode Horizontal Vertical KHz Hz 720 1280 720 45 00 60 00 28 13 50 00 1080 33 75 60 00 67 50 60 00 1080P 1920x1080 25 50 00 gt HDMI Mode Horizontal Vertical Resolution Frequency KHz 480p 31 468 59 94 Note HDMI mode can t be applied to PC function When the signal received by the Display exceeds the allowed range a warning message will appear on the screen You can confirm the input signal format onscreen Simplified Functional Block Diagr
33. DIAGRAM joejes AYN pue Ha J indino punos SiseujueJed NH9886YAL NHSG886VCL 40 Sggeva 410 JON 1 80LOHW TIdWaA QVINOIS GNSd vas 10S 140 OU dA L 22 ez 82 92 61 ZL EL 21 9 ais YOLVINGOWAG Tld IN3 SLYOd CNVa MOHHYN YAAISOSNVYL 519 921 9 7 xXJoMjou siseuduje op 5 S3HOLIMS ANY J oipne ONISS3OO0ud OIGNV anv A 1 d d ZHIN 9 9 019 GNNOS 9886V L S886V L HO V I 1dONW3G WV 92 HIS 1 2 15 H3XIIN SSO 3ON3WH3HHH 3 TIONIS 02 L L3IA 40103130 ODA IVLIDIC Ou O9V JIA 09V YANNL 91 91 Bum OdV 1 DOVA 9971 401 115 20 ZHI v 10 TId 4lA 2003 Oct 02 8 Philips Semiconductors Product specification controlled single and multistandard TDA9885 TDA alignment free IF PLL demodulators 9885 TDA9886 7 PINNING SYMBOL TDA9885T TDA9886T DESCRIPTION TDA9885TS TDA9886TS 9885 9886 3 39 7 we ea
34. Disable Time 7 ns Clock Low to Output Valid 6 ns tCLax Output Hold Time 0 ns tHLCH HOLD Active Setup Time relative to CLK 5 ns tCHHH HOLD Active Hold Time relative to CLK 5 ns tHHCH HOLD Not Active Setup Time relative to CLK 5 ns tCHHL HOLD Not Active Hold Time relative to CLK 5 ns 12 HOLD to Output Low Z 7 ns 027 luz HOLD to Output High Z 7 ns twHs_ Write Protect Setup Time Before CS Low 20 ns tsHwL Write Protect Hold Time After CS High 100 ns tpp 2 CS High to Power down Mode 3 US tRes1 CS High to Standby Mode without Electronic 3 Us Signature Read tRES2 CS High to Standby Mode with Electronic 1 8 us Signature Read tw Write Status Register Cycle Time 5 15 ms Page Program Cycle Time 2 7V 3 6V Vcc 1 5 5 ms Sector Erase Cycle Time 4KB 150 300 ms Block Erase Cycle Time 64KB 1 2 5 Chip Erase Cycle Time 25X20 3 6 5 Chip Erase Cycle Time 25X40 5 10 5 Chip Erase Cycle Time 25X80 10 20 5 Notes 1 Clock high Clock low must be less than or equal to 1 fc 2 Value guaranteed by design and or characterization not 100 tested in production 3 Expressed as a slew rate 4 Only applicable as a constraint for a Write Status Register instruction when Sector Protect Bit is set at 1 Winbond Electronics Corporation ADVANCE INFORMATION 06 28 05 58 Winbond Confidential Information flash Do not copy or distribute to unauthorized parties 2M 4M AND 8
35. Full Scale Matching Brightness Level Adjustment SWITCHING PERFORMANCE Maximum Conversion Rate Minimum Conversion Rate HSYNC Input Frequency PLL Clock Rate PLL J itter Sampling Phase Tempco DYNAMIC PERFORMANCE Analog Bandwidth Full Power 250 5 DIGITAL OUTPUTS Output Voltage High VDDP 0 1 Output Voltage Low Voi 0 1 VIDEO ANALOG OUTPUT CVBS Buffer Output Output Low 1 5 Output High 2 0 Version 0 4 11 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved DIGITAL INPUTS Input Voltage High V Input Voltage Low V Input Current High 1 Input Current Low li uA Input Capacitance pF V V V MST6E16GS Msta Full HD LCD TV Controller with PIP and Preliminary Data Sheet Version 0 4 semiconductor Min Typ Max Unit AUDIO ADC Input 2 0 V p p DAC Output 2 0 V p p SIF Input Range Minimum 0 1 V p p Maximum 1 0 V pe FB ADC Input ooo NN Specifications subject to change without notice Notes 1 Input full scale is typically 1 8V but input range is 0 3 3V 2 Input full scale is 1 25V but input range is 0 3 3V Absolute Maximum Ratings Parameter Symbol Units Input 5V tolerant Input Voltage 5V tolerant inputs ambient Operating Temperature n o w e Storage Temperature Tes ____ 1 Junction Temperature 15 Note Stresses
36. Left Channel 2 AM 69 _ LINE OUT Analog Output _____ Audio Output Right Channel 3 Mao 68 _ Version 0 4 6 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved lt MST6E16GS Sta Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor DVI HDMI Interface PinType Pin RXAIN ______ Input Negative DVI HDMI Input for A Link Data Channel2 6 RXA2N _____ Input Negative DVI HDMI Input for A Link Data Channel 8 RXAP _____ Input Positive DVI HDMI Input for A Link Data Channel2 9 LVDS Interface PinType Function Pin Version 0 4 7 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved e MST6E16GS Sta Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor PinType Function Pin GPIO Interface Pin Pin Type Function Pin SAR Low Speed ADC Input 0 I O not 5V tolerant SAR Low Speed ADC Input 1 SAR3 I O not 5V tolerant SAR Low Speed ADC Input 3 XN I O not 5V tolerant Pulse Width Modulation Output 4mA driving strength MCU Configuration Input 0 During Reset General Purpose Input Output I O not 5V tolerant Pulse Width Modulation Output 4mA driving strength MCU Configuration Input 1 During Reset General Purpose Input Output PWM2 I O n
37. Output Tuner Automatic Gain Control Output 55 _ Version 0 4 9 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved e MST6E16GS Sta Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor Misc Interface PinType Function Pin 159 10 DDCDA_SDA I O w 5V Tolerant DDC Data and HDCP Slave Serial Bus Data 1 0 for 12 DVI HDMI Port A 4mA driving strength DDCDA SCL Input w 5V tolerant DDC Clock and HDCP Slave Serial Bus Clock Input for 13 DVI HDMI Port A DDCDB SDA I O w 5V Tolerant DDC Data and HDCP Slave Serial Bus Data 1 0 for 215 DVI HDMI Port B 4mA driving strength DDCDB SCL Input w 5V tolerant DDC Clock and HDCP Slave Serial Bus Clock Input for 216 DVI HDMI Port B Power Pins Pin PinType Function Pin o 45 48 GND_RXV AVDD_RXV AVDD_AU AVDD M 91 107 111 117 122 128 133 VDDP GND Ground Ground 28 42 57 77 90 106 114 125 144 150 170 185 199 208 211 Version 0 4 10 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved PA MST6E16GS Sta Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor ELECTRICAL SPECIFICATIONS Analog Interface Characteristics DC ACCURACY Differential Nonlinearity TBD TBD LSB Integral Nonlinearity TBD LSB VIDEO ANALOG INPUT Input Voltage Range Minimum Maximum Input Bias Current Input
38. PAGE 5 511 5 DESCRIPTION PAL B G PLL TUNER unit mm 6 0 95 Huntkey siz HDZ1804 3A LCD TV POWER Design specification E W OLB DESCRIPTION SPECIFICATION FOR SWITCHING POWER SUPPLY H HDZ1804 3A MODEL NO yi HDZ1804 3A tee BS X21 1804300R 27 5 HDZ1804 3A Page 1 of 9 TABLE OF CONTENTS 1 BEREH in Power supply overview 1 1 AC Input Characteristics eee 4 1 2 DC Output Characteristics 1 2 1 Output Voltage Current amp Regulation 1 2 2 f Hy ACY DC Output Ripple amp Noise 1 2 5A Output Transient Response 1 2 A fr HA DC Output Hold Up 1 2 5 DC Output Overshoot At Turn amp Turn Off 1 2 6 fr Hi DC output Voltage rise time 1 3 Remto On Off Control eee 1 4 Ki TAKE Protection 1 4 output Over Voltage Protection 1 4 2 DC Output Over current Protection 1 4 Aa PRIA DC Output Short Circuit Protection 1 4 4 TRIP UI H6 Reset After Shutdown 2 Isolation 2 1 22 5 Dielectric Strength 6 Safety eee 7 HA a He ALPE 4 1 EB FI f 4 2 eee 7 5 Environmental Requirement 5 1 Temperature 5 2 Humidity 5 3 Altitude eee 5 4 Cooling Method 5 5 Vibration eee 5 6 eee RF Dimension Weight XE zs X Pin Conne 4 RF P
39. Referenced to 25 C EA Static Drain Source On Resistance Vs 10V 1 5 3A 0 035 0 045 Tae foor Va 7 45V 1 4 0 0 059 0 075 On State Drain Current Ves 10 V Vy 5 25 Forward Transconductance 10 15 4A Pf 95 Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS Note 2 Turn On Delay Time 10V 1 1A ns Turn On Rise Time Ves R4 76 Turn Off Delay Time Turn Off Fall Time Total Gate Charge 7 10 V 1 24A mE nC Gate Source Charge Vas Gate Drain Charge Maximum Continuous Drain Source Diode Forward Current A Drain Source Diode Forward Voltage Vas 70V 1 21 Note 2 1 is the sum of the junction to case and case to ambient thermal resistance where the case thermal reference is defined the solder mounting surface of the drain pins R is Notes guaranteed by design while is determined by the user s board design NN xe b 105 C W on a 0 04 9552 o pad of 202 copper a 5 a 50 C W on a 1 in pad of 20z copper z c 125 C W on a 0 006 in pad To 3 of 2oz copper Scale 1 1 on letter size paper 2 Pulse Test Pulse Width 300us Duty Cycle lt 2 0 FDS9435A Rev C 74 SO 8 Tape and Reel Data and Package Dimensions continued SOIC 8 FS PKG Code 1
40. WSE 52 86 SLSOT 6 LES seso tes ees EST gso F OLY Tes WS amor ow 05 DING d 090 8 1 WAN AS d 090 8 1 77 AL pd ND DAS 5 SIST ee SIS0LIZV WSN 00 IND 5 rag ddd sisa AV uoot woor oor 416 0805 6050 52 5520 950 GSAS e anzz anzz uQOT 00 00 aes ae ATTEN SIF 4150 KSD 05 sS Izs 165 M IS I 090 94 lt 090 8 90 44 09 0 4 a i AIS d A A d Atte d COs d XIE 6057 MLY POEN 95 SAS d SISd MS Woy 2050 gt ET Ci NOTE WLS 15 so 0 50 as LIS 91 SIS HIS ER a 090 d4 _ gova 1550 A d Sos qu I d 9051 SASS _ 1 IND 5051 1850 fae T n ST Iso ant END ar wor 165 950 0152 DS 895 605 gt Les 0 22525 gt Qoo qu9so _ 2050 8050 x 100 EM 090 d4 T THIN AEE d Ziel d 1001 uor 1001 ug ugg pc VS SAS d 2E lt 2 7 901915736 LK 9191511 10 19945 CC S 6007 01 8 LHDVd dd 1equinN
41. above those listed in Absolute Maximum may cause permanent damage to the device This is a stress rating only and does not imply functional operation of the device Exposure to absolute maximum ratings for extended periods may affect device reliability Version 0 4 12 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved Mstar semiconductor ORDERING GUIDE Temperature Package Package Description Option 0 to 70 LQFP 0 C to 70 LQFP 0 C to 4 70 LQFP MST6E16GS MST6E16GS LF MST6E16GS S1 C C C MST6E16GS LF S1 MST6E16GS S2 MST6E16G5 54 gt Note on product suffix 1 LF Lead free version 2 S1 S5 Advanced surround features SRSCO SRS TruSurround XT MARKING INFORMATION MST6E16GS ____ LM M M Part Number 00000000 DL MST6E16GS LF S2 2 2 2 2 2 2 MST6E16GS S3 2 2 MST6E16GS LF S3 16 16 16 16 16 16 16 16 16 Lot Number Operation Code A 00000 Operation Code Date Code YYWW MST6E16GS Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 The SRS TruSurround XT technology rights incorporated in the MST6E16GS are owned by SRS Labs a U S Corporation and licensed to MStar Purchaser of MST6E16GS must sign a license for use of the chip and display of the SRS Labs trademarks Any products incorporating the MST6E16GS must be sent to SRS Labs for review SRS T
42. audio output DAC s Audio processing for loudspeaker channel including volume balance mute tone and P G EQ e Support decode Optional advanced surround available Dolby SRS etc Not Digital Audio Interface S PDIF digital audio input amp output e HDMI audio channel processing capability Programmable delay for audio video synchronization Analog RGB Compliant Input Ports Two analog ports support up to UXGA m NTSC PAL SECAM Video Decoder e Fast blanking and function selection switch e Supports NTSC M NTSC J NTSC 4 43 PAL support full SCART functions B D G H M N I Nc and SECAM Supports HDTV RGB YPbPr YCbCr e Automatic TV standard detection e Supports Composite Sync SOG 3 0 Comb filter for NTSC PAL Sync on Green separator 5 configurable CVBS amp Y C S video inputs e Automatic color calibration e Supports Teletext level 1 5 WSS VPS DVI HDCP HDMI Compliant Input Port Closed caption and V chip Two DVI HDMI input ports with built in switch e CVBS video output e Supports TMDS clock up to 225MHz 1080P m Video IF for Multi Standard Analog TV 60Hz with 12 bit deep color resolution Digital low IF architecture e Single link on chip DVI 1 0 compliant receiver Stepped gain PGA with 26 dB tuning range e High bandwidth Digital Content Protection and 1 dB tuning resolution HDCP 1 1 compliant receiver Maximum IF analog gain of 37dB in addition to High Definition Mult
43. by marks on the schematic diagram and on the parts list Before replacing any of these components read the parts list in this manual carefully The use of substitute replacement parts which do not have the same safety characteristics as specified in the parts list may create shock fire or other hazards 9 Must be sure that the ground wire of the AC inlet is connected with the ground of the apparatus properly N CAUTION Danger of explosion if battery is incorrectly replaced Replace only with the same or equivalent type Batteries shall not be exposed to excessive heat such as sunshine fire or the like Used batteries should not be thrown into the garbage can please leave them at an appropriate depot AN CAUTION Where the MAINS plug or an appliance coupler is used as the disconnect device the disconnect device shall remain readily operable N CAUTION These servicing instructions are for use by qualified service personnel only To reduce the risk of electric shock do not perform any servicing other than that contained in the operating instructions unless you are qualified to do so Attention Motionless picture might cause permanent destruction to the display Besure not to display motionless picture on the LCD TV for more than 2 hours because it would cause picture remnants to appear which is called screen burns To avoid such picture remnants please decrease the contrast and brightness of the dis
44. for JEIDA NS Mode Reserved Open or High AUO internal test Ground and Signal Return for LVDS RINO LVDS Channel 0 negative G RINO LVDS Channel 0 positive G Ground and Signal Return for LVDS VCC VCC VCC VCC GND GND GND GND 10 12 13 15 16 RIN1 LVDS Channel 1 negative RIN1 LVDS Channel 1 positive G Ground and Signal Return for LVDS 18 RIN2 LVDS Channel 2 negative 19 iti ND ND ND RIN2 LVDS Channel 2 positive ND Ground and Signal Return for LVDS RCLK LVDS Clock negative ND ND ND ND 1 2 CO G G oci Co 27 Note 1 All GND ground pins should be connected together and should also be connected to the LCD s metal frame 2 All Vcc power input pins should be connected together Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 8 27 No Reproduction and Redistribution Allowed NUO 3 3 Signal Timing Specifications This is the signal timing required at the input of the User connector All of the interface signal timing should be satisfied with the following specifications for its proper operation Timing Table DE only Mode Vertical Frequency Vertical section Blanking v Horizontal Section Blanking h LVDS Clock Vertical Frequency Frequency Freq Horizontal Frequency Frequency Freq Not
45. on and off SOURCE Select the signal source 0 9 Continue to press the keys to select a channel DISPLAY Display the information of current video and audio RECALL Return to previous channel FREEZE Freeze the picture PIP Open or close PIP SWAP Swap the position of the main picture and sub picture POS Change the PIP position VOL Increase the volume CHA Select the channel forward MUTE Mute sound VOL Decrease the volume CHV Select the channel backward MENU Enter or exit menu P SIZE Change the picture size A V 4 key The menu item selection ENTER Confirm or enter S MODE Select the sound mode TEXT optioal Enter or exit teletext CE Hide teletext contents press again to reappear P MODE Select the picture mode HOLD Hold the current page INDEX Display the index page PAGE Enter the sub page mode REVEAL Reveal the hidden information LIST Enter the teletext list mode SIZE Change the teletext size MIX Press repeatedly to turn on Teletext gt Teletext blending with TV program gt Teletext mode RED Access the red item or page BLUE Access the blue item or page GREEN Access the green item or page YELLOW Access the yellow item or page Note The INDEX CE PAGE HOLD REVEAL SIZE MIX LIST RED GREEN YELLOW BLUE keys related to teletext are optional 1 6 Installation of Batt
46. wrap ends of wires securely about the terminals before soldering gt Make sure that wires do not contact heat generating parts heat sinks oxide metal film resistors fusible resistors etc Check if replaced wires do not contact sharply edged or pointed parts Make sure that foreign objects screws solder droplets etc do not remain inside the set The lightning flash with arrowhead symbol within an equilateral triangle is intended to alert the user to the presence of uninsulated dangerous voltage within the product s enclo sure that may be of sufficient magnitude to constitute a risk of electric shock to persons The exclamation point within an equilateral triangle is intended to alert the user to the presence of important operating and maintenance servicing instructions in the literature accompanying the appliance MAKE YOUR CONTRIBUTION TO PROTECT THE ENVIRONMENT Used batteries with the ISO symbol Q 25 for recycling as well as small accumulators rechargeable batteries mini batteries cells and starter batteries should not be thrown into the garbage can Please leave them at an appropriate depot WARNING Before servicing this TV receiver read the SAFETY INSTRUCTION and PRODUCT SAFETY NOTICE SAFETY INSTRUCTION The service should not be attempted by anyone unfamiliar with the necessary instructions on this apparatus The following are the necessa
47. 0 1 15 Storage Temperature 20 to 80 Standard 25 2 Electrical Characteristics 2s I Frequency Cover Range Of local Oscillator The min adjustable range of local frequency including all freq of high low channel nominal local freq Of each band and the ends is over 2MHz BAND Frequency cover range of local oscillator VHF Low 83 25MHz 202 15MHz VHF High 205 15MHz 505 15MHz 500 15MHz 904 15MHz 2 2 Frequency Response 25 251 The freq response shall fall in the hatched area show chart and accord with table NE X LES pg uL gt Fi ae A da A ee EM t aee 93 MODEL PAGE ZHUHAI JINSHENG PRODUCT ET SCS1I BSIA ELECTRONICS CO LTD SPECIFICATION DESCRIPTION PAL PLL TUNER POWER GAIN 30dBMin 30dBMin DEVIATION OF POWER GAIN ALLBAND 8dBMax AGC CHARACTERISTICS VHF 40dbMin 35dbMin NOISE COEFFICIENT VHE IMAGE REJECTION RATION 51dBMuin 46dBMuin IF REJECTION RATION 55dbMin 1 CROSS MODULATION 75dBHM V Min BEAT INTERFERENCE REJECTION RATIO DS 2 CH 45dB DS 3 CH 42dB COLOR BEAT INTERFERENCE REJECTION RATIO Band 45dBMin THE MAX INPUT SIGNAL LEVEL All Band 100dBLV Max RF INPUT VSWR All Band 5dBMax 94 ZHUHAI JINSHENG PRODUCT ELECTRONICS CO LTD SPECIFICATION FEATURES SIZE Dimensions 4 0 2 08 NOTE A B selected by customer MODEL
48. 1 MCI F06 N I IND SA 050 JOA 0da eL Liye DDA SSA 5 dd MS E ST 7 084 AT IA e V AEE d eL Bo THIINI 7050 ISA AS MS AUT AL MS Op SeT MTT ONO TESA Oda AT IA dot zosa 1850 9859 D AT IA sd N 6 Ido ONION 2030 AT IA e Dt 8054 CRIME ZSA caine 0SN TW ATIA gO dH 5004 e Uu om Losa Tarn 9 184 054 6 ra 907 ms 5050 9 9 14 Wedd E Tar ATA 1441 080 e 6127 074 THO cc OVA e Ova AT IA OWWIT 219 04 etl Toe AT IA j7 9 IOA 1 V7X07 SOSNO ars woo 001 08505 PSI WSA 080 4 oor voor voor voor wor woor 9 mr NITE SSSO 58 6LSO SLS ESS cs 0650 6 SrS 9903 50 950 EI ull I 1 9 ACT d p a 1 1001 HSNO 00 ASA 6090 99 ET 0 LIST SI E ors AU aad Anu NDS ATI 5 WSA 001 ATI 001 007 uoor voor voor voor voor voor voor 00 OI noor 001 any 7852 KIND e LLSO LSO WSD
49. 2 mm SOT243 1 non concave view B mounting base side ME A La E Y 0 5 10 mm L3 31 d scale DIMENSIONS mm are the original dimensions UNT A bp DU d EM e ey eo En j LE m Q v x 20 17 0 4 6 0 75 0 48 24 0 20 0 12 5 34 124 2 4 2 1 2 00 455 44 0 60 038 236 196 10 118 94 1 27 5 08 6 34 110 16 43 08 04 0 03 45 Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE E Q 99 12 17 Fig 16 DBS17P package outline 9397 750 06861 Philips Electronics N V 2000 All rights reserved Product specification Rev 02 14 February 2000 83 Philips Semiconductors controlled single and multistandard alignment free IF PLL demodulators 1 FEATURES e 5 V supply voltage e Gain controlled wide band Vision Intermediate Frequency VIF amplifier AC coupled e Multistandard true synchronous demodulation with active carrier regeneration very linear demodulation good intermodulation figures reduced harmonics and excellent pulse response e Gated phase detector for L and L accent standard e Fully integrated VIF Voltage Controlled Oscillator VCO alignment free frequencies switchable for all negative and positive m
50. 20HW04 V2 4 28 No Reproduction and Redistribution Allowed 2 Absolute Maximum Ratings The following are maximum values which if exceeded may cause faulty operation or damage to the Sms Wm max Um Note Ambient Operating Top 50 C 2 unit Temperature Shock non operation Vibration non operation Thermal shock Note 1 Duration 50msec Note 2 Maximum Wet Bulb should be 50 C and No condensation Note Half sine wave shock level 50G 11ms direction x ty z one time each direction Note 4 Wave form Random vibration level 1 5G RMS Bandwidth 10 500Hz Duration X Y Z 30min one time each direction Note 5 20C 1hr 60C 1hr 100 cycles Storage Wet Bulb Temperature Operation 4 5 PKI 55 PRK RR Re A Oo x M Q 0505 55559 LOO OX GSC X tete 10 ER RS RR RRRS a 2 2 0 OOOO 22 0 79 OIRRE T 5 CO OO 0 gt o 05 Humidity RH IR 9 22506 2 2 RN SOREL B SQ loto 0 04 BKK oR ttt tato tore X 5 DOC TO KORRI 550550 uto 52 SOO 77 IY X Oe 7 X X t 20 0 10 20 30 40 50 60 70 80 Dry Bulb Temperature C Copyright AU Optronics Inc January 2008 All Rights Reserved T420HW04 V2 5 28 No Reproduction and Redistribution Allowed AUO 3 Electrical Specifica
51. 5 5 TV Function Optional Only for TV X Adjustment of the TV Press the Menu button and then press E button until the menu E 9 appears Press aor v button to highlight the Channel Color System Sound System Skip FineTuning Manual Search Auto Search item Press 4 button to select 4 Press the Menu button to return or exit 2 5 6 PIP Function Adjustment of the PIP Press the Menu button and then press or button until the PIP menu appears ew amp P Press v button to highlight the Multi Window Sub Source Size PIP H Position PIP V Position s Border Color Sound Source 4 Swap item Press 4 button to adjust Press the Menu button to return or exit PIP Setting O PIP function X non PIP function HDMI o Oo o X Jojo IN X X ae 2 5 7 Geometry Function Only for VGA Adjustment of the Geometry Press the Menu button and then press 4 button until the Geometry menu appears Press button to highlight the H Position V Position Clock Phase Auto item 3 Press 4 button to adjust Press the Menu button to return or exit 2 5 8 MEDIA Function Option X Adjustment of the MEDIA In MEDIA Source the MEDIA MENU will always appear as right Press b
52. 50 SLEA 99A AS d Occ vita 96 SIEN MEE LICA 86 TA6 LSIN AOA 01 2060 ZSOPOHPL 5 7050 en L MOT NH 9 Ald IA cx LS a ay LES aS OA 1 ay ca mt hh ED Y BUB TT IT T Bc lp cos ef pe LII PEA OPENID MS IA 065 U b Chew 6260 DOS MS IA LY IU t EO LV 171 MS IA S al dis od XS 6 DIS gs E gis vd WS NH NI 5 TOCA ONHO OLIMS 1 44 090 t Jeusigy V end UND 919915 19945 CC S 6007 57 8 9 HOVd 1001 UOISTADY Joquinyy 650 WALOANNOD LOHUfO Id9T49 LSIN meas amp 0CHd CNO e m 90SNO asa 150004 0557 va Comma MOT OSA 5080 STSI LESA 090 LIST ATA 184 6 1 rmm 8NI IND ro ais IVA AL MS 95
53. CD electronics and to drive the TFT array and liquid crystal The second input power for the BLU is to power inverter 3 1 Electrical Characteristics vales Unit Notes Parameter Ausus ele aa __ _ m oss amp gt Deme re ___ ww gt ____ ___ _ ifferential Input High Threshold VTH Interface Voltage Differential Input Low Threshold VTL 100 Voltage Dew pure p CMOS Input High Threshold Voltage 2 4 Interface High Input Low Threshold Voltage Note 1 The ripple voltage should be controlled under 10 of 2 Vcc 12 0V f 60Hz fCLK 81 5Mhz 25 C Test Pattern White Pattern 3 Measurement condition voc Trush 400 Copyright AU Optronics Inc January 2003 All Rights Reserved T315XW02 VS Specs ver 0 1 7 30 No Reproduction and Redistribution Allowed AUO 4 VCIM 1 2V VTH VIL VCIM OV 5 The performance of the Lamp in LCD panel for example life time or brightness is extremely influenced by the characteristics of the DC AC Inverter So all the parameters of an inverter should be carefully designed as not to produce too much leakage current from high voltage output of the inverter When you design or order the inverter please make sure unwanted lighting caused by the mismatch of the lamp and the inverter no lighting flicker etc never occurs After confirmation the LCD pane
54. CO 1100 TT CO EIN TIN nm TNE Ee A LE fi dE dE dE LEO dE ELE LE LE HE EE HE TE EE TE E fL DDCA_SCL RXAON SDA RXAOP 4 DDCR SCL AVDD 33 DDCR SDA RXAIN 6 PWMI 1 PWMO RXA2N C SAR3 RXA2P 9 SAR2 HPLUGA SAR1 REXT SARO DDCDA_SDA VDDC DDCDA_SCL GND VCLAMP SPI SDO REFP SPI SCZ REFM SPI SDI SPI SCK SOGIN1 VDDP GIN1P GND RINIP USB20 DP BINOM USB20 DM BINOP AVDD USB GINOM USB20 REXT GI NOP MVREF SOGINO MCLKE RINOP MCLK AVDD 33 MCLKZ GND o DOMI HSYNCO DQS1 VSYNCO AVDD MI VSYNC2 0 MDATA 15 12 rm MDATA 14 CVBS3 un MDATA 13 CVBS2 MDATA 12 CVBS1 128 JAVDD MI VCOMI Q 11 CVBSO V MDATA 10 VCOMO I GND AVDD_ 33 m 9 CVBSOUT1 020 8 CVBSOUTO AVDD MI GND MDATA 7 XOUT 6 XIN MDATA 5 AVDD MPLL 4 GND VIFPLL 46 AVDD MI VR27 MDATA 3 AVDD RXS 48 MDATA 2 GND_RXS 49 GND SIFP 1 SIFM 0 VIFM AVDD MI VIFP DQSO AVDD RXV DQMO ees ele
55. CRTs and other displays Programmable 12 bit RGB gamma CLUT 3 video noise reduction Frame rate conversion Version 0 4 MST6E16GS Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 On Screen OSD Controller 16 256 color palette e 512 1 2 4 8 bit per pixel fonts Supports texture function e Supports 4K attribute code e Horizontal and vertical stretch of OSD menus e Pattern generator for production test e Supports OSD MUX and alpha blending capability e Supports blinking and scrolling for closed caption applications LVDS Panel Interface Supports 8 10 bit dual link LVDS up to full HD 1920x1080 e Supports 2 data output formats Thine amp TI data mappings e Compatible with TIA EIA e Dithering with 6 8 bits options e Reduced swing for LVDS for low EMI e Supports flexible spread spectrum frequency with 360Hz 11 8MHz and up to 25 modulation Integrated Micro Controller e Embedded 8032 micro controller e Configurable and GPIO s Low speed ADC inputs for system control e SPI bus for external flash e Supports external MCU option controlled through 4 wire double data rate direct MCU bus External Connection Component USB 2 0 port with internal switch to host controller 16 bit data bus for external frame buffer DDR DRAM All system clocks synthesized from a single external clock 10 7 2008 Copyright 2008 MStar Semiconductor Inc Al
56. Common Con Inhibit Voo ___________ 17 ___ pF Capacitance Feedthrough Pins Not Adjacent 0 15 Channel Off Pins Adjacent 0 47 UNISONIC TECHNOLOGIES CO LTD www unisonic com tw QW R502 013 B 65 4052 CMOS IC B ELECTRICAL CHARACTERISTICS Cont CONTROL INPUTS INHIBIT A B C Voltages Referenced to Vss 225 15 Low Level Input Voltage Ron per spec lorr per spec 450 30 V 6 75 MEN 3 5 275 High Level Input Voltage Vin Ron per spec lorr per spec 70 550 V _11 825 0 or 15 _ 0 00001 01 pA Input Capacitance Cin E DYNAMIC ELECTRICAL CHARACTERISTICS 50pF T4225 Vee E Vas unless otherwise specified PARAMETER SYMBOL TEST CONDITIONS UNIT Propagation Delay Times 0 17 ns pF C 21 5ns Switch Input to Switch tpi p teur 0 08 ns pF C 8 0ns _ 0 06 ns pF C 7 0ns RL 10kQ VeE Vss Output 1 or 0 to High Impedance or High Impedance to 1 or 0 Level Control Input to Output 10 Vee Vss E Total Harmonic Distortion THD 10 f 1 kHz Vin 5 Vpp tpLz Inhibit to Output Channel Feedthrough 10 1 Vin 1 2 Attenuation fin 30MHz fin 3MHz Channel Separation Crosstalk Control Input to R4 1kO R 10kO Control Comm
57. LS 119 99 34 ON 3 38 el 1 0j 6 8 L 5 v duoj 5205490 ny 30 Jod 43 409 pay Aud aq 304 poys 5204390 ny Jo 3420049 si si Copyright AU Optronics Inc 22 28 T420HW04 V2 January 2008 All Rights Reserved No Reproduction and Redistribution Allowed MST6E16 SOFTWARE UPDATE STEP BY STEP 1 Take a normal USB disk 2 Plug USB disk into Pc 3 Open USB disk file 4 See the update packet soft file ON 5 Exact the packet file to USB disk Exacting file RAN ID i tis ad 2 7 The file is exact to SOFT file 8 Go to the sub file and select the size software 20087113 9 this software file 10 Go to USB boot list E E T7 T gt se e 9 55 n x pe b T TFS 4 11 Past this file to USB boot list 12 The file is at USB list as H Ji je RIRs T Ww a E T M T han In i di Tra Aide 2 13 Rename this file to KU19P 14 The file is KUI9P the format is BIN 2008711 15 Close USB file We 24 Mni it 11 11 T 17 Plug this USB disk into TV USB terminal 18 Push SOURCE key and Power on TV set 19 After 10 sec Led is flash slowly display 20 Af
58. M BIT SERIAL FLASH MEMORY W25X20 W25X40 AND W25X80 PACKAGING INFORMATION 8 Pin SOIC 150 mil Package Code SN SEATING PLANE 5 m E1 E L Las 1 lt D gt Notes Package Dimensions 1 Controlling dimensions inches unless otherwise specified mengs 2 BSC Basic lead spacing between Symbol Min Typ Max Min Typ Max centers A 1 47 1 60 1 72 0 058 0 063 0 068 3 Dimensions D and E1 do not include TUER _ mold flash protrusions and should 0 10 DES 0 009 be measured from the bottom of the A2 1 45 0 057 package b 0 33 041 0 50 0 013 0 016 0 020 4 Formed leads shall be planar with 22224422222 a l a respect to one another within 0004 C 0 19 0 20 0 25 0 0075 0 008 0 0098 inches at the seating plane DO 4 80 4 85 4 95 0 189 0 191 0 195 E 5 80 6 00 6 19 0 228 0 236 0 244 1 3 80 3 90 4 00 0 150 0 154 0 157 1 27 BSC 0 050 BSC L 0 40 0 71 1 27 0 015 0 028 0 050 Ol 0 8 0 8 0 10 0 004 Winbond Electronics Corporation ADVANCE INFORMATION 06 28 05 59 1 PERICOM PISV330 Product Features High performance low cost solution to switch between video sources e Wide bandwidth 200 MHz Low ON resistance 30 Low crosstalk at 10 MHz 58 dB e Ultra low quiescent power 0 1 uA typical Single supply operation 5 0V Fast switching 10 ns High current output 100 mA Pac
59. NNM 55 C to 125 C NOTICE Stresses beyond those listed under Absolute Maximum Ratings may cause permanent dam es 65 C to 150 C age to the device This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the with Respect to Ground 1 0V to 7 0V operational sections of this specification is not implied Exposure to absolute maximum rating Maximum Operating Voltage 6 25V conditions for extended periods may affect device reliability Output s 5 0 mA Block Diagram VCC GND gt WP SCL START STOP SDA LOGIC SERIAL EN LOGIC ADDRESS COMPARATOR O DATA WORD EEPROM SERIAL MUX Pin Description Din LOGIC Dour SERIAL CLOCK SCL The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device SERIAL DATA SDA The SDA pin is bi directional for serial data transfer This pin is open drain driven and may be wire ORed with any number of other open drain or open collector devices DEVICE PAGE ADDRESSES 2 1 0 The 2 A1 AO pins are device address inputs that are hard wired for the AT24C01A and the AT24C02 As many as eight 1K 2K devices may
60. Partial Page Writes are Allowed Self timed Write Cycle 10 ms max High reliability Endurance 1 Million Write Cycles Data Retention 100 Years 8 lead PDIP and 8 lead SOIC Packages 2 wire Automotive Serial EEPROM 1K 128 x 8 2K 256 x 8 4K 512 x 8 8K 1024 x 8 16K 2048 x 8 Description The AT24C01A 02 04 08 16 provides 1024 2048 4096 81 92 16384 bits of serial elec trically erasable and programmable read only memory EEPROM organized as 128 256 512 1024 2048 words of 8 bits each The device is optimized for use in many automotive applications where low power and low voltage operation are essential AT24C01A 02 04 08 16 is available in space saving 8 lead PDIP and 8 lead JEDEC SOIC packages and is accessed via a 2 wire serial interface In addition the entire family is available in 5 0V 4 5V to 5 5V and 2 7V 2 7V to 5 5V versions AT24C01A AT24C02 AT24C04 Pin Configurations AT24C08 Address Inputs 8 lead PDIP AT24C16 Note 1 This device is not recom mended for new designs Please refer to 24 Serial Data Serial Clock Input Write Protect 2 This device is not recom mended for new designs No Connect Please refer to AT24C16A 8 lead SOIC 3256D SEEPR 1 1 03 68 ATMEL Absolute Maximum Ratings Operating Temperature Storage Temperature Voltage on Any Pin N
61. SERVICE MENUAL MODEL L32K6RW MST6E16 L37K6RW MST6E16 L42K6RW MST6E16 This manual is the latest at the time of printing and does not include the 3 modification which may be made after the printing by the constant improvement of product CONTENTS Safety Precaution 9 _ _ Safety Precaution N CAUTION RISK OF ELECTRIC SHOCK DO NOT OPEN CAUTION TO REDUCE THE RISK OF ELECTRIC SHOCK DO NOT REMOVE COVER OR BACK NO USER SERVICEABLE PARTS INSIDE REFER SERVICING TO QUALIFIED SERVICE PERSONNEL ONLY PRECAUTIONS DURING SERVICING In addition to safety other parts and assemblies are specified for conformance with such regulations as those applying to spurious radiation These must also be replaced only with specified replacements Examples RF converters tuner units antenna selection switches RF cables noise blocking capacitors noise blocking filters etc Use specified internal Wiring Note especially 1 Wires covered with PVC tubing 2 Double insulated wires 3 High voltage leads Use specified insulating materials for hazardous live parts Note especially 1 Insulating Tape 2 PVC tubing 3 Spacers insulating barriers 4 Insulating sheets for transistors 5 Plastic screws for fixing micro switches When replacing AC primary side components transformers power cords noise blocking capacitors etc
62. ages can be selected quickly by pressing the corresponding coloured buttons Red Green Yellow or Blue on the remote control Useful features for Teletext Mix gt Press repeatedly to turn on Teletext Teletext blending with TV program Teletext mode Index gt Press this button to select the index page that displays the list of teletext contents Hold X The teletext page you have selected may contain more information than is on the screen The rest of the information will be displayed after a period of time on a sub page X Press Hold button to stop the automatic page change The hold symbol will be displayed at the top left hand corner on the screen and the automatic page change will be stopped gt Press Hold button again to continue Reveal gt lt Press this button once to display concealed information such as solutions of riddles puzzles or a quiz gt lt Press this button again to conceal the revealed answers Size X Press repeatedly to double the character size in the following order Upper half of the page Lower half of the page Return to normal size Page Press this button to enter the sub page mode You can use a button to display sub page Press again to exit CE X Press to hide teletext contents press again to reappear List X Press this button to list mode press again to exit LCD COLOR TV 3 Technical Specification Power Consumption 140 W 200 W 280 W TV System PAL B G D K SECAM
63. am Mstar 6E16GS Chassis PANEL VDD CES CONTROL SIGNAL CHA LM _ BEEN se i 5 5 AV VIDEO PANEL S Video LVDS SIGNAL AV1 Audio VGA HDMI 1 2 COMP V 1 COMP V 2 AV2 Audio 1 Do DC 12V For AUDIO AMP COMP V1 Audio OUT DC 5V For System VSS DC 12V For System VSS AC POWER IN DC 24V For Inverter VSS 1 AXOIONVH Ag UARTHOS 9TINSLSTAN LK ANEA OT 818 5 gt ISIS IS IS 5 IS IS IS PP gt gt 7 gt gt gt gt gt gt gt gt gt gt gt s EERREREERERREREREEERRREEERREEEEEREEEEEEEEEEEEEEEBREEEE 8 1 dOVd 2 2 2 2 3 UOISTADY 9715 2 2 gt SERERPEFRREE 8 LOALOUdITAILSN J ve Ee Joo o Joo Joo Joo Joo Joo Joo Joo Joo a a a a 3 3 Ta o lo o un a PIL 2 3 S le lg le le IS o IA
64. arranged in vertical stripes Gray scale or the brightness of the sub pixel color is determined with a 8 bit gray scale signal for each dot T260XW02 VQ has been designed to apply the 8 bit 1 channel LVDS interface method It is intended to support displays where high brightness wide viewing angle high color saturation and high color depth are very important The T260XW02 VQ model is RoHS verified which can be distinguished on panel label General Information ems Specification Unit Note clive Screen Sze mes Display Area isplay Colors Number of Pixels 1366 x 768 Pixel Arrangement RGB vertical stripe isplay Mode Normally Black urface Treatment AG Haze 11 3H Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 4 27 No Reproduction and Redistribution Allowed AUO 2 Absolute Maximum Ratings The following are maximum values which if exceeded may cause faulty operation or damage to the unit Le mem Symbol Min Unit Conditions BLU Brightness Control Voltage VOM 03 Wot noet 50 36 90 60 PG 10 90 Be Panel Surface Temperature 65 C Note 1 Duration 1 sec Note 2 Maximum Wet Bulb should be 39 C and No condensation The relative humidity must not exceed 90 non condensing at temperatures of 40 C or less At temperatur
65. aviour Remark To prevent HF oscillations do not leave the inputs open connect a capacitor of at least 1 5 nF across the input pins close to the device Philips Electronics N V 2000 All rights reserved Rev 02 14 February 2000 79 Philips Semiconductors TDA8944J 2 x 7 W stereo BTL audio amplifier 9 Limiting values Table 5 Limiting values In accordance with the Absolute Maximum Rating System IEC 60134 Vcc supply voltage no signal 0 3 25 V operating 0 3 18 V Vi input voltage 0 3 Vcc 0 3 V loRM repetitive peak output current 2 A T stg storage temperature non operating 55 150 C Tame operating ambient temperature 40 85 C Pict total power dissipation 18 W VCC sc supply voltage to guarantee short circuit 15 V protection 10 Thermal characteristics Table 6 Thermal characteristics Rth j a thermal resistance from junction to ambient in free air 40 K W Rth j mb thermal resistance from junction to mounting base both channels driven 6 9 K W 11 Static characteristics Table 7 Static characteristics Vcc 12 V Tamb 25 C 8 Q Vyopg 0 V Vj 0 V measured in test circuit Figure 14 unless otherwise specified Vcc supply voltage operating 6 12 18 V lg quiescent supply current RL 24 36 mA Istb standby supply current 10 Vo DC output voltage 2 6 V P differential output voltage offset 200 mV VMODE mode sele
66. be addressed on a single bus system device addressing is discussed in detail under the Device Addressing section The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system The 0 pin is a no connect The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system The AO and A1 pins are no connects AT24C014 02 04 08 16 M 3256D SEEPR 1 1 03 69 ATMEL Pin Capacitance Applicable over recommended operating range from T4 25 C f 1 0 MHz Vcc 1 8V Test Condition Conditions Input Output Capacitance SDA Vio Input Capacitance Ao A SCL Vin OV Note 1 This parameter is characterized and is not 100 tested DC Characteristics Applicable over recommended operating range from T4 40 C to 125 C 2 7V to 5 5V unless otherwise noted Parameter Test Condition Supply Voltage Supply Voltage Supply Current Vec 5 0V READ at 100 kHz Supply Current Vec 5 0V WRITE at 100 kHz Standby Current Vec 2 7V Vin Or Vss Standby Current Vec 5 0V Vin Or Input Leakage Current Vin Vss Output Leakage Current Vout OF Vss Input Low Level Input High Level Output Low Level Voc 3 0V log 2 1 mA Output Low Level Vec
67. bond LIT IT Electronics Corp Winbond Confidential Information Do not copy or distribute to unauthorized parties 2M 4M AND 8M BIT SERIAL FLASH MEMORY W25X20 W25X40 AND W25X80 an El YN Table 8 DC Electrical Characteristics Preliminary 0 Symbol Parameter Conditions Min Typ Max Unit Input Capacitance Vin OV 6 of Output Capacitance Vout OV 8 of Input Leakage 2 UA I O Leakage 2 UA Standby Current CS VCC VIN GND or VCC 25 50 2 Power down Current CS VCC VIN GND or VCC 1 5 Current Read Data 1 2 C 0 1VCC 0 9 VCC DO Open 5 8 mA Current Read Data 50MHz C 0 1VCC 0 9 VCC DO Open 20 25 mA Current Read Data 68 29 C 0 1VCC 0 9 VCC DO Open 25 30 mA loca Current Page Program CS 15 25 mA 5 Current Write Status Register CS VCC 20 25 mA 6 Current Sector Erase CS VCC 20 25 mA 7 Current Chip Erase CS VCC 20 25 mA VIL Input Low Voltage 0 5 VccxO 3 V ViH Input High Voltage VccxO 7 Vcc 04 V VoL Output Low Voltage lo 1 6 mA 0 4 V Output High Voltage 100 pA Vcc 0 2 V Notes 1 See Preliminary Designation 2 Tested on sample basis and specified through design and characterization data TA 25 C Vcc 3V Frequency 20MHz 3 Checker Board Pattern Table 9 AC Measurement Conditions Symbol Parameter Min Max Unit CL Load Capacitance 30 30 pF
68. ction input voltage operating mode 0 0 5 V mute mode 3 Vec 1 5 V standby mode Vcc 0 5 Vcc V IMODE mode selection input current 0 lt lt Vcc 20 1 With aload connected at the outputs the quiescent current will increase the maximum of this increase being equal to the differential output voltage offset divided by the load resistance 2 DC output voltage with respect to ground is approximately 0 5Vcc 3 Vour 9397 750 06861 Philips Electronics N V 2000 All rights reserved Product specification Rev 02 14 February 2000 80 Philips Semiconductors TDA8944J 2 x 7 W stereo BTL audio amplifier 14 Application information oc 100 nF 1000 uF 220 nF Symmetrical input Asymmetrical input signal GND SHORT CIRCUIT AND TEMPERATURE PROTECTION _ Standby 0 Mute MGL950 Fig 14 Application diagram 14 1 Printed circuit board PCB 14 1 1 Layout and grounding For a high system performance level certain grounding techniques are essential The input reference grounds have to be tied with their respective source grounds and must have separate tracks from the power ground tracks this will prevent the large output signal currents from interfering with the small AC input signals The small signal ground tracks should be physically located as far as possible from the power ground tracks Supply and output
69. ctive for the control T CONTROL board Converter the LVDS signal to the digital signal for fitting the PANEL INVERTER board Converter the low DC voltage 24V to high AC voltage to drive the backlight 34 PCB failure analysis 1 CONTROL a Abnormal noise on screen b No picture 2 MAIN VIDEO a Lacking color Bad color scale b No voice c No picture but with signals output OSD and back light d Abnormal noise on screen 3 POWER No picture no power output Basic operation of LCD TV 1 After turning on power switch power board sends 5Vst by Volt to Micro Processor IC waiting for ON signals from Key Switch or Remote Receiver 2 When the ON signal from Key Switch or Remote Receiver is detected Micro Processor will send ON Control signals to Power Then Power sends 5Vsc 12Vsc 24V and RLY ON Vs ON to PCBs working This time VIF will send signals to display back light OSD on the panel and start to search available signal sources If the audio signals input them will be amplified by Audio AMP and transmitted to Speakers 3 If some abnormal signals are detected for example over volts over current over temperature and under volts the system will be shut down by Power off 35 LCD basic display theory When an electrical field is applied to the LC planes the LC molecules re align themselves so that they are parallel to the electrical field This electrical process is known as twisted nematic
70. duction and Redistribution Allowed January 2008 All Rights Reserved Copyright AU Optronics Inc 01 2 2 Iv Ala LHS 371 24041 90 70 20 00 SHIN 13801531 00 009 0029012 16 CUN LAVON DNDAVA 1 3 INOW zo 20 ro 500 annees ro 121149 E 8 924049101 VuU
71. e MAXIMUM LEAD 0 024 0 609 September 1998 Rev A 75 TDA8944J 2 X 7 W stereo Bridge Tied Load BTL audio amplifier Rev 02 14 February 2000 Product specification 1 General description The TDA8944J is a dual channel audio power amplifier with an output power of 2 x7 W atan 8 load and 12 V supply The circuit contains two Bridge Tied Load BTL amplifiers with an all NPN output stage and standby mute logic The TDA8944J comes in a 17 pin DIL bent SIL DBS power package The TDA8944J is printed circuit board PCB compatible with all other types in the TDA894x family One PCB footprint accommodates both the mono and the stereo products 2 Features Few external components Fixed gain otandby and mute mode No on off switching plops Low standby current High supply voltage ripple rejection Outputs short circuit protected to ground supply and across the load Thermally protected Printed circuit board compatible 3 Applications m Mains fed applications e g TV sound PC audio Portable audio 4 Quick reference data Table 1 Quick reference data Symbol Paramete Voc supply voltage 6 12 18 V la quiescent supply current Vcc 12V RL 24 36 mA Istb standby supply current 10 PHILIPS Philips Semiconductors TDA8944J 2 x 7 W stereo BTL audio amplifier Table 1 Quick reference data continued output power THD 10 8 Vcc 2 12V THD total harmonic d
72. e Vertical Frequency Smbd ge Tir 768 a ag 3 ana m 000 ree Sect Blanking t 1 pe VDS Cloc Frequency Frequency Notes 1 Display position is specific by the rise of DE signal only Horizontal display position is specified by the rising edge of 1 DCLK after the rise of 1 DE is displayed on the left edge of the screen Vertical display position is specified by the rise of DE after a Low level period equivalent to eight times of horizontal period The 1 data corresponding to one horizontal line after the rise the of 1 DE is displayed at the top line of screen 2 If a period of DE High is less than 1366 DCLK or less than 768 lines the rest of the screen displays black 3 The display position does not fit to the screen if a period of DE High and the effective data period do not synchronize with each other OCopyright AU Optronics Inc January 2003 AII Rights Reserved T315XW02 VS Specs ver 0 1 13 30 No Reproduction and Redistribution Allowed AUO 3 6 Power Sequence for LCD Module 3 6 1 Power Sequence for LCD Power Supply For LCD 90 10 10 10 Vcc 123 ____ Interface Signal LVDS data amp CLK GND Backlight on off Control signal VBLON Parameter Values Typ Note The timing controller will not be damaged in case of TV set AC i
73. e e 3 2 o Joo o 2 Joo n gt i jN Jo gt gt gt 9 lt 25 gt gt gt gt gt lt 0 lt gt gt gt gt gt _ Worrxar gy AXX AAAY OTA erri 9 De ANBAR UEM SEB bob bbb gng oo INS MS WAEtd TWuawasza BES Seeeees 2222 fs AL ML TM wired 5 Sess WAS worse AP ACRE dS rz ri Ara axo 5 Viva Gd Sxad SP 5 wiva ONEWASTd LT oF Ta Fiva udder E V L VIA Ace d Wiva dd S V L VIA NIX MX Wiva dd 9 V L VIA INOX Inox Niva ILIVLVCIN Wr IN O L1OSHAO Tp 30 T8842 Viva uaa ET S V L VIA LI 1OSHAO Or 7SHAO TWIVdOGd CD 6 V L VIA GE ACE d dND 471 fgg miva XT OLI V L 0SHAO Tiviva Gad HI V L VON IWODA fog ISHAO Se DN 11
74. e SS Winbond Electronics Corporation Winbond LIT IT Electronics Corp an El YN GENERAL DESCRIPTION TheW25X20 2M bit W25X40 4M bit and W25X80 8M bit Serial Flash memories provide a storage solution for systems with limited space pins and power The 25X series offers flexibility and performance well beyond ordinary Serial Flash devices They are ideal for code download applications as well as storing voice text and data The devices operate on a single 2 7V to 3 6V power supply with current consumption as low as 5mA active and 1 for power down All devices are offered in space saving pack ages The W25X20 40 80 array is organized into 2048 4096 8192 programmable pages of 256 bytes each Up to 256 bytes can be programmed at a time using the Page Program instruction Pages can be erased in groups of 16 sector erase groups of 256 block erase or the entire chip chip erase The W25X20 40 80 has 128 256 512 erasable sec tors and 8 16 32 erasable blocks respectively The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage See figure 1 The W25X20 40 80 support the standard Serial Peripheral Interface SPI and a high performance dual output SPI using four pins Serial Clock Chip Select Serial Data I O and Serial Data Out SPI clock frequencies of up to G8MHz are supported allowing read transfer rates of 136MHz when usi
75. electrolytic capacitor to simulate system loading HDZ1804 3A X21 1804300R HDZ1804 3A Page 4 of 9 1 2 3 25 51 Output Transient Response Voltage Tolerance Limit Load Change 12V 24 5 5 5 0 2A uS Min to Min to 50 load and 50 to Max load Min to 50 load and 50 to Max load and 50 to Max load All output 10 0 2A uS Min load to Max load 4 5 50 10kHz BEAR Transient response measurements shall be made with a load changing repetition rate of 50Hz to 10kHz 1 2 4 Sy Hi tee Fey DC Output Hold Up Time Output Voltage 120Vac input 220 Vac input eve Prater aries All of dc output at full load 1 2 5 DC Output Overshoot At Turn On amp Turn Off Yel FAH Over shoot voltage Output Channel Output V shoot voltage eve Wt Mayol All of dc output current from Min to Max 1 2 6 DC output Voltage rise time Air HA 10 90 HY TA The output voltages shall rise from 10 to 90 of their output voltage 1 3 Remto On Off Control BR 5Vsb 2 HERMETA TTL Hol ARAL 9 Ps onz2 5V 2 0mA 5Vsb The power supply DC outputs without 5Vsb shall be enable with an active high TTL 22 5V 2 0mA compatible signal Ps on S T The 5Vsb is on whenever the AC power is present HEF REF BIA When Ps on is pulled to TTL high the DC outputs are to be enabled Ps on When P
76. er Supply 12V 5 Note 1 All GND ground pin should be connected together to the LCD module s metal frame 2 Vicp power input pins should be connected Copyright AU Optronics Inc January 2008 All Rights Reserved T420HW04 V2 8 28 No Reproduction and Redistribution Allowed AUO Backlight Connector Pin Configuration 1 Electrical specification ITEM SYMBOL CONDITION UNIT 2 3 5 24 Input Current 6 94 7 3 7 66 100 Brightness 24 Input Power 175 W 100 Brightness 24 Input inrush current Apc 100 Brightness c ell VBLON Voltage Vooe 24V ON OFF Control IBLON Vppp 24V 2 mApc Current Internal PWM IVPwM 24 3 3 Voc Control Voltage Ta 25 5 C Turn on for 45minutes Note At lt 20 dimming ratio AUO would not guarantee display performance amp start at High and Low Temperature condition Copyright AU Optronics Inc January 2008 All Rights Reserved No Reproduction and Redistribution Allowed T420HW04 V2 10 28 AUO 2 Input specification Connector 1 S14B PH SM3 TB JST or equivalent Symbo BL On Off control signal VBLON Enable Pin High Open On Low Off Low 0 0 8V High 2 0 5 0V Internal PWM 3 3V 100 duty open for 100 luminance OV 10 duty c _ _ A xeo xo D
77. er during this check Use an AC voltmeter having 5K ohms volt sensitivity or more in the following manner Connect a 1 5K ohm 10 watt resistor paralleled by a 0 15uF AC type capacitor between good earth ground water pipe conductor etc and the exposed metallic parts one at a time Measure the AC voltage across the combination of the 1 5K ohm resistor and 0 15 uF capacitor Reverse the AC plug at the AC outlet and repeat the AC voltage measurements for each exposed metallic part The measured voltage must not exceed 0 3V RMS This corresponds to 0 5mA AC Any value exceeding this limit constitutes a potential shock hazard and must be corrected immediately The resistance measurement should be done between accessible exposed metal parts and power cord plug prongs with the power switch ON The resistance should be more than 6M ohms AC VOLTMETER Place this probe oneach exposed metallic part Good earth ground such as the water pipe conductor etc 1500 ohms 10watt AC Leakage Current Check PRODUCT SAFETY NOTICE Many electrical and mechanical parts in this apparatus have special safety related characteristics These characteristics are offer passed unnoticed by visual spection and the protection afforded by them cannot necessarily be obtained by using replacement components rates for a higher voltage wattage etc The replacement parts which have these special safety characteristics are identified
78. eries 1 Open the back lid of the remote control 2 Install two 7 AAA 1 5V batteries Ensure the correct polarity of the batteries 3 Cover the back lid Please take out of the batteries from the remote control for long time of no use If the remote control doesn t work properly please carry out the following checks Check the TV is turned on Check the polarity of the batteries are correct Check the batteries are not drained Check the power supply is normal or the power cord is correctly connected Check there are no special fluorescent light or neon light around 2 Basic Operation 2 1 Power ON OFF Connect the power cord to the AC Input Insert the power cord into the appropriate socket Press the Power switch to switch on the TV then press Power button to turn on the unit Press the Power switch again to switch off the TV Note After switch off the TV please don t immediately re open the power switch should be delayed one minute more to re open the power switch 2 2 Setting of Standby Mode Press Power button to turn on the unit Press Power button again to return the display to standby mode The power indicator turns red Be sure not to set your TV in standby mode for a long period of time 2 3 Selection of Input Mode Press the Source button and then press a or v to select the signal source you desire then press Enter or button to confirm The signal sou
79. es 1 Display position is specific by the rise of DE signal only Horizontal display position is specified by the rising edge of 1st DCLK after the rise of 1st DE is displayed on the left edge of the screen Vertical display position is specified by the rise of DE after a Low level period equivalent to eight times of horizontal period The 1st data corresponding to one horizontal line after the rise the of 1st DE is displayed at the top line of screen 2 If a period of DE High is less than 1366 DCLK or less than 768 lines the rest of the screen displays black 3 The display position does not fit to the screen if a period of DE High and the effective data period do not synchronize with each other Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 10 27 No Reproduction and Redistribution Allowed AUO 3 7 Backlight Power Specification for LCD Module 3 7 1 Electrical specification Ta 25 5 C No ITEM SYMBOL CONDITION MIN MAX UNIT Note VDDB 24V VDDB 24V VDDB 24V oo N OFF Control Voltage VEDON VDDB 24V aol VDDB 24V 0 0 0 8 ae N OFF Control Current IBLON 7 O imming Control Voltage imming Control Current Internal Dimming Ratio WM Function m xternal PWM Control Current xternal PWM Ratio Duty xternal PWM Frequency Note 1 Condition VDDB 24V 25 5 Turn on for 45minutes
80. es greater than 40 C the wet bulb temperature must not exceed 39 Note 3 Surface temperature is measured at 50 Dry condition 90 60 zi Storage Wet Bulb E Temperature C 58 40 8 Operation 2 i E 2902 5222 um mte 5 ee ut __ 1 0 E A 21 10 20 ZB 40 K 50 Dry Bulb Temperature Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 5 27 No Reproduction and Redistribution Allowed AUO 3 Electrical Specification The T260XW02 VQ requires two power inputs One is employed to power the LCD electronics and to drive the TFT array and liquid crystal The second input power for the BLU is to power inverter 3 1 Electrical Characteristics P Vaus Om e me Us LOD 0 0 0 0 1 S Power Supply Input Voltage ve os o Power Supply Input Current too os Pe Power Consumption 2 4 3 3 Vdc Input Low Threshold VIL Voltage Low Backlight Power Consumption PDDB meme Note 1 The ripple voltage should be controlled under 10 of Vcc 2 Vcc 12 0V f 60 2 fCLK 81 5Mhz 25 C Test Pattern White Pattern 3 Measurement condition Yee i Trush dix Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 6 27 No Reproduction and Redistribution Allowed AUO 4 1
81. field effect or TNFE In this alignment polarized light is not twisted as it passes through the LC material see Diagram 3A and 3B If the front polarizer is oriented perpendicular to the rear polarizer light will pass through the energized display but will be blocked by the rear polarizer An LCD in this form is acting as a light shutter Displays with variable characters are created by selectively etching away the conductive surface that was originally deposited on the glass Etched areas become the display s background unetched areas become the display s characters segment Fleciroade Electrode md OBSEHVEH Tij olarized Backlit Light LIQUID CRYSTAL Vertical OFF Vertical F Olarizer Polarizer Diagram 3A The off state of a IN LCD the LC molecules form a twist and therefore cause polarized light to twist as it passes through Segment Electrode Electrode No Light Emerg 5 Fandom Light LIGUID CRYSTAL Vertical Horizontal Polarizar ON Polarizer Diagram 3B The on state the electrical field re aligns the LC molecules so they do not twist the polarized light 36 Simple Troubleshooting If the display fails or the performance changes dramatically check the Display in accordance with the following instructions Remember to check the peripherals to pinpoint the source of the failure Symptom Solution P
82. ge range 5 can be achieved TSSOP 16 B FEATURES Wide Analog Voltage Range 3V 18V Note VEE must be lt Vss Break Before Make Switching Eliminates Channel Overlap Linearized Transfer Characteristics Implement an DP4T Switch Effectively Pin to Pin Replacement for CD4052 Pb free plating product number 4052L B ORDERING INFORMATION Package Packin Lead Free Plating 4052 S16 R 4052L S16 R SOP 16 Tape Reel www unisonic com tw Copyright 2005 Unisonic Technologies Co LTD QW R502 013 B 4052 CMOS IC B PIN CONFIGURATION YO Y2 Y3 Y1 UTC 4052 INH VEE Vss B PIN DESCRIPTION 6 ____8 Vs 02 Note Control Inputs referenced to Vss Analog Inputs and Outputs reference to Vee Veg must be lt Vss UNISONIC TECHNOLOGIES CO LTD www unisonic com tw QW R502 013 B 4052 CMOS IC B ABSOLUTE MAXIMUM RATING PARAMETER m RATINGS UNIT DC Supply Voltage Referenced to Vee Vss Veg 0 5 18 Input or Output Voltage DC or Transient v Referenced to Vss for Control Inputs for Switch ____ ____ mmu Derating above 65 C 7 Junction Temperature Operating Temperature Range Note 1 Absolute maximum ratings are those values beyond which the device could be permanently damaged Absolute maximum ratings are stress ratings only and funct
83. ghtness VDIM OV MIN 10 brightness Ta 25 5 C Turn on for 45minutes TE woo esse ur xav oo ETE EN Nos omn Dom omn omn EN omn omn omn EN Note 3 a Uniformity and flicker does not guarantee under 20 dimming control b 10 dimming function okay and no backlight shut down Copyright AU Optronics Inc January 2003 All Rights Reserved T315XW02 VS Specs Ver 0 1 11 29 No Reproduction and Redistribution Allowed AUO 2 Input specification CIOII4MIHRL LF Manufactured by Civilux Pin No Symbol Description 7__ 8 9 10 GND Panel status detect 11 DET Function Normal 0 0 8V Abnormal Open collector BL On Off control signal High Open On Low 12 VBLON Enable Fin Low 0 0 8V High 2 0 5 0 Internal 13 39 100 duty ror 100 NMC when External gt External PVM input O 3 3Y gt Duty 1095 10055 NC when Internal gt m T Copyright AU Optronics Inc January 2003 All Rights Reserved T315XW02 VS Specs ver 0 1 12 30 No Reproduction and Redistribution Allowed AUO 3 3 Signal Timing Specifications This is the signal timing required at the input of the User connector All of the interface signal timing should be satisfied with the following specifications for it s proper operation Timing Table DE only Mod
84. h color depth are very important The T315XW02 VS model is RoHS verified which can be distinguished on panel label General Information civ seen Mum Dum mm iet premem coos sm Che Pa _ mama mmf Copyright AU Optronics Inc January 2003 All Rights Reserved T315XW02 VS Specs ver 0 1 5 30 No Reproduction and Redistribution Allowed AUO 2 Absolute Maximum Ratings The following are maximum values which if exceeded may cause permanent damage to the unit i _ Note 1 Duration 50 msec Note 2 Maximum Wet Bulb should be 39 C and No condensation The relative humidity must not exceed 90 non condensing at temperatures of 40 C or less At temperatures greater than 40 C the wet bulb temperature must not exceed 39 Note 3 Surface temperature is measured at 50 C Dry condition 90 60 4 50 u Storage Wat Bulb E Temperature 4 ES 140 ss NA a u Operation E a T pra 10 TU BU Dry Bulb Temperature OCopyright AU Optronics Inc January 2003 AII Rights Reserved T315XW02 VS Specs ver 0 1 6 30 No Reproduction and Redistribution Allowed AUO 3 Electrical Specification The T315XW02 VS requires two power inputs One is employed to power the L
85. h to conducting tape TFT LCD Module have a low luminance and the inverter has abnormal action because leakage current occurs between lamp wire and conducting tape The relative humidity must not exceed 80 non condensing at temperatures of 40 C or less At temperatures greater than 40 C the wet bulb temperature must not exceed 39 C When operate at low temperatures the brightness of CCFL will drop and the lifetime of CCFL will be reduced Note 1 Vdd 12 0V fv260Hz 80 Mhz 25 C Vdd Duration time 470 Ls Test pattern white pattern 2 he Backlight power consumption shown above does include loss of external inverter at 25 The used lamp current is the lamp typical current 3 The life is determined as the time at which luminance of the lamp is 5096 compared to that of initial value at the typical lamp current on condition of continuous operating at 2512 4 1 2V VTH VCIM VTL OV Figure LVDS Differential Voltage 5 Measurement Condition Rising time 470 us 0 9 Vdd GND 0 1 Vdd 47005 Copyright AU Optronics Inc January 2008 All Rights Reserved T420HW04 V2 7 28 No Reproduction and Redistribution Allowed AUO 3 2 Interface Connections LCD connector P TWO 187059 5122 which is compatible FI RE51S HF JAE 7 T T No connection SECOND CHANNEL 1 Reserves Remb o eseve oooO FIRST CHANNEL 2 r FIRST CHANNEL 3 Pow
86. ignal line is properly fixed message Select the correct input signal For more information refer to Supported Signal Modes in Chapter 4 37 FACTORY MODE INSTRUSTION 1 Enter into foctory mode In TV normal mode Press key S MODE 5 8 0 will go into factory model Select the item by Up and Down keys Adjust by Left and Right keys Press MENU key to exit factory mode 2 Factory mode function a SHOP OUT and HEAT RUN function This two mode is for factory production After writing into the Flash data should shop out the EEROM data and HEAT RUN for mass production Enter into factory mode and go into OPTION item Press LEFT of remote control to use SHOP OUT the power LED will flash for about 5 seconds the TV will auto power down when complete Power again will be normal Enter into factory mode and select HEAT RUN item Press LEFT of remote control to HEAT RUN The TV set will display 7 pure color picture circulate Only Press the STANDARDBY key of the front key board can go back to normal mode b Other factory setting and function PACTORY MIE ORM E NT wg 1 mam iia For desi gn 2 17 07 wing BGF 7 127 _____ B O B 60 _ J ___ BONN BL AUGUE Set the val ue of different picture node 18 14 129 bal ance B 110 129 setting NNUNAR x R For design ___ 5 a 5 0 using ps
87. imedia Interface HDMI digital gain 1 3 compliant receiver with CEC support e Programmable TOP to accommodate different tuner gain to optimize noise and linearity a Bem performance Registered trademark of BBE Sound Inc Version 0 4 1 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved semiconductor e Long cable tolerant robust receiving e Support HDTV up to 1080P Auto Configuration Auto Detection Auto input signal format and mode detection e Auto tuning function including phasing positioning offset gain and jitter detection e Sync detection for H V Sync High Performance Scaling Engines e Fully programmable shrink zoom capabilities e Nonlinear video scaling supports various modes including Panorama Video Processing amp Conversion 3 0 motion adaptive video de interlacer e Edge oriented adaptive algorithm for smooth low angle edges e Automatic 3 2 pull down amp 2 2 pull down detection and recovery PIP with programmable size and location Supports multi video applications e MStar 3 Generation Advanced Color Engine MStarACE 3 automatic picture enhancement gives Brilliant and fresh color e Intensified contrast and details e Vivid skin tone e Sharp edge e Enhanced depth of field perception e Accurate and independent color control e sRGB compliance allows end user to experience the same colors as viewed on
88. ional device operation is not implied 2 The device is guaranteed to meet performance specification within 0 70 operating temperature range and assured by design from 40 125 B ELECTRICAL CHARACTERISTICS Ta 25 C unless otherwise specified SUPPLY REQUIREMENTS Voltages Referenced to Vee Power Supply Voltage Range 3 31 18 Quiescent Current per mm 0006 5 SA Switch Vee X Vyo Vpp and 0 010 10 pA 9 AVsw 500mV Note 2 Lm Total Supply Current 25 only The channel Hane vA Dynamic Plus Quiescent Vpp 10V component Vin Vout Ron 15 20 m f lo Per Package Vop 15V excluded 0 36 0 36 uA kHz f la f lo SWITCHES IN OUT AND COMMONS OUTIIN X Y Z Voltages Referenced to Recommended Peak to Peak Recommended Static or Dynamic Across the Switch AA eee o Output Offset Voltage Voom OV NoLoad ud 5V AVsws 500mV Note2 250 1050 ON Resistance un 10V D or Vin Control and 120 500 0 d 15V Vin 0 to Vpp Switch 80 280 A ON Resistance Between Voo 5V_ 5V 125 70 Any Two Channels in the ARon 10 50 45 Vin Vit or Vin Control Channel to Off Channel Leakage Current lorr _ or Any One Channel 0 05 100 nA Vpp 15V Capacitance Switch I O Inhibit F Capacitance
89. isition help m z differential phase CCIR 330 video signal output voltage see Fig 5 peak to peak value normal mode 2 0 2 3 V trap bypass mode 0 95 1 25 Gait differential gain CCIR 330 note 3 B G standard L standard Fr 5 7 4 MHz By 1aB 1 dB video bandwidth trap bypass mode AC load 5 lt 20 pF RL gt 1 By 3dB trap 3 dB video bandwidth including note 4 sound carrier trap 4 5 MHz 3 95 MHz fap 6 5 MHz 5 50 MHz 0561 trap attenuation at first sound M N standard carrier B G standard 6 S Nw weighted signal to noise ratio weighted in accordance with 56 59 CCIR 567 see Fig 11 note 5 PSRRcoves power supply ripple rejection at fripple 70 Hz video signal 20 25 pin CVBS grey level positive and negative modulation see Fig 6 AFC control steepness definition Alaro Atvir 2003 Oct 02 85 Philips Semiconductors Product specification controlled single and multistandard alignment free IF PLL demodulators PARAMETER conomons mm ve wax unr Audio part o AF rms AF output voltage RMS value 27 kHz FM deviation 50 us de emphasis total harmonic distortion of audio FM 27 kHz FM deviation signal 50 _ de emphasis BAF 3dB 3 dB AF bandwidth without de edi 100 dependent on FM PLL filter S Nwt AF weighted signal to noise ratio of FM 27 kHz FM deviation audio
90. istortion _ Py 2 1 0 03 0 1 Gy voltage gain 31 32 33 dB SVRR supply voltage ripple 50 65 dB rejection 5 Ordering information Table 2 Ordering information TDA8944J DBS17P plastic DIL bent SIL power package SOT243 1 17 leads lead length 12 mm 6 Block diagram Vcc1 Voce SHORT CIRCUIT AND TEMPERATURE PROTECTION MBK933 GND1 GND2 Fig 1 Block diagram 9397 750 06861 Philips Electronics N V 2000 All rights reserved Product specification Rev 02 14 February 2000 77 Philips Semiconductors 7 Pinning information 9397 750 06861 Product specification 7 1 Pinning Fig 2 Pin configuration Table 3 7 2 Pin description Pin description TDA8944J 2 X 7 W stereo BTL audio amplifier TDA8944J MBK936 OUT1 GND1 Veci OUT1 n C IN1 n c IN1 IN2 MODE SVR IN2 NO FP DY N negative loudspeaker terminal 1 ground channel 1 supply voltage channel 1 positive loudspeaker terminal 1 not connected positive input 1 not connected negative input 1 negative input 2 mode selection input standby mute operating half supply voltage decoupling ripple rejection positive input 2 Philips Electronics N V 2000 All rights reserved Rev 02 14 February 2000 78 Philips Semiconductors TDA8944J 2 x 7 W stereo BTL audio amplifier Table 3 Pin description continued 13 not connected OUT2
91. ith ESD protection circuitry however the device may be permanently damaged when subjected to high energy discharges The device should be handled with proper ESD precautions to prevent malfunction and performance degradation Version 0 4 13 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved MST6E16GS Msta Full HD LCD TV Controller with PIP and VIF reliminary Data Sheet Version 0 4 semiconductor REVISION HISTORY Document Description Date MST6E16GS ds v01 Initial release Jun 2008 MST6E16GS ds v02 e Added 3 D Comb and Advanced Sound Technology related Jul 2008 information Updated Features Digital Audio Interface Updated to DDR DRAM in Features Updated Mechanical Dimensions MST6E16GS ds v03 Revised Pin 56 in Pin Diagram and Pin Description Aug 2008 5 6 1665 ds v04 Updated Pin 46 53 in Pin Diagram and Pin Description Oct 2008 Updated voltage of VDDC pins Version 0 4 14 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved MST6E16GS Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor MECHANICAL DIMENSIONS A 063 m 1005 015 0002 0 006 u o 102 _ Jose e oo e o4ossc oosesc Version 0 4 15 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved Winb
92. k CLK input pin The DIO pin is also used as an output when the Fast Read Dual Output instruction is executed Serial Data Output DO The SPI Serial Data Output DO pin provides a means for data and status to be serially read from shifted out of the device Data is shifted out on the falling edge of the Serial Clock CLK input pin Serial Clock CLK The SPISerial Clock Input CLK pin provides the timing for serial input and output operations See SPI Operations Chip Select CS The SPI Chip Select CS pin enables and disables device operation When CS is high the device is deselected andthe Serial Data Output DO pin is at high impedance When deselected the devices power consumption will be at standby levels unless an internal erase program or status register cycle is in progress When CS is brought low the device will be selected power consumption will increase to active levels and instructions can be written to and data read from the device After power up CS must transition from high to low before a new instruction will be accepted The CS input must track the Vcc supply level at power up see Write Protection and figure 19 If needed a pull up resister on CS can be used to accomplish this Hold HOLD The HOLD pin allows the device to be paused while it is actively selected When HOLD is brought low while CS is low the DO pin will be at high impedance and signals onthe DIO and CLK pins will be ignored do
93. kages available 16 pin 300 mil wide plastic SOIC 5 16 pin 150 mil wide plastic SOIC W 16 150 mil wide plastic QSOP Functional Block Diagram ON Switch Sla Sls Slc SID S2A S2B S2c S2D Disabled Low ON Resistance Wideband Video Quad 2 Channel MUX DEMUX Product Description Pericom Semiconductor s series of mixed signal video circuits are produced in the Company s advanced CMOS low power technology achieving industry leading perfor mance PI5V330 is a true bidirectional Quad 2 channel multiplexer demultiplexer that 15 recommended for both RGB and composite video switching applications The VideoSwitch can be driven from a current output RAMDAC or voltage output composite video source Low ON resistance and wide bandwidth make it ideal for video and other applications Also this device has exception ally high current capability which is far greater than most analog switches offered today A single 5V supply 15 all that is required for operation The 5 330 offers a high performance low cost solution to switch between video sources The application section describes the PISV330 replacing the HC4053 multiplier and buffer amplifier 16 Pin Product Configuration Product Pin Description Pin Name Description S14 S2A Analog Video I O SIB S2B Sic S2c SID S2p IN Select Input EN Enable Analog Video I O Ground Power
94. l rights reserved MST6E16GS Sta Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor GENERAL DESCRIPTION The MST6E16GS is a high performance and fully integrated IC for multi function LCD monitor TV with resolutions up to full HD 1920x1080 It is configured with an integrated triple ADC PLL an integrated DVI HDCP HDMI receiver a multi standard TV video and audio decoder a video de interlacer a scaling engine the MStarACE 3 color engine an on screen display controller an 8 bit MCU and a built in output panel interface By use of external frame buffer PIP POP is provided for multimedia applications Furthermore 3 D video decoding and processing are fulfilled for high quality TV applications To further reduce system costs the MST6E16GS also integrates intelligent power management control capability for green mode requirements and spread spectrum support for EMI management Version 0 4 3 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved MST6E16GS d Full HD LCD TV Controller with PIP and Preliminary Data Sheet Version 0 4 semiconductor PIN DIAGRAM MST6E16GS I lt m amp So d 298868 2222222222226502222222222 2200 052 SS 11
95. l should be operated in the same condition as installed in your instrument 6 Do not attach a conducting tape to lamp connecting wire If the lamp wire attach to conducting tape TFT LCD Module have a low luminance and the inverter has abnormal action because leakage current occurs between lamp wire and conducting tape 7 The relative humidity must not exceed 80 non condensing at temperatures of 40 C or less At temperatures greater than 40 C the wet bulb temperature must not exceed 39 C When operate at low temperatures the brightness of CCFL will drop and the life time of CCFL will be reduced 8 Specified values are for a single lamp only which is aligned horizontally The lifetime is defined as the time which luminance of the lamp is 50 compared to its original value Operating condition Continuous operating at Ta 25 2 Copyright AU Optronics Inc January 2003 All Rights Reserved T315XW02 VS Specs ver 0 1 8 30 No Reproduction and Redistribution Allowed 3 2 Interface Connections Connector on Panel 093G30 B0001A 1 Manufactured by Starconn ee 3 ve s dT ON 5 ON _ 7 7 ON _ ON m _ _ 3s 776
96. n t care When HOLD is brought high device operation can resume The hold function can be useful when multiple devices are sharing the same SPI signals See Hold function Winbond Electronics Corporation Winbond LIT IT Electronics Corp an El YN Write Protect WP The Write Protect WP pin can be used to prevent the Status Register from being written Used in conjunction with the Status Register s Block Protect BPO and BP1 bits and Status Register Protect SRP bits a portion or the entire memory array can be hardware protected The WP pin is active low Figure 2A W25X20 and W25X40 Pin Assignments 8 pin SOIC Package Code SN Figure 2B W25X80 Pin Assignments 8 pin SOIC Package Code SS Table 1 Pin Descriptions DIO Data Input Output DO Data Output CLK Serial Clock Input CS Chip Select Input WP Write Protect Input HOLD Hold Input Vcc GND Power Supply N C No Connect ADVANCE INFORMATION 06 28 05 55 Winbond Confidential Information flash Do not copy or distribute to unauthorized parties 2M 4M AND 8M BIT SERIAL FLASH MEMORY W25X20 W25X40 AND W25X80 SPECIFICATIONS AND TIMING DIAGRAMS Table 5 Absolute Maximum Ratings Symbol Parameters Conditions Range Unit Vcc Supply Voltage 0 6 to 4 0 V Vio Voltage Applied to Any Pin Relative to Ground 0 6 to Vcc 0 4 V Storage Temperature 65 to 150
97. ng the Fast Read Dual Output instruction These transfer rates are comparable to those of 8 and 16 bit Parallel Flash memories A hold pin write Protect pin and programmable write protect with top or bottom array control features provide further control flexibility Additionally the device supports JEDEC standard manufacturer and device identification INEXFLASH Continuity The Winbond W25X40 and W25X80 are fully compatible with the previous NexFlash NX25X40 and NX25X80 Serial Flash memories ADVANCE INFORMATION 06 28 05 54 Winbond Confidential Information Do not copy or distribute to unauthorized parties 2M 4M AND 8 SERIAL FLASH MEMORY W25X20 W25X40 AND W25X80 PIN DESCRIPTIONS Package Types At the time this data sheet was published not all package types had been finalized Contact Winbond to confirm availability of these packages before designing to this specification The W25X20 and W25X40 are offered in 8 pin plastic 150mil width SOIC package code SN as shown in figure 2A The W25X80 is offered in an 8 pin plastic 208mil width SOIC package code SS as shown in figure 2B Package diagrams and dimensions are illustrated atthe end of this data sheet Serial Data Input Output DIO The SPI Serial Data Input Output DIO pin provides a means for instructions addresses and data to be serially written to shifted into the device Data is latched on the rising edge of the Serial Cloc
98. nput power suddenly shut down Once power reset it should follow power sequence as spec definition 1 Apply the lamp voltage within the LCD operation range When the back light turns on before the LCD operation or the LCD turns off before the back light turns off the display may momentarily become abnormal screen OCopyright AU Optronics Inc January 2003 AII Rights Reserved T315XW02 VS Specs Ver 0 1 16 29 No Reproduction and Redistribution Allowed AUO 4 Optical Specification Optical characteristics are determined after the unit has been and stable for approximately 45 minutes in a dark environment at 25 C The values specified are at an approximate distance 50cm from the LCD surface at a viewing angle of and 0equal to 0 Fig 1 1 presents additional information concerning the measurement equipment and method module SR3 or equivalent Parameter Symbol Units Notes Contrast Ratio 2400 3000 1 Surface Luminance white LWH 360 em MN Luminance Variation 3mm 9p 430 J 3 GtoGResponsetime 55 ms TN Color Gamut sd ntsc 2 w RED Rx 0 64 y GREEN 2028 fof ff OQ M 002 0 15 20905 ff WHITE or ff Wy Angle x axis s lefi g Z NNNM axis s down 9 0 27277 772100
99. oduction tested Power Supply Characteristics Parameters Description Test Conditions Icc Quiescent Power Vcc Max IN GND or Vcc Supply Current Alcc Supply Current per Vcc Max IN 3 4 0 Input TTL HIGH Iccp Supply Current per Vcc Max Input per MHz S1 52 and D Pins Open EN GND Control Input Toggling 50 Duty Cycle Notes 1 For Max or Min conditions use appropriate value specified under Electrical Characteristics for the applicable device 2 Typical values are at Vcc 5 0V 25 C ambient 3 Per TTL driven input VIN 3 4V control inputs only 51 52 and D pins do not contribute to Icc 4 This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified frequency The 51 S2 and D I O pins generate no significant AC DC currents as they transition This parameter is not tested but is guaranteed by design 3 PS7032C 08 07 97 62 UNISONIC TECHNOLOGIES 60 LTD 4052 CMOS IC DIFFERENTIAL 4 CHANNEL ANALOG MULTIPLEXERS C DEMULTIPLEXERS B DESCRIPTION The UTC 4052 is differential 4 channel analog multiplexers DIP 16 demultiplexers for application as digitally controlled analog switches The device has two binary control inputs and an inhibit input It feature low ON impedance and very low OFF leakage current Control of analog signals up to the complete supply volta
100. odulated standards via e Digital acquisition help VIF frequencies of 33 4 33 9 38 0 38 9 45 75 and 58 75 MHz e 4 MHz reference frequency input signal from Phase Locked Loop PLL tuning system or operating as crystal oscillator e VIF Automatic Gain Control AGC detector for gain control operating as peak sync detector for negative modulated signals and as a peak white detector for positive modulated signals e External AGC setting via pin OP1 e Precise fully digital Automatic Frequency Control AFC detector with 4 bit digital to analog converter AFC bits readable via I C bus e TakeOver Point TOP adjustable via I2C bus or alternatively with potentiometer e Fully integrated sound carrier trap for 4 5 5 5 6 0 and 6 5 MHz controlled by FM PLL oscillator e Sound IF SIF input for single reference Quasi Split Sound QSS mode PLL controlled 4 ORDERING INFORMATION TYPE NUMBER Product specification TDA9885 TDA9886 IG b 7 M e SIF AGC for gain controlled SIF amplifier single reference QSS mixer able to operate in high performance single reference QSS mode and in intercarrier mode switchable via e AM demodulator without extra reference circuit e Alignment free selective FM PLL demodulator with high linearity and low noise e Four selectable 2 addresses C bus control for all functions C bus transceiver with pin
101. on trot 20ns Inhibit Vss Note 1 Data of TYP is intended as an indication of the IC s potential performance 2 For voltage drops across the switch AVsw 600mV gt 300 at high temperature excessive Vpp current may be drawn i e the current out of the switch may contain both Vpp and switch input components The reliability of the device will be unaffected unless the Maximum Ratings are exceeded UNISONIC TECHNOLOGIES CO LTD www unisonic com tw QW R502 013 B 66 4092 TEST CIRCUIT CMOS IC IN OUT OUT IN LEVEL CONVERTED CONTROL IN OUT OUT IN CONTROL VEE Switch Circuit Schematic BH TRUTH TABLE 16 O VDD INH TRUTH TABLE A Control Inputs B Select ON Switches Inhibit X0 120 25 X1 140 92 4 1 gt X2 150 LS X3 X Don t Care YO Y1 Y2 Y3 UTC 4052 Functional Diagram UNISONIC TECHNOLOGIES CO LTD www unisonic com tw QW R502 013 B 67 Features Medium voltage and Standard voltage Operation 5 0 4 5V to 5 5V 2 7 2 7V to 5 5V Internally Organized 128 x 8 1K 256 x 8 2K 512 x 8 4K 1024 x 8 8K or 2048 x 8 16K 2 wire Serial Interface Schmitt Trigger Filtered Inputs for Noise Suppression Bi directional Data Transfer Protocol 100 kHz 2 7V and 400 kHz 5V Compatibility Write Protect Pin for Hardware Data Protection 8 byte Page 1K 2K 16 byte Page 4K 8K 16K Write Modes
102. ond Confidential Information Do not copy or distribute to unauthorized parties 2M 4M AND 8 SERIAL FLASH MEMORY W25X20 W25X40 AND W25X80 FEATURES Family of Serial Flash Memories W25X20 2M bit 256K byte 262 144 1024 pages W25X40 4M bit 512K byte 524 288 2048 pages W25X80 8M bit 1M byte 1 048 576 4 096 pages 256 bytes per programmable page Uniform 4K byte Sectors and 64K byte Blocks SPI Serial Interface with Single or Dual Outputs Clock Chip Select Data I O Data Out Optional Hold function for SPI flexibility Fast Data Transfer up to 136M bits second Clock operation to G8MHz Fast Read Dual Output instruction Auto increment Read capability Flexable Array Architecture with 4KB sectors Sector Erase 4K bytes Block Erase 64K byte Page program up to 256 bytes lt 2ms 100 000 erase write cycles 20 year retention e Low Power Consumption Wide Temperature Range Single 2 7 to 3 6V supply 5mA active current 1 Power down typ 40 to 85 C operating range Software and Hardware Write Protection Write Protect all or portion of memory via software Enable Disable protection with WP pin Top or bottom array protection Space Efficient Packaging 8 pin SOIC 150 mil 8 pin SOIC 208 mil 8 Pin SOIC 150 mil W25X20 and W25X40 Package Code SN 8 Pin SOIC 208 mil W25X80 Package Cod
103. ot 5V tolerant Pulse Width Modulation Output 4mA driving strength General Purpose Input Output PWM3 not 5V tolerant Pulse Width Modulation Output 4mA driving strength 166 General Purpose Input Output Input w 5V tolerant IR Receiver Input 163 General Purpose Input Output Version 0 4 8 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved MST6E16GS Sta Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor DRAM Interface Pin PinType Function Pin __ casz Output Column Address Strobe activelow 2 Jom memeeshem 05 0 __ 134 110 MDATA 15 0 DRAM Memory Data Bus 132 129 127 126 124 123 121 118 116 115 113 112 morke Output DRAM Memory Clock Enable 8s MVREF ____ Reference Voltage for DDR SDRAM Interface 19 0 USB Interface PinType Funcion Pin USB20_REXT External Resistor Pin Connected through 900 ohm 140 1 Resistor to GND USB20 DM Analog 1 0 USB 2 0 Inverting Data Input Output USB20 DP Analog 1 0 USB 2 0 Non inverting Data Input Output VIF Interface Type Funtin Pin VR27 Compensation Capacitor for Regulator 46 SIFP Analog Input Positive Sound IF Input 4 0 SIFM _____ Negative Sound IF Input o _ ______ Negative Video IF Input S _ PostveVideoFinpt S tasc Analog
104. ower Supply Mounting 10 38 Package 9 J N N CON Vise Ss HDZ1804 3A BS X21 1804300R PCB HDZ1804 3A Page 3 of 9 1 Power supply overview 1 1 INPUT ELECTRICAL CHARACTERISTICS KW A Hit Max input AC current Inrush current cold start 50Atyp peak 120Vac 100Atyp peak 220Vac Efficiency full load 82 100Vac 86 Min 220Vac Hi Harmonic current Meet GB17625 1 1998 IEC61000 3 2 Class D Ht Leakage Current Less than 0 7mA 230Vac input Standby Power Loss lt 1W at 264Vac output power lt 0 IW Input Fuse T5AH 250Vac 1 2 OUTPUT ELECTRICAL CHARACTERISTICS 1 2 1 WE WAK Output Voltage Current amp Regulation ff HL FELT Mic Hl Ve rp iR Te Output Voltage Min Current Rated current fi WEE Wit By e C Ei aK 100 The peak current or power should be test at other of DC output at Rated load and the peak current pulse width within 100ms 1 2 2 il DC Output Ripple amp Noise E JE Output Voltage Ripple amp Noise SVE ANI ASM 20 FE Measurements shall be made with an oscilloscope with 20MHz bandwidth 2 O TuF TOuF AY FL HAO IU f 2X Output shall be bypassed at the connector with 0 luF ceramic capacitor and 10uF
105. ower cannot be turned Check that both ends of the power cable are on Power indicator plugged into the socket appropriately and the wall does not light socket is operational No Input Signal Check that the signal line is connected properly message appears Check that the power of the relevant peripherals is turned on Check that the Input option that has been selected matches with the input signal The remote control does Check the batteries are not drained Use new not function properly batteries Check that the remote control is within the operating range Check that the remote control is pointed to the remote control window on the display Check that there are no obstacles between the remote control and the remote control window appear on the screen Neon lamp or other possible interference sources Image colour or quality Check that all the video settings are adjusted deteriorates appropriately such as brightness contrast colour etc For more information about video settings refer to OSD Functions in Chapter 2 screen position and Check that the screen position and size is adjusted size are incorrect appropriately Image or colour is Check that the signal line is connected properly incorrect When connecting to a PC you can change the resolution of the PC to acquire the correct image The discrepancy of the PC output signal may affect the display of the image Display warning Check that the input s
106. play when displaying motionless picture e While watching TV program in 4 3 size mode for a long time there would be traces on the edge of the screen s left right and center parts because of different transmition of the light on the screen Similar impact on the screen will occur when playing DVD or connecting games control Products destroyed by these reasons can t be guaranteed for maintenance e t might cause picture remnants to display electronic games and motionless picture of PC more than a period of avoid such effect please decrease the contrast and brightness when displaying motionless picture LCD COLOR TV 1 Connection and Preparation of TV 1 1 Accessories User Manual x 1 Power Cord x 1 Remote Control x 1 Battery UM 4 RO3P AAA x 2 Stand x 1 Pre assembled Optional Wall Mount Kit x 1 Pre assembled Optional HHH 1 2 Installation of Stand 1 Place the TV with the front panel facing downwards the soft cloth or soft pads on a desk 2 Insert the stand into the bottom socket of the TV 3 Insert the screws into the sockets and tighten them 1 3 Installation of Wall Mount Kit Optional The Wall Mount Kit can help install the TV on the wall For more information about wall mounting please refer to the instructions provided along with the wall mount kit When wall mounting the product please contact qualified personnel lf users choose to install the TV by themselves the p
107. programmable Module Address MAD 2 GENERAL DESCRIPTION The TDA9885 is an alignment free multistandard PAL and NTSO vision and sound IF signal PLL demodulator for negative modulation only and FM processing The TDA9886 is an alignment free multistandard PAL SECAM and NTSO vision and sound IF signal PLL demodulator for positive and negative modulation including sound AM and FM processing 3 APPLICATIONS e TV VIR PC and STB applications PACKAGE NAME DESCRIPTION VERSION TDA9885T V3 024 plastic small outline package 24 leads body width 7 5 mm SOT137 1 TDA9885TS V3 550 24 plastic shrink small outline package 24 leads body width 5 3 mm SOT340 1 32 terminals body 5 x 5 x 0 85 mm TDA9886HN V4 HVQFN32 plastic thermal enhanced very thin quad flat package no leads SOT617 3 32 terminals body 5 x 5 x 0 85 mm 2003 Oct 02 84 Philips Semiconductors Product specification controlled single and multistandard alignment free IF PLL demodulators TDA9885 TDA9886 5 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN supply voltage notes 1 and 2 17 5 0 155 V TYP MAX UNIT 3 7 gt le supply curren Video part Vi VIF rms VIF input voltage sensitivity 1 dB video at output RMS value 0 100 VIF gaincontrolrange __ seeFg7 _ vision carrier operating frequencies see Table 14 334 MHz feo 989 ___ 5875 acqu
108. r approximately 45 minutes a dark environment at 25 The values specified are at an approximate distance 50cm from the LCD surface at a viewing angle of and 6 equal to 0 Signal generator used for measurement is Chroma 2913 and signal setting follows the typical value shown in page 13 with vertical frequency range A fv 60Hz Meanwhile dimmer is 3 3 V for its maximum setting Fig 1 1 presents additional information concerning the measurement equipment and method LCD module SRS equivalent xa axis right g 0 _ 89 IlDearee X axis left p 180 0 89 ya axis up o 90 o 8g ya axis down 0 0 1 8g9 Dearee Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 17 27 No Reproduction and Redistribution Allowed AUO 5 Mechanical Characteristics The contents provide general mechanical characteristics for the model T260XW02 VQ In addition the figures in the next page are detailed mechanical drawing of the LCD 626 0mm Outline Dimension 3 3 0mm 45 0mm w inverter amp shielding 39 0mm w o inverter 580 8mm 0 5mm 328 6mmz0 5mm Di 575 769mm a 323 7 12mm Weight 37509 Typ surface Treatment AG Haze 11 3H Copyright AU Optronics Inc January 2003 All Rights Reserved T260XW02 VQ Spec Ver1 0 20 27 No Reproduction and Redistribution Allowed AUO Front View
109. rces are displayed in the following sequence LCD COLOR TV a gt 1 2 gt AV3 gt S VIDEO 1 YPbPr2 gt VGA 3 HDMI1 HDMI2 MEDIA When selecting the signal source the screen will display the information TV mode When there is no signal from the selected source the warning message will be displayed as per illustration Either change the channel in TV mode or press Source button to change source HDMI mode TV mode HDMI 12 2 4 Menu Option Adjustment After you have installed the batteries into the remote control you will need to set some preferences on the LCD TV using the menu system The buttons for menu option adjustment include Menu A lt Enter buttons Press the Menu button to open the OSD Menu then press 4 button to select the pages The pages are displayed in the following sequence circular display neue gt Sound System Advance TV gt Press the Menu button to display the menu system Press 4 button to select the menu pages Press V button to select an item Press 4 button to select or adjust a setting If you do not make a selection within 15 seconds the menu will close automatically Press the Menu button to return or exit OSD menu 5 NJ 5 2 9 Menu Functions 2 5 1 Picture Function X Adjustment of the Picture Press the Menu button and then press 4 or gt but
110. roducer is irresponsible for any possible damages caused either to the product or to persons 1 4 Keys and Interfaces 132 6 137 6 142 6 Ee xp ot 060060000000 n 5 1 Remote sensor window amp Menu key Volume key oource key 11 AC input 14 HDMI 2 input 17 YPbPr 1 and audio input _ 20 AV1 video and audio input __ 23 AV3 video and audio input Power indicator Speaker Channel A key Channel v key Volume v key 9 Power Standby key 10 Power switch 12 MEDIA 13 HDMI 1 input 15 D SUB VGA input 16 VGA DVI audio input 18 AV2 video and audio input 19 S Video input 21 Antenna input 22 YPbPr 2 and audio input 24 Coaxial output 25 AV Video and audio output YPbPr2 p n n ne COAXIAL OUTPUT OUTPUT VIDEO VIDEO VGAIDVI MEDIA 2 2 2 2 OYPDP 1 e AV2 INPUT 52 LCD COLOR TV 1 5 Remote Control gt WW INJ O i ole ay 92 NJ LOO ON 0000 FREEZE gt 5 p O n VOL m 2 o A m 0 0 Q O o uj a E 2 eJ gt ININ WJ OIN UT Gu 1 N I 30 31 32 33 POWER Standby turn
111. ruSurround XT is protected under US and foreign patents issued and or pending SRS TruSurround XT SRS and 0 symbol are trademarks of SRS Labs Inc in the United States and selected foreign countries Neither the purchase of the MST6E16GS nor the corresponding sale of audio enhancement equipment conveys the right to sell commercialized recordings made with any SRS technology SRS Labs requires all set makers to comply with all rules and regulations as outlined in the SRS Trademark Usage Manual separately provided Supply of this Implementation of Dolby Technology does not convey a license nor imply a right under any patent or any other Industrial or Intellectual Property Right of Dolby Laboratories to use this Implementation in any finished end user or ready to use final product Companies planning to use this Implementation in products must obtain a license from Dolby Laboratories Licensing Corporation before designing such products DISCLAIMER MSTAR SEMICONDUCTOR RESERVES THE RIGHT MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN NO RESPONSIBILITY IS ASSUMED BY MSTAR SEMICONDUCTOR ARISING OUT OF THE APPLICATION OR USER OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS Electrostatic charges accumulate on both test equipment and human body and can discharge without detection MST6E16GS comes w
112. ry instructions to be observed before servicing is An isolation transformer should be connected in the power line between the receiver and the AC line when a service is performed on the primary of the converter transformer of the set Comply with all caution and safety related provided on the back of the cabinet inside the cabinet on the chassis or picture tube To avoid a shock hazard always discharge the picture tube s anode to the chassis ground before removing the anode cap 4 Completely discharge the high potential voltage of the picture tube before handling The picture tube is a vacuum and if broken the glass will explode When replacing a MAIN PCB in the cabinet always be certain that all protective are installed properly such as control knobs adjustment covers or shields barriers isolation resistor networks etc When servicing is required observe the original lead dressing Extra precaution should be given to assure correct lead dressing in the high voltage area Keep wires away from high voltage or high tempera ture components Before returning the set to the customer always perform an AC leakage current check on the exposed metallic parts of the cabinet such as antennas terminals screwheads metal overlay control shafts etc to be sure the set is safe to operate without danger of electrical shock Plug the AC line cord directly to the AC outlet do not use a line isolation transform
113. s 25 10 _ 25 10 sman 80 10 120 113 147 180 214 18 57 13 174 VERSION V2 15 37 49 01 T 08 39 semiconductor MST6E16GS Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 Attention Please Under the technology license agreement between MStar and Dolby SRS BBE MStar is obliged not to provide samples that incorporate Dolby SRS BBE technology to any third party who is not a qualified licensee of Dolby SRS BBE respectively FEATURES LCD TV controller with PIP display functions Input supports up to UXGA amp 1080P Panel supports up to full HD 1920x1080 TV decoder with 3 D comb filter Multi standard TV sound demodulator and decoder 10 bit triple ADC TV and RGB YPbPr 10 bit video data processing Integrated DVI HDCP HDMI compliant receiver High quality dual scaling engines amp dual 3 D video de interlacers 3 D video noise reduction MStarACE 3 picture color processing engine Embedded On Screen Display OSD controller engine Built in MCU supports PWM amp GPIO Built in dual link 8 10 bit LVDS transmitter 5 volt tolerant inputs Low EMI and power saving features 216 pin LQFP Multi Standard TV Sound Decoder e Supports BTSC NICAM A2 EIA demodulation and decoding e FM stereo amp SAP demodulation e L Rx2 and SIF audio inputs L Rx2 loudspeaker and line outputs Supports sub woofer output e Built in
114. s on is pulled to TTL low or open circuit the DC outputs are to be disabled Ps on X HDZ1804 3A X21 1804300R HDZ1804 3A Page 5 of 9 1 4 fF TRE Protection 1 4 1 DC output Over Voltage Protection 26 32V Type Power supply latch into shutdown state 13 18V Type Power supply latch into shutdown state 5 5V 9V Type Power supply latch into shutdown state 5 5V 9V Type Power supply latch into shutdown state 16 A 264 AMR 2X The power supply shall be test at max AC voltage 264Vac and min load or no load 1 4 2 DC Output Over current Protection Power supply latch into shutdown state 14 gif Power supply latch into shutdown state Him Sve The over current protection should be test at an Rated load 1 4 3 DC Output Short Circuit Protection Power supply latch into shutdown state Power supply latch into shutdown state 5V Hiccup IM FER RTP a oe EE Ug Wh The Short Circuit protection should be test at other of dc output at Rate load 1 4 4 RIP TIRES ir Reset After Shutdown BEA Ka CRRA Ja AC MAZES FAURE RAS IE HY After power supply enter into shutdown the power supply will restart after AC input reset 2 28 Isolation 2 1 Dielectric Strength Ht Input To Output
115. signal 50 us de emphasis vision carrier unmodulated mems Je E d TDA9885 TDA9886 OLAM sup AM suppression of FM demodulator AM f 1 kHz and m 54 96 referenced to 27 kHz FM deviation saad for AM PSRRaup power supply ripple rejection on pin AUD IF intercarrier output level RMS value 20 26 dB for FM 14 20 dB ASS mode 50 Czo o 10 180 mv L standard without modulation o intc rms intercarrier mode PC SC 20 dB SC off note 6 Reference frequency Vref rms reference signal voltage operation as input terminal RMS value Notes Values of video and sound parameters can be decreased at Vp 4 5 V For applications without I C bus the time constant x the supply must be gt 1 2 us e g 1 Q and 2 2 uF 52 Condition luminance range 5 steps from 0 to 100 a AC load C lt 20 pF and gt 1 The sound carrier frequencies depending on the TV standard are attenuated by the integrated sound carrier traps see Figs 13 to 18 H s is the absolute value of transfer function 5 S Nwisthe ratio of the black to white amplitude to the black level noise voltage RMS value measured on pin CVBS 5 MHz weighted in accordance with CCIR 567 2003 Oct 02 86 Product specification Philips Semiconductors TDA9885 TDA9886 controlled single and multistandard alignment free IF PLL demodulators 6 BLOCK
116. t 2 gt 909385390238392920255049550550665 NIOVXM TANVd MS WI ESGL BRREESSUGERE SSA eo WI TH TA 2 553 OS 525 28925 85565 2 9 02 8 2 5 S a 2 IW a a 3 Ja S 8 2 IB 8 IS IR IK S 8 6 iS JS IE IS S S S m 8 2 IS IS 2 S IS EIS lt 5 lal le le le le lt lt lt lt lt lt ele lt lt a le an ERE EE lt RE KEI lt lt lt lt KKK KKK lt 1 HE ERE gt 5 5 c 6 IR IR 5 5 33334 BEREE EGEE EEEE FEJ FREER gt I d I OOGHOS IWOSdH HE CON V 2 12119 9THO9LSIN Jo 12945 Z7 S 6007 O TAgHI 8 7 HDVd LONTEN IoquinN 9716 LOAfOud9ITAILSWN IL 119 18045 AH NIVI WOdd H 8408 ruv sav 93IV Add 001 lav add Lav add lt Add TOS ced PXcc Ta S3IV 63IV Add es v CFTA
117. ter 20 sec Led is flash very fast display Chip erasing Chip programming 4 20 After 30 sec Led flash slowly Display 21 Power off the TV set and power on again Update finished Wating for 10sec standby on the
118. tion The T420HW04 requires two power inputs One is employed to power the LCD electronics and to drive the TFT array and liquid crystal The second input which powers the CCFL is typically generated by an inverter 3 1 Electrical Characteristics Mim Max ix we 1 A 4 Pe wat _ a 8 Differential Input VTH 100 mV High Threshold 4 Voltage Differential Input VTL 100 mV Low Threshold 4 Voltage Common Input VCIM 1 2 1 8 V Input High wey Input Low Pee don ____ _ The performance of the Lamp in LCM for example life time or brightness is extremely influenced by the characteristics of the DC AC Inverter So all the parameters of an inverter should be carefully designed so as not to produce too much leakage current from high voltage output of the inverter When you design or order the inverter please make sure unwanted lighting caused by the mismatch of the lamp and the inverter no lighting flicker etc never occurs When you confirm it the LCD Assembly should be operated in the same condition as installed in your instrument Copyright AU Optronics Inc January 2008 All Rights Reserved T420HW04 V2 6 28 No Reproduction and Redistribution Allowed AUO Do not attach a conducting tape to lamp connecting wire If the lamp wire attac
119. titude x Operating to 10 000 ft Non operating to 20 000 ft 5 4 153 JjxX Cooling Method Ventilation cooling 5 5 gt Vibration 10 55Hz 19 52 26 3mintues period 60mintues each along X Y and Z axis 5 6 491 52 50 115 once each X Y and Z axis 6 HRF Dimension xK L X W L190mm X W130mm X H26mm HDZ1804 3A BS X21 1804300R PCB HDZ1804 3A Page 7 of 9 7 XH Weight About650g PC 8 Pin Connection AC 101 DC 201 DC CON 202 1 2 3 5 12 13 DC CON 203 6 7 10 11 9 ZRRY Power Supply Mounting 201 m CON203 HDZ1804 3A X21 1804300R PCB 12 HDZ1804 3A Page 8 of 9 10 Package HAM TA YI NBR 11 Picture HDZ1804 3A BS X21 1804300R PCB HDZ1804 3A Page 9 of 9 AUO 1 General Description This specification applies to the 26 0 inch Color TFT LCD Module T260XW02 VQ This LCD module has a TFT active matrix type liquid crystal panel 1366x768 pixels and diagonal size of 26 0 inch This module supports 1366x768 XGA WIDE mode Non interlace Each pixel is divided into Red Green and Blue sub pixels or dots which are
120. ton until the Picture menu W appears Picture Press A or v button to highlight the JJ Picture Mode Contrast Brightness JJ Hue Saturation Sharpness Color Temp Picture Size item Press 4 or button to adjust Press the Menu button to return or exit 55 tt 3 2 5 2 Sound Function Adjustment of the Sound Press the Menu button and then press lt or gt button until the Sound menu appears Press A or v button to highlight the Sound Mode Bass Treble Balance Sourround NICAM item Press 4 or button to adjust 4 Press the Menu button to return or exit Note NICAM item is optional 2 5 3 System Function Adjustment of the System Press the Menu button and then press lt or gt button until the System menu appears Press aor v button to highlight the OSD Language OSD Halftone Default item Press 4 button to adjust Press the Menu button to return or exit LCD COLOR TV 2 9 4 Advance Function X Adjustment of the Advance To control the noise reduction Press the Menu button and then press 4 or gt button until the Advance menu appears Press A or v button to highlight the Sleep TTX Language item Press 4 or button to select Press the Menu button to return or exit Note Inactive for VGA DVI HDMI 2
121. tracks should be as wide as possible for delivering maximum output power 9397 750 06861 Philips Electronics N V 2000 All rights reserved Product specification Rev 02 14 February 2000 81 Philips Semiconductors TDA8944J 9397 750 06861 Product specification 2 x 7 W stereo BTL audio amplifier L 1000 uF T MGL951 Fig 15 Printed circuit board layout single sided components view 14 1 2 Power supply decoupling Proper supply bypassing Is critical for low noise performance and high supply voltage ripple rejection The respective capacitor locations should be as close as possible to the device and grounded to the power ground Proper power supply decoupling also prevents oscillations For suppressing higher frequency transients spikes on the supply line a capacitor with low ESR typical 100 nF has to be placed as close as possible to the device For suppressing lower frequency noise and ripple signals a large electrolytic capacitor e g 1000 uF or greater must be placed close to the device The bypass capacitor on the SVR pin reduces the noise and ripple on the midrail voltage For good THD and noise performance a low ESR capacitor is recommended Philips Electronics N V 2000 All rights reserved Rev 02 14 February 2000 82 Philips Semiconductors TDA8944J 2 x 7 W stereo BTL audio amplifier 16 Package outline DBS17P plastic DIL bent SIL power package 17 leads lead length 1
122. ut from Channel 0 w 5V tolerant BINOP Analog Blue Inputfrom Channeto 2 inor Input AnagGreeninputfromChameO _____ 4 _ RINOP Analog Input Analog Red Input from Channelo fa Version 0 4 5 10 7 2008 Copyright 2008 MStar Semiconductor Inc All rights reserved e MST6E16GS Sta Full HD LCD TV Controller with PIP and VIF Preliminary Data Sheet Version 0 4 semiconductor PinType Function RINIP Analog Input Analog Red Input from Channel 1 w 5V tolerant CVBS Input Channel 4 CVBS4 0 CVBS1 Analog Input Analog CVBS Composite S Video Y C Input Channel 1 CVBSO Analog Input Analog CVBS Composite S Video Y C Input Channel 0 VCOMI Analog Input Common Analog Input Reference Ground 1 for CVBS ADCB VCOMO Analog Input Common Analog Input Reference Ground 0 for CVBS ADCB CVBSOUTI Analog Output CVBS Composite Video Output Channel 1 CVBSOUTO Analog Output CVBS Composite Video Output Channel 0 Analog Audio Interface PinType Function Pin Analog Output Reference Voltage for Audio Common Mode _______ 60 _ LINE Analog input Audio Line Input Left a LINE NOR Analog Input Audio Line Input Right Channelo B LINE IN_aL Analog input Audio Line Input Left Channela f Analog input Reference Ground for Audio Line Input 66 _ LINE OUT 2L Analog Output Main Audio Output
123. utton to select JPEG MP3 or DEVICE function The JPEG only support jpg format data only support mp3 format data the device only support FAT32 format hard disk Press 4 button to highlight the JPEG or MP3 file the press button to play music or decording picture Press the Menu button to return or exit LCD COLOR TV 2 6 Using the Teletext Function Optional Note When pressing the Teletext function keys on the remote control if the word NO TTX is displayed onscreen it means the related function can t be used Teletext is a free service broadcast by most TV stations which give up to the minute information news weather television programs share price subtitles and many other topics To operate TELETEXT Select a TV station on which Teletext is being transmitted gt Press the Text button once to bring up the teletext screen Two page numbers are displayed on the screen headline The first page number indicates your selection while the second shows the current page displayed Teletext Page Selection X Enter the required Teletext page as a three digit numbers The selected page number is displayed at the top left corner of the screen The Teletext page counter searches until the selected page number is located so that the desired page is displayed on the screen X Thea v buttons can be used to select the preceding or following page Fast find using the 4 coloured buttons Four subject headed p

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