Polmaddie3 User Manual Issue – 1.0
Contents
1. point Polmaddie3 User Manual Issue 1 0 Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 Foreword PLEASE READ THIS ENTIRE MANUAL BEFORE PLUGGING IN OR POVVERING UP YOUR POLMADDIF3 BOARD PLEASE TAKE SPECIAL NOTE OF THE VVARNINGS VVTTHIN THIS MANUAL Trademarks Spartan3AN ISE EDK Webpack Xilinx are the registered trademarks of Xilinx Inc San Jose California US Polmaddie3 is a trademark of Enterpoint Ltd Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 CONTENTS Foreword 2 Trademarks 2 Introduction 4 Finding your way around 5 Getting Started 6 Polmaddie Features 7 Power Input 7 Io Headers 8 Cpld 10 Oscillator 10 Leds 11 Switches 12 Usb Interface 13 Programming Polmaddie3 14 Mechanical Arrangement 15 Medical and Safety Critical Use 16 Warranty 16 Support 16 Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 Introduction Welcome to your Polmaddie3 board Polmaddie is Enterpoint s low cost product range that offers an economical way to begin programming with CPLDs and FPGAs The aim of this manual is to assist in using the main features of Polmaddie3 The Polmaddie board comes in several variants based on different devices Polmaddie3 is based on a Xilinx V Spartan3 50AN 4TOG144C 2 001 Polmaddie3 issue 10 J 0000 B Co C10 mat r em La tem C11 tem C122. b s ALL ECH nes eg ple N m mus gr pe 9 s bry PES a RR Rre la ETD nl ed Sp Figure 1 Polmaddie3 Board O Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 Finding Your Way Around OSCILLATOR SOCKET TOP IO HEADER LEFT IO HEADER CPLD 0000 2 e e KS iz z PUSH BUTTON SWITCHES f eni RIGHT IO HEADER sch k c z H 12 USER LEDS USB INTERFACE DEVICE POWER JACK JTAG CONNECTOR USB CONNECTOR Figure 2 Polmaddie3 Features O Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 Getting Started Your Polmaddie3 will be supplied pre programmed with a traffic lights test design The test design will allow the user to determine that the LEDs and the push button switches of the Polmaddie3 board are working To use this test you must do the following 1 Apply power to the Polmaddie3 board either by connecting a 5V power supply to the 2 1mm jack socket or by plugging a cable into the USB socket either from a USB power supply adapter or a PC The current consumed by the Polmaddie3 running the test program is approximately 60mA 2 The LEDs should light in a traffic lights sequence There is also a green Power indicator LED which will light to show that power is present and the 3 3 V regulator is working 3 Press SVV1 This is the left Push Button switch The traffic lights sequence will pause while the switch is activated a
3. The programming of the CPLD on Polmaddie3 can be achieved using the XILINX ISE tool iMPACT It is anticipated that a JTAG connection will be used in conjunction with this software There is a single YTAG chain on Polmaddie3 which allows the programming of the FPGA sm Li ni N he PIN14 PIN1 JTAG CONNECTOR CPLD The JTAG connector has a layout as follows GND GND GND GND in NC pin14 NC TDI Using the Xilinx IMPACT software the JTAG chain appears like this TDI xc3s50an bypass TDO Figure 9 Polmaddie3 JTAG CHAIN Generation of suitable but files and control of the JTAG chain can be achieved using the XILINX ISE tool IMPACT The bit file can be used to program the FPGA only or the FPGA and its internal flash memory O Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 15 Mechanical Arrangement Dimensions are in millimetres The three 40 way connectors are arranged on a 0 1 inch grid relative to eachother 66000600000 000000000 Issue 1 0 ooo FE LEDS ms Len F 10 m FD2 LED LED4 FO3 4 us ver sizene uk c 2009 Enterpolnt Ltd Figure 10 Polmaddie3 Mechanical Arrangement O Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 16 Medical and Safety Critical Use Polmaddie3 boards are not authorised for the use in or use in the design of medical or other safety critical systems without the express written person of the Board of Enterpo
4. 18 20 OV 19 1011 129 20 OV 19 1051 92 20 OV 21 1030 16 22 OV 21 1010 127 22 OV 21 1050 91 22 OV 23 1029 15 24 OV 23 9 126 24 OV 23 1049 90 24 OV 25 1028 13 26 OV 25 108 125 26 OV 25 1048 88 26 OV 27 1027 12 28 OV 27 107 121 28 OV 27 1047 87 28 OV 29 1026 11 30 OV 29 106 120 30 OV 29 1046 86 30 OV 31 1025 10 32 OV 31 105 117 32 OV 31 1045 84 32 OV 33 1024 8 34 OV 33 104 116 34 OV 33 1044 83 34 OV 35 1023 7 36 OV 35 103 115 36 OV 35 1043 82 36 OV 37 1022 6 38 OV 37 102 114 38 OV 37 1042 76 38 OV 39 1021 5 40 OV 39 lO1 113 40 OV 39 1041 75 40 OV Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 10 FPGA The main device on the Polmaddie3 is the Xilinx Spartan3 XC3S50AN 4TQG 144C which has 50 000 gates and 1Mbit internal flash memory for configuration OSCILLATOR The single oscillator socket on Polmaddie3 supports a 3 3V 8 pin DIL outline oscillator This clock signal is routed directly through to the CPLD on pin 124 vvhich is a global clock input OSCILLATOR SOCKET PIN1 C10 Mat os Zem DROGEN enc tn C12 ETH EMT TU MT TO st 04 ua MM RI N 4 u SR RB 36 www enterpoint cok 2009 Duerpoht Lid ih wl Mi 1 A VI iV wcLo Figure 5 Polmaddie3 Oscillator O Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 LEDs Polmaddie3 has 13 LEDS LED 13 i
5. dichip com When appropriate drivers are installed the Polmaddie3 USB port should be detected as a serial port Alternative data optimised drivers are also available from FTDI The FT232R is connected to the FPGA and provided a simple UART or other converter is implemented then the data sent over the USB serial port can be used either as control and or data information This allows a host computer to act in a number of vvays including system control and data storage functions The FT232R can also supply a clock to the FPGA using CBUS4 I O This VO can be programmed by tools available from FTDI to output different freguencies or other functions The FT232R can provide clock frequencies of 6 12 24 48MHz The connections between the USB device and the FPGA are shown below FT232R FPGA PIN CBUS4 USB CLOCK 54 CTS 46 DCD 47 DSR 48 RIH 55 RTS 60 DTR 68 TXD 69 RXD 57 The FT232R connections CBUSO to CBUS3 are routed via a resistor array site RA2 resistor array not fitted to the JTAG connector for future use in reconfiguring the FPGA via a USB interface a scenario which is theoretically possible but not so far established These connections were the resistor array to be fitted would be as shown below FT232R JTAG SIGNAL CBUSO TMS CBUSI TCK CBUS2 TDI CBUS3 TDO Enterpoint Ltd Polmaddie3 Manual Issue 1 0 15 06 2010 14 Programming Polmaddie3
6. int If such use is allowed the said use will be entirely the responsibility of the user Enterpoint Ltd will accepts no liability for any failure or defect of the Polmaddie3 board or its design when it is used in any medical or safety critical application Warranty Polmaddie3 comes with a 90 return to base warranty Enterpoint reserves the right not honour a warranty if the failure is due to maltreatment of the Polmaddie3 board Outside the warranty period Enterpoint offers a fixed price repair or replacement service We reserve the right not to offer this service where a Polmaddie3 has been maltreated or otherwise deliberately damaged Please contact support if need to use this service Other specialised warranty programs can be offered to users of multiple Enterpoint products Please contact sales on boardsales enterpoint co uk if you are interested in these types of warranty Support Enterpoint offers support during normal United Kingdom working hours 9 00am to 5 00pm Please examine our Polmaddie3 FAQ web page and the contents of this manual before raising a support query VVe can be contacted as follovvs Telephone 44 0 121 288 3945 Email support enterpoint co uk Enterpoint Ltd Polmaddie3 Manual Issue 1 0 15 06 2010
7. nd continue when the switch is released 4 Press SW2 This is the right Push Button switch The traffic lights sequence will pause while the button is activated and restart from the beginning of the sequence when the switch is released Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 Polmaddie3 Features Power Input Polmaddie3 is powered either by connecting a 5V power supply to the 2 1mm jack socket or by plugging a cable into the USB socket either from a USB power supply adapter or a PC The 5V supply is used to power the USB interface and to supply two regulators one producing 1 2V for the FPGA core and the other producing 3 3V to power the FPGA IOs the LEDs and the oscillator 3 3V is also available on pin 2 of each of the IO headers If you decide to use this as a source of power for external circuitry please remember that the maximum total power available from the 3 3V Regulator is 1 Amp TOP IO HEADER PIN2 we Polmaddie3 0000 Olm gt RIGHT IO HEADER PIN2 2 REGULATORS LEFT IO HEADER PIN2 POWER JACK USB CONNECTOR Figure 3 Polmaddie3 Power Supply Features ARNING THE REGULATORS MAY BECOME HOT IN NORMAL OPERATION ALONG WITH THE BOARDS THERMAL RELIEF PLEASE DO NOT TOUCH OR PLACE HIGHLY FLAMABLE MATERIALS NEAR THESE DEVICES WHILST THE POLMADDIEI1 BOARD IS IN OPERATION Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 10 Headers PIN2 PIN40 TOP IO HEADER PIN1 PIN39
8. pg ON URA PEL z d EEN Polmaddie3 We PIN40 d n ca 0000 A d BIND LI RIGHT IO HEADER PIN2 PIN40 PIN1 PIN39 Figure 4 Polmaddie3 Headers The three 40 pin IDC Headers provide a simple mechanical and electrical interface for external signal inputs The connectors on this header are on a 0 linch 2 54mm pitch and allow other electronic circuitry or user designed add on boards to be connected The headers each have 20 IOs routed to the CPLD These are NOT 5V tolerant the maximum input voltage should be limited to 3 3V They each also have a permanent positive povver pin on pin 2 and 19 permanent OV connections as shown below O Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 LEFT HEADER TOP HEADER RIGHT HEADER FPGA FPGA FPGA PIN USE PIN PIN USE PIN USE PIN PIN USE PIN USE PIN PIN USE 1 1040 30 2 3 3V 1 1020 142 2 1 1060 105 2 3 3V 3 1039 29 4 OV 3 1019 141 4 OV 3 1059 104 4 OV 5 1038 28 6 OV 5 1018 139 6 OV 5 1058 103 6 OV 7 1037 27 8 OV 7 IO17 138 8 OV 7 11057 102 8 OV 9 1036 29 10 OV 9 1016 135 10 OV 9 1056 101 10 OV 11 1035 24 12 OV 11 1015 134 12 OV 11 1055 99 12 OV 13 1034 21 14 OV 13 1014 132 14 OV 13 1054 98 14 OV 15 1033 20 16 OV 15 10131 131 16 OV 15 1053 96 16 OV 17 1032 19 18 OV 17 1012 130 18 OV 17 1052 93 18 OV 19 1031
9. s a green power indicator LED and indicates the presence of the 3 3V supply It cannot be controlled by the CPLD LEDs 1 to 12 are arranged in 4 blocks of three each block having one red one orange and one green LED This means they can be used to simulate traffic lights They are all controlled by the CPLD They connect to the CPLD as shown below 2201 4 GREEN LED7 42 GREEN LED2 3 ORANGE LED8 32 ORANGE LED3 58 RED LED9 31 RED LED4 110 GREEN LED10 77 GREEN LEDS 111 ORANGE LED11 78 ORANGE LED6 112 RED LED12 79 RED LED13 LED3 LED6 LED2 LEDS 1201 LED4 LED7 LED10 LED8 LED11 LED9 LED12 Figure 6 Polmaddie3 LEDs O Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 12 Switches Polmaddie3 has two push button switches to use these switches the TO pins connected to the switches must have a pull up resistor setting in the constraints file This means that when a switch is activated alow level signal will be detected on the FPGA pin The two switches are connected to the following IO pins 49 70 00 Romaddies 0000 S Dese B deer gt H H TIETE SWITCH2 SVVITCH1 Figure 7 Polmaddie3 Switches O Enterpoint Ltd Polmaddie3Manual Issue 1 0 15 06 2010 USB Interface The USB interface on the Polmaddie3 is achieved using an FT232R USB to serial UART interface The datasheet and drivers for this device are available from http www ft
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