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1. 80 01 30 PIO D24 24 x D I O 80 01 40 PIO 823 Multi function 80 03 00 PIO 821 Multi function 80 03 10 PIO DA16 16x D A 80 04 00 PIO DA8 8 x D A 80 04 10 PIO DA4 4x D A 80 04 20 PISO C64 64 x isolated D O 80 08 00 PISO P64 64 x isolated D I 80 08 10 PISO P32C32 32 32 80 08 20 PISO P8R8 8 x isolated D I 80 08 30 8 x 220V relay PISO P8SSR8AC 8 x isolated D I 80 08 30 8 x SSR AC PISO P8SSR8DC 8 x isolated D I 80 08 30 8 x SSR PISO 730 16x DI 80 08 40 16 xD O 16 x isolated D I 16 isolated D O PISO 813 32 x isolated A D 80 OA 00 PISO DA2 2 x isolated D A 80 OB 00 Version 2 1 Date 1999 10 Page 21 PIO D144 User s Manual 3 1 1 Driverlnit PIO DriverlInit amp wBoards wSubVendor wSubDevice wSubAux e wBoards 0 to gt Number of boards found in this PC e wSubVendor gt SubVendor ID of board to find e wSubDevice gt SubDevice ID of board to find e wSubAux gt SubAux ID of board to find This function can detect all PIO PISO series card in the system It is implemented based on the PCI Plug amp Play mechanism 1 It will find all PIO PISO series cards installed in this system amp save all their resource in the library Find all PIO PISO in this PC Step 1 Detect all PIO PISO series in this PC wRetVal PIO_DriverInit amp wBoards Oxff Oxff Oxff Find all PIO PISO printf nThrer are d PIO PISO Cards in this PC wBoards if wBoards 0 exit 0 Step2 Sav
2. wlrq gt allocated IRQ channel number of this board e wSubVendor gt subVendor ID of this board e wSubDevice gt subDevice ID of this board e wSubAux gt subAux ID of this board e wsSlotBus gt hardware slot ID1 of this board wSlotDevice gt hardware slot ID2 of this board The user can use this function to save resource of all PIO PISO cards installed in this system Then the application program can control all functions of PIO PISO series card directly Find the configure address space of PIO D144 Step1 Detect all PIO D144 cards first wSubVendor 0x80 wSubDevice 0x01 wSubAux 0x00 for PIO D144 wRetVal PIO DriverInit amp wBoards wSubVendor wSubDevice wSubAux printf Threr are d PIO D144 Cards in this PC n wBoards Step2 Save resource of all PIO D144 cards installed in this PC for i20 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wlrq amp t1 amp t2 amp t3 amp t4 amp t5 printf nCard_ d wBase x wIrq x i wBase wlrq wConfigSpace i 0 wBaseAddress save all resource of this card wConfigSpace i 1 wlIrq save all resource of this card Step3 Control the PIO D144 directly wBase wConfigSpace 0 0 get base address the card_0 outp wBase 1 enable all D I O operation of card 0 wBase wConfigSpace 1 0 get base address the card 1 outp wBase 1 enable all D IJO operation of card 1 Version 2 1 Da
3. ananasa Version 2 1 Date 1999 10 Page 45 PIO D144 User s Manual printf Sn for i 1 i 0x80 i i 1 printf nCN4 PA 02xH PB 02xH PC 02xH press to stop i i i outp Act IOPCR CNA PA outp RW 8BitDR i outp Act IOPCR CNA PB outp RW 8BitDR i outp Act IOPCR CNA PC outp RW 8BitDR i sleep 1 outp IO_SCR2 0x00 printf Mn for i 21 i 0x80 i i 1 printf nCN5 PA 02xH PB 02xH PC 02xH press to stop i i i outp Act_IOPCR CN5_PA outp RW 8BitDR i outp Act IOPCR CN5 PB outp RW 8BitDR i outp Act IOPCR CN5 PC outp RW 8BitDR i sleep 1 printf Nn for 1 1 1 lt 0 80 1 1 lt lt 1 printf nCN6 PA 02xH PB 02xH PC 02xH press to stop i i i outp Act_IOPCR CN6_PA outp RW 8BitDR i outp Act IOPCR CNO PB A A AA anasa outp RW 8BitDR i outp Act IOPCR CN6 PC outp RW 8BitDR i sleep 1 if 1 0 80 1 0 01 break if kbhit 0 c getch if 4 0 27 return end of while PIO_DriverClose Page 46 Version 2 1 Date 1999 10 PIO D144 User s Manual 4 8 Demo10 Find Card Number demo 10 Find card number step 1 run demol0 exe step 2 connect a 50 pin flat cable to CON2 amp CON3 of card_ step 3 The card number is shown in screen as TEST OK include PIO H WORD wBase wIrqg WORD
4. if qo int c amp 0x01 0 cc new int state amp 0x01 if cc 0 CNT_H1 invert invert 1 int_c amp 0x02 0 cc new int state amp 0x02 if cc 0 CNT_H2 invert invert 2 int_c amp 0x04 0 cc new int state amp 0x04 if cc 0 CNT_H3 invert invert 4 int c amp 0x08 0 cc new int state amp 0x08 if cc 0 CNT_H4 invert invert 8 else else else else now_int_state new_int_state outp wBase 0x2a invert TE CNT_L1 CNT_L2 CNT_L3 CNT_L4 wIrq gt 8 outp A2 8259 0x20 outp A1 8259 0x20 4 7 DEMO 6 Outport of CN1 CN6 demo 6 D O demo step 1 connect a DB 24C to CN1 of PIO D144 step 2 run DEMO6 EXE step 3 check the LED s of DB 24C will turn on sequentially include PIO H Page 44 Version 2 1 Date 1999 10 Ay S 27 Ay p PIO D144 User s Manual include PIO D144 H int main int i char c WORD wBoards WORD wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice clrscr PIO DriverInit amp wBoards 0x80 0x01 0x00 for PIO D144 printf Mn 1 Threr are d PIO D144 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf 1 There are no PIO D144 card in this PC n exit 0 printf n 2 The Configuration Space gt wBase for i 0 i lt wB
5. No No Yes ADP 37 PCI No Yes Yes ADP 50 PCI No Yes No DB 24P No Yes No DB 24PD No Yes Yes DB 16P8R No Yes Yes DB 24R No Yes No DB 24RD No Yes Yes DB 24C Yes Yes Yes DB 24PR Yes Yes No Db 24PRD No Yes Yes DB 24POR Yes Yes Yes DB 24SSR No Yes Yes Version 2 1 Date 1999 10 Page 17 PIO D144 User s Manual 2 Pin Assignment CN1 37 PIN of D type female connector ie 2 a ee lt gt 5 pps p pcs 6 pau ps Pa 7 _ 26 PCS 0 pr Po o Bl pc iwo po u o a o mH l6 NC ps pA ND Bp o pe po All signals are TTL compatible Page 18 Version 2 1 Date 1999 10 PIO D144 User s Manual CN2 CN3 CN4 CN5 CN6 50 PIN in of flat cable connector P p 7 GND Do NEN b pc 1 5B m GND ae UA GND 0 GND PB6 2 GND PBS 2 pP E PBO B2 PAS d EN A U 09 OHNE pu Version 2 1 Date 1999 10 Page 19 PIO D144 User s Manual 3 Control Register 3 1 How to Find the I O Address The plug amp play BIOS will assign a proper I O address to every PIO PISO series card in the power on stage The fixed IDs of PIO PISO series card are given as following e Vendor ID E159 e Device ID 0002 The sub IDs of PIO D144 are given as fol
6. O demo for 1 CN6 step 1 connect a DB 24C to CN1 CN6 of PIO D144 step 2 run DEMO2 EXE step 3 check the LED s of DB 24C will turn on sequentially include PIO H int main int 1 9 WORD wBoards wRetVal WORD wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice chiar clrscr PIO DriverInit amp wBoards 0x80 0x01 0x00 for PIO D144 printf Mn 1 Threr are d PIO D144 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf 1 There are no PIO D144 card in this PC n exit 0 printf n 2 The Configuration Space gt wBase for i 0 i lt wBoards i PIO GetConfigAddressSpace 1 amp wBase amp amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard Sd wBase x subID x x 6K SlotID x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice select card 0 PIO GetConfigAddressSpace 0 amp wBase amp wIrg amp wSubVendor amp wSubDevice amp WSubAux amp wSlotBus amp wSlotDevice step 1 make sure which ports are D O ports in this demo all D O ports are output port step 2 enable all D I O port outp 1 enable D I O step 3 select the active port step 4 send initial value to D O latch register of active port step 5 repeat for
7. dealer from whom you purchased the product Save the shipping materials and carton in case you want to ship or store the product in the future Version 2 1 Date 1999 10 Page 3 PIO D144 User s Manual iguration Hardware conf 2 Board Layout 2 1 CN1 PA CN1 PB CN1 PC CN2 PA CN3 PA CN4 PA CN2 PB CN3 PB CN4 PB CN2 PC PC CN4 PC DB 37 PIN 50 PIN 50 PIN 50 PIN PIO D144 Date 1999 10 Version 2 1 Page 4 PIO D144 User s Manual 2 2 I O Port Location There are eighteen 8 bit I O ports in the PIO D144 Every I O port can be programmed as D I or D O port When the PC is first power on all eighteen ports are used as D I port The I O port location is given as following Connector of PIO D144 PAO to PA7 PBO to PB7 PCO to PC7 CNI PA PB PC CN2 CN2 PA CN2 PB CN2 PC CN3 CN3 PA CN3 PB CN3 PC CN4 CN4_PA CN4_PB CN4_PC CN5 CN5 PA CN5 PB CN5 PC CN6 CN6 PA CN6 PB CN6 PC Refer to Sec 2 1 for board layout amp I O port location Note PCO PC1 PC2 PC3 of CNI can be used as interrupt signal source Refer to Sec 2 5 for more information 2 3 Enable Operation When the PC is first power on all operation of D I O port are disable The enable disable of D I O is controlled by the RESET signal Refer to Sec 3 3 1 for more information about RESET signal The power on states are given as following e All D I O operatio
8. wBoards wRetVal WORD wBase wirq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice int main int 15k char c Glrscer PIO DriverInit amp wBoards 0x80 0x01 0x00 for PIO D144 printf Mn 1 Threr are Sd PIO D144 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf 1 There are no PIO D144 card in this PC n exit 0 printf 2 The Configuration Space gt wBase for i 0 i wBoards i PIO GetConfigAddressSpace 1 amp wBase amp amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard Sd wBase x wIrq x subID x x x SlotID x x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice PIO_GetConfigAddressSpace 0 amp wBase amp amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice for printf Mn press any key to stop Ts for i20 i wBoards i test card i delay ms 1000 delay 1 sec if kbhit 0 getch break PIO_DriverClose test_card int card int i j k ok val PIO GetConfigAddressSpace card amp wBase amp wIrg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice outp 1 enable D I O Version 2 1 Date 1999 10 Page 47 PIO D144 User s Manual ok 1 outp 0 8 0x00 CN2 PA is o
9. wIrg setvect wIrg 8 service else irqmask inp A1_8259 1 outp A1_8259 1 irgmask amp Oxfb IRQ2 outp A1_8259 1 irqmask amp Oxff 1 lt lt wIrq irqmask inp A2 825941 outp A2_8259 1 irqmask amp Oxff 1 lt lt wIrq 8 setvect wIrq 8 0x70 irq service outp wBaset5 1 enable interrupt E now_int_state 1 now int_signal is low outp wBase 0x2a 1 select the inverte input enable void interrupt irq service if now_int_state 0 find a high_pulse here outp wBase 0x2a 1 select the inverte input now int state 1 now int signal is High else COUNT find a low_pulse outp 0 2 0 select the non inverte input now_int_state 0 now int_signal is High t if gt 8 outp A2 8259 0x20 outp A1 8259 0x20 Refer to Sec 2 5 2 for more information Version 2 1 Date 1999 10 Page 41 PIO D144 User s Manual 4 6 Demod Interrupt demo3 demo 5 four interrupt source CN1 PCO initial Low active High he CN1 PC1 initial High active Low CN1 PC2 initial Low active High CN1 initial High active Low step 1 run demo5 exe include PIO H define A1 8259 0x20 define A2 8259 OxAO define EOI 0x20 WORD init_low WORD wBase wIrqg tatic void interrupt irq_service nt irqmask now int state inver
10. 01 0 00 printf n 1 Threr are d PIO D144 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf 1 There are no PIO D144 card in this PC n exit 0 printf n 2 Show the Configuration Space of all PIO D144 for i 0 i wBoards i PIO GetConfigAddressSpace i amp wBase amp wIrg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard Sd subID x x SlotID x x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice select card 0 PIO GetConfigAddressSpace 0 amp wBase amp wIrg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf n 3 Card 0 wBaseAddr x wBaseAddr COUNT 0 outp wBaset 0xc8 to CN2 port are all input printf n 4 show the count of High_pulse n init_high for printf nCOUNT d COUNT if kbhit 0 getch break Page 40 Version 2 1 Date 1999 10 PIO D144 User s Manual outp wBaset5 0 disable all interrupt PIO_DriverClose A Use PCO as external interrupt signal WORD init high DWORD dwVal disable outp wBaset5 0 disable all interrupt if wIrq lt 8 irqmask inp A1_8259 1 outp A1_8259 1 irqmask amp Oxff 1 lt lt
11. 4C DB 24PR 24 x power relay 5A 250V DB 24POR 24 x Photo MOS relay 0 1 350 DB 24C 24 x open collector 100mA per channel 30V max The DB 24PR 24 channel power relay output board consists of 8 form C and 16 form A electromechanical relays for efficient switching of load programmed control The contact of each relay can control a 5A load at 250ACV 30VDCV The relay is energized by applying a 5 voltage signal to the appropriate relay channel on the 20 pin flat cable connector just used 16 relays or 50 pin flat cable connector OPTO 22 compatible for DIO 24 series Twenty four enunciator LEDs one for each relay light when their associated relay is activated To avoid overloading your PC s power supply this board needs a 12VDC or 24VDC external power supply Normal Open From A Relay COM 50 Pin cable PIO D144 Note 50 Pin connector OPTO 22 compatible for DIO 24 DIO 48 DIO 144 PCI D144 PIO D144 PIO D96 PIO D56 PIO D48 PIO D24 20 Pin connector for 16 channel digital output A 82X A 62X DIO 64 ISO DA16 DA8 Channel 16 Form A Relay 8 Form C Relay Relay switching up to 5A at 110ACV 5A at 30DCV if DB 24PR Hil Page 16 Version 2 1 Date 1999 10 PIO D144 User s Manual 2 6 8 Daughter Board Comparison Table 20 pin flat cable 50 pin flat cable D sub 37 pin DB 37 No No Yes DN 37
12. I O port can be programmed as D I or D O port When the PC is first power on all eighteen ports are used as D I port The I O port location is given as follows Connector of 144 PAO to PA7 PBO to PB7 PCO to PC7 CNI PA CN1_PB CN1_PC CN2 CN2_PA CN2_PB CN2_PC CN3 CN3_PA CN3_PB CN3_PC CN4 CN4_PA CN4_PB CN4_PC CN5 CN5 PA CN5 PB CN5 PC CN6 CN6 PA CN6 PB CN6 PC outp wBase 0xc8 0 CN1_PA PB PC to CN2_PA PB PC are all D O port outp wBase 0xcc 0x3f CN3_PA PB PC to CN4_PA PB PC are all port outp wBase 0xd0 0x38 CN5_PA PB PC are all D O port CN6 PA PB PC are all port Refer to Sec 2 2 for I O Port Location Version 2 1 Date 1999 10 Page 31 PIO D144 User s Manual 4 Demo Program There are about 5 demo program given in the DOS floppy disk or CD ROM The program sources of library amp demo program are all given in the disk These demo program will help the user to solve their real world problem more easy Page 32 TC LARGE TC LARGE LIB TC LARGE DEMO TC LARGE LIB PIO H TC LARGE LIB PIO C TC LARGE LIB A BAT TC LARGE LIB B BAT TC LARGE LIB PIO LIB TC LARGE DEMOI PIO H TC LARGE DEMO1 DEMO1 C gt for Turbo C 2 xx or above gt for large model gt for library source code gt demo program source code gt library header file gt library source file gt compiler file gt link file
13. MOL iit cs Enea RR SER TR ERO AN EG SERIE RARE dea leenen 38 4 5 DEMO4 INTERRUPT See ati 40 4 6 DEMOS INTERRUPT DEM J 42 4 7 DEMO 6 QUTPORT OF CN T CNO s o get obit epe ge petes 44 4 8 DEMOIO FIND CARD NUMBER esee eere nennen 47 Page 2 Version 2 1 Date 1999 10 PIO D144 User s Manual 1 Introduction The PIO D144 consists of one DB 37 amp five 50 pin flat cable connectors There are three 8 bit port PA PB amp PC in each connector Every port consists of 8 bit programmable D I O So the PIO D144 can provide 144 channels of TTL compatible D I O 1 1 specifications e PC compatible PCI bus e One DB 37 connector and five 50 pin flat cable connectors e Each port consists of three 8 bit port PA PB amp PC in every connector e Each port can be programmed as or D O independently e Each board 6 connector 6x3 port 6x3x8 bit 2144 bit e 4 interrupt sources PCO PCI PC2 PC3 e All signals are TTL compatible e Operating Temperature 0 C to 60 C e Storage Temperature 20 C to 80 C e Humility 0 to 90 non condensing e Dimension 180mm X 105mm Power Consumption 5V 1100mA 1 2 Product Check List In addition to this manual the package includes the following items e PIO D144 card e Demo program diskette Attention If any of this items is missing or damaged contact the
14. NT L3 CNT H3 CNT LA4 CNT int num if kbhit 0 getch break outp wBase 5 0 disable all interrupt PIO DriverClose x7 Use PCO as external interrupt signal WORD init_low DWORD dwVal disable outp wBase 5 0 disable all interrupt if wIrq lt 8 irqmask inp A1_8259 1 outp Al 8259 1 irgmask amp Oxff 1 lt lt wIrq setvect wIrg 8 service else irgmask inp Al 8259 1 outp A1_8259 1 irgmask amp Oxfb IRQ2 outp A1_8259 1 irqmask amp Oxff 1 lt lt wIrq irqmask inp A2 825941 outp A2 8259 1 irgmask amp Oxff 1 lt lt wIrq 8 setvect wIrq 8 0x70 service invert 0x05 outp wBase 0x2a invert CN1 PCO non inverte input F CN1_PC1 inverte input CN1_PC2 non inverte input CN1 non inverte input now int state 0x0a Now CN1 PCO low CN1 PC1 high LE CN1_PC2 low CN1_PC3 high CNT_L1 CNT_L2 CNT_L3 CNT_L4 0 low pulse count CNT_H1 CNT_H2 CNT_H3 CNT_H4 0 high pulse count int_num 0 outp wBase 5 0x0f enable interrupt 1 2 of 1 enable void interrupt irg service char cc int_num new_int_state inp 0 07 amp Oxff int_c new_int_state now int state Version 2 1 Date 1999 10 Page 43 PIO D144 User s Manual if if
15. O 0xAA PBO PB1 PB2 PB3 PB4 PB5 PB6 PB7 PCO 1 2 PC4 PC5 PC6 PC7 PIO D144 User s Manual 5 This demo program is designed for CN1 CN6 The user can install DB 24C into CN1 CN6 of PIO D144 This demo will request the user to input a number K as following If the DB 24C is installed in gt key in 0 If the DB 24C is installed in CN2 gt key in 3 If the DB 24C is installed in CN3 gt key in 6 If the DB 24C is installed in CN4 gt key in 9 If the DB 24C is installed in CN5 gt key in 12 If the DB 24C is installed in CN6 gt key in 15 Then this demo program will test D O of PA PB PC sequentially Version 2 1 Date 1999 10 Page 37 PIO D144 User s Manual 4 4 Demos Interrupt demot demo 3 count high pulse of CN1_PCO initial Low amp active High step 1 run demo3 exe Ri include PIO H define Al 8259 0x20 define A2 8259 OxAO define EOI 0x20 WORD init_low tatic void interrupt irq_service nt COUNT irqmask now int state ORD wBase wIrqg zou nt main i int WORD wBoards wRetVal WO D RD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice har c WORD dwVal PIO DriverInit amp 0 80 0 01 0 00 printf n 1 Threr are d PIO D144 Cards in this PC wBoards if wBoards 0
16. PIO D144 User s Manual Warranty All products manufactured by ICP DAS are warranted against defective materials for a period of one year from the date of delivery to the original purchaser Warning ICP DAS assume no liability for damages consequent to the use of this product ICP DAS reserves the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use nor for any infringements of patents or other rights of third parties resulting from its use Copyright Copyright 1999 by ICP DAS All rights are reserved Trademark The names used for identification only maybe registered trademarks of their respective companies Version 2 1 Date 1999 10 Page 1 PIO D144 User s Manual Tables of Contents 1 INTRODUCTION AE 3 2 HARDWARE CONFIGURATION s sscssssesssssssessssssscscssssscssssssscsccssssescsssessesssssssssessesssssesessess 4 Z4 BOARD LAYOUT fu iiti ere eee 4 2 2 J O PORTLOCATION eat ERES UNSERE AREE 5 2 3 ENABLE VO OPERATION i iie ore et ER cused ane Soa EROR ca esee p 5 244 JDVI O ARGHITECEURE ote E eR QA dass ieaada 6 2 2 INTERRUPT OPERATION asus e isseee eese eene an nena eene a sore 7 2 65 DAUGHTER BOARDS atio een ROC eR RR ERO ORE RT V a Een 12 2 7 PIN ASSIGNMENT de eade denk
17. all D O ports for i20 i 18 i outp 0 4 1 select CN1 to CN6 port outp wBase 0xc0 0 set 8 bit D O latch register step 6 configure all I O port outp wBase 0xc8 0x00 to CN2 port are all output outp wBase 0xcc 0x00 CN3 to CN4 port are all output outp wBase 0xd0 0x00 CN5 to CN6 port are all output Page 36 Version 2 1 Date 1999 10 K 0 1 2 key in CN2 K 3 4 5 key in CN3 K 6 7 8 key in CN4 K 9 10 11 gt key in CN5 K 12 13 14 gt key in CN6 15 16 17 key in printf nk scanf d amp k for jj k jj Gt tk 3 ou tp wBase 0xc4 jj printf nSelect Port d jj outp wBase 0xc0 0x55 printf D O 0x55 getch outp wBase 0xc0 0xAA printf D O 0xAA getch outp 0 0 0 1 getch outp wBase 0xc0 0x2 getch outp 0 0 0 4 getch outp wBase 0xc0 0 8 getch outp wBase 0xc0 0x10 getch outp wBase 0xc0 0x20 getch outp wBase 0xc0 0x40 getch outp wBase 0xc0 0x80 getch PIO_DriverClose OMO WO 7 Je P PA PB PC select the active port 1 2 PA6 PA7 0 0 55 D
18. e program All these four falling edge amp rising edge can be detected by DEMOS C Note when the interrupt is active the user program has to identify the active signals These signals maybe active at the same time So the interrupt service routine has to service all active signals at the same time Page 10 Version 2 1 Date 1999 10 PIO D144 User s Manual void interrupt irq service char cc int_numt 1 Read interrupt signal status new int state inp wBaset0x07 amp O0Oxff 2 Find the active signal int int state now int state 3 IF PCO is active if int c amp 0x01 0 cc new int state amp 0x01 if cc 20 CNT_H1 else CNT_L1 invert invert 1 4 IF 1 is active if int c amp 0x02 0 cc new int state amp 0x02 if cc 0 CNT_H2 else CNT_L2 invert invert 2 5 IF PC2 is active if int c amp 0x04 0 cc new int state amp 0x04 if cc 0 CNT_H3 else CNT_L3 invert invert 4 6 IF PC3 is active if int c amp 0x08 0 cc new int state amp 0x08 if cc 0 CNT_H4 else CNT_L4 invert invert 8 now int state new int state outp wBase 0x2a invert if wIrq gt 8 outp A2 8259 0x20 tp A1_ 8259 0x20 Version 2 1 Date 1999 10 Page 11 PIO D144 User s Manual 2 6 Daughter Boards 2 6 1 DB 37 The DB 37 is a general purpose daught
19. e resource of all PIO ISO cards installed in this PC printf n y for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wlrq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wIrq x subID x 96x 96x SlotID x x i wBase wlIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux Find all PIO D144 in this PC Step1 Detect all PIO D144 cards first wSubVendor 0x80 wSubDevice 0x01 wSubAux 0x00 for PIO_D144 wRetVal PIO DriverInit amp wBoards wSubVendor wSubDevice wSubAux printf Threr are d PIO D144 Cards in this PC n wBoards Step2 Save resource of all PIO D144 cards installed in this PC for i20 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wlrq amp wID1 amp wID2 amp wID3 amp wID4 amp wID5 printf nCard_ d wBase x wIrq 96x i wBase wlrq wConfigSpace i 0 2wBaseA ddress save all resource of this card wConfigSpace i 1 wlIrq save all resource of this card Page 22 Version 2 1 Date 1999 10 PIO D144 User s Manual 3 1 2 PIO GetConfigAddressSpace PIO_GetConfigAddressSpace wBoardNo wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice e wBoardNo 0 to gt totally N 1 boards found by Drivelnit e wBase gt base address of the board control word
20. ende ndn eel 18 J CONTROL REGISTER 20 3 1 HOW TO FIND THE I O ADDRESS cissi eite rites ee 20 3 1 1 er 22 3 12 GetConfigAddressSpace ennen envenvenvenvenneeneenvenvenvenvenvenveenenneenvenvenvenvenvenn 23 3 13 Show PIO PO ase RR ERE ERE lee etend 24 3 2 THE ASSIGNMENT OF I O ADDRESS venne ennsevenseenneerenseenneerenseennserenseenneerenseenneevenseenneerenseenn 25 3 3 FHEMO ADDRESSMAP iiec i E oet RR ON Fe Fe ER ERI e aves PAR HE CR A Se EROR 27 3 3 1 Control Register ettet ertt decente 27 3 3 2 AUX Control Register iso aee e e dete e Re Seb o ade eei 26 J3 9 3 AUX data Register ose nde e e t de edet e e eee 26 3 34 INT Mask Control Register ico e e cet e arc rena 26 3 3 2 AW Status Register ies olet eR eben eee ete 29 3 3 6 Interrupt Polarity Control Register eese eerte nennen eene 29 3 3 7 Read Write 8 bit data Register ocetne aeei enne nennen eene 30 3 3 8 Active I O Port Control Register eese eene nennen eene 30 3 3 0 I O Selection Control Register essent rennen rennen ene 31 4 PROGRAM 6 32 4 ass EUR RAM 33 42 DEMOLUSED O OF CN x3 ccce ee IR FER te eaten 34 4 3 DEMO2 USE D O OF CN1 CN 36 4 4 DEMOS INTERRUPT DE
21. er board for D sub 37 pins It is designed for easy wire connection 37 PIN cable 2 6 2 DN 37 amp DN 50 The DN 37 is a general purpose daughter board for DB 37 with DIN Rail Mounting The DN 50 is designed for 50 pin flat cable header They are designed for easy wire connection Both have Din Rail mounting H 3 1 Wis o popi s a dm ex eT LLON Tt 2 6 3 DB 8125 The DB 8125 is a general purpose screw terminal board It is designed for easy wire connection There are one DB 37 amp two 20 pin flat cable header in the DB 8125 DB 8125 for DB 37 or 20 pin flat cable header Page 12 Version 2 1 Date 1999 10 PIO D144 User s Manual 2 6 4 ADP 37 PCI amp ADP 50 PCI The ADP 37 PCI amp ADP 50 PCI are extender for 50 pin header One side of ADP 37 PCI amp ADP 50 PCI can be connected to a 50 pin header The other side can be mounted on the PC chassis as following ADP 37 PCI 50 pin header to DB 37 extender ADP 50 PCT 50 pin header to 50 pin header extender Version 2 1 Date 1999 10 Page 13 PIO D144 User s Manual 2 6 5 DB 24P DB 24PD Isolated Input Board The DB 24P is a 24 channel isolated digital input daughter board The optically isolated inputs of the DB 24P consists of a bi directional optocoupler with a resistor for current sensing You can use the DB 24P to sense DC signal from TTL levels up to 24V or use the DB 24P to sense a wide range of AC signals You can use
22. gt library file gt library header file gt demol source file TC LARGE DEMOI DEMOI PRJ TC project file TC LARGE DEMOI IOPORTL LIB gt I O port library file TC LARGE DEMOI PIO LIB gt library file TC LARGE DEMO1 DEMO1 EXE gt demol execution file Version 2 1 Date 1999 10 PIO D144 User s Manual 4 1 PIO D144 H The header file for PIO D144 card define Disable define Enable define D144 define lO SCRO define lO SCR1 define lO SCR2 define AUX CR define AUX DR define INT MCR define AUX SR define INT PCR define RW 8BitDR define ACT IOPCR define CN1 PA define CN1 PB define CN1 PC define CN2 PA define CN2 PB define CN2 PC define CN3 PA define CN3 PB define CN3 PC define PA define CN4 PB define 4 define CN5 define CN5 PB define CN5 PC define CN6_PA define CN6 PB define CN6 PC 0 1 wBase 0x00 wBase 0xc8 wBase 0xcc wBase 0xd0 wBase 0x02 wBase 0x03 wBase 0x05 wBase 0x07 wBase 0x2a wBase 0xcO 0 4 0 1 2 4 5 6 7 8 Version 2 1 Date 1999 10 Page 33 PIO D144 User s Manual 4 2 Demo1 Use D O of CN1 demo 1 D O demo X7 step 1 connect a DB 24C to CN1 of PIO D144 step 2 run DEMO1 EXE step 3 check the LEDs of DB 24C will turn on sequentially include PIO H int main int i WORD wBoards WORD wBase wirq wSubVend
23. ion 2 1 Date 1999 10 PIO D144 User s Manual Example 2 assume initial level High PCO is used as interrupt source Initial High 2 Inverted Low Y Iniaial sub now int state 1 _outpd wBase 0x2a 1 select the inverted signal ISR_subQ If now_int_state 0 old state low gt change to high now now_int_state 1 now int_signal is High d application codes are given here _outpd wBase 0x2a 1 select the inverted signal else old state high gt change to low now now_int_state 0 now int_signal is Low application codes are given here _outpd wBase 0x2a 0 select the non inverted signal if wIrq 8 outp A2 8259 0x20 outp A1_8259 0x20 x Refer to DEMOA C for source code Version 2 1 Date 1999 10 Page 9 PIO D144 User s Manual Example 3 assume CN1 PCO is initial Low active High CNI PCI is initial High active Low PC2 is initial Low active High is initial High active Low As follows CNL PCI PC2 4 PCO amp PCI are active at the same time 2 amp active at the same time PCO amp PCI return to normal at the same time 2 amp return to normal at the same time Refer to DEMOS C for sourc
24. lowing e Sub Vendor ID 80 e Sub Device ID 01 e Sub AuxID 00 We provide all necessary functions as following 1 DriverInit amp wBoard wSubVendor wSubDevice wSubAux 2 PIO GetConfigAddressSpace wBoardNo wBase wlIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice 3 Show PIO PISO wSubVendor wSubDevice wSubAux All functions are defined in PIO H Refer to Chapter 4 for more information The important driver information is given as following 1 Resource allocated information e wBase BASE address mapping in this PC wlrq IRQ channel number allocated in this PC 2 PIO PISO identification information wSubVendor subVendor ID of this board e wSubDevice subDevice ID of this board e wSubAux subAux ID of this board 3 PC s physical slot information e wSlotBus hardware slot ID1 in this PC s slot position e wSlotDevice hardware slot ID2 in this PC s slot position The utility program PIO PISO EXE will detect amp show all PIO PISO cards installed in this PC Page 20 Version 2 1 Date 1999 10 The Sub IDs of PIO PISO series card are given as follows PIO D144 User s Manual PIO PISO series Description Sub vendor Sub device Sub AUX card PIO D144 144 x D I O 80 01 00 PIO D96 96 x D I O 80 01 10 PIO D64 64 x D I O 80 01 20 PIO D56 24 x D I O 80 01 40 16 x 16 D O PIO D48 48 x
25. mp non inverted inverted CN1_PC1 signal If PC2 is active service CN1_PC2 amp non inverted inverted the CN1_PC2 signal If PC3 is active service amp non inverted inverted CN1_PC3 signal Save the new status to old status gab Que e ups oe Limitation if the interrupt signal is too short the new status may be as same as old status So the interrupt signal must be hold active until the interrupt service routine is executed This hold time is different for different O S The hold time can be as short as micro second or as long as second In general 20ms is enough for all O S Version 2 1 Date 1999 10 Page 7 PIO D144 User s Manual Example 1 assume initial level Low PCO is used as interrupt source Initial Low amp A Y Iniaial sub now int state O _outpd wBase 0x2a 0 select the non inverted signal ISR sub If now_int_state 0 old state low gt change to high now now_int_state 1 now int_signal is High application codes are given here _outpd wBase 0x2a 1 select the inverted signal else old state high gt change to low now now_int_state 0 now int_signal is Low application codes are given here _outpd wBase 0x2a 0 select the non inverted signal if wIrq 8 outp A2 8259 0x20 EOI outp A1_8259 0x20 EOI Refer to DEMO3 C for source code Page 8 Vers
26. nd the card number is to use DEM10 EXE given in DOS or WINDWS demo program This demo program will send a value to D O of CN2 and read back from D I of CN3 If the user install a 50 pin flat cable between CN2 amp CN3 the value read from D I will be the same as D O The operation steps are given as follows 1 Remove all 50 pin flat cable between CN2 and CN3 2 Install all PIO D144 cards into this PC system 3 Power on and run DEMIO EXE 4 Now all D I value will be different from D O value 5 Install a 50 pin flat cable into CN2 amp CN3 of any PIO D144 card 6 There will be one card s D I value D O value the card number is also show in screen Therefore the user can find the card number very easy if he install a 50 pin flat cable into PIO D144 one by one Page 26 Version 2 1 Date 1999 10 PIO D144 User s Manual 3 3 The I O Address The I O address of PIO PISO series card is automatically assigned by the main board ROM BIOS The I O address can also be re assigned by user It is strongly recommended not to change the I O address by user The Plug amp Play BIOS will assign proper I O address to each PIO PISO series card very well The I O address of PIO D144 are given as follows WBase 0__ RESET control register WB WWBase 2 Aux control register WBase 5 INT mask control register Same WBase 0x2a INT polarity control register WB WB INT polarity control register _ EE EE Note Refer to Sec 3 1 fo
27. ns are disable e All eighteen D I O ports are configured as port e All D O latch register are undefined refer to Sec 2 4 The user has to perform some initialization before using these D I O The recommended steps are given as following Step 1 Make sure which ports are D O ports Step 2 Enable all D I O operation refer to Sec 3 3 1 Step 3 Select the active port refer to Sec 3 3 8 Step 4 Send initial value to the D O latch register of this active port Refer to Sec 2 4 amp Sec 3 3 7 Step 5 Repeat Step3 amp Step4 for all D O ports Step 6 Configure all eighteen D I O ports to their expected D I or D O state Refer to Sec 3 3 9 Refer to DEMOI C for demo program Version 2 1 Date 1999 10 Page 5 PIO D144 User s Manual 2 4 Architecture I O select Sec 3 3 9 RESET Sec 3 3 1 disable input Latch Sec 3 3 7 D Clock input D O latch CKT disable Buffer input 566 3 3 y Clock input D I buffer CKT e The RESET 15 in Low state gt all D I O operation is disable The RESET is in High state gt all D I O operation is enable e If D I O is configured as D I port gt D I external input signal e If D I O is configured as D O port gt read back of D O e If D I O is configured as D I port gt send to D O will change the D O latch register only The D I amp external input signal will not change Page 6 Version 2 1 Date 1999 10 PIO D144 Use
28. oards i PIO GetConfigAddressSpace i amp wBase amp wIrq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard Sd subID x 3x 6K SlotID x x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice PIO_GetConfigAddressSpace 0 amp wBase amp wIrg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf n 3 Card 0 D O test wBase x wBase outp D144 Disable Reset DIO of D144 D144 Enable outp IO_SCRO 0x00 while 1 printf n for 1 1 1 lt 0 80 1 1 lt lt 1 printf nCN1 PA 02xH PB 02xH PC 02xH press to stop i i i outp Act_IOPCR CN1_PA outp RW_8BitDR i outp Act IOPCR CN1 PB outp RW 8BitDR i outp Act IOPCR CN1 outp RW 8BitDR i sleep 1 printf Nn for i 1 i 0x80 i i 1 printf nCN2 PA 02xH PB 02xH PC 02xH press Q to stop i i i outp Act IOPCR CN2 PA outp RW 8BitDR i outp Act IOPCR CN2 PB outp RW 8BitDR i outp Act IOPCR CN2 PC RW 8BitDR i sleep 1 outp IO_SCR1 0x00 printf NXNn for 1 1 1 lt 0 80 1 1 lt lt 1 printf nCN3 PA 02xH PB 02xH PC 02xH press to stop i i i outp Act IOPCR CN3 PA outp RW 8BitDR i outp Act IOPCR CN3 PB outp RW 8BitDR i outp Act IOPCR CN3 PC outp RW 8BitDR i sleep 1 anaa ananasa
29. or wSubDevice wSubAux wSlotBus wSlotDevice char c clrscr PIO DriverInit amp wBoards 0x80 0 01 0 00 for PIO D144 printf n 1 Threr are d PIO D144 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf 1 There are no PIO D144 card in this PC n exit 0 printf n 2 The Configuration Space gt wBase for i 0 i lt wBoards i PIO GetConfigAddressSpace 1 amp wBase amp amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf d wBase x wIrq x subID x x x SlotID x x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice select card 0 PIO GetConfigAddressSpace 0 amp wBase amp wIrg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf n 3 Card 0 D O test wBase x wBase step 1 make sure which ports are D O ports in this demo gt only 1_ CN1_PB 1 are D O port step 2 enable all D I O port outp wBase 1 enable D I O step 3 select the active port k outp wBase 0xc4 0 select CN1 PA step 4 send initial value to D O latch register of active port outp wBase Oxc0 0 set 1 to CN1 PA7 to 0 step 5 repeat for all D O ports outp wBaset 0xc4 1 select CN1 PB outp 0 0 0 se
30. outp Al 8259 1 irgmask amp Oxff 1 lt lt wIrq irqmask inp A2 825941 outp A2_8259 1 irqmask amp Oxff 1 lt lt wIrq 8 setvect wIrq 8 0x70 service outp 0 2 0 select the non inverte input now_int_state 0 now int_signal is low outp wBaset5 1 enable interrupt XJ enable void interrupt irg service if now int state 0 COUNT find a high_pulse hij outp wBase 0Ox2a 1 select the inverte input now_int_state 1 now int_signal is High 1 find low_pulse here outp 0 2 0 select the non inverte input now_int_state 0 now int_signal is High if gt 8 outp A2 8259 0x20 outp A1 8259 0x20 Refer to Sec 2 5 1 for more information Version 2 1 Date 1999 10 Page 39 PIO D144 User s Manual 4 5 Demo4 Interrupt demo2 demo 4 count low pulse of PCO TJ Initial High amp active Low step 1 run demo4 exe KY include PIO H define A1 8259 0x20 define A2 8259 OxAO define EOI 0x20 WORD init_high WORD wBase wIrqg static void interrupt irq service int COUNT irqmask now int state nt main i IRE Sy WORD wBoards wo e D RD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice har WORD dwVal clrscr PIO DriverInit amp wBoards 0 80 0
31. putch 0x07 putch 0x07 putch 0x07 printf 1 There are no PIO D144 card in this PC n exit 0 printf n 2 Show the Configuration Space of all PIO D144 for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase amp wIrq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard Sd subID x x 6K SlotID x x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice select card 0 PIO GetConfigAddressSpace 0 amp wBase amp wIrg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf n 3 Card 0 wBaseAddr x wBaseAddr COUNT 0 outp 0 8 port 0 to port 5 are all input printf n 4 show the count of High pulse n init low for printf nCOUNT d COUNT if kbhit 0 getch break Page 38 Version 2 1 Date 1999 10 PIO D144 User s Manual outp wBaset5 0 disable all interrupt PIO_DriverClose jen Use PCO as external interrupt signal WORD init low DWORD dwVal disable outp wBaset5 0 disable all interrupt if wIrq lt 8 irqmask inp A1_8259 1 outp A1_8259 1 irqmask amp Oxff 1 lt lt wIrq setvect wIrg 8 service else irgmask inp Al 8259 1 outp A1_8259 1 irgmask amp Oxfb IRQ2
32. r s Manual 2 5 Interrupt Operation The PCO PC1 PC2 PC3 of CN1_PC can be used as interrupt signal source Refer to Sec 2 1 for 1 2 3 location The interrupt of PIO D144 is level trigger amp Active High The interrupt signal can be inverted or non inverted programmable The procedures of programming are given as follows 1 make sure the initial level is High or Low 2 if the initial state is High gt select the inverted signal Section 3 3 6 3 if the initial state is Low gt select the non inverted signal Section 3 3 6 4 enable the INT function Section 3 3 4 5 If the interrupt signal is active gt program will transfer into the interrupt service routine gt if INT signal is High now gt select the inverted input gt if INT signal is Low now gt select the non inverted input Refer to DEMO3 C amp DEMOA C for single interrupt source Refer to DEMOS C for four interrupt sources If only one interrupt signal source is used the interrupt service routine does not have to identify the interrupt source Refer to DEMO3 C amp DEMOA C If there are more than one interrupt source the interrupt service routine has to identify the active signals as following refer to DEMOS C Read the new status of the interrupt signal source Compare the new status with the old status to identify the active signals If PCO is active service CN1_PCO amp non inverter inverted the CN1_PCO signal If PC is active service CN1_PC1 a
33. r more information about wBase 3 3 1 RESET Control Register Read Write wBase 0 Note Refer to Sec 3 1 for more information about wBase When the PC is first power on the RESET signal is in Low state This will disable all D IJO operations The user has to set the RESET signal to High state before any D I O command outp wBase 1 RESET High gt all D I O are enable now outp wBase 0 RESET Low gt all D I O are disable now Version 2 1 Date 1999 10 Page 27 PIO D144 User s Manual 3 3 2 AUX Control Register Read Write wBase 2 Note Refer to Sec 3 1 for more information about wBase Aux 0 this Aux is used as a 1 gt this Aux is used as a D O When the PC is first power on All Aux signal are in Low state All Aux are designed as D I for all PIO PISO series Please set all Aux in D I state 3 3 3 AUX data Register Read Write wBase 3 Note Refer to Sec 3 1 for more information about wBase When the Aux is used as D O the output state is controlled by this register This register is designed for feature extension so don t control this register now 3 3 4 INT Mask Control Register Read Write wBase 5 o b Jo jNLPC3CNLPC2 CNI PCI leni rco Note Refer to Sec 3 1 for more information about wBase PC0z02 Disable PCO of as a interrupt signal Default PCOz12 Enable PCO of as a interrupt signal outp wBase 5 0 Disable inte
34. rrupt outp wBase 5 1 Enable interrupt PCO outp wBase 5 0x0f Enable interrupt CN1_PC0 CN1_PC1 CN1_PC2 CN1_PC3 Page 28 Version 2 1 Date 1999 10 PIO D144 User s Manual 3 3 5 Aux Status Register Read Write wBase 7 Note Refer to Sec 3 1 for more information about wBase Aux0 CN_PCO Auxl CNI PCI Aux2 CN1_PC2 CN1_Aux3 PC3 Aux7 4 Aux ID Refer to DEMOS C for more information The Aux0 3 are used as interrupt source The interrupt service routine has to read this register for interrupt source identification Refer to Sec 2 5 for more information 3 3 6 Interrupt Polarity Control Register Read Write wBase 0x2A o fo CNIPCSCNI PCZCNI PCIICNI rco Note Refer to Sec 3 1 for more information about wBase PC0 0 select the non inverted signal from PCO of 1 gt select the inverted signal from PCO of CN1_PC outp wBase 0x2a 0 select the non inverted input CN1_PC0 1 2 3 outp wBase 0x2a 0x0Of select the inverted input of CN1 PC0 1 2 3 0 2 1 select the inverted input of CN1 PCO select the non inverted input CN1_PC1 2 3 0 2 3 select the inverted input of select the non inverted input CN1_PC2 3 Refer to Sec 2 5 for more information Refer to DEMOS C for more information Version 2 1 Date 1999 10 Page 29 PIO D144 User s Manual 3 3 Read Write 8 bit da
35. s of PIO PSIO series in one PC system How to find the card 0 amp card 1 It is difficult to find the card NO The simplest way to identify which card is card 0 is to use wSlotBus amp wSlotDevice as follows 1 Remove all PIO D144 from this PC 2 Install one PIO D144 into the PC s PCI slot1 run PIO PISO EXE amp record the wSlotBusl amp wSlotDevicel 3 Remove all PIO D144 from this PC 4 Install one PIO D144 into the PC s PCI slot2 run PIO PISO EXE amp record the wSlotBus2 amp wSlotDevice2 5 Repeat 3 amp 4 for all PCI slot record all wSlotBus amp wSlotDevice The records may be as follows PC s PCI slot WslotBus WslotDevice Slot 1 0 0x07 Slot 2 0 0x08 Slot 3 0 0x09 Slot 4 0 0x0A PCI BRIDGE Slot 5 1 0x0A Slot 6 1 0x08 Slot 7 1 0x09 Slot 8 1 0x07 The above procedure will record all wSlotBus amp wSlotDevice in this PC These values will be mapped to this PC s physical slot This mapping will not be changed for any PIO PISO cards So it can be used to identify the specified PIO PISO card as following Step1 Record all wSlotBus amp wSlotDevice Step2 Use PIO GetConfigAddressSpace to get the specified card s wSlotBus amp wSlotDevice Version 2 1 Date 1999 10 Page 25 PIO D144 User s Manual Step3 The user can identify the specified PIO PISO card if he compare the wSlotBus amp wSlotDevice in step2 to step1 The simplest way to fi
36. t CN1 PBO to CN1 PB7 to 0 outp wBaset 0xc4 2 select CN1_PC outp 0 0 0 set CN1 PCO to CN1 PC7 to 0 step 6 configure all I O port 9 outp 0 8 0x00 to CN2 port are all output Page 34 Version 2 1 Date 1999 10 PIO D144 User s Manual outp 0 0x00 CN3 to CN4 port are all output outp wBase 0xd0 0x00 CN5 to CN6 port are all output for printf nCN1 PA 0x55 PB 0xAA PC 0x5A press Q to stop outp wBaset 0xc4 0 select CN1_PA outp 0 0 0 55 set CN1 PA 0x55 outp wBase 0xc4 1 select CN1 PB outp wBaset 0xc0 0xaa set CN1 PB 0xaa outp wBase 0xc4 2 select CN1_PC outp 0 0 set CN1_PC 0x5a c getch if 0 break printf nCN1 PA 0xAA PB 0x55 PC 0xA5 press to stop outp wBaset 0xc4 0 select CN1_PA outp wBaset 0xc0 0xAA set 1_ outp wBase 0xc4 1 select CN1 PB outp wBase 0xc0 0x55 set CN1 PB 0x55 outp 0 4 2 select CN1 PC outp 0 0 0 5 set CN1 PC 0xA5 c getch if 0 c q break PIO_DriverClose Version 2 1 Date 1999 10 Page 35 PIO D144 User s Manual 4 3 Demo 2 Use D O of CN1 CN6 7 demo 2 D
37. t new int state int c int num nt CNT L1 CNT L2 CNT L3 CNT L4 nt CNT H1 CNT H2 CNT H3 CNT H4 H H B nt main i int i j WORD wBoards wRetVal W E ORD wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice har 6 DWORD dwVal clrscr PIO DriverInit amp wBoards 0 80 0 01 0 00 printf n 1 Threr are d PIO D144 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf 1 There are no PIO D144 card in this PC n exit 0 printf n 2 Show the Configuration Space of all PIO D144 for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase amp amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard Sd subID x x SlotID x x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice select card 0 PIO GetConfigAddressSpace 0 amp wBase amp wIrg amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf n 3 Card 0 wBaseAddr x wBaseAddr outp wBaset 0xc8 to CN2 port are all input printf n 4 show the count of High pulse n init low Page 42 Version 2 1 Date 1999 10 PIO D144 User s Manual for printf Xn CNT L d d d d d d d d x CNT L1 CNT L2 CNT H2 C
38. ta Register Read Write wBase40xcO D be ps ps gt Do Note Refer to Sec 3 1 for more information about wBase There are eighteen 8 bit I O port in the PIO D144 Every I O port can be programmed as D I or D O port Refer to Sec 3 3 9 for D I or D O selection When the PC is first power on all eighteen ports are used as D I port outp wBase 0xc0 Val write to D O port Val inp wBase 0xc0 read from D I port 3 3 8 Active I O Port Control Register Read rite wBase 0xc4 Note Refer to Sec 3 1 for more information about wBase There are eighteen 8 bit I O port in the PIO D144 Only one I O port can be active at the same time outp wBase 0xc4 0 0 is active now outp wBase 0xc4 1 1 is active now outp wBase 0xc4 17 port_17 is active now Refer to Sec 2 2 for I O port location Page 30 Version 2 1 Date 1999 10 PIO D144 User s Manual 3 3 9 Selection Control Register Write wBase 0xc8 ena CN2 PB PA CNI PC CN1 Write wBase40xcc oo ena PB PA CN3 CN3 PB CN3 PA Write wBase 0xd0 oo CNG C CN6 PB CN6 PA ons PC fons PB fons PA Note Refer to Sec 3 1 for more information about wBase For example CN1_PA 17 This port is used as port CNI_PA 0 This port is used as a D O port There are eighteen 8 bit I O port in the PIO D144 Every
39. te 1999 10 Page 23 PIO D144 User s Manual 3 1 3 Show PIO PISO Show PIO PISO wSubVendor wSubDevice wSubAux e wSubVendor gt subVendor ID of board to find e wSubDevice gt subDevice ID of board to find e wSubAux gt subAux ID of board to find This function will show a text string for this special subIDs This text string is the same as that defined in PIO H The demo program is given as follows wRetVal PIO_DriverInit amp wBoards Oxff Oxff Oxff find all PISO series card printf nThrer are 96d PIO PISO Cards in this PC wBoards if wBoards 0 exit 0 printf n for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase amp wlrq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wIrq x subID x 96x 96x SlotID x x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux Page 24 Version 2 1 Date 1999 10 PIO D144 User s Manual 3 2 The Assignment of I O Address The Plug amp Play BIOS will assign the proper I O address to PIO PISO series card If there is only one PIO PISO board the user can identify the board as 0 If there are two PIO PISO boards in the system the user will be very difficult to identify which board is card 0 The software driver can support 16 boards max Therefore the user can install 16 board
40. this board to isolated the computer from large common mode voltage ground loops and transient voltage spike that often occur in industrial environments PIO D144 Opto Isolated PIO D144 AC or DC Signal OV to 24V DB 24P DB 24PD 50 pin flat cable header Yes Yes D sub 37 pin header No Yes Other specifications Same Page 14 Version 2 1 Date 1999 10 PIO D144 User s Manual 2 6 6 DB 24R DB 24RD Relay Board The DB 24R 24 channel relay output board consists of 24 form C relays for efficient switch of load by programmed control The relay are energized by apply 12V 24V voltage signal to the appropriated relay channel on the 50 pin flat connector There are 24 enunciator LED s for each relay light when their associated relay is activated From C Relay Normal Open Normal Close PIO D144 Note Channel 24 From C Relay or 1A at 24DCV Relay Switching up to 0 5A at 110ACV DB 24R DB 24RD 50 pin flat cable header Yes Yes D sub 37 pin header No Yes Other specifications Same DB 24R DB 24RD 24 x Relay 120V 0 5A DB 24PR DB 24PRD 24 x Power Relay 250V 5A DB 24POR 24 x Photo MOS Relay 350V 01 A DB 24SSR 24 x SSR 250VAC 4A DB 24C 24 x O C 30V 100 mA DB 16P8R 16 x Relay 120V 0 5A 8 x isolated input Version 2 1 Date 1999 10 Page 15 PIO D144 User s Manual 2 6 7 DB 24PR DB 24POR DB 2
41. utput outp 0 0x01 CN3 PA is input outp 0 4 3 select CN2 PA outp wBase 0xc0 0x55 CN2 PA 0x55 outp wBase 0xc4 6 select CN2 PA val inp 0 0 amp 0xff read CN3 PA if val 0x55 ok 0 outp 0 4 3 select CN2_PA outp 0 0 0xAA CN2_PA 0xAA outp wBaset0xc4 6 select CN3 PA val inp wBase 0xc0 amp 0xff read CN3 PA if val Oxaa ok 0 printf nCard Number d wBase x card wBase if ok 1 printf Test OK else printf Test ERROR delay_ms int t int 1 J k l m for i20 i t itt for 3 0 j 100 j m 0 for k 0 k 100 k l jtt i 1 Page 48 Version 2 1 Date 1999 10

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