STEVAL-IHM040V1 hardware description
Contents
1. wy UM1595 Y User manual STEVAL IHM040V1 hardware description January 2013 Introduction The STEVAL IHM040V1 is a 3 phase permanent magnet brushless motor driver designed to drive the motor using either the six step or field oriented control FOC commutation technique The board can operate from the AC mains from either 115 or 230 V AC nominal at 50 60 Hz or from a DC input voltage between 150 and 350 V DC The board can supply a continuous output current of 0 5 A RMS to the motor The circuit consists of three main blocks as shown in Figure 2 Figure 3 and Figure 4 The digital control block uses the STM32F100C8T6 microcontroller to implement the control algorithms and generates the control signals for the power stage The main outputs of the control block are the signals GAH GAL GBH GBL GCH and GCL that are the gate control signals for the power stage The power stage second block is a 3 phase inverter bridge implemented using the STGIPN3H60 SLLIMMTM nano intelligent power module The SLLIMM includes the 6 IGBTs gate drivers and level shift required to interface the logic signals from the digital control to the motor terminals The SLLIMM also provides a hardware overcurrent shutdown and a free op amp used to scale and bias the current sensing The power supply block uses the ViPer 16L to convert the high voltage DC bus to a regulated 15 V supply that supplies the SLLIMM and analog circuitry on the board The 15 V supply a2. previously described U2 is a linear regulator that generates the 3 3 V regulated supply needed to operate the STM32 Resistors R15 and R16 are connected between the 15 V supply and the input to the 3 3 V regulator These resistors serve to move out some of the power dissipation from the linear regulator by dropping its input voltage This allows U2 to run cooler Doc ID 024037 Rev 1 9 20 STM32 based controller section UM1595 2 10 20 STM32 based controller section The STM32 provides all of the controller data processing functions Two example firmware programs are available to run on the board one to operate the motor in six step mode and one to operate the motor in field oriented control The default program loaded in the board is the six step firmware The input signals to the STM32 are ifb gt bussense gt potentiometer gt bemfa gt bemfb gt bemfc gt limit gt RX gt This analog signal comes from the op amp in the SLLIMM module and is a biased and scaled replica of the DC bus current The signal is biased such that the voltage at ifb is approximately 12 of the full scale voltage for the ADC when the current in the sense resistor is zero The gain set by resistors R23 and R24 sheet 3 is adjusted so that the peak to peak signal remains within the full scale range of the ADC when operating at maximum rated current When operating in six step mode this signal is synchronously sampl
3. 0 25 V per Ampere of motor current This sense signal is applied to the input of comparator U5A and compared to a fixed threshold of 0 25 V When the voltage across R28 exceeds the 0 25 V threshold the comparator takes the ilimit signal low When operating with the evaluation software in six step mode this triggers the current limit function in the STM32 and sets up a cycle by cycle current limit of 1 0 Ampere This sense signal is also applied to the Cin input of the IPM The Cin signal is compared internally against a fixed 0 5 V reference which will trigger the internal smart shutdown function whenever sense exceeds 0 5 V which occurs when the current reaches 2 0 Amperes This functions as a backup to the current limit described above which should prevent this condition from occurring The smart shutdown function will immediately turn off all of the inverter transistors and will also activate an internal MOSFET which will pull the signal at the SD pin of the IPM down to the guaranteed turn off level of the input This SD signal is connected back to the Timer1 BRK input of the STM32 via a resistive attenuator and a small low pass filter The attenuation is required due to a possible voltage level mismatch between the guaranteed low level to which the IPM will pull the SD and the low level input threshold of STM32 BRK input Adding the attenuator guarantees that the signal will be recognized When this BRK signal is recognized by the STM22 interna
4. 1 7 R24 R45 10 KQ 603 Any Any R46 1 R19 DNI 1 R22 30 KQ 603 Any Any 1 R23 3 9 KO 603 Any Any 2 R25 R43 1 KQ 603 Any Any 1 R26 DNI 2 R27 R41 22 Q 603 Any Any 1 R28 0 25 2512 VISHAY DALE WSL25122500FEA DigiKey WSLG 25CT R29 R30 6 R31 R35 200kQ 1206 Any Any R36 R37 R32 R33 6 R34 R38 3 3 kO 603 Any Any R39 R40 R42 R47 3 R48 4 7 kQ 603 Any Any 1 R44 82 Q 603 Any Any 1 R49 220 Q 603 Any Any 1 R50 1 kO 1206 Any Any Doc ID 024037 Rev 1 7 20 Contents UM1595 Table 1 Bill of material continued value Supplier Quan generic Package Manufacturer pP Reference Manufacturer Supplier ordering tity part class ordering code code number TP1 TP3 TP4 TP5 9 TP6 TP7 Via TP8 TP9 TP10 M ER 2 TP2 TP11 Thru hole KOBICONN 151 203 RC eee 151 203 RC ELECTRON Industrial Partner 1 U1 LQFP48 ST STM32F100C8T6 ST 1 JU2 So8 ST L78L33 ST 1 U3 SO16 ST VIPer16 ST 1 U4 Sak ST STGIPN3H60 ST H60 1 U5A So8 ST LM393DT ST Opto Mas 1 U6 4 pin DIP CEL PS2561A 1_a DigiKey PS2561A 1 A coupler Not L installed 8 Mhz 1 Y1 ceramic 3 pin SM IMurata CSTCE8M00G55Z RO DigiKey 490 1219 1 resonator 8 20 Doc ID 024037 Rev 1 ei UM1595 Power supply section Power supply section Power enters the board on connector J1 as shown in Figure 3 The board may be powered from a single phase A
5. 39 GND 3 3 KQ GND AMO03200 In Figure 5 the drain of Q2 is connected to motor terminal and the source as the BEMF input to the ADC of the STM32 Resistors R45 and R46 bias the gate voltage of Q2 to approximately 7 5 V Q2 is an STD1NK60 that has a specified gate threshold voltage of 3 V and a typical Rdson of 8 Q When the drain voltage is near zero Q2 is fully turned on and the drain and source voltages are essentially equal As the motor terminal voltage and drain of Q2 rise the source voltage will follow at essentially the same voltage since the on resistance of Q2 is much less than R39 The voltage at the source will continue rise and follow the drain voltage until the source voltage reaches a point equal to the gate voltage 7 5 V minus the gate threshold voltage 3 V At this point Q2 becomes a source follower with the source following the fixed bias voltage at the gate less the gate threshold voltage As the drain Doc ID 024037 Rev 1 ky UM1595 BEMF sensing circuit voltage continues to rise the source voltage will be clamped at approximately 4 5 V Resistor R4 works with the internal protection diodes of the STM32 to limit the current and clamp the voltage at the input The series resistance of R4 is well below the specified maximum series resistance for the ADC input 10 kQ The circuit provides a clamp for positive voltages but does not prevent the bemfa signal from going negative However the freewheeling diodes in t
6. 6 __ gt g 3 v 1 14 35 P3A qp ONP 1 15 B gt SWDIO 1 R4 2 2 KQ bemfa lt 16 33 TED gt ILIMIT GND Mating connector R6 2 2 KQ X R5 bemfb lt i 32 X S gt 3 3V R7 2 2 KQ 470 Q bem c amp 18 3t D1 S GCH TPs 19 20 gt GBH TP9 G 20 29 gt GAH TP10 Q 2 28 gt GCL onoff lt 22 27 gt GBL 23 26 SGAL R8 22kQ 3 3 v lt lt 24 23 gt sp C2 STM32F100C8T6 0 1 uF 7 5 KQ GND AM14697 K Doc ID 024037 Rev 1 3 20 Contents UM1595 Figure 3 Schematic sheet 2 J1 2 1 Mating connector J1A VIPer16 D2 6 A 400 V 3 3 v lt 220 uF 200 V gt gt dcbus C3 100 470 KQ W1 kO R12 O O 470 kO R13 gt gt bussense c5 100 R14 220 uF 200 V T kog 82KO Tayar in GND GND GND GND NC L78L33 C8 0 1 uF GND 2 2 nF C12 R17 2 8 K2 R1810 KQ AM14698 4 20 Doc ID 024037 Rev 1 UM1595 Contents Figure 4 Schematic sheet 3 15V A R21 GND 10 KQ C13 GND we l2 0 01 j iF 25 sp lt lt SD OUT C gt mc i s4 814 5 15 v lt lt Vcc C Vboot C 2 2 C15 HF 3 Ta GCH lt Hin C Mating connector R22 H P2A 30 KQ GCL lt Lin C GND OP ifb Isense lt
7. C line at either 115 or 230 VAC nominal and either 50 or 60 Hz or from a DC supply between 150 and 350 volts When operating from 230 VAC jumper W1 MUST be left open to disable the voltage doubler If the doubler is enabled it would generate a DC bus voltage that would destroy many componenis of the board Operating from 230 VAC as a full wave rectified supply will generate a nominal DC bus voltage of 320 VDC which is the correct value for driving 200 to 250 VAC rated motors Since the SLLIMM module utilizes 600 V rated IGBTs this class of motors is the most efficient to use with this PCB and will deliver the most power output When operating from 115 VAC mains wire jumper W1 can be soldered in to utilize the voltage doubler function and also generate a 320 VDC nominal bus For operation with lower voltage motors W1 can be left off to generate a nominal 160 VDC bus The high voltage bus supplies the input power to the VIPer16L which is configured as a buck type non isolated switch mode converter The VIPer16L provides the regulation control and gate drive along with the high voltage MOSFET high side switch The 15 V output is sampled via D4 C8 and the attenuation and filtering circuit consisting of R17 R18 and C10 The duty cycle of the bus voltage applied to inductor L1 is modulated so as to regulate the output D3 is a freewheeling diode to maintain current flow in L1 during the PWM off time and C7 is the main output filter capacitor As
8. THORIZED ST REPRESENTATIVES ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2013 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 20 20 Doc ID 024037 Rev 1 ky
9. d its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR INPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AU
10. e cases such as if we are required to run the duty cycle all the way up to 100 Since by definition there is no off time when we are operating at 100 off time sampling cannot be done At lower duty cycles and presumably lower motor speeds off time sampling is preferred since the full signal strength of the BEMF is preserved If we try to start the motor while using on time sampling the signal strength is severely attenuated so that all other things being equal the motor must be ramped up to a much higher speed before we can lock on to the rotor position An optimal strategy is usually to operate with off time sampling during start up and at lower duty cycles and then do a mode switch to on time sampling at higher duty cycles Using the on time sampling is not implemented in the example software Doc ID 024037 Rev 1 15 20 Additional references and resources UM1595 5 16 20 Additional references and resources e Gerber files zip file see www st com internet evalboard product 255604 jsp STEVAL IHM040V1 firmware see www st com internet evalboard product 255604 jsp e STM32 PMSM FOC SDK v3 2 Motor Control Firmware Library see www st com internettcom SOFTWARE_RESOURCES SW_COMPONENT FIRMWAR E stm32_pmsm_foc_motorcontrol_fwlib zip e ST Motor Control Workbench GUI see www st com internet com SOFTWARE_RESOURCES TOOL CONFIGURATION_UTIL ITY motorcontrol_workbench zip Doc ID 024037 Rev 1 ky UM1595 Startup procedure f
11. ed using the 12 bit ADC of the STM32 during the on time of the PWM signal The converted value is used to calculate the average motor current over one full cycle and is used by the overload function When operating in FOC mode this signal is separated and converted by the program into accurate current feedback for each of the three motor phases This analog signal is an attenuated replica of the DC bus voltage When operating in FOC mode accurate bus voltage information is required to scale the applied voltage value which feeds the sensorless rotor position observer This analog signal is read at PA2 of the STM32 and provides the speed command This analog signal is derived from the motor phase A terminal voltage via the MOSFET based active clamping circuit When operating in six step mode this signal is monitored by the ADC to determine the zero crossings of the BEMF of the floating phase This signal is not used in FOC mode see bemfa see bemfa This is a digital signal which goes low whenever the motor current exceeds a fixed hardware set threshold This signal triggers the STM32 Timer1 s external trigger based cycle by cycle current control The active edge of this signal will cause the active high side transistor in the bridge to be turned off for the remainder of the PWM cycle The transistor will turn back on at the beginning of the next cycle This input and the cycle by cycle current limit are used only in the six step operating m
12. ensing of the BEMF during either the on time or off time of the PWM cycle Only sensing during the off time is implemented in the example program but sensing during the on time could be added to allow the motor to be operated with PWM duty cycles up to 100 To get the best performance and lock on to the BEMF at low speeds it is best to sense the motor terminal voltage during the off time without any attenuation However since the motor terminal voltage can go as high as several hundred volts the voltage to the microcontroller must be clamped so that it remains within the allowable safe range usually limited to the microcontroller supply voltage The interface circuit needs to provide the unattenuated motor terminal voltage to the input pin when the voltage is in the range between ground and Vpp and clamp the voltage when the motor terminal voltage is outside of the allowable safe range Figure 5 shows the equivalent circuit for the active clamp circuit used for sensing during off time The circuit basically operates in two modes as a fully on switch with Q2 fully on when the motor terminal voltage is low and as a source follower limiting the source voltage when the motor terminal voltage is above the allowable limit Figure5 Active clamp circuit for BEMF sensing during off time 1 5V ma R45 gt bemfg 10 kQ a R33 3 3 kQ gt bemfa R46 Q2 Bi 10 KQ c22 gt gt STM32 pin 16 0 1 j F T 2 2 kO R
13. he power bridge clamp the motor terminal to one diode drop below ground With a small negative voltage on the motor terminal resistor R4 and the internal camp diodes limit the voltage at the input of the STM32 The part designations in Figure 5 match the part designations for the clamp circuit for phase A shown on sheet 3 of the full schematic The additional circuitry in the full schematic is used for sensing during on time and to switch between on time and off time sensing Comparator U5B is essentially an inverting buffer to shift the level of the control single onoff from the microcontroller When sensing during off time the output of comparator U5B is off and the gates are biased at 7 5 V as discussed above To change to sensing during on time the output of U5B is on and the gate bias is 0 so Q1 Q2 and Q3 are all off The equivalent circuit for BEMF sensing during on time is shown in Figure 6 Figure 6 Back EMF sensing circuit during on time ma A Z N R30 200 kQ gt bemfa R36 200 kO R4 gt gt STM32 pin 16 R39 2 2 KQ 3 3 kQ GND AM03201 When Q2 is off resistors R30 R36 and R39 form a resistive attenuator with a factor of 122 1 as shown in Figure 6 Even with 403 volts at the motor terminal the output would be only 3 3 volts When sampling during on time the BEMF is compared against a threshold equivalent to one half of the DC bus instead of near zero On time sampling is desirable in som
14. l hardware will immediately place all of the transistor control signals in the off state low for high gates and high for low gates and will also interrupt the processor The six logic inputs of the IPM are internally pulled down or up as appropriate to turn off the output This is important to be sure that the output devices are off during power up or if the STM32 is reset Whenever the STM32 is reset the output pins will go into a high impedance state After reset the pins are assigned to GPIO configured as inputs which are high impedance The pins will remain in the high impedance state until the initialization section of the control program runs and gives control to Timer1 Without the proper pull up and pull down the bridge state would be undetermined and could be unsafe or uncontrolled The SLLIMM module also provides an uncommitted op amp which is used to bias and amplify the sense signal so that it is scaled to better match the allowable input range of the ADC in the STM32 The op amp circuit is configured as a non inverting amplifier with positive bias The input signal sense is taken at R25 and the output ifb is taken from pin 7 opout The voltage across the sense resistor is normally of a positive polarity since this is actually DC bus current and a positive bus current represents power flowing from the bus to the motor If however the motor is operated in a regenerative quadrant power flow and thus the polarity of the sense
15. lso supplies an L78L33 linear regulator that provides the 3 3 V logic supply for the microcontroller Two firmware control programs are available one for six step and one for FOC that run on the same hardware platform Figure 1 PCB photo REW Ez Doc ID 024037 Rev 1 1 20 www st com Contents UM1595 Contents 1 Power supply section 4 J kak kk kk kk kk kk kk kk kk kk kk kk kk lk kk 9 2 STM32 based controller section 10 3 STGIPN3H60 based 3 phase inverter bridge 12 4 BEMF sensing circuit kk ce kk kK eee eee 14 5 Additional references and resources 16 Appendix A Startup procedure for STEVAL IHM040V1 using the STM32 PMSM FOC SDK vv3 2 17 Appendix B Startup procedure for STEVAL IHM040V1 using the STEVAL IHMO040V1 six step program 18 REVISION FISION xx ss ka a a a halka kl neman ln aye l ya lk qg ega ceded a al ian ve wees aus 19 2 20 Doc ID 024037 Rev 1 ky UM1595 Contents Figure 2 Schematic sheet 1 U1 3 3 v lt 1 48 S gt gav 2 47 3 46 PEN 3 3 V 4 45 GND j 5 44 R49 220 Q U6 P3 NRST lt a Ry 1k c TP3 Ee 0 22 uF 8 41 O TP4 Optoisolator1 3 3V lt lt 2 40 TP5 GND I R2 10 39 u GND a a v i lt O TP6 2 2 KQ 11 38 bussense lt TP7 ns 12 37 2 kQ gt SWCLK Pot ire 171 13 3
16. lt Die OPOUT R25 R26 R23 R24 4 KQ DNI 3 9 KQ 10 KQO 8 OP GND 23 15 v lt Vcc B an Cie 0 22 uF GBH Cir r lt 2 2 uF 21 GND GBL lt R27 Isense AN Cin lt 22 Q 2 Vcc A C18 C19 47nF 022 GAH lt Hin A 19 gt gt ma Le HF C20 J SD p a gt gt 2 2 uF sense 15V 3 3 V GND a 17 R28 R41 R42 GAL lt Lin A Vboot A 0 25 220 ia STGIPN3H60 LS debus gt C24 lt R43 g T gt ilimit 5 ae u VST KO R44 4 LM393DT 82 Q GND onoff lt 8 R47 3 3 v lt mc A R32 E R33 bemfg lt lt 200 kO bemig lt 9 a 3 3 ko IA 3 3 ko IR Q1 c21_ gt gt bemfc C22 0 1 F R38 Esen l 3 3 kQ 0 1 pF AM14699 ky Doc ID 024037 Rev 1 5 20 Contents UM1595 Table 1 Bill of material Value Supplier Quan generic Package Manufacturer pP Reference Manufacturer E Supplier ordering tity part class ordering code code number C1 C15 4 C16 C19 0 22 uF 603 Any Any C2 C8 6 C11 C21 0 1 uF 603 Any Any C22 C23 220 uF Radial 18 2 C3 C5 H mm dia Panasonic EEU ED2D221 Digikey P13522 200V 7 5 mm LS 1 C4 4 7 uF 1206 Any 2 C6 C18 J47 nF 603 Any Any 100 uF 8mmdia zz 1 C7 35 V 3 5 mm LS Panasonic EEU FC1V101 DigiKey P10294 2 C9 C25 1 0 uF 1206 Any Any 2 C10 C13 0 01uF 603 Any Any 1 C12 2 2 nF 603 Any Any C14 C17 3 C20 2 2 UF 1206 A
17. ng pause in between This logic signal drives the SLLIMM intelligent power module This signal is positive logic and will be high whenever the high side transistor for phase A should be on This logic signal drives the SLLIMM intelligent power module This signal is negative logic and will be low whenever the low side transistor for phase A should be on The STM32 manages the required dead time between the high and low transistor gating using the dead time function of the advanced timer see GAH see GAL see GAH see GAL Doc ID 024037 Rev 1 11 20 STGIPN3H60 based 3 phase inverter bridge UM1595 3 12 20 STGIPN3H60 based 3 phase inverter bridge The schematic of the inverter bridge and the analog circuitry is shown in Figure 4 The 15 volt supply is supplied to the STGIPN3H60 intelligent power module on pins Vcc A Vcc B and Vcc C Local power supply bypass capacitors are provided at each of the three pins The high voltage power supply dcbus is connected to pin P of the IPM As described in Introduction and in Section 1 Power supply section the voltage can be between 150 and 350 V DC Internally the IPM distributes the dcbus to the collector of the high side IGBT for all three phases The emitters of the three low side IGBTs are connected to pins N A N B and N C and are tied together externally and then returned to ground through current sensing resistor R28 The resistor value is 0 25 Q and thus generates a signal of
18. ny Any 1 C24 4 7 nF 603 Any Any ROHM Wu 1 D1 Red LED Thru hole SLR 343VRT32 DigiKey 511 1256 1 Semiconductor 1 D2 eBU604 Diodes Inc GBU604 DigiKey GBU604DI bridge 2 D3 D4 Sek SMA STMicroelectronics STTH1R06A ST 2 pos ver 2 pos PHOENIX nee 177 1128 2 Jes header header CONTACT 98915 DigiKey 277 1128 5 08 mm PHOENIX NE 2 J1A P3A DNI 2 pos plug CONTACT 1779987 DigiKey 277 5986 1mH Thru hole n ae 1 L1 inductor Sm LS W rth 744 772 102 DigiKey 732 3783 5 pos SULLINS 1 P1 100 Thru hole CONNECTOR PCE36SAAN DigiKey S1012E 36 header SOLUTIONS 3 pos 1 P2 header Thru hole POENIS 1758021 DigiKey 277 1129 CONTACT 5 08 mm PHOENIX o 1 P2A DNI 3 pos plug CONTACT 1786417 DigiKey 277 5985 6 20 Doc ID 024037 Rev 1 ei UM1595 Contents Table 1 Bill of material continued value Supplier Quan generic Package Manufacturer pP Reference Manufacturer j Supplier ordering tity part class ordering code code number 3 Q2 SOT223 ST STN1NK60Z ST R2 R4 4 R6 R7 2 2 KO 603 Any Any 1 R3 2 kQ pot Thru hole BOURNS 3362P 1 202LF DigiKey 3362P 202LF 1 R5 470 Q 603 Any Any 1 R8 22 KQ 603 Any Any 1 R9 7 5KQ 603 Any Any 2 R1l0 R12 470kQ 1206 Any Any ma 541 2 R11 R13 100kQ 2512 VISHAY DALE CRCW2512100KJNEG DigiKey 100KCCT 1 R14 8 2 kO 603 Any Any 2 R15 R16 100 Q 1206 Any Any 1 IR17 2 8 KO 1206 Any Any R1 R18 R20 R2
19. ode This digital signal is available at PB7 of the STM32 which is also the RX input of the USART This connection and the optocoupler that drives it are provided for future expansion and are not used by the example software Doc ID 024037 Rev 1 ky UM1595 STM32 based controller section The STM32 provides the following output signals onoff gt led gt GAH gt GAL gt GBH gt GBL gt GCH gt GCL gt This signal controls the operating mode of the active MOSFET based BEMF interface circuit When this output is low the output of comparator U5B is high applying gate voltage to the MOSFETs and causing the circuit to operate as a pure active clamp This is the proper state for six step mode operation when sampling BEMF during off time When the output is high gating voltage is removed from the MOSFETs and the circuits work as pure attenuators This is the proper state for six step mode operation when sampling during on time The on time sampling capability is provided for future expansion as the example six step program samples only during off time FOC mode does not use this signal This signal drives the single LED display from PA11 of the STM32 The LED is normally on solidly when the drive is ready to run or running and will flash repeatedly in the event of a fault condition The only fault condition current being reported is an overcurrent trip In this case the LED will flash twice repeatedly with a lo
20. or STEVAL IHM040V1 using the STM32 PMSM FOC SDK v3 2 Appendix A Startup procedure for STEVAL IHM040V1 10 11 12 using the STM32 PMSM FOC SDK v3 2 Obtain and install the IAR Embedded Workbench integrated development tool and C compiler for the STM32 A trial version called the KickStart version is available free of charge at the IAR web site Obtain a copy of the STM32 FOC SDK V3 2 from www st com and place a copy of the working directory in a convenient location on your computers hard drive The installation process for the SDK will also install the configuration workbench program and the user documentation files Change the debugger connection from JTAG to SWD in the project options In the user project workspace at the top pick STM32100B EVAL from the prop down at the top Open the STEVAL IHMO40V1 FOC SDK workbench settings from www st com internet evalboard product 255604 jsp file with the workbench program Go to options and change the output path setting so that it points to the System amp Drive Params folder of your working directory Change the settings as appropriate for your motor With the workbench program generate the design files Edit main c to uncomment the line define DEMOMODE If you prefer different run and stop times edit main c to change the lines define RUN_DURATION_SEC 5 define STOP_DURATION_SEC 3 Press F8 pick STM32100B EVAL Click make Transfe
21. r the program to the target and run Doc ID 024037 Rev 1 17 20 Startup procedure for STEVAL IHM040V1 using the STEVAL IHM040V1 six step program UM1595 Appendix B Startup procedure for STEVAL IHM040V1 18 20 using the STEVAL IHMO040V1 six step program Obtain and install the IAR Embedded Workbench integrated development tool and C compiler for the STM32 A trial version called the KickStart version is available free of charge at the IAR web site Obtain a copy of the STEVAL IHMO40V1 SLLIMM 6 step program from www st com internet evalboard product 255604 jsp FIRMWARE and place a copy of the working directory in a convenient location on your computers hard drive The user documentation file for the program is also available on the ST web site Change the debugger connection from JTAG to SWD in the project options Open the project file using the IAR Embedded Workbench Per the software documentation change the user settable parameters as appropriate for your system Press F7 to rebuild the program Transfer the program to the target and run Doc ID 024037 Rev 1 ky UM1595 Revision history Revision history Table 2 Document revision history Date Revision Changes 25 Jan 2013 1 Initial release Doc ID 024037 Rev 1 19 20 UM1595 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV an
22. signal will be negative Since the ADC of the STM32 can only convert positive voltages in the range of 0 to 3 3 volts the op amp output is biased so that an input of zero gives an output of 1 44 volts nominal Doc ID 024037 Rev 1 ky UM1595 STGIPN3H60 based 3 phase inverter bridge The program carefully measures this offset before the inverter bridge is enabled when current is known to be zero and uses the value to correct each reading The effective overall gain of the circuit is 3 47 volts per volt which combined with the sense resistor value of 0 25 Q volts per Ampere gives the effective sensitivity of 0 8675 volts per amp This determines the full scale positive current 3 3 V at ADC to be 2 14 Ampere Full scale in the negative direction is somewhat less since the offset is not exactly at half scale but it is assumed that regenerative currents will not be as large Doc ID 024037 Rev 1 13 20 BEMF sensing circuit UM1595 4 14 20 BEMF sensing circuit The zero crossing of the BEMF of the unenergized phase is used in the six step commutation technique to set the appropriate commutation time between steps In this implementation the motor terminal voltage is measured by the ADC and the software determines when the zero crossing has occurred The BEMF sensing is not used by the FOC software The BEMF sensing circuit is identical for all there phases so only phase A will be described The circuit is designed to allow s
Download Pdf Manuals
Related Search