CPU-1421 - UCL HEP Group
Contents
1. CPU 1421 MNL 0542 01 revA3 Communications General 3F8h Devices _ RS232 Communications ATAPI Unit 2F8h PCI ISA RS232 Advanced Error Handling 3E8h RS232 2E8h R 232 0378h Printer Yes Quit Sub Option Possible selections Serial Port 1 J5 Address e Disabled All Ports Serial Port 2 J5 e 3F8h Ports 1 3 8 4 Serial Port 3 J4 e 2F8h Ports 2 3 amp 4 Serial Port 4 J4 e 3E8h Ports 3 amp 4 e 2E8h Ports 3 amp 4 e RS232 Ports 1 2 3 amp 4 e RS422 Ports 3 amp 4 RS485 Ports 3 amp 4 e No Pe ccs ee e List of available IRQ numbers Parallel Port J4 Address e Disabled e 0378h e 0278h e Printer e Bidirectional e EPP 1 9 and SPP e EPP 1 7 and SPP e ECP e ECP and EPP 1 9 e ECP and EPP 1 7 e No e List of available IRQ numbers 39 ATAPI Units General PIO 4 Devices LBA Communications ATAPI Units Detect Now PCI amp ISA Advanced PIO 4 Error Handling LBA Quit Detect Now Option Sub Option Possible selections 3 3 MBps Transfer Rate 5 2 MBps Transfer Rate 8 3 MBps Transfer Rate 11 1 MBps Transfer Rate 16 6 MBps Transfer Rate e LBA Translation e Extended CHS translation Oo Cylinders e Sectors per track e Selection will attempt to Auto detect any devices connected CPU 1421 MNL 0542 01 revA3 PCI amp ISA General Reserved for PCI Devices Reserved for PCI Communications Reserved for PCI ATAPI Units Advan2. 3 Parvus OUMA User Manual MNL 0542 01 revA3 ECO 1994 Effective 14DEC07 MNL 0542 01 revA3 Disclaimer Although the information contained herein has been carefully verified Parvus Corporation assumes no responsibility for errors that might appear in this document or for damage to property or persons resulting from improper use of this manual or related software Parvus reserves the right to change the contents and form of this document as well as the features and specifications of its products at any time without notice The information in this publication does not represent a commitment on the part of Parvus This document contains proprietary information that is protected by copyright All rights are reserved No part of this document may be photocopied reproduced or translated into another language without the prior written consent of Parvus Parvus Corporation 3222 S Washington St Salt Lake City Utah USA 84115 Phone 1 801 483 1533 Toll Free 1 800 483 3152 Main 1 801 483 1533 Fax 1 801 483 1523 Email Sales sales parvus com Support tsupport parvus com Web site http Awww parvus com Send us your comments and feedback feedback parvus com Parvus is the U S arm of the Eurotech Group www eurotech com a global family of technology companies focused on innovative embedded and high performance computing solutions Trademarks and registered trademarks appearing in this document are th
3. LS1 Bottom Speaker D1 Top LED Green Power gt a D3 Top LED Yellow Speaker S1 Top Reset Button J1 Bottom Extension Keyboard 4 4x1 2 54 J2 Top Keyboard Input 6 Mini DIN J3 Top Mouse Input 6 Mini DIN J4 Bottom Multifunction Output 10 5x2 2 54 J5 Bottom Not Used with this CPU 2 2x1 2 54 J6 Bottom Mouse Output 4 4x1 2 54 Connector Description Pin Signal Connector Description Pin Signal J1 Ext Keyboard Input 1 VCC J4 Multifunction Output 1 SPKR 2 KB Clock To CPU J6 2 NC 3 Ground 3 RES_PB_IN 4 KB Data 4 NC J2 Keyboard Input 1 KB Data 5 KBDAT 2 NC 6 KBCLK 3 Ground 7 GND 4 VCC 8 5V 5 KB Clock 9 BATT_IN 6 NC 10 NC J3 Mouse Input 1 Mouse Data J Mouse output 1 VCC 2 NC 2 Mouse Clock 3 Ground 3 Ground 4 VCC 4 Mouse Data 5 Mouse Clock 6 NC CPU 1421 MNL 0542 01 revA3 J7 IDE DOM J7 provides an interface for one or two Integrated Device Electronics IDE hard disk drives 7B 310 1 J7 2 Figure 12 J7and J10 Connector layout To install the hard disk perform the following operations gt Hardware installation Connect the hard disk to the module using a data cable and then connect the hard disk to the power supply according to the device s specifications Make sure that pin 1 of the IDE connector and pin 1 of the drive or drives are correctly connected Pin 1 of the interface cable is usually indicated by a stripe along the edge of the cable If two hard disks need to be connected
4. lt 95 at 40 C 104 F Operating Temperature Range 0 C to 60 C 32 F to 140 F The CPU module with extended Operating Temperature Range version is also available Warning Stressing the device beyond the Absolute Maximum Ratings may cause permanent damage These are stress ratings only Operation beyond the Operating Conditions is not recommended Extended exposure beyond the Operating Conditions may affect device reliability MTBF Hours 231 000 Standard MIL STD 217 ground benign Temperature 25 0 C CPU 1421 MNL 0542 01 revA3 A 2 Mechanical Dimensions CPU Dimensions The CPU 1421 module s mechanical dimensions are shown in the following picture gt Dimensions 90 X 96 mm 3 6 X3 8 height 15 mm 0 6 61 lt 96 0 gt 10 0 30 9 3 7 6 4 PAD i 3 2 HOLE e 51 Te A A A A J niniin 7
5. No memory manager should be loaded HIMEM or EMM386 will cause errors with BTOOL The program is run at the command line by typing BTOOL or BTOOL EXE followed by an appropriate argument as described in the following pages If no arguments are used the following on line help page will be displayed Use Argument IS IL IU IG Filename IP Filename B Filename N Filename E Filename IDA IDB Notes FILENAME gt FILENAME gt FILENAME gt FILENAME gt BTOOL options gt Run Setup Program gt Lock Integrated Setup gt Unlock Integrated Setup Get Setup Data from system and save to file Read Setup Data from file and put to system Update BIOS Firmware BIOS Firmware SSD from Disk SSD from Disk SSD from Image Disk A Disk B Update Emergency gt Build Integrated gt Build Integrated gt Build Integrated gt Build Image from gt Build Image from Definition Run the Setup program without system Lock the Setup Program Unlock the Setup Program Gets the Setup Data from the system and save it in a file with the name FILENAME BIN This option takes Setup data from the file FILENAME BIN and stores it to the Flash EPROM This option updates the entire BIOS firmware with the version stored in the file named FILENAME BIN This option updates only the video BIOS firmware with the new version stored in the file named FILENAME BIN This option update
6. can be used How to connect the FPC floppy cable into the connector Step 1 Lift up the actuator Insert the Flat Printed Circuit cable so that the copper tracks face the PC 104 connector The FPC connector has contact pins on one side only The same is true for the connector on the FDD please refer to the FDD manual for further info If incorrectly connected the FDD will not function Step 3 Push down the actuator locking the cable firmly Note Reverse the procedure above to remove the FDD 33 J12 Ethernet 1 J12 implements a second connection for the Ethernet 1 port NOTE The Ethernet 1 port is also made available on connector J6 The user must choose either J6 or J12 not both in order to use this peripheral To establish an Ethernet connection you must use the Parvus Ethernet Adapter it must be connected between the CPU 1421 J12 connector and the RJ45 network cable a a _ O O 0 ATT O e J12 Figure 15 J12 Connector layout Network drivers The Ethernet is based on the Realtek RTL8139C chipset and is supported by most operating systems Pin Function Signal 1 Transmission Data TXOUT1 2 Transmission Data TXOUT1 3 Ground GND 4 Link LED LED1_1 5 Receive Data RXIN1 6 Receive Data RXIN1 7 Activity LED LEDO_1 8 3 3V VCC3 Table 10 J12 pinout CPU 1421 MNL 0542 01 revA3 Chapter 4 The Setup Program Note This Section refers to BIOS version 4_36_05
7. 19 D ADOO 5V ADO3 ADO6 GND M66EN AD12 3 3V PAR Reserved GND DEVSEL 3 3V C BE2 GND AD19 3 3V IDSEL2 IDSEL3 GND AD27 AD31 VI O GNTO GND CLK1 GND RST INTC GND MNL 0542 01 revA3 How to connect to the CPU other PC 104 amp PC 104Plus devices the stack assembly The ISA Bus connectors of the module are designed to allow the connection onto a stack of other PC 104 and or PC 104Plus devices We recommend you to follow the procedure below ensuring that stacking of the modules does not damage connectors or electronics parts Turn off power to the PC 104Plus system or stack Select and install standoffs to properly position the module on the PC 104Plus stack Touch a grounded metal part of the rack to discharge any build up of static electricity Remove the module from its anti static bag Check that keying pins in the bus connector are properly positioned Oy 191 2000 197 2 Check the stacking order make sure an XT bus card will not be placed between two AT bus cards or it will interrupt the bus s signals 7 Hold the module by its edges and orient it so that the bus connector pins line up with the matching connector on the stack 8 Press evenly the module onto the PC 104Plus stack The picture below shows a typical module stack with two PC 104Plus modules one PC 104 16 BIT module and one PC 104 8 BIT module The maximum configuration for the PCI bus of PC 104Plus modules is four plus the Ho
8. 2 or 3 inch permanent magnet speaker with an 8 Ohm voice coil The audio output is based on two signals the output of Timer 2 and the programming of two bits 0 and 1 at I O port 61h Bit 1 of I O port 61h is one term of a 2 input AND gate The other term is the output from Timer 2 Thus setting bit 1 to logic 1 enables the output of Timer 2 to the speaker and logic 0 disables it Disabling Timer 2 by setting bit O of port 61h to a O causes its output to go high Then you can use bit 1 of port 61h to control the speaker directly Ethernet 1 To establish an Ethernet connection you must use the Parvus ACS 9071 Ethernet Adapter it must be connected between the CPU 1421 J6 connector and the RJ45 network cable NOTE The Ethernet 1 port is also made available on connector J12 The user must choose either J6 or J12 not both in order to use this peripheral Network drivers The Ethernet is based on the Realtek RTL8139C chipset and is supported by most operating systems ACS 9072 00 Multifunction adaptor 29 J5 J J6 ES B2 FBI BAFI a ds SES LOS als R1 a RS Figure 11 ACS 9072 00 Top Bottom View Component Label Location Description Pins Format Pitch mm BT1 Bottom Battery 3 6V 60mAh
9. 4 section in RS422 MON ooooocccinncoconococnnnccccnnnnnonnnnnncnonnnnnnnnnnnnnnn nn cnn nn nr rra rra 23 Serial ports 3 and 4 section in RS485 MON ooooococcinncocococcconoccccnnnnnonnnnnncncnnnncnnnnnnnnnn nn cnn nn nr rr rra 24 J5 Serial 1 Serial 2 Ethernet2 2 Extra Timers and GPI O ocoococcccccncccccccnnnnnonnccnonnnnnconnnnnnnnnnccnnnnnnnnnninmnnnnnno 25 A TON 26 Watchdog Status 20 A A ad A iD 26 General RUIpOSO VO A ean ee ashe dt a eh abia 26 Elba aah i aes ethan aaa thaliana Oa leeks teeth 26 J6 Ethernet 1 Keyboard Speaker Mouse and Battery ccccccceeeeeeeeeeeeeeeeeeeeeeeeeeeecencaneeeeeeeeeeeesmaaeeees 27 Keyboard IPU aii ti a a ie Ga aie A Ace at ae 28 Mouse Input tosh cote covet atten AE ide a Sah te emir red se 28 SYSIGIN TOSCE E O NT 28 External Batlery IN PUlins ii eae e Raise setae eave A teeny hue ate etc 28 Speaker QUIPUE a sag A ne a hs aaa nach dete te tent ene Vetta th sheet easy 28 El Mii A uaa aa ees Aa lee eee 28 ACS 9072 00 Multifunction AC aptor 222 cccceccccecceceeeeeecenenneceeeeeeeeseescceaaaaeaeeeeeseesesecedensseeeeeeseremenseterentegs 29 J7 IDEF DOM iine aaar bain a ete ee ee ee a a 30 MIDE IED a ad NR a a 30 J8 Auxiliary Power Connector cccceececcccccceceeeeeeeeeeecceneeeeeeeeeeeesaaaaaeaeaeeeeeeeeeessegscceneaaeeeeeeemeseeeeeestseseeeineaeees 31 NA 32 How to connect the FPC floppy cable into the CONNEC OF ooooocccccnncccoooccccnnnccccnnnnnnonnnnccnnnncnn
10. Class B digital apparatus complies with Canadian ICES 003 Cet appareil num rique de la classe B est conforme a la norme NMB 003 du Canada CE Marking This equipment complies with the requirements for CE marking when used in a residential commercial vehicular or light industrial environment CPU 1421 MNL 0542 01 revA3 RAEE The information below is issued in compliance with the regulations as set out by the 2002 96 CE directive subsequently superseded by 2003 108 CE and refers electrical and electronic equipment and the management of their waste WEEE When disposing of a device including all of its components subassemblies and materials that are an integral part of the product you should take the WEEE directive into consideration packaging instruction literature and or the guarantee sheet By using this symbol it states that the device has been marketed after August 13th 2005 and implies that you must separate all of its This symbol has been attached to the equipment or in the case that this is not possible on the components when possible and dispose of them in accordance with local waste disposal legislations gt Because of the substances present in the equipment an improper use or disposal of the refuse can cause damage to human health and to the environment gt With reference to RAEE it is compulsory to not dispose of the equipment with normal urban refuse arrangements should be instigated for separate collection
11. active low Table 6 J5 connector pin out CPU 1421 MNL 0542 01 revA3 Timers Two 16 bit Extra Timers are provided with this CPU These extra timers are intended for most generic timing or counting applications such as generating periodic interrupts and measuring or counting external events Other features included are gt Clock source from the system clock The maximum clock is 33MHz 4 gt One interrupt output for each timer gt Several modes of operation Interrupt on terminal count Hardware re trigger mode Rate and square wave generation Continuous mode Watchdog Status It is possible to connect a device to view the watchdog status using these two pins For further information refer to Chapter 7 General Purpose I O The CPU 1421 supports three independently programmable Input Output signals GPIO these can be used to monitor signals or control external devices The GPIO signals can be programmed for the following functions Read as inputs default configuration after the reset Driven High or Low as outputs Ethernet 2 To establish an Ethernet connection you must use the Parvus Eurotech ACS 9095 Ethernet Adapter it must be connected between the CPU 1421 J5 connector and the RJ45 network cable Network drivers The Ethernet is based on the Realtek RTL8139C chipset and is supported by most operating systems 27 J6 Ethernet 1 Keyboard Speaker Mouse and Battery J6 implements the following f
12. and disposal gt For more detailed information about recycling of RAEE please contact your local waste collection body gt In case of illicit disposal sanctions will be levied on transgressors RoHS This device including all it components subassemblies and the consumable materials that are an integral part of the product has been manufactured in compliance with the European directive 2002 95 EC known as the RoHS directive Restrictions on the use of certain Hazardous Substances this directive targets the reduction of certain hazardous substances previously used in electrical and electronic equipment EEE Anti static precautions Always use appropriate antistatic precautions when handing any board This is to avoid damage caused by ESD Electro Static Discharge Conventions The following table lists the conventions that are used throughout this manual Icon Notice Type Description Information note Important features or instructions Warning damage to a program system or device or potential personal injury q Information to alert you to potential The Mode of the register R W Read and write register RO Read only register W Meaning of the register when written R Meaning of the register when read Hexadecimal numbers Hexadecimal numbers are indicated with an h suffix for example 11Ch Other NC Not internally connected Reserved Use reserved to Factory CPU 1421 MNL 0542 01 revA3
13. e not under Linux which erases the BIOS after the boot and autonomously manage the module hardware The functions implemented from the BIOS are INT 52h function OCh watchdog enabling with a fixed time of 2 seconds This function programs and immediately starts the watchdog counter INT 52h function ODh watchdog erasing Counting is interrupted and the watchdog is disabled INT 52h function OEh watchdog refresh Every call to this function restarts the counting from the initial value When the watchdog is activated the countdown starts immediately If no refresh occurs when the default timeout expires the board reset will be executed Therefore the watchdog must be enabled and continuously refreshed to avoid a board reset EXAMPLE MOV AH OCh INT 52h Enable the watchdog fixed timeout 2 seconds 55 This method must be used when the OS does not manage the BIOS i e Linux or when a personalized watchdog programming is required EXAMPLE How to change the Super I O SPIO FDC 37B782 watchdog registers CPU 1421 MOV MOV OUT MOV MOV OUT INC MOV OUT MOV MOV OUT INC MOV OUT MOV MOV OUT SPIO enter in configuration mode DX 03FOh SPIO Index Port AL 55h SPIO Configuration Mode Enable Key DX AL Enter in configuration mode Select Logical Device 8 watch dog DX 3FO0h SPIO Index Port AL 07h Logical Device selector is the register 7 DX AL Point to Logical Device selector D
14. 16 DACK3 A15 DRQ3 Table 3 Pin 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Use ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus J1 pinout MNL 0542 01 revA3 Signal A14 DACK1 A13 DRQ1 A12 REFRESH A11 ISACLK A10 IRQ 7 A9 IRQ 6 A8 IRQ 5 A7 IRQ 4 A6 IRQ 3 A5 DACK2 A4 TC A3 BALE A2 5 Volts 1 A1 OSC AO Ground 1 Ground 3 Ground 2 CPU 1421 Mm es PEN E E By Oo SCO ON OA RWHND O Use ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus Signal Ground 0 Ground 1 SBHE ISA_MEMCS16 LA23 10C16 LA22 IRQ10 LA21 IRQ11 LA20 IRQ12 LS19 IRQ15 LA18 IRQ14 LA17 DACKOH MEMR DRQO Table 4 Pin 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 J2 pinout Use ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus 17 Signal MEMW DACK5 SD8 DRQ5 SD9 DACK6 SD10
15. 26 COM3 RTS Request To Send 27 COM3 TX Transmit data 28 COM3 CTS Clear To Send 29 COM3 DTR Data Terminal Ready 30 COM3 RI Ring Indicator 31 COM3 GND Signal Ground 32 COM4 GND Signal Ground 33 COM4 DCD Data Carrier Detect 34 COM4 DSR Data Set Ready 35 COM4 RX Receive Data 36 COM4 RTS Request To Send 37 COM4 TX Transmit data 38 COM4 CTS Clear To Send 39 COM4 DTR Data Terminal Ready 40 COM4 RI Ring Indicator Serial ports 3 and 4 section in RS422 Mode Pin Port Signal Function In out 23 COM3 TX Transmit data Out 25 COM3 TX Transmit Data Out 27 COM3 RX Receive Data In 29 COM3 RX Receive Data In 31 COM3 GND Signal ground 32 COM4 GND Signal ground 33 COM4 TX Transmit data Out 35 COM4 TX Transmit Data Out 37 COM4 RX Receive Data In 39 COM4 RX Receive Data In Pins not shown in the table are not connected CPU 1421 Serial ports 3 and 4 section in RS485 Mode Pin 23 25 31 32 33 35 Port COM3 COM3 COM3 COM4 COM4 COM4 Pins not shown in the table are not connected Signal TX RX TX RX GND GND TX RX TX RX Function Transmit Receive data Transmit Receive data Signal ground Signal ground Transmit Receive data Transmit Receive data In Out In Out In Out In Out In Out MNL 0542 01 revA3 P gt Note When the Serial ports are used in RS485 mode the bi directional line must be controlled via software using the Data Terminal Ready DTR signal of the serial controll
16. A a eo laa aldea e e A SN E NN TIOS Ea O oo oa y A ame ooo booao oojo t booao om booo booo boog a 0000 2 l booo O 0100 mM Lo pooo Hood booo oa booo oa N BUD oojo t o Hono oojo m y gt booo ooo hooo og lo poo gonn O Hia Y poo jz y podo o l A E Phono Hooao 4 a booao booo G 7 N booao oa pooo oO Hood ooo N E J gt N oo 2 Te A o Q al olog olo olo alofjololololo ojolo a Lolo olof olof lololololololololololola v y Y AE 3 a 10 4 0 4 gt 57 8 5 1 gt 5 6 4 7 gt 30 5 mie 48 3 an 17 2 gt Dimensions are in millimeters Figure 16 CPU 1421 Board dimensions P gt Note For further information about the mechanical dimensions of ISA and PCI buses please refer to the pc104 consortium site www pc104 org For more information about this or other products in the Parvus line of embedded systems solutions call 801 483 1533 from 8 00AM to 5 00PM Mountain Time E mail us at sales parvus com or visit our web site at http www parvus com CPU 1421 MNL 0542 01 revA3 LIMITED WARRANTY Parvus Corporation warrants this product to be free of defects in materials and workmanship and that the product meets or exceeds the current specifications published by Parvus This Warranty is valid for a period of one 1 year from the date of purchase Parvus reserves the right to repair or replace any Warranted products at its sole discre
17. DRQ6 SD11 DACK7 SD12 DRQ7 SD13 5 Volts SD14 MASTER SD15 Ground 2 Not Connected Ground 3 MNL 0542 01 revA3 J3 PCI Bus Connector J3 carries signals of the PCI Bus The PCI Bus mechanical interface is a stackable 30x4 header This interface carries all of the required PCI signals per PC Local Bus Specification Version 2 1 Below is shown a picture of the PCI BUS J3 PCI Bus Figure 4 PCI BUS layout Unsupported PCI Bus Functions The following list summarizes some of the PCI bus functionality that is not supported in the CPU 1421 s PCI host bridge These functions are listed as optional in the PCI bus specification 66MHz is not supported 64 bit data is not supported 64 bit addressing dual address cycles is not supported due to the maximum 32 bit address space of the Am5x86 CPU Cacheable PCI bus memory SBDONE SBO is not supported The optional CLKRUN pin is not supported The LOCK pin is an optional pin not required in most systems because other mechanisms are typically employed for coherency Address data stepping is not supported as a master due to the performance implications The CPU does not support a downstream Southbridge device because most peripherals normally included in a Southbridge are integrated into the CPU The optional message signaled interrupt feature described in the PCI Local Bus Specification Revision 2 2
18. O Oo O o rf aja al Bao a Ed Y J2 ogjog aa J9 oO Oo O O 0 0 Ol o0 CD 12 CNO aal E DC P fou m J 310 00 e O B Alg 1 1 8883883888888888388888 O J6 Figure 2 Connector layout Connector Function Qty of pins Format Pitch mm J1 ISA Bus 64 PC104 32x2 2 54 J2 ISA Bus 40 PC104 20x2 2 54 J3 PCI Bus 120 PC104PLUS 30x4 2 00 J4 Parallel Serial3 and Serial4 40 Hirose DF13 20x2 1 25 Serial1 Serial2 Timer Watchdog 3 ES Status GPI O and Ethernet2 at PURER Bn i Ethernet 1 Keyboard Mouse E J6 Speaker and Battery 26 Pin strip 13x2 2 00 J7 IDE DOM 44 Pin strip 22x2 2 00 J8 Auxiliary power supply input 12 Pin strip 6x2 2 54 J9 Reserved 14 Pin strip 7x2 2 00 J10 IDE Led 2 Pin strip 2x1 2 00 J11 Floppy Disk 26 ZIF 26 1 00 J12 Ethernet 1 8 SIL 8 2 00 Table 2 Connector Functions 15 J1 and J2 the ISA Bus The ISA BUS Connectors J1 and J2 carry the signals for the ISA Bus These signals match definitions of the IEEE P996 standard Below is shown a picture of the ISA BUS Figure 3 ISA BUS layout According to the PC 104 specifications these connectors include KEY pins these are filled holes in the upper side and missing pins in the lower side of the bus This is done to avoid the wrong insertion in of another module Unsupported ISA Bus Functions The following ISA bus features are not supported Because the CPU itself does not support address pipelining address pipelining is not supported on
19. Other version may differ 12 2 Devices Sep 27 Communications ATAPI Units PCI amp ISA 1 44 MB Advanced None Error Handling None None Quit Present Disabled FD1 HDi Navigation Input Options As you can see from the diagram above the display is separated into 3 zones Main menu To the left is the Main menu this shows a list of possible Sub menus that can be selected Sub menu The right hand panel will change depending on the selected Tab in the Main menu Navigation Input options In the Lower right hand corner icons are displayed that show all the possible actions that you can perform with the selected Parameter or Tab 35 Navigation Keys In the lower right hand corner of the BIOS Setup screen you will notice a selection of icons these show what keys can be used with the currently selected item and they are as follows Icon Keys Use e Up Arrow e Go to the next field above y e Down Arrow e Go to the next field below 4 e Left Arrow e Go to the next field to the right b e Right Arrow e Go to the next field to the Left 4 e Enter e Select field to modify e Return Select an option i e Detect Now Accept a value you have entered Esc e Escape Cancel a value you are entering Go back to the Main menu PgDn e Page Down Select next option in a list e PgUp e Page Up Select previous option from a list e B e Numbers 0 to 9 e Enter a numerical number using 0 to 9 BackS
20. Table of Contents DisGlalime teeth aii eee A i eee ce a ea ea eiia 2 TPAC CIMALKS see socees arate o de E A 2 IMPORTANT INFORMATION TO THE USER 22 cccccccceeeeeeeeeeeeeeceaaeeeeeeeeeeeesecceccaeeeeeeeeeeeeesessesnsnneeeeeeemenees 3 Safety Notices and WarningS oooonicocccccnnnnnnininccnnnccccccnnn nn nr rn iE 3 RAEE id mee eta a da e 4 ROS A A A da i 4 Anti staticiprecaUIONS a chit A A ie 4 Conventions aone an A A A eed de ae 5 Table of Contents 0 ataca 6 Chapter 1 Product OVerView uc ia 9 Product Definition cota eet A a tE A es et id ae 10 CHOApter 2 nl LE E iecvedancnsecedecessaneseeduvabidangaccesdecssdunsagntcceneesieansenivacdacenstee 11 Jumper Layout and ConfiguratiON ooonnnonccnnnnncccccnnonencccnnonnnnconcnnnrn cnn a nn a a a a nr 12 Chapter 3 COMMCCEOMS 2 a 13 Connector Layo tt rrr etaa an da 14 Ji and J2 e SA BUS a NT 15 The ISA BUS hinaia oa a a i baat ea llenen ie aaan ea a ie een aaa aa s 15 VEO HA mA O M BUS A eal A E yearns Beetle 18 How to connect to the CPU other PC 104 amp PC 104Plus devices the stack ASSEMDIY cceceeeceeeeeeeeeeeees 20 J4 Parallel or FDD Serial3 and Serial4 ooo ccc eeeeeeeeeeeeeneeeeeeeeeeeeeeeeeaeeeeeseaeeeeeseeaaeeeesseaareeeeneeeeeeeeneeeers 21 Raralle FDD Se C O a sted econ iad a ped east eee aa a E a E 21 Serial ports 3 and 4 section in RS232 MO ooooococccnncoconocccnnncccccnannononnnccnnnnnnnnnnnnnnnnnn nn nn cnn nn rn ranma 23 Serial ports 3 and
21. X SPIO Data Port AL 08h Logical Device number 8 DX AL Select the Logical Device 8 Select the time base seconds or minutes DX 3FOh SPIO Index Port AL Fih Watchdog timer units register WDT_UNITS DX AL Point to register WDT_UNITS DX SPIO Data Port AL DX Read WDT_UNITS AL 01h Mask reserved bits and set time in seconds AL FEh Mask reserved bits and set time in minutes BL AL Save new WDT_UNITS value DX 3FOh SPIO Index Port AL Fih Watchdog timer units register WDT_UNITS DX AL Point to register WDT_UNITS DX SPIO Data Port AL BL WDT_UNITS value DX AL Write the new WDT_UNITS value Select the watchdog timer timeout value DX 3FOh SPIO Index Port AL F2h Watchdog timeout value WDT_VAL DX AL Point to register WDT_ VAL DX SPIO Data Port AX 37 New WDT_ VAL value from 0 to 255 seconds in this case DX AL Write the new WDT_ VAL value SPIO exit from configuration mode DX 3FOh SPIO Index Port AL OAAh SPIO Configuration Mode Disable Key DX AL Exit from configuration mode MNL 0542 01 revA3 Note For further information about the watchdog programming refer to FDC 37B78x Advance Information manual from SMSC Watchdog time out pin For external control purposes the status of the Watchdog timeout event is provided on connector J11 pin 9 This signal goes high when the watchdog resets the system The software can reset this s
22. ced Error Handling Quit Disabled 32 Possible selections Memory at 0C8000h OCFFFFh e Reserved for PCI Memory at 0D0000h OD7FFFh e Available on ISA Memory at 0D8000h ODFFFFh ISA Irq for PCI INT_A Share 2 e List of available IRQ numbers ISA Irq for PCI INT_B Share 2 ISA Irq for PCI INT_C Share 2 ISA Irq for PCI INT_D Share 2 Bus Mater Devices e Disabled e Enabled Latency Time Devices e 0 255 41 Advanced General Disabled Devices Communications 133 MHz ATAPI Units Write Back PCI amp ISA Disabled 2 vanced Error Handling Quit Option Possible selections e Enabled e 133 MHz L1 Cache Mode Write Back Write Through Watch Dog start at boot e Disabled e Seconds e Minutes Watch Dog Timeout gt 2 e 2 255 Note Watch Dog Timeout can be set to between 2 amp 255 seconds or 2 amp 255 minutes as defined by Watch Dog start at boot parameter CPU 1421 MNL 0542 01 revA3 Error Handling General Prompt Devices Prompt Communications Prompt ATAPI Units Prompt PCI amp ISA Prompt Possible selections Error on Keyboard e Ignore Error on Video e Prompt User Error on Floppy Disc Error on Fixed Disc Error on Real Time Clock 43 Quit General Prompt Devices Prompt Communications Prompt ATAPI Units Prompt PCI amp ISA Prompt Advanced Error Handling Quit Pressing the Enter or Return keys when Quit is selected the following will be displaye
23. cusco aa Whaat cite At AA A A Beast ali ad 62 Chapter 1 Product Overview CPU 1421 is a highly integrated PC 104 Plus CPU module based on the AMD Elan SC520 133MHz microprocessor Related Products Available e Development kit for CPU 1421 e TP RJ45 Ethernet adapter e 2mm to 2 54mm IDE cable e Parallel FDD adapter cable e IDE to ATA adapter kit e Standard interface cable kit e Flat panel adapter kit For a complete list of our products visit our website www parvus com CPU 1421 MNL 0542 01 revA3 Product Definition Architecture PC PCl Architecture with ISA bus Dimensions Compliant with the PC 104 Plus standard Processor AMD Elan SC520 133MHz Memory 64 128 MB SDRAM soldered onboard Solid State Disk Disk On Module Compact Flash or ATA Flash Operating System Compatibility WinCE VxWorks Linux and QNX BIOS Flash 1MB 8bit 5V Flash EPROM Interfaces e IDE controller e Floppy Disc controller e Two 10 100Mbit Ethernet controllers e Four 16C550 compatible serial ports 2 RS 232 485 422 software configurable 2RS 232 fixed Parallel port bi directional EPP ECP Two 16 bit user Counter Timers AT keyboard PS 2 mouse Bus PCI ISA PC 104 Plus compliant ISA bus with limitations Power Supply 5V only Chapter 2 Jumpers 11 This chapter shows the jumper layout and explains how to setup each individual jumper CPU 1421 MNL 0542 01 revA3 Jumper Layout and C
24. d Save data to EEPROM Discard changes Option Notes The Module will then reboot The Module will reboot with the original settings Note When quit has been selected it is not possible to return to the configuration pages you must reboot the system and re enter the BIOS using F2 during the initial boot sequence CPU 1421 MNL 0542 01 revA3 Chapter 5 BTOOL Program and Solid State Disk This chapter explains how to use the BTOOL Program and gives information about the Integrated Solid State Disk Warning The BTOOL Program can be different for each CPU and each BIOS version For the latest version visit the site www parvus com When you download a new BIOS revision you should also find the latest copy of BTOOL enclosed in the package this will be the correct version to use with the BIOS it should not be used with other revisions older or newer BTOOL is a utility used to update the BIOS Flash EPROM it can be used for the following tasks gt Upgrading the BIOS gt Installation of a MiniDOS compatible program into the Flash Integrated SSD gt Installing a BIOS Extension onto the flash device PLEASE NOTE The BTOOL program should only be run in the MS DOS environment not a DOS WINDOW we advise the creation of a bootable MS DOS floppy disc The following precautions should be taken into consideration Power assured during all the program executions AUTOEXEC BAT and CONFIG SYS should not have any parameters
25. e property of their respective owners IMPORTANT INFORMATION TO THE USER Before proceeding further please carefully read the following paragraphs Safety Notices and warnings FCC information and compliance This device has been designed to comply with the limits of a Class B digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference The device generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications or to devices that are not appropriately shielded Parvus is not responsible for any radio or device which may be affected by harmful interference Appropriate shielding of susceptible devices is not the responsibility of Parvus Further Parvus is not responsible for unauthorized modifications of Parvus equipment including the substitution or attachment of cables and or other unauthorized equipment If electrical interference is harmfully affecting a device it is the responsibility of the user to correct this interference In order to minimize the affects of electrical interference use only shielded data cables with the system In accordance with FCC 15 21 changes or modifications not expressly approved by the party responsible for compliance could void the user s authority to operate the equipment Emissions information for Canada This
26. ect pin 4 to the 12VDC and pin 6 to the 12VDC sources on the AT Power Supply Unit only if requested by other boards connected to the PC 104Plus ISA bus see the following note ATX Power Supply gt Connect pin 1 and pin 7 to the ground signal of the ATX Power Supply Unit gt Connect pin 2 and pin 8 to the 5VDC source on the ATX Power Supply Unit gt Connect pin 4 to the 12VDC and pin 6 to the 12VDC sources on the ATX Power Supply Unit only if requested by other boards connected to the PC 104Plus ISA bus see the following note Power button If the soft power management is enabled a low signal in this pin turns the system on or off Note The 12VDC and 12VDC voltages are neither used nor generated by the CPU 1421 module they are only conveyed on the PC 104Plus bus connector J1 and can be used by other devices or modules that are stacked onto the CPU module A WARNING IMPROPER CONNECTION OF THE POWER SUPPLY WILL RESULT IN SERIOUS DAMAGE TO THE MODULE CPU 1421 MNL 0542 01 revA3 J11 Slim FDD This connector can only be used to connect a Slim FDD and it is composed of two parts The upper part the Actuator and the lower part the Receptacle ACTUATOR Figure 14 J11 Connector layout The connection between the FDD and the module is established by using a Flat Printed Circuit FPC cable the floppy controller must be enabled in the set up program before the FDD can be used and also only one FDD
27. er This signal is defined by bit O of the UART Modem Control Register MCR and the bi directional line is controlled as follows Bit 0 of the MCR register 0 means RS485 line receiving Bit 0 of the MCR register 1 means RS485 line transmitting The I O address of the MCR is Serial port Base address 4H 25 J5 Serial 1 Serial 2 Ethernet2 2 Extra Timers and GPI O J5 implements the following functions gt Serial1 and Serial 2 RS232 only gt 2 Extra Timers gt Watchdog Status gt General Purpose I O gt Ethernet 2 J5 i a a see ES Ba e i Figure 9 J5 Connector Layout Pin Function Signal Pin Function Signal 1 Timer 0 TMRINO IRQ8 21 Not Connected GND 2 Timer 0 TMROUTO 22 Not Connected GND 3 Timer 1 TMRIN1 23 Serial 1 DCD1 4 Timer 1 TMROUT1 24 Serial 1 DSR1 5 Watchdog Status WDTL 25 Serial 1 RX1 6 Watchdog Status GND1 26 Serial 1 RTS1 7 GPI O GPI 014 27 Serial 1 TX1 8 GPI O GPI 015 28 Serial 1 CTS1 9 GPI O GPI1 013 29 Serial 1 DTR1 10 GPI O GND 30 Serial 1 RI1 11 Ethernet 2 LINK_B 31 Serial 1 GND 12 Ethernet 2 ACTIVITY_B 32 Serial 2 GND 13 Ethernet 2 TXOUT2 33 Serial 2 DCD2 14 Ethernet 2 TXOUT2 34 Serial 2 DSR2 15 Ethernet 2 RXIN2 35 Serial 2 RX2 16 Ethernet 2 RXIN2 36 Serial 2 RTS2 17 Ethernet 2 VCC3 37 Serial 2 TX2 18 Ethernet 2 GND 38 Serial 2 CTS2 19 Not Connected 39 Serial 2 DTR2 20 Not Connected 40 Serial 2 RI2 The symbol ff stands for
28. es you want to redirect and which port serial or parallel you will be using Execute the command VP2000 TYPEEN v k d c a Option Function TYPE COM Use serial port cable LPT Use Parallel port cable N When using COM 1 Use Serial port at 3F8h no IRQ 2 Use Serial port at 2F8h no IRQ 3 Use Serial port at 3E8h no IRQ 4 Use Serial port at 2E8h no IRQ When using LPT 1 Use Parallel port at 378h no IRQ 2 Use Parallel port at 278h no IRQ 3 Use Parallel port at 3BCh no IRQ Iv Re direct Video Ik Re direct Keyboard Id Re direct Floppy disc A Ic Re direct Console Video amp Keyboard la Re direct All Video Keyboard Floppy Disk A 53 How to perform a Virtual Peripheral session To perform a Virtual Peripheral session you need e A free Serial Port configured as RS232 on the CPU module e If invalid configuration or the invalid set up jumper is installed you must use only one of the Serial Ports that are RS232 fixed not RS232 422 485 selectable e f you choose the Parallel Connection you must not configure the CPU s Parallel Port as Floppy Disk e The appropriate Serial or Parallel VP cable e APC compatible computer to be used as host this computer must have a free RS232 Serial Port or a free Parallel Port configured as Bi directional or ECP use host computer BIOS Setup program to check or change the Parallel Port configuration e The Host Computer must be
29. eted cycle the power to finalize the operation Note You may need to enter the Setup program using F2 during the boot sequence to configure the system as required for example setting up the SSD as a boot device CPU 1421 MNL 0542 01 revA3 Chapter 6 Virtual Peripheral Parvus Eurotech CPU Modules are designed for use in stand alone mode i e without keyboard mouse video or other I O peripherals connected Therefore to simplify maintenance operations users can easily make I O peripherals available by using Virtual Peripheral mode by doing this the CPU Module inherits the I O peripherals from another compatible computer called the Host computer connected through a serial or parallel cable To make this possible the VP2000 DOS program must be running on the Host computer 49 How Virtual Peripheral works The Virtual Peripheral is a software solution implemented at BIOS level BIOS service functions called to handle the keyboard video and floppy disk devices are converted into messages forwarded to the Host computer through the communication channel using a proprietary packet protocol When the Operating System or the user s program deals with the keyboard video or floppy disk drive it actually deals with host computer s devices There are no hardware traps to intercept accesses to these devices so Virtual Peripheral works only if operating system and application programs use BIOS calls to work on t
30. hem without directly accessing the relative I O ports and memory areas CPU 1421 MNL 0542 01 revA3 Choosing the Virtual Peripheral connection type There are two ways to perform a Virtual Peripheral connection 1 Serial connection 2 Parallel connection Serial Connection Requires a RS232 RX TX cable with special wiring on CPU end of the cable Connection is made at 112000 bits sec Connection works on any CPU serial port that is configured for RS232 mode In case of bad configuration data or if the invalid set up is running VP connection works only on the port that only supports RS232 this avoids troubles if RS422 RS485 devices are connected The following illustration shows how to make a Serial VP cable connection HOST COMPUTER Short RTS with CTS or DTR with RI CPU Module gt short circuit Serial Port Serial VP cable This VP cable must be made observing the connections explained in the following table The following table shows the connections required for the cable we assume that the user is using DB9 cables Table 1 Serial Virtual Peripheral cable signals Connector Pin Signal Description DB9 Host Computer Note J4 35 RX Receive Data 2 J4 27 TX Transmit Data 3 J4 26 RTS Y Request to Send Not Connected To J4 Pin 28 J4 28 CTS 3 Clear To Send Not Connected To J4 Pin 26 J4 29 DTR Y Data Terminal Ready Not Connected To J4 Pin 30 J4 30 RI 3 Ring Indicator Not Connected T
31. ignal by setting and resetting bit 2 of the I O port 110h This signal is also initialized by hardware at power on EXAMPLE How to reset the watchdog time out pin MOV IN OR OUT AND OUT a Xilinx XC9572XL with the following characteristics DX 110h Control Port AL DX Read actual value AL 04h Mask reserved bits and set bit 2 DX AL Write new value AL FBh Mask reserved bits and reset bit 2 DX AL Write new value Characteristic Recommended operation condition DC characteristics Value Vomax 3 3 V dc Voh min 2 4 V dc test condition loh 4 mA Vol max 0 4 V dc test condition lol 8 mA The signal is directl y conne cted to an output pin of 57 Chapter 8 Troubleshooting Technical Sales Assistance If you have a technical question or if you cannot isolate a problem with your PC 104 system please call or e mail the Parvus Technical Support gt Email tsupport parvus com gt Phone 1 801 483 1533 gt Fax 1 801 493 1523 If you have a sales related question please contact your local Sales Representative Returning For Service Before returning any Parvus product you must contact Parvus to obtain a Returned Material Authorization RMA number gt Note You must have the RMA number in order to return any product for any reason Pack the module in an anti static material and ship it in a sturdy cardboard box with enough packing material to adequately c
32. ipheral session cccceeececeeeeeeeeeeeeeeceeeeeeeeeeeeeeeeeeceaaaeeeeeeeeeeteteceeseeeeeeeeeeeeaes 53 To perform a Virtual Peripheral session you NCCA cccceeeecececeeeeeeeteeeeensneeeeeesenecsessuensseeeeseeeeentemantees 53 Follow these steps to perform a Virtual Peripheral session 2222 c cccccceeeeeeeeeensneeeeeeeeeeeneesenesnneneeseeennes 53 Chapter 7 Watchdog Timer sissioni dinadaan edita 54 WalGhdog Modasi orar Ee E ros 54 BIOS INT 52h functions OCh ODA OED 2222 scccccceeeeeeeenensnneeeeeeseeeeesseccanaeaeeeseeeesssseeceesaeseseesermsssseteees 54 Super I O registers programing rre itirir iiitr prine Eiee NENN AA EENES ERE EENEN EEEE EEEE ETT EAN 55 Watehdag tiroe out T rrr A eor oinn aaa NE E REA A E E AAEE aves EARE EAEE OEKE RRA 56 Chapter 8 lt TroubleShooting i iccsscccccsccceececesescecectcccerseeecevsventieceecteaceeveresansutucacedecvesteseuvestecetiedstesesevaveenseceeeds 57 Technical Sales ASSISTaMCO iii 57 CPU 1421 MNL 0542 01 revA3 Returning For Servia iii ia 57 APPO A ias 58 A 1 Electrical and Environmental Specifications oooccconnnncononncccnnnncccnnnnnnnnonnccnnnnnnnnnnnnnnnnnnnnnnnnnnnninmenin 58 Operating CharacleriStiCs cisternas biliares 58 Absolute Maximum RAMIS tai ii 59 MABE EEA till lalala ias baplarase 59 A 2 Me chanical DIM NSIONS cocina dada 60 CPU DIMENSIONS srs TE nto shascis satassyoas casebbeaaddestanlad icon 60 LIMITED WARRANTY
33. is not supported in the CPU 1421 Unsupported PCI Bus Configuration Registers Some standard PCI bus configuration registers are not implemented because the CPU is a host to PCI bridge and does not support some optional PCI functionality Base Address registers are not implemented because the CPU is the host PCI device Target address space configuration is done through CPU specific configuration Latency timer and MAX_LAT MIN_GNT are not implemented because the CPU s PCI host bridge does not support multiple data phase transactions as a master Cache line size is not implemented because the CPU PCI host bridge does not support cacheable PCI memory D For further info about ISA bus and PCI bus please refer to www pc104 org Pin ONOaRWHN ONNNNNNNNNDNBD 22 AB Ba ABA AB A no COON OO RWNH RB OCOD AN ODO RWHND O CPU 1421 A GND VI O ADO5 C BEO GND AD11 AD14 3 3V SERR GND STOP 3 3V FRAME GND AD18 AD21 3 3V IDSELO AD24 GND AD29 5V REQO GND GNT1 5V CLK2 GND 12V 12V B Reserved ADO2 GND ADO7 ADO9 VI O AD13 C BE1 GND PERR 3 3V TRDY GND AD16 3 3V AD20 AD23 GND C BE3 AD26 5V AD30 GND REQ2 VI O CLKO 5V INTD INTA REQ3 Table 5 Cc 5 AD01 AD04 GND AD08 AD10 GND AD15 Reserved 3 3V LOCK GND IRDY 3 3V AD17 GND AD22 IDSEL1 VI O AD25 AD28 GND REQ1 5V GNT2 GND CLK3 5V INTB GNT3 J3 pinout
34. nnnnnnnrnnnnncnnnnnns 32 J12 El A a a din 33 Chapter 4 Th Setup PrograMn s ica ii Aras iia 34 UE SA NN 34 SUD Uta ii a IAS e ts aia Da Ue baa tara ee 34 Navigation s Input OPtulOnS xsi s220 esos tat fae se Paget saa ae aa ed A eee ga che epee deed et 34 Navigation Keys ii A ota atta ine at A A EN 35 SEN E Ee l EE A A sees bee en detect pia eu aan At at EE E A ANAE tee Led A A ite bea conte 36 DEVICE a ie eR eee 37 COMMUNICA MON St ait oie E a a Mind pate eee coa 38 ATAP UNIS tri ii o titi 39 PECES A utilidad 40 NN A NN 41 AS o a eeteedl a Sos amen es 42 UI eee te ce acd od le Ca eaten ce eae atl NENE ay brea deg cee odo T 43 Chapter5 BTOOL Program and Solid State DisSk cooomcnnnnoccccnnncccnnnnnnnnnancccnonnncnnnnnnnnannnnnnnn nn nc nnnnnnnnnnns 44 The BTOOL prog Mica n 44 The Integrated Solid State Diek coord 47 Chapter6 Virtual Peripheral s 0 2 2ccceceesecestenceceececdveicrzaceceishcacesstcedenssannecdeecsustecdecennedecesncnceeetegesvessminaselccdecer 48 How Virtual Peripheral WOFKS ccccccccceeceeeecncceeeeeeeeeeeeeeecenaeeeeeeeeeeeeeseeceaaaeeeeeeeeeeeesecceccceaeeeeeeseeeesesecsaneeeeees 49 Choosing the Virtual Peripheral CONNECTION type ooocccccinocccccconoccccnnononnncnnnnnnncnnnnnnnn nc nn nan nn cnn ran nn c rara n nn ca rnnnn nn 50 Ona CONNECT A ASA A ANNES 50 Parallel CONE CLONE ee ia A RO Oia usa ieeee se 51 The YP2000 EXE prod Meri a T ENT TE EERE E E 52 How to perform a Virtual Per
35. nto host computer drive the CPU Module will try to boot from it e To exit VP2000 program press the Print screen key e You can hardware reset the CPU Module or recycle its power without exiting and restarting VP2000 AS During a Virtual Peripheral session Do not press the Ctrl Alt Del key combination on the host computer keyboard the result will be a reboot of the host computer not of CPU Do not use the DOS format command under Virtual Peripheral mode it will not work Do not disconnect and then reconnect the communication cable the hardware might be seriously damaged Remember that Virtual Peripheral is only intended for maintenance and upgrade operations if you need a remote operative console Virtual Peripheral is not a good solution CPU 1421 MNL 0542 01 revA3 Chapter 7 Watchdog Timer This chapter describes the configuration of the Watchdog Timer with examples The watchdog is a part of the onboard PC87364 SUPER I O device The Super 1 0 watchdog allows users to manage timeouts in measured in seconds or minutes depending on the Super I O programming Watchdog modes The watchdog function resets the board at the end of the countdown sequence There are two ways to program the watchdog e Using BIOS INT 52h e Using direct Super I O registers programming BIOS INT 52h functions 0Ch 0Dh OEh This method can be used under DOS or an Operating Systems using the boards BIOS i
36. o J4 Pin 29 J4 31 GND Ground 5 51 Parallel Connection Requires a complete DCC Parallel Port cable Requires a compatible computer with Parallel Port configured either as Bi directional or ECP The theoretical transfer rate is ISA Bus transfer rate 6 because 6 ISA Bus cycles are required for each transferred data byte n case of bad configuration data or if the invalid set up is running VP connection will not work The following table explains how the Parallel VP cable connections have to be made HOST COMPUTER CPU Module Parallell VP cable Parallel Port This VP cable must be made observing the connections explained in the following table Table 2 Parallel Port Virtual Peripheral DB25 DB25 cable signals Connector Pin Pin Signal Host Computer pin J4 1 1 Strobe 10 J4 8 14 Auto Feed 11 J4 3 5 7 9 11 13 15 17 2 9 Data BitO 7 2 9 J4 16 16 Printer Init 12 J4 4 17 Select 13 J4 19 10 Acknowledge 1 J4 21 11 Busy 14 J4 2 12 Paper End 16 J4 4 13 Select 17 J4 6 10 14 18 18 25 Ground 18 25 Pins not included in the table above are not connected CPU 1421 MNL 0542 01 revA3 The VP2000 EXE program The VP2000 can be downloaded from the Parvus website www parvus com The program only works in the DOS operating environment it functions better without any keyboard or memory management device drivers loaded Select the following options based on which Host computer devic
37. ompleted cycle the power to finalize the operation Note You may need to enter the Setup program using F2 during the boot sequence to configure the system as required 47 The Integrated Solid State Disk A portion of the Flash EPROM can be used as an Integrated Solid State Disc SSD This Integrated SSD is like a write protected floppy disk Depending on the CPU module used the size of this disc may vary refer to Table 11 before use data needs to be written to it using the BTOOL program CPU Module SSD Size CPU 1421 768 KB Table 11 SSD Size EXAMPLE 2 Creating an image of a floppy disk into the Integrated SSD 1 Create the image disk copy any files and directories that you require 2 During this copying process take care not to delete any files or data from the floppy disc doing so will create empty sectors and these will be mirrored onto the SSD wasting space Take care not to exceed the SSD Size refer to Table 11 Type the following command at the DOS prompt BIOS BIN is only an example filename check the name of the file that came with the download e BTOOL DA BIOS BIN The program will ask you to insert the image disk into drive A Follow all the instructions the BTOOL gives you the program will proceed by erasing the Flash device blocks and then writing and verifying them with the data present on the image disk BTOOL will inform you about the result of the operation Once compl
38. onfiguration Figure 1 shows the jumper layout of the CPU 1421 module Jumpers are shown as JP followed by the jumper s number a red square pad indicates pin 1 of the 3 pin jumper PIN JP1 JP2 JP3 JP4 JP5 Type 2 pin 2 pin 2 pin 2 pin 3 pin JP3 O O JP1 88 JP2 O 8 JP5 O Lo JP4 Figure 1 Jumpers and solder jumpers Function External Bios Invalid Setup Module Reset Reserved Ethernet Controller Table 1 Jumper Functions Settings Open Module starts with internal BIOS Closed Module starts with External Bios Open Module starts with saved parameters Closed Module starts with default settings When these two pins are shorted the system will reset 1 2 Ethernet 1 Disabled 2 3 Ethernet 2 Disabled Open Ethernet1 and Ethernet2 Enabled Default Open Open Open Open Open 13 Chapter 3 Connectors This chapter provides a brief description of each connector found on the CPU 1421 with their position and function CPU 1421 MNL 0542 01 revA3 Connector Layout Figure 2 shows the connector layout on the CPU 1421 along with their function Connectors are shown as J followed by its designated number a red square pad indicates pin 1 of each connector J4 j Heee pg O T T oo oo og oojo g oa 41 aja Ol OOOO O ao a J11 oO Oo O
39. pace e Backspace e Erase last character entered CPU 1421 MNL 0542 01 revA3 General 12 2 Devices Sep 27 Communications ATAPI Units PCI amp ISA 1 44 MB Advanced None Error Handling None None Quit Present Disabled FDi HDi NET Sub Option Possible selections 00 23 e 00 59 e 00 59 e Jan Dec e 01 31 e 2006 2999 Floppy Disc 1 e None Floppy Disc 2 e 360 KB Floppy Disc 3 e 1 2MB Floppy Disc 4 e 720KB e 1 44MB e Integrated SSD Not Present e Present e Enabled Boot Try Sequence e FD1 HD1 NET e NET FD1 HD1 e HD1 FD1 NET e CD ROM FD1 HD1 Notes Floppy Disc X e Drive letters are assigned consecutively starting from A e We suggest that it is good practice to use Floppy Disc 1 before using Floppy Disc 2 etc e The Integrated SSD is a read only device Quick Boot e Quick Boot will take less than 5 Seconds this is done by skipping the following tests e System memory pattern test e Keyboard detection e Floppy disk presence seek test e RTC time test 37 Devices General Enabled on Jii Enabled Communications ATAPI Units Enabled PCI amp ISA Enabled Advanced Error Handling Enabled Quit Option Possible selections Floppy Controller e Disabled e Enabled on J4 Parallel port Enabled on J11 Enabled e Always use integtated Network Adapter 1 e Disabled e Enabled Boot Firmware PS 2 Mouse e Disabled e Enabled pO RQ List of available IRQ numbers
40. running DOS Operating System If not available on its hard disk you must create a DOS floppy disk and then boot from it Do not put any memory manager or keyboard driver on that floppy e The Parvus VP2000 program Save it on the hard disk or on the just created floppy disk Follow these steps to perform a Virtual Peripheral session Make sure the CPU Module and the host computer are switched off Connect the CPU Module and the host computer together using the VP cable Turn the host computer on and boot DOS At the DOS prompt start the VP2000 exe program using the command line options as listed above in order to choose the Serial or Parallel Port you want to use and the peripherals you want to connect to the CPU e Turn on the CPU Module Note that when you turn on the CPU Module the VP2000 program must be already running on the host computer If you start running the VP2000 program later the Virtual Peripheral connection will not work e If you have chosen to redirect the Video then CPU Module s video output will be redirected to host computer screen where you will see the CPU BIOS Banner and POST information e If you have chosen to redirect the Keyboard then you must use the host computer s keyboard to enter set up pressing F2 or to continue boot pressing F1 e Ifyou have chosen to redirect the Floppy Disk then CPU Module will see host computer Floppy Disk as its own Floppy Disk A If you have a diskette inserted i
41. s the Emergency BIOS Firmware with the new version stored in the file FILENAME BIN this option is This option creates the image of the Floppy A on the Integrated SSD This option creates the image of the Floppy B on the Integrated SSD needing to reboot the 1 All files are stored in a binary format BIN 2 The BTOOL program should always be followed by a hardware reset Pressing CTRL ALT DEL is not sufficient It is necessary to cycle the power on the module to complete the operations CPU 1421 as B 7 45 Notes Not available with the CPU 1212 MNL 0542 01 revA3 EXAMPLE 1 Updating the BIOS Following is an example of how to update the BIOS on your CPU module Visit the Parvus website and download the latest BIOS revision Unzip and store the BIOS and BTOOL files to your bootable DOS floppy disc Insert the floppy disc into the floppy disc drive attached to your CPU module Boot the system to the DOS prompt ak wn gt Type the following command at the DOS prompt BIOS BIN is only an example filename check the name of the file that came with the download e BTOOL B BIOS BIN The program will store the new BIOS version to the CPU EPROM Follow all the instructions the BTOOL may give you the program will proceed by erasing the Flash device blocks and then writing and verifying them with the data present in the Binary file BTOOL will inform you about the result of the operation Once c
42. sc drive adaptor the ACS 6000 CPU 1421 MNL 0542 01 revA3 HOW TO USE THE PARVUS EUROTECH ACS 6000 FDD ADAPTOR There are two configurations available in the Parvus FDD Adaptor gt Female configuration gt Male configuration Connector Use Notes JIA Male configuration For connecting to a Floppy Disk Flat Cable J1 Female configuration For direct connection to a Floppy Disk Drive J2 Power supply 5V used by the adaptor This is NOT for powering the Floppy Disc Drive J3 Parallel Port Flat Cable Connector To the FDD Cable Connector Beeoeeeeeveeeeeeee8 J1 Female Config JIA Male Config Power Supply j2 Ga O GND PIN1 JA 5V PIN2 E T 1 J3 To the Parallel Port Figure 7 The ACS 6000 Adaptor layout WARNING TO AVOID MALFUNCTIONS BE CAREFUL TO CONNECT THE FLOPPY DRIVE CABLE IN THE FOLLOWING WAY Commonly found Floppy Drive cables are structured as shown in the following picture With this type of cable only the second connector can be connected to the Parvus Floppy Disk Drive Adaptor The FDD connector end of the cable is connected to the rear connector of the Floppy Drive To FDD To FDD connector adapter Figure 8 Floppy Drive Cable 23 Serial ports 3 and 4 section in RS232 Mode Pin Port Signal Function 23 COM3 DCD Data Carrier Detect 24 COM3 DSR Data Set Ready 25 COM3 RX Receive Data
43. st Board If standard PC 104 modules are used in the stack they must be the top module s because they will normally not include the PCI bus Stackthrough 8 bit modul ee 0 435 in 11 mm oy Stackthrough 0 6 ini 15 mm 16 bit module Stackthrough PC 104Plus module 0 100 in 2 54 mm 0 062 in 1 57 mm Non Stackthrough o jj PC 104Plus module Figure 5 The Module Stack Do not force the module onto the stack Wiggling the module or applying too much pressure may damage it If the module does not readily press into place remove it check for bent pins or out of AN place keying pins and try again 21 J4 Parallel or FDD Serial3 and Serial4 J4 implements the following functions gt Parallel FDD port gt Serial ports 3 and 4 these ports are RS232 RS422 or RS485 selectable Parallel FDD section The user can choose the Parallel port or the FDD setting using the Setup Program Pin 1 3 5 7 9 11 13 15 17 19 21 5 Figure 6 Signal STROBE PDO PD1 PD2 PD3 PD4 PD5 PD6 PD7 ACK BUSY J4 Connector Layout Pin 2 4 6 8 10 12 14 16 18 20 22 Signal PE SLCT GND1_LPT AUTOFD GND2_LPT ERROR GND3_LPT INIT GND4_LPT SLCTIN Not Connected The symbol ff stands for active low In order to simplify the connection between the parallel port and a floppy disk drive Parvus makes available a Floppy di
44. the ISA bus External master access is not supported and the CPU is always the master on the ISA bus external masters can be accommodated by the PCI bus GPIOCS16 and GPMEMCS16 do not cause the ISA bus timings to change for the bus cycles during which these signals are asserted IOCHRDY is supported only as an input for the slave devices that require wait states Since there is no external master support IOCHRDY is not supported as an output IOCHK is not supported The REFRESH pin is not supported NOWS is not supported IRQ15 is not supported By customer request a special setting can be made to support IRQ15 however that would make IRQ9 unavailable The factory can only perform this special setting The ISA bus interface timing is configured to support most ISA bus devices However the CPU 1421 s ISA bus does not support all legacy ISA timing CPU 1421 H N NN NN NN AB Ba a a a a a CO Use ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus Not Connected ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus ISA Bus Signal IOCHK Ground D7 RSTDRV D6 5 Volts D5 IRQ 9 D4 5 Volts D3 DRQ2 D2 12 Volts D1 ZEROWS DO 12 Volts IOCHRDY Key AEN SMEMW A19 SMEMR A18 lOW A17 IOR A
45. they must be configured for common operation i e master slave or cable select connection gt IDE BIOS Setup The hard disk parameters can be configured using the Setup program If the hard disk is connected to the module without set up configuration or with a wrong set up configuration a time out for a few minutes occurs then the boot is performed from the floppy disk gt Software initialization for specific operating systems Refer to the OS documentation m It is possible to connect an LED to the J10 connector that displays the IDE activity Pin Signal Function 1 IDE Led anode IDE Led anode 2 IDE Led cathode IDE Led cathode Table 8 J10 pinout 31 J8 Auxiliary Power Connector One auxiliary power connector is available on the CPU 1421 module this can be used to power the module as an alternative to the PC 104Plus bus O PO Figure 13 J8 Connector layout Pin Signal Pin Signal 1 GND 7 GND 2 VDD 5VDC 8 VDD 5VDC 3 Not Connected 9 GND 4 12VDC 10 Not Connected 5 5VSB 11 Not Connected 6 12VDC 12 Not Connected Table 9 J11 pinout The number and position of the pins that have to be connected depends on the Power Supply model Refer to the following to ensure the correct connections AT Power Supply gt Connect pin 1 and 7 to the ground signal of the AT Power Supply Unit gt Connect pin 2 and 8 to the 5VDC source on the AT Power Supply Unit gt Conn
46. tion Any product returned to Parvus for repair or replacement under the provisions of this warranty must be accompanied by a valid Return Material Authorization RMA number issued by the Parvus Customer Service Department Parvus Corporation makes no warranty not expressly set forth in this document Parvus disclaims and excludes all implied warranties of merchantability and fitness for a particular purpose The aggregate liability of Parvus arising from or relating to regardless of the form of action or claim is limited to the total of all payments made to purchase the product Parvus shall not in any case be liable for any special incidental consequential indirect or punitive damages even if Parvus has been advised of the possibility of such damages Parvus is not responsible for lost profits or revenue loss of the use of software loss of data costs of recreating lost data or the cost of any substitute equipment or program This Warranty shall be governed by the laws of the United States of America and the State of Utah and any claim brought under this Warranty may only be brought in state or federal court located in Salt Lake County State of Utah and purchaser hereby consents to personal jurisdiction in such courts For further information contact Parvus Corporation 3222 S Washington St Salt Lake City Utah USA 84115 801 483 1533 FAX 801 483 1523 Web site http www parvus com
47. unctions gt VV VV V V CPU 1421 AT Keyboard PS 2 Mouse System reset External battery Speaker Power button Ethernet 1 y 5 H Function Generic Generic Keyboard Keyboard Mouse Mouse Battery Speaker 9 Reset push button 10 Not Connected 11 Not Connected 12 Not Connected 13 Not Connected CONOoahWHN Figure 10 Signal GND VDD KBDATA KBCLK MSDAT MSCLK BAT_IN SPKR RES _PB_IN Table 7 J6 Connector layout Pin 14 15 16 17 18 19 20 21 22 23 24 25 26 Function Not Connected Not Connected Not Connected Not Connected Not Connected J6 Connector pinout Signal LINK A ACTIVITY_A TXOUT1 TXOUT1 RXIN RXIN VCC3 GND MNL 0542 01 revA3 Keyboard Input An AT compatible keyboard can be connected to the module through connector J6 Mouse Input A PS 2 compatible mouse can be connected to the J6 connector System reset By connecting pin 9 and ground will perform a hardware reset of the module We advise using an external push button normally open External Battery Input Pin 7 of the multifunction connector allows for the connection of an external backup battery This battery is used when the module is powered down to preserve the date amp time in the Real Time Clock Speaker Output A transistor supplying 0 1W of power to an external speaker controls these outputs A transistor amplifier buffers the speaker signal Use a small general purpose
48. ushion it Warning Any product returned to Parvus improperly packed will immediately void the warranty for that particular product CPU 1421 MNL 0542 01 revA3 Appendix A 1 Electrical and Environmental Specifications Operating Characteristics Electrical Operating Characteristics Table 3 DC Operating Characteristics Supply Voltage Vec 5V 5 4 75V to 5 25V 0 92 A at 133 MHz 128 MB SDRAM typical Battery current draw board off without any device on the SSD 7 UA 3V Battery Voltage VBAT 3 3V range 3V to 3 6V Current Draw on the 5V P gt Note This CPU module is not warranted against damage caused by overheating due to improper or insufficient cooling or airflow Operating Temperature Range For proper operation of the CPU module the ambient air temperature must remain inside this range 0 C to 60 C 32 F to 140 F Battery Backup Characteristics There is no configuration data saved by the BIOS into the CMOS Real Time Clock Therefore the module does not need a battery except in the case where applications need to hold the date and time at power off Note Setup data is stored into the BIOS Flash EPROM it is therefore impossible to lose the set up data due to a lack of backup battery supply 59 Absolute Maximum Ratings Table 4 Absolute Maximum Ratings Supply Voltage Vcc 0 00 to 7 00V Storage Temperature Range 40 C to 85 C 40 F to 185 F Non Condensing Relative Humidity
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