Home

Kibra DDR User Manual

1. 163 5 1 45 V46 tWTR DBGWrite to Read Delay short Different bank group same rank DDR4 163 5 1 46 V47 tRRD SActivate to Activate Delay short Different bank group same rankDDR4 163 5 1 47 V48 tXS FAST SRX to a Valid Command with DLL DDR4 oooooooncccconncnncccncnnnnconocnononanannrrnnnanananennnnas 164 5 2 Supplemental Timing InformatiON ccoonnncccnonnciconaconennnccnnnnanononannrrnnnnrrnnnanrrrnnanrrenannrrrnaannnnas 164 5 2 1 tWR WR write recovery for auto precharge ccccccseseeeesesseeeeeeneeeeeeenseeeneeaseeeneeaseeenoeaseseneeaseesaeneaseesans 164 Appendix B China Restriction of Hazardous Substances Table 165 Appendix C How to Contact Teledyne Le Croy cccccssssseesesseeeesseeeeaseeeeeeees 167 a Lo o PE e O 169 Kibra DDR Protocol Analyzer User Manual 7 Teledyne LeCroy Contents 8 Kibra DDR Protocol Analyzer User Manual Introduction DDR3 and DDR4 are the third and fourth generation of Double Data Rate DDR SDRAM memory It is a continuation of the DDR memory technology that delivers higher speeds lower power consumption and heat dissipation It is an ideal memory solution for bandwidth hungry systems equipped with dual and quad core processors Memory is utilized in virtually every electronic device and DDR memory has become the memory of choice Each generation of DDR memory has doubled the data rate while reducing power requireme
2. R Protocol Suite C Program Fi SD ui Pr iles LeCr rotoc i s Active RD WR ddr E u File Setup Session Analysis Navigation View Window Help SE po E ES Cursor 7 B u t to n Waveform view Bank State view Changing vertical position of delta value Figure 3 25 Cursor Button Function Showing Pair of Cursors Note The vertical position of delta value can be changed by selecting and dragging up or down Find Click the Find icon El to display the Find dialog shown in Figure 3 26 on page 121 It enables finding by the following criteria QO Search Type Simple Search see See Simple Search on page 121 m Sequenced Search a Origin m Anchor Point m Last Found m Start of the Trace a Direction m Forward Backward QO Search for DDR Commands e Command Type e Chip Select e Bank Group e Bank Address MRS Number m Read Write Address e Read Write Address Values m Generic Signal Values e Signal Values Protocol Violations 120 Kibra DDR Protocol Analyzer User Manual Waveform View Teledyne LeCroy e Protocol Violation Type e Chip Select e Bank Address m Timing Violations e Timing Violation Type The Summary Pane displays the selections made Simple Search Simple search provides the ability to search for a signal signal group or combination of signals with desired values Combined search will match when the all the conditions match at the same time The default search criteria
3. Protocol violation Figure 3 23 Marker Bar 118 Kibra DDR Protocol Analyzer User Manual Waveform View Teledyne LeCroy Signal Names Column A column of signal names is displayed on the left as shown in Figure 3 24 Click and drag to increase column height Add Lines Right click context sensitive menu Timing Violati Remove Line Protocol Violation DDR Comman Preferences Click to hide Group Click to view Group Chip Select ar dress Figure 3 24 Signal Names Column Additionally you can also do the following in the Waveform View O Moving the Viewport Slider moves you across the view see the Viewport Slider Navigation Bar section below for details a Right clicking on the Label for the DIMM channel allows the user to add or remove signals or signal groups from the waveform view a Left clicking on the symbol in each label allows the user to expand or collapse a signal group a Scrolling the mouse wheel will cause the waveform area to ZOOM In or Zoom OUT U Double click at a specific location to move it to the center of the screen Cursors When the cursor button is pressed you can left click on the Waveform view to drop the first of a pair of cursors then right click to drop the other side The time between them is displayed see Figure 3 25 on page 120 Click on the x in the cursor box to close it Kibra DDR Protocol Analyzer User Manual 119 Teledyne LeCroy Waveform View
4. El Windows7_05 C Lenovo Recoven ray X File name Figure 2 75 Open Trace Dialog 4 You can now view the example trace file search for items look at the Traffic Summary Waveform view Listing view and Timing Calculator view 101 Kibra DDR Protocol Analyzer User Manual Teledyne LeCroy Example Files Y File Setup Session Analysis Navigation View Window Help SP SS EN e E O ea AAA Vaveform view Listing view Waveform view leales i mye 765 ns 105 ns Clock J gt x E cy j d m ODT CAD OAA Figure 2 76 Analyzer Trace Capture Display T z gt __ Saving a Trace You can Save a Trace for review at a later time using the Save As dialog A Rename original file faster ss To Initial time Final time O 0 000 164 861 000 E E Keep units matched Figure 2 77 Save As Dialog 102 Kibra DDR Protocol Analyzer User Manual Viewer Display The Teledyne LeCroy DDR Protocol Suite application displays data in three views Waveform Listing View and Bank State View Other analyses available are Timing Calculator see Timing Calculator View on page 142 Traffic Summary see Traffic Summary on page 137 MR Values see Last MRS Values on page 143 Timing Violation Analysis see Timing Violation Reanalysis on page 147 OCDOO O 3 1 Window Management You can customize your window for ease of use You can a Double click
5. The Traffic Summary View for each captured signal Traffic Summary Commands A summary of the Commands can be viewed on this page see Figure 3 48 You can view Command in Ranks Command in Banks MRS Commands or Register Control Commands 4 Traffic Summary Report 4 Commands Commands in Ranks i tT 31 10 Commands in Banks ACT 303 6 38 Register Control Commands PRE 870 6 11 4 Performance RD 7043 49 46 Ranks Performance PREA 2l 0 15 4 Violations REF 21 0 15 Protocol Violations 14241 Timing Violations Refresh to Refresh Precharge to Valid Command Figure 3 48 Traffic Summary Commands Traffic Summary Report Commands coo MS Commands in Ranks FRE 439 454 893 Commands in Banks ACT 464 481 945 Er Performance RD 4645 5120 9765 WR 4762 4998 9760 Ranks Performance i Violations Protocol Violations REF 26 25 51 Timing Violations PREA 21 22 43 Refresh Cycles in Ranks 10357 11100 2145 7 ids in Ranks Figure 3 49 Traffic Summary Commands in Ranks 138 Kibra DDR Protocol Analyzer User Manual Traffic Summary Teledyne LeCroy o as G Go to El Traffic Summary Report Rank Bank PRE ACT E Commands Commands in Ranks BY RO BO 52 52 512 544 1160 FTE RO B1 48 56 513 593 1210 E Performance RO B2 58 63 640 640 1401 ze oof Oe RO B3 61 62 612 640 1375 E Protocol Violations RO B4 58 61 640 640 1399 Timing Violations RO B5 59 60 640 616 1375 Refresh Cydes in Ranks
6. on page 32 Find Previous Gives you the option to search for the previous instance see Software Menus and Toolbar on page 32 Markers Allows you to do the following m Add Add a Marker m Remove Remove a specific Marker m Remove All Remove all Markers The View menu currently has the following options a a a pura V TEW Hide NOP DES Commands Allows you to toggle between showing hiding NOP DES Commands Synchronize All Views Allows you to synchronize the positions of the currently selected clock value in all views Manage Synced Traces Allows you to synchronize the times between multiple traces which were captured at the same time using CATC Sync cable as shown in Figure 1 8 on page 22 Zoom in Allows you to zoom in the view Zoom out Allows you to zoom out the view Hide NOP DES Commands Synchronize All Views Figure 2 68 View Menu Option 2 25 Window Window Allows you to configure your display see Figure 2 69 on page 96 It has the following options a OCDOO O New Window Tile Windows Tile Horizontal Tile Vertical Cascade Windows Kibra DDR Protocol Analyzer User Manual 95 Teledyne LeCroy Help TI Window Ay New Window Tile Windows Tile Horizontal Tile Vertical Cascade Windows e Users Public Documents LeCroy DDR Protocol Suite Data Examples Actrve RD WR ddrt Figure 2 69 Window Menu Option 2 26 Help The Help menu currently
7. Defines the interval between Mode Register Set and the next valid command tMOD violations can also occur during write leveling This is calculated as max 12 nCK 15ns for all speed bins V43 tXPR First Clock Enable High after Reset to MRS Defines the interval after initiating Reset Clock Enable High to normal operations This is defined as max 5nCK tRFC min 10ns for all speed bins V44 CCD S Read to Read Delay short Different bank group same rank DDR4 Defined as the minimum interval between a READ command and another READ command to a different bank group within the same Rank Speed 1600 1866 2133 2400 3200 Grade moja a V45 tWTW DBGWrite to Write Delay short Different bank group same rank DDR4 Defined as the minimum interval between a WRITE command and another WRITE command to a different bank group within the same Rank This is calculated as WL AL CWL tWPRE BL 2 WTW S V46 tWTR DBGWrite to Read Delay short Different bank group same rank DDR4 Defined as the minimum interval between a WRITE command the next READ command to a different bank group within the same Rank This is calculated as WL AL CWL tWPRE BL 2 WTR S V47 tRRD SActivate to Activate Delay short Different bank group same rank DDR4 Defined as the minimum interval between an ACTIVATE command the next ACTIVATE command to a different bank group within the same Rank Speed Grade 1800 1366 2133 2400 3200 4
8. EN Recording Options Base Kibra 480 SN 64885 General Basic Settings Advanced Triggers Memory Address Mapping E A A O Define system address mapping System Address Po BERLE as a 5 E JAE AE ARAA FA IER EN OR Customize system address by dragging Rank Bank Row Column addresses and drop into desired place Rank Address Bank Address Row Address SN lt lt cao cas caz cas J cas J cas J caz J caz J car J cao Customize system address by using these patterns Pattern 1 Pattern 2 Figure 2 36 Recording Options Dialog Memory Address Mapping Tab The mapping of Rank Bank Row and Column addresses to System Address provides the capability of working with System Address in other parts of software The three main areas that benefit from the use of System Address are Read Write on Specific Address Trigger If the System Address is defined in the Recording Options the user can specify the target address by entering the desired value in System Address Ranks Banks Row and Column address are be filled automatically by the software when the user specifies the target System Address Kibra DDR Protocol Analyzer User Manual 67 Teledyne LeCroy Recording Options Setup 68 Note The System Address field is disabled if there are no defined System Address patterns and it is enabled when the user defines a System Address pattern Note The trigger occurs according t
9. SRE E FOX 5RX O MRS 0 3 E p FE E E RCW Trigaer EE pE FE EE ES FE EH Fi ES EE pUl pi pri RES PES PE Figure 2 29 RCW Commands Trigger Settings RDIMM LRDIMM and SORDIMM Memory Selected for DDR3 General Basic Settings Advanced Triggers Memory Address Mapping ACT M REF PRE PREA E Zocs zocL PDE M sRE PDX SRX MRS 0 6 HO Hl F E H4 EBS Ho E RCW BCW Trigger Row Address 40 412 Figure 2 30 RCW BCW Command Trigger Settings RDIMM and LRDIMM Memory Selected for DDR4 Read Write Trigger Read and Write triggers can be set to be performed on the specified row column ranks and banks Read write Ranks Binary Match fcolumn Address bit match To place a x don t care press Delete Banks Binary Match Figure 2 31 Read Write Trigger Settings Note Hold mouse over fields to display tooltips 62 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy Sequence Trigger Sequence triggers can be set to be performed on signals The options are O Arm on m Signals Click the link to open the DDR Select Signals dialog see Figure 2 34 on page 65 No Arm a Trigger on m Signals Click the link to open the DDR Select Signals dialog see Figure 2 34 on page 65 m Trigger After specified nck O Reset Arm m Never m Signals Click the link to open the DDR Select Signals dialog see Figure 2 34 on page 65 m After specified nck
10. Speed All Speed BINs Grade WR roundup tRP tCK avg Kibra DDR Protocol Analyzer User Manual 157 Teledyne LeCroy DDR3 and DDR4 JEDEC Timing Violations Summary 5 1 10 V10 t RFC REFRESH to a Valid Command 9 1 11 Defines the minimum interval between Refresh and the next valid command to the same bank The table outlines the minimum interval while the maximum between two refresh commands is defined by 9 x Refresh Interval tREFI Speed 800 1066 1333 1600 1866 Grade Min 110 160 300 350 ns V11 tREFI REFRESH Interval A Refresh command needs to be issued every tREFI interval and a maximum of 8 Refresh commands can be postponed during SDRAM operation Thus in the event 8 Refresh commands are postponed in a row the maximum interval between two Refresh commands would never exceed 9 x tREFI After exiting Self Refresh Mode with one or more Refresh commands postponed additional Refresh commands may be postponed to the extent that the total number of postponed Refresh commands before and after the Self Refresh will never exceed eight During Self Refresh Mode the number of postponed or pulled in REF commands does not change Speed Case Temp 800 1066 1333 1600 1866 Grade 9 1 12 9 1 13 5 1 14 V12 tRTR READ to READ delay DDR3 same rank DDR4 same bank group Defined as the interval between a single READ command and another READ to the same rank and the same DIMM This is calculated ba
11. m Check or un check Sync Graphs a Color Select The Read color can be selected The Write color can be selected The Power Down color can be selected The Self Refresh color can be selected EA Preferences Interval 100 HH ms Auto Scroll Sync Graphs read CO pps Write i Power Down Po Self Refresh 9 Save As Save as Default Coat l Load Default Figure 2 52 RTS View Dialog Restore Factory Settings Ok Cancel Apply Kibra DDR Protocol Analyzer User Manual Reset Interposers 2 10 2 11 2 12 Teledyne LeCroy Reset Interposers Click Setup and select Reset Interposers only when needed in an exceptional situation Analysis w Launch CrossSync Control Panel I gt f Preferences Figure 2 53 Reset Interposers Menu Option Init Phy Click Setup and select Init Phy This causes the hardware on the interposer as well as on the probe front end of the analyzer to be reset in proper sequence This should not be necessary during normal operation of the Analyzer Setup Session Analysis Navigation Pa Recording Options i wa vero rm vi Devices A P Launch CrossSync Control Panel i Preferences Ctri Shift 0 al Reset Interposers Figure 2 54 Reset Interposers Menu Option Session The Session menu options allows you to start stop or abort a capture see Figure 2 55 on page 84 You can also manually trigger by selecting M
12. ACT to RD WR same bank lt ERCDsx YD6 WR to PRE PREA lt tWTP E V07 RD to PRE PREA lt tRTPx C 408 PRE PREA to a valid command lt ERP C 09 WRA to a valid command lt tWRA 10 REF to a valid command lt tRFC dl 11 REF to REF interval gt tREFI 9 C 112 RD to RD same bank group lt tRTR SBG C v13 RD to RD different rank same DIMM lt LDRRTR C V14 RD to RD different DIMM lt EDDRTR 115 RD to WR same rank lt tRTW C Vi6 RD to WR different rank same DIMM lt tDRRTW E Vi7 RD to WR different DIMM lt EDDRTW C viS WR to RD same bank group lt tWTR SBG E V19 WR to RD different rank same DIMM lt EDRWTR C V20 WR to RD different DIMM lt EDDWTR E 421 WR to WR same bank group lt TWTW SBG 22 WR to WR different rank same DIMM lt tDRWTW C V23 WR to WR different DIMM lt EDDWTW 24 SRY to a valid command without DL E Protocol Violation Trigger Mi Act Ml SRE Mm Rowe E RDA WRA 1 HB Invalid Command Adjacent C5 assertion Alert Trigger Parity Alert 3 lt Pulse Width nO lt 96 Command Filter Qut MM nor Deselect 4 Timing Violation Analysis E E E Z0cL zocs MN Parity Error xi Option i General Produd Trigge Buffer Trigge Trace A Captur Basic Setti DRAM Captu Mirrord ECC Use C4 Use CS Active Actree DIMM Speed Case lam DRAM Page Data Y Row 4 Burst
13. At Self Refresh Entry CKE must be low plus the NOP Deselect command asserted for at least 2CKs followed by Self Refresh exit where CKE must be high plus the NOP Deselect command asserted for at least CKE 1 V27 tACTPDEN ACTIVE to POWER DOWN ENTRY Defined as the interval between Active command and initiating Power down entry Active can be issued one clock prior to initiating PDE for all speed bins V28 REFPDEN REFRESH to POWER DOWN ENTRY Defined as the interval between Refresh command and initiating Power down entry Refresh can be issued one clock prior to initiating PDE for all speed bins 160 Kibra DDR Protocol Analyzer User Manual DDR3 and DDR4 JEDEC Timing Violations Summary Teledyne LeCroy 5 1 29 V30 tPRPDEN PRECHARGE PRECHARGE ALL to POWER DOWN ENTRY Defined as the minimum interval between Precharge PreCharge All to Power Down Entry The minimum interval before PDE is asserted 1 nCK 5 1 30 V31 tRDPDEN READ READ AUTO to POWER DOWN ENTRY Defined as the minimum interval between Read Read Auto and initiating Power Down Entry PDE This is calculated as RL AL CL BC4 2 4 1CK for all speed bins 5 1 31 V32 tWRPDEN WRITE to POWER DOWN ENTRY Defined as the minimum interval between Write command and initiating Power down entry This is calculated as WL AL CWL BC4 2 4 tWR tCK avg 1 CK for all speed bins 9 1 32 V33 tWRAPDEN WRITE AUTO to POWER DOWN ENTRY Defined as the minimum inte
14. First ZQCL after reset to a valid command lt t Qinit MRS to MRS lt MRD MRD MRD Ej tMOD tMOD First CKE high after reset to MRS lt EXPR 40 MRS to a valid command lt EMOD Timing Violation Trigger Values for Initialization Commands DDR4 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy Check the Detailed Mode check box to view how the violations are calculated see Figure 2 24 on page 57 View Category al Ir Detailed Mode C voi ACT to PRE PREA lt tRASmin E V02 ACT to PRE PREA gt tRASmax tRASmax 9 tREFI base 103 ACT to ACT same bank group lt tRRD SBG _ 104 Four ACT Window lt tFAW _ V05 ACT to RD WR same bank lt tRODx tRCDx tRCD AL ES tWTP CWL AL WR PLHBL 2 tRTPx AL HRTP PL RP CL _ VOS WRA to a valid command lt WRA tWRA WL tDAL PL HBL 2 _ 110 REF to a valid command lt tRFC _ VOF RD to PRE PREA lt tRTPX _ V08 PRE PREA to a valid command lt tRP REC tRFCi min EX _ V11 REF to REF interval gt tREFI 9 tREFI tREFI1 Bee _ V12 RD to RD same bank group lt tRTR SBG tRTR SBG tCCD_L V13 RD to RD different rank same DIMM lt tDRRTR oC C V14 RD to RD different DIMM lt tDDRTR ooo _ V15 RD to WR same rank lt tRTW RTW CLCWLHBL 2 2 WP V16 RD to WR different rank same DIMM lt tDRRTW lo
15. M5 Teledyne LeCroy DDR Protocol Analyzer A Kibra Model 800 0293 00 teledynelecroy com nigger ba Cik DC IN Out Sync Out 12V 5A 960 be e a a E Figure 1 8 Daisy Chaining Units using CATC Sync Cable and CATC Connectors 22 Kibra DDR Protocol Analyzer User Manual CrossSync Control Panel Teledyne LeCroy 1 6 CrossSync Control Panel The CrossSync Control Panel allows you to select analyzers for synchronization and manage the recording process It supports a wide combination of Teledyne LeCroy s flagship analyzers including PCI Express USB DDR Serial ATA SATA Serial Attached SCSI SAS Fibre Channel FC and Ethernet CrossSync is Teledyne LeCroy s analyzer synchronization solution that enables time aligned display of protocol traffic from multiple daisy chained analyzers showing packet traffic from multiple high speed serial busses A lightweight software control panel allows users to select analyzers for synchronization and manage the recording process Captured traffic is displayed using the latest analyzer software in separate windows with all the protocol specific search and reporting features Captured packets are displayed in separate windows that share a common time scale Navigating the traffic in either direction will scroll to the same timestamp in a synchronized window The traces are displayed as separate trace files When using the CrossSync option users can access the full complement of analysis capabiliti
16. Note To enter and save information about the current project add a project note in the Note pane and enter the data about the project 3 Recording Options Globa General Basic Settin gs Advanced Triggers Memo ry Address Mapping Kibra380 Kibra 480 Snapshot Manual Trigger Event Trigger Figure 2 8 Project Notes Field Trace Filename Path Click the Change Default Location button in the Trace Filename Path field and choose a file name and location for the results of your current project The trace files can only be saved as ddrt files You must select a location that is considered writeable to the operating systems Change Default Location Coi Program FilesiLeCroy DDRA Protocol Suite Data Samplesfuntitled ddrt Figure 2 9 Trace File Name Capture There are three possible options for capturing a trace DDR Signals Only DDR Signals with Ref Clk In and Ref Clk In Only DDR Signals This should be the default capture mode for DDR analysis Select from either DDR3 or DDR4 Ref Clock In This will edge detect a clock at the Ref Clock In SMA connector and show it in the Waveform View It requires a minimum 10ns period The resulting display in the Waveform view will make it appear as a short pulse at each edge detection point 40 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy Ref Clock In Pulse Type Select the Ref Clock In Pulse Type
17. commands Kibra DDR Protocol Analyzer User Manual Bank State View 3 5 Wa vefo rm vi Ev Li sti n g vi Ev Idle Teledyne LeCroy Bank State View The Bank State View provides a Bank by Bank view of the changing bus states It is separated by bank to enable a more insightful picture of the activity in a way that is often obfuscated in a waveform view While the waveform gives a chronological view of commands across the bus the Bank State View allows the user to view and understand how the controller is accessing the ranks and banks to improve performance The user can collapse expand multiple signals into individual banks in a rank show hide ranks and banks and zoom and scroll through the traffic on a specific bank Click on the Bank State View icon to display the Bank State View The navigation in the Bank State view is similar to the navigation in the Waveform view Bank State view Bank State view 0 000 105 470 234 s 1 us o Expand and EE EEE Collapse button e A anh e A EEEN m A Figure 3 36 Bank State View Supported States in the Bank View State In the Bank State View you can view performance on read write activity The view displays low power pre charge idle and active states Expand the Rank to view all the Banks that comprise it as shown in Figure 3 36 You can drag and drop banks within the rank to interchange the bank sequence The Bank State View currently supports the following sta
18. A6 1 A Y Self Normal operating temperature range A7 Refresh Temperature Rtt_WR Dynamic ODT off Write does not affect Rtt value A10 A9 00 2 20 Figure 2 62 Last MRS Values Dialog Row Usage Report The Row Usage Report see Figure 2 63 on page 90 is a powerful analysis tool in DDR Protocol Suite which provides a detailed report on how rows are accessed during the captured trace As with the Bank State view this provides a deeper analysis capability by analyzing user defined rows within a rank and or bank This analysis is available through Analysis Row Usage Report menu However unlike the other reports this report requires user input prior to starting analysis and generating the report The analysis will start when user clicks Run Analysis button on row usage report view s toolbar Kibra DDR Protocol Analyzer User Manual 89 Teledyne LeCroy Timing Violation Analysis 90 2 21 Rank RO Bank BAS Row Address Ox6EDB Cycle Number Start Time End Time Reset Caused By Count 1 0 000 000 088 942 0 000 007 832165 s Refresh 2 Add Cursor 3 0 000 116 861 315s 0 000 124 640 315s Refresh 1 Add Cursor 2 0 000 007 8321655 0 000 015 523058 s Refresh 1 Add Cursor 4 0 000 241 590 508 s 0 000 249 371 383s Refresh 1 Add Cursor Figure 2 63 Row Usage Report Dialog Timing Violation Analysis The Timing Violation Analysis dialog see Figure 2 64 on page 91and Figure 2 65 on
19. Bank State Rank Bank Group DDR4 and Bank O Layout Check boxes to Show Grid Lines Anti Alias drawing and Zoom Box O Time Stamp Cursor The background and foreground colors can be selected a Header Only the background color can be selected Note The read write density color in active state follows the RD WR command color from the Symbol coloring tab page 80 Kibra DDR Protocol Analyzer User Manual Preferences Teledyne LeCroy Main _ _ r Lav ual Show Grid Lines Background Anti Alias drawing g Zoom Box y E r L AA SS E Background Background Foreground hi Foreground A ee Background Ly Background Active Power Down RES Active Precharge Power Down Idle Self Refresh Unknown MPR Enable PDA Enable ank Bank Grou DDR Rank Bank Group DDR4 Ok Cancel Figure 2 51 Bank State View Dialog Kibra DDR Protocol Analyzer User Manual 81 Teledyne LeCroy Preferences 82 2 9 8 RTS View The RTS View tab allows you to set the foreground and background colors display grid lines etc for the RTS View displayed in the application see Choosing various colors allows for easier distinction of information in the view The colors can be set for each of the following elements of the view O General m Select Interval by clicking the up down arrows m Check or un check Auto scroll
20. CAS Re CAS Y Com Additid Write H Write A Fine G Self Re CAL La Parity ll CRE RTT_ Captur Captu Co Kibra DDR Protocol Analyzer User Manual Trace Info Teledyne LeCroy 2 22 Trace Info Selecting Trace Info opens the Trace Info dialog It displays detailed information about the captured trace see Figure 2 66 File Info Hardware Info File Information File name C Users Angela Pasari Desktop rdimmatboot ddrt Trace Recording Start Time Wednesday July 31 2013 15 58 32 Trace File Creation Time Wednesday July 31 2013 15 58 55 Total duration of trace 5 771 995 652 222 sec ms us ns ps Trigger sample Timestamp 16 974 599 717 749 sec ms us ns ps Precision Trigger Timestamp 16 974 599 724 000 sec ms us ns ps Bus Engine Latency 100 ns Trigged On RC Trigger Command lt Hardware Information A Top Recorded with DDRSuite exe Version 2 30 Build 347 BETA Recorded on a Kibra 480 Analyzer Serial Number 10029 MotherBoard 0x38 Rev 0x03 PhyBoard 0x39 Rev 0x02 Slot 1 Interposer 0x32 DDR4 U RDIMM Slot 1 Interposer Rev 0x08 Slot 2 Interposer 0x00 No board found Rev 0x00 Firmware version 1 06 Build 8 ROM 1 00 BusEngine version 2 56 Build 74 type 0 IOHubFPGA version 2 86 Build 0 type 0 Recording Options A Top Recording option summary Figure 2 66 Trace Info Dialog The window provides information about the file name location and statistics
21. Click on Setup gt Preferences to configure your settings Setup Session Analysis Navigation View Window Help ET lam Pan Recording Options it A PT cpm ka PR Y j Ep Waveform vi Devices fe Launch CrossSync Control Panel Marker wend CKE Command Value Chip Select Address ODT1 R Figure 2 43 Preferences Menu Option The Preferences dialog is displayed EA Preferences a General DDR3 Lines Properties DDR4 Lines Properties Symbol ola Waveform view Listing view Bank State view ars View Synchronize All Views M Hide DES Commands Time Stamp Reference Absolute Relative To Start Relative To Trigger Point Restore Factory Settings es is Apply Figure 2 44 Preferences Dialog The following tabs in the Display View Configuration dialog are described below O General DDR3 Lines Properties DDR4 Lines Properties Symbol Coloring Waveform view OOoOUD Kibra DDR Protocol Analyzer User Manual Preferences Teledyne LeCroy a Listing View a Bank State View O RTS View The following options are available Save As Opens the Save Display Configuration File dialog to save the changes made to the Preferences for future use They can be saved in the default location or you assign a name and Save in a library QO Save as Default Click this button to restore the settings to the factory presets QO Load Allows you to load the saved Preferences from the default location or
22. Commands Trig Ger iii id 61 Read Write Tri GG OM uri 62 Sequence THOR id 63 Clock Presea la 65 2 6 4 Recording Options Memory Address Mapping Tab sccsssssceesessseeeeeeseeseeesseeseenseeeseenseesonenseeseneas 66 Read Write on Specific Address Trigger oooncccccnnnccccncnnccconcnnonccnnnnconnnnanonnnnanncrrnnnnrrrnnannrrrnnannnrnnnannnns 67 Decoding Read Write Commands in Waveform Listing Vie W oooccoccnnnnnnciccccncnnccoronocnnncnccnncnnnnonennnnas 69 Search on System Address iii idas 70 Zi DEVICES aid 70 2 8 CrOSS9YNC CONTFOL PANG osado 71 2 8 1 Launching the CrossSync Control Panel cccccceseseeeeeeesseeeceeseeeesenseeeeceenseeseoeaseeesooesseseoeneeesseonneesees 71 2 9 Pre Oe ii cloacas 72 A Fadl scssssececanseesceccosoeneas sencsse sac oe sencascaee sess eucascs sacsoust ce cvauce eaccsececee sc veousk a sccccetedss veucuuseccus seve ucseceosasseassoceeest 73 2 9 2 DDR3 Linn s Properes cds 75 2 9 3 DDR4 Lines Proper S in aaa a cid 76 2 9A SVMDHOLCOIOrING pr italia tad 77 2 9 9 Waver VICW ciie E a D stemecncetuenceemeutuaes 78 ZO LISUNO VICW Sarcona ase aoaaa aaa cata E 79 2 9 7 Bank State VIEW iia 80 2 9 8 RTS VIA a o co o O 82 Z VO Reset InterDOSC S areosa ae aeRO EEREN RENES EEREN Ei 83 DEP a decos 83 212 SOS OM did 83 AS ERIN SIS sree ct tas cea ees hee tee ecient eines ee os ene ae ees 84 2 14 VWWAVETOIIN VIO Wii li 85 2 19 CISUNG VIEW sec tada daa 86 2 16 Bank State VOW iii 87 2 17 Traffic S
23. Density Data Width Row Address Count Page Size Burst Length CL nCkK CWL nCK Timing Mode AL Write RecoveryTime nck Preamble Fine Granularity Self Refresh Abort C A Parity Latency Mode nCK Dis CRC CAL nCkK MM RTT _WR Per Rank ba ot E Slot r 2 o 1 o 1 3 aco A EA ee Y Y Click on the SPD Serial Presence Detect icon Kibra DDR Protocol Analyzer User Manual EG1 v B63 C V01 ACT to PRE PREA lt tRASmin C VO2 ACT to PRE PREA gt tRASmax C VO3 ACT to ACT same bank group lt ERRD SBG C V47 ACT to ACT different bank group same rank lt tRRD S C VO4 Four ACT Window lt IFAW C VO5 ACT to RD WR same bank lt tRODx C V06 WR to PRE PREA lt tWTP C VO7 RD to PRE PREA lt tRTPx C VO8 PRE PREA to a valid command lt tRP C V09 WRA to a valid command lt TWRA EFE E ro wa E RDA vera M invalid Command ec KM nor Deselect M per mes M zoc zocs Trace File Name 4 Basic Settings Capture DDR Signals Capture Ref Clock In Capture Mode DRAM Type Follow MRS Settings Active Ranks Active Banks Command Filter Cuts I Timing Violation Tri NONE Protocol Violation T NONE Alert Triggers NONE 4 Advanced Triggers Command Triggers NONE Sequence Trigger Trigger N 4 Memory Address Mapping Mot defined to view the SPD information as shown above t
24. ERTPx PRE PREA to a valid command lt ERP WRA to a valid command lt COWRA CL nCk CWL nCK J Timing Mode REF to a valid command lt tRFC AL i REF to REF interval gt EREFI 9 LA Write RecoveryTime nCk RD to RD same bank group lt ERTR SBG Preamble RD to RD different rank same DIMM lt EDRRTR RD to RD different DIMM lt EDDRTR RD to WR same rank tRTW RD to WR different rank same DIMM lt EDRRTW Fine Granularity Fixed 1x Self Refresh Abort Disable C A Parity Latency Mode nCK Disable CAL CK Disable I Reanalyze entire trace accor to selected WR to RD different rank same DIMM EDRWTR RD to WR different DIMM lt tTDDRTW WR to RD same bank group lt PWTR SBG Fa Na Pa En Lu Ca Ml RTT_VIR Per Rank 2 a WR to RD different DIMM lt tODWTR WR to WR same bank group lt CTWIW SBG WR to WR different rank same DIMM lt tDRWTW Load Original Capture Settings Save To Current Recording Options OK Cancel Figure 3 67 Timing Violation Reanalysis Dialog 148 Kibra DDR Protocol Analyzer User Manual Real Time Statistics 4 1 Devices Dashboard When a Kibra is attached a dashboard displays see Figure 4 1 on page 150 which contains simplified shortcuts for some controls and displays A separate horizontal entry will be displayed for every Kibra that is attached The Devices Dashboard
25. Establish Interface The first time you run your software click on Setup and select Devices You can also click on the Analyzer Devices icon Ss on the top menu bar DDR Protocol Suite BETA C Program Files LeCroy DDOR Protocol Suite DataSamples Low Power 4Rank ddrt File Setup Session Analysis Navigation Window Help hi S PE Recording Options is Launch CrossSwnc Control Panel ad Preferences Ctrl Shift D Reset Interposers iTS Figure 1 11 Setting up Devices on Launching the Analyzer The Analyzer Devices window opens displaying the connected devices A blue shading through the entry indicates that a device is being selected and this device will be the one used when you select the Update Device Update License or About buttons The checkbox indicates that this device can participate in recording traces Location Status PP About Base Kibra 480 SN 64885 Local Machine Ready MES Update License Figure 1 12 Analyzer Devices Dialog It automatically detects if the Firmware or BusEngine version needs updating and the following screen displays Kibra DDR Protocol Analyzer User Manual 25 Teledyne LeCroy Launching Your Kibra 380 or Kibra 480 Software fr Device Update j Device LeCroy Kibra DOR Analyzer Platform Base Unit needs to be updated Do you want to update it now Figure 1 13 Device Update Dialog 1 Click Yes The Update Device dialog displays A E Update D
26. Foreground Foreground es Background Background Selected Foreground SO Row Foreground Main Background Row Background E All Marker column Font Arial Black Row Height Contents Font size E Restore Factory settings Ok Cancel Figure 2 50 Listing View Dialog Note The future release of the DDR Protocol Suite will display proportional columns for easy viewing Kibra DDR Protocol Analyzer User Manual 79 Teledyne LeCroy Preferences 2 9 7 Bank State View The Bank State View tab allows you to set the foreground and background colors display grid lines etc for the Bank State View displayed in the application see Figure 2 51 on page 81 Choosing various colors allows for easier distinction of information in the view The colors can be set for each of the following elements of the view a Main The background and foreground colors can be selected a Ruler The background and foreground colors can be selected a Selected Row Only the background color can be selected O States Active Power Down Precharge Power Down Self Refresh Active Idle Unknown and PDA Enable colors can be selected Note PDA Per DRAM Accessibility This state makes a difference in decoding since it has an impact on MRS timings tMRD tMOD These impacts are applied on MRS timings automatically when the modules are in this state and the Follow MRS setting mode is on QO
27. OL S EE E A A OA 119 3 3 Viewport Slider Navigation Bar c cssccccsseccesseeceeseeceseesenseecesesconseseassesonseecensessonsesones 127 3 3 1 Traces Captured with Filtering Enabled our nnmnnn nnmnnn 127 292 GaP MARKO S iaaa a a Aids 129 SALIS UNG VW aE aaa Raia EA 130 3 9 Bank State VOW nia nae ce an in ec ee 131 3 5 1 Supported States in the Bank View State cccccceceeeeeeeeseeeeeeeeeeseeeeeeeeeeaseeeeeeeaaaseeeeeeeaaaaeeeseeeanseeeeseones 131 Legena DISPIaV sirsie a bat aac eae at EESE ned wena aed uated a a ER 132 PACUIVG MAIS o e a ed 133 CONTIQUEMO Visible Bank a di 134 Common Features of Bank State View and Waveform VieW cc csssseccseesseessessseeeeeseeeseenneeeses 134 SoL SO 135 Maximum Zoomed IN VIEW cinta aida 135 DeTault ZOOM Leve lada ob 136 Maximum Zoomed Out VIEW its died 136 3 0 Manic SUMMa Y oeste 137 Traffic Summary Toolbar TOONS sicarios 137 Traffic Summary GOMMANGS saririsa anaana aaa aeaa anaa aiana 138 Trame Summary PE OMC a 140 Trafic Summary Violations concisa ea aaa S aaia 141 3 7 TIMING Calculator VIEW acia ica ica 142 39 0 Last MRO Valles naa aia isa 143 Kibra DDR Protocol Analyzer User Manual Teledyne LeCroy Contents 39 ROW USAGE Repo Misas 144 DETINING Target ROW Sa 145 Define Analysis Detail Parameters oooncccocnnnncccononnnnccnoonnconnonnnccnnnnnnnrennnnnncnnnnanrrennnnnnrrnnnnnnnrnnnannrrnnanass 146 Delne Report BOUNda Visca 147 Gyclic ROW Usage REDON iii
28. Trigger Point Figure 2 45 General Dialog 74 x Restore Factory Settings Ok Cancel l Apply Kibra DDR Protocol Analyzer User Manual Preferences Teledyne LeCroy 2 9 2 DDR3 Lines Properties The DDR3 Lines Properties tab allows the user to specify the line color of the DDR3 Command font font size and the format Note Any changes made in the Line Definition dialog are displayed in the Line Properties dialog Select the DDR3 Command from the left pane and select the font from the drop down font list to change the font and select change a font size Click on the Radix drop down list to select the format such as text Hex Dec Oct Bin etc Click on the Line Color button to select a color for the line Basic and Custom color options are available Once the properties are selected and applied they will apply to the lines in the Waveform View and their corresponding entries in the Listing View EA Preferences General DOR3 Lines Properties DDR Command Command Value Font Chip Select gt Address BA gt CRE Radix gt ODT Parity Alert Line Color Reset RefClkin Clock Protocol Violation Timing Violation Font and Font size will be applied only for text C2 DIMMI base views like the Listing view C2 DIMM2 Font size Restore Factory Settings Ok Cancel Apply Figure 2 46 DDR3 Lines Properties Dialog Kibra DDR Protocol Analyzer User Manual 75 Tel
29. V17 RD to WR different DIMM lt tDDRTW Figure 2 24 Timing Violation Detailed Mode Handling Timing Violation in MPR states DDR4 In DDR4 MPR states timing violation s tRTR tWTW tRTW values are calculated according to new formulas and are not same as the normal read write timing violations in active states The DDR Suite handles all required calculations in the MPR state when Follow MRS Settings mode is On and shows trigger violations according to the requirements in the MPR state When Follow MRS Settings mode is Off the software will disable the timing violation engine during MPR state to prevent any detection of invalid violations Kibra DDR Protocol Analyzer User Manual 57 Teledyne LeCroy Recording Options Setup Note When an MRS occurs that changes parameters that can effect Timing Violations there is often a JEDEC specified delay in some number of clocks before that new timing value is applied The Timing Violation checking in Kibra cannot adjust to that delay in time automatically so it is possible in rare cases for a trigger on this violation to be missed or for it to fire erroneously The software analysis of this situation will correctly identify this violation since it can easily incorporate this prescribed delay Protocol Violation Trigger The following Protocol Violation Triggers are supported Hover the mouse over the options to display a tooltip providing a description of the option
30. V18 tWTR WRITE to READ delay DDR3 same rank DDR4 same bank group Defines the minimum delay from start of WRITE command to READ command In case of BC 4 mode the internal write operation starts two clock cycles earlier than for the BL8 mode This means that the starting point for tWR and tWTR will be pulled in by two clocks when BC 4 is used This is defined for BC 4 CWL WTR speed 2 or BL 8 CWL WTR speed 4 The formula is shown as tWTRx CWL tWTR Spec BL 2 V19 tdrWTR WRITE to READ delay different rank same DIMM Defined as the interval between a WRITE command and a READ command to a different rank Timing between commands to a different rank should be vendor specified V20 tddWTR WRITE to READ delay different DIMM Defined as the interval between a WRITE command and a READ command to a different DIMM Timing between commanos to a different rank or DIMM should be vendor specified V21 tWTW WRITE to WRITE delay DDR3 same rank DDR4 same bank group Defined as the interval between a WRITE command and the next Write command to the same rank This is calculated based on Write Latency AL CWL tWPRE This is also known as CAS to CAS delay tCCD Kibra DDR Protocol Analyzer User Manual 159 Teledyne LeCroy DDR3 and DDR4 JEDEC Timing Violations Summary 9 1 22 9 1 23 9 1 24 9 1 25 9 1 26 9 1 27 9 1 28 V22 tddWTW WRITE to WRITE delay different rank same DIMM De
31. Violations and Refresh Cycles in Ranks can be viewed on this page see the figures below E Traffic Summary Report Commands Commands in Ranks Commands in Banks El Performance E E Performance a est Violations Timing Violations Refresh Cycles in Ranks E Traffic Summary Report A Commands Commands in Ranks Commands in Banks El Performance ES Ranks Performance ana Violations Refresh Cycles in Ranks Traffic Summary Report E Commands Commands in Ranks Commands in Banks Performance Ranks Performance Violations _ Protocol Violations US Timing Violations Refresh Cycles in Ranks VO1 ACT to PRE PREA lt tRASmin 24 nCK 1 1 Figure 3 57 Traffic Summary Timing Violations Kibra DDR Protocol Analyzer User Manual 141 Teledyne LeCroy Timing Calculator View Traffic Summary Report Ranks Minimum Maxxmum Rank O 5096 5096 Rank1 5096 5096 5096 00 a Traffic Summary Report 4 Commands Commands in Ranks Commands in Banks Register Control Commands 4 Performance Ranks Performance 4 Violations Protecol Violations Timing Violations Refresh to Refresh LT on L fmi aram dl DE Ci rar I on Figure 3 58 Traffic Summary Refresh to Refresh Traffic Summary Report Traffic Summary Report 4 Commands Commands in Ranks Commands in Banks Register Control Commands 4 Performance Ranks Perfo
32. app note DDRX_FileFormat pdf which is included in your installation Click to exit the application The Setup menu has the following options to setup and configure the device see Figure 2 4 on page 36 a OOO O a Recording Options Devices Launch CrossSync Control Panel Preferences Reset Interposers Init Phy Each of these options are described in the following section Kibra DDR Protocol Analyzer User Manual 35 Teledyne LeCroy Recording Options Setup 2 6 36 Session Analysis Mavigation q Recording Options Devices Launch CrossSinc Control Panel Preferences Ctrl Shitt D Figure 2 4 Setup Menu Option Recording Options Setup The Recording Options menu enables you to select the device Click Setup gt Recording Options gt and select the product see Figure 2 5 In the following example the LeCroy Kibra DDR Analyzer SN 63373 is selected Se Ses Analysts Navigation View Help Marke fe Launch CrossSync Control Panel and Command value CKE S Preferences CtrieSshiHt 0 Reset Interposers Figure 2 5 Recording Options Menu You can also click on the Recording Options icon A on the top menu bar The Recording Options Dialog has three tabs The General tab enables you to set the general recording configurations The Basic Settings tab displays the Memory Controller settings Capture settings and the Timing and Protocol Violation Trigger values The thir
33. defining user defined timing violations gt Command Value XXX Chip Select AAAA AAA gt Address gt BA gt CKE gt ODT Reset Don t care Clock Present Don t care OK Cancel Figure 2 34 DDR Select Signals Dialog Note Signals displayed in XXXX format represent traditional binary bit positions So ODTO High would be XXX1 and ODT2 Low would be XOXX etc Clock Present Clock Present triggers when either the clock is seen or the clock is disabled for a short period of time see Figure 2 35 on page 66 This can be used to trigger on the clock going away for a period of time This is done by using a sequence trigger as follows Arm on Clock Present Clock Disable This will arm whenever the clock stops for a short time Trigger After some number x of clocks nCIk x is the amount of time that the clock is off that should cause a trigger Reset Arm on Clock Present Clock Present This goes back to the arm state to look for the next clock disabled period Kibra DDR Protocol Analyzer User Manual 65 Teledyne LeCroy Recording Options Setup 66 Command Value XOX Chip Select FORA OA Cima Lis gna ia Address DOR AKAA OCA OHO BG XX BA XX ODT KAINA Party Don t care Alert Dont care Reset Don t care C DIMM Don t care C2 DIMM Don t care Clock Present Don t care Figure 2 35 Clock Present Note The software tries to make reasonable assumptions about certain
34. detected in the captured data stream The following three ways can trigger the analyzer with Event selected a Trigger on Specific DDR3 or DDR4 Commands a Trigger on DDR3 or DDR4 Protocol or Timing Violations a External Trigger in from other test equipment General Basic Settings Advanced Triggers Memory Address Mapping Kibra 380 Kibra 480 Snapshot Manual Trigger Event Trigger Figure 2 7 Trigger Setup Snapshot Mode To capture immediately on any trace check the Snapshot button Manual Trigger Mode Inthe Manual Trigger mode the analyzer captures bus traffic continually from when you use the Start button until you click the Manual Trigger button on the analyzer toolbar which triggers the analyzer To perform a manual trigger click the Manual Trigger button This selection also enables the External SMA Trigger function 38 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy Event Trigger Mode In Event Trigger mode the Analyzer triggers whenever any of the events selected for triggering occurs an OR condition The procedure for selecting trigger parameters is identical to that for selecting capture parameters All items selected for triggering appear in the Project Overview pane This selection also enables the External SMA Trigger function Note Triggers shown in the Waveform and Listing views have a precision of 0 8 clocks during normal traffic when Clock
35. for signals are don t care X and the user needs to change the search criteria for any signal with the desired value Note Search works on the pure value of signals without any DDR protocol specific post processing like address mirroring inversion RS Find Simple Search DDR Commands mM Sequenced Search E Command Type E Chip Select UH cuy E Bank Address MRS Numi Anchor Point Last Found Start of the Trace Forward Backward Invalid E Don t Care E RDMPR WRMPR RCO 15 Cancel Figure 3 26 Find Dialog DDR Commands Kibra DDR Protocol Analyzer User Manual Summary Searching for DDR Commands Commands Chip Select Bank Address 121 Teledyne LeCroy Waveform View Read Write Address Summary El Read Write Adc e E write Searching for Read Write Address O Read Write Addres g Anchor Point Swe 3 Commands Last Found System Address Hex Start of the Trace Ranks Binary Match WOOOOOORK Pena i nte tnay Maihi Row Address Hex LAT I k_ _ am if LOW i HOLL Ts 7 Forward Backward Column Address Hex AKA Ranks Binary XXX Banks Binary XXX Figure 3 27 Find Dialog Read Write Address 122 Kibra DDR Protocol Analyzer User Manual Waveform View EN Find Generic Signal Values Simple Search Sequenced Search Signal Values Anchor Point Last Found Start of the Trace F
36. from 12 to 16 Page Size The Page Size is determined by the OS Select from 1KB or 2KB Burst Length Two Burst Lengths can be selected from the drop down menu BC4 Burst Chop 4 or BL8 Burst Length 8 Burst Length OTF On The Fly is not currently supported For systems which use OTF select either one This will be used to calculate data bandwidth since Kibra does not directly capture the data CL nCK Select a CAS Latency from a range of 5 to 18 CWL nCK Select a CAS Write Latency from a range of 5 to 16 Timing Mode This determines whether the control signals require a multiple of clocks to perform at the data rate selected in the Speed drop down field Select from a multiplier value of 1T 2T and 3T AL Additive Latency is the CAS Latency minus one or minus two Select zero for no AL CL 1 or CL 2 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy Write Recovery Time nCK The Write Recovery Time can be selected from the dropdown menu Preamble DDR4 The Preamble value for Read commands can be set to 1 tCH or 2 tCK from the pull down menu Fine Granularity DDR4 The Refresh mode can be adjusted from normal 1x to more frequent 2X or 4X modes with shorter tRFC The multiplier is selected from a pull down menu Self Refresh Abort DDR4 Self Refresh Abort can be enabled or disabled through the pull down menu C A Parity Latency Mode nCK DDR4 Command Address Parity L
37. has the following options Tell Teledyne LeCroy User Manual Video Tutorials Register Product Online Check For Updates Shortcut List I About Figure 2 70 Help Menu Option Tell Teledyne LeCroy If you have an e mail client installed this will prompt you to enter your issues with a pre addressed e mail via that client This email feature only works if the default mail client is properly configured User Manual F1 Displays the User Manual Requires an installed PDF viewer Video Tutorials Select a web based Tutorial to learn more about the use of your Kibra An Internet connection is required for this Display License Information Displays the License information with the licenses that are purchased and their features see Figure 2 72 on page 98 96 Kibra DDR Protocol Analyzer User Manual Help Teledyne LeCroy Update License Displays the Analyzer Devices dialog Select the device by selecting the whole line and click Update License to display the Select License Key File dialog Select the file and click Open EXT Location status E a Base Kibra 480 SN 64885 Local Machine Ready AA Update Device l Update License Figure 2 71 Analyzer Devices Dialog Register Product Online Displays the Teledyne LeCroy Protocol Analyzers web page to register your product Check for Updates Checks to see if there are any updates available for download Shortcut List Displays a list of general sh
38. is powered on Analyzer failed to boot Analyzer is ready Downloading bus engine Trigger occurred 4 Gigabyte DRAM for traffic data capture timing state and other data Kibra DDR Protocol Analyzer User Manual 13 Teledyne LeCroy Installing Your Kibra 380 or Kibra 480 Protocol Analyzer 1 3 Installing Your Kibra 380 or Kibra 480 Protocol Analyzer Software Installation The software works on systems using the Windows XP Windows 8 and Windows 7 32 or 64 bit operating systems 1 Insert the Installation CD ROM into the CD drive on the host machine 2 The installation automatically starts setup unless Auto Run is off In that case select the CD ROM from My Computer and click Setup 3 After the warning to close all other programs and before starting the installation the Install component selection opens 4 Select components for installation 5 Click Next to complete the installation System Restart It is recommended that you restart your host machine before you use your Analyzer software Error Message If you get an error message during installation of the drivers for Window consult your system administrator Your system may allow only administrator level users to copy such driver files 1 4 Hardware Setup 1 4 1 Connecting in General Note You must install the software before connecting the analyzer to the host machine for the first time To set up the analyzer 1 Connect the analyzer to
39. onia ii a dd a a a a 13 T25 CED S aa a a eee rg ete ae meee er 13 1 26 Recording MEMORY SIZE ii dada 13 1 3 Installing Your Kibra 380 or Kibra 480 Protocol Analyzer cocooccccnncccccconoccooacnonanonanonnnannns 14 Sotiware Installation lios 14 AO AAA PP O 14 Enor Message a ia 14 t4 Hardware Sets risas 14 LAs Connecting IN General cias 14 Power on Procede sosa cta 17 ROOD INMICT OO SOR tadas a aaa 17 1 5 1 Kibra 380 or Kibra 480 Slot 1 INterpOSe ii ets eideds 18 1 5 2 Kibra 380 or Kibra 480 Slot 2 INterpoOS rF ooooccoconccconncococonconoococnnaconnnnnnnnnnrenancrrnnnnrnnanerenanrrnnanrrrnnannrnnannnnnnas 19 133 ExXMemnal TAGIT O Uli e Ea E OEE RAE 19 To4AExtemalTrigger IN nicas 20 1 5 5 Low Latency Read Write Trigger Olinda Ria E aia Aaa 20 Kibra DDR Protocol Analyzer User Manual Teledyne LeCroy Contents LIG AIS Sal MNR 21 Daisy Cian eo 22 1 6 Crosssyne COntrol Panel cn arica 23 1 7 Launching Your Kibra 380 or Kibra 480 Software oooooccccononnccccooonnnoccononnonononannonennannnennnnanos 24 17 ESTADINSI IM HAC ii ais 25 1 7 2 ADO bic tenner ae en ae ne ere ad R 27 1 8 USING th SOTMWAL SC ini 28 TO PFOLOCOUAMAIY ZO lc ineetite aaa i a 29 129 1 VIEWING CaplUred Dato ia 29 LOZ VEDEG TAO aci 30 Chapter 2 Protocol Analysis uiicsiionaaiaa decasyeaencanbesvasvuecstetuacuccatue 31 AS a e noo aiaa 31 2 2 SOTIWare Menus and TOO Daiana 32 2 3 Application MENU ODIN Sci ia 34 A A ea sects Pod aeacenenseete a a a a a
40. page 92 displays the memory controller and timing violation parameters Refer to Recording Options Basic Settings Tab on page 42 for more information This allows the user to run the Violation Check on the trace data with revised values for the timing parameters You can do What if scenarios to see if the new values would have created violations had they been in place during the capture The default for Follow MRS Settings is OFF in this feature Please ensure it is turned on if you want the software to follow the MRS changes as it analyzes the trace But in that case be aware that the values you changed may be overridden by values obtained from the MRS commands If the trace was captured with no filtering a checkbox is provided to allow the user to change the CAL value Kibra DDR Protocol Analyzer User Manual Timing Violation Analysis Teledyne LeCroy En Recording Options Global General Basic Settings Advanced Triggers DRAM Typi UDIMM e ambos Case Temperature CHT DRAM Density CAT Data Width Row Address Count Page Size Burst Length CL nCK CWL nCk Timing Mode AL Write RecoveryTime nCk E RTT_WR Per Rank El DLL Status Per Rank a View Category Al E Detailed Mode ACT to PRE PREA tRASmin ACT to PRE PREA gt tRASmax ACT to ACT different bank same rank lt tRRD t Four ACT Window lt FAW ACT to RD WR same bank lt tRCDx WR to PRE PREA lt tWTP
41. performed on a specific command on a Read Write or both The Read and Write commands can be triggered on a specific physical address or users can define a sequence of commands or signal states to trigger on For example Write to Addr 0xDEED Each of these triggers are OR conditioned with any other trigger selection including the JEDEC Violations selected on the Basic Settings tab See Timing Violation Trigger on page 52 Triggering can also be performed on JEDEC command timing violations Any Trigger detected from these settings including the Timing Violation triggers will automatically trigger a pulse on the External OUT SMA on the rear of the Kibra 380 or Kibra 480 hardware See External Trigger Out on page 19 Kibra provides triggering on RC commands To activate you user should select the correct memory type RDIMM LRDIMM SORDIMM and then the RCD commands trigger is available in the Advanced Triggers Tab Note Hold mouse over fields to display tooltips Kibra DDR Protocol Analyzer User Manual 59 Teledyne LeCroy Recording Options Setup EA Recording Options Global General Basic Setti ngs Advanced Triggers Memory Address Mapping M Read BACT System Address M PRE PREA Rows FDE Columns r f a k M PDX SRX Ranks Binary Match aS Mo m ee a Banks Binary Match Ml YW WOW Figure 2 27 Recording Options Dialog Advanced Triggers Tab 60 Kibra DDR Protocol Analy
42. the Memory Controller settings which are not specified by JEDEC specification for the appropriate Speed Bin the application will display an error in Red for the CL nCK and or CWL nCK values with an exclamation mark see Figure 2 17 on page 51 In this case the analyzer will not enable the refresh button for the timing violation triggers The software will populate the Timing table with the last valid set of timing values The user may modify the individual timing values manually as desired Note If operating the analyzer with invalid memory controller parameters the analyzer software will capture normally but may flag numerous timing violations Case Temperature DRAM Density Page Size Data Width Burst Length Timing Violation Trigger nCK values cannot be automatically determined For the chosen speed Timing Mode ou must edit them by hand AL o 7 Write RecoweryTime nck E Figure 2 17 Error in Memory Controller Settings Command Filter Out The option is NOP Deselect This option allows the customer to filter out the NOP Deselect states The NO Operation and Deselect are considered idle states and can be filtered to allow more commands states to be captured Idle States will show in the WaveForm and Bank State views as Hashed marks vertically through the waveform Ml nor Deselect Figure 2 18 Command Filter Out Dialog Kibra DDR Protocol Analyzer User Manual 51 Teledyn
43. the library for the current session QO Restore Factory Settings Click this button to restore the settings to the factory presets QO OK Saves the current Preferences Q Cancel Click this button to cancel any settings just made A Apply Applies the changes made to the open trace file Note Preferences from version 1 20 and above should be usable upgradable in future versions but those made with releases below 1 20 should be deleted as they are not forward compatible 2 9 1 General The General tab see Figure 2 45 on page 74 allows you set the Time Stamp Reference The four options are a Synchronize All Views When selecting items makes them visible in all views a Hide DES Commands This hides all DES and NOP commands from the view replacing them with a cross hatch pattern to indicate the time discontinuity QO Absolute Hardware Timestamp which can be synchronized with other analyzers via CATC SYNC CrossSync refer to CrossSync Control Panel on page 71 QO Relative To Start Assumes first sample 0 OU Relative To Trigger Point Assumes trigger point is time O Select an option and click Apply gt Save Kibra DDR Protocol Analyzer User Manual 73 Teledyne LeCroy Preferences MA Preferences General DDR3 Lines Properties DDR4 Lines Properties Symbol Coloring Synchronize All Views M Hide DES Commands Time Stamp Reference ___ Absolute Relative To Start Relative To
44. the top blue bar displaying the DDR Protocol Suite and file name to minimize and maximize the screen Q The horizontal toolbar can be dragged and placed vertically or horizontally on either side of the screen 3 2 Waveform View The Waveform View for each captured signal can be viewed In the Waveform View the clock is the main source for the data being captured Timing Markers show how long the clocks are apart Refer to Figure 3 1 on page 104 The user can collapse expand multiple signals into Busses i e CMD ADDR and zoom and scroll through waveform data 3 2 1 Clock Position Selection The Clock Position Selection synchronizes the position in both views the Waveform View and the Listing view A blue line appears when you click anywhere in the view moving the clock selector to that position The movement is synchronized in both views see the screen capture below Kibra DDR Protocol Analyzer User Manual 103 Teledyne LeCroy Waveform View Captured DIMM clock rate 5 ns zs ins 2ns 3ns 4ns 5 ns A lns A ins A A A E Protocol Vio ation st Timing Violatic n E DDR Command Command ETE ommana Value t E Chip select Navigation Bar Clock Position Selector Markers Openor close Group tabs by clicking on the box Figure 3 1 Waveform View 3 2 2 Viewport Slider in Navigation Bar The Viewport Slider in the Navigation Bar enables moving across the view see Figure 3 32 on page 127 It displays a
45. the view By Anchor Point option or by clicking on the trace and selecting waveform listing view By Selection point option This view also provides the view of the changing timing violations according to the last MRS values along with detailed descriptions of how the value changed via the tooltip Violations will show a detailed formula describing how the calculation of those violations were determined Affected timing violations are highlighted in green Last MRS Values Timing Calculator Traffic Summary Report Last MRS Values MRS Change Reference By Anchor Point By Selection Point View order Horizontal Vertical og ETT E TE Ts BL CL WR PPD AL CWL RN e Fixed 9 10 On CL 2 10 A OTE 10 1 ma WR 10 ES Fixed 5 According to MRS at 0 000 004 172 500 s EIE OTF 7 ha i IMR Select M RO Burst Length z Fixed r CAS Latency Read Burst Type Interleave TM Mode Test DLL Reset Ves Write recovery ho Precharge PO Fast exit DLL on Figure 3 61 Last MRS Values View Kibra DDR Protocol Analyzer User Manual 143 Teledyne LeCroy Row Usage Report 3 9 Row Usage Report To run the Row Usage Report select Analysis gt Row Usage Report from the menu to display the following dialog The Row Usage Report allows the user to define commands of interest within a row sets of rows or the entire captured trace The user can then define a reset to a cycle The Report ta
46. the waveform Click on the Zoom Box button ES as shown see Figure 3 9 on page 108 to toggle between enabling and disabling the zoom box mode Kibra DDR Protocol Analyzer User Manual 107 Teledyne LeCroy Waveform View Zoom Box Mode button When activated the button turns blue Perform the following steps to use the Zoom Box 1 Click on the Enable Disable Zoom Box Mode button to activate it as shown in the screen capture above 2 When you move the cursor in the Waveform View display it will change to a Plus sign Protocol Violation Cursor changed to a Plus sign to zoom into an area Figure 3 10 Overlaying One Signal over the Other 108 Kibra DDR Protocol Analyzer User Manual Waveform View Teledyne LeCroy 3 Drag the cursor to select the area to zoom in as shown below 0 000 181016 685 s 181 01 5 us z _ 181 02 us ens 3 ns Clock Protocol Violation 5 239 ps Chip Select DDR Command Area selected to zoom in 181 013 us T 181 014 us 181 015 us Chip Select DDR Command Selected area zoomed in Figure 3 11 Using the Zoom Box Mode Button 3 2 8 Context Sensitive Menu Right click in the Waveform View to display the context sensitive GO to commands see Figure 3 11 on page 109 The commands displayed are based on where you click in both horizontal and vertical locations on the trace Right clicking on a command allows you to go to the next command or to go to the next command of th
47. to RD WR same bank lt tRCD 06 WR to PRE PREA lt tWTP v07 RD to PRE PREA lt tRTPx IS CRE PREA to a valid command tRP 109 WRA to 10 REF to a valid command lt tRFC VIL REF to REF interval gt tREFI 9 12 RD to RD same rank lt tRTR V13 RD to RD different rank same DIMM lt 14 RD to RD different DIMM lt tDDRTR RD to WR same rank lt tRTW 6 RD to WR different rank same DIMM lt 17 RD to WR different DIMM lt tDDRTW 18 WR to RD same rank lt tWTRx 19 WR to RD different rank same DIMM lt R to RD different DIMM lt DDWTR V21 WR to WR same rank lt tW TWW 22 WR to WR different rank same DIMM o WR different DIMM lt tODWTW o a valid command without DLL lt tas aia command with DLL lt x5DLL lt tCKESR E lt tA4CTPDEN 428 ce to PDE lt tREFPDEN 30 PRE PREA to PDE lt tPRPDEN Val RD RDA to PDE lt tRDPDEN 2 WR to PDE lt tWRPDEN WRA to PDE lt tWRAPDEN a valid command lt tWRA Figure 3 30 Find Dialog Timing Violations Kibra DDR Protocol Analyzer User Manual Violation Type Teledyne LeCroy Searching for Timing Violations 125 Teledyne LeCroy Waveform View Sequenced Search Sequenced search allows users to define a sequence for search criteria to find a match You can add states in the sequencer limited to 8 states for simplicity and define criteria in each state limited to 4 criteria per state You can define the following
48. to configure the bank state view according to their preferences in terms of visible banks in the view and the coloring of the states After the recording of a trace is finished the application shows all selected ranks and banks in the recording option by default However by right clicking on the bank state header section the application shows a popup menu which hides the desired banks or shows hidden banks see Figure 3 41 The view configuration is saved in the trace file automatically and the user will see the view with the last configuration when the next file opens Banko Hide Bank oO a Banks O TS pa a Rank0 Banki Bank6 y Banko MES RankO Bank4 Figure 3 41 Configuring Visible Banks Common Features of Bank State View and Waveform View The Bank State View provides all the common features of the Waveform View which are described before in Waveform View on page 103 The important common features are see Figure 3 42 on page 135 a OOO O 134 Navigation bar Markers Cursor Time Ruler Zoom in zoom out capabilities As in the Waveform View in deep zoom out when the state duration is smaller than a visible pixel on the screen the state will be shown as reduced symbol see Figure 3 45 on page 136 Common Navigation hot keys Anchor point to show the synch point with other views Kibra DDR Protocol Analyzer User Manual Bank State View Teledyne LeCroy Waveform view Bank
49. trigger types For example if the user changes the CMD group and all chip select signals are Don t care the chip select group is changed to Any automatically Also If the user changes one chip select from any to something else all other chip select signals change to 1 2 6 4 Recording Options Memory Address Mapping Tab In the Recording Options Dialog you can set the user defined Address Mapping options in the Memory Address Mapping tab see Figure 2 36 on page 67 You can choose from QO Use External plugin This is not supported in release 2 30 It will be implemented in a future release O Define system address mapping The Memory Mapping tab allows the user to define how their system memory maps to the physical memory of the DIMM This dialogue allows you to customize the system address by dragging and dropping Ranks Bank Row and Column addresses Additionally two popular predefined memory maps are available You can customize the System Address by either dragging and dropping Rank Bank Row and Column addresses or by selecting patterns In the Drag Drop approach the user can select cells from Rank Bank Row and Column cells individually or a range by keeping the Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy mouse button pressed and selecting multiple cells The user may select all cells together by dragging from the left side indicator of each group Click to reset mapping
50. view Listing view Bank State view RTS View Layout Background l ES e Show Grid Lines Main Foreground P g Ant Alias drav ving M Zoom Box Ruler A Time Stamp Cursor Background O Background Po Foreground A Foreground Selected Row Header Background MN Background f 7 Save As Save as Default Load Load Default Restore Factory Settings Ok Cancel Apply Figure 2 49 Waveform View Dialog 78 Kibra DDR Protocol Analyzer User Manual Preferences Teledyne LeCroy 2 9 6 Listing View The Listing View tab allows you to set the colors grid lines etc for the Listing View displayed in the application In this view check the Show Grid Lines box to view the grid lines There are three color schemes you can select from 1 MONO _CHROME_SKIN This is black and white 2 COLOR_SKIN_1 This color scheme is consistent with the application 3 COLOR_SKIN_2 This color scheme is bright Within the color schemes you can select and change standard settings such as the background and foreground colors for the Main window Time Column set the font and font size Marker Column set the font and font size Selected column Index column set the font and font size and set the Row Height EN Preferences Show Grid Lines Color schema COLOR_SKIN_2 Time colum gt Index olum E Fontsze CO S
51. 2012 Teledyne LeCroy Teledyne LeCroy Kibra 480 DDR Analyzer Platform serial Number 10029 0x00272D Firmware Version 1 05 Build Number JOHub BusEngine Version 2 50 DDR4 BusEngine Version 2 46 Build Number 02 MotherBoard 1D 038 Rev 0x3 PhyBoard ID 0x39 Rev the Slot I Interposer ID 0x3 2 Rev 0x3 Slot 2 Interposer 1D 0x0 Rev bc0 Wm Figure 1 17 About DDR Protocol Suite showing updated version Using the Software The Kibra 380 or Kibra 480 application has protocol analysis software see Figure 1 18 on page 29 to capture data trigger and view data See Protocol Analysis on page 31 Kibra DDR Protocol Analyzer User Manual Protocol Analyzer Teledyne LeCroy ile Setup Session Analysis Navigation View Window Help Waveform view Listing view E E 100 ns 120 ns 100 90 n ns 70 60 ns 45 Protocol Violation Timing Violation S CKE J ay Address wo BA Reset Parity Error Parity A ooT Traffic Summary Report Timing Calculator Last MRS Values Bank State view Figure 1 18 DDR Protocol Suite Application 1 9 Protocol Analyzer To use the software for protocol analysis first select File gt Open to open an existing protocol analysis ddrt file See Protocol Analysis on page 31 You can also open a ddrt sample file In Windows 7 and Windows 8 example files are located in C Users Public Documents LeCroy DDR Protocol Suite Data Examples In Windows X
52. 34 XP POWER DOWN EXIT to a Valid Command without DLL ccscceeeeeseeesseeeeeeeeeneeeeeees 161 5 1 34 V35 tXPDLL POWER DOWN EXIT to a Valid Command with DLL DDRB ooooncccconnncnccccconoconnnnnnnas 161 5 1 35 V36 tCKE Clock Enable minimum pulse width ccccconnnnnnccccnonononcnccnnnannncncnnnonannnnnnnnnannnnrrennnananerrnnnnas 162 5 1 36 V37 tPD POWER DOWN ENTRY to POWER DOWN EXIT cceeeeeenseeeeeecennneeeeeeeesseeeeeeoeenneeeesens 162 5 1 37 V38 tZQCS SHORT Calibration Sequence to a Valid Command ccccoocnnnccnccnnnononcnnnnnnnnnnnnnnnnnananennnnas 162 5 1 38 V39 tZQOper ZQCL to a Valid COMMANGA cceseeseeeeceeeeneseeeeeecnsssneeeeceeasseeeeeeceasseeseeecenseesseeneees 162 5 1 39 V40 tZQinit First ZQCL after Reset to a Valid Command cccceeeeseeeeeecnensneeeeeeenneeeeeseeennneeeseeees 162 5 1 40 V41 tMRD MODE Register Set to Mode Register Set cccssscccseseeccnseeeeeneeccenseseenseesenseeseesesees 162 5 1 41 V42 tMOD Mode Register Set Command to a Valid Command onccccccconnnncnancnonencncnananannnnnnnnnnnnnananans 163 5 1 42 V43 tXPR First Clock Enable High after Reset to MRS cccccssseeeeeeeeeeeeeeeeeeeeeeeeeeeseeeeeeneneeeeseeaennes 163 5 1 43 V44 CCD S Read to Read Delay short Different bank group same rank DDR4 2css00ee 163 5 1 44 V45 tWTW DBGWrite to Write Delay short Different bank group same rankDDR4
53. 3nCK 7 5ns max 3nCK 5 625ns max 3nCK 5 625ns nCK Speed 1600 1866 Grade Max max 3nCK 5ns max 3nCK 5ns nCK V37 tPD POWER DOWN ENTRY to POWER DOWN EXIT Defined as the minimum interval between Power Down Entry to Power Down Exit This is calculated in a range with minimum of tCKE and maximum 9 tREFI V38 tZQCS SHORT Calibration Sequence to a Valid Command Defined as the minimum interval between Short Calibration Sequence command to next valid command This is calculated as max 64nCK 80ns for all speed bins V39 tZQOper ZQCL to a Valid Command Defined as the minimum interval between long Calibration Sequence command to next valid command This is calculated as max 256nCK 320ns for all speed bins V40 tZQinit First ZQCL after Reset to a Valid Command Defined as the minimum interval between the first Long Calibration Sequence ZQCL command after reset to next valid command This is calculated as max 512nCK 640ns for all speed bins V41 tMRD MODE Register Set to Mode Register Set Mode Register delay is required to complete the write operation to the mode register and is the minimum time required between two MRS commands This is calculated as 4 nCK for all speed bins 162 Kibra DDR Protocol Analyzer User Manual DDR3 and DDR4 JEDEC Timing Violations Summary Teledyne LeCroy 5 1 41 5 1 42 5 1 43 5 1 44 5 1 45 5 1 46 V42 tMOD Mode Register Set Command to a Valid Command
54. 59 Alert Trigger DDR4 59 Analysis menu 84 analyzer back panel 12 features 10 11 front panel 12 overview 9 analyzer devices dialog 25 icon 25 Application Menu Options 34 application overview 28 Auto Run 14 B back panel 12 Buffer Size 39 field 39 C captured data 29 capturing a trace 40 cascading 21 cascading STX 430 s STX 460 s 21 CATC SYNC Cable Connection 23 CATC Technical Support 167 Check for Updates 97 Goto Next Transition 114 Goto Previous Transition 114 Kibra DDR Protocol Analyzer User Manual Index Clock Position Selection 103 Clock Present trigger 65 Clock Based Timing 11 CMD ADD CNTRL Bus and Process JEDEC Protocol 11 Command Filter Out 51 Command Triggers 61 Common Features of Bank State View and Waveform View 134 components 9 Configuring Visible Banks 134 Connecting 14 connectors 13 contact 167 creating markers 118 CrossSync Control Panel 23 D data 29 DDR Interposer 17 DDR3 9 DDR4 9 Decoding Read Write Commands in Waveform Listing View 69 Device icon 32 dimensions 13 DIMM Slot Protocol 11 DIMM speed 47 Display License Information 96 Display View Configuration window 72 Don t care Snapshot 38 DRAM Density 48 E Edit Marker 114 Edit This Marker 114 e mail 167 Email CATC Support 167 environment 13 169 Teledyne LeCroy Index Environmental Conditions 13 Error Message 14 error message startup 14 establish interface 25 Ev
55. 679 Brief Bus Utilization Report Rank 0 Read Write Power Down Self Refresh Throughput Maximum 23 34 23 27 0 00 0 00 46 61 Time Thu 11 Oct 10 29 24 2012 Thu 11 Oct 10 29 24 2012 Thu DL Oct 10 29 24 2012 Ranki Read Write Power Down Self Refresh Throughput Maximum 23 29 23 27 0 00 0 00 46 55 Time Thu 11 Oct 10 29 24 2012 Thu 11 Oct 10 29 24 2012 Thu 11 Oct 10 29 24 2012 Figure 4 4 Real Time Statistics Brief Report On screen Display 154 Kibra DDR Protocol Analyzer User Manual Application Note 5 1 DDR3 and DDR4 JEDEC Timing Violations Summary This Application Note summarizes the JEDEC timing violations for DDR3 and DDR4 currently supported in Teledyne LeCroy s Kibra 380 or Kibra 480 Protocol Analyzer These timing parameters are determined based on the CL CWL AL and operational timing mode specified by the system memory controller and the SPD data in the DIMM 5 1 1 V01 tRAS ACTIVATE to PRECHARGE command period Min The minimum interval between Activate and PreCharge is specified to ensure the active row is closed before the next Activate or Refresh This is the minimum amount of time that must occur between activating a row and issuing a precharge to the row in same rank and same bank This makes sure that all the data from the row has been moved to the sense amps and is stable before a precharge is issued to write the data back to th
56. 7 i Pet 517 11363 2006 EEIE WIR EEK o Polybrominated Diphenyl Ethers O Indicates that this toxic or hazardous substance contained in all of the homogeneous materials for this part is below the limit requirement specified in 51 T1 1363 2006 X Indicates that this toxic or hazardous substance contained in at least one of the homogenous materials used for this part is above the limit requirement specified in 51 11 1363 2006 EFUP Environmental Friendly Use Period Us Temperature SC to 40C Humidity 3 to 95 max RH Altitude Up to 2000 meters Kibra DDR Protocol Analyzer User Manual e Conditions non condensing 165 Teledyne LeCroy 166 Kibra DDR Protocol Analyzer User Manual How to Contact Teledyne LeCroy Type of Service Call for technical support Fax your questions Write a letter Send e mail Visit Teledyne LeCroy s web site Kibra DDR Protocol Analyzer User Manual Contact US and Canada Worldwide Worldwide Teledyne LeCroy 1 800 909 7112 1 408 653 1260 1 408 727 6622 Protocol Solutions Group Customer Support 3385 Scott Blvd Santa Clara CA 95054 3115 USA psgsupport teledynelecroy com teledynelecroy com 167 Teledyne LeCroy 168 Kibra DDR Protocol Analyzer User Manual Symbols ddrt files 31 A Abort icon 32 About 27 97 Active Banks 50 Active Ranks 49 Add Lines 115 Add Marker icon 33 34 address 167 Advanced Triggers tab
57. 829 s Add Cursor MRS should have occured after 5 723 539 641 937 s Figure 3 15 Timing Violation and Protocol Violation Tooltip Hover over the violation to display the Timing Violation dialog see figure above and click the Add Cursor link to add a cursor which demarcates the start time of the violation to the actual occurrence Use the buttons to move to either side of the cursor violation by clicking the buttons on the top right corner see figure below The buttons from left to right are a Zoom to fit This will change Waveform view zoom and position to show this cursor boundaries X and Y positions in the current view so user can see all parts of this cursor together a Goto X Positions the X cursor in the middle of the view without chang ing zoom a Goto Y Positions the Y cursor in the middle of the view without chang ing zoom a Close Remove Removes this cursor from view Figure 3 16 Additional Tool tip Functionality 112 Kibra DDR Protocol Analyzer User Manual Waveform View 3 2 11 Teledyne LeCroy Hover the cursor over the command to display the tooltip The tool tip will disappear after 5 seconds The Truth table displays on the bottom To keep the tool tip persistent place your cursor in the tool tip box Click the Hide Detail button to hide the Truth table pzas nar a a a E faeo 70s pa a oe ree es gt ee H BG BA V OP Code Figure 3 17 Truth Table Functionality Right Cli
58. Banks Performance Violations be Protocol Violations Timing Violations Refresh Cycles in Ranks Rank Read Write Self refresh Power down Total Rank 13 77 14 12 0 00 0 00 27 89 Ranki 15 18 14 82 0 00 0 00 30 00 All Ranks 28 95 28 94 Figure 3 54 Traffic Summary Ranks Performance The Performance node of the Traffic Summary Report provides a high level snapshot of bus bandwidth usage and power down state transitions during trace capture It shows the bus bandwidth efficiency for data transfers and the efficiency of power down state transitions when no data transfers occur The report is calculated based on rank and is determined by counting the clocks that occurred while the rank was in a specific state according to these formulas O Read Number of read commands burst clock count BL 2 100 Total clock count OQ Write Number of write commands burst clock count BL 2 100 Total clock count QO Self Refresh Total self refresh state duration 100 Trace duration O Power Down Total power down state duration 100 Trace duration Note Read Write states values are calculated by counting the number of clocks required to complete a burst transaction For burst length 8 software counts 4 clocks For burst length 4 software counts 2 clocks 140 Kibra DDR Protocol Analyzer User Manual Traffic Summary Teledyne LeCroy Traffic Summary Violations A summary of the Protocol Timing
59. CLCWL HBL 2 2 WP V16 RD to WR different rank same DIMM lt tORRTW V17 RD to WR different DIMM lt tDDRTW V18 WR to RD same bank group lt tWTR 5BG tWTR SBG CWL WTR_LHBL 2 V19 WR to RD different rank same DIMM lt tORWTR V20 WR to RD different DIMM lt tDDWTR V21 WR to WR same bank group lt tWTW SBG tWTW SBG tCCD_L V22 WR to WR different rank same DIMM lt tDRWTW V23 WR to WR different DIMM lt tODWTW 144 RD to RD different bank group same rank lt tCCD S tRTR DBG tCCD_5 V45 WR to WR different bank group same rank lt TWTW DBG tWTW DBG tCCD_S V46 WR to RD different bank group same rank lt tWTR DBG tWTR DBG CWL tWTR_S BL 2 Timing Violation Trigger Values for Read Write Commands DDR4 Sort by Violation Number l 5 qa Mar M Detailed Mode Sort by Violation Relevance C v24 SRX to a valid command without DLL EXS a ES i rl a C v25 SRX to a valid command with DLL lt EXSDLL V26 SRE to SRX lt tCKESR C V27 ACT to PDE lt tACTPDEN C V28 REF to PDE lt tREFPDEN C v31 RD RDA to PDE lt ERDPDEN 10 C 132 WR to PDE lt tWRPDEN 12 C V33 WRA to PDE lt tWRAPDEN C v34 PDX to a valid command without DLL lt EXP C v35 PDX to a valid command with DLL lt tXPDLL C v36 CKE minimum pulse width lt tCKE C V37 PDE to PDX lt tPD W48 SRX to a valid command without DLL lt XS FAST Fe Fe a Li Teled
60. Enable is stable Buffer Size The Analyzer Settings tab has the Buffer Size field where you can set the buffer size The defaults are one segment of 30MB or 3 75Msamples The total size used is automatically displayed for you You can use the slider button or click the up or down arrow to change memory usage for recording trace data Minimum size of memory is 1MB Maximum size of Memory is 4GB 512Mega Samples It is recommended that you limit the size of the capture buffer to half of the memory of your host machine to achieve the best performance Trigger Position This defines the portions of the buffer which are used before and after the trigger It does not apply to snapshot recordings Post Trigger You can set the amount of data to capture before and after the trigger as a percentage of pre trigger between 1 and 99 Position the post trigger slider to a percentage This feature allows the evaluation of bus activity leading up to and after the triggering Event Post trigger data is capture of the specified percentage of data after the triggering Event It cannot be guaranteed and may be O This can occur for example when the trigger event occurs and the system halts operation preventing any post trigger data from being collected In such a case the data display shows fewer than the specified data points after the triggering Event Kibra DDR Protocol Analyzer User Manual 39 Teledyne LeCroy Recording Options Setup
61. GING GUISONS ui as 105 3 2 9 200M N and ZOOM Olla aaa 106 3 2 6 Overlay Signals Mode oia A A A aa 106 32 LOOM DO di 107 312 0 CONTO SENSITIVE MA colada 109 3 2 9 Choosing Chip Select Color HighlightiNO coonnncnccconocnncnnnnccccocnnnconccnnnnnnnnnnnnonannncnrnnnnnnnnnrrnnnnannnnnnnnnnas 110 3 210 TIMING and Protocol MOMO Sui aaa aaa aa aaa a A Ea Ea eaaa aea aaRS 111 3 2 11 Right Click Functionality in Waveform VieW cccccceesseesssesseeseeesseeseesseeeeeensseeseeesseseeensseesoneeseeesens 113 GOTO NOX Gap CP CP a a a aa SENi 114 Goes to the next gap see See Gap Markers on page 12 Decooococonicicnnnncccccccconaconnnanoronanornnannnnnnnas 114 GOTO PREVIOUS aiii ito 114 GOTO Marker iia a ceacocsenevawecaceceteanienecenosescnees 114 GO TO GUESS 114 CO OTAGO O 114 COTO TIME PA O Ea Ea E 114 4 Kibra DDR Protocol Analyzer User Manual Contents Teledyne LeCroy GOTO SOLS CUO Ne oia 114 Sel NeW MA E 114 Set ald Edit New Marker coin a id 114 Place Marker aaa 114 EAN TANIS Mae ES 114 EAN MarK airada aaa a aaa 114 GO 10 Next Transition Ale itii aa i aaa aaa Aaaa a a aiaa E 114 Goto Previous Transition Alerce E 114 Delete THIS Matke runa id 115 Delete Marker ana ia 115 Delete All MAS PE eo CE oe eo tere ee 115 POEMS ii de 115 Delete Line Men dica ta odo 115 Show Hide SUD NS ada 115 Preto rencia 116 SLA Mar NS nia ada 116 Creating Markets ds 118 Signal Names COMO msssnrocicasi a Ra aaa a aE Eaa AEAEE 119 IES
62. Information Shows the information about the environment in which the trace file was captured including the Recording Options see Trace Info on page 93 O Waveform View FE Listing View E g n k St ate Wi vi Traffic Summary Report 8 Timing Calculator View E 4 Last MRS Values iri Row Usage Report Timing Violation Analysis T Trace Information Figure 2 56 Analysis Menu Option Note Selecting and deselecting any of the views in Analysis toggles between displaying and hiding that view 84 Kibra DDR Protocol Analyzer User Manual Waveform View Teledyne LeCroy 2 14 Waveform View The Waveform View for each captured signal can be viewed The user can collapse expand multiple signals into Busses i e CMD ADDR and zoom and scroll through the waveform data Waveform vie Liting vievwe Rank Stale view f Probocol Violation Timing Vielaton ar De sxx nes OA DES nes XC DES E J Command Value gt AA AA AA AAA A T 1D DD DD DD GD GS GS E OAK SO O O O ED SS ES Se ee ee ee a ee eis ia Figure 2 57 Waveform View For additional information on the Waveform View See Waveform View on page 103 Kibra DDR Protocol Analyzer User Manual 85 Teledyne LeCroy Listing View 2 15 Listing View The Listing View for each captured signal can be viewed The Listing View displays the text based decode of commands in time order Waveform view Listing v
63. Mininck 4 fa la a 4 Kibra DDR Protocol Analyzer User Manual 163 Teledyne LeCroy Supplemental Timing Information 5 1 47 V48 tXS FAST SRX to a Valid Command with DLL DDR4 Defined as the interval between Self Refresh Exit command and the next Valid command that needs DLL tXS FAST is defined as tXS_FAST tRFC4 min 10ns 5 2 Supplemental Timing Information 5 2 1 tWR WR write recovery for auto precharge tWR specifies the minimum interval between the last burst write cycle and the point where the precharge command can be issued to the same bank Speed 800 1066 1333 1600 1866 Grade 164 Kibra DDR Protocol Analyzer User Manual China Restriction of Hazardous Substances Table The following tables are supplied in compliance with China s Restriction of Hazardous Substances China RoHS requirements ASA EPRA IA da AS HARE i ee L EE PEDE cis ESE paj ed pa paj pi O RRAS A EPA ATEA ap ITA HAH X RRRA EE i E EFUP PIR RATA E ABT iy HH me REE ORRE MEE 3 95 Re AA sci AR ee 20004 Part Nam PCBAS Mechanical Hardware Sheet Metal Plastic Parts Power Supply Power Cord Protective Case if present Cable Assemblies if present Fans LS resent Probes Gf m Toxic or Hazardous Substances and Elements Polybrominated Hexavalent Mercury Cadmium Chromium Hg Cd Cr Som m E ae a ee FO fee LITE S T 11363 2006 4 Em HRE ith gt 5
64. NA TELEDYNE LECROY Everywhereyoulook 2 Kibra DDR Protocol Analyzer Suite User Manual ae Software Version 2 40 Document Version 2 40 November 2013 Teledyne LeCroy Protocol Solutions Group Trademarks and Servicemarks Teledyne LeCroy Kibra and BusEngine are trademarks of Teledyne LeCroy Inc Microsoft and Windows are registered trademarks of Microsoft Corporation Intel and Pentium are registered trademarks of Intel Corporation All other trademarks and registered trademarks are property of their respective owners THE SPECIFICATIONS AND INFORMATION REGARDING THE PRODUCTS IN THIS MANUAL ARE SUBJECT TO CHANGE WITHOUT NOTICE ALL INFORMATION EXAMPLES AND RECOMMENDATIONS IN THIS MANUAL ARE BELIEVED TO BE ACCURATE BUT ARE REPRESENTED WITHOUT WARRANTY OF ANY KIND EXPRESS OR IMPLIED USERS ARE FULLY RESPONSIBLE FOR THEIR APPLICATION OF ANY PRODUCTS THE SOFTWARE LICENSE AND LIMITED WARRANTY FOR THE ACCOMPANYING PRODUCT ARE SET FORTH IN INFORMATION THAT SHIPPED WITH THE PRODUCT AND ARE INCORPORATED HEREIN BY THIS REFERENCE IF YOU ARE UNABLE TO LOCATE THE SOFTWARE LICENSE OR LIMITED WARRANTY CONTACT Teledyne LeCroy FOR A COPY 2011 Teledyne LeCroy Inc All rights reserved This document may be printed and reproduced without additional permission but all copies should contain this copyright notice WEEE Program This electronic product is subject to disposal and recycling regulations that vary by c
65. NE TN LECROY 8 TELEDYNE LECROY DDR Interposer Power Read Write GE E L Power Status Trigger Figure 1 1 Front Panel On the back the Analyzers have External Trigger Input and Output Reference Clock In Sync In and Out Connectors USB Port for host machine connectivity DC Input 12 volt 5 Amps Power Switch OOOOCDLD AQAGIA 1 SIMA GISI sls Teledyne LeCroy DDA Protocol Analyzer BO teledynelecroy com AO jar Clk Sync Out SA oC e al E Figure 1 2 Back Panel 12 Kibra DDR Protocol Analyzer User Manual Specifications 1 2 1 2 1 1 2 2 1 2 3 1 2 4 1 2 5 1 2 6 Specifications Package Dimensions Connectors Weight Power Requirements Input Power Environmental Conditions Operating Temperature Storage Range Operating Humidity Operating Altitude Switches Power LEDs The LEDs illuminate as follows Flashing Blue LEDs Power O Green Status O Red Solid Blue Trigger Yellow Recording Memory Size Teledyne LeCroy 10 0 x 8 5 x 1 9 inches 25 5 x 21 5 x 4 8 cm DC power connection Trigger IN OUT input BNC host machine connection USB type B Data connector Data In Out 9 pin DB 2 6 Ibs 1 1 kg 90 to 254 VAC 47 to 63 Hz universal input 100 W maximum 0 to 55 C 32 to 131 F 20 to 80 C 4 to 176 F 10 to 90 non condensing Up to 6560 feet 2000 meters on off Status Analyzer
66. P sample files are located in Program Files LeCroy DDR Protocol Suite Data Examples The Kibra 380 or Kibra 480 detects 67 Protocol violations real time over all banks and ranks that total 300 individual checks Protocol Checking is supported on channels of one or two slots Channels of more than two slots require cascaded Kibra Analyzers to monitor the additional slots 1 9 1 Viewing Captured Data After opening the ddrt trace file the captured data can be viewed This data is event based and reflects events in time therefore it cannot be viewed in a packet format O Waveform View shows the following signals and decodes these signals into com mand address and control busses m Clock m Protocol Violation Kibra DDR Protocol Analyzer User Manual 29 Teledyne LeCroy Protocol Analyzer 30 1 9 2 O m Timing Violation m DDR Command m CKS Command Value m Chip Select m Address m BA m BG m ODT m RESET m Parity Error m Parity m RefCikin if selected in Recording Options Listing View shows the same data in a list format in columns The listing view shows the decoding of each of the buses on a sample by sample basis Bank State View displays a Bank by Bank view of the changing bus states It is separated by bank to enable a more insightful picture of the activity in a way that is often obfuscated in a waveform view Traffic Summary View gives a tabulation of commands by Rank bank perfor mance statistics an
67. RD to PRE PREA lt tRTPx PRE PREA to a valid command lt ERP 3 WRA to a valid command lt tWRA 10 REF to a valid command lt tRFC REF to REF interval gt tREFI 9 12 RD to RD same rank lt ERTR RD to RD different rank same DIMM lt EDRRTR 14 RD to RD different DIMM lt EDDRTR RD to WR same rank lt tRTW 16 RD to WR different rank same DIMM lt tDRRTW 28080 28080 a Mo E co MW Mor Mo eS fe BS mn RA EW qm Un MW ACT M REF MRS E FRD WR E EDA WRA zocL zocs E invalid Command W Adjacent CS asse M NOP Deselect Load Defaults Restore Factory Settings Figure 2 64 DDR 3 Timing Violation Analysis Kibra DDR Protocol Analyzer User Manual 91 Teledyne LeCroy Timing Violation Analysis EA Recording Options Global 92 dvanced Triggers Follow MRS Settings On Memory Controller DIMM Speed Case Temperature DOR 41600 DRAM Density Data Width Row Address Count Timing Mode AL Write RecoveryTime nCK Preamble Fine Granularity Fixed ix Disable Self Refresh Abort C A Parity Latency Mode nCk Disable CRC Disable CAL nk E RTT _WR Per Rank Figure 2 65 D Timing Violation Trigger View Category All 7 M Detailed Mode VO1 ACT to PRE PREA lt tRASmin 402 ACT to PRE PREA gt tRASmax v03 ACT to ACT same bank group lt tRRD SBG r VO4 Four ACT Window TRAW E VO5
68. Right Left with Shift Left Mouse Button Scrol view LeftiRight Drag Yiew port to the Lerk Right in Navigator Control Bar with Left Mouse Button Scrol Lefti FRight by one Time Division Left Right Arrow Key Scrol Left Right by one Time Division Shift Scroll Wheel Up Down Scrol Left Right by one Time Division move selection Shift Left Right Arrow Key Scrol Left Right by one Time Division move selection Shift UniDown Arrow Key Scrall Left Right by One Page lick on Left Right Control in Navigator Control Bar with Left Mouse Button croll Left Right by One Page age Up Page Down Key Scrol LeftiRight by One Page move selection Shift Page Up Page Down key oom In when in ZoomBox Mode Draw selection square inside Waveform view with Left Mouse Button oom In when in Drag Mode Draw selection square inside Waveform View with Shift Left Mouse Button Zoom In Out ctrl Scroll Wheel Up Cown Zoom In Out ctrl UpiDown Key oom Input Drag Left or Right edge of viewport to Shrink Enlargen its size Scrol Upi Down piDown Arrow Key Listing View Desired Function Mouse or Keyboard Action Scrall Up Down move selection Shift Upi Down Arrow Scrol UpiDown move selection Shift LeftiRight Arrow m Scrol Up Down 3 units croll Wheel Up Down croll Up Down One Page ageUp PageDown Scrol Up Down One Page move selection Shift Page Up Page Down Scrol view Left Right eftiRight Arrows croll Left Right Drag or click Horizontal Scroll Bar Cont
69. Signals Click here to select signals No Arm Signals Trigger After Reset Arm Never Signals ter 00 Figure 2 32 Sequence Trigger Settings Note Hold mouse over fields to display tooltips The Sequence Trigger feature provides a powerful triggering engine which allows for defining the trigger at the signal level with arm and roll back condition You can define the following trigger conditions a Trigger on any signal transition a Trigger on combination of signals that make a specific command a Trigger on sequence of conditions O Some custom violation detection sequences The advance trigger has three major conditions QO Arm condition This condition is used to define condition before trigger a Reset Arm condition This condition causes resetting of the Arm condition Kibra DDR Protocol Analyzer User Manual 63 Teledyne LeCroy Recording Options Setup When this condition occurs the sequence trigger should see an arm condition before the trigger Q Trigger condition This condition is the condition that causes an analyzer trigger The figure below shows the trigger sequence Initial State Arm Condition Reset Condition Trigger Condition Figure 2 33 Sequence Trigger Flow of Condition The following parameters should be carefully considered in defining sequence conditions for obtaining correct trigger results QO All the conditions are based on the individual signals s
70. Skate view Bank Skate view nu T 0 000 0007117495 100 ns 00 ns p 5 400 ns 100 ns 00 ns 300 ns 400 ns 100 ns Zoom Buttons Markers Navigation Bar Anchor Point Cursor Insertion Time Ruler Figure 3 42 Common Features of the Bank State View and Waveform View 3 5 2 Views There are different amounts of information viewable in the Bank State View depending on your Zoom level Shown below are Zoom Levels to demonstrate these Maximum Zoomed In View This is the maximum zoomed in view In this view the user can view all the traffic details on a specific bank The main information in this view is active states along the time axis Waveform view Bank State view A l Bank State view PR Pj 0 000 001 684 382 1 68 us 5ns a OR Figure 3 43 Bank State Maximum Zoomed In View Kibra DDR Protocol Analyzer User Manual 135 Teledyne LeCroy Bank State View Default Zoom Level This is the default zoom level which displays the active power down idle and self refresh states Active and pre charge commands are also shown In the Active state the utilization for read and write is shown along time Waveform view Bank State view A EJ y da i g gt 1 us Figure 3 44 Bank State Default Zoom Level View Maximum Zoomed Out View This is the maximum zoomed out view It provides a higher perspective of traffic but looses details Waveform view Bank State vi
71. The selections in this pane determine the appropriate JEDEC Violation Parameters in the Timing Violation Trigger Pane Be careful to select values which match the current host machine and DIMM under test The following values are displayed in the Memory Controller pane see DIMM Speed This selects the nominal DIMM speed as provided by the manufacturer This is different than the Speed setting which selects the actual speed that the memory controller is intended to use The JEDEC parameters will use a formula to determine the nClk values Kibra DDR Protocol Analyzer User Manual 47 Teledyne LeCroy Recording Options Setup 48 based on the nanosecond values that the timing values would have been for the nominal DIMM Speed adjusted to the clocks as calculated from the Speed parameter Speed The data transfer rate These are used to determine the appropriate JEDEC violation values Select from the drop down speeds of DDR3 800 to DDR3 2133 Or use the Refresh icon to have the Kibra 380 Protocol Analyzer or Kibra 480 DDR4 Protocol Analyzer hardware automatically detect the DIMM Speed This works when memory is actively being accessed Case Temperature The Case Temperature of the DIMM in Celsius DRAM Density The memory density of the SDRAMs Select from the drop down options from 512MB to 8GB Data Width Select from three data width options from the dropdown menu x4 x8 x16 Row Address Count Select from the drop down options
72. UIMMALY AA o In O mnnn nnnm nnmnnn mnnn 88 2 18 TIMING Calculator VIEW siii aia 88 219 L st MRS V AICS rr da 89 220 ROW USAGE ReDO dius iia iii 89 2 21 TIMING VIOIAMON ANALYSIS ii i 90 Kibra DDR Protocol Analyzer User Manual 3 Teledyne LeCroy Contents 222 MACS io ona enone ako eiee veneuet aenieceneresnesens 93 2 22 1 Recording Options UNIMA Vaso A tii 94 223 INAVIG AMO ia 94 Ze Nadia 95 O 95 E a nn CaO OE Pe Pe eee 96 Tell Teledyne EsCro Vii 96 User Manuals ii tales easaem pa ceetetu sania ceuGetanacaoucal 96 ML A ciciectaevesssacesseive sadeecacaeuitaiaweceenncecann EE E 96 Display LICENSE INTORMALION icine a aaraa aaa Na 96 update Lic n Serino a ea E a E aE 97 Register PFOGUCE ONIN icira iaaa aaa SEa iiare aS 97 CHECK for UPAatES iii atlanta cocccenceteeaatetceneyancacewsi idea evncdeaatavieenteneensies 97 DHOPUCUU Lista ainda ito 97 PD OU REO a A 97 2 21 EXAample FES cuisine 100 RUN a Salmple ANAL SIS lidia 100 SAVING Trace susina etch ere wens seth ewe ely ieee dala aaa a a ied 102 Chapter 3 Viewer Display cc c cccsseecessecenseecenseeeneeeensesenseecanseceasesenneseonees 103 3 1 Window Management unir aaaea idee casinos 103 3 2 WV AVOTOLINY VIEW ninia 103 3 2 1 GloCK POSITION Selec MON ici AA AA AA A A AA 103 3 2 2 Viewport Slider in Navigation Bar ooonccconnnncicnnccncoconconocennnanccconancrrnnnnncrrnnannn rra nrrrnnannrrnnnnnrernnannnrrnnmannrnna 104 Dil SMA 10 EOS co as 105 3 2 4 PlA
73. a 100V 240V 50Hz 60Hz power outlet using the supplied 12 volt power brick and turn on the Power switch At power on the analyzer will go through initialization as shown on the application screen 2 Connect the USB cable between the Kibra 380 or Kibra 480 and a USB port on the host machine The host machine s operating system detects the analyzer and driver files 14 Kibra DDR Protocol Analyzer User Manual Hardware Setup Teledyne LeCroy 1 2 12V DC IF TELEDYNE a f gt y from il E C R 0 Y USB 2 0 Cable power adapter 4 4 Host Machine with Kibra Software different system than test system Host Under Test Figure 1 3 Analyzer Connections 3 Turn off the host machine protocol analyzer and Host Under Test HUT 4 Insert the DDR SDRAM memory into the DIMM socket on the interposer top s Kibra DDR Protocol Analyzer User Manual 15 Teledyne LeCroy Hardware Setup 5 Insert the DDR Slot 1 Interposer and if desired DDR Slot 2 Interposer into the HUT DIMM socket slot s farthest from the CPU Only one channel with up to two slots is supported with a single Kibra DDR analyzer Normally the DIMM connectors for two slots in the same channel on a PC have the same color For the Slot 1 Interposer connect the ribbon cable to Slot 1 and the power cable to Interposer Power both on the front of the protocol analyzer For the Slot 2 Interposer connect the ribbon cable to Slo
74. a 34 20 Se A 35 2 6 Recording Options Setup nissan 36 2 6 1 Recording Options General Va camisa A Rae 38 Prode easan od 38 RECOFGING Type TAOOEr MOTO aiii ates eset N a a a 38 snapshot Mode coins ica 38 Manual Trigger MOG taa 38 Event Trigger MOGC vssiscsesccscccicstesiecaitsaccssecansccaieacess coiiavk cectaneeceesawicstaciecccaisvecsesoieeiezsesiedscesadeceiedsencacesasks 39 Buffer SI us ri tiene ET 39 WAG GER POSI a a a aa aaa a ea 39 INOUG cinn a conseseuevsae sense ecsemecsachesawenseceass 40 Trace Filename e Pad a a cues vense 40 CAU as 40 2 6 2 Recording Options Basic Settings Tab escisiscsccvccacecaevecicssinisckaisceiteviciecsnssainiwecdsisiivasteaceseircecasetizeccstetetess 42 DRAM TYPE A A O 45 ERDIMM SUPPO cinei aa a a aaa a Ea E 45 A ON as a a E a e ara a a a 45 ECC orea E ni aaa 45 ENCON Odin ra 45 FPOIGW MRS SOCIOS aiii a idad 46 Memory Controlled 47 ACUVO Rank Sise aa a a a e a 49 ACUVO Banks iaa 49 2 Kibra DDR Protocol Analyzer User Manual Contents Teledyne LeCroy Command Pinter Olllisatisuaicaia ivi deidad 51 FUMING Violation AI as 52 Handling Timing Violation in MPR states DDRA4 oocccoonnccononccononcccncnnocoanononancnnnnnnnnnannrennanrrnnannnnnanos 57 PrOlOCOl VIOIAUOM UI lidad di 58 Alen o o DB Po A 59 2 6 3 Recording Options Advanced Triggers Tab ccccssssssseceescesssseeeeeceessneeeeeceesseeeeeeeeaseeeeecooensneesenees 59 Commana TIGG noni aida 61 RCW BCW
75. aa 147 3 10 TIMING Violation RGANGIVSIS ius 147 Chapter 4 Real Time Statistics oooccccnncccnnnnncccnnoconcncnoncnnnnnannncnnnnnnnannnnnnannnnnan 149 AA Devices DASNDO ANG ici aa 149 42 Real Time Statisties VIEW sucia as 150 4 21 heal Time Statistics BURNONS cti init ias 152 4 22 e AA o A O 153 423 RTS Prada iaa 154 ADDENGIX A Application NOUS sunissianiiamaniviia tii 155 5 1 DDR3 and DDR4 JEDEC Timing Violations Summary coooncccnnnnccnnnnononnnancnnnnnnnnnnnnnnnnaanrnnnas 155 5 1 1 V01 tRAS ACTIVATE to PRECHARGE command period Min cccccssssseeeeseceneeeeeeeensseeeseees 155 5 1 2 V02 tRAS ACTIVATE to PRECHARGE command period Max scccccessseeeeeeennseeeeeeeenseeeeseees 155 5 1 3 VOS tRRD ACTIVATE to ACTIVATE command period DDR3 different bank same rank DDR4 same bank group 156 5 1 4 V04 1F AW F o r Activate WINGOW a 156 5 1 5 VO5 tRCDx ACTIVATE to internal read or write delay Same bank ccccesseeceeseeseeneeseeneeeeees 156 5 1 6 VOG tWTP WRITE to PRECHARGE delay cccceccccsssseeeeceenssseeeeeceeasaeeeesonaasseeeesonaaseeeesooeasseesessones 157 5 1 7 V07 tRTPx READ to PRECHARGE delay ssssecccccsnsssecccccnnnnsneccccnnnseesecccnnnseesseccnasseeseccenasseneseeees 157 5 1 8 V08 tRP PRECHARGE to a Valid COMMANG cccccseesseeeececenseeeeeeeanseeeeseeeasaseseeeoasaaeeeseennnneeeessooes 157 5 1 9 VO9 tWRA WRA to a Vali
76. actions for criteria matches a Goto state N a Finish Search For criteria definition the user needs to click the criteria button and then click the criteria field to display the DDR Suite dialog to select the criteria from the available options The Criteria define dialog DDRSuite is similar to the Simple search dialog and the user can define conditions for each state similarly Hovering over the criteria displays a tooltip describing the criteria Criteria button Tooltip Click here to display available options Simple Search Sequenced Search Ale Tf Commands PREA amp Chip Select C50 C51 Anchor Point Command FREA amp Chip Select CS0 CS Last Found Start of the Trace ulo 11 Bank Address 4 ERESI If Commands MRS REF SRE PRE PREA ACT WR RD PDX ZQCL Don t Care RDMPR MM DDRSuite Summary Searching for DDR Commands Chip Select E Bank Address MRS Number Commands PREA Chip Select cs0 051 Bank Address Figure 3 31 Find Dialog Sequenced Search 126 Kibra DDR Protocol Analyzer User Manual Viewport Slider Navigation Bar Teledyne LeCroy 3 3 File Setup h Sl F bad den i fz 3 STP A 3 3 Kibra DDR Prot Viewport Slider Navigation Bar The Viewport Slider in the Navigation Bar enables moving across the view see Figure 3 32 on page 127 It displays a full trace in the window as you slide the bar across the bar You can zoom in and ou
77. al Read Command to Precharge Command Delay Note minimum ACT to PRE timing tRAS must be satisfied as well The minimum value for the Internal Read Command to Precharge Command Delay is given by tRTP MIN max 4 x nCK 7 5 ns For DDR3 systems with Additive Latency tRTPx AL tRTP For DDR4 systems it would be AL tRTP PL 5 1 8 V08 tRP PRECHARGE to a Valid Command The minimum interval between PreCharge and the next valid command is specified to ensure the active row is closed before the next valid command Speed 800D 800E 1066E 1066F 1066G 1333F 1333G 1333H 1600G Grade 5 5 5 6 6 6 6 6 6 7 7 7 8 8 8 7 7 7 8 8 8 9 9 9 8 8 8 12 5 15 11 25 13 125 15 10 5 12 13 5 10 ns Speed rade 1000 900 900 s00 566 s00 366M Cl es 10 10 10 11 11 11 10 10 10 11 11 11 12 12 12 13 13 13 Min ns 5 1 9 V09 tWRA WRA to a Valid Command Defines the interval for Write Recovery READ to PRECHARGE delay Clock average Write with Auto Precharge requires that the Controller take into account the CWL column write latency which is the amount of delay required between the point the Write command is issued until the data can actually be put on the bus The data is sent in a burst so the burst length must also be accounted for Once the write data burst has been received the SDRAM will automatically precharge the row The Controller must also take into account the READ to PRECHARGE delay tRP
78. ame rank DDR4 same bank group mooo 159 5 1 22 V22 tddWTW WRITE to WRITE delay different rank same DIMM ooommocoooccnnccccoooccnnnccnnonannnnnnnnos 160 5 1 23 V23 tddWTW WRITE to WRITE delay different DIMIM cccoonnnnnccccconcccccccccononononcccnnononncnnnnnnananonnnnas 160 5 1 24 V24 tXS SELF REFRESH EXIT to a Valid Command without DLL occcoonnnccccnnaniccnncncononccncnconanncnnns 160 5 1 25 V25 tXSDLL SELF REFRESH EXIT to a Valid Command with DLL oooccccccnonananinoconcnanonoconccanonnnnos 160 6 Kibra DDR Protocol Analyzer User Manual Contents Teledyne LeCroy 5 1 26 V26 tCKESR SELF REFRESH ENTRANCE to SELF REFRESH EXIT oooooocccccococcoococcnncconornnnnnananonnnnas 160 5 1 27 V27 tACTPDEN ACTIVE to POWER DOWN ENTRY sssscceeeeeeeeeeeseeessseeeeeeeseeeeoeeasssseeeeesessooaes 160 5 1 28 V28 REFPDEN REFRESH to POWER DOWN ENTRV cccccsssseeeeeeeeeeeecceensnneeeeeeseeeeaeneseeeesseeeoaes 160 5 1 29 V30 tPRPDEN PRECHARGE PRECHARGE ALL to POWER DOWN ENTRY cccssseseeeeeee 161 5 1 30 V31 tRDPDEN READ READ AUTO to POWER DOWN ENTRY cccccsseseeeeeeceeseneeeeeeeeeeeeeeesees 161 5 1 31 V32 tWRPDEN WRITE to POWER DOWN ENTRY ccccssssseeeeeeeeeseeeesessseeeeeeeeeeeeeeesssseeeeeesesaooaes 161 5 1 32 V33 tWRAPDEN WRITE AUTO to POWER DOWN ENTRY cccsssseeeeececessneeeeeeceenseeeeseonneeeeseaees 161 5 1 33 V
79. anual Trigger The Session menu has the following capture options QO Start Recording starts a trace capture Stop Recording stops a trace capture Abort Recording stops recording without any upload or trace file creation Manual Trigger initiates a trigger Repeat Upload enables you to select the analyzer to repeat the upload OCDOO O Kibra DDR Protocol Analyzer User Manual 83 Teledyne LeCroy Analysis Session Session Session ri H er Start Recording Ctrl R S0 Stop Recording Ctrl T W Abort Recording Repeat Upload LeCroy Kibra 380 DDR Analyzer Platform SN 63243 Figure 2 55 Session Menu Option 2 13 Analysis The Analysis menu has the following options O Waveform View opens the Waveform View see Waveform View on page 85 a Listing View opens the listing View see Listing View on page 86 a Bank State opens the Bank State View see Bank State View on page 87 a Traffic Summary Report opens the Traffic Summary View see Traffic Sum mary on page 137 Timing Calculator View opens the Timing Calculator View see Timing Calcula tor View on page 142 O Last MRS Values opens the MR Values View see Last MRS Values on page 143 O Row Usage Report opens the Row Usage report see Row Usage Report on page 144 a Timing Violation Analysis View opens the Timing Violation Analysis View see Timing Violation Reanalysis on page 147 a Trace
80. atency Mode can be disabled or set to the required number of clocks through the pull down menu CRC DDR4 CRC checking can be enabled or disabled through the pull down menu CAL DDR4 Command Address Latency can be disabled or set to the required number of clocks through the pull down menu RTT_WR Per Rank Check the boxes for each rank that uses Dynamic ODT On Die Termination DLL Status per Rank DDR3 Enable or Disable DLL Status per Rank by clicking the checkbox This selects which of tXP or tXPDLL to use to check for Fast Slow exit from Power Down respectively Select from O to 7 If Follow MRS Setting is enabled these values will adjust as per the most recently seen MRS command Note DDR4 If Follow MRS is enabled and CRC and DataMask are seen as enabled then the WCL parameter will be incorporated into the timing calculations for tWTR tWTR_DBG tWTP t WRA tWRPDEN and tWRAPDEN Active Ranks There are eight Active Ranks You can specify from 0 to 7 Ranks 0 3 are for DIMM 1 in slot 1 and 4 7 are for DIMM 2 in slot 2 Users should only select the actual active ranks of their system Selecting non existing ranks will result in incorrect violation detections Active Banks DDR3 Kibra DDR Protocol Analyzer User Manual 49 Teledyne LeCroy Recording Options Setup There are eight Active Banks You can specify from O to 7 It is important to note that disabling banks can have adverse effects on
81. ce The following software application main screen displays Setup Session Analysis Navigation View Window Help aveform view Listing view Waveform view 100 ns 90 n S 60 ns 100 ns 120 ns ee er ren a 265 ns 105ns 95 ns 85 ns 75 ns A 45 ns Protocol Violation Timing Violation Q Command Value A CKE d J BA X A opt lt Traffic Summary Report Timing Calculator Last MRS Values Bank State view Figure 2 1 DDR Protocol Suite Application Kibra DDR Protocol Analyzer User Manual 31 Teledyne LeCroy Software Menus and Toolbar 32 Standard Menu Viewport Slider Scroll Left Software Menus and Toolbar The software has the following main toolbar Each icon is explained in the table below Analyzer Session Analysis Menu Navigation Menu Options Options Menu Options Navigation View Win ow Navigator Bar Scroll Right Figure 2 2 Main Toolbar The software and the menu toolbar options are given in the following table Open icon Click to open a file Refer to File on page 34 Scroll Left and Right arrows These arrows enables moving left and right across the view Viewport Slider only in WaveForm View The slider enables moving across the view Refer to Viewport Slider Navigation Bar on page 127 Save icon Click to save a file Refer to File on page 34 Recording Options icon Refer to Recording Options Ge
82. ck Functionality in Waveform View You can perform the following functions when you right click on a Marker in the Waveform View see the following screen capture Go to Next Gap Go to Previous Gap Go to Marker Go to Trigger Go to Time Go to Selection Set New Marker t 3 157 307 483 990 set amp Edit New Marker t 3 157 307 485 990 Place Marker Edit Marker Delete Marker Delete All Markers Add Lines Preferences Figure 3 18 Menu Options on Right Clicking in the Waveform View Kibra DDR Protocol Analyzer User Manual 113 Teledyne LeCroy Waveform View 114 Go to Next Gap Goes to the next gap see See Gap Markers on page 129 Go to Previous Gap Goes to the previous gap see See Gap Markers on page 129 Go to Marker Allows you to go to specific Marker Go to Cursor Takes you to where the cursor is located This option is active only in the Waveform View Go to Trigger Go to targets moves the target to the center of the screen Go to Time Displays the GoTo Time dialog to go to a specific time stamp or Clock Count Go to Selection Takes you to the selected point Set New Marker Markers can be inserted for illustrating JEDEC violations Markers are useful to identify specific points in the data By default markers follow a numbering convention but can be renamed Set and Edit New Marker Displays the Preferences gt Marker dialog see Figure 3 21 on page 117 Place Marker Move
83. cking on its header and selecting Hide Sub Signal name from the drop down context menu To display it again select Show Hide Sub Signals on the parent header for that group to display the Show Hide Signals dialog and select the signal Kibra DDR Protocol Analyzer User Manual 115 Teledyne LeCroy Waveform View 116 a h 2 MB Show Hide Sub Signals Add Lines Delete Line Chip Select E Show all Set Radix Set Color Preferences Ok Cancel Figure 3 20 Show Hide Sub Signals Dialog Preferences 3 2 12 Displays the Preferences dialog see Figure 2 44 on page 72 Markers Markers are useful to identify specific points in the data The Edit Markers dialog allows you to set the colors name description and the time value for markers Markers can be set edited and deleted in Waveform Listing and Bank State Views You can also go to specific markers in these three views Right click in the view and select Edit Marker The Edit Markers dialog has the following fields see Figure 3 21 on page 117 a OCDOO O Markers Click on this field to view the markers in the drop down list Name Enter or edit the marker name in this field Color Select a color for the marker by clicking on the color field Comments Add comments for later use Time Stamp Markers can be time stamped Choose one of the three self explan atory options m Real time stamp m Relative to first Relative to T
84. consists of three primary areas The recording configuration is on the left allowing the quick selection of Trigger Mode Buffer Size and Trigger Position The middle portion displays the status of capturing and uploading along with the recording controls for that device The right side shows a simplified Real Time Statistics RTS summary which shows the activity on each of the ranks when RTS is running The right side also contains a button aa to bring up the larger RTS view Kibra DDR Protocol Analyzer User Manual 149 Teledyne LeCroy Real Time Statistics View MA Teledyne LeCroy DDR Protocol Suite BETA cs Gs Gs 4 ll e 3 lhe File Setup Session Analysis Navigation View Window Help y a A ET a ae fe A 5 ga A pa m Buffer Size leen 16 ME fay E O au A O A o es Position mammum ja 51 Pr Activity LS EE Figure 4 1 Devices Dashboard Display 4 2 Real Time Statistics View The Real Time Statistics Window see displays Link Utilization performance measurements and statistical values for a DDR traffic plotted in real time Kibra can monitor up to eight ranks simultaneously and displays the important measurements for each time interval approx 1 4 second The items monitored in RTS are O Read Write Power Down Self Refresh MRS Commands RC Commands ZQs ZQI O Refresh DOOUOOUOUOUUD The display shows the events occurring in real time For the monitored items the current valu
85. d tab Advance Triggers allows to set the Command Trigger Command Filter Out and Read Write Trigger see Figure 2 6 on page 37 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy Click to toggle to show hide the right pane mN Recording Options Global o General Basic Settings Advanced Triggers Memory Address Mapping Option KEIM d General Product Product Kib E ME Tiager Mode FN E Trigger Mode r Note Buffer Size 304 Snapshot Trigger Position 309 Dam Trace File Name CAU anual Trigger Capture Raw Data Dis Event Trigger 4 Basic Settings AA DRAM Type RDI 30 MB fey of 4095 MB Capture Mode Nol Follow MRS Settings _ Off 3 75 Mega Samples ECC On Perre eeEeEeEeEEEyy gt gt gt gt yyyy gt gt EEEE ee Use CS2 as Al6 Dis Use C53 as A17 Dis 30 post triggering A ee SSeS C Users Public Documents LeCroy DDR Protocol Suite Traces untitled ddrt Timing Violation Trigge e NONE Protocol Violation Trigg NONE DDR3 IDR4 DDR Signals Normal Capture Memory Controller Opti a Ref Clock In Pulse Type ANa Ran pS M Ref Clock In Raw no processing Active Banks 0 1 O Rising Edge ailing Edge DIMM Speed DD Speed DD Case Temperature 0 8 DRAM Density 512 Page Size 1K Data Width x8 Row Address Count 16 Burst Length BCA CAS Read Latency oni CAS Write Latency Ini Command Timing Mode 17 M F Rest
86. d COMMANG c ccccceeseeeeeeeeeeeneeeeenseseennsecenseeseeseeeeaasesoanseeceaseesoassessonneeses 157 5 1 10 V10 t RFC REFRESH to a Valid Command cccccceseesseeeeeeccennseeeseeeanaeeeeeeeaasaseseneeaaaseeeseonannnesessooes 158 5 1 11 V11 tREFI REFRESH Interval a sanas 158 5 1 12 V12 tRTR READ to READ delay DDR3 same rank DDR4 same bank group 000 158 5 1 13 V13 tdrRTR READ to READ delay different rank same DIMM L ooocoooonnnnccccconnnnncnccconcnnncncnonanannnnnoos 158 5 1 14 V14 tddRTR READ to READ delay different DIMM ooocccccoooccnccccccocnnnccnccconcnncnnnnnnnnnnnonnnonanannnnnnnnos 158 5 1 15 V15 tRTW READ to WRITE delay same raOk Docooonccccconocannnccccnoccnnnccccnnnannncccnnnnnnnnnnnnonnnnnnnrrnonannnnrnnnnnnos 159 5 1 16 V16 tdrRTW READ to WRITE delay different rank same DIMM o oooccccoonncccccnccnonnononcnnonanononnnnas 159 5 1 17 V17 tddRTW READ to WRITE delay different DIMM cccccssssseeeeecesssseeeeeseeeseeeeeseeeenseeeeseoees 159 5 1 18 V18 tWTR WRITE to READ delay DDR3 same rank DDR4 same bank group oocccoccncconoo 159 5 1 19 V19 tdrWTR WRITE to READ delay different rank same DIMM cssesseeeeeeeeeseeeeeeeeeneeeeeesens 159 5 1 20 V20 tddWTR WRITE to READ delay different DIMM ooocccccooncconcconcoocccnccccoonccnnononconnnnnonononnannnnnnnnnnas 159 5 1 21 V21 tWTW WRITE to WRITE delay DDR3 s
87. d timing and protocol violations Results Hyperlink back to points of occurrence within the Waveform Listing and Bank State views m Statistical display Bandwidth Reads Writes all commands total and of total m Kibra Supports Traffic Summary e Reads Total by Bank e Writes Total by Bank e Total and by Bank Timing Calculator View is used to measure the differential time between two Triggers or two Markers Last MRS Values shows the last MRS setting in the trace Row Usage Report is a powerful analysis tool which provides a detailed report on how rows are accessed during the captured trace Violations m Protocol violations m JEDEC Timing violations JEDEC Triggers A library of JEDEC triggers are included in the Kibra 380 or Kibra 480 application Based on DIMM Parameters defined during recording the Kibra 380 or Kibra 480 Protocol Analyzer Application will apply the JEDEC defined values for violations triggers and software detection Kibra DDR Protocol Analyzer User Manual Protocol Analysis The system performs Protocol Analysis by defining a Recording Options configuration This is saved in a file with the ro extension Recording Options define what to capture what the analyzer triggers on and the memory settings You can save trace files as ddrt files for later use 2 1 Main Window On the Analyzer Menu Bar click File gt Open to open an existing Trace File The files use the ddrt extension short for DDR Tra
88. d will thus be displayed MM Teade LeCroy DOA Protocol Lune FRE ALFHA Mindo Help Fey Vide Pe Teup Se aa An i heats 4 mt P aban j View ii i m E nn Y citer lam np ii Eels E i Die Fox 5 EE Tra a Position Figure 4 2 Real Time Statistics Graph Display Kibra DDR Protocol Analyzer User Manual 151 Teledyne LeCroy Real Time Statistics View 152 4 2 1 Real Time Statistics Buttons Additional formatting options are available through the Real Time Statistics toolbar Button 25 A 42 pol Function Start Pause real time statistics Starts or pauses the real time statistical monitor Stop real time statistics Stops the real time statistical monitor Save This button saves the log file in ddrrts fotat which can be opened with the DDR Suite application later to see details of logs within the DDRSuite RTS views For opening ddrrts file the user can click Open from the File menu and select the ddrrts file type Export to CSV Export as CSV format from performance logs It cannot be loaded for view again and can be opened in excel Print Prints the RTS summary including violations count running duration and maximum throughput Zoom In Allows you to view a smaller amount of sample time within the entire graph Zoom Out Allows you to view a larger amount of sample time within the entire graph Enable Auto Scroll When this setting is c
89. e LeCroy Recording Options Setup Timing Violation Trigger By default the software will display all violation triggers in the Timing Violation Trigger window You can select subsets of these trigger events from the drop down menu The following categories are available see Figure 2 19 on page 52 O DRAM Operations O Read Write Commands a Low Power States a Initialization Commands IMPORTANT To use the JEDEC specified values that match the user defined parameters in Memory Controller configuration click the Refresh Timing Violation Symbol Values button 2 see figure below to apply that set of values to all the entries in this section They can be modified after this action if desired Below is the list of timing violations the user should set manually in Recording Options as these cannot be automatically calculated based on DIMM selection parameters a V13 READ to READ different rank same DIMM lt tDRRTR V14 READ to READ different DIMM lt tDDRTR V16 READ to WRITE different rank same DIMM lt tDRRTW V17 READ to WRITE different DIMM lt tDDRTW V19 WRITE to READ different rank same DIMM lt tDRWTR V20 WRITE to READ different DIMM lt tDDWTR V22 WRITE to WRITE different rank same DIMM lt tDRWTW V23 WRITE to WRITE different DIMM lt tDDWTW OOOUOUOUDL Note The default value is 0 which results in the timing violation NOT being used for triggering or error analysis View Cate
90. e a progress bar at the bottom of the screen When the bar disappears it indicates that the data has been uploaded to disk To save a current recording for future reference select File gt Save As or click on the Tool Bar to display the standard Save As screen Give the recording a unique name and save it to the appropriate directory Kibra DDR Protocol Analyzer User Manual DDR Interposer Teledyne LeCroy Power on Procedure 1 Start the DDR Protocol Suite application 2 Make sure the DDR Interposer s is are attached securely to the Kibra unit 3 Verify that either Interposers are not inserted into the system under test OR Interposers are inserted into the system under test AND power is OFF on the system under test Power On the Kibra unit and wait until the Phy s have completed initialization 5 Power On the system under test 1 5 DDR Interposer The Kibra Interposers sit between the Host Under Test HUT DIMM slots and the DIMMS under test The interposers add less than 1 inch of trace length and a resistive tap to minimize effects on signal quality while ensuring an adequate signal for the Analyzer DIMM Interposer Figure 1 4 DDR Interposer Kibra DDR Protocol Analyzer User Manual 17 Teledyne LeCroy DDR Interposer 1 5 1 Kibra 380 or Kibra 480 Slot 1 Interposer Protocol Checking is performed on up to 4 ranks in a single slot Mode register capture is supported on up to 8 ranks in 1 or 2 slots T
91. e errors 46 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy En Recording Options Base Kibra 480 SN 64885 General Basic Settings Advanced Triggers Memory Address Mapping JA 5 Mirrored E DRAM Type UDIMM pu View Category All On or M Detailed Mode Sort by Violation Relevance 0 on creen teme are automat Off ACT to PRE PREA lt tRASmin DIMM Speed DDR3 800 2 ACT to PRE PREA gt tRASmax E 0 ca aa 3 ACT to ACT different bank same rank lt tRRD TEE Four ACT Window lt tFAW DRAM Density 05 ACT to RD WR same bank lt tRCDx Data Width E WR to PRE PREA lt tWTP Row Address Count RD to PRE PREA lt tRTPX Page Size PRE PREA to a valid command lt tRP WRA to a valid command lt WRA con o ma on Ln REF to a valid command lt tRFC REF to REF interval gt tREFI 9 a E Pam o Es A i i 1 Timing Mode 2 RD to RD same rank lt tRTR 3 RD to RD different rank same DIMM lt tDRRTR RD to RD different DIMM lt EDDRTR RD to WR same rank lt tRTW RD to WR different rank same DIMM lt tDRRTW i Ac M SRE M REF MRS E RD WR E RDA WRA E 70cL 70C5 E Invalid Command E idiac E Active Banks Figure 2 15 Follow MRS Settings Turned On Memory Controller The Memory Controller displays the user selected memory controller parameters
92. e for a sample interval is shown along with the maximum value seen during this RTS session In addition the throughput is shown as a percentage of the overall bus bandwidth This is based on either 4 or 8byte bursts It is not accurate when OnTheFly burst mode is in use since Kibra does not see this on the signals under analysis The Scrolling Navigation Bar in the RTS view works the same as the Waveform view 150 Kibra DDR Protocol Analyzer User Manual Real Time Statistics View Teledyne LeCroy You can click on the MAX value to navigate to the point in time in the graph when the MAX was reached To see how the values are calculated hover over the update fields to see the tooltip For the Max values the tooltip shows when that maximum value occurred If the Max occurred more than once it will only show the first time it was reached The right side of the RTS View shows the accumulated counts of violations since the RTS started The accumulated Counts of the events by rank are displayed in the Command Statistics summary at the bottom of the RTS Window Click the Show Ranks button or the Close Box button in the Rank s window to adjust the Rank numbers you are viewing Note On Zooming in the RTS View If you Zoom Out far on the RTS view the actual values within a range cannot be provided so dashed lines will be shown instead To see actual values you will need to zoom in to an area so that values can be calculated for that region an
93. e length Kibra DDR Protocol Analyzer User Manual DDR Interposer Teledyne LeCroy 1 5 6 Daisy Chaining You can use multiple analyzer units for higher port count by daisy chaining the units through the provided Sync In Out interfaces on the analyzer back Connect Out connectors to In connectors of the next unit in the chain You must provide external hubs for connecting the host machine to these units using USB cables You can daisy chain up to four units Note Because chain connections for daisy chained boards cause delay of signals traffic on different boards is not completely time synchronized with about 100 nanoseconds of difference between consecutive boxes Kibra DDR Protocol Analyzer User Manual 21 Teledyne LeCroy DDR Interposer Daisy Chaining To set up the units in a daisy chain 1 Plug in one end of the CATC Sync cable to the CATC Sync Out connector of one unit and the other end to the CATC Sync in connector of another To connect another unit continue this chain see Figure 1 8 2 The software will recognize the connections automatically Teledyne LeCroy DDR Protocol Analyzer Kibra Model 800 0293 00 teledynelecroy com nic ot jar Cik DC IN Sync Out 12V 5A oe Gpo a o a e E CATC Sync Cable A f Teledyne LeCroy DDR Protocol Analyzer A Kibra Model 800 0293 00 teledynelecroy com e ire Cik DC IN Sync Out 12V 5A 90 de e A E a CATC Sync Cable A
94. e row 5 1 2 V02 tRAS ACTIVATE to PRECHARGE command period Max The maximum interval between ACTIVATE and PRECHARGE to the same rank and same bank is specified and is consistent with the Row to Row Delay RRD 9 tREFI is also the maximum amount of time between refresh commands As all Banks must be idle before refresh the maximum amount of time a Row can be active is the maximum amount of time between refresh commands This table is for Tcase 0 85 C Speed Grade 800 Speed Grade tRASmax ns 70200 70200 70200 70200 tRASmax nCK 28080 37416 46823 56160 Kibra DDR Protocol Analyzer User Manual Teledyne LeCroy DDR3 and DDR4 JEDEC Timing Violations Summary 5 1 3 VO3 tRRD ACTIVATE to ACTIVATE command period DDR3 different bank same rank DDR4 same bank group The minimum interval between Activate of one Bank and the next Activate in the same Rank is specified to ensure SDRAM has enough time to activate the first row into the Sense Amps and settle before the next Row is activated Also known as the row to row delay this interval allows the necessary latency to process the pending command For DDR4 this measurement is for the Same Bank Group and is denoted as tRRD SBG Speed Page Size 800 1066 1333 1600 Grade max 4nCK 10ns max 4nCK 7 5ns max 4nCK 6ns max 4nCK 6ns max 4nCK 10ns max 4nCK 10ns max 4nCK 7 5ns max 4nCK 7 5ns 9 1 4 V04 tFAW Four Activate Windo
95. e same type Kibra DDR Protocol Analyzer User Manual 109 Teledyne LeCroy Waveform View W_1600Errors Zoom Box Go to Next Transition DOR Command Go to Previous Transition DDR Command Go to Next RD Command Go to Previous RD Command Go to Next Gap a N raj E Ee ahh sete Go to Previous Gap E E Ae F E E ps jal al el a E EE ia EEEH ahr eee ee a he os oath F E E n mia min ala al Go to Trigger Go to Time Go to Selection Set New Marker t 0 000 126 080 042 s Set amp Edit New Marker t 0 000 126 080 042 s Delete Line DDR Command Preferences Figure 3 12 Go To Commands 3 2 9 Choosing Chip Select Color Highlighting Right click Chip Select to select the color to highlight it in the trace as shown below to display the Select New Color Dialog see Figure 3 14 Add Lines Delete Line Chip Select Set Font Set Radix Set Color Preferences Figure 3 13 Right click Chip Select Select a color and click OK 110 Kibra DDR Protocol Analyzer User Manual Waveform View 3 2 10 Teledyne LeCroy M Select New Color Basic colors Dn Ff Custom col Add to Custom Colors Cancel Figure 3 14 Select New Color Dialog Timing and Protocol Violations Two lines are added near the top of the waveform view One line is for Protocol Violations and one is for Timing violations The Timing and Prot
96. edyne LeCroy Preferences 2 9 3 DDR4 Lines Properties The DDR4 Lines Properties tab allows the user to specify the line color of the DDR4 Command font font size and the format Note Any changes made in the Line Definition dialog are displayed in the Line Properties dialog Select the DDR4Command from the left pane and select the font from the drop down font list to change the font and select change a font size Click on the Radix drop down list to select the format such as text Hex Dec Oct Bin etc Click on the Line Color button to select a color for the line Basic and Custom color options are available Once the properties are selected and applied they will apply to the lines in the Waveform View and their corresponding entries in the Listing View ma Preferences DDR Command Command Value Font Chip Select gt Address Fant size Radix Parity Line Color Alert Reset RefClkIn Clock Protocol Violation Font and Font size will be applied only for text Timing Violano base views like the Listing view C2 DIMMI C2 DIMMA Save As Restore Factory Settings Figure 2 47 DDR4 Lines Properties Dialog 76 Kibra DDR Protocol Analyzer User Manual Preferences Teledyne LeCroy 2 9 4 Symbol Coloring The Symbol Coloring tab allows you to select the foreground and background color for DDR Commands Protocol Violations and Timing Violations Each line stays the same color acro
97. ee Figure 2 34 on page 65 where the values selected are AND ed with each other to get a result For example if you want to trigger on an MRS on Chip Select 1 you would set the Command Value to Low Low Low and the CS1 to Low all other CS s at Don t Care Alternatively if you want to trigger on any case where the RAS CASH and WEH are Low you would leave all the CSH s at Don t Care Q For chip select signal an Any Chip Select option is provided This allows you define an or condition on all ranks This means that if other signal conditions occur on any other chip select the engine considers it as a matched condition regardless of the chip select However at least one chip select should be active to match the condition A Any signal can be triggered with different transitions and states as follow a High m Low m Rising Edge m Falling Edge m Either Edge a The software provides a list of available commands in the Command drop down list see red arrow in figure below for easy selection of signal values However just selecting command value is not sufficient for defining a condition you should define other signals values as well 64 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy a Defining Arm and Reset conditions are optional a Reset and Trigger conditions can be defined as Timer condition instead of Signal Transition This is useful for
98. emory con troller section MM SRE M REF MRS MRD WR E RDA WRA MB 2oc a MM invalid Command Parity error MS Figure 2 25 Protocol Violation Trigger Settings Note Hold mouse over fields to display tooltips 58 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy Alert Trigger DDR4 2 6 3 This special trigger allows triggering Kibra Hardware on the specific length of an Alert signal in DDR 4 This signal is used for the occurrence of an Alert for CRC or C A Parity error Their parameters may be adjusted in the Memory Controller section as follows O Change C A Parity Latency Mode setting to enable and adjust Parity Alert pulse O Change CRC setting to enable Disable CRC Alert option Figure 2 26 Alert trigger Recording Options Advanced Triggers Tab In the Recording Options Dialog you can set the user defined Trigger and Filter options in the Advanced Triggers tab This tab displays three areas the Command Read Write Trigger settings and the Sequence Trigger settings see Figure 2 27 on page 60 The three options on this tab are explained below Selection of the signals for triggering works similar to how they are displayed in the GUI High and Low The active low or active high nature is already taken into account in the signal naming For example CSO being selected means the electrical value goes low but CSO is thus shown as high Triggering can be
99. ent 38 Event Trigger 38 Event Trigger mode 39 expandability 21 F fax number 167 File menu 34 Find icon 34 Find Next icon 34 Firmware LED 13 Follow MRS Settings 46 G Gap Markers 129 Goto Cursor 114 Goto Cursor icon 34 Goto Marker 114 Goto Marker icon 34 Goto Selection 114 Goto Time 114 Goto Trigger 114 Goto Trigger icon 33 H Help menu 96 humidity 13 Install component selection 14 Installation CD ROM 10 Installing 14 installing the analyzer 14 Interposer protocol checking 18 slot 1 18 slot 2 19 J JEDEC Triggers 30 L Launching 24 launching software 24 Launching the CrossSync Control Panel 71 LEDs 13 Lines Properties tab 75 76 170 Listing View 130 actions 130 Listing View icon 33 Listing View tab 79 M Main Toolbar 32 Main Window 31 Manual Trig button 38 Manual Trigger 33 38 manual trigger 38 Manual Trigger Mode 38 memory recording 13 Memory Address Mapping tab 66 Memory Controller pane 47 menu analysis 84 help 96 navigation 94 session 83 view 95 MIR Values View 143 N Navigation menu 94 Navigator Slider bar 119 Note pane 40 O operating range 13 operating system 14 Overlay Signals Mode 106 p Package 13 packing list 9 Place Marker 114 Placing Cursors 105 Post Trigger 39 power requirements 13 Power LED 13 Power Requirement 13 Preferences 116 pre trigger 39 Program Manager Window 24 project examples 100 notes 40 project overview pane 37 Protoc
100. erval gt REFI 9 TREFI REF ACT to ACT different bank group same rank lt tTRRD S Timing Violation Trigger Values for DRAM Operations DDR4 View Category Read Write Commands Sort by Violation Number M Detailed Mode Sort by Violation Relevance C V12 RD to RD same rank lt tRTR C V13 RD to RD different rank same DIMM lt tDRRTR C V14 RD to RD different DIMM lt tDDRIR V15 RD to WR same rank lt tRTW V16 RD to WR different rank same DIMM lt tDRRTW C V17 RD to WR different DIMM lt tDDRTW C V18 WR to RD same rank lt tWTRx V19 WR to RD different rank same DIMM lt tDRWTR C V20 WR to RD different DIMM lt tDDWTR C V21 WR to WR same rank lt WTW C V22 WR to WR different rank same DIMM lt tDRWTW V23 WR to WR different DIMM lt tDDWTW V44 RD to RD different bank group same rank tOCD V45 WR to WR different bank group same rank lt tWTW DBG EH V46 WR to RD different bank group same rank lt tWTR DBG Figure 2 21 Timing Violation Trigger Values for Read Write Commands DDR3 54 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Sort by Violation Number Detailed Mode Sort by Violation Relevance V12 RD to RD same bank group lt tRTR SBG V13 RD to RD different rank same DIMM lt tORRTR V14 RD to RD different DIMM lt EDDRTR V15 RD to WR same rank lt tRTW tRTW
101. es available within the individual Teledyne LeCroy software Search reporting and decoding all operate normally see CrossSync Control Panel on page 71 This feature is available with the Teledyne LeCroy DDR Protocol Suite application The Kibra 380 or Kibra 480 CATC SYNC cable connection is shown below 12V DC from adapter Sync USB 2 0 to host system PCI Express 1 0 2 0 Protocol Analyzer Summit TZE 12V DC from adapter a USB 2 0 to host system Figure 1 9 CATC SYNC Cable Connection Kibra DDR Protocol Analyzer User Manual 23 Teledyne LeCroy Launching Your Kibra 380 or Kibra 480 Software 1 7 Launching Your Kibra 380 or Kibra 480 Software To launch the software double click the DDR Protocol Suite Icon in the Program Manager Window or select DDR Protocol Suite from the Start gt Programs gt LeCroy menu The following screen displays The Device Bar has the following panes as shown in the following figure Device Shows attached device by Serial Number Quick Recording Options Enables Trigger and Buffer settings Recording Control and Status Start Stop and Pause recording and view status Real Time Statistics View the statistics while recording Se Teledyne roy DDR Protocol Suit e a File Setup Session Analysis Navigation View Window Help Figure 1 10 Main Screen 24 Kibra DDR Protocol Analyzer User Manual Launching Your Kibra 380 or Kibra 480 Software Teledyne LeCroy 1 7 1
102. ess Use System Address to search on read write commands with specific target System Address Similar to the Read Write on Specific Address Trigger section the software will fill other field s value according to the specified System Address in the Search dialog Seardh for Summary Read Write Address v w Write Searching for Read Write Address Read Write Address Value E Ca Wri arching i ri System Address Hex 10000480 Commands Rows Hex Write Columns MB Hex o 1001 0000 System Address Hex AAA Ranks Binary Match l Row Address Hex Banks Binary Match OOK Column Address Binary AXXO 1001 0000 Ranks Binary XXX Banks Binary XAK Figure 2 39 Search on System Address 2 7 Devices Click on Setup and select Devices You can also click on the Analyzer Devices icon on the top menu bar E E Setup Session Analysis Navigation View Window Help ET A Recording Options E D EF PT ars PM PX w N Devices WawePo f Launch CrossSync Control Panel Preferences Ctrl Shi t D Reset Interposers bE ERSA 1 0 p Figure 2 40 Setting up Devices on Launching the Analyzer The Analyzer Devices window opens displaying the connected devices see Figure 2 41 on page 71 70 Kibra DDR Protocol Analyzer User Manual CrossSync Control Panel Teledyne LeCroy Enabled for Capture ice Location Status A About Base Kibra 480 SN 64885 Local Mach
103. evice LeCroy Kibra DDR Ana yze Platform Base Unit Req Ver Status Update Selected LeCroy Kibra DDR Analyzer Platform Base Unit Firmware c p_4 Software Demr Update Al lec roy Kibra DDR Analyzer Platform Base Unit lOHub Bus Engine c p_4 Software De Ie W LeCroy Kibra DDR Analyzer Platform Base Unit BusEngine OS c p_4 Software D Figure 1 14 Device Update Dialog 2 Select a device by clicking the applicable box to the left of it and click Update Selected Note You may choose to update all the devices by clicking Update All The following Update Device dialog displays Cur Ver Req Ver Status LeCroy Kibra DDR Analyzer Platform Base Unit Firmware 07 1 08 A cp Sofware De Update Al LIGA MOTA i ANA Zer auf base UA IT us Engine al z El Wie are L a I LeCroy Kibra DDR Analyzer Platform Base Unit IOHub Bus Eng 175 W LeCroy Kibra DDR Analyzer Platform Base Unit BusEngine 2 05 BAD Figure 1 15 Device Update Dialog during Update The following screen displays once the update is complete Click OK to for the update to take effect 26 Kibra DDR Protocol Analyzer User Manual Launching Your Kibra 380 or Kibra 480 Software Teledyne LeCroy Note It is possible to use more than one Kibra 380 or Kibra 480 System to monitor additional DDR3 or DDR4 memory channels Check the box next to all attached Kibra 380 or Kibra 480 in this window to enable capture from additional analyzers P
104. ew o eR a a Figure 3 45 Maximum Zoomed Out View 136 Kibra DDR Protocol Analyzer User Manual Traffic Summary Teledyne LeCroy 3 6 Traffic Summary The Analysis menu option allows you to run a traffic summary of the captured trace al Waveform View FE Listing View Bank State View Traffic Summary Report Timing Calculator View Es Last MRS Values tad Row Usage Report Timing Violation Analysis T Trace Information Figure 3 46 Traffic Summary Menu Option The Traffic Summary View for each captured signal can be viewed This Summary View displays the statistics of commands the type of command and the total count It gives the summary of the commands performance and violations Three summaries can be viewed in Traffic Summary All the summaries are described below 1 Commands 2 Performance 3 Violations Traffic Summary Toolbar Tools The Traffic Summary Report has five buttons on the toolbar Figure 3 47 Traffic Summary Menu Option Save as HTML Save as a web page formatted report which can be opened in a Browser ns Save as csv Save as a comma separated value file for opening in a Spreadsheet application al Text View as text Kibra DDR Protocol Analyzer User Manual 137 Teledyne LeCroy Traffic Summary ES Select Ranges Select the range of time for the reports to cover Print Print on a Printer
105. fined as the interval between a WRITE command and the next Write command to a different rank in same DIMM Timing between commands to a different rank should be vendor specified V23 tddWTW WRITE to WRITE delay different DIMM Defined as the interval between a WRITE command and the next Write command to different DIMM Timing between commands to a different rank or DIMM should be vendor specified V24 tXS SELF REFRESH EXIT to a Valid Command without DLL Defined as the interval between Self Refresh Exit command and the next Valid command that doesn t need DLL Exiting Self Refresh SRX is transmitted by a combination of CKE high plus NOP Deselect command A delay of at least tXS 5nCK tRFC min 10ns must be satisfied before a valid command not requiring a locked DLL can be issued This is to allow completion of any internal refresh operations in progress V25 tXSDLL SELF REFRESH EXIT to a Valid Command with DLL Defined as the interval between Self Refresh Exit command and the next Valid command that needs DLL Exiting Self Refresh SRX requires combination of CKE high plus NOP Deselect command asserted for at least 2 CKs Before a command that requires a locked DLL can be applied a delay of at least tXSDLL 512 CKs and applicable ZQCAL function requirements TBD must be satisfied V26 tCKESR SELF REFRESH ENTRANCE to SELF REFRESH EXIT Defined as the minimum interval between Self Refresh entrance and Self Refresh Exit
106. for absence of damage In the event of damage notify the shipper and Teledyne LeCroy Corporation Retain all shipping materials for shipper s inspection Kibra 380 or Kibra 480 Features O DOOCOD O O O OOOO O Supports the JEDEC specification JEDEC defines the DDR specification Records CMD ADD CNTRL bus Clock based timing displays Fast upload Large sample capture 4GB of Recording Memory m 500 Million Samples Triggers for JEDEC timing violations Triggers for JEDEC protocol violations m User selectable command triggers m User definable trigger sequence DDR3 and DDR4 Analysis Clock speeds of 400 800MHz Kibra 380 400 1200MHz Kibra 480 DDR3 and DDR4 Transfer speeds of 800 1600MT s Kibra 380 800 2400MT s Kibra 480 UDIMM RDIMM LRDIMM SODIMM passive Interposer Metrics on performance observed errors External Trigger In amp Out External Read Write Trigger Out Teledyne LeCroy CrossSync support Kibra DDR Protocol Analyzer User Manual Kibra 380 or Kibra 480 Overview Teledyne LeCroy 1 14 Difference between Kibra 380 or Kibra 480 1 Kibra 480 supports both DDR3 and DDR4 Interposers Kibra 380 only supports DDR3 interposers 2 The Kibra 380 version of the interposers requires a stable DIMM_CLK to properly sample the DIMM signals If the DIMM_CLK is not running the probe will require 6us after the DIMM_CLK resumes before proper capture occurs This can occur when recording DDR traffic durin
107. full trace in the window as you slide the bar across the bar You can zoom in and out by selecting one end of the bar and dragging it in either direction Waveform view Viewport Slider in Navigation Bar Figure 3 2 Viewport Slider For more information on the Viewport Slider and Navigation Bar refer to Viewport Slider Navigation Bar on page 127 104 Kibra DDR Protocol Analyzer User Manual Waveform View Teledyne LeCroy Zooming with Viewport Slider Glyph showing signal edge E O Waveform view 7 85285 s 10 us 7 85295 s 10 us 20 us 30 us 40 us 30 us 40 us 7 85305 s 10u y q E 7 E oS 0 IN SN LS Bete SS saciid C fateh SS Bette i 5 E amp TA 3 catty e Eee sess beta tete SS 55 3 EEE 0309S ptas E E sete rte ps PS e Se 5 35 5 5 e x5 5 H a5 5 gS x 5 re re eS Be re gS PS PS 25 BS p x PS PS x ua Y T E a IO EA AEA atata ateta tatata attat tata rr AAA O 3 SSI SOON O OSO O OO O RDNS AAA AAA SPSS SOS SON A AAA A AAA res e AAA AAA AAA eee AAA tte tte eS AAA 3 Ps AAA AAA AAA A EE E TE ETS AE TEATA IS Sia ee Pt tte tata Ett eS eS 3535 IS b RIOT BID POO BKK on OS F a 3 pos Hee nn POP OONO A AAE EIEEEI EEIEIEE AEEA ARAR O A OS a DO tt EEE at e OOOO 2 EPOC Seago BSS OOOO SHS i O e OO ets 2x5 tds RIE AAA tn eee PO OOOO eto oc RARAS A LS ee A se aa
108. g platform boot or during self refresh mode This limitation can cause RC and MRS commands to be missed The Kibra 480 does not have this limitation CMD ADD CNTRL Bus and Process JEDEC Protocol The Analyzer observes CMD ADD CNTRL bus and processes JEDEC protocol requirements in real time Errors can be seen in the Waveform view or the Listings view as well as in the Traffic Summary Errors listed in the Traffic Summary have a Hyperlink directly to the Waveform and Listing view to allow quick viewing of errors Clock Based Timing The Analyzer features clock based timing The clock times are based on the nominal DIMM speed selected in the Recording Options and samples are synchronized to the DIMM clock DIMM Slot Protocol The Kibra 380 or Kibra 480 are able to track the DIMM slot protocol They also have the option to gather control signals from a second DIMM slot 1 15 Trigger Provides triggers for Command Ordering Violations and State Violations as well as user selectable commands or command sequences Trigger markers are accurate to 0 8 clocks of the triggered event Kibra DDR Protocol Analyzer User Manual 11 Teledyne LeCroy Kibra 380 or Kibra 480 Overview 1 16 Kibra 380 or Kibra 480 Front Panel The Kibra 380 and Kibra 480 have the following features on the front panel Power LED Status LED Trigger LED Slots 1 and 2 for Interposers Interposer Power Connector Read and Write SMA Connectors DOOUOCD IK TELEDY
109. gory Al l nCK e DRAM Operations _ vor ACT te RRER MAY emer irre E sil pe Ga a ds _ V03 ACT to same bank group lt ERRD SBG _ 104 Four ACT Window lt FAW _ VOS ACT to RD WR same bank lt tRCDx _ VO6 WR to PRE PREA lt EWTP VOF RD to PRE PREA lt tRTPx _ V08 PRE PREA to a valid command lt tRP 09 WRA to a valid command lt tWRA 410 REF to a valid command lt tRFC Figure 2 19 Timing Violation Trigger Settings for DDR3 800 a Ln ot Ja Hi Men j a jo a PA d Go l Go t Trigger on JEDEC command timing violations are captured for DRAM Operations Read Write Commands Low Power States and Initialization Commands Select any of these 52 Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy options from the drop down menu to display their values Refer to Figure 2 20 through Figure 2 23 The Timing Violation Trigger check box refer to Figure 2 20 will configure the analyzer to trigger when any selected Timing Violation occurs When the Violation triggers are selected they will be OR conditioned with any other trigger events that are also active Users may customize the individual trigger events by enabling or disabling the check box next to the Violation number Note The timing and protocol violations specified in this window will also be used to identify possible errors in the trace during post pr
110. he Kibra 380 Slot 1 Interposer is shown below Figure 1 6 Slot 1 Interposer with DIMM 18 Kibra DDR Protocol Analyzer User Manual DDR Interposer Teledyne LeCroy 1 5 2 Kibra 380 or Kibra 480 Slot 2 Interposer Interactions among up to 8 ranks over two slots are analyzed The Kibra 380 Slot 2 Interposer is shown below Do not leave the second interposer connected if it is not probing a DIMM on the HUT Leaving it unconnected will cause some signals to float causing false errors to be reported in the trace o 680 0 06 oo o 00 50 OO ooo noooooo 00 00 00 OO sooo 0000an aa Bo 680 60 oo 0000000 ca 2 Figure 1 7 Slot 2 Interposer 1 5 3 External Trigger Out Pulse Width 280 ns Pulse Voltage 3 3 Volts into 1 MegOhms Pulse Voltage 2 7 Volts into 50 Ohms Pulse is positive going Accumulated Latency from DDR Event to Pulse out at SMA terminal DIMM_CLK 400MHz 125 ns DIMM_CLK 533MHz 105 ns DIMM_CLK 667MHz 105 ns DIMM_CLK 800MHz 100 ns All measurements are 10 ns Kibra DDR Protocol Analyzer User Manual 19 Teledyne LeCroy DDR Interposer 20 1 5 4 1 5 5 External Trigger In Edge detected Rising edge only Voltage required Signal needs to be gt 800mV to see a logic 1 Signal needs to be lt 400mV to see a logic 0 Accumulated Latency from SMA terminal to Recognition in FPGA 70 ns 10 ns Always active in Manual or Event Trigger mode no additional software set
111. hecked performance diagrams scroll to the last added data in the diagram when a new value is added If it is not checked the scroll remains on current position and the user is responsible for scrolling Synchronize All Graphs icon Click to synchronize the graphs to the same anchor point Add Remove Ranks icon Click to add remove Ranks to display in the window Preferences icon Click to open the RTS Preferences dialog Select the general and color settings Kibra DDR Protocol Analyzer User Manual Real Time Statistics View Teledyne LeCroy a Trace Information icon Click to display the Trace Information dialog 4 2 2 RTS Preferences The RTS Preferences dialog enables selection of the color and general settings Interval 100 ms Auto Scroll Sync Graphs Power Down gt self Refresh ae Cancel Figure 4 3 Real Time Statistics Preferences Dialog Kibra DDR Protocol Analyzer User Manual 153 Teledyne LeCroy Real Time Statistics View 4 2 3 RTS Print Clicking the RTS Print a button displays the RTS summary including violations count running duration and maximum throughput It also displays the Print dialog to print the report You can choose not to print the report DDRSuite RTS Brief Report RTS started at hw 11 Oct 10 29 15 2072 and t was running until Tiu 11 Oct 10 29 30 2012 There was no Protocol Violation Timing Violations FAW RTP RFC WTR 2804 724902 3769361 3987
112. ies The Analysis parameters have three main categories Defining Target Row s The report provides good flexibility for the user to choose target rows according to their preference This selection could be done in Rank Bank level up to the combination of single rows Although the All rows option provides whole analysis of trace it requires more analysis time and the result may include some additional items of negligible value which cause report complexity However the user can filter the target items even after analysis by using filter options available in report toolbar see Figure 3 62 on page 144 Rank Bank Group DDR4 Only Bank input fields are binary selection fields which the user can use to specify one or a combination of them according to don t care X bit match For example the value 001 will select rank 1 as report target and 00X will select rank O and rank 1 as the target For adding any specific row the user has to enter the row address in hex format in the Add row field and press the add button to be added in the analysis list Kibra DDR Protocol Analyzer User Manual 145 Teledyne LeCroy Row Usage Report 146 Define Analysis Detail Parameters The Row Usage report result is partitioned into two main sections a Cycle Reports Cycle report works in periodic intervals This interval could be defined according to time range or cycle reset by specific command O Commands Count Report Comma
113. iew Listing view Markers Sample No tamp DDR Command Command Value Chip Select Address BA ODT Frotocol Violation Timing Violation 13357 021 13356 13355 1 ia Ba oo D tn a m ilo a Bo A mn a un in a ba a a a a ba bi a on D IA a ba ba Da ra tin amp tn DOI DOI a bo to Boa B PF ip co om tn Li D oe A oo oc in BPP bb bk b W WwW WwW Ww Sa nS oS th amp th D iD 0 Ww HF a a o in m tn a a 13380 13381 13382 13383 oo in ie in 7 D m in o E a Da as in om in Ly o in in ja a Figure 2 58 Listing View For additional information on the Listing View see 86 Kibra DDR Protocol Analyzer User Manual Bank State View Teledyne LeCroy 2 16 Bank State View The Bank State View provides a Bank by Bank view of the changing bus states It is separated by bank to enable a more insightful picture of the activity in a way that is often obfuscated in a waveform view The user can collapse expand multiple signals into individual banks in a rank and zoom and scroll through the traffic on a specific bank o Bank State view n EDE a gt al e os a O a Figure 2 59 Bank State View For additional information on the Bank State View Kibra DDR Protocol Analyzer User Manual 87 Teledyne LeCroy Traffic Summary 2 17 Traffic Summary The Traffic S
114. ine Ready Update Device Update License Figure 2 41 Analyzer Devices Dialog In the current version of the DDR Protocol Suite up to four devices are supported with the CATC_Sync cable For more information on Devices refer to Launching Your Kibra 380 or Kibra 480 Software on page 24 2 8 CrossSync Control Panel The CrossSync Control Panel allows you to select multiple types of Teledyne LeCroy Protocol Analyzers for synchronization and manage the recording process 2 8 1 Launching the CrossSync Control Panel To launch CrossSync from the Kibra 380 Protocol Analyzer or Kibra 480 DDR4 Protocol Analyzer software application select the Launch CrossSync Control Panel in the Setup menu see the screen below Or you can launch CrossSync from the Start menu DDR Protocol Suite A Files LeCroy DDR Protocol Suite Data Samples Sample 1066 ddrt File Setup session Analysis Navigation i a Pin Recording Options E ih E Waveform vi 4 Devices ie Marker mand CKE Command Value Chip Select O sree EA a eee Figure 2 42 Launching CrossSync from the Kibra 380 Protocol Analyzer Application Address T Please refer to the CrossSync Control Panel User Manual for more information Kibra DDR Protocol Analyzer User Manual 71 Teledyne LeCroy Preferences 2 9 72 Preferences The Preferences option allows you to set the display and view your customized configuration
115. is at the Rising or Falling Edge The default setting is Rising Edge Note that the other edge will be ignored DDR Signals 0 ners Normal Capture Raw no processing Ref Clock In a Figure 2 10 Capture Settings Check the DDR Signals check box click the DDR3 or DDR4 radio button and or the Ref Clock In checkbox to select it Choose the Rising Edge or Falling Edge to capture the Ref Clock In Pulse Type refer to Figure 2 6 on page 37 Capture Mode Check the Normal Capture or Raw no processing check box to select it Normal capture uploads raw data and processes it Raw no processing captures directly to a raw unprocessed file which is very fast This is done if a user wants to export to a DDRX file for their own processing The following options are available QO Save As Opens the Save Display Configuration File dialog to save the changes made to the Preferences for future use They can be saved in the default location or you assign a name and Save in a library QO Save as Default Click this button to restore the settings to the factory presets QO Load Allows you to load the saved Preferences from the default location or the library for the current session QO Restore Factory Settings Click this button to restore the settings to the factory presets a OK Saves the current Preferences Q Cancel Click this button to cancel any settings just made A Apply Applies the changes made to the ope
116. is menu to view the last MRS values This view provides the capability of viewing MRS values in any part of a trace in detail Depending on the MRS Change Reference settings see Figure 2 62 the view values will be updated either by scrolling in the view By Anchor Point option or by clicking on the trace and selecting waveform listing view By Selection point option This view also provides the view of the changing timing violations according to the last MRS values along with detailed descriptions of how the value changed via the tooltip Violations will show a detailed formula describing how the calculation of those violations were determined Affected timing violations are highlighted in green Checking the Horizontal check box aligns the display horizontally and checking the Vertical check box aligns it vertically Last MRS Values Traffic Summary Report MRS Change Reference By Anchor Point By Selection Point View order Q H RTT_WR Disable MIRCDx tWTP tRTPx tRP tWRA tRTW tWTRx tRDPDEN tWRE According to MRS at 0 000 000 000 001 s 18 4 7 25 7 14 12 18 MRS l 18 oe 18 18 VOG WR to PRE PREA lt tWTP 2 18 MR Select MR2 Address Values f m Partial Array Self Full Array A2 A0 000 eee ee eee eee Refresh 706 WR to PRE PREA lt tWTP CAS write Latency 7 1 875 ns gt tCK avg gt 1 5 ns A5 A3 010 Auto Self Refresh ASR enable Optional a
117. ite the user can specify the range by entering exact timestamps or by selecting from markers cursors which are already located in the trace Cyclic Row Usage Report 3 10 As mentioned above the cyclic report works in periodic intervals which can be defined according to time range or the cycle can be reset by a specific command Cyclic report shows counters according to each selected row The main report columns are Min Per Cycle This column specifies the minimum counted count of the target command in all cycles Max Per Cycle This column specifies the maximum counted count of the target command in all cycles Avg Per Cycle This column specifies the average counted count of the target command in all cycles Exceed count This column specifies the number of cycles that the counted count has exceeded the max allowed count Add Cursor Rank Ri Bank BG1 BAS Row Address 0x2A56 z Number Start Time End Time Reset Caused By Count 0 000 056 933 500 s 0 000 064 854 250 s Refresh Figure 3 66 Row Usage Report The Add Cursor button applies to the selected item A Cursor pair will be added into the Waveform view to show where this selected item starts and stops Timing Violation Reanalysis The Timing Violation Reanalysis dialog see Figure 3 67 on page 148 allows users to change the timing violation parameters and reanalyze the trace according to new parameters This dialog shows the parameters of recording time as the defa
118. lease power LeCroy Kibra DDR Analyzer Platform Base Unit off and back on for the update to take effect 1 7 2 About The Help gt About menu option provides current details of the hardware software firmware and bus engine 2 About DDR Protocol Suite Teledyne LeCroy DDR Protocol Suite DDRBus amp Protocol Analyzer Software Version 2 10 Build 253 1 device connected 2012 Teledyne LeCroy Teledyne LeCroy Kibra 480 DDR Analyzer Platform serial Number 10029 0x00272D BusEngine Version 0 00 Required Version 200 IORUb Bus Engine Version 72 Mothersoard Drake Rev Oxz PrvbBoard LiKe RevoOx2 Slot 1 infergaser Leoxd Rev Ox Slof 2 Interposer ILNOxQ Rev ixi Figure 1 16 About DDR Protocol Suite Note In the event the Kibra 380 or Kibra 480 system contains firmware that is down rev or not supported in the installed version of software the about box will indicate this by showing the firmware revision number in red see figure above Select Setup gt Devices and choose Update Device to install the firmware supported in the installed version of software Kibra DDR Protocol Analyzer User Manual 27 Teledyne LeCroy Using the Software 1 8 28 The box now indicates the correct revision number in green as shown below P About DDR Protocol Suite oe Teledyne LeCroy DDR Protocol Suite DDRBus amp Protocol Analyzer Software Version 2 10 Build 253 1 device connected
119. llies the number of commands defined within each cycle with minimum maximum and average per selected row This is useful when trying to determine the min max and average write command to an activated row The user defines the rows desired selects the Write Command and resets on PRE PREA This generates a report showing the min max and average number of writes per activate for the desired row or rows The user should count the number of cycles or time the row was activated for a Write command Another use of the report would be for determining Row Hammering The user defines the desired rows the Activate command and the reset or cycle as a Refresh command This allows the user to determine the number of activates to an aggressor row as well as a victim row before either were refreshed Run Analysis button Report filters CJUS s Angela Pasari Desktop rdimmatboot ddrt Row Usage Report Row Address 144 Figure 3 62 Row Usage Report Dialog Click the Run Analysis button see figure above to display the Row Usage Analysis dialog see Figure 3 63 on page 145 Kibra DDR Protocol Analyzer User Manual Row Usage Report Teledyne LeCroy E mue Counted command RDA By Command E Periodic counter reset By Duration ns Max allowed Es command in cycle From lo Initial time 5 765 858 800473 Ms Figure 3 63 Row Usage Analysis Dialog Specify the analysis parameters which have three main categor
120. n trace file Note Preferences from version 1 20 and above should be usable upgradable in future versions but those made with releases below 1 20 should be deleted as they are not forward compatible Kibra DDR Protocol Analyzer User Manual 41 Teledyne LeCroy Recording Options Setup 2 6 2 Recording Options Basic Settings Tab The Basic Settings tab displays the Memory Controller settings Capture settings and the Timing and Protocol Violation Trigger values There is a direct correlation between the settings selected in the Memory Controller and the Timing Violation Trigger The Timing Violation Trigger values are based on what memory settings are made MM Recording Options Global Click on this icon to display the SPD information General Basic Settings Advanced Triggers Metry Address Mapping OO More DIMM Speed Case Temperature DRAM Density Data Width Row Address Count Page Size Burst Length CL nC CWL nck Timing Mode AL Write RecoveryTime nCK MM RTT WR Per Rank DLL Status Per Rank MEE DR 3 800 Speed E D E Figure 2 11 42 c M Detailed Mode E V01 ACT to PRE PREA lt tRASmin C V02 ACT to PRE PREA gt tRASmax C 03 ACT to ACT different bank same rank lt tRRD me rank lt tRRD S C VO Four ACT Window lt FAW C V05 ACT to RD WR same bank lt tRCDx C V06 WR to PRE PREA lt tWTP L V07 RD to PRE PREA l
121. nd counts report provides the number of command counts per selected row s Cm 7 E EN j 5 LX View Order gt Horizontal Vertical Rank bin EES Bank Group bin A Bank bin Cyde Report Commands Count Report Row Address ROBASOMEDB 5 10 0 0 0 5 ROBASOMEDE 3 6 0 0 0 3 RI BA4 0x6EDE 32 59 0 0 0 32 Figure 3 64 Commands Count Report Dialog Cyde Report Commands Count Report Show Detail Report Row Address Min Per Cycle Max Per Cycle Per Cycle Exceed Count RO BG1 BAO 0x245E 5 Rl BG1 BAS Ox2A55 1 R1 BG1 BA 0x2A56 1 1 1 0 Figure 3 65 Cycle Reports Dialog Show Detail Report By pressing this button the user can see the detail of the cycle intervals for the item selected in the Cycle Report grid The description of input fields for the cycle reports is as follows Counted command This field specifies which command type is the target for counting in cycle Periodic counter reset As mentioned before cycle can be reset according to time interval or by other command type Max allowed counted command per cycle This field helps to find violated counts if any max count is selected by counting and highlighting violated cycles in report Kibra DDR Protocol Analyzer User Manual Timing Violation Reanalysis Teledyne LeCroy Define Report Boundary The report result can be limited to a special range of the trace using this section Like other range selection sections in DDR Protocol Su
122. neral Tab on page 38 Device icon Refer to Devices on page 70 Start icon Click to start a recording Stop icon Click to stop a recording Abort icon Click to abort a recording Stops recording without any upload or trace file creation Kibra DDR Protocol Analyzer User Manual Software Menus and Toolbar AR i 4 Teledyne LeCroy Manual Trigger Click to initiate a manual trigger Repeat Upload icon Click to repeat upload Preferences icon Click to open the Display View Configuration dialog see Preferences on page 72 Hide Deselects NOPs icon Hides the captured DES Deselects and NOP command states to remove extra space from the viewing window These commands are replaced by a cross hatch pattern similar to how we represent DES NOP s that were filtered in hardware during capture Synchronize All Views icon Click to synchronize the positions of the currently selected clock value in all views Manage Synced Traces icon Click to synchronize the times between multiple traces which were captured at the same time using CATC Sync cable as shown in Figure 1 8 on page 22 Waveform View icon Click to display the Waveform View see Waveform View on page 78 Listing View icon Click to display the Listing View see Listing View on page 79 Bank State View icon Click to display the Bank State View see Bank State View on page 80 Traffic Summary View icon Click
123. ng Enabled 128 Kibra DDR Protocol Analyzer User Manual Viewport Slider Navigation Bar Teledyne LeCroy 3 3 2 Gap Markers The areas highlighted below indicate that there was a time lapse here while capturing the trace The Time Lapses are due to either Filtering or to actual clock stoppage The filtered items are also reflected in the Navigation bar en ia He 12503130 5 A REE e Md Ea L 250219085 5 1 3592131H5 5 Cases TES pe de Figure 3 34 Time Lapse While Capturing Trace Kibra DDR Protocol Analyzer User Manual 129 Teledyne LeCroy Listing View Waveform view Listing view Markers Sample No 130 3 4 1335 Listing View The Listing View for each captured signal can be viewed The Listing View displays the text based decode of commands in time order The Listing View is synchronized with the Waveform view and displays data in column format Time Stamp 0 000 020 017 875 0 000 020 019 250 0 000 020 020 625 0 000 020 022 000 0 000 020 023 300 0 000 020 025 000 0 000 020 026 300 0 000 020 028 000 0 000 020 029 500 0 000 020 031 000 0 000 020 032 300 0 000 020 034 000 0 000 020 033 900 0 000 020 037 000 0 000 020 038 500 0 000 020 040 000 0 000 020 041 500 0 000 020 043 000 0 000 020 044 500 0 000 020 046 000 DOR Command Command Value Chip Select Address BA ODT Protocol Violation Timing Violation Listing view Comments Don t Care Don t Ca
124. nts 1 1 Kibra 380 or Kibra 480 Overview The Kibra 380 or Kibra 480 Protocol Analyzer provides a platform for developing and debugging protocol issues in environments which allow DDR3 and DDR4 probing using the interposers connected to the front of the Kibra box Currently the Interposer Probes target DIMM and SODIMM sockets of various types Contact Teledyne LeCroy for the most recent offerings of Interposers DDR Command control signals and address values are captured No actual DDR data signals are captured 1 1 1 Receiving Your Kibra 380 or Kibra 480 The analyzer package includes the following components Kibra 380 or Kibra 480 identified in the packing list Kibra Quick Start Guide USB A B 2 0 cable 2 meters DDR3 or DDR4 Slot 1 Interposer cable assembly with power connector sold sepa rately UDIMM DDR3 version shown below as an example OOO O Kibra DDR Protocol Analyzer User Manual 9 Teledyne LeCroy Kibra 380 or Kibra 480 Overview 10 DDR3 or DDR 4 Slot 2 Interposer cable assembly sold separately UDIMM DDR3 version shown below as an example Three Prong AC 12V 5 Amp power brick CATC Sync Cable DB 9 Male to DB 9 F Installation CD ROM with software and documentation Unpacking the Kibra 380 or Kibra 480 Inspect the received shipping container for any damage Unpack the container and account for each of the system components listed on the accompanying packing list Visually inspect each component
125. o display the SPD information window see feature is available on interposers which support SPD capture Only the Kibra 380 DDR3 UDIMM does NOT support SPD reading This 43 Teledyne LeCroy Recording Options Setup SPD Information Item Device type Modlue type SDRAM density SREAM number of banks Number of row addressing bits Number of column addressing bits Module nominal voltage DO Device width in bits Number of ranks Primary bus width in bits Bus width extension in bits Module capacity Minimum Cycle time tckminfns CAS latencies supported Minimum CAS latancy time tAAminins Minimum RASH to CASH Delay time tkCDmin ns Minimum row active to row acrive delay time tPROmin ns Minimum row precharge dealy time RPmin ns Minimum active to precharge delay time tRASmInN ns Minimum active to activefrefresh delay time tkCOmin ns Minimum refresh recovery delay time RFCmin ns Minimum internal write to precharge command delay time 4 TRmintns Minimum internal read to precharge command delay time tRTPmin ns Minimum four activate window delay time 1FSMmintns R22 6 supported RZA supported DLL Off mode supported Extended temperature range C Refresh rate at extended operating temperature range Auto self refresh ASR supported On die Thermal sensor O0TS Readout supported Partial arrary self refresh PASR supported Thermal sensor present SDRAM device type Module nominal hight byte Module max thickne
126. o the field values in Rows Columns Ranks and Banks Hence if user modifies the value of these fields after specifying the target address the changed mapped values take effect Use System Address Read KM write System Address Hex 00000004311 W Hex 0000 0000 0000 0000 Columns Hex Ranks Binary Match Banks Binary Match Figure 2 37 Read Write on Specific Address Trigger Kibra DDR Protocol Analyzer User Manual Recording Options Setup Decoding Read Write Commands in Waveform Listing View Teledyne LeCroy The software will show complete System Address of any read write command in the waveform command description tooltip and listing view column ming Violation Figure 2 38 Decoding Read Write Commands in Waveform Listing View Kibra DDR Protocol Analyzer User Manual As E Te Tebishierie yop bp bo Gp Ee f f p jp p f pa pz ty ia i aT 3 iy 50 ify ty i WR Chip Select CS1 Bank BA6 Row 0x0000 Column 0x090 system Address 0xc0000480 Show Detail Ox0000 OxOcO 0x0000 Ox0b8 Ox0000 OxOb 0x0000 OxDal z 0Ox0000 0Ox0a0 0x0000 0x098 z 0Ox0000 0x090 0x0000 Ox088 z 0Ox0000 Ox080 0x0000 Ox078 0x0000 lt 0x070 2 1 LE ESRT c0000600 c00005c0 c0000580 c0000540 c0000500 c00004c0 c0000450 c0000440 c0000400 c00003c0 c00003580 69 Teledyne LeCroy Devices Search on System Addr
127. ocess analysis The post process error analysis occurs whether the check box for the specific violation is enabled or disabled Sort by Violation Number Sort by Violation Relevance E i VO1 ACT to PRE PREA lt tRASmin V02 ACT to PRE PREA gt tRASmax v03 ACT to ACT different bank same rank lt tRRD V04 Four ACT Window lt AW VOS ACT to RD WR same bank lt tRCDx VO6 WR to PRE PREA lt tWTP VO7 RD to PRE PREA lt tRTPx VOS PRE PREA to a valid command lt tRP VO9 WRA to a valid command lt tWRA 16 5 36 V10 REF to a valid command lt tRFC Vii REF to REF interval gt tREFI 9 V47 ACT to ACT different bank group same rank lt tRRD S Figure 2 20 Timing Violation Trigger Values for DRAM Operations DDR3 Kibra DDR Protocol Analyzer User Manual 53 Teledyne LeCroy Recording Options Setup Sort by Violation Number Sort by Violation Relevance WO1 ACT to PRE PREA lt tRASmin V02 ACT to PRE PREA gt tRASmax tRASmax 9 tREFI base ACT to ACT same bank group lt ERRD 5BG Four ACT Window lt FAW ACT to RD WR same bank lt tRCDx tRCDx tRCD AL WR to PRE PREA lt tWTP tWTP CWL AL WR PLHBL 2 RD to PRE PREA lt tRTPx tRTPX ALHRTP PL RP cL ER tWRA WL HDAL PL HBL 2 PRE PREA to a valid command lt tRP WRA to a valid command lt COWRA REF to a valid command lt tRFC tRFC tRFC1 min EL REF to REF int
128. ocol Violation information is added by the Kibra DDR Protocol Analyzer and software after the trace data is captured and uploaded When a violation is detected a violation marker is added to the appropriate line in the waveform Violations are also marked in the Listing view at the timestamp where the violation occurred These violations are based on the JEDEC timing values specified by the user in the Recording Options gt Basic Settings dialog The violation markers are calculated automatically and placed at the clock cycle closest to the point where the violation is detected Tool tips are provided for some violations to provide further explanation of the protocol or timing violation Right click in the Waveform View to display the context sensitive GO to commands see Figure 3 18 on page 113 The Traffic Summary also lists the number of each type of violation detected within the trace file Each violation is displayed as a hyperlink to the appropriate timestamp in either the Waveform or Listing view allowing for quick visibility of each type of violation see Figure 3 15 on page 112 Kibra DDR Protocol Analyzer User Manual 111 Teledyne LeCroy Waveform View EE E 9 23539181 s RD WRXRDA gt ar P Timing Violation V39 ZQCL to a valid command lt tZQoper 512 clocks Violation occurred in Rank 0 Last ZOCL command to here ns 0 000 000 009 397 ns Invalid MRS at 5 723 539 170 226 s ZQCL command at 5 723 539 160
129. of the trace the analyzer hardware and software details and the recording options used to create the trace Click on each of the four links on the top of the screen to make them visible Click the Top button to go back to the summary The Precision Trigger Timestamp latches the time at which the trigger signal occurs The trigger Sample Timestamp is the timestamp of the first event shown on the screen after the trigger signal occurs It is possible for these to be very different numbers For example if the trigger occurred from an external source when the current analyzer was filtering incoming events If the Trigger was caused by a Protocol or Timing Violation the specific violation type will be displayed in the File Information section of the Trace Information dialog Kibra DDR Protocol Analyzer User Manual 93 Teledyne LeCroy Navigation 94 2 22 1 Recording Options Summary Click on the Recording Options Summary link as shown in Figure 2 66 to display the recording options that were configured in the Recording Options dialog For more information refer to Recording Options Setup on page 36 2 23 Navigation The Navigation menu option enables the user to navigate the application You can go to the trigger marker or where the cursor is located Markers can also be added and removed as shown in the screen capture below Note The menu options listed in the Navigation menu can also be selected when you right click anywhere
130. ol Analysis 31 Protocol Analyzer 29 Protocol Violation trigger options 58 Kibra DDR Protocol Analyzer User Manual Index R RCW BCW Commands Trigger 61 Read Write on Specific Address Trigger 67 Read Write Triggers 62 Real Time Statistics buttons 152 toolbar 152 recording memory 13 Recording Options DIMM Parameters and Violation Triggers tab 42 General tab 38 Recording Options General Tab 38 Recording Options icon 32 Recording Options menu 36 Recording Options Setup 36 Recording Options Summary 94 Register Product Online 97 Remote Connection Settings dialog 29 Remove Marker 115 Repeat Upload icon 33 152 153 Reset Interposer 83 Right Click Functionality in Waveform View 113 Row Usage Report 89 144 S save partial trace capture 102 trace capture 102 Search on System Address 70 Select components for installation 14 selecting components for installation 14 Sequence triggers 63 Session menu 83 set up the analyzer 14 Setup command 14 Setup Devices 70 Setup menu 35 Setup Preferences 72 Limes Properties tab 75 76 Listing View tab 79 Markers tab 116 Symbol Coloring tab 77 Waveform View tab 78 80 82 Shortcut List 97 signal names 119 Slot 1 Interposer with DIMM 18 Slot 2 Interposer 19 Snap to Edge 105 Snapshot 38 Snapshot Mode 38 Software Installation 14 software installation 14 Software Menus and Toolbar 32 Kibra DDR Protocol Analyzer User Manual Teledyne LeCroy software ove
131. on the screen see Markers on page 116 Navigation Goto Time Ctrl G Go to Trigger Go to Selection Go to Marker Go to Cursor Find Ctrl F Find Next F3 Find Previous Shift F3 Figure 2 67 Navigation Menu Option The Navigation menu currently has the following options Refer to Figure 2 67 QO Goto Time Displays the GoTo Time dialog to go to a specific time stamp or Clock Count Go to Trigger Allows you to go to the trigger point in the trace Go to Selection Takes you to the selected point Go to Marker Allows you to go to specific Marker see Markers on page 116 Go to Cursor Takes you to where the cursor is located This option is active only in the Waveform View Back Once you begin navigation through the trace file either through Searching or using Markers the DDR Protocol Suite will remember the locations of inter est and allow you to go backward similar to a web browser QO Forward Once you begin navigation through the trace file either through Searching or using Markers the DDR Protocol Suite will remember the locations of interest and allow you to go forward similar to a web browser QO Find Allows you to search for DDR commands see Software Menus and Tool bar on page 32 0D DODO O Kibra DDR Protocol Analyzer User Manual View 2 24 View Teledyne LeCroy Find Next Gives you the option to search for the next instance see Software Menus and Toolbar
132. ore Factory Settings OK 4 Figure 2 6 Recording Options Dialog General Tab The project overview pane is on the right panel of the Recording Options dialog This pane is displayed in all the three tabs for the Recording Options dialog It gives an overview of the Options selected and their Values To hide this pane click on the vertical bar on the left of this pane The bar acts as a toggle to show and hide the pane See the right pane in Figure 2 6 In the Recording Options dialog tooltips are available in the Basic Settings and Advance Triggers Tabs Tooltips are also displayed on the right panel displaying the Options and Values Hold mouse over fields to display tooltip Kibra DDR Protocol Analyzer User Manual 37 Teledyne LeCroy Recording Options Setup 2 6 1 Recording Options General Tab The following settings can be set from the General tab The options on the General tab are explained below Product Select a product for the recording options from either Kibra 380 Protocol Analyzer or Kibra 480 Protocol Analyzer Recording Type Trigger Mode The Trigger Recording Options dialog allows you to specify when the analyzer completes a data capture Three trigger modes are available The default Snapshot Manual Trigger and Event Trigger When data capture starts with Snapshot selected the analyzer triggers on the first data pattern on the bus Starting a data capture with Event selected triggers when specific event s are
133. ortcuts and shortcuts in the Waveform and Listing View that can be performed with the mouse and keyboard see Figure 2 73 on page 99 About Displays the current Teledyne LeCroy DDR Protocol Suite information see About on page 27 Kibra DDR Protocol Analyzer User Manual 97 Teledyne LeCroy Help License information 98 LeCroy kibra DOR Analyzer SN 63243 License Information for the product Serial Number 63243 Available Features Feature Title Purchased Feature Description OORS Capture Yes Capture DORS Traffic Ref Clk In Capture Yes Capture Reference Clock In Pulses Figure 2 72 License Information Dialog Kibra DDR Protocol Analyzer User Manual Help Teledyne LeCroy Shortcuts List E E 2 x General Desired Function Mouse or Keyboard Action Select Time Position Single Click Left Mouse Button Select Time Position move it to Anchor Point Double click Left Mouse Button Scrol Upi Down Drag or click vertical Scroll Bar Controls Scrol Upi Down Scrol wheel Upi Down Scrol to FirstiLast Position ctrl HomesEnd Waveform View Desired Function Mouse or Keyboard Action Select Time Position without Snap to Edge Shift Single Click Left Mouse Button Select Time Position move it to Anchor Point no Snap Shift Double Click Left Mouse Button ceall View Lefk Right when in Crag Mode Mouse Drag Right Left with Left Mouse Button croll View Left Right when in ZoomBox Mode Mouse Drag
134. orward Backward Command RAS CAS WE CKE 0 3 Chip Select 0 7 OOO DOCK Bank Address 0 2 Address 0 17 XX KXXX KXXX KXXX KXXX ODT 0 3 Cancel Reset Figure 3 28 Find Dialog Generic Signal Values Kibra DDR Protocol Analyzer User Manual Find Teledyne LeCroy Summary Searching for Generic Signal Values Commands bit match MAX CKE bit match KKK Chip selects KAKA KAKA Bank Address bit match FOCA Address bit match 1000000000 20000 2000 ODT bit match MAK 123 Teledyne LeCroy Waveform View Simple Search Protocol Violations Fl Protocol Violation Type Fl Chip Select Fl Bank Address Sequenced Search F L Anchor Point Last Found Start of the Trace Forward Backward Figure 3 29 Find Dialog Protocol Violations 124 ACT REF MRS FQCL ZOCS RD WR RDA WRA SRE Invalid Command Adjacent C5 assertion Parity Error Parity Alert CRC Alert summary Searching for Protocol Violations Violation Type Chip Select Bank Address Kibra DDR Protocol Analyzer User Manual Waveform View Last Found Start of the Trace Di ectie Forward Backward Anchor Point Timing sia eme J WO1 ACT to PRE PREA lt tRASmin Summary TT le T to PRE PREA tha i Cmax CT to ACT different bank same rank Timing Violation Type ae 04 Four ACT Window lt RAW 3 ACT
135. ots Mirrored Select the Mirrored check box to Trigger and Display data correctly for a UDIMM which has a Mirrored configuration ECC Check the ECC box if your system uses Error Correction Coding Encoded Selecting this checkbox see Figure 2 14 on page 46 for DDR4 LRDIMM or RDIMM indicates the Encoded Quad CS should be used for mapping ranks It uses the following truth table CS O _n CS 1 _ n C O Actual Rank 0 1 0 Rank0 0 1 1 Rank 1 1 0 0 Rank 2 1 0 1 Rank 3 Kibra DDR Protocol Analyzer User Manual 45 Teledyne LeCroy Recording Options Setup EN Recording Options Global Advanced Triggers Memory Address Map DRAM Type sEm E F ECC E Encoded e e On off Figure 2 14 Encoded Check Box Follow MRS Settings Click on the radio button to turn MRS Settings on or off This will instruct the Software and Hardware to follow the settings that are changed via MRS commands on the DIMM bus and dynamically adjust certain JEDEC parameters used for error triggering and error analysis Once captured the MRS View will display what the most recent MRS parameters were at any particular time point in the captured trace When Follow MRS Settings is turned on items which are effected dynamically by MRS commands are highlighted in green see Figure 2 15 on page 47 If Follow MRS Settings is turned off in MPR state rd rd violations are turned off Triggers and SW Violation Analysis since they could be fals
136. ountry and region Many countries prohibit the disposal of waste electronic equipment in standard waste receptacles For more information about proper disposal and recycling of your Teledyne LeCroy product please visit teledynelecroy com recycle Teledyne LeCroy 3385 Scott Blvd Santa Clara CA 95054 TEL 800 909 7112 USA and Canada TEL 408 653 1260 worldwide Kibra DDR Protocol Analyzer User Manual il Chapter TTC O GUC UON issiran cicii das 9 1 1 Kibra 380 or Kibra 480 Overview ccccssseecesseecnseeeenseeceneeeceneecoaseseeaseeeanseeeseseaneeseeneeses 9 1 1 1 Receiving Your Kibla 380 or KiDra4GO ae 9 1 1 2 Unpacking the Kibra 380 or Kibra 480 cecascceasvenceccnss cavacensshscases ona tU iaa 10 T3 Kira 380 0r Kibra 480 Features cri iaa Saa 10 1 1 4 Difference between Kibra 380 or Kibra 480 ooocccononcccconccncccoonncccoocanonennnnconennnnrrnnnnnnnrnnnanrrrnnnnnrrrnannnnrrnnannnnnas 11 CMD ADD CNTRL Bus and Process JEDEC Protocol coooonnccccconononccccnnconononcnnnannncnnnnananronrnnnanannnnnnas 11 Clock Based TIMIN us a aaar a E edieeeideeeenes 11 DIMM Slot PROTOCOL a aaa ada aa a aaa a 11 Mh eM VIG GON EEE E eb is AE A 11 1 1 6 Kibla 360 0r Kibla 460 Front PAM id 12 122 SDECIICQUONS ii iia 13 PA AA scaccee cedeceieweetancueiees acacteeethadgeasbintacciniesescoosceuswecane sess neieeacesgousesvenses 13 12 2 POWer REGQUINGINIGIINS ds 13 12 3 Environmental Condi Bohs uristan aaa d 13 EZ A OWCE S
137. po 56 52 55 512 545 1164 RO B7 51 55 576 544 1226 R1 B0 60 64 640 640 1404 R1 Bi 57 60 640 640 1397 R1 B2 56 58 640 608 1362 R1 B3 56 60 640 623 1379 R1 B4 53 57 640 607 1357 Py Ris 54 58 640 608 1360 ig R1 B6 58 61 640 632 1391 S R1 87 60 63 640 640 1403 E 893 945 9765 9760 21363 Figure 3 50 Traffic Summary Commands in Banks i Fel 4 Traffic Summary Report 4 Commands Commands in Ranks Commands in Banks MRS Commands 2 Register Control Comman MRS3 14 4 Performance MRSA 6 6 2 40 Ranks Performance MRS5 4 Violations MRS6 Protocol Violations 4 16 4 28 12 1 4 80 Figure 3 51 Traffic Summary MRS Commands 4 Traffic Summary Report 4 Commands Commands in Ranks Commands in Banks Register Control Commands Figure 3 52 Register Control Commands Kibra DDR Protocol Analyzer User Manual 139 Teledyne LeCroy Traffic Summary Traffic Summary Performance A summary of the Performance can be viewed on this page You can view a total percentage of the Read Write Self refresh and Power down commands see Figure 3 53 You can view Ranks Performance Traffic Summary Report El Commands Commands in Ranks a commands in Banks E Performance Ranks Performance Protocol Violations Timing Violations Refresh Cycles in Ranks Figure 3 53 Traffic Summary Performance EJ AUN i Traffic Summary Report El Commands Commands in Ranks Commands in
138. re Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care Don t Care pamm ll eS eS i ES SS co JS SiS Ss lS i iS F co lS Se lS ESF iia sie sce Figure 3 35 Listing View The following actions can be performed in the Listing View a O Combines all address pieces RA CA BA CS into full physical address m User should define mapping of address lines m The row and column address are dependent on the DRAM density and data width defined in the Recording Options Markers are inserted for adding user defined comments within the Listing View The listing view shows a listing of each clock cycle on the bus called a sample Left clicking anywhere on a row enables selection of that command The primary marker is indicated by a line just below the selected row Also by selecting this sample the primary selection marker is updated on both the waveform and state view screens to this selection point There is no ZOOM function inside the Listing view The scroll wheel operation inside the listing view will scroll the traffic up or down Protocol and Timing violations are shown at the timestamp where they occur The comments field not only decodes the commands but also decodes full MRS
139. rigger point Kibra DDR Protocol Analyzer User Manual Waveform View EM Edit Markers Markers Markers Marker 1 w Name Color Comments Time Stamp 107617373 Real time stamp Relative to first Relative to Trigger point Figure 3 21 Edit Markers Dialog Kibra DDR Protocol Analyzer User Manual Teledyne LeCroy 117 Teledyne LeCroy Waveform View Creating Markers You can create markers for your data in the following two ways 1 Select Set New Marker to add a Marker to the data A marker will display in the data with a default name of Marker 1 2 Right click anywhere in the Waveform Listing or Bank State view to add a marker See Figure 3 22 A marker will display in the data with a default name of Marker 1 Go to Time Go to Trigger Go to Selection Go to Next Transition Parity Error Go to Previous Transition Parity Error Set amp Edit Mew Marker t 0 000 000 027 690 s Add Lines Delete Line Parrty Error Preferences Figure 3 22 Right Click to Display Marker Menu Options Note The menu options listed in the previous table can also be selected from the Navigation menu option Navigation on page 94 If the marker is not displayed on the screen hover over the Marker bar to display a box with the description and time stamp of the marker Waveform view Listing View Marker _1 description time stamp 0 000 000 006 3505 AS Clack
140. rmance 4 Violations Protocol Violations Timing Violations Refresh to Refresh Precharae to Valid Command Ranks Minimum Maximum RankO 10 51 Rank1 10 51 10 10 ommand charge to Valid E Figure 3 59 Traffic Summary Precharge to Valid Command 3 7 Timing Calculator View The Timing Calculator View is used to measure the differential time between two Triggers or two Markers see Figure 3 60 on page 143 To measure perform the following 1 Inthe From field enter the first Trigger or Marker 2 Inthe To field enter the second Trigger or Marker The delta time and clock is displayed in the Delta Time Clock field 142 Kibra DDR Protocol Analyzer User Manual Last MRS Values 3 8 Teledyne LeCroy From Field To Field Unit Selector Delta Time Clocks c Documents LeCroy DDR Protocol Suite Dpta Examples Actrve RD WR ddrt Timing Calculator Initial time 7 Go time a Pans sale a 96 000 E ii l Keep the same units for all entries 134944 0 Figure 3 60 Timing Calculator View As shown above the user can choose to enter the values in seconds milliseconds microseconds nanoseconds or picoseconds Last MRS Values The Last MRS Values View shows the last MRS setting in the trace This view provides the capability of viewing MRS values in any part of a trace in detail Depending on the MRS Change Reference settings see Figure 2 62 on page 89 the view values will be updated either by scrolling in
141. rols Figure 2 73 Shortcut List Kibra DDR Protocol Analyzer User Manual 99 Teledyne LeCroy Example Files Miscellaneous Shortcuts Cir Shift D Start Recording ctrl R Stop Recording Ctrl T User Manual Place Cursor 1 4 E trl 1 4 Set Marker ctrl K Figure 2 74 Shortcut List continued 2 2 Example Files The application includes example files that you can use to perform an immediate analysis without any setup The Analyzer system software has a pre defined folder directory structure for storing all files In Windows 7 and Windows 8 example files are located in C Users Public Documents LeCroy DDR Protocol Suite Data Examples In Windows XP example files are located in Program Files LeCroy DDR Protocol Suite Data Examples It is strongly recommended that you open some example files to familiarize yourself with the application Run a Sample Analysis To run an example analysis 1 Select File gt Open Locate an example analysis by looking in the Examples folder 3 Inthe Examples folder choose an example ddrt file and click Open to display the Open Trace dialog see Figure 2 75 on page 101 100 Kibra DDR Protocol Analyzer User Manual Teledyne LeCroy Example Files p rre OO a Organize New folder OP Favorites Name Date modified Type Restor Mo items match your search p Downloads E Recent Places oy Libraries Documents al Music Pictures E Videos Ma Computer
142. rval between Write with Auto command and initiating Power down entry This is calculated as WL AL CWL BC4 2 4 WR 1CK for all speed bins where WR CKs as programmed in MRO 5 1 33 V34 tXP POWER DOWN EXIT to a Valid Command without DLL Defined as the minimum interval between initiating Power Down Exit and the next Valid Command that doesn t need DLL Without DLL indicates DLL was not disabled during Power Down and a fast exit of Power Down is being used This is calculated as Speed 800 1066 1333 1600 Grade Max 3nCK 7 5 ns Max 3nCK 7 5 ns Max 3nCK 6 ns Max 3nCK 6 ns CKs 5 1 34 V35 tXPDLL POWER DOWN EXIT to a Valid Command with DLL DDR3 Defined as the minimum interval between initiating Power Down Exit and the next Valid Command that needs DLL With DLL enabled after Power Down it takes longer to lock to the clock signal Slow exit from power down is used and requires more clock times for the DLL to lock before the first valid command can be issued This is calculated as Max 10nCK 24 ns for all speed bins Kibra DDR Protocol Analyzer User Manual 161 Teledyne LeCroy DDR3 and DDR4 JEDEC Timing Violations Summary 5 1 35 5 1 36 5 1 37 5 1 38 5 1 39 5 1 40 V36 tCKE Clock Enable minimum pulse width Defined as the minimum pulse width for Clock Enable When CKE drops to signal Power Down entry it must stay low for the time defined Speed 800 1066 1333 Grade Max
143. rview 28 specifications 13 Speed 48 Start icon 32 Stop icon 32 storage range 13 STX SYNC Expansion Card In Out data ports 12 support 167 switches 13 Symbol Coloring tab 77 System restart 14 T Technical Support 167 telephone number 167 The Bank State View 87 The Listing View 86 The MR Values View 89 The Timing Calculator View 88 The Timing Violation Analysis window 90 The Waveform View 30 85 Timing and Protocol Violations 111 Timing Calculator View 142 Timing Calculator View icon 33 Timing Violation Analysis window 147 Timing Violation Trigger 52 Trace Capture 102 Trace Filename Path 40 traces captured with filtering enabled 127 Traffic Summary commands 138 performance 140 violations 141 Traffic Summary View 88 Traffic Summary View icon 33 Trigger 11 trigger manually 38 snapshot 38 Trigger Position 39 Trigger recording options 38 U Unpacking 10 unpacking 10 Update License 97 Using the Software 28 V Video Tutorials 96 View menu 95 Viewing Captured Data 29 Viewport Slider 32 105 127 137 171 Teledyne LeCroy Index W Waveform View 103 actions 119 Waveform View Context Sensitive Menu 109 Waveform View icon 33 Waveform View tab 78 80 82 web site 167 Website CATC 167 weight 13 Windows 95 Z Zoom Box 107 Zoom In 106 Zoom Out 106 172 Kibra DDR Protocol Analyzer User Manual
144. s a a ACT Activate command in all states except Idle An Activate command is detected to a Bank that was already Activated RD WR Read or Write commands in all states except Active The Read or Write Command is detected for a Bank that was not Activated Invalid Command Invalid commands A command is detected before a valid Clock signal was received SRE Self Refresh Enter command in all states except Idle Self Refresh Enter occurred before all banks were Idle RDA WRA Read Auto or Write Auto commands in all states except Active The Read Auto or Write Auto Command is detected for a Bank that was not Activated Adjacent CS assertion Chip Select is asserted for more than one DDR clock cycle as defined by the timing mode parameter setting REF MRS Refresh or Mode Register Setting commands in all states except Idle An MRS Command occurred before all banks were idle ZQCL ZQCS ZQ Calibration Long or ZQ Calibration Short commands in all states except Idle A ZQCL or ZQCS command occurred before all banks were idle Parity Error Parity Error DDR4 Only Triggers on the occurrence of a Parity Error C A parity error is determined by calculating parity on command address lines and comparing that value with Parity signal value This trigger is only enabled when user enables C A Parity Latency Mode setting in m
145. s Delete Marker Delete All Markers Preferences Figure 3 37 Show Legend Menu Option Kibra DDR Protocol Analyzer User Manual Bank State View Teledyne LeCroy E Precharge Power De Self Refresh Active Power Down Unknown Figure 3 38 Bank State View Legend Display Active States The active state of the bank is one of the most interesting features in the analysis of DDR traces The DDR Protocol Suite provides detailed information of what happened inside the bank active state by presenting following information refer to Figure 3 39 a a E The start and end time of bank activation The active row address Density of Read Write by drawing a graph with specific color for each type in dif ferent time divisions see note below The power down active state when the power down happens in active bank Row Address Power Down Active WR Density Figure 3 39 Active State Detail Figure 3 40 Visually Comparing RD WR Density in Two Banks Note While calculations involving the numbers of Reads and Writes are used to display the relative density of these commands during a shown period the time intervals and durations of these displayed regions are selected to allow a subjective view of the traffic This is why the regions change when zooming in and out Kibra DDR Protocol Analyzer User Manual 133 Teledyne LeCroy Bank State View Configuring Visible Banks The application allows users
146. s the selected marker to a new specified position Edit This Marker Enables you to edit a marker Edit Marker Enables you to edit the selected marker see Figure 3 21 on page 117 Go to Next Transition Alert Takes you to where the next clock transition is located This option is active only in the Waveform View Go to Previous Transition Alert Takes you to where the previous clock transition is located This option is active only in the Waveform View Kibra DDR Protocol Analyzer User Manual Waveform View Teledyne LeCroy Delete This Marker Removes a selected marker Delete Marker Removes the selected marker Delete All Markers Removes all markers Add Lines Displays the Lines Selection dialog Click on the checkbox to select the DDR Command lines in the view Lines selection DDR Command El C Command value Es west foe RASH El C Chip Select EF C Address C ADDRO Cancel Figure 3 19 Lines Selection Dialog Delete Line Alert Removes lines where the cursor is located Show Hide Sub Signals It is often desired to show or hide specific signals in a signal group such as Address or Chip Select This feature allows you to select the ones to be shown or hidden when the signal group is shown in its expanded form Right click on Chip Select and select Show Hide Sub Signals Chip Select to display the Show Hide Signals dialog see Figure 3 21 on page 117 You can also hide a signal by right cli
147. sed on the CAS to CAS delay tCCD which is a minimum of 4 CKs for all speed bins V13 tdrRTR READ to READ delay different rank same DIMM Defined as the interval between a single READ command and another READ to a different rank within the same DIMM Read bursts to a different rank are based on the CAS to CAS delay tCCD Timing between commands to a different rank or DIMM should be vendor specified V14 tddRTR READ to READ delay different DIMM Defined as the interval between a READ command and another READ to a different DIMM Timing between commanos to a different rank or DIMM should be vendor specified 158 Kibra DDR Protocol Analyzer User Manual DDR3 and DDR4 JEDEC Timing Violations Summary Teledyne LeCroy 9 1 15 5 1 16 5 1 17 5 1 18 5 1 19 5 1 20 5 1 21 V15 tRTW READ to WRITE delay same rank Defines the interval between Read command and issuing a Write Command to the same Rank This is defined for BC 4 CL CWL 2 CCD 2 or BL 8 CL CWL 2 CCD V16 tdrRTW READ to WRITE delay different rank same DIMM Defined as the interval between a READ command and a WRITE command to a different rank in same DIMM Timing between commands to a different rank should be vendor specified V17 tddRTW READ to WRITE delay different DIMM Defined as the interval between a READ command and a WRITE command to a different DIMM Timing between commands to a different rank or DIMM should be vendor specified
148. sition Find icon You can search for DDR Commands Protocol or Timing Violations see Find on page 120 Find Previous icon Searches for the previous instance Find Next icon Searches for the next instance The following menu options are described in this section a ODODOCDDO O 2 4 File File Setup Session Analysis Navigation View Window Help The File menu has the standard menu options as shown in Figure 2 3 on page 35 34 Kibra DDR Protocol Analyzer User Manual Setup Teledyne LeCroy Analysts Navigation View Ctr 0 Ctrl 5 Export To CSW Exp ort to DDR 1 C Users Public Docurnents Le les Actre Filtered DES ddrt 2 C Users Public Documents L a Samples Actrve RDO WR ddrt Exit Figure 2 3 File Menu Options Open Close Save Save as Export To CSV Export To DDRX Exit 2 5 Setup Click to open an existing trace or sample files Click to open an existing trace or sample files Click to save an existing trace or sample files Click to save an existing trace or sample files with a different name or directory Export file in CSV format Export file in DDRX format Export raw captured data in DDRX file format for offline processing The DDRX file format is available to users who would like to process the signal data for their own analysis It is a very fast way of getting access to the data for this purpose The format of this file is documented in the
149. ss Parity Error Parity A opt IR a ae A A PA TA DAR A RR o igure 3 3 Zooming with Viewport Slider 2 Snap to Edge If you have a marker or cursor and move it to within 10 pixels of a signal s edge a glyph is displayed showing that it will be dropped on that edge of the signal when dropped You need to hover over that particular signal with the mouse to see it Snap to Edge is sensitive in horizontal and vertical positions 2 Placing Cursors To place a pair of cursors activate the Cursor button as shown below and click the left mouse button to place the left x cursor and then click the right mouse button to place the right y cursor any where in the Waveform view See the pink X1 Y1 and X2 Y2 cursors below Cursor Button Press to activate placing cursor button Left Cursor h 3 we Right Cursor I I I I I I l I I T I Figure 3 4 Placing Left and Right Cursors Kibra DDR Protocol Analyzer User Manual Teledyne LeCroy Waveform View 3 2 5 Zoom in and Zoom Out Click on the Zoom In button and the Zoom Out button e to toggle between zooming in and out The buttons are shown in the screen capture below Note The Zoom In Out buttons turn grey when the display is at maximum minimum zoom Zoom In Zoom Out Timing Violation Figure 3 5 Zoom In and Zoom Out Buttons 3 2 6 Overlay Signals Mode Click on the Enable Disable Overlay Signals Mode button on to toggle be
150. ss byte Refrence raw card used byte Address mapping from edge connector to DRAM Module manufacturing id code Module manufacturing location Module manufacturing date Module serial number Module part number Revision code Module 0 DORS SDRAM UEI 2 Gb 8 15 10 15 operable 8 2 64 O no extension 4096 MB 1 875 6709 13 125 13 125 O 13 125 di 50 625 160 O fad 37 5 YES YES Yes 95 2x Mo Mo YEs Mo standard monolithic Ox1T 0x11 Ox Mirrored Ox9f02 week 1 in year 2000 OxD Cmx126x3M34 200009 Module DOR3 SDRAM UD hh 2 sb B 15 10 15 operable 8 2 Bd O no extension 4096 MB 1675 6789 13 125 13 125 TO 13 125 37 0 50 625 160 To 5 37 5 TES Yes YES 95 AX Mo Mo YES Mo standard monolithic Ox 1T 0x11 Ox Mirrored OxoTo2 week 1 in year 2000 0x0 ChAT 2GASMSA2Z000C9 Figure 2 13 SPD Information Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy DRAM Type Select the DRAM Type from the following options in the dropdown menu For DDR3 a UDIMM O SODIMM QO RDIMM OA LRDIMM O SORDIMM For DDR4 a UDIMM SOUDIMM RDIMM LRDIMM ODO Note For RDIMMS the RCD commands will be decoded LRDIMM Support LRDIMMs support two different addressing schemes When selecting LRDIMM you must specify which addressing scheme your system and DIMMs support Click the checkbox to select it O Use CS2 as A16 in both slots O Use CS3 as A17 in both sl
151. ss the view Different colors can be assigned to Protocol and Timing Violations to distinguish between them This is designed to make them more visible in the Waveform and Listing Views mA Preferences General DOR 3 Lines Properties DDR4 Lines Properties Symbol Coloring Waveform view Listing view Bank State view RTS View Value Foreground Color Background Color DDR Command Protocol Violation Timing Violation _DDR3 gt Timing Violation _DDR4 Restore Factory Settings Ok Cancel Apply Figure 2 48 Symbol Coloring Dialog Kibra DDR Protocol Analyzer User Manual 77 Teledyne LeCroy Preferences 2 95 Waveform View The Waveform View tab allows you to set the foreground and background colors display grid lines etc for the Waveform View displayed in the application Choosing various colors allows for easier distinction of information in the view The colors can be set for each of the following elements of the view a Main The background and foreground colors can be selected a Ruler The background and foreground colors can be selected a Selected Row Only the background color can be selected O Layout Check boxes to Show Grid Lines and Anti Alias drawing O Time Stamp Cursor The background and foreground colors can be selected a Header Only the background color can be selected MA Preferences x General DDR3 Lines Properties DDR4 Lines Properties cymbal Coloring Waveform
152. t tRTPx C VO8 PRE PREA to a valid command lt ERP C V09 WRA to a valid command lt tWRA C V10 REF to a valid command lt tRFC C VLL REF to REF interval gt tREFI 9 act H sre E ro ve Ml RDA WRA M Invalid Command MB idjar BB nor Deselect View Category All Sort by Violation Number I Sort by Violation Relevance al La lan 28080 REF mes E zoc 70cs DDR3 Recording Options Dialog Basic Settings Tab Kibra DDR Protocol Analyzer User Manual E 4 General Product Trigger Mode Buffer Size Trigger Position Trace File Name 4 Basic Settings Capture DDR Signals D Capture Ref Clock In D Capture Mode iN DRAM Type U Follow MRS Settings 0 Active Ranks 0 Active Banks 0 Command Filter Cuts I Timing Violation Tri NONE Protocol Violation T NONE 4 Advanced Triggers NONE Sequence Tri ager Trigger 4 Memory Address Mapping Not defined Recording Options Setup Teledyne LeCroy Click on this icon to display the SPD information EA Recording Options Global x General Basic Settings Advanc ed Triggers ary Address Mapping Option 4 General dl A E Product JUE i ecc oder E View Category All 7 l Sort by Violation Number on or l M Detailed Mode DRAM Type UDIMM ea Trigger Mode Buffer Size Sort by Violation Relevance Trigger Position E DIMM Speed Speed Case Temperature DRAM
153. t 2 on the front of the protocol analyzer IMPORTANT Please see the Power on Procedure on page 17 before performing step 7 10 Ti 12 13 14 15 16 Turn on the host machine and the protocol analyzer Open the DDR Protocol Suite Select Recording Options under Setup on the Menu Bar Select the General tab to display the factory default settings such as Snapshot and 30 MB buffer size Use the default settings Select the DIMM Parameters and Violation Triggers tab In the Memory Controller section select the properties of the DIMM to analyze including the DIMM Speed and CAS Latencies Uncheck the Timing Violation Trigger checkbox to cancel triggers Uncheck the Protocol Violation Trigger checkbox to cancel triggers Click OK to use the defaults for all other settings The HUT can be turned on either now or after recording starts Click Start Recording e on the Tool Bar The system starts to capture DDR command control and address signals After 30 MB of traffic are recorded the Analyzer uploads the data and displays the packets To terminate recording before the snapshot automatically completes click Stop Recording Se on the Tool Bar When the recording session is finished the traffic is automatically uploaded from the Analyzer to the hard drive on your host machine as a file named data ddrt or the name you assigned as the default filename While the file is being uploaded you should se
154. t by selection one end of the bar and dragging it in either direction Viewport Slider in the Navigation Bar Listing view Waveform view Bank State view mi The red lines show 235 TD where the timing and i a RETEN 7 8529 s 5 20us odus 40us 1Ous 20us 30 5 101 protocol errors occur i i Clock a alysis Ma vig ation Protocol violation Timing Violation DDR Command KE command value AM cke Figure 3 32 Viewport Slider Select the Viewport Slider till the cursor changes to a cross and drag it in either direction to quickly move to a specific location see Figure 3 32 You can also move the slider by clicking on the left or right arrow on either side of the Navigation Bar Drag either end of the bar to zoom in and out The red lines in the Navigation Bar show where the Timing and Protocol errors occurred 1 Traces Captured with Filtering Enabled In traces captured with filtering enabled the vertical crosshatches represent areas which were filtered during capture These regions of time are filtered by the analyzer to conserve capture memory see Figure 3 33 on page 128 ocol Analyzer User Manual 127 Teledyne LeCroy Viewport Slider Navigation Bar Y Fe Setup Session Analysis l Navigation View Window Help a i a gt E Ak 3 x3 y PT as cni ka PX bal Waveform view E b 100 ns 265 ns 105 ns 95 ns 2 Address 570 Figure 3 33 Trace Capture with Filteri
155. tes The bank is precharged and there is no R W activity in the bank Active One row in the bank is activated and R W commands are issued on different columns Self refresh All the banks of a rank go into self refresh after receiving an SRE command on that rank Kibra DDR Protocol Analyzer User Manual 131 Teledyne LeCroy Bank State View 132 Precharge Power Down All the banks of a rank go to power down idle after receiving a PDE command on that rank Active Power Down This state happens when the bank is active but the rank goes into power down state Unknown This state only happens at the beginning of a trace where insufficient context of prior states makes the current state undetermined The application needs to find a valid command before showing the valid state for that bank Legend Display The DDR Protocol Suite provides a legend that shows the supported states You can display the legend for the Bank State view by right clicking in the view and selecting Show Legend Figure 3 37 shows how to activate the legend and Figure 3 38 shows a snapshot of the legend Selecting deselecting this option toggles between showing and hiding the legend Go to Time Goto Trigger Go to Selection Go to Marker set Mew Marker t 0 000 058 349 900 Set amp Edit New Marker t 0 000 058 349 900 5 Place Marker Edit Marker Marker 3 t 0 000058 349 900 5 Edit Marker Delete Marker Marker_3 t 0 000 058 349 900
156. ting is required An input voltage of is 540mV 100 will cause a trigger condition which will be identified in the trace file The latency on this trigger is approximately 120 ns Low Latency Read Write Trigger Out The low latency SMA trigger out ports on the front of the analyzer operate continuously on Read Write operations The pulse occurs as soon as the Kibra 380 or Kibra 480 interposer is powered on The analyzer SW does not need to be actively recording The settings in the recording options tab have no effect on the low latency SMA trigger out feature The Read Write trigger out ports on the front of the analyzer generate a very short pulse width of about 1 25 ns for 800 MHz DDR3 and relatively low amplitude of 560 mVp p after 1 m cable This trigger out signaling differs from the LVTTL Trigger out on the back of the analyzer in order to shorten the cycle time when triggering on back to back Read or Write operations This trigger out signaling is designed to allow the end user to initiate an acquisition on an oscilloscope and then use the trigger marker in the waveform to correlate transmission of the read or write commands with the actual DQ DQS signals The R W trigger out latency is dependent on the signaling frequency At DIMM Clock 800 MHz 1600MTs Delay is about 39 2 ns At DIMM Clock 667 MHz 1333MTs Delay is about 42 2 ns At DIMM Clock 533 MHz 1066MTs Delay is about 47 4 ns Plus the 2ns per foot for the SMA cabl
157. to display the Traffic Summary View see Traffic Summary on page 137 Timing Calculator View icon Click to display the Timing Calculator View see Waveform View on page 103 Last MRS Values View icon Click to display the MR Values View see Last MRS Values on page 143 Row Usage Report icon Click to display the Row Usage Report see Row Usage Report on page 144 Timing Violation Analysis icon Click to display the Timing Violation Analysis View see Timing Violation Reanalysis on page 147 Trace Information icon Click to display the Trace Information dialog GoTo Any Time icon Click to display the GoTo Time dialog see Markers on page 116 Goto Trigger icon Click to go to a trigger see Recording Type Trigger Mode on page 38 Kibra DDR Protocol Analyzer User Manual 33 Teledyne LeCroy Application Menu Options 29 X sl iH dii 2 3 Application Menu Options GoTo Selection Point icon Click to go to selection see Markers on page 116 Goto Marker icon Select from the drop down list to go to a specific cursor see Markers on page 116 Goto Cursor icon Select from the drop down list to go to a specific cursor see Cursors on page 119 Back to the previous navigated position icon Click to go back to the next navigated position Forward to the previous navigated position icon Click to go forward to the previously navigated po
158. triggering of certain commands see Figure 2 16 DDR4 There are four Bank Groups see Figure 2 16 on page 50 Note Hold mouse over fields to display tooltips 50 DDR3 Memory Controller DIMM Speed Speed ES Case Temperature DRAM Density Data Width Row Address Count Page Size Burst Length CL nCkK CWL nk Timing Mode AL Write RecoveryTime nCK E RTT _WR Per Rank DLL Status Per Rank E Active Ranks B Active Banks ne a es Figure 2 16 Memory Controller Settings 512 Mb EE DDR4 Memory Controller DIMM Speed Speed Se Case Temperature DRAM Density Data Width Row Address Count Page Size Burst Length CL nCK CWL nCK Timing Mode AL Write RecoveryTime nCk Preamble Fine Granularity Self Refresh Abort C A Parity Latency Mode nCk CRC CAL nCK E RTT_WR Per Rank Active Bank Groups 0 1 2 23 BGO El BG B DDR4 1600 DDR4 1600 CE CT ke a ly fixes E E Gr ly CO E fio Ss 1tck lv ZES CET CET CET CET 3 4 6 7 a E E 2 d Kibra DDR Protocol Analyzer User Manual Recording Options Setup Teledyne LeCroy When a device is connected click on the double arrow icon bh to load the correct DIMM speed of the device The application automatically inspects the device and displays its speed as long as the Host Under Test HUT is active If users select combinations in
159. tween enabling and disabling the overlay signals mode Overlay Signals mode allows you to take a single signal and superimpose it on top of another signal the top signal stays translucent Enable Disable Overlay Signals Mode button When activated the button turns blue Protocol Violation Timing Violation DDR Command A e n e Figure 3 6 Enabling Disabling Overlay Signals Mode To overlay a signal perform the following steps 1 Click on the Enable Disable Overlay Signals Mode button to activate it as shown in the screen capture above 2 Click on the signal to be overlaid grab and move it as shown in the following screen capture 106 Kibra DDR Protocol Analyzer User Manual Waveform View 3 2 7 Teledyne LeCroy 191 02 us Ins 2 ns 3m 4ns li The Command Value signal is being Frotocol violation overlaid on the Timing Violation ignal E Chip Select signa COR Command E Command value Q CKE Figure 3 7 Overlaying One Signal over the Other 3 Set the signal to so it overlays on the signal below as shown below enla 151 02 us E d La E Fi r p E E D 5 ins TM Ma 5 e E a L 1 Clack The Command Value overlays the Timing Violation signal Protocol Violation Chip Select DOR Command E Command Wale Figure 3 8 Displaying an Overlaid Signal Zoom Box The Zoom Box mode allows you to drag your mouse around an area of the waveform and zoom in on that particular area of
160. ult and the user can change the parameters as desired The trace is the analyzed according to the new parameters and the violations will be showed in waveform These new parameters display when the trace is next opened but the user can roll back the parameters to the original recording parameters by clicking Load Original Capture Settings Refer to Recording Options Basic Settings Tab on page 42 for more information Click Save TO Current Recording Options to save the new parameters to the current recording options Timing violation re analysis also provides the capability to change the CAL value The CAL value affects the decoding of commands in addition to changing timings You can select Kibra DDR Protocol Analyzer User Manual 147 Teledyne LeCroy Timing Violation Reanalysis the Reanalyze entire trace according to selected CAL option to do a full reanalysis of the trace based on the new CAL setting see Figure 3 67 R la Timing Violation Reanalysis View Category All A DIMM Speed Speed ES Case Temperature Sort by Violation Numbe AGO rt by Violation Releva ACT to ACT same bank group lt ERRD SBG ACT to PRE PREA lt tRASmin ACT to PRE PREA gt tRASmax an gn Pd a oo E i eS DRAM Density Data Width Four ACT Window lt FAW PJ as Row Address Count Page Size Burst Length 3 ACT to RD WR same bank lt ERCDx WR to PRE PREA lt tWIP RD to PRE PREA lt
161. ummary View for each captured signal can be viewed This Summary View displays the statistics of commands the type of command and the total count It gives the summary of the commands performance and violations For additional information see Traffic Summary on page 137 Traffic Summary Report ato ft 4 Traffic Summary Report Total gt paa dem Rank RAW command count 1246 Commands in Banks Register Control Commands 4 Performance Ranks Performance Violations 0 4 Violations Protocol Violations Timing Violations Refresh to Refresh Precharge to Valid Command NOP command count 0 Other commands count 109402 Data usage performance 9 01 Traffic Summary Report Click on any of the items to display each item s summary Figure 2 60 Traffic Summary View 2 18 Timing Calculator View The Timing Calculator View can be used to determine the time in clocks or actual time between any two locations in the trace Users Public Documents LeCroy DDOR Protocol Surte Data Examples Actrve RD WR ddrt Timing Calculator 0 000 202 416 000 0 000 005 796 000 5 40 000 196 620 000 E 134944 0 Keep the same units for all entries Figure 2 61 Timing Calculator View For additional information on the Timing Calculator View See Timing Calculator View on page 142 88 Kibra DDR Protocol Analyzer User Manual Last MRS Values 2 19 Teledyne LeCroy Last MRS Values Select the Last MRS Values from the Analys
162. w Intended to limit thermal overload the controller is allowed to Activate four different Banks with in this time window Activating a 5th Bank within this time window 30 50ns will cause a violation Activating the 5th Bank on the exact expiration time is valid Speed Grade 1066 1333 1600 Size mnm as ao 375 30 30 Mins 28 so s0 Jas ao VO5 tRCDx ACTIVATE to internal read or write delay same bank The minimum interval between Activate and Internal Read or Write is specified to allow sense amps time to open the selected row For systems with Additive Latency tRCDx tRCD spec AL Speed 800D 800E 1066E 1066F 1066G 1333F Grade 5 5 5 6 6 6 7 7 7 oo E Speed 13336 1333H 16006 1600H 1600 1600K Grade 8 8 8 9 9 9 8 8 8 9 9 9 10 10 10 11 11 11 156 Kibra DDR Protocol Analyzer User Manual DDR3 and DDR4 JEDEC Timing Violations Summary Teledyne LeCroy 5 1 6 V06 tWTP WRITE to PRECHARGE delay Defines the minimum interval between the point the Write Burst completes and the next precharge command to the same bank tWTP is calculated as the sum of Write Latency CWL AL Write Recovery time tWR 2 CKs BC4 OR 4 CKs BL8 or OTF The write recovery time tWR starts at the first rising clock edge after the last write data 5 1 7 V07 tRTPx READ to PRECHARGE delay Defines the minimum external Read command to Precharge command spacing to the same bank equal to AL tRTP tRTP is intern
163. yne LeCroy tRTR SBG tCCD_L 4 11 4 Figure 2 22 Timing Violation Trigger Values for Low Power States DDR3 Kibra DDR Protocol Analyzer User Manual 55 Teledyne LeCroy Recording Options Setup 56 Sort by Violation Number Detailed Mode Sort by Violation Relevance v24 SRX to a valid command without DLL lt EXS tXS tXS OR tXS_ABORT SRA 1 V25 SRX to a valid command with DLL lt EXSDLL V26 SRE to SRX lt tCKESR tCKESR tCKE 1 W27 ACT to PDE lt tACTPDEN W28 REF to PDE lt tREFPDEN V30 PRE PREA to PDE lt tPRPDEN V31 RD RDA to PDE lt tRDPDEN tRDPDEN AL CL 5 PL V32 WR to PDE lt tWRPDEN tWRPDEN AL CWL WRHBL 2 W33 WRA to PDE lt TWRAPDEN tWRAPDEN AL CWL WR BL 2 1 v34 PDX to a valid command without DLL lt EXP V35 PDX to a valid command with DLL tXPDLL V36 CKE minimum pulse width lt CKE W37 PDE to PDX lt tPD V48 SRX to a valid command without DLL lt tXS FAST W Y38 ZOC5 to a valid command lt EZQ0S y39 ZOCL to a valid command lt t Qoper 440 First ZOCL after reset to a valid command lt E20init e v4 MRS to MAS EMRO 442 MRS to a valid command lt EMOD E 443 First CKE high after reset to MAS lt EXPR 40 Sort by Violation Number Detailed Mode Sort by Violation Relevance V38 V39 v40 V41 V42 V43 7QCS to a valid command lt tZ2Q0S ZQCL to a valid command lt t2Qoper
164. zer User Manual Recording Options Setup Teledyne LeCroy Command Trigger Triggers can be performed on the following commands a ACT Activate OU PRE PREA Precharge Precharge All O PDE Power Down Entry a PDX SRX Power Down Exit Self Refresh Exit a MRS 0 6 Mode Register Setting To select specific fields of the MRS command use the Sequence Trigger to define the desired signals REF Refresh ZQCL ZQCS ZQ Calibration Long ZQ Calibration Short QO SRE Self Refresh Entry O O seneral Basic Settings Advanced Triggers M act MM PRE PREA PCE E Pox sex M mes o s EE pu FE O O A E Figure 2 28 Command Trigger Settings UDIMM and SOUDIMM Selected for DDR4 Note Hold mouse over fields to display tooltips RCW BCW Commands Trigger The Kibra unit provides for triggering on RCW Register Control Word BCW Buffer Control Word commands Because these commands are available only on RDIMM LRDIMM modules you should select the correct memory type from RDIMM LRDIMM or SORDIMM to activate Once one of these is selected the RCW BCW commands trigger is available in the Advanced Triggers tab The BCW commands are available only in DDR4 LRDIMM modules Figure 2 29 on page 62 shows RCW trigger option in DDR3 and Figure 2 30 on page 62 shows RCW BCW commands trigger on DDR4 Kibra DDR Protocol Analyzer User Manual 61 Teledyne LeCroy Recording Options Setup E ACT REF E M PRE PREA zocs zocL E PDE g

Kibra DDR User Manual

Contents

Download Pdf Manuals

Related Search

Related Contents