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ST40 Micro Toolset GDB command scripts

1. 34 BNF See Backus naur Form STi5197 TRECE RN 34 ST b202 i i e RR eg RR 35 STib528 penray Na iwi Pha See ee eed 36 C Si AA 36 cab5bl97Tcmd 41 STi7108 37 clock freguency commands 63 64 STi7111 sac cain RR RR emn 37 command scripts 9 SUTI ESE Na 37 Configuration commands 22 A BORA EE REDE be 38 configuration registers STIHAT5 usos ee err RE whee se 38 display content commands 30 STm8000 esee 38 FLI7510 Er 42 STV0498 39 FLi 540 m ERR dio 43 FLI 610 i OE errada 42 D location commands 29 PLL settings 63 64 display40 cmd 30 ST40 300 commands 49 DTV150 boards 54 STb7100 commands 47 50 STb7100 MBoard 47 E STb7100 Ref board 47 50 51 STb7109 commands N NN N 48 51 eud7i41 cmd 41 STb7109E commands 52 STb7109E Ref board 52 54 F Ma DOAN cagas A E AA 42 STd1000 coco 54 FLi7510 STi5189 43 44 58 62 configuration registers 42 43 STi5197 rm 41 58 60 core memory map 31 STi5202 a AA EG 55 FLi7510 development board 42 AA AA AA a ME N aaa 31 STi5206 rnm 44 60 FLi7540 STi5289 Rep da ERR A
2. Table 3 Primary targets continued simulator Prefix Board se made tmx mode support variants variants ang hdk5289sti5206 STi5206 HDK board v hdk5289sti5289 STi5289 HDK board hdk7105 STi7105 HDK board hdk7106 STi7106 HDK board hdk7108 STi7108 HDK board hdk7111 STi7111 HDK board mb411stb7100 STb7100 MBoard Validation Platform mb411stb7109 STb7109 Ref Reference Platform mb427 ST40 300 FPGA STEMU2 PCI Board mb442stb7100 STb7100 Ref Reference Platform mb442stb7109 STb7109 Ref Reference Platform v v v v v v v v v v v v v v v v v v mb448 STb7109E Ref Reference Platform v v mb519 STi7200 MBoard Validation Platform v v mb521 STV0498 MBoard Validation Platform v mb548 DTV150 DB Development Platforms 115602 STi5202 MBoard Validation Platform v v mb618 STi7111 MBoard Validation Platform v v mb625 STV0498 Ref Reference Platform v mb628 STi7141 MBoard Validation Platform v v mb671 STi7200 MBoard Validation Platform v v mb676sti5189 STi5189 97 MBoard Validation Platform v v mb676sti5197 STi5189 97 MBoard Validation Platform v v mb680sti7105 STi7105 MBoard Validation Platform v v mb680sti7106 STi7106 MBoard Validation Platform v v mb704 STi5197 MBoard Validation Platform v v mb796sti5206 STi5206 MBoard Validation Platform v v mb796sti5289 STi5289 MBoard Validati
3. 46 JTAG operations 9 STi7108 MBoard 61 STi7111 HDK board 46 M STi7111 MBoard ss 56 STi7111 SAT board 62 mb411stb7100 cmd 47 STi7141 EUD board 41 mb411stb7109 cmd 48 STi7141 MBoard 57 mb442stb7100 cmd 49 50 STi7200 MBoard 53 57 mb442stb7109 cmd 51 STiH415 MBoard 40 mb448 cmd 52 STVO498 MBoard 54 56 mb5i9 cmd 53 mbb521 cmd AA ek adus 54 R mb548 cmd 54 mb602 cmd coco 55 register40 cmd 29 mb618 cmd 56 mb625 cmd iia AE Ra Eaua 56 S mb628 cmd 57 mb671 cmd 57 satb189 cmd 62 mb676stib189 cmd BB sat7111 cmd 62 mb676sti5197cmd 58 shdcommands cmd 69 mb680sti7105 cmd 59 shdconnect cmd 63 mb680sti7106 cmd 59 shdenhanced cmd 72 mb704 cmd 60 sh4gdb 9 mb796sti5206 po sh4insig
4. 67 attributecommands 38 clock frequency commands 64 configuration registers 53 57 core memory map 38 STI7200 s Rs oed ac Rae KAG nn es 66 sti7200 cmd i ea a E a 38 sti7200clocks cmd 64 STi7200 MBoard 53 57 STiH415 configuration registers 40 core memory map 38 STiH415 HVK 2 40 STm8000 attributecommands 38 clock frequency commands 64 configuration registers 29 30 core memory map 38 stm8000 cmd 32 38 STVO498 sees 66 attach command 67 attributecommands 39 configuration registers 54 56 corememorymap 39 86 87 8045872 Rev 9 ky UM1250 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability wh
5. Command f1i7610 define Description Define FLi7610 core memory map f117610 fsim core setup Configure the ST40 functional simulator f1i7610 psim core setup Configure the ST40 performance simulator 8045872 Rev 9 31 87 GDB command files UM1250 2 6 2 7 2 8 32 87 st40300 cmd Defines the commands that describe the core memory regions and other attributes of an ST40 300 series core See Table 24 Table 24 st40300 cmd Command St40300 define Description Define ST40 300 series core memory map st40300 fsim core setup Configure the ST40 300 functional simulator st40300 psim core setup Configure the ST40 300 performance simulator st40gx1 cmd Defines the commands that describe the core memory regions and other attributes of an ST40GX1 See Table 25 Table 25 st40gx1 cmd Command st40gx1 define Description Define ST40GX1 core memory map st40gx1_fsim_ core setup Configure the ST40 functional simulator st40g9gx1 psim core setup Configure the ST40 performance simulator st40ra cmd Defines the commands that describe the core memory regions and other attributes of an ST40RA See Table 26 Table 26 st4Ora cmd Command st40ra_define Description Define ST40RA core memory map st40ra_fsim core setup Configure the ST40 functional simulator st40ra psim core setup
6. Set simulated STiH415 HVK configuration registers with EE setup the ST40 in SE mode with cached RAM mappings Set simulated STiH415 HVK configuration registers with Peo LIHAI eee the ST40 in SE mode with uncached RAM mappings b2000stih415_sim memory_define Define memory regions for the STIH415 HVK to the ST40 simulator 40 87 8045872 Rev 9 ky UM1250 GDB command files 2 31 cab5197cmd Defines the commands that set the configuration registers for the STi5197 on an STMicroelectronics STi5197 CAB board See Table 49 Table 49 cab5197 cmd Command Description cab5197sim Set simulated STi5197 CAB board configuration registers Set simulated STi5197 CAB board configuration cab5197simse registers with ST40 in SE mode with cached RAM mappings cab5197simseuc Set simulated STi5197 CAB board configuration registers with ST40 in SE mode with uncached mappings cab5197simse29 Set simulated STi5197 CAB board configuration registers with ST40 in SE mode with 29 bit compatibility mappings in P1 and P2 cab5197 sim memory define Define memory regions for the STi5197 CAB board to the ST40 simulator 2 32 eud7141 cmd Defines the commands that set the configuration registers for the STi7141 on an STMicroelectronics STi7141 EUD Board See Table 50 Table 50 eud7141 cmd Command eud7141sim setup eud7141simse setup Description Set simulated STi7141 EUD board configurat
7. mb448 display registers Display STb7109E Ref board configuration registers Define memory regions for the STb7109E Ref board to the ST40 simulator Set the STb7109E Ref board to bypass to the ST40 through stb7100 bypass setup see stb7100jtag cmd on page 65 Used by the mb448bypass command Set the STb7109E Ref board for use with the ST MultiCore MUX device allowing simultaneous access mb448stmmx setup to the ST40 and other CPUs on the STb7109E through Stb7100 stmmx setup see stb7100jtag cmd on page 65 Used by the mb448stmmx command mb448 sim memory define mb448bypass setup 1 Only supported by the STMC1 g 8045872 Rev 9 UM1250 GDB command files 2 49 g When configuring the STb7109E CLOCKGENA peripheral the mb448stb7109 setup configuration command assumes that the frequency of the external clock source is 27 MHz If the frequency of the clock source is 30 MHz the only possible alternative set the GDB convenience variable mb448stb7109extclk to the correct frequency in MHz before connecting to the target For example set mb448stb7109extclk 30 mb448stb7109bypass stmc mb519 cmd Defines the commands that set the configuration registers for the STi7200 on an STMicroelectronics STi7200 MBoard See Table 67 Table 67 mb519 cmd Command mb519 setup Description Set STi7200 MBoard configuration registers mb519se setup Set STi7200 MBoard config
8. Table 91 sti7200clocks cmd Command Description Display the internal clock frequencies and PLL 172 ispl lock a H Re 0 EE LOENS configuration register settings 8045872 Rev 9 ky UM1250 GDB command files 2 74 stb7100jtag cmd Defines the commands for configuring the connection between an STMC1 or STMCLite and the ST40 CPU of an STi5202 STb7100 STb7109 see Table 92 Table 92 stb7100jtag cmd Command Description SEEDIERE EES setup ED the STMC for a direct connection to the ST40 Similar to stb7100 bypass setup except that the Stb7100 bypass setup attach STi5202 STb7100 STb7109 is not reset Used when attaching to a running or stopped target Configure the STMC1 for a connection to the ST40 CPU TT RE using an ST MultiCore MUX device allowing P xi Ee simultaneous access to the ST40 and other CPU s on the STi5202 STb7100 STb7109 Similar to stb7100_stmmx_setup except that the Stb7100 stmmx setup attach STi5202 STb7100 STb7109 is not reset Used when attaching to a running or stopped target 1 See Section 2 78 sh4targets attach cmd on page 67 and Section 2 79 sh4targets attach debug cmd on page 69 2 Only supported by the STMC1 Note The STb7100ResetDelay GDB convenience variable is used by the commands listed in Table 92 to set the delay in milliseconds when performing a reset of the target The default is 20 milliseconds To override the default set this variable before c
9. C71 UM1250 YA User manual ST40 Micro Toolset GDB command scripts Note Introduction There are two methods to connect and configure a target through an ST Micro Connect e ST TargetPacks the recommended method for configuring a target connected to an STMC1 STMC2 or STMCLite e GDB command scripts for configuring targets connected to an STMC1 or STMCLite GDB command scripts are also the only method for connecting and configuring simulated targets This document provides information for users who wish to use GDB commands to configure a target It also provides information about the GDB commands for connecting to targets with ST TargetPacks The STMC software and ST TargetPacks together known as the ST Micro Connection Package are available as a separate release to the ST40 Micro Toolset and are described in e ST Micro Connect 2 datasheet 7912386 e ST TargetPack user manual 8020851 e Developing with an ST Micro Connect and ST TargetPacks application note 8174498 Chapter 1 Target configuration provides general information on using GDB command scripts for connecting to and configuring a target Chapter 2 GDB command files provides reference information on the GDB commands supplied by the ST40 Micro Toolset Appendix A JTAG control provides information concerning the JTAG interface For backwards compatibility a target connected to an STMC2 may still be configured using a GDB command script The co
10. see the ST40 Micro Toolset User Manual 7379953 for further details This is the same as the useaccesssize configuration command 1 The configuration commands are listed in Table 7 Common STMC configuration commands on page 15 Table 9 STMC1 configuration commands on page 19 Table 10 STMCLite configuration commands on page 19 Table 18 ST TargetPack STMC configuration commands on page 24 Not all configuration commands may be usefully set after connecting to a target Table 100 lists the equivalent stmcconfigure commands for the target commands listed in Table 99 Table 100 stmcconfigure equivalents Target command linkspeed speed stmcconfigure equivalent command stmcconfigure linkspeed speed linktimeout timeout stmcconfigure linktimeout timeout ondisconnect action stmcconfigure ondisconnect action stmcmsglevel level stmcconfigure msglevel level use watchpoint access size size stmcconfigure useaccesssize size 8045872 Rev 9 71 87 GDB command files UM1250 2 81 2 82 2 83 2 84 72 87 sh4targets targetpack cmd See Section 1 7 STMC2 target configuration using GDB command scripts on page 26 sh4enhanced cmd Defines the commands to set and display the static PMB translation mappings used when in space enhanced mode 32 bit physical addressing see Table 101 Table 101 sh4enhanced cmd Command Descriptio
11. stmc The equivalent connection command using an ST TargetPack sh4xrun t stmc mb448 st40 e a out The c sh4tp option is not required in this connection command as the t option specified with a valid target definition implies c sh4tp by default See ST40 Micro Toolset user manual 7379953 for more information The target connection command must be compatible with the target specified by the GCC mboard option used when linking the program 8045872 Rev 9 9 87 Target configuration UM1250 1 1 Target connection overview For each supported target the ST40 Micro Toolset supplies a GDB command script file of the form sh4targets board cmd where board is the target name for example sh4targets mb448 cmd for an STb7109E Ref board Each sh4targets board cmd GDB command script file defines connection commands derived from the name board with suffixes that reflect the function of the command The commands for connecting to a target through an STMC have the following format board se mode tmx mode endian and take the following arguments argO specifies the name or IP address of the STMC see Section 1 3 1 Commands to connect to a target through an STMC on page 14 Sargl optional specifies configuration commands for the STMC see Table 7 Common STMC configuration commands on page 15 The commands for connecting to a simulated target have the following format board sim mode se mode endian and
12. 63 2 70 stb7100clocks cmd ees 64 2 71 sti5528clocks cmd ui ees 64 2 72 stm8000clocks cmd EE eese 64 2 73 sti7200clocks cmd 64 274 sib71O0jlag MA edades REAGIEREN RS RE bie De st 65 2 75 su7200jliaa EI ss EER peek RA RE Y S Ker Rad Rod e e 66 4 87 8045872 Rev 9 ky UM1250 Contents NICE occ Bm suecas SEERDE ANNA ee TIT 66 2 77 sh4targets cmd sh4targets board cmd 67 2 78 sh4targets attach cmd 67 2 79 sh4targets attach debug cmd 69 2 80 sh4commands cmd 70 2 81 sh4targets targetpack cmd 72 2 82 sh4enhanced cmd 72 2 83 sh4virtual cmd 72 2 84 allemdicmid istud iu Ek eS kah DAA Dee E AO 72 Appendix A JTAGControl 73 A 1 Introduction to JTAG 73 A2 Thejiagcommand 73 A 2 1 DAG is bra Ead SER tebe ACRES OE es 74 A 2 2 Signal specification ikka SNAEEARNEA RREN ERREA 75 A 2 3 TDisignalcapture 76 A 2 4 Usingthejiagcommand 77 Revision DISIOEV iii rd da ER Mk e de la MR AA rd eed
13. STi5202 See Table 33 Table 33 sti5202 cmd Command sti5202_definel Description Define STi5202 core memory map Sti5202 fsim core setup Configure the ST40 functional simulator Sti5202 psim core setup Configure the ST40 performance simulator 1 The LMI configuration registers are relocated to Area 6 addresses see STi5202 Datasheet 8040779 unless the GDB convenience variable sti5202movelmiregs is set to O stib206 cmd Defines the commands that describe the core memory regions and other attributes of an STi5206 See Table 34 Table 34 stib206 cmd Command sti5206 define Define STi5206 core memory map Description sti5206 fsim core setup Configure the ST40 functional simulator sti5206 psim core setup Configure the ST40 performance simulator stib289 cmd Defines the commands that describe the core memory regions and other attributes of an STi5289 See Table 35 Table 35 sti5289 cmd Command sti5289 define Sti5289 fsim core setup Define STi5289 core memory map Description Configure the ST40 functional simulator Sti5289 psim core setup Configure the ST40 performance simulator 8045872 Rev 9 35 87 GDB command files UM1250 2 18 2 19 2 20 36 87 sti5528 cmd Defines the commands that describe the core memory regions and other attributes of an STi5528 See Table 36 Table 36
14. sti5528 cmd Command sti5528 define Description Define STi5528 core memory map Sti5528 fsim core setup Configure the ST40 functional simulator Sti5528 psim core setup Configure the ST40 performance simulator sti7105 cmd Defines the commands that describe the core memory regions and other attributes of an STi7105 See Table 37 Table 37 sti7105 cmd Command sti7105 define Description Define STi7105 core memory map sti7105 fsim core setup Configure the ST40 functional simulator sti7105 psim core setup Configure the ST40 performance simulator sti7106 cmd Defines the commands that describe the core memory regions and other attributes of an STi7106 See Table 38 Table 38 sti7106 cmd Command sti7106 define Description Define STi7106 core memory map sti7106 fsim core setup Configure the ST40 functional simulator sti7106 psim core setup Configure the ST40 performance simulator 8045872 Rev 9 ky UM1250 GDB command files 2 21 2 22 2 23 sti7108 cmd Defines the commands that describe the core memory regions and other attributes of an STi7108 See Table 39 Table 39 sti7108 cmd Command sti7108 define Description Define STi7108 core memory map sti7108 fsim core setup Configure the ST40 functional simulator Sti7108 psim core setup Configure the ST40
15. 80 Lil RR OE AAP PP 83 ky 8045872 Rev 9 5 87 Preface UM1250 Preface Comments on this manual should be made by contacting your local STMicroelectronics sales office or distributor Document identification and control Each book carries a unique identifier of the form nnnnnnn Rev x where nnnnnnn is the document number and x is the revision Whenever making comments on this document quote the complete identification nnnnnnn Rev x License information The ST40 Micro Toolset is based on a number of open source packages Details of the licenses that cover all these packages can be found on the CD in the file 11cense htm This file is located in the doc subdirectory and can be accessed from index htm ST40 documentation suite The ST40 documentation suite comprises the following volumes ST40 Micro Toolset user manual 7379953 This manual describes the ST40 Micro Toolset and provides an introduction to OS21 It covers the various code and cross development tools that are provided in the ST40 Micro Toolset how to boot OS21 applications from ROM and how to port applications which use STMicroelectronics OS20 operating systems Information is also given on how to build the open source packages that provide the compiler tools base run time libraries and debug tools and how to set up an ST Micro Connect SH 4 generic and C specific ABI 7839242 The SH 4 application binary interface ABI defines a system interface for appl
16. Configure the ST40 performance simulator 8045872 Rev 9 ky UM1250 GDB command files 2 9 2 10 2 11 g stb7100 cmd Defines the commands that describe the core memory regions and other attributes of an STb7100 See Table 27 Table 27 stb7100 cmd Command stb7100 define Description Define STb7100 core memory map stb7100 fsim core setup Configure the ST40 functional simulator stb7100 psim core setup Configure the ST40 performance simulator stb7109 cmd Defines the commands that describe the core memory regions and other attributes of an STb7109 See Table 28 Table 28 stb7109 cmd Command stb7109 definel Define STb7109 core memory map Description stb7109 fsim core setup Configure the ST40 functional simulator stb7109 psim core setup Configure the ST40 performance simulator 1 The LMI SYS and LMI VID configuration registers are relocated to Area 6 addresses see STx7109 Datasheet 7976546 unless the GDB convenience variable stb7109movelmiregs is set to 0 std1000 cmd Defines the commands that describe the core memory regions and other attributes of an STd1000 See Table 29 Table 29 std1000 cmd Command std1000 define std1000 fsim core setup Define STd1000 core memory map Description Configure the ST40 functional simulator std1000 psim core setup Configure the ST40 perform
17. When configuring the STi7200 CLOCKGENA peripheral the mb519 setup configuration command assumes that the frequency of the external clock source is 30 MHz If the 8045872 Rev 9 53 87 GDB command files UM1250 2 50 2 51 54 87 frequency of the clock source is 27 MHz the only possible alternative set the GDB convenience variable mb519extc1k to the correct frequency in MHz before connecting to the target For example set _mb519extclk 27 mb519bypass stmc mb521 cmd Defines the commands that set the configuration registers for the STV0498 on an STMicroelectronics STV0498 MBoard see Table 68 Table 68 mb521 cmd Command Description mb521 setup Set STV0498 MBoard configuration registers mb521sim setup Set simulated STV0498 MBoard configuration registers mb521 display registers Display STV0498 MBoard configuration registers Define memory regions for the STV0498 MBoard to the ST40 simulator Set the STV0498 MBoard to bypass to the ST40 through stv0498 bypass setup see stv0498jtag cmd on page 66 Used by the mb521bypass command mb521 sim memory define mb521bypass setup mb548 cmd Defines the commands that set the configuration registers for the STd1000 on the family of STMicroelectronics DTV150 boards see Table 69 Table 69 mb548 cmd Command Description mb548 setup Set DTV150 DB board configuration registers mb548sim setup Set simulated DTV150 DB board con
18. and P2 Display the STi7200 configuration registers mb671 sim memory define Define memory regions for the STi7200 MBoard to the ST40 simulator g 8045872 Rev 9 57 87 GDB command files UM1250 2 57 mb676sti5189 cmd Defines the commands that set the configuration registers for the STi5189 on an STMicroelectronics STi5189 97 MB See Table 75 Table 75 mb676sti5189 cmd Command Description mb676sti5189sim setup Set simulated STi5189 97 MB configuration registers 3 Set simulated STi5189 97 MB configuration registers HAN Bar LA RSE with the ST40 in SE mode with cached RAM mappings Set simulated STi5189 97 MB configuration registers mb676sti5189simseuc setup with the ST40 in SE mode with uncached RAM mappings Set simulated STi5189 97 MB configuration registers mb676sti5189simse29 setup with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb676sti5189 display registers Display the STi5189 configuration registers mb676sti5189 sim memory defin Define memory regions for the STi5189 97 MB to the ST40 simulator 2 58 mb676sti5197cmd Defines the commands that set the configuration registers for the STi5197 on an STMicroelectronics STi5189 97 MB See Table 76 Table 76 mb676sti5197 cmd Command Description mb676sti5197sim Set simulated STi5189 97 MB configuration registers Set simulated STi5189 97 MB configuration registers Ka ek wit
19. board 48 STi7105 ADI board 39 stb7200boot cmd 63 STi7105 HDK board 45 STd1000 STi7105 MBoard 59 ky 8045872 Rev 9 85 87 Index UM1250 STi7106 stv0498 cmd 39 configuration registers 45 59 STV0498 MBoard 54 56 sti7106 0md ici iia Ra HEER ON 36 STWorkbench 00 0c eee eee tis 9 STi7106 HDK board 45 STi7106 MBoard 59 T STi7108 configuration registers 40 46 61 target core memory map 37 connection commands 67 sti7108 cmd iae a a o 37 STi7108 ADI board 40 STi7108 HDK board 46 STi7108 MBoard 61 STi7111 attributecommands 37 configuration registers 46 56 62 core memory map 37 SUTI WMA nera et BR EE Re 37 STi7111 HDK board 46 STi7111 MBoard 56 STi7111 SAT board 62 STi7141 attributecommands 37 configuration registers 41 57 core memory map 37 sti7141 cmd doc 37 STi7141 EUD board 41 STi7141 MBoard 57 STi7200 oooccco SE Ee ee iny 63 66 attach command
20. disconnect from a target attached to the STMC called stmc leaving the target running but with host I O services suppressed which is mandatory to prevent the target from stopping to wait for a non existent host to service the request and then re connecting to continue debugging gdb set SH DEBUGGER CONNECTED 0 Clear state in run time to suppress host I O requests gdb ondisconnect restart gdb disconnect Target is left running gdb attach sh4 stmc Re connect to running target The ST TargetPack equivalent to reconnect to a stopped target attached to the STMC called stmc assuming that the target is an STb7109E Ref board is gdb sh4tp stmc mb448 st40 no reset 1 no pokes 1 resettype none and the ST TargetPack equivalent for reconnecting to a running target is gdb sh4tp stmc mb448 st40 no reset 1 no pokes 1 a If using version R1 1 1 or earlier of the ST Micro Connection Package then add the option resettype break to the command for reconnecting to a running target This option is not required when using later versions of the ST Micro Connection Package 8045872 Rev 9 27 87 Target configuration UM1250 1 9 Migrating from ST Micro Connect 1 to ST Micro Connect 2 For detailed information about using the ST Micro Connect 2 see the application note Developing with an ST Micro Connect and ST TargetPacks 8174498 28 87 8045872 Rev 9 ky UM1250 GDB command files 2 2 1
21. notASEBRK is 0 ntrst 1 The TAP is reset when notTRST is O nrst 1 The target is reset when notRESET is 0 The TAP of the ST MultiCore MUX is selected when the stmmx stmmx 1 5 signal is set to 0 The clocking of TCK is assumed to generate a clock signal which tck 0 first presents a rising edge for TCK and then a falling edge for TCK guaranteed when in singleshot and continuous modes tdo 0 The STMC s TDO is connected to the target s TDI WA 1 The TAP is always guaranteed to return to the Test Logic Reset H state after 5 TCK clock cycles when TMS is set to 1 triggerout 0 The STMC s TRIG OUT is connected to the target s TRIG IN The initial signal levels have been chosen to ensure that the target is not affected when switching to manual control of the TAP signals When switching from manual mode to any other mode the TCK signal is always reset to its initial level of 0 In singleshot and continuous modes TCK always returns to the initial level of O after every clock cycle All other signals retain their levels when switching between modes TDI signal capture The ST Micro Connect s TDI signal from the TDO of the target TAP can be captured by the jtag command by specifying the tdi subcommand with a GDB convenience variable name template into which the numerical representations of the TDI signal levels are saved A target application variable cannot be used directly for capturing the TDI signal as GDB has no access to the ST
22. or little endian mode let Little endian endian N A v Default little endian be Big endian Simulator target EM Functional Default with no simulator sim mode sim mode suffix sim v connect to a silicon psim DUNT target simulator 1 The 1e suffix is optional and is only present for those targets that may be used in both big and little endian modes Note GDB commands that are used with the ST MultiCore MUX that is those with an stmmx suffix are supported only by the STMC1 As an example the connection commands in sh4targets mb448 cmd are listed in Table 2 The STb7109 on this board is little endian only and so no connection commands with endian suffixes are defined g Table 2 Commands in sh4targets mb448 cmd Command Description mb448 1 Default mb448se 1 Space enhanced P1 and P2 cached mb448seuc Space enhanced P1 and P2 uncached mb448se29 1 Space enhanced P1 cached and P2 uncached mb448bypass ST40 in the multicore SoC os Space enhanced P1 and P2 cached ST40 in the multicore SoC vascas Space enhanced P1 and P2 uncached ST40 in the multicore SoC mb sase2 byodss Space enhanced P1 cached and P2 uncached ST40 in the multicore SoC mb448stmmxl ST40 in the multicore SoC through an ST MultiCore MUX 8045872 Rev 9 11 87 Target configuration UM1250 1 2 12 87 Table 2 Commands in sh4targets mb448 cmd continued Command mb448sestmmx 2 De
23. performance simulator sti7111 cmd Defines the commands that describe the core memory regions and other attributes of an STi7111 See Table 40 Table 40 sti7111 cmd Command sti7111 define Description Define STi7111 core memory map sti7111 fsim core setup Configure the ST40 functional simulator sti7111 psim core setup Configure the ST40 performance simulator sti7141 cmd Defines the commands that describe the core memory regions and other attributes of an STi7141 See Table 41 Table 41 sti7141 cmd Command sti7141 define Description Define STi7141 core memory map sti7141 fsim core setup Configure the ST40 functional simulator sti7141 psim core setup Configure the ST40 performance simulator 8045872 Rev 9 37 87 GDB command files UM1250 2 24 2 25 2 26 38 87 sti7200 cmd Defines the commands that describe the core memory regions and other attributes of an STi7200 See Table 42 Table 42 sti7200 cmd Command sti7200 define Description Define STi7200 core memory map sti7200 fsim core setup Configure the ST40 functional simulator sti7200 psim core setup Configure the ST40 performance simulator stih415 cmd Defines the commands that describe the core memory regions and other attributes of an STiH415 See Table 43 Table 43 stih415 cmd Command sti
24. registers with the ST40 in SE mode with uncached RAM mappings mb442stb7109simse29 setup Set simulated STb7109 Ref board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb442stb7109 display registers Display STb7109 Ref board configuration registers mb442stb7109 sim memory define Define memory regions for the STb7109 Ref board to the ST40 simulator mb442stb7109bypass setup Set the STb7109 Ref board to bypass to the ST40 through stb7100 bypass setup see stb7100jtag cmd on page 65 Used by the mb442stb7109bypass command mb442stb7109stmmx setup Set the STb7109 Ref board for use with the ST MultiCore MUX device allowing simultaneous access to the ST40 and other CPUs on the STb7109 through Stb7100 stmmx setup see stb7100jtag cmd on page 65 Used by the mb442stb7109stmmx command 1 Only supported by the STMC1 When configuring the STb7109 CLOCKGENA peripheral the mb442stb7109 setup configuration command assumes that the frequency of the external clock source is 30 MHz If the frequency of the clock source is 27 MHz the only possible alternative set the GDB convenience variable _mb442stb7109extc1k to the correct frequency in MHz before connecting to the target For example set mb442stb7109extclk mb442stb7109bypass stmc 8045872 Rev 9 27 51 87 GDB command files UM1250 2 48 52 87 The mb442stb7109 se
25. setup Set simulated STi7111 HDK board configuration registers with the ST40 in SE mode with cached RAM mappings hdk71 11simseuc setup Set simulated STi7111 HDK board configuration registers with the ST40 in SE mode with uncached RAM mappings hdk7111simse29 setup Set simulated STi7111 HDK board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 hdk7111 sim memory define Define memory regions for the STi7111 HDK board to the ST40 simulator 46 87 8045872 Rev 9 g UM1250 GDB command files 2 43 g mb411stb7100 cmd Defines the commands that set the configuration registers for the STb7100 on an STMicroelectronics STb7100 MBoard see Table 61 Table 61 mb411stb7100 cmd Command Description mb411stb7100 setup Set STb7100 MBoard configuration registers mb4llstb7100sim setup Set simulated STb7100 MBoard configuration registers mb411stb7100 display registers Display STb7100 MBoard configuration registers RR i00 Siin memory d fin AG regions for the STb7100 MBoard to the Set the STb7 100 MBoard to bypass to the ST40 through A setup stb7100 bypass setup see sib7100jtag cmd on page 65 Used by the mb41stb71001bypass command mb411stb7100stmmx setup Set the STb7100 MBoard for use with the ST MultiCore MUX device allowing simultaneous access to the ST40 and other CPUs on the STb7100 thr
26. st40300tpbe st40300tple As above but for a target with an ST40 300 core st40300tp The ST TargetPack connection commands listed in Table 17 take the following arguments arg0 specifies the ST TargetPack specification Sargl optional specifies configuration commands for the STMC see Table 18 Table 18 lists the configuration commands available for configuring an STMC when using an ST TargetPack The configuration commands must be specified as a string that is enclosed within double quotes if they contain spaces and may be combined using a space to separate each command Table 18 ST TargetPack STMC configuration commands Command Description Set breaktype to pin to use the ASEBRK pin to interrupt a running breaktype pin udi target or set breaktype to udi to use the UDI to interrupt the target The default is udi Causes the STMC to write the UDI Interrupt command into the UDI SDIR register and raises the SH 4 INTC UDI interrupt This command accepts one of the following modes pulse instructs the STMC to raise the interrupt but does not check AO EE if the ST40 has cleared it This mode is supported by GDB only wait when the target is stopped wait instructs the STMC to raise the interrupt and then wait for the ST40 to clear the interrupt This mode requires the target to be running and is intended for ST internal use only endian big little Specify the endian of the target The default is lit
27. take the following argument Sargo optional specifies configuration commands for the simulator see Table 13 Simulator configuration commands on page 21 Table 1 lists the STMC and simulator connection command variants Note Some command suffix variants that are valid for connecting to a silicon target are not valid for use on a simulator Table 1 GDB command suffixes Suffix Description Value GCC mboard Maio for variant simulator Space enhancement All external RAM is mode 32 bit physical pe cached i se addressing P1 and P2 All external RAM is memory regions are seuc ncached mid combined is 5977077 Default with no 29 bit compatibility se mode suffix physical mode external T addresses are 29 bit se29 RAM is mapped p vum with P1 region cached cached in P1 and P P2 uncached uncached in P2 10 87 8045872 Rev 9 ky UM1250 Target configuration Table 1 GDB command suffixes continued Suffix Description Value GCC mboard Validifor variant simulator Connect to the ST MultiCore MUK ST40 ona device mode multicore SoC Configure the STMC1 for stmmx through an N A x a connection to the ST40 ST MultiCore MUX CPU using an device connected ST MultiCore MUX to the STMC1 device This enables Ta to the simultaneous access to Iti inn E C the ST40 and other bypass ip a N A cores on the SoC for a nea MUR multicore debug em device Big
28. the following mb448stmc2 user command define mb448stmc2 source register40 cmd source display40 cmd source stb7100clocks cmd source stb7109 cmd source mb448 cmd if Sarge gt 1 sh4tp arg0 mb448 st40 no pokes 1 Sargl else sh4tp arg0 mb448 st40 no pokes 1 end mb448 setup end The GDB command script may need to define specific ST TargetPack parameters in order to function correctly For example a GDB command script that re configures the system clocks may need to set the TCK frequency to a speed where this operation is safe This must be done using the tck frequency parameter because the 1inkspeed command is not supported for the STMC2 There are also restrictions applicable to specific hardware that must be taken into account when writing GDB command scripts that change the ST40 core clock frequency For example in order to re configure the system clocks the PLLs are usually switched into bypass mode this typically results in the ST40 core clocks being sourced off a 27Mhz or 30MHz external input clock instead of the normal PLL generated clock 266MHz for an STi5202 STb7100 STb7109 The end result is that the default frequency of TCK 12 5MHz breaks a hardware design restriction that TCK cannot be exceed the peripheral clock frequency 27 8 2 3 38MHz or 30 8 3 75MHz for an STi5202 STb7100 STb7109 This restriction is true for STi5202 STb7100 STb7109 but also applies to other SoCs 8045872 Rev 9 ky UM1250 Targ
29. 11 on an STMicroelectronics STi7111 MBoard See Table 71 Table 71 mb618 cmd Command Description mb618sim setup Set simulated STi7111 MBoard configuration registers Set simulated STi7111 MBoard configuration registers A setup with the ST40 in SE mode with cached RAM mappings Set simulated STi7111 MBoard configuration registers mb618simseuc setup with the ST40 in SE mode with uncached RAM mappings Set simulated STi7111 MBoard configuration registers mb618simse29 setup with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 Define memory regions for the STi7111 MBoard to the mb618 sim memory define ST40 simulator mb625 cmd Defines the commands that set the configuration registers for the STV0498 on an STMicroelectronics STV0498 MBoard see Table 72 Table 72 mb625 cmd Command Description mb625_setup Set STV0498 MBoard configuration registers mb625sim_setup Set simulated STV0498 MBoard configuration registers mb625 display registers Display STV0498 MBoard configuration registers Define memory regions for the STV0498 MBoard to the ST40 simulator Set the STV0498 MBoard to bypass to the ST40 through stv0498 bypass setup see stv0498jtag cmd on page 66 Used by the mb625bypass command mb625 sim memory define mb625bypass setup g 8045872 Rev 9 UM1250 GDB command files 2 55 mb628 cmd Defines the commands that set the c
30. 1250 GDB command files 2 39 hdk7105 cmd Defines the commands that set the configuration registers for the STi7105 on an STMicroelectronics STi7105 HDK board See Table 57 Table 57 ndk7105 cmd Command Description hdk7105sim setup Set simulated STi7105 HDK board configuration registers Set simulated STi7105 HDK board configuration hdk7105simse setup registers with the ST40 in SE mode with cached RAM mappings Set simulated STi7105 HDK board configuration hdk7105simseuc setup registers with the ST40 in SE mode with uncached RAM mappings Set simulated STi7105 HDK board configuration hdk7105simse29 setup registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 hdk7105 display registers Display the STi7105 configuration registers Define memory regions for the STi7105 HDK board to hdk7105 sim memory define the ST40 simulator 2 40 hdk7106 cmd g Defines the commands that set the configuration registers for the STi7106 on an STMicroelectronics STi7106 HDK board See Table 58 Table 58 hdk7106 cmd Command hdk7106sim setup Description Set simulated STi7106 HDK board configuration registers hdk7106simse setup Set simulated STi7106 HDK board configuration registers with the ST40 in SE mode with cached RAM mappings hdk7106simseuc setup Set simulated STi7106 HDK board configuration registers with the ST40 in SE mode with uncached RAM mappings hdk7106simse29 setup Set simu
31. 15 cmd on page 38 Section 2 30 b2000stih415 cmd on page 40 and Section 2 34 fli7610hdk cmd on page 42 Minor updates made throughout With the introduction of the ST Micro Connect Lite changed references to STMC1 and added references to STMCLite wherever appropriate in ntroduction on page 1 and throughout Chapter 1 Target configuration on page 9 Section 2 78 sh4targets attach cmd on page 67 and Section 2 79 sh4targets attach debug cmd on page 69 Updated Section Table 3 Primary targets on page 12to include st40300 target FLi7510 and FLi7540 development boards Added the following GDB command scripts 26 Sep 2010 G Section 2 4 fli7540 cmd on page 31 Section 2 35 fudb gpd201 cmd on page 43 The STMC1 usb variants of the connection commands have been removed from the ST40 Micro Toolset This affects the following sections Section 1 1 Target connection overview on page 10 Section 1 3 1 Commands to connect to a target through an STMC on page 14 Section 2 78 sh4targets attach cmd on page 67 Section 2 79 sh4targets attach debug cmd on page 69 and Section A 2 4 Using the jtag command on page 77 g 8045872 Rev 9 UM1250 Revision history Table 108 Document revision history continued Date Revision Changes Updated Section Table 3 Primary targets on page 12 Added 12cache to Table 7 Common STMC configuration commands on page 15 and Table 18 ST TargetPack STMC configuration commands on pag
32. 2 Rev 9 15 87 Target configuration UM1250 Table 7 Common STMC configuration commands continued Command debuginterrupt pulse wait Description Causes the STMC to write the UDI Interrupt command into the UDI SDIR register and raises the SH 4 INTC UDI interrupt This command accepts one of the following modes pulse instructs the STMC to raise the interrupt but does not check if the ST40 has cleared it This mode is supported by GDB only when the target is stopped wait instructs the STMC to raise the interrupt and then wait for the ST40 to clear the interrupt This mode requires the target to be running and is intended for ST internal use only endian big little Specify the endian of the target The default is little jtaginitialise on off Enable or disable the initialization of the target JTAG interface If disabled the STMC does not perform an automatic reset of the target JTAG state machine Also the STMC does not assume a default pinout style or link speed These must bet set explicitly using the jtagpinout and linkspeed configuration commands The default is on linkspeed speed Set the debug link speed to speed This is the same as the 1inkspeed user command linktimeout time units l2cache address Set the debug link timeout period to time seconds or time milliseconds If units is ms then time is in milliseconds If units is omitted or is s then time is in seconds
33. 40 CPU of an STV0498 see Table 94 Table 94 stv0498jtag cmd Command Description C RE Configure the ST Micro Connect 1 for a direct ak connection to the ST40 CPU Similar to stv0498 bypass setup except that the Stv0498 bypass setup attach STV0498 is not reset Used when attaching to a running or stopped target 1 See Section 2 78 sh4targets attach cmd on page 67 and Section 2 79 sh4targets attach debug cmd on page 69 The STV0498ResetDelay GDB convenience variable is used by the commands listed in Table 94 to set the delay in milliseconds when performing a reset of the target The default is 20 milliseconds g 8045872 Rev 9 UM1250 GDB command files 2 77 2 78 g sh4targets cmd sh4targets board cmd Defines the commands for connecting to all the targets supported by the ST40 Micro Toolset including simulated targets See Section 1 1 Target connection overview on page 10 sh4targets attach cmd Defines the commands for attaching to a running target using the resettype break reset type of the STMC1 or STMCLite see Table 7 Common STMC configuration commands on page 15 and Table 18 ST TargetPack STMC configuration commands on page 24 These commands do not reconfigure the target instead they allow the user to take control of a running target see Table 19 Table 95 sh4targets attach cmd Command attach sh4be Description Attach to a generic SH 4 target b
34. 40 in order to save the captured signal while the TAP is under manual control Instead a GDB convenience variable can be used to store the captured signal until the mode is returned to normal at which point the GDB convenience variable can be used to set the target application variable The jtag command sets several variables derived from the GDB convenience variable name template variable specified by the tdi subcommand variable n This variable is set to the number of bits required to represent the TDI signal levels captured by the 3 tag command The number of bits indicates the number of 32 bit variables see below that were set by the jtag command in order to hold the numerical representation of the captured TDI signal 8045872 Rev 9 ky UM1250 JTAG control A 2 4 variable 0 This variable is set to the first 32 bits of the captured TDI signal where each bit represents a TDI signal level 0 or 1 The bits representing the TDI signal levels are packed such that the least significant bit of the variable is the first captured TDI signal level and the most significant bit is the last captured TDI signal level variable x If the TDI signal captured by the j tag command requires more than 32 bits in order to be represented then other numbered 32 bit variables counting monotonically are set in order to represent the complete captured TDI signal The last TDI signal level captured by the jtag command is in the most significant
35. 4le equivalents Command connectsh4be connectsh4le equivalent attach sh4be anans arg0 resettype break ondisconnect restart attach sh4le sh4le Sarg0 resettype break attach sh4 ondisconnect restart attach st40300be st40300be Sarg0 resettype break ondisconnect restart at at tach st403001e tach st40300 st40300le Sarg0 resettype break ondisconnect restart at tach stb7100 bypass sh4le Sarg0 resettype break ondisconnect restart jtagpinout st40 inicommand stb7100 bypass setup attach at tach stb7100 stmmx sh4le Sarg0 resettype break ondisconnect restart jtagpinout stmmx tdidelay 1 inicommand stb7100_stmmx_setup_attach at tach sti7200 bypass sh4le Sarg0 resettype break ondisconnect restart jtagpinout st40 inicommand sti7200 bypass setup attach at at tach sti7200 stmmx tach stv0498 bypass sh4le Sarg0 resettype break ondisconnect restart jtagpinout stmmx tdidelay 1 inicommand sti7200 stmmx setup attach sh4le Sarg0 resettype break ondisconnect restart jtagpinout st40 inicommand stv0498 bypass setup attach In Table 96 Sargo is the name or IP address of the ST Micro Connect The attach commands do not perform any target specific customization unlike the target specific connection commands see Section 1 1 Target connection overview on page 10 As a result no GDB convenience variables are defined for the memory mapped confi
36. 7 Target configuration UM1250 1 3 2 20 87 As an example the STMC connection commands for the STb7109E Ref board are listed in Table 11 Table 11 STb7109E Ref board STMC connection commands Command Definition mbaa8 1 connectsh4le Sarg0 mb448 setup jtagpinout st40 hardreset mb448 Sarg0 jtagpinout st40 jtagreset 44 Sacs c E inicommand mb448bypass setup ausa esi mb448 Sarg0 jtagpinout stmmx jtagreset tdidelay 1 inicommand mb448stmmx setup xb d deat connectsh4le Sarg0 mb448se setup jtagpinout st40 hardreset mb448se Sarg0 jtagpinout st40 jtagreset 44 ee do aa inicommand mb448bypass setup TT mb448se Sarg0 jtagpinout stmmx jtagreset tdidelay 1 inicommand mb448stmmx setup tsh41 0 mb448 t baaa connects e Sarg seuc_setup jtagpinout st40 hardreset mb448seuc Sarg0 jtagpinout st40 jtagreset mb448seucbypass inicommand mb448bypass setup 44 jtagpi t stmmx jt t tdidelay 1 addens mb EEU Sarg0 jtagpinout s jtagrese idelay inicommand mb448stmmx setup mb448se29 1 connectsh4le Sarg0 mb448se29 setup jtagpinout st40 hardreset mb448se29 Sarg0 jtagpinout st40 jtagreset mb448se29bypass inicommand mb448bypass setup 44 29 0 jt i t st jt set tdidelay 1 tecate mb iBse Sarg jtagpinout stmmx jtagre i y inicommand mb448stmmx setup 1 Not used Must connect using tmx mode variants Commands to connect to a simulated target Simulated targets use target specif
37. DRE DEAN a Table 7 Common STMC configuration commands SSTV0498ResetDelay on page 15 If this is non zero the size of the memory attached to LMI SYS for an STb7109 Ref board MB442 is mb442stb7100sys128 0 128 Mbytes mb442stb7109sys128 If this is zero the size of the memory attached to LMI SYS for an STb7109 Ref board MB442 is 64 Mbytes _mb411stb7100extc1k _mb411stb7109extc1k 27 mb448extclk If this is set to 27 the external clock source is 27 MHz 5_mb442stb7100extclk If this is set to 30 the external clock source is mb442stb7109extclk 30 30 MHz mb519extclk mb602extclk 8045872 Rev 9 23 87 Target configuration UM1250 1 6 24 87 Commands to connect to a target using an ST TargetPack The ST40 Micro Toolset supports methods for connecting to targets with ST TargetPacks using any type of ST Micro Connect The methods are provided in the form of GDB command scripts Table 17 lists the connection commands defined by the GDB command script file sh4targets targetpack cmd for connecting to a target using an ST TargetPack See ST TargetPack user manual 8020851 for further information about ST TargetPacks Table 17 ST TargetPack connection commands Command Description m Connect using an ST TargetPack to a generic SH 4 big endian target zi through an STMC sh4tple Connect using an ST TargetPack to a generic SH 4 little endian target sh4tp through an STMC
38. Each phrase definition is built up using a double colon and an equals sign to separate the two sides e Alternatives are separated by vertical bars e Optional sequences are enclosed in square brackets and e Items which may be repeated appear in braces and Terminology The original ST Micro Connect product was named the ST Micro Connect With the introduction of the ST Micro Connect 2 and ST Micro Connect Lite the original product is now known as the ST Micro Connect 1 and the term ST Micro Connect refers to the family of ST Micro Connect devices These names can be abbreviated to STMC STMC1 STMC2 and STMCLite Acknowledgements 8 87 SuperH9 is a registered trademark for products originally developed by Hitachi Ltd and is owned by Renesas Technology Corp Microsoft MS DOS and Windows are registered trademarks of Microsoft Corporation in the United States and other countries 8045872 Rev 9 ky UM1250 Target configuration Note Note Target configuration The GDB command scripts define user commands for connecting to ST40 targets that are either simulated or attached to an ST Micro Connect 1 STMC1 or an ST Micro Connect Lite STMCLite referred to collectively as ST Micro Connect STMC These files are located in the release installation subdirectory sh superh elf stdcmd The ST40 Micro Toolset has been validated
39. K Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners O 2012 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com ky 8045872 Rev 9 87 87
40. M mappings Set simulated STb7109 MBoard configuration registers mb411stb7109simseuc setup with the ST40 in SE mode with uncached RAM mappings Set simulated STb7109 MBoard configuration registers mb411stp7109simse29 setup with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb411stb7109 display registers Display STb7109 MBoard configuration registers Define memory regions for the STb7109 MBoard to the ST40 simulator Set the STb7109 MBoard to bypass to the ST40 through stb7109_bypass_setup see sib7100jtag cmd on page 65 Used by the mb411stb7109bypass command Set the STb7109 MBoard for use with the ST MultiCore MUX device allowing simultaneous access to the ST40 and other CPUs on the STb7109 through Stb7109 stmmx setup see stb7100jtag cmd on page 65 Used by the mb411stb7109stmmx command mb411stb7109 sim memory define mb411stb7109bypass setup mb411stb7109stmmx setup 1 1 Only supported by the STMC1 When configuring the STb7109 CLOCKGENA peripheral the mb411stb7109 setup configuration command assumes that the frequency of the external clock source is 27 MHz If the frequency of the clock source is 30 MHz the only possible alternative set the GDB convenience variable mb411stb7109extclk to the correct frequency in MHz before connecting to the target For example set _mb411stb7109extclk 30 mb411stb7109bypass stmc g 8045872
41. P1 and P2 sat7111 sim memory define Define memory regions for the STi7111 SAT board to the ST40 simulator 62 87 8045872 Rev 9 g UM1250 GDB command files 2 67 2 68 2 69 stb7100boot cmd Defines the commands for booting the co processor cores into their debug ROMs on the multicore targets STi5202 STb7100 STb7109 See Table 85 Table 85 stb7100boot cmd Command Description Stb7100 st231 boot Boot all the ST231 cores into their debug ROMs Stb7100 st231 audio boot Boot the audio ST231 core into its debug ROM Stb7100 st231 video boot Boot the video ST231 core into its debug ROM sti7200boot cmd Defines the commands for booting the co processor cores into their debug ROMs on the multicore targets STi7200 See Table 86 Table 86 sti7200boot cmd Command Description Sti7200 st231 boot Boot all the ST231 cores into their debug ROMs Sti7200 st231 audio0 boot Boot the audio O ST231 core into its debug ROM Sti7200 st231 audiol boot Boot the audio 1 ST231 core into its debug ROM Sti7200 st231 video0 boot Boot the video 0 ST231 core into its debug ROM Sti7200 st231 videol boot Boot the video 1 ST231 core into its debug ROM st40clocks cmd Defines the commands that change the frequencies of the various internal clocks of an ST40RA or ST40GX1 see Table 87 Table 87 st40clocks cmd Command Description Set the internal clock freque
42. RR X YU ks 61 core memory map 31 STi7105 39 45 59 FLi7540 development board 43 MA AA os c AA iti Erpur 81 STi7108 is sp ois ERE 40 46 61 FLi7610 STI7111 46 56 62 configuration registers 42 STi7200 A A Bx Gok Bona 53 57 core memory map 31 SHEET MEOH ere 93 FLI7610_HDK board 42 STiH415 cocinar seaman ended s 40 fudb_gpd201 md 43 STVO498 a 54 56 STV0498 MBoard 54 56 ky 8045872 Rev 9 83 87 Index UM1250 G STb7100 Ref board 50 51 GDB STb7109E Ref board 52 55 script files 9 STb7109 Ref board 48 EE NE STi5189 97 MB 58 STi5189 HDK board 43 H STi5189 SAT board 62 yero POP RE ikesi a Ure rn a hdk5289sti5206 cmd a ns AE od hdk5289sti5289 cmd ad UL MENG SR De hdk7105 cmd N OE Fh nii TE pa hdk7106 emd MR Ee N NGA Ng NO RE seo 50 a AO aa L a B ae PRU aia 4g AR Takna eel Gi STi7105 ADIboard 39 STi7105 HDK board 45 STi7105 MBoard 59 internalclocks 63 64 STi7106 HDK board 45 STi7106 MBoard 59 STi7108 ADIboard 40 J STi7108 HDK board
43. RR a ERR 34 Stio197 End EE Dc 34 Stib202 cmd II EE IAA UO HE e e di 35 stib206 cmd es 35 stib289 cmd sisse we a As CAN RA RACES SUR EASES CERCA 35 SU5928 CMG ciue dde deb t Re ae hed deed EE EEA 36 sti7 105 6md ia cad Kha e RR ae e De tede CR ee nil 36 SUMA P 36 sti7108 cmd 37 sti 111 6md curia a a a NGA eae does 37 SUZA EMA xsv eR c ec is iere tad dea a eie 37 stiZ200 cmd xix x EE Roe ER Ee EORR OX AN 38 stin415 cmd cc 38 stm8000 cmd 38 stv0498 omd sse end Rea AKA eae GG ae CA SCRI CE cR 39 adi 105 6md copita ddr s E beret oh de ero ed 39 adiz lOS CM 39e heme RE E Sade BEI E RT EON E 40 b2000stih415 cmd 40 cab5197emd IA II HA ss 41 eud7141 cmd AAA KA Wa E ee 41 isses ito EES EE ETER ada al alos 42 fli7610hdk cmd 42 fudb_gpd201 cmd 43 iis ede ke PD 43 hdkSPBASIS POS EMMA 244 2486 EERS RR ee ER DRR ES RR Kens BR REK 44 hdk5289sti5289 cmd 44 A IA AI AA DAE SR DE DIR AR 45 hdk7106 cmd 45 Qs sal fou sarna TT 46 ps FAN A AA 46 8045872 Rev 9 3 87 Contents UM1250 2 43 mb411stb7100 cmd 47 2 44 mb411stb7109 cmd 48 245 mib427 0mdg
44. Rev 9 UM1250 GDB command files 2 45 g mb427 cmd Defines the commands that set the configuration registers for the ST40 300 on an STMicroelectronics STEMU2 PCI board see Table 63 Table 63 mb427 cmd Command mb427 setup Description Set STEMU2 PCI board configuration registers mb427se setup Set STEMU2 PCI board configuration registers with the ST40 in SE mode with cached RAM mappings mb427seuc setup Set STEMU2 PCI board configuration registers with the ST40 in SE mode with uncached RAM mappings mb427se29 setup Set STEMU2 PCI board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb427sim setup Set simulated STEMU2 PCI board configuration registers with cached RAM mappings mb427simse setup Set simulated STEMU2 PCI board configuration registers with the ST40 in SE mode with cached RAM mappings mb427simseuc setup Set simulated STEMU2 PCI board configuration registers with the ST40 in SE mode with uncached RAM mappings mb427simse29 setup Set simulated STEMU2 PCI board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb427 display registers Display STEMU2 PCI board configuration registers mb427 sim memory define Define memory regions for the STEMU2 PCI board to the ST40 simulator 8045872 Rev 9 49 87 GDB command
45. ST support center ST TargetPack user manual 8020851 This manual describes the ST TargetPack which is a method of describing target systems based upon ST system on chip devices Developing with an ST Micro Connect and ST TargetPacks application note 8174498 This application note describes various aspects of using an ST Micro Connect host target interface for system development Conventions used in this guide General notation The notation in this document uses the following conventions sample code keyboard input and file names variables code variables and code comments equations and math screens windows dialog boxes and tool names instructions Hardware notation The following conventions are used for hardware notation e REGISTER NAMES and FIELD NAMES e PIN NAMES and SIGNAL NAMES 8045872 Rev 9 7 87 Preface UM1250 Software notation Syntax definitions are presented in a modified Backus Naur Form BNF unless otherwise specified e Terminal strings of the language that is those not built up by rules of the language are printed in teletype font For example void e Non terminal strings of the language that is those built up by rules of the language are printed in italic teletype font For example name e lfanon terminal string of the language is prefixed with a non italicized part it is equivalent to the same non terminal string without that non italicized part For example vspace name e
46. The default is 1 second This is the same as the 1inktimeout user command Base address for the level 2 cache configuration registers Setting this configuration command enables L2 cache coherency by the STMC The default is 0 L2 cache coherency is disabled msglevel none warning info debug all Set the reporting level of diagnostic messages displayed by the STMC on its console which on the STMC1 are sent to its console and on the STMC2 are sent to its log files 9 The default is none This is the same as the stmcmsglevel user command ondisconnect none reset restart Set the action to perform on disconnecting from the target The default is none none does nothing when disconnecting reset resets the target before disconnecting This is not compatible with the STMC2 restart restarts the target from where it was last stopped This is the same as the ondisconnect user command resetdelay time units Set the delay in time seconds or time milliseconds used when performing a so treset or hardreset of the target The delay is performed during each transition of the reset sequence and should be set to the longest delay required If units is omitted or is ms then time is in milliseconds If units is s then time is in seconds The default is 20 milliseconds g 8045872 Rev 9 UM1250 Target configuration g Table 7 Common STMC configuration commands continued Co
47. acks application note 8174498 for details of the parameters that can be used with ST TargetPacks The following example shows the TargetString to connect to the ST40 CPU of an STb7109 on an STb7109E Ref board MB448 attached to an STMC with the name stmc stmc mb448 st40 8045872 Rev 9 25 87 Target configuration UM1250 1 7 Note Note 26 87 To disable diagnostic messages being output as the target is being configured when using an ST TargetPack the silent parameter can be added to the TargetString in this example using a comma as the separator stmc mb448 st40 silent 1 STMC2 target configuration using GDB command scripts The recommended method of configuring a target attached to an STMC2 is to use an ST TargetPack see ST40 Micro Toolset user manual 7379953 However it is possible to use GDB command scripts to configure a target attached to an STMC2 if the no pokes 1 parameter is added to the TargetString Connecting to a target with a TargetString that includes this parameter prevents the target from being configured by the ST TargetPack allowing a GDB command script to be used instead The ST40 Micro Toolset does not supply target specific GDB connection commands for this type of connection To perform this type of connection the user can define their own user command For example to connect to an STb7109E Ref board MB448 attached to an STMC2 and configured using the GDB command script mb448 setup use
48. ance simulator 8045872 Rev 9 33 87 GDB command files UM1250 2 12 2 13 2 14 34 87 std2000 cmd Defines the commands that describe the core memory regions and other attributes of an STd2000 See Table 30 Table 30 std2000 cmd Command std2000 define Description Define STd2000 core memory map std2000 fsim core setup Configure the ST40 functional simulator std2000_psim_core_setup Configure the ST40 performance simulator stib189 cmd Defines the commands that describe the core memory regions and other attributes of an STi5189 See Table 31 Table 31 sti5189 cmd Command sti5189 define Description Define STi5189 core memory map Sti5189 fsim core setup Configure the ST40 functional simulator Sti5189 psim core setup Configure the ST40 performance simulator stib197 cmd Defines the commands that describe the core memory regions and other attributes of an STi5197 See Table 32 Table 32 sti5197 cmd Command sti5197 define Description Define STi5197 core memory map sti5197 fsim core setup Configure the ST40 functional simulator sti5197 psim core setup Configure the ST40 performance simulator 8045872 Rev 9 ky UM1250 GDB command files 2 15 2 16 2 17 g sti5202 cmd Defines the commands that describe the core memory regions and other attributes of an
49. atsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RIS
50. c SH 4 target big endian attach debug sh4le Attach to a generic SH 4 target little endian attach debug sh4 attach debug st40300be attach debug st403001e As above but for a target with an ST40 300 core attach debug st40300 Attach to an STi5202 STb7100 STb7109 target where the STMC is configured for a direct attach debug stb7100 bypass connection to the ST40 CPU See stb7100 bypass setup attach in stb7100jtag cmd on page 65 Attach to an STi5202 STb7100 STb7109 target where the STMC1 is configured to use the attach debug stb7100 stmmx ST MultiCore MUX device to connect to the ST40 CPU See stb7100 stmmx setup attach in stb7100jtag cmd on page 65 Attach to an STi7200 target where the STMC is configured for a direct connection to the ST40 CPU See sti7200 bypass setup attach in sti7200jtag cmd on page 66 attach debug sti7200 bypass Attach to an STi7200 target where the STMC1 is configured to use the ST MultiCore MUX device to attach debug sti7200 stmmx connect to the ST40 CPU See Sti7200 stmmx setup attachin sti7200jtag cmd on page 66 Attach to an STV0498 target where the STMC is configured for a direct connection to the ST40 CPU See stv0498 bypass setup attach in stv0498jtag cmd on page 66 attach debug stv0498 bypass 1 Only supported by the STMC1 8045872 Rev 9 69 87 GDB command files UM1250 Note 2 80 70 87 The equivalent sh4be an
51. cesssize size 1 The STMC2 currently does not support breaktype pin Also the combination of an STMC1 with an ST MultiCore MUX is incapable of supporting breaktype pin as the ASEBRK signal is managed indirectly by the ST Microcore Mux through its JTAG interface which is not supported by the STMC1 software See alsoSection 2 80 sh4commands cmd on page 70 The STMC1 console is accessed by connecting to the STMC1 over Telnet or by serial line and the log files of the STMC2 are accessed using the stmcconfig tool of the ST Micro Connection Package see Introduction on page 1 for information about the ST Micro Connection Package The format of an ST TargetPack specification known as the TargetString is described in full by the ST TargetPack user manual 8020851 and has the following form stmc platform core option value where stmc is the name or IP address of the ST Micro Connect platform is the name of the platform ST TargetPack core is the name of the ST40 CPU as defined by the ST TargetPack for the platform Each component of the TargetString is separated by a colon One or more option value parameters can be optionally specified in the TargetString to modify the actions of the ST TargetPack The parameters can be separated either by commas or spaces If the parameters are separated by spaces then the TargetString must be enclosed within double quotes See the Developing with an ST Micro Connect and ST TargetP
52. croelectronics STi7106 MBoard See Table 77 Table 78 mb680sti7106 cmd Command Description mb680sti7106sim setup Set simulated STi7106 MBoard configuration registers Set simulated STi7106 MBoard configuration registers A setup with the ST40 in SE mode with cached RAM mappings Set simulated STi7106 MBoard configuration registers mb680sti7106simseuc setup with the ST40 in SE mode with uncached RAM mappings Set simulated STi7106 MBoard configuration registers mb680sti7106simse29 setup with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb680sti7106 display registers Display the STi7106 configuration registers Me ae TA memsry define Define memory regions for the STi7106 MBoard to the ST40 simulator 8045872 Rev 9 59 87 GDB command files UM1250 2 61 2 62 60 87 mb704 cmd Defines the commands that set the configuration registers for the STi5197 on an STMicroelectronics STi5197 MBoard See Table 79 Table 79 mb704 cmd Command mb704sim setup Description Set simulated STi5197 MBoard configuration registers mb704simse setup Set simulated STi5197 MBoard configuration registers with the ST40 in SE mode with cached RAM mappings mb704simseuc setup Set simulated STi5197 MBoard configuration registers with the ST40 in SE mode with uncached RAM mappings mb704simse29 setup Set simulated STi5197 MBoard configuration registers w
53. d sh41e commands are listed in Table 98 Table 98 ST40 sh4be and shdle equivalents Command connectsh4be connectsh4le equivalent attach debug sh4be shibe Sarg0 resettype none attach debug sh4le sh4le Sarg0 resettype none attach debug sh4 attach debug st40300be st40300be Sarg0 resettype none attach debug st403001e st40300le Sarg0 resettype none attach debug st40300 at tach debug s tb7100 bypass m h4le Sarg0 resettype none tagpinout st40 inicommand stb7100_bypass_setup_attach du attach debug stb7100 stmmx u h4le Sarg0 resettype none tagpinout stmmx tdidelay 1 inicommand stb7100_stmmx_setup_attach C attach debug sti7200 bypass u h4le Sarg0 resettype none tagpinout st40 inicommand sti7200_bypass_setup_attach C attach debug sti7200 stmmx m h4le Sarg0 resettype none tagpinout stmmx tdidelay 1 inicommand sti7200 stmmx setup attach C attach debug stv0498 bypass sh4le Sarg0 resettype none jtagpinout st40 inicommand stv0498 bypass setup attach In Table 98 arg0 is the name or IP address of the STMC sh4commands cmd Defines the commands for use with the targets see Table 99 Table 99 sh4commands cmd Command linkspeed Description Set the speed of the debug link between the target and an STMC1 or STMCLite The default is 10 MHz and the maximum is 25 MHz Use help linkspeed to display t
54. d the TAP of the target Specify the TCK signal sequence Only valid when mode is set to manual tok signal otherwise the signal is ignored Return a numerical representation of the TDI signal sequence into a GDB convenience variable This is the signal received by the STMC s TDI signal tdi variable from the TDO of the target TAP See Section A 2 3 TDI signal capture on page 76 for details on the representation of the TDI signal in variable 8045872 Rev 9 73 87 JTAG control UM1250 Note A 2 1 74 87 1 Table 103 jtag subcommands continued Command Description Specify the TDO signal sequence This is the signal sent by the STMC s kaa a TDO signal to the TDI of the target TAP tms signal Specify the TMS signal sequence triggerout signal Specify the TRIG OUT signal sequence The asebrk nrst ntrst tck tdi tdo tms triggerout and stmmx signal subcommands of the j tag command may be combined with each other using space separation whereas the mode and help subcommands may not be combined with any other jtag subcommand The syntax of signal is described in Section A 2 2 Signal specification The stmmx signal subcommand only has an effect when the jtagpinout configuration command has been set to stmmx When 3 tagpinout is set to stmmx the asebrk signal subcommand has no effect When jtagpinout is set to STMC Type B the triggerout signal subcommand has no effec
55. e 24 Removed all references to the mb742 and mb831 boards as these projects have now been cancelled Added the following GDB command scripts Section 2 3 fli7510 cmd on page 31 g 17 Nov 2009 Section 2 21 Section 2 28 Section 2 29 Section 2 31 Section 2 32 Section 2 33 Section 2 36 sti7108 cmd on page 37 adi7105 cmd on page 39 adi7108 cmd on page 40 cab5197cmd on page 41 eud7141 cmd on page 41 fldb gpd201 cmd on page 42 hdk5189 cmd on page 43 Section 2 37 hdk5289sti5206 cmd on page 44 Section 2 38 Section 2 39 Section 2 40 Section 2 41 Section 2 42 Section 2 64 Section 2 65 Section 2 66 hdk5289sti5289 cmd on page 44 hdk7105 cmd on page 45 hdk7106 cmd on page 45 hdk7108 cmd on page 46 hdk7111 cmd on page 46 mb837 cmd on page 61 sat5189cmd on page 62 sat7111 cmd on page 62 Other minor nontechnical changes made 22 May 2009 Added the following GDB command scripts Section 2 16 stib206 cmd on page 35 Section 2 17 stib289 cmd on page 35 Section 2 20 sti7106 cmd on page 36 Section 2 60 mb680sti7106 cmd on page 59 Section 2 62 mb796sti5206 on page 60 Section 2 63 mb796sti5289 on page 61 Renamed mb680 cmd and its commands in Section 2 59 mb680sti7105 cmd on page 59 Updated Section 2 80 sh4commands cmd on page 70 Updated Appendix A JTAG control on page 73to add the triggerout signal 10 Nov 2008 Added new configuration command debuginterr
56. ed STi5202 MBoard configuration registers with the ST402 in SE mode with uncached RAM mappings mb602simse29_setup mb602_display_registers mb602_sim_memory_define Set simulated STi5202 MBoard configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 Display STi5202 MBoard configuration registers Define memory regions for the STi5202 MBoard to the ST40 simulator mb602bypass_setup Set the STi5202 MBoard to bypass to the ST40 through stb7100_bypass_setup see sib7100jtag cmd on page 65 Used by the mb602bypass command mb602stmmx setup Set the STi5202 MBoard for use with the ST MultiCore MUX device allowing simultaneous access to the ST40 and other CPUs on the STi5202 through Stb7100 stmmx setup see stb7100jtag cmd on page 65 Used by the mb602stmmx command 1 Only supported by the STMC1 When configuring the STi5202 CLOCKGENA peripheral the mb602 setup configuration command assumes that the frequency of the external clock source is 30MHz If the 8045872 Rev 9 55 87 GDB command files UM1250 2 53 2 54 56 87 frequency of the clock source is 27MHz the only permitted alternative set the GDB convenience variable _mb602extc1k to the correct frequency in MHz before connecting to the target For example set mb602extclk 27 mb602bypass stmc mb618 cmd Defines the commands that set the configuration registers for the STi71
57. eed configuration command see Table 7 Common STMC configuration commands on page 15 or the 1inkspeed user command The TCK clock speed in manual mode is determined by the signal sequence specified by the tck subcommand and the speed at which the ST Micro Connect can transmit the signal up to a maximum of the debug link speed Signal specification The BNF for the signal sequence specified by the signal argument to the tck tms tdo ntrst nrst asebrk triggerout and stmmx signal subcommands is as follows signal signal element signal signal element signal element signal group signal list signal group signal list signal repeat signal repeat decimal constant signal list signal level signal list signal level signal level 0 1 where decimal constant is a literal unsigned decimal constant Alternatively using the notation of a regular expression the syntax for a signal sequence may be expressed as 01 l 01 repeat where repeat is a decimal constant 0 9 No white space characters are allowed in a signal sequence specification The signal group syntax is provided in order to express in a compact notation a repeating signal list sequence That is a signal group specification is equivalent to specifying a signal list for signal repeat times as a single contiguous signal list Examples specifying TMS signals to the j tag command to perform simple TAP state machine transitions are as fo
58. egisters 1 The LMI SYS and LMI VID configuration registers are relocated to Area 6 addresses see STx7109 Datasheet 7976546 unless the GDB convenience variable stb7109movelmiregs is set to 0 2 The LMI configuration registers are relocated to Area 6 address see STi5202 Datasheet 8040779 unless the GDB convenience variable sti5202movelmiregs is set to 0 8045872 Rev 9 29 87 GDB command files UM1250 2 2 30 87 display40 cmd Defines the commands that display the contents of the memory mapped configuration registers for all SH 4 and ST40 silicon variants support by the ST40 Micro Toolset see Table 20 Table 20 display40 cmd Command Description St40100 display core si regs Display ST40 100 series core configuration registers St40200 display core si regs Display ST40 200 series core configuration registers St40400 display core si regs Display ST40 400 series core configuration registers St40500 display core si regs Display ST40 500 series core configuration registers st40300 display core si regs Display ST40 300 series core configuration registers st40ra display si regs Display ST40RA configuration registers st40g9gx1 display si regs Display ST40GX1 configuration registers stb7100 display si regs Display STb7100 configuration registers stb7109 display si regs Display STb7109 configuration registers std1000 display si regs Display STd1000 configu
59. es the commands that set the configuration registers for the STi5189 on an STMicroelectronics STi5189 SAT board See Table 83 Table 83 sat5189 cmd Command Description sat5189sim Set simulated STi5189 SAT board configuration registers Set simulated STi5189 SAT board configuration sat5189simse registers with ST40 in SE mode with cached RAM mappings sat5189simseuc Set simulated STi5189 SAT board configuration registers with ST40 in SE mode with uncached mappings sat5189simse29 Set simulated STi5189 SAT board configuration registers with ST40 in SE mode with 29 bit compatibility mappings in P1 and P2 Sat5189 sim memory define Define memory regions for the STi5189 SAT board to the ST40 simulator 2 66 sat7111 cmd Defines the commands that set the configuration registers for the STi7111 on an STMicroelectronics STi7111 SAT board See Table 84 Table 84 sat7111 cmd Command sat7111sim setup sat7111simse setup Description Set simulated STi7111 SAT board configuration registers Set simulated STi7111 SAT board configuration registers with the ST40 in SE mode with cached RAM mappings sat7111simseuc setup sat7111simse29 setup Set simulated STi7111 SAT board configuration registers with the ST40 in SE mode with uncached RAM mappings Set simulated STi7111 SAT board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in
60. et configuration 1 8 Note Connecting to a running target The ST40 Micro Toolset supports connections to a running target attached to an STMC by either e providing specialized attach connection commands for targets attached to an STMC1 or STMCLite e using ST TargetPacks for targets attached to any type of STMC The ST40 Micro Toolset also provides similar support for connecting to a target that is stopped in debug mode see the ondisconnect configuration command in Table 7 Common STMC configuration commands on page 15 and in Table 18 ST TargetPack STMC configuration commands on page 24 See the Developing with an ST Micro Connect and ST TargetPacks application note 8174498 for the ST TargetPack parameters that are required in order to connect to a running target For a description of the STMC1 and STMCLite connection commands for attaching to a running target see Section 2 78 sh4targets attach cmd on page 67 For a description of the STMC1 and STMCLite connection commands for attaching to a stopped target see Section 2 79 sh4targets attach debug cmd on page 69 The following example shows how to disconnect from a target attached to the STMC called stmc leaving the target stopped in debug mode and then re connecting to continue the debug session gdb ondisconnect none gdb disconnect Target is left stopped in debug mode gdb attach debug sh4 stmc Re connect to stopped target The following example shows how to
61. figuration registers mb548eval setup As above but for a DTV150 EVAL board mb548evalsim setup mb548ssbe setup As above but for a DTV150 SSB Europe board mb548ssbesim setup mb548ssbu setup As above but for a DTV150 SSB US board mb548ssbusim setup mb548 display registers Display DTV150 DB board configuration registers g 8045872 Rev 9 UM1250 GDB command files Table 69 mb548 cmd continued Command Description NE meme gre he DAVIS DB an AT memory define FEA e A Ne for the DTV150 SSB boards to 2 52 mb602 cmd g Defines the commands that set the configuration registers for the STi5202 on an STMicroelectronics STi5202 MBoard See Table 70 Table 70 mb602 cmd Command mb602_setup Description Set STi5202 MBoard configuration registers mb602se_setup Set STi5202 MBoard configuration registers with the ST40 in SE mode with cached RAM mappings mb602seuc_setup mb602se29_setup Set STi5202 MBoard configuration registers with the ST40 in SE mode with uncached RAM mappings Set STi5202 MBoard configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb602sim_setup Set simulated STi5202 MBoard configuration registers mb602simse_setup mb602simseuc_setup Set simulated STi5202 MBoard configuration registers with the ST40 in SE mode with cached RAM mappings Set simulat
62. files UM1250 2 46 50 87 mb442stb7100 cmd Defines the commands that set the configuration registers for the STb7100 on an STMicroelectronics STb7100 Ref board see Table 64 Table 64 mb442stb7100 cmd Command Description mb442stb7100 setup Set STb7100 Ref board configuration registers Set simulated STb7100 Ref board configuration mb442stb7100sim setup registers mb442stb7100 display registers Display STb7100 Ref board configuration registers Define memory regions for the STb7100 Ref board to the ST40 simulator Set the STb7100 Ref board to bypass to the ST40 through stb7100 bypass setup see stb7100jtag cmd on page 65 Used by the mb442stb7100bypass command Set the STb7100 Ref board for use with the ST MultiCore MUX device allowing simultaneous access to the ST40 and other CPUs on the STb7100 through Stb7100 stmmx setup see stb7100jtag cmd on page 65 Used by the mb442stb7100stmmx command mb442stb7100 sim memory define mb442stb7100bypass setup mb442stb7100stmmx setup 1 Only supported by the STMC1 When configuring the STb7100 CLOCKGENA peripheral the mb442stb7100 setup configuration command assumes that the frequency of the external clock source is 30 MHz If the frequency of the clock source is 27 MHz the only possible alternative set the GDB convenience variable _mb442stb7100extc1k to the correct frequency in MHz before connecting to the target For examp
63. g GDB command files This chapter documents the low level user commands for GDB target configuration register40 cmd Defines the commands that define symbolically the locations of the memory mapped configuration registers on all SH 4 and ST40 silicon variants supported by the ST40 Micro Toolset see Table 19 Table 19 registerd0 cmd Command st40100 core si regs Description Define ST40 100 series core configuration registers st40200 core si regs Define ST40 200 series core configuration registers st40400 core si regs Define ST40 400 series core configuration registers st40500 core si regs Define ST40 500 series core configuration registers st40300 core si regs Define ST40 300 series core configuration registers st40ra si regs Define ST40RA configuration registers st40gx1 si regs Define ST40GX1 configuration registers stb7100 si regs Define STb7100 configuration registers stb7109 s i regs std1000 si regs Define STb7109 configuration registers Define STd1000 configuration registers std2000 si regs Define STd2000 configuration registers Sti5202 si regs 2 Define STi5202 configuration registers Sti5528 si regs Define STi5528 configuration registers sti7200 si regs Define STi7200 configuration registers stm8000 si regs stv0498 si regs Define STm8000 configuration registers Define STV0498 configuration r
64. guration registers To define these convenience variables invoke the appropriate SoC command for the target see Section 2 1 register40 cmd on page 29 For example to define the memory mapped configuration registers for an STb7109E Ref board MB448 invoke the stb7109 si regs command For convenience the attach command and SoC command can be combined by the user into a new GDB user command to provide a target specific attach command For example define attach mb448 source register40 cmd source display40 cmd attach stb7100 bypass Sarg0 stb7109 si regs end 8045872 Rev 9 g UM1250 GDB command files 2 79 Note g sh4targets attach debug cmd The commands defined by sh4targets attach debug cmd are similar to the attach commands defined by sh4targets attach cmd except that the target is expected to be stopped in debug mode instead of running A target is stopped in debug mode if the target was being debugged when disconnected with the ondisconnect mode set to none the default The attach commands defined by sh4targets attach debug cmd use the resettype none reset type of the STMC1 or STMCLite See Table 7 Common STMC configuration commands on page 15 and Table 18 ST TargetPack STMC configuration commands on page 24 for information on all configuration commands including the attach commands Table 97 sh4targets attach debug cmd Command Description attach debug sh4be Attach to a generi
65. h ST40 in SE mode with cached RAM mappings R Set simulated STi5189 97 MB configuration registers Md with ST40 in SE mode with uncached mappings Set simulated STi5189 97 MB configuration registers mb676sti5197simse29 with ST40 in SE mode with 29 bit compatibility mappings in P1 and P2 mb676sti5197_sim memory define Define memory regions for the STi5189 97 MB to the ST40 simulator 58 87 8045872 Rev 9 g UM1250 GDB command files 2 59 mb680sti7105 cmd Defines the commands that set the configuration registers for the STi7105 on an STMicroelectronics STi7105 MBoard See Table 77 Table 77 mb680sti7105 cmd Command Description mb680sti7105sim setup Set simulated STi7105 MBoard configuration registers F Set simulated STi7 105 MBoard configuration registers SP oE ETTER Rimge SEGUR with the ST40 in SE mode with cached RAM mappings Set simulated STi7105 MBoard configuration registers mb680sti7105simseuc_setup with the ST40 in SE mode with uncached RAM mappings Set simulated STi7105 MBoard configuration registers mb680sti7105simse29_setup with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb680sti7105 display registers Display the STi7105 configuration registers AE Lg m mory define Define memory regions for the STi7105 MBoard to the ST40 simulator 2 60 mb680sti7106 cmd g Defines the commands that set the configuration registers for the STi7106 on an STMi
66. h415 define Description Define STiH415 core memory map stih415 fsim core setup Configure the ST40 functional simulator stih415 psim core setup Configure the ST40 performance simulator stm8000 cmd Defines the commands that describe the core memory regions and other attributes of an STm8000 See Table 44 Table 44 stm8000 cmd Command stm8000 define Description Define STm8000 core memory map stm8000 fsim core setup Configure the ST40 functional simulator stm8000 psim core setup Configure the ST40 performance simulator 8045872 Rev 9 ky UM1250 GDB command files 2 27 2 28 g stv0498 cmd Defines the commands that describe the core memory regions and other attributes of an STV0498 See Table 45 Table 45 stv0498 cmd Command Stv0498 define Description Define STV0498 core memory map Stv0498 fsim core setup Configure the ST40 functional simulator Stv0498 psim core setup Configure the ST40 performance simulator adi7105 cmd Defines the commands that set the configuration registers for the STi7105 on an STMicroelectronics STi7105 ADI board See Table 46 Table 46 adi7105 cmd Command Description Set simulated STi7105 ADI board configuration adi7105sim setup registers WA as N Set simulated STi7105 ADI board configuration registers E E d with the ST40 in SE mode wi
67. he complete list of link speeds Not compatible with the STMC2 This is the same as the 1inkspeed configuration command linktimeout Set the debug link timeout period in seconds or milliseconds This is the same as the 1inktimeout configuration command 1 memory add 8045872 Rev 9 Add a memory region to the target ky UM1250 GDB command files Note g Table 99 sh4commands cmd continued Command ondisconnect Description Set the action to perform on disconnecting from the target This is the same as the ondisconnect configuration command posixconsole Specify whether the console window should be created by calling console on off posixconsole takes a boolean value of 0 or 1 the default is 1 This command is retained only for backward compatibility and may be removed from future releases stmcconfigure Set a configuration command after connecting to a target Note The inicommand configuration command cannot be specified to stmcconfigure since it specifies a GDB command and not an STMC command stmcmsglevel Set the reporting level of the STMC diagnostic messages This is the same as the msglevel configuration command use watchpoint access size Specify whether the access size is checked when matching watchpoints The default is on Use help use watchpoint access size to display the complete list of access size checking options
68. hrough an STMC e Connectto and configure a target using an ST TargetPack through an STMC See ST40 Micro Toolset user manual 7379953 e Connectto a running target through an STMC See ST40 Micro Toolset user manual 7379953 e Connectto and configure a simulated target see Section 1 3 2 Commands to connect to a simulated target on page 20 Commands to connect to a target through an STMC Targets that are attached to an STMC can use target specific GDB connection commands To configure the target a connect command is invoked that takes the GDB command script as a parameter see Section 1 1 Target connection overview on page 10 The format of the connect command is connect arch type endian The endian suffixes are the same as in Table 1 GDB command suffixes on page 10 except that in this case they are not optional and there is an additional suffix arch type which is described in Table 5 8045872 Rev 9 ky UM1250 Target configuration Note g Table 5 GDB connect command suffixes Suffix Description Value Architecture type of the ST40 CPU st40300 ST40 300 core arch type Required by GDB to support SH 4 variations such as instruction set sh4 All other SH 4 cores Table 6 lists the connect user commands defined by the GDB command script file sh4connect cmd for connecting to a target attached to an STMC Table 6 STMC connect commands Command Description con
69. ht 9 mb796sti5b289 61 sh4targets cmd 67 mb837 cmd 61 sh4virtual cmd 72 mediaref cmd A RE IT 9 memory regions shsimcmds cmd 63 FLi7510 development board 42 Software FLi7540 development board 43 notation e a a E D a a 8 FLi7610 HDK board 42 Space enhancement mode 10 ST230EMU PCI board 49 ST Micro Connect 9 14 15 STb7100 MBoard 47 configuration commands 15 connection commands 65 66 84 87 8045872 Rev 9 ky UM1250 Index ST Micro Connect 1 1 9 attribute commands 33 ST Micro Connect 2 1 configuration registers 54 ST Micro Connect Lite 1 9 core memory map 33 ST Micro Connection Package 1 std1000 cmd coco 33 ST MultiCore MUX 11 STd2000 ST TargetPack 1 9 14 24 27 attribute commands 34 ST230EMU PCI board 49 configuration registers 29 30 52 ST40 Micro Toolset 9 core memory map 34 ST40 100 std2000 cmd 34 configuration regi
70. ic GDB connection commands To configure a simulated target a connect command is invoked that takes two GDB command scripts as parameters These scripts configure the simulator and simulated target see Section 1 1 Target connection overview on page 10 The format of the connect command is connect arch type sim mode endian Where the suffixes are the same as in Table 1 GDB command suffixes on page 10 except that the endian suffix is not optional 8045872 Rev 9 g UM1250 Target configuration Table 12 lists the connect user commands defined by the GDB command script file sh4connect cmd for connecting to simulated targets Table 12 Simulator connect commands Command Description connectsh4simle Connect to an ST40 functional simulator little endian Connect to an ST40 performance simulator little endian cycle connectsh4psimle accurate connectsh4simbe Connect to an ST40 functional simulator big endian Connect to an ST40 performance simulator big endian cycle connectsh4psimbe accurate connectst40300simle connectst40300simbe As above but for a simulated target with an ST40 300 core connectst40300psimle connectst40300psimbe The connect commands listed in Table 12 Simulator connect commands take the following arguments Sarg0 specifies the command to configure the SuperH simulator Sargl specifies the command to configure the simulated target Sarg2
71. ication programs on SH 4 systems using the ELF executable and linking file format OS21 user manual 7358306 This manual describes the generic use of OS21 across the supported platforms It describes all the core features of OS21 and their use and details the OS21 function definitions It also explains how OS21 differs from OS20 the API targeted at ST20 platforms OS21 for ST40 user manual 7358673 This manual describes the use of OS21 on ST40 platforms It describes how specific ST40 facilities are exploited by the OS21 API It also describes the OS21 board support packages for ST40 platforms 6 87 8045872 Rev 9 ky UM1250 Preface ST40 Micro Toolset GDB command scripts 8045872 This document describes using GDB command scripts to configure an ST Micro Connect 1 STMC1 or a ST Micro Connect Lite STMCLite to connect to a target board for loading and debugging programs through sh4gdb or sh4xrun 32 Bit RISC series ST40 Core architecture manual 7182230 This manual describes the architecture and instruction set of the ST40 core as used by STMicroelectronics ST40 core support peripherals manual 7988763 This manual describes the ST40 core support peripheral CSP package that give the optional peripherals for use in ST40 based System On Chips SoCs ST Micro Connection Package documentation suite The following documents are not distributed with the ST40 Micro Toolset but can be obtained from your ST FAE or
72. ig endian attach sh4le attach sh4 Attach to a generic SH 4 target little endian attach st40300be attach st403001e attach st40300 As above but for a target with an ST40 300 core attach stb7100 bypass attach stb7100 stmmx Attach to an STi5202 STb7100 STb7109 target where the STMC is configured for a direct connection to the ST40 CPU See stb7100_bypass_setup_attach in stb7100jtag cmd on page 65 Attach to an STi5202 STb7100 STb7109 target where the STMC1 is configured to use the ST MultiCore MUX device to connect to the ST40 CPU See Stb7100 stmmx setup attach in sib7100jtag cmd on page 65 attach sti7200 bypass Attach to an STi7200 target where the STMC is configured for a direct connection to the ST40 CPU See Sti7200 bypass setup attachin sti7200jtag cmd on page 66 attach sti7200 stmmx 1 Attach to an STi7200 target where the STMC1 is configured to use the ST MultiCore MUX device to connect to the ST40 CPU See Sti7200 stmmx setup attachin sti7200jtag cmd on page 66 attach stv0498 bypass Attach to an STV0498 target where the STMC is configured for a direct connection to the ST40 CPU See stv0498 bypass setup attachin stv0498jtag cmd on page 66 1 Only supported by the STMC1 8045872 Rev 9 67 87 GDB command files UM1250 Note 68 87 The equivalent sh4be and sh41e commands are listed in Table 96 Table 96 ST40 sh4be and sh
73. ion registers Set simulated STi7141 EUD board configuration registers with the ST40 in SE mode with cached RAM mappings eud7141simseuc setup eud7141simse29 setup Set simulated STi7141 EUD board configuration registers with the ST40 in SE mode with uncached RAM mappings Set simulated STi7141 EUD board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 eud7141 sim memory define Define memory regions for the STi7141 EUD board to the ST40 simulator g 8045872 Rev 9 41 87 GDB command files UM1250 2 33 fldb_gpd201 cmd Defines the commands that set the configuration registers for the FLi7510 on an STMicroelectronics FLi7510 development board See Table 51 Table 51 fldb gpd201 cmd Command Description Set simulated FLi7510 development board configuration fldb gpd201simse setup registers with the ST40 in SE mode with cached RAM mappings Set simulated FLi7510 development board configuration fldb gpd201simseuc setup registers with the ST40 in SE mode with uncached RAM mappings Set simulated FLi7510 development board configuration fldb gpd201simse29 setup registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 Define memory regions for the FLi7510 development Etob_gpe2 DA sim memory detire board to the ST40 simulator 2 34 fli7610hdk cmd Defines the commands tha
74. ith the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb704 display registers Display the STi5197 configuration registers mb704 sim memory define Define memory regions for the STi5197 MBoard to the ST40 simulator mb796sti5206 Defines the commands that set the configuration registers for the STi5206 on an STMicroelectronics STi5206 MBoard See Table 80 Table 80 mb796sti5206 cmd Command mb796sti5206sim setup Description Set simulated STi5206 MBoard configuration registers mb796sti5206simse setup mb796sti5206simseuc setup Set simulated STi5206 MBoard configuration registers with the ST40 in SE mode with cached RAM mappings Set simulated STi5206 MBoard configuration registers with the ST40 in SE mode with uncached RAM mappings mb796sti5206simse29 setup Set simulated STi5206 MBoard configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb796sti5206 display registers Display the STi5206 configuration registers mb796sti5206 sim memory define Define memory regions for the STi5206 MBoard to the ST40 simulator 8045872 Rev 9 g UM1250 GDB command files 2 63 mb796sti5289 Defines the commands that set the configuration registers for the STi5289 on an STMicroelectronics STi5289 MBoard See Table 81 Table 81 mb796sti5289 cmd Command Descriptio
75. l specific to the ST40 UDI debug emulation function On some ST40 system on chip SoC devices the TCK signal for the ST40 UDI is provided separately to the TCK signal used by the Test Access Port TAP for the SoC In these instances the TCK signal for the ST40 UDI is normally referred to as DCK however in this appendix the signal name TCK is used to refer to the ST40 UDI signal The jtag command The jtag command is enabled by issuing the GDB user command enable jtag defined in the jtag cmd GDB command script file jtag commands This command enables access to the ST40 UDI for manual control of the standard IEEE 1149 1 TAP and notASEBRK signals plus the notRESET and TRIG OUT signals of the target platform Also when used with a target which is connected through an ST MultiCore MUX device the j tag command provides control of the signal to switch between the TAP of the target and the TAP of the ST MultiCore MUX The subcommands supported by the j tag command are listed in Table 103 Table 103 jtag subcommands Command Description asebrk signal Specify the notASEBRK signal sequence help Display help for the j tag command Set the mode of the TAP where mode is one of the modes listed in mode mode Table 104 JTAG modes nrst signal Specify the notRESET signal sequence ntrst signal Specify the notTRST signal sequence Specify the signal sequence to switch between the TAP of the a ads ST MultiCore MUX an
76. lated STi7106 HDK board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 hdk7106 display registers Display the STi7106 configuration registers hdk7106 sim memory define Define memory regions for the STi7106 HDK board to the ST40 simulator 8045872 Rev 9 45 87 GDB command files UM1250 2 41 hdk7108 cmd Defines the commands that set the configuration registers for the STi7108 on an STMicroelectronics STi7108 HDK board See Table 59 Table 59 hdk7108 cmd Command hdk7108simse setup Description Set simulated STi7108 HDK board configuration registers with the ST40 in SE mode with cached RAM mappings hdk71 L08simseuc setup Set simulated STi7108 HDK board configuration registers with the ST40 in SE mode with uncached RAM mappings hdk71 LO8simse29 setup Set simulated STi7108 HDK board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 hdk71 L08 sim memory define Define memory regions for the STi7108 HDK board to the ST40 simulator 2 42 hdk7111 cmd Defines the commands that set the configuration registers for the STi7111 on an STMicroelectronics STi7111 HDK board See Table 60 Table hdk71 60 hdk7111 cmd Command 11sim setup Description Set simulated STi7111 HDK board configuration registers hdk71 11simse
77. le set mb442stb7100extclk 27 mb442stb7100bypass stmc The mb442stb7100 setup configuration command assumes that 64 Mbytes of memory is attached to the STb7100 LMI SYS memory interface If the size of attached memory is 128 Mbytes then set the GDB convenience variable mb442stb7100sys128 to 1 before connecting to the target For example set mb442stb7100sys128 1 mb442stb7100bypass stmc 8045872 Rev 9 ky UM1250 GDB command files 2 47 g mb442stb7109 cmd Defines the commands that set the configuration registers for the STb7109 on an STMicroelectronics STb7109 Ref board see Table 65 Table 65 mb442stb7109 cmd Command mb442stb7109 setup Description Set STb7109 Ref board configuration registers mb442stb7109se setup Set STb7109 Ref board configuration registers with the ST40 in SE mode with cached RAM mappings mb442stb7109seuc setup Set STb7109 Ref board configuration registers with the ST40 in SE mode with uncached RAM mappings mb442stb7109se29 setup Set STb7109 Ref board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb442stb7109sim setup Set simulated STb7109 Ref board configuration registers mb442stb7109simse setup Set simulated STb7109 Ref board configuration registers with the ST40 in SE mode with cached RAM mappings mb442stb7109simseuc setup Set simulated STb7109 Ref board configuration
78. llows e explicit sequence to enter the Run Test Idle state after Tap Logic Reset jtag tms 111110 e alternative sequence using grouping to enter the Run Test ldle state jtag tms 1 5 0 e sequence to read and write a 32 bit value from the TAP data register leaving the TAP in the Run Test Idle state jtag tms 1 5 010 0 32 110 where 1 5 takes the TAP to the Test Logic Reset state 0 to Run Test Idle 1 to Select DR 0 to Capture DR 0 32 to Shift DR for 32 iterations 1 to Exit1 DR 1 to Update DR and 0 to Run Test Idle If a signal subcommand is not specified to the j tag command then the level for the signal is left unchanged from the final level of its last specified signal sequence or if never specified its initial level as defined in Table 105 Also if a signal sequence is specified in a signal subcommand which is shorter than any other specified signal sequences then the level of the signal is also left unchanged from its final level in the sequence while the remainder of 8045872 Rev 9 75 87 JTAG control UM1250 Note A 2 3 76 87 the other signal sequences are transmitted and in any future j tag command if not specified The initial levels of the TAP signals when switching to manual control of the TAP for the first time are listed in Table 105 Table 105 Initial signal levels Signal Initial level Comment brk 1 The debug emulation function of the ST40 UDI is activated when PS
79. mmand resettype soft hard jtag break none softreset hardreset jtagreset breakreset Description Set the reset type when connecting to the target soft performs a UDI reset This is the same as the softreset configuration command hard performs a board level reset This is the same as the hardreset configuration command jtag does not perform a reset of the target instead reset should be performed explicitly using a j tag command sequence see Appendix A JTAG control on page 73 through a target initialization command see inicommand configuration command This is the same as the jtagreset configuration command break attaches to a running target without performing a reset and therefore leaves the target state intact This is the same as the breakreset configuration command This configuration command should be used in conjunction with the ondisconnect restart configuration command to ensure that the target is restarted on disconnecting and so allowing the target to be re attached to in the future none allows connections to previously connected targets that were disconnected with the ondisconnect none configuration command set which leaves the ST40 in debug mode The default is soft tdotimingchange on off useaccesssize size If set to on change the TCK clock edge on which the UDI TDO signal is activated from the TCK negative edge to the TCK positive edge Default is of f Specif
80. mmand script files listed in Table 107 These script files are located in the subdirectory sh superh elf stdcmd under the release installation directory Table 107 TAP command files Command file jtaghudi cmd Usage Defines the commands for querying and configuring the ST40 UDI jtagstmmx cmd Defines the commands for querying and configuring the ST MultiCore MUX device jtagtmc cmd Defines the commands for querying and configuring the TAP Mode Controller TMC of an SoC 8045872 Rev 9 79 87 Revision history UM1250 Revision history 80 87 Table 108 Document revision history Date Revision Changes Minor updates made throughout Updated ntroduction on page 1 Added ST Micro Connection Package documentation suite on page 7 16 Nov 2012 9 Updated Section 1 6 Commands to connect to a target using an ST TargetPack on page 24 and Section 1 8 Connecting to a running target on page 27 Renamed b2000 to b2000stih415 in Table 3 Primary targets on page 12 and in Section 2 30 b2000stih415 cmd on page 40 Minor updates made throughout Updated Table 3 Primary targets on page 12 with new targets Updated Section 1 3 1 Commands to connect to a target through an STMC on page 14 and added Table 8 Configuration commands for 25 Oct 2011 8 STMC2 when connected using JTAG on page 18 Added the following GDB command scripts Section 2 5 fli7610 cmd on page 31 Section 2 25 stih4
81. mmand script must however be modified to make the connection using the appropriate ST TargetPack See Section 1 7 STMC2 target configuration using GDB command scripts on page 26 for more information a The original ST Micro Connect product was named the ST Micro Connect With the introduction of ST Micro Connect 2 and the ST Micro Connect Lite the original product is now known as ST Micro Connect 1 and the generic term ST Micro Connect refers to the family of ST Micro Connect devices In some instances the names are abbreviated to STMC STMC1 STMC2 and STMCLite November 2012 8045872 Rev 9 1 87 www st com Contents UM1250 Contents la fcc RO EE 6 Document identification and control 6 License information 6 5140 documentation suite 6 ST Micro Connection Package documentation suite 7 Conventions used in this guide 7 ES MINI AR ERA DR RE a a us deme keene A OF 8 Acknowledgements wanasa 8 1 Target configuration 9 1 1 Target connection overview 10 1 2 Supportedtargets 12 1 3 Connectioncommands 14 1 3 1 Co
82. mmands to connect to a target through an STMC 14 1 3 2 Commands to connect to a simulated target 20 1 4 Target configuration commands 22 1 5 Global target configuration variables 23 1 6 Commands to connect to a target using an ST TargetPack 24 17 STMC2 target configuration using GDB command scripts 26 1 8 Connecting to a running target 27 1 9 Migrating from ST Micro Connect 1 to ST Micro Connect 2 28 2 GDB command files 29 2 1 register40 cmd 29 2 2 displaydO cmd IIIA dei a tec 30 2 3 IES IO CMO saos irse roo ies 31 2A Uu AI E 31 2 5 fi7610 cmd 31 PAG sMOS00EMd coe de eR AA 32 2 7 SUIDEDELCITIB ER RE ERG ER RERO Ra dep I ee acd ach dpa ders 32 2 8 Stora CMA es a kB NANANA GC OPER PER eR a E XORACR A EN E eo 32 CU AME cate MT TTC TUUM 33 2 87 8045872 Rev 9 77 UM1250 Contents 2 10 2 11 2 12 2 13 2 14 2 15 2 16 2 17 2 18 2 19 2 20 2 21 2 22 2 23 2 24 2 25 2 26 2 27 2 28 2 29 2 30 2 31 2 32 2 33 2 34 2 35 2 36 2 37 2 38 2 39 2 40 2 41 2 42 stD7109 emd EIA A a EIA 33 SId1000 6md e daa IA AHAA 33 Std2000 cmd ii e e E i e a ea KA A Ee ee Ee ee Ge E ee ee 34 stib189 cmd iis enu eR REG
83. mmx_setup 8045872 Rev 9 77 87 JTAG control UM1250 78 87 Table 106 TAP configuration commands continued Target command mb442bypass mb442stb7100bypass stb7100refbypass TAP configuration command mb442stb7100bypass setup mb442stmmx mb442stb7100stmmx stb7100refstmmx mb442stb7100stmmx_setup Command file mb442stb7100 cmd mb442stb7109bypass mb442stb7109sebypass mb442stb7109seucbypass mb442stb7109se29bypass mb442stb7109bypass_setup mb442stb7109stmmx mb442stb7109sestmmx mb442stb7109seucstmmx mb442stb7109se29stmmx mb442stb7109stmmx setup mb442stb7109 cmd mb448bypass mb448sebypass mb448seucbypass mb448se29bypass mb448bypass setup mb448stmmx mb448sestmmx mb448seucstmmx mb448se29stmmx mb448stmmx setup mb448 cmd mb519bypass mb519sebypass mb519seucbypass mb519se29bypass mb519stmmx mb519sestmmx mb519seucstmmx mb519se29stmmx mb519bypass setup mb519stmmx setup mb519 cmd mb521bypass mb521bypass setup mb521 cmd mb602bypass mb602sebypass mb602seucbypass mb602se29bypass mb602bypass setup mb602stmmx mb602sestmmx mb602seucstmmx mb602se29stmmx mb625bypass mb602stmmx_setup mb625bypass_setup mb602 cmd mb625 cmd 8045872 Rev 9 g UM1250 JTAG control Additional examples of using the j tag command to configure and query the TAP of a target are defined in the GDB co
84. n mb796sti5289sim setup Set simulated STi5289 MBoard configuration registers a Set simulated STi5289 MBoard configuration registers IO RO with the ST40 in SE mode with cached RAM mappings Set simulated STi5289 MBoard configuration registers mb796sti5289simseuc_setup with the ST40 in SE mode with uncached RAM mappings Set simulated STi5289 MBoard configuration registers mb796sti5289simse29 setup with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb796sti5289 display registers Display the STi5289 configuration registers mb796sti5289 sim memory define Define memory regions for the STi5289 MBoard to the ST40 simulator 2 64 mb837 cmd Defines the commands that set the configuration registers for the STi7108 on an STMicroelectronics STi7108 MBoard See Table 82 Table 82 mb837 cmd Command mb837simse setup mb837simseuc setup Description Set simulated STi7108 MBoard configuration registers with the ST40 in SE mode with cached RAM mappings Set simulated STi7108 MBoard configuration registers with the ST40 in SE mode with uncached RAM mappings mb837simse29 setup mb837 sim memory define Set simulated STi7108 MBoard configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 Define memory regions for the STi7108 MBoard to the ST40 simulator g 8045872 Rev 9 61 87 GDB command files UM1250 2 65 sat5189cmd Defin
85. n sh4 display all pmb mappings Display the mappings of the valid PMB entries sh4 enhanced mode Display or set space enhanced mode sh4 set pmb Set a PMB entry sh4 clear pmb Clear a PMB entry sh4 clear all pmbs Clear all PMB entries sh4 display pmb sh4 display all pmbs Lower level PMB set display commands sh4 display pmb mapping sh4virtual cmd Defines the commands to set and display the dynamic UTLB translation mappings see Table 102 Table 102 sh4virtual cmd Command Description sh4 display all utlb mappings Display the mappings of all valid UTLB entries sh4 set utlb sh4 clear utlb sh4 clear all utlbs sh4 display utlb Lower level UTLB set display commands sh4 display all utlbs sh4 display utlb mapping sh4 virtual mode allemd cmd Sources all the GDB script files supplied with the ST40 Micro Toolset the main purpose of this is to make available all commands defined by the scripts supplied with the ST40 Micro Toolset 8045872 Rev 9 ky UM1250 JTAG control Appendix A JTAG control A 1 A 2 Introduction to JTAG JTAG is an acronym for the Joint Test Access Group which specified the EEE 1149 1 Test Access Port and Boundary Scan Architecture The ST40 User Debug Interface UDI conforms to the IEEE 1149 1 standard and uses all five signals defined in the standard TCK TMS TDI TDO and notTRST plus notASEBRK BRKACK which is an additional signa
86. ncies where St40 cpu f eppy bus fgpgg mem fygy per fpgg fe is the frequency in MHz Several versions of the command are defined Display the internal clock fr nci nd PLL atat discisvatosks splay the internal clock frequencies and configuration register settings 8045872 Rev 9 63 87 GDB command files UM1250 2 70 2 71 2 72 2 73 64 87 stb7100clocks cmd Defines the commands that display the frequencies of the various internal clocks of an STi5202 STb7100 STb7109 see Table 88 Table 88 stb7100clocks cmd Command Description Display the internal clock frequencies and PLL stb 100_displayclocks configuration register settings sti5528clocks cmd Defines the commands that display the frequencies of the various internal clocks of an STi5528 see Table 89 Table 89 sti5528clocks cmd Command Description Display the internal clock frequencies and PLL i i k a RAAI DE EIE configuration register settings stm8000clocks cmd Defines the commands that display the frequencies of the various internal clocks of an STm8000 see Table 90 Table 90 stm8000clocks cmd Command Description Display the internal clock fr nci nd PLL stm8000 displayclocks ind E a QOC Buenas and configuration register settings sti7200clocks cmd Defines the commands that display the frequencies of the various internal clocks of an STi7200 see Table 91
87. nectsh4le Connect to generic SH 4 little endian target through an STMC connectsh4be Connect to generic SH 4 big endian target through an STMC connectst403001e As above but for a target with an ST40 300 core connectst40300be The connect commands listed in Table 6 take the following arguments arg0 specifies the name or IP address of the STMC Sargl specifies the command to be invoked after connecting to the STMC in order to configure the target Sarg2 specifies the configuration commands for the STMC see Table 7 Table 9 and Table 10 The se mode suffix of a target connection command see Table 1 determines the configuration command for Sarg1 and the tmx mode suffix of a target connection command determines the parameters for Sarg2 The configuration commands for configuring any STMC are listed in Table 7 Table 7 Common STMC configuration commands Command Description Set breaktype to pin to use the ASEBRK pin to interrupt a running breaktype pin udi target or set breakt ype to udi to use the UDI to interrupt the target The default is uai Execute the GDB command command to initialize the target see HEP Appendix A JTAG control on page 73 before connecting to the ST40 EE command may take optional arguments by appending them to the command arg command name using a comma as a separator without spaces Note that command is normally a user defined GDB command 804587
88. o rea nni a a Da REA RESA 49 246 mb442sib 100 0md 50 247 mb442stb7109 cmd bi 2 48 EMA sitos ler ES AA WAA AA 52 249 mbbli9 cmd 53 2 50 MSI CMA ii sace REA BERE GR DEER EAR Gd RA ERA EX REX 54 25 MOBO is SEERDE hr dee Yo RE y aee Vea Mod ta de e EER dod qe x 54 232 MBOO Gd oia seeds roh Eden ae Cy dicas e RE ES E EER dud qe x 55 259 MIS MA os corran KERR ORE DRS o do AA 56 2 54 mb625 cmd 56 2 55 MPE2BEMA a0 ad eke ho oad OH ERE Xd ed wn uA NG OOS ACCU 57 256 IDG WOME suas cage ron a itu das a MCN dou dd 57 Dor mibsrbesib EA CMO ses sierras DRA 58 2 58 mb676sti5197cmd 58 2 59 mb680sti7105 cmd 59 2 60 mb680sti7106 cmd 59 2 81 MEMA copitas ar PG REO o dico d eei d ed 60 252 dqmbyz95sl5208 pep daa ET OR EE REESE 60 259 mb796stib289 61 2 64 MBE MA te dea d sg ARE Ai SUR RR a uc CR GR AGE EE E 61 2 65 sat5189cmd ess 62 2 66 Sat 111 6m d ise rus EER GR ERE a rue re ches 62 2 67 stb7100boot cmd 63 2 68 sti7200boot cmd 63 2 69 si4Oclocks ccmd
89. ommand 67 69 STi5202 MBoard 55 attributecommands 33 STi5206 clock frequency commands 64 configuration registers 44 60 configuration registers 29 30 47 50 STi5206 HDK board 44 core memory map 33 STi5206 MBoard 60 stb7100 cmd seres 32 33 STi5289 stb7100boot cmd 63 configuration registers 44 stb7iO0clocks cmd 64 stib289 cmd IA IAA 35 stb7100jtag cmd 64 STi5289 HDK board 44 STb7100 Ref board 47 50 51 STi5528 STb7109 63 65 attribute commands 36 attach command 67 69 clock frequency commands 64 attributecommands 33 configuration registers 29 30 clock frequency commands 64 core memory map 36 configuration registers 29 30 48 51 stibb28 cmd 36 core memory map 33 sti5528clocks cmd 64 stb7109 cmd ccoo 33 STi7105 STb7109E configuration registers 39 45 59 configuration registers 52 core memory map 36 STb7109E Ref board 52 68 sti7105 cmd ooo 36 STb7109 Ref
90. on Platform v v mb837 STi7108 MBoard Validation Platform v x v sat5189 STi5189 SAT board v v sat7111 STi7111 SAT board v v 1 Fortargets with simulator support only GDB scripts are not provided for connecting to silicon targets An ST TargetPack must be used instead 2 These targets only provide se mode variants 8045872 Rev 9 13 87 Target configuration UM1250 Note 1 3 1 3 1 14 87 All targets support both Ethernet and USB connections Only the sh4 and st40300 commands have both big and little endian variants default is little if no endian suffix is specified Table 4 lists the legacy targets supported by the ST40 Micro Toolset with GDB command scripts Table 4 Legacy targets Prefix Board db457 ST40RA Overdrive Board espresso STi5528 Espresso Reference Platform mb293 ST40RA Software Development Boards MB293 and MB350 mb317 ST40GX1 Evaluation Board mb360 ST40RA Evaluation Board mb374 ST40RA Starter Board mb376 STi5528 MBoard Validation Platform mb379 STm8000 Demo Development Platform mb388 ST40 300 FPGA ST230EMU PCI Board mb392 ST220 Evaluation Board mb422 DTV100 DB Development Platform mediaref ST40GX1 ST5512 MediaRef Platform Connection commands There are four standard types of connection supported e Connect to and configure a target using GDB command scripts through an STMC see Section 1 3 1 Commands to connect to a target t
91. onfiguration registers for the STi7141 on an STMicroelectronics STi7141 MBoard See Table 73 Table 73 mb628 cmd Command mb628sim setup Description Set simulated STi7141 MBoard configuration registers mb628simse setup Set simulated STi7141 MBoard configuration registers with the ST40 in SE mode with cached RAM mappings mb628simseuc setup Set simulated STi7141 MBoard configuration registers with the ST40 in SE mode with uncached RAM mappings mb628simse29 setup Set simulated STi7141 MBoard configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb628 sim memory define 2 56 mb671 cmd Defines the commands that set the configuration registers for the STi7200 on an STMicroelectronics STi7200 MBoard See Table 74 Table 74 mb671 cmd mb671 Command sim setup Define memory regions for the STi7141 MBoard to the ST40 simulator Description Set simulated STi7200 MBoard configuration registers mb671 mb671 simse setup simseuc setup Set simulated STi7200 MBoard configuration registers with the ST40 in SE mode with cached RAM mappings Set simulated STi7200 MBoard configuration registers with the ST40 in SE mode with uncached RAM mappings mb671 mb671 simse29 setup display registers Set simulated STi7200 MBoard configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1
92. onnecting to the STi5202 STb7100 STb7109 for example the following sets a 200 ms delay set SSTb7100ResetDelay 200 8045872 Rev 9 65 87 GDB command files UM1250 2 75 Note 2 76 Note 66 87 sti7200jtag cmd Defines the commands for configuring the connection between an STMC1 or an STMCLite and the ST40 CPU of an STi7200 see Table 93 Table 93 sti7200jtag cmd Command Description SEERDE EES metis ED the STMC for a direct connection to the ST40 Similar to sti7200 bypass setup except that the Sti7200 bypass setup attach STi7200 is not reset Used when attaching to a running or stopped target Configure the STMC1 for a connection to the ST40 CPU using an ST MultiCore MUX device allowing simultaneous access to the ST40 and other CPU s on the STi7200 sti7200 s tmmx_setup Similar to sti7200_stmmx_setup except that the sti7200_stmmx_setup_attach STi7200 is not reset Used when attaching to a running or stopped target 1 See Section 2 78 sh4targets attach cmd on page 67 and Section 2 79 sh4targets attach debug cmd on page 69 2 Only supported by the STMC1 The STi7200ResetDelay GDB convenience variable is used by the commands listed in Table 93 to set the delay in milliseconds when performing a reset of the target The default is 20 milliseconds stv0498jtag cmd Defines the commands for configuring the connection between an STMC1 or an STMCLite and the ST
93. or convenience any spaces in the name can be replaced by underscores or hyphens gt udisync mode Where mode is one of the following poll check the handshake status after every 32 bit transfer and poll until it signals ready or a timeout occurs This is the default nopo11 read the handshake status after every 32 bit transfer but only check if it signalled ready after the transfer of the entire payload up to 64KB nopollnocheck similar to nopo11 except that the handshake status is ignored This mode provides the best transfer rates but can only be used if reliability is assured udisyncdelay delay Where delay specifies the number of TCK clock ticks to delay before reading the handshake status delay can be any value between 0 and 256 K TCK clock ticks Use this option to tune the transfer rates or improve reliability of the udisync modes or both The default is 0 1 This mode is potentially unreliable if the CPU or peripheral bus frequency is not fast enough If this is the case then use udisync poll until udisync nopoll can safely be used Alternatively the udisyncdelay delay configuration command can be used to improve reliability The configuration commands in tables 7to 10 must be specified as a string that is enclosed within double quotes if they contain spaces and may be combined using a space to separate each command see the examples in Table 11 on page 20 8045872 Rev 9 19 8
94. ough Stb7100 stmmx setup see stb7100jtag cmd on page 65 Used by the mb41stb71001stmmx command 1 Only supported by the STMC1 When configuring the STb7100 CLOCKGENA peripheral the mb411stb7100 setup configuration command assumes that the frequency of the external clock source is 27 MHz If the frequency of the clock source is 30 MHz the only possible alternative set the GDB convenience variable _mb411stb7100extc1k to the correct frequency in MHz before connecting to the target For example set _mb411stb7100extclk mb411stb7100bypass stmc 30 8045872 Rev 9 47 87 GDB command files UM1250 2 44 48 87 mb411stb7109 cmd Defines the commands that set the configuration registers for the STb7109 on an STMicroelectronics STb7109 MBoard see Table 62 Table 62 mb411stb7109 cmd Command Description mb411stb7109_setup Set STb7109 MBoard configuration registers Set STb7109 MBoard configuration registers with the a a ST40 in SE mode with cached RAM mappings Set STb7109 MBoard configuration registers with the EET setup ST40 in SE mode with uncached RAM mappings Set STb7109 MBoard configuration registers with the mb411stb7109se29 setup ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb411stb7109sim_setup Set simulated STb7109 MBoard configuration registers Set simulated STb7109 MBoard configuration registers AG with the ST40 in SE mode with cached RA
95. ration registers std2000 display si regs Sti5202 display si regs Display STd2000 configuration registers Display STi5202 configuration registers Sti5528 display si regs Display STi5528 configuration registers sti7200 display si regs Display STi7200 configuration registers stm8000 display si regs Display STm8000 configuration registers Stv0498 display si regs Display STV0498 configuration registers g 8045872 Rev 9 UM1250 GDB command files 2 3 2 4 2 5 fli7510 cmd Defines the commands that describe the core memory regions and other attributes of an FLi7510 See Table 21 Table21 fli7510 cmd Command f1i7510 define Define FLi7510 core memory map Description f117510 fsim core setup Configure the ST40 functional simulator f117510 psim core setup Configure the ST40 performance simulator fli7540 cmd Defines the commands that describe the core memory regions and other attributes of an FLi7540 See Table 22 Table 22 fli7540 cmd Command f1i7540 define Description Define FLi7540 core memory map f117540 fsim core setup Configure the ST40 functional simulator f1i7540 psim core setup Configure the ST40 performance simulator fli7610 cmd Defines the commands that describe the core memory regions and other attributes of an FLi7610 See Table 23 Table 23 fli7610 cmd
96. re not available when connected to an ST40 through a TapMux g 8045872 Rev 9 UM1250 Target configuration g The configuration commands that apply only to the STMC1 are listed in Table 9 Table 9 STMC1 configuration commands Command jtagclk internal external Description Set the reference clock source for the JTAG TCK signal The default is internal jtagpinout default hitachi st40 stmmx STMC Type A STMC Type B Set the style of pinout from the STMC1 to the target board JTAG connector Note default and hitachi are synonyms for STMC Type B st40 is a synonym for STMC Type A The STMC Type B pinout style is used by legacy ST40 targets such as ST4ORA ST40GX1 STi5528 and STm8000 boards STMC Type Ais the standard ST Microelectronics pinout style for current ST40 targets stmmx is the pinout style used for connections to the ST MultiCore MUX device The default is default tdidelay delay Set the delay in TCK clock cycles for the JTAG TDI signal STMC1 perspective The default is 0 1 The jtagpinout configuration command if specified is ignored by the STMCLite This is because the pinout style of the STMCLite is fixed The configuration commands that apply only to the STMCLite are listed in Table 10 Table 10 STMCLite configuration commands Command deviceid name Description name is the USB identifier for the STMCLite F
97. s The connection command variants exist to support the different se mode variants Table 15 STb7109E Ref configuration commands Connect command Setup command se mode configuration command mb448 mb448 setup mb448se mb448se setup mb448se pmb configure mb448seuc mb448seuc setup mb448seuc pmb configure mb448se29 mb448se29 setup mb448se29 pmb configure g 8045872 Rev 9 UM1250 Target configuration 1 5 Global target configuration variables There are some aspects of target configuration that are controlled through global GDB convenience variables instead of a providing variants of the target connection commands To change the default behavior controlled by these convenience variables they need to be set before connecting to a target Note The board or SoC they control is encoded into the convenience variable name g Table 16 Global convenience variables Convenience variable stb7109movelmiregs Default value Behavior If this is non zero the LMI SYS and LMI VID configuration registers for the STb7109 are relocated to their Area 6 addresses see STx7109 Datasheet 7976546 sti5202movelmiregs If this is non zero the LMI configuration registers for the STi5202 are relocated to their Area 6 addresses see STx5202 Datasheet 8040779 Reset delay interval in milliseconds Similar to the ee tdelay STMC1 configuration command see s resetdelay
98. scription Space enhanced P1 and P2 cached ST40 in the multicore SoC through an ST MultiCore MUX 2 Space enhanced P1 and P2 uncached mb448seucstmmx H ST40 in the multicore SoC through an ST MultiCore MUX rss A Space enhanced P1 cached and P2 uncached se stmmx d ST40 in the multicore SoC through an ST MultiCore MUX mb448sim mb448simse Functional simulator connections mb448simseuc mb448simse29 mb448psim mb448psimse l Performance simulator connections mb448psimseuc mb448psimse29 1 Not used Must connect using tmx mode variants 2 Only supported by the STMC1 Supported targets Table 3 lists the supported primary targets that use GDB command scripts for configuration In the future targets are expected to be configured using ST TargetPacks instead of GDB command scripts Table 3 Primary targets simulator Prefix Board Sl erk support only sh4 Generic SH 4 target x st40300 Generic ST40 300 target adi7105 STi7105 ADI board v v adi7108 STi7108 ADI board v x v b2000stih415 STiH415 HVK board v x v cab5197 STi5197 CAB board v v eud7141 STi7141 EUD board v v fldb gpd201 FLi7510 development board v v 1i7610hdk FLi7610 HDK board v x v fudb gpd201 FLi7540 development board v x v hdk5189 STi5189 HDK board v v 8045872 Rev 9 ky UM1250 Target configuration g
99. setup mb448psimseuc connectsh4psimle mb448se psim setup mb448simseuc setup mb448psimse29 connectsh4psimle mb448se psim setup mb448simse29 setup Target configuration commands For each board there is a sh4targets board cmd GDB command script file that contains the connection commands for the target see Chapter 2 GDB command files on page 29 Each of these commands invoke a suitable connect command see Section 1 3 Connection commands on page 14 A parameter of the connect command is the GDB user command to invoke after connecting to the target This command configures the target and is defined in the GDB command script file board cmd For example the GDB command script file mb448 cmd defines the user command mb448_setup that configures the target after connection The sequence of operations performed by mb448_setup is similar to the following define mb448 setup Commands to configure GDB with the names and addresses of the memory regions and memory mapped registers stb7109 define mb448 memory define stb7109 si regs Commands to configure the clocks system registers and external memory interfaces mb448 clockgen configure mb448 sysconf configure mb448 emi configure mb448 1misys configure mb448 lmivid configure Configure the caches set SCCN_CCR 0x8000090d end Table 15 lists the different STb7109E Ref connection command variants and their associated configuration command
100. specifies the configuration commands for the SuperH simulator see Table 13 Table 13 lists the SuperH simulator configuration commands Only one configuration command can be specified and must be specified as a string that is enclosed within double quotes Table 13 Simulator configuration commands Command Description Set the memory access delay in cycles to delay ST40 performance TEM detay simulator only Default is 1 cycle Enable mode is 1 or disable mode is 0 a simulated serial port The SCIF mode simulator displays a TCP IP port number and waits for 30 seconds for the user to connect to the network port using for example Telnet As an example the connect commands for the simulated STb7109E Ref targets are listed in Table 14 Table 14 STb7109E Ref simulator connection commands Command Definition mb448sim connectsh4simle mb448 fsim setup mb448sim setup mb448simse connectsh4simle mb448se fsim setup mb448simse setup mb448simseuc connectsh4simle mb448se fsim setup mb448simseuc setup mb448simse29 connectsh4simle mb448se fsim setup mb448simse29 setup mb448psim connectsh4psimle mb448 psim setup mb448sim setup g 8045872 Rev 9 21 87 Target configuration UM1250 1 4 22 87 Table 14 STb7109E Ref simulator connection commands continued Command Definition continued mb448psimse connectsh4psimle mb448se psim setup mb448simse
101. sters 29 30 STi5189 ST40 200 attribute commands 34 configuration registers 29 30 configuration registers 43 58 61 62 ST40 300 ai aaa eee 69 core memory map 34 attributecommands 32 STi5189 97 MB 58 configuration registers 29 30 49 STi5189 HDK board 43 core memory map 32 STi5189 MBoard 61 ST40 400 STib189 SATboard 62 configuration registers 29 30 STi5197 ST40 500 attribute commands 34 configuration registers 29 30 configuration registers 41 58 60 si40clocks cmd 63 core memory map 34 ST40GX1 63 STi5197 CAB board 41 attributecommands 32 STi5197 MBoard 60 configuration registers 29 30 STib202 eee 63 65 67 69 st 0gxl cmd 32 attachcommand 67 69 STORA is a ieee ote 63 attribute commands 35 attributecommands 32 clock frequency commands 64 configuration registers 29 30 configuration registers 29 30 55 STb7100 occ 63 65 69 core memory map 35 attach c
102. t TAP modes The modes of the TAP supported by the mode subcommand are listed in Table 104 Table 104 JTAG modes Mode Description Release manual control of the TAP and return to GDB sole control of the ST40 All further manual control of the TAP is disabled until the mode is changed to one of the other modes listed in this table This is the default mode normal Set the TAP to manual control GDB no longer has control of the ST40 and care must be taken to ensure GDB does not attempt to access the ST40 until the TAP has been returned to normal mode as this will result in undefined behavior In manual mode the TCK signal has to be explicitly specified through the tck signal subcommand unlike the singleshot and continuous modes manual The same as manual mode except that the TCK signal is automatically clocked 1 cycle for each signal specified by the j tag command The TDI signal is captured a short period after the falling edge of TCK The tck signal subcommand is ignored in this mode singleshot The same as singleshot mode except that the TCK signal is continuously clocked until the TAP mode is changed All the signal subcommands are ignored until the TAP is returned to manual or singleshot mode continuous g 8045872 Rev 9 UM1250 JTAG control Note A 2 2 The TCK clock speed in the singleshot and continuous modes is determined by the debug link speed as set by the 1inksp
103. t set the configuration registers for the FLi7610 on an STMicroelectronics FLi7610 HDK board See Table 52 Table 52 fldb gpd201 cmd Command Description Set simulated FLi7610 HDK board configuration fli7610hdksimse setup registers with the ST40 in SE mode with cached RAM mappings Set simulated FLi7610 HDK board configuration fli7610hdksimseuc setup registers with the ST40 in SE mode with uncached RAM mappings Define memory regions for the FLi7610 development a a sim memory detine board to the ST40 simulator 42 87 8045872 Rev 9 ky UM1250 GDB command files 2 35 2 36 g fudb gpd201 cmd Defines the commands that set the configuration registers for the FLi7540 on an STMicroelectronics FLi7540 development board See Table 51 Table 53 fudb gpd201 cmd Command fudb gpd201simse setup Description Set simulated FLi7540 development board configuration registers with the ST40 in SE mode with cached RAM mappings fudb gpd201simseuc setup Set simulated FLi7540 development board configuration registers with the ST40 in SE mode with uncached RAM mappings fudb gpd201simse29 setup Set simulated FLi7540 development board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 fudb gpd201 sim memory define Define memory regions for the FLi7540 development board to the ST40 simulator hdk5189 cmd Defines the commands that set
104. th cached RAM mappings Set simulated STi7105 ADI board configuration registers adi7105simseuc setup with the ST40 in SE mode with uncached RAM mappings Set simulated STi7105 ADI board configuration registers adi7105simse29 setup with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 adi7105 display registers Display the STi7105 configuration registers adis sim menory define Define memory regions for theSTi7105 ADI board to the ST40 simulator 8045872 Rev 9 39 87 GDB command files UM1250 2 29 adi7108 cmd Defines the commands that set the configuration registers for the STi7108 on an STMicroelectronics STi7108 ADI board See Table 47 Table 47 adi7108 cmd Command Description BA inse set Set simulated STi7108 ADI board configuration registers B i with the ST40 in SE mode with cached RAM mappings Set simulated STi7108 ADI board configuration registers adi7108simseuc setup with the ST40 in SE mode with uncached RAM mappings Set simulated STi7108 ADI board configuration registers adi7108simse29 setup with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 adi7108 sim memory define Define memory regions for the STi7108 ADI board to the ST40 simulator 2 30 b2000stih415 cmd Defines the commands that set the configuration registers for the STH415 on an STMicroelectronics STiH415 HVK See Table 48 Table 48 STiH415 cmd Command Description
105. the ST40 in SE mode with uncached RAM mappings hdk5289sti5206simse29 setup Set simulated STi5206 HDK board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 hdk5289sti5206 display registers Display the STi5206 configuration registers hak5289sti5206 sim memory define Define memory regions for the STi5206 HDK board to the ST40 simulator 2 38 hdk5289sti5289 cmd Defines the commands that set the configuration registers for the STi5289 on an STMicroelectronics STi5289 HDK board See Table 56 Table 56 hdk5289sti5289 cmd Command hdk5289sti5289sim setup Description Set simulated STi5289 HDK board configuration registers hdk5289sti5289simse setup Set simulated STi5289 HDK board configuration registers with the ST40 in SE mode with cached RAM mappings hdk5289sti5289simseuc setup Set simulated STi5289 HDK board configuration registers with the ST40 in SE mode with uncached RAM mappings hdk5289sti5289simse29 setup Set simulated STi5289 HDK board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 hdk5289sti5289 display registers Display the STi5289 configuration registers hak5289sti5289 sim memory define Define memory regions for the STi5289 HDK board to the ST40 simulator 44 87 8045872 Rev 9 g UM
106. the configuration registers for the STi5189 on an STMicroelectronics STi5189 HDK board See Table 54 Table 54 hdk5189 cmd Command hdk5189sim setup Description Set simulated STi5189 HDK board configuration registers hdk5189simse setup Set simulated STi5189 HDK board configuration registers with the ST40 in SE mode with cached RAM mappings hdk5189simseuc setup Set simulated STi5189 HDK board configuration registers with the ST40 in SE mode with uncached RAM mappings hdk5189simse29 setup Set simulated STi5189 HDK board configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 hdk5189 display registers Display the STi5189 configuration registers hdk5189 sim memory define Define memory regions for the STi5189 HDK board to the ST40 simulator 8045872 Rev 9 43 87 GDB command files UM1250 2 37 hdk5289sti5206 cmd Defines the commands that set the configuration registers for the STi5206 on an STMicroelectronics STi5206 HDK board See Table 55 Table 55 hdk5289sti5206 cmd Command hdk5289sti5206sim setup Description Set simulated STi5206 HDK board configuration registers hdk5289sti5206simse setup Set simulated STi5206 HDK board configuration registers with the ST40 in SE mode with cached RAM mappings hdk5289sti5206simseuc setup Set simulated STi5206 HDK board configuration registers with
107. tle Base address for the level 2 cache configuration registers Setting this 12cache address configuration command enables L2 cache coherency by the STMC The default is O L2 cache coherency is disabled 8045872 Rev 9 ky UM1250 Target configuration g Table 18 ST TargetPack STMC configuration commands continued Command Description Set the debug link timeout period to time seconds or time linktimeout milliseconds If units is ms then time is in milliseconds If units is time units omitted or is s then time is in seconds The default is 1 second This is the same as the 1inktimeout user command Set the reporting level of diagnostic messages displayed by the STMC msglevel none warning on its console which on the STMC1 are sent to its console and on the info debug all STMC2 are sent to its log files 9 The default is none This is the same as the stmcmsglevel user command Set the action to perform on disconnecting from the target The default is none none does nothing when disconnecting reset resets the target before disconnecting This is not compatible with the STMC2 restart restarts the target from where it was last stopped This is the same as the ondi sconnect user command ondisconnect none reset restart Specify whether the access size is checked when matching watchpoints This is the same as the use watchpoint access size user command useac
108. tup configuration command assumes that 64 Mbytes of memory is attached to the STb7109 LMI SYS memory interface If the size of attached memory is 128 Mbytes then set the GDB convenience variable _mb442stb7109sys128 to 1 before connecting to the target For example set mb442stb7109sys128 1 mb442stb7109bypass stmc mb448 cmd Defines the commands that set the configuration registers for the STb7109E on an STMicroelectronics STb7109E Ref board see Table 66 Table 66 mb448 cmd Command Description mb448_setup Set STb7109E Ref board configuration registers Set STb7109E Ref board configuration registers with the ST40 in SE mode with cached RAM mappings Set STb7109E Ref board configuration registers with the ST40 in SE mode with uncached RAM mappings mb448se_setup mb448seuc_setup Set STb7109E Ref board configuration registers with mb448se29_setup the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 Set simulated STb7109E Ref board configuration registers Set simulated STb7109E Ref board configuration mb448simse_setup registers with the ST40 in SE mode with cached RAM mappings Set simulated STb7109E Ref board configuration mb448simseuc setup registers with the ST40 in SE mode with uncached RAM mappings Set simulated STb7109E Ref board configuration mb448simse29 setup registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb448sim setup
109. upt to Section 1 3 1 Commands to connect to a target through an STMC on page 14 and to Section 1 6 Commands to connect to a target using an ST TargetPack on page 24 6 Jun 2008 Throughout added details relating to the STi7105 STi7111 STi5189 97 STi7141 and STi7200 cut 2 and their respective boards Other minor nontechnical updates made 8045872 Rev 9 81 87 Revision history UM1250 82 87 Table 108 Document revision history continued Date 5 Dec 2007 Revision Changes Throughout added details relating to STi5202 and mb602 Added new configuration command tdotimingchange in Table 7 Common STMC configuration commands on page 15 Added information on ST TargetPack restrictions in Section 1 7 STMC2 target configuration using GDB command scripts on page 26 Other minor nontechnical updates made 26 Mar 2007 Initial release 8045872 Rev 9 g UM1250 Index Index A connecting to targets 9 67 adi7105 cmd 39 map a adi7108 cmd SESSE EE EE EE EE Ee un 40 FL7510 34 allcmd cmd 72 ST40 300 2 LLL 32 STb7100 sica erg 32 33 B STD7109 33 Backus Naur Form 8 STd1000 33 big endian STd2000 MA EE EO OER 34 connect to simulator 21 STI5189
110. uration registers with the ST40 in SE mode with cached RAM mappings mb519seuc setup mb519se29 setup Set STi7200 MBoard configuration registers with the ST40 in SE mode with uncached RAM mappings Set STi7200 MBoard configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 mb519sim setup Set simulated STi7200 MBoard configuration registers mb519simse setup mb519simseuc setup Set simulated STi7200 MBoard configuration registers with the ST40 in SE mode with cached RAM mappings Set simulated STi7200 MBoard configuration registers with the ST40 in SE mode with uncached RAM mappings mb519simse29 setup mb519 display registers mb519 sim memory define Set simulated STi7200 MBoard configuration registers with the ST40 in SE mode with 29 bit compatibility RAM mappings in P1 and P2 Display STi7200 MBoard configuration registers Define memory regions for the STi7200 MBoard to the ST40 simulator mb519bypass setup Set the STi7200 MBoard to bypass to the ST40 through Sti7200 bypass setup see sti7200jtag cmd on page 66 Used by the mb519bypass command mb519stmmx setup Set the STi7200 MBoard for use with the ST MultiCore MUX device allowing simultaneous access to the ST40 and other CPUs on the STi7200 through Sti7200 stmmx setup see sti7200jtag cmd on page 66 Used by the mb519stmmx command 1 Only supported by the STMC1
111. using the supplied versions of the GDB command script files As only the latest silicon revision is supported and new developments are continually being made please contact an ST Field Applications Engineer FAE to obtain the latest versions This document does not attempt to list all the user commands for all the targets Instead the command name format is described so the user can derive the specific name for their target Refer to the GDB command script files for further information on the commands Additional information can be provided using the GDB help command for example help mb448 displays the help for the mb448 command A GDB command script typically e performs JTAG operations that set up communication between the host and a specific core e creates GDB convenience variables for the addresses of memory mapped registers e configures the clock and system peripherals e configures the memory interfaces The name of the GDB connection command is passed as a parameter to the tool that is used to load the program sh4gdb sh4xrun sh4insight STWorkbench For example sh4xrun t stmc c mb448bypass e a out The GDB connection command is mb448bypass and is defined in the GDB command script file sh4targets mb448 cmd The bypass variant is used to configure the TAPmux settings for direct access to the ST40 core as the STB7109E Ref board MB448 is a STb7109 target that supports multicore debug The name of the STMC in this example is
112. valid bit in the variable x with the greatest numerical count x The remaining bits are set to 0 The following example shows how a TDI signal of 35 bits is represented 31 30 29 28 5 4 3 2 1 0 variable_0 1 1 1 1 1 1 1 1 1 1 variable 1 0 0 0 0 0 0 0 1 1 1 Using the jtag command The jtag command is typically used in a user command invoked by the inicommand configuration command see Table 7 Common STMC configuration commands on page 15 when connecting to a target that requires configuration of the target through the TAP However the use of the j tag command is not limited to being invoked through a inicommand user command and may be used at any point as long as GDB does not attempt to access the ST40 while the TAP is under manual control Table 106 lists the target connection commands that use a inicommand configuration command to configure the target TAP and the GDB command script file in which it is defined Table 106 TAP configuration commands Target command TAP configuration command Command file mb411bypass mb411stb7100bypass setup mb411stb7100bypass mb411stb7100 cmd mb411stmmx mb411stb7100stmmx_setup mb411stb7100stmmx mb411stb7109bypass mb411stb7109sebypass mb411stb7109seucbypass mb411stb7109se29bypass mb411stb7109bypass setup mb411stb7109 cmd mb411stb7109stmmx mb411stb7109sestmmx mb411stb7109seucstmmx mb411stb7109se29stmmx mb411stb7109st
113. y or a timeout occurs This is the default if autopoll is not supported by the ST Micro Connection Package nopo11 read the handshake status after every 32 bit transfer but only check if it signalled ready after the transfer of the entire payload up to 16KB nopollnocheck similar to nopo11 except that the handshake status is ignored This mode provides the best transfer rates but can only be used if reliability is assured udisyncdelay delay Where delay specifies the number of TCK clock ticks to delay before reading the handshake status delay can be any value between 0 and 5912 TCK clock ticks Use this option to tune the transfer rates or improve reliability of the udisync modes or both The default is 0 udisynclimit limit When using hardware acceleration udisync autopoll set a limit to the number of times the handshake is checked automatically before reporting an error 1imit can be any value between 0 and 256 where a limit of 0 specifies the maximum The default is 0 1 This mode is potentially unreliable if the CPU or peripheral bus frequency is not fast enough If this is the case then use udisync poll until udisync nopoll can safely be used Alternatively the udisyncdelay delay configuration command can be used to improve reliability 2 If using R1 6 0 or earlier of the ST Micro Connection Package then the maximum delay is 27 TCK clock cycles The configuration commands listed in Table 8 a
114. y whether the access size is checked when matching watchpoints This is the same as the use watchpoint access size user command 1 The STMC2 currently does not support breaktype pin Also the combination of an STMC1 with an ST MultiCore MUX is incapable of supporting breaktype pin as the ASEBRK signal is managed indirectly by the ST Microcore Mux through its JTAG interface which is not supported by the STMC1 software See Section 2 80 sh4commands cmd on page 70 The STMC1 console is accessed by connecting to the STMC1 over Telnet or by serial line and the log files of the STMC2 are accessed using the stmcconfig tool of the ST Micro Connection Package see Introduction on page 1 for information about the ST Micro Connection Package 8045872 Rev 9 17 87 Target configuration UM1250 Note 18 87 The configuration commands that only apply to the STMC2 when it is connected to an ST40 in a JTAG chain are listed in Table 8 Table 8 Configuration commands for STMC2 when connected using JTAG Command udisync mode Description Where mode is one of the following autopoll use hardware acceleration to check the handshake status automatically after every 32 bit transfer until it signals ready or the limit specified by udisynclimit is reached This is the default if supported by the ST Micro Connection Package poll check the handshake status after every 32 bit transfer and poll until it signals read

ST40 Micro Toolset GDB command scripts

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