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User Manual for the Mother Boards: 886LCD-M/Flex

1. HOST QLOOKPAIRS AK CPU BAK8OK CPU PAKE 100VHz Processor AK MP CPU8 CLK IMP CPU Pari 10002 Ref Banias _ AK MH BAK8OK MH PAKE 100VHz DREFSSCLK North Bridge DRAK Ff CMH ACP MH ICH POX eMe ave AK MHS po eMe ae OK 66M AP FR AGP GM AK 366 POX 14318M SATAQLOCKPAIR Rg QIC Op SATA amp OLKIOOP SATA Sauth Biche Ok 1014 Rg 106 PA LPC PAH SO 3M akora Me QK Pa ON 3M PA Sas 3M R PAX BOSRASH AK PNPA 48MOLK R PAH VR PAFGD ORE Spero Mans ak sora 1431M R LPAO Clock buffer Fd CLKGEN48M Cock Generator Pef CLKGEN ak CODEC pita Pef Codec continued C Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page CRT VGA Ref CRT COMA LPT_ DAC_DDCACLK DDR Memory M_CLK_DDRX amp M_CLK_DDRX D neii North Bridge Ref GMCH_ LVDS_CLKX amp LVDS_CLKX LVDS_DDCPCLK LVDS Interface Ref LVDS Real Time 25 MHz Clock f 32 768 Ref Y1EX ef Q1II South Bridge ef ICHS_ ETHERNET PXPCLKO controllers Ref ETH KBCLK MSE KBD Super UO MSCLK EE Ref LPCIO CLK SIO48 KBD MSE Clock buffer CLK ICH48S Ref CLKGEN48M CLK_ICH48 AC97 AC97_BITCLK CODEC ef Codec 20 of 78 C Kontron s86LCD M Family
2. 56 Ba Man MENU ei A Aa 56 8 3 Advanced Menu 57 8 3 1 Advanced settings CPU Configuration sess 57 8 3 2 Advanced settings IDE Configuration nennen 58 C Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 6 of 78 8 3 8 Advanced settings LAN Contouraton noc nnn conocio nn cnn nn n nr nnn cnn nn 60 8 3 4 Advanced settings Floppy Configuration narran eene 61 8 3 5 Advanced settings SuperlO Configuration seen 62 8 3 6 Advanced settings Hardware Health Configuration eeeeenenenn 63 8 3 7 Advanced settings ACPI Configuration 0 0 0 eee ceeeceeeeeeeeseeeeeeeeaeeeaeesaeeenaeseaeeeaeeseeeeeneeeaeeeaes 64 8 3 8 Advanced settings General ACPI Configuration sese 64 8 3 9 Advanced settings Advanced ACPI Configuration oooccinnnonccnononanonnonnonncnononancnno nono nonnncnn cnn 65 8 3 10 Advanced settings Remote Access Configuration ceeceeeeeeeeeeeeeeeeeeeeeseeesaeeeneeeneeeeeeeaes 65 8 3 11 Advanced settings USB Configuration ooconnncnnninnccnonononnnonnnonnnnnncnonnnno conocio nac nnn nn nono nn cana enn 66 8 3 12 Advanced settings USB Mass Storage Device Configuration eese 67 EN Leld etes 68 Bi Boot e 69 8 5
3. 886LCD M board 3x1GB LAN with Intel Mobile Celeron 600 400MHz OMB L2 Cache BGA 256MB DDR RAM 333MHz Power State CPU Speed Power consumption Full load 600Mhz ldle 600Mhz ACPI S1 600Mhz ACPI S3 600Mhz ACPI S4 600Mhz ACPI S5 600Mhz 3 6 4 Minimum recommended power supply specifications Note Minimum recommended power supply specifications do not include attachment of AUDIO Speakers AMP out USB AGP PCI devices If these devices are added to the board additional power requirements must be taken into account Refer to the Detailed Device Power consumption section Current I Peak Current 5VDC 40 0A 3ms 3 3VDC 14 0A 3ms 12VDC j 6 0A 4ms 5VSB 3 5A 14ms 12 VDC 1 0A 4ms 5VDC N A 3 6 5 Recommended Power Supply specifications Note Recommended power supply specifications includes attachment of COM Fan 4xAudio Speakers 4 80hm USB AGP PCI devices Current I Peak Current 18 0A 50 0A 3ms 3 3VDC 20 0A 3ms 12VDC 8 0A 4ms 5VSB 5 0A 14ms 12 VDC 1 0A 4ms 5VDC N A La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 19 of 78 3 7 886LCD M Clock Distribution
4. Inc Feature ETH1 Configuration Options Disabled Enabled With RPL PXE boot Description Select if you want to enable the LAN adapter or if you want to activate the RPL PXE boot rom ETH2 Configuration Disabled Enabled With RPL PXE boot Select if you want to enable the LAN adapter or if you want to activate the RPL PXE boot rom ETH3 Configuration Disabled Enabled With RPL PXE boot Select if you want to enable the LAN adapter or if you want to activate the RPL PXE boot rom C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 61 of 78 8 3 4 Advanced settings Floppy Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Floppy Configuration Select the type of floppy drive connected Floppy A Disabled to the system Floppy B Disabled lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Disabled Select Floppy device installed in the system using the 360KB 1 2MB LPT gt Floppy cable 720KB 1 44MB 2 88MB Disabled Select Floppy device installed in the system using the 360KB 1 2MB LPT gt Floppy cable 720KB 1 44MB 2 88MB 6 Kontron ss6LcD M Family always a Jump ahead
5. V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Save Changes and Exit Ok Cancel Exit system setup after saving the changes Discard Changes and Exit Ok Cancel Exit system setup without saving any changes Discard Changes Ok Cancel Discards changes done so far to any of the setup questions Load Optimal Defaults Ok Cancel Load Optimal Default values for all the setup questions Load Failsafe Defaults Ok Cancel Load Failsafe Default values for all the setup questions Halt on invalid Time Date Enabled Disabled Shall the BIOS halt and wait for a keypress when the cmos is corrupted Secure CMOS Disabled Enabled Enable will store the current CMOS in the BIOS flash rom this will maintain the settings even if the battery is failing C Kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 76 of 78 8 10 AMI BIOS Beep Codes Boot Block Beep Codes Number of Beeps k Description Insert diskette in floppy drive A AMIBOOT ROM file not found in root directory of diskette in A Base Memory error Flash Programming successful Floppy read error Keyboard controller BAT command failed No Flash EPROM detected Floppy controller failure Boot Block BIOS checksum error 2 3 4 5 6 7 8 9 0 Flash Erase error 1 1 _ Flash Program error
6. KTD 00474 E Public User Manual Date 2005 05 24 Page 62 of 78 8 3 5 Advanced settings SuperlO Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Configure Win627THF Super IO Chipset Enable onboard Floppy Controller for use at OnBoard Floppy Controller Disabled parallel port Serial Portl Address 3F8 IR04 Serial Port2 Address 2F8 IR03 Serial Port2 Mode Normal Parallel Port Mode 378 Parallel Port Mode Normal Parallel Port IRQ IRQ7 ICH SIO Serial Portl Addresse Disabled ICH SIO Serial Port2 Addresse Disabled z Select Screen Select Item f change option Fl General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature OnBoard Floppy Controller Options Disabled Enabled Description Enable or disable the Floppy Controller Serial Porti Address Disabled 3F8 IRQ4 2F8 IRQ3 3E8 IRQ4 2E8 IRQ3 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE I O addresse and IRQ Serial Port2 Address Disabled 3F8 IRQ4 2F8 IRQ3 3E8 IRQ4 2E8 IRQ3 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE I O addresse and IRQ Serial Port2 Mode Normal IRDA ASK IR Select Mode for Serial Port2 Parallel Port Address Disabled 378 278 3BC Select the I O address for the LPT NOTE you cannot enable the floppy controller and parallel port at the same time Parallel Port Mode Normal Bi Directional EPP ECP
7. CLKIN Input Clock 66 MHz 3 3 V input clock from external buffer DVO Hub interface DVOBCLK DVOBCLK Differential DVO Clock Output These pins provide a differential pair reference clock that can run up to 165 MHz DVOBCLK corresponds to the primary clock out DVOBCLK corresponds to the primary complementary clock out DVOBCLK and DVOBCLK should be left as NC Not Connected if the DVO B port is not implemented DVOCCLK DVOCCLK Differential DVO Clock Output These pins provide a differential pair reference clock that can run up to 165 MHz DVOCCLK corresponds to the primary clock out DVOCCLK corresponds to the primary complementary clock out DVOCCLK and DVOCCLK should be left as NC Not Connected if the DVO C port is not implemented DVOBCCLKINT DVOBC Pixel Clock Input Interrupt This signal may be selected as the reference input to either dot clock PLL DPLL or may be configured as an interrupt input A TV out device can provide the clock reference The maximum input frequency for this signal is 85 MHz DVOBC Pixel Clock Input When selected as the dot clock PLL DPLL reference input this clock reference input supports SSC clocking for DVO LVDS devices DVOBC Interrupt When configured as an interrupt input this interrupt can support either DVOB or DVOC DVOBCCLKINT needs to be pulled down if the signal is NOT used Display Power Management Signaling This signal is used only in mobile systems
8. lt Select Screen Select Item Enter Go to Sub Screen Fl General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Removable Devices 1st No Yes Should removable USB devices get first boot priority when inserted 8 5 1 Boot Boot Settings Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Boot Settings Configure Settings during System Boot Quick Boot Enabled Quiet Boot Disabled Bootup Num Lock On PS 2 Mouse Support Auto Halt on All But Keyboard Hit DEL Message Display Enabled Interrupt 19 Capture Disabled lt Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual 70 of 78 Feature Quick Boot Options Enabled Disabled Date 2005 05 24 Page Description Allows BIOS to skip certain test while booting Quiet Boot Disabled Enabled Enabled amp Maintain Shows boot logo instead of POST screen Bootup Num Lock Off On Select Power on state for numlock PS 2 Mouse Support Disabled Enabled Auto Select support for PS 2 Mouse Halt on Disabled All But Keyboard Wait for F1 key to
9. Right SLEEVE GND Line in Left Line in Right GND Note 1 Signals are shorted to GND internally in the connector when jack plug not inserted Note 2 Microphone is not supported on Engineering board samples 4 11 2 CD ROM Audio input CDROM CD ROM audio input may be connected to this connector It may also be used as a secondary line in signal Moli U D maa F CD 1G ND IA SS MEN CD_Right IA Signal Description CD Left Left and right CD audio input lines or secondary Line in CD Right CD GND Analogue GND for Left and Right CD This analogue GND is not shorted to the general digital GND on the board La Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 44 of 78 4 11 3 AUDIO Header AUDIO HEAD Pull loh loh Pull AMP LFE OUT AMP CEN OUT AAGND SPKR_OUT_L AAGND SPKR_OUT_R AAGND SURR OUT L AAGND SURR OUT R VIDEO L AAGND VIDEO R F FRONT MIC1 AAGND AAGND F FRONT MIC2 F AUX IN L AAGND F MONO OUT F AUX IN R GND AAGND F SPDIF OUT F SPDIF IN GND ma Low Frequency Effect Out channel AMP LFE OUT On 886LCD M ATX and M Flex signal is amplified to 3W On 886LCD M mITX signal is un amplified Center Out channel AMP CEN OUT On 886LCD
10. Note Special remarks concerning the signal The abbreviation TBD is used for specifications which are not available yet or which are not sufficiently specified by the component vendors La Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual 4 1 Connector layout 4 1 1 886LCD M Flex FEATURE BU KBDMSE FAN PROC Date 2005 05 24 Page 22 of 78 DDR1 DDRO Clr CMOS AGP DVO AUDIO HEADER MIC LINE OUT LINE IN ETHER1 USBO USB2 La Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 23 of 78 4 1 2 886LCD M ATX IDE_S DDR1 DDRO LPC IDE_P Clr CMOS AGP DVO PCI SLOT 1 AUDIO HEADER LINE IN ETHER2 LINE OUT ETHER3 MIC ETHER1 USBO USB2 C Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 24 of 78 4 1 3 886LCD M mITX CF backside of 886LCD M mITX CF backside of 886LCD M mITX of Ge M mITX FRONTPNL ives FEATURE IDE S2 SATAO Clr CMOS FAN SYS j SATA AGP DVO KBDMSE AUDIO CDROM ESS ETHER2 ETHER3 ETHER1 USBO LINE IN USB2 LINE OUT MIC Es Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 25 of 78 Power Connector ATXPWR The 886LCD M Flex 886
11. P ATA2 Cable Detection Force Disable 40Pin 80Pin Force the board to operate as if a 40Pin ATA cable or 80Pin ATA cable is installed on the Primary channel Hard Disk Write Protect Disable Enabled Enable write protection on HDDs only works when it is accessed through the BIOS IDE Detect Time Out Sec 0 5 10 15 20 25 30 35 Select the time out value when the BIOS is detecting ATA ATAPI Devices Advanced Primary IDE Master Select the type of devices connected to Device Hard Disk the system Vendor ST340014A Size 40 0GB LBA Mode Supported Block Mode 16Sectors PIO Mode 4 Async DMA MultiWord DMA 2 Ultra DMA Ultra DMA 5 S M A R T Supported Type Auto lt Select Screen LBA Large Mode Auto Select Item Block Multi Sector Transfer Auto Change Option PIO Mode Auto F1 General Help DMA Mode Auto F10 Save and Exit S M A R T Auto ESC Exit 32Bit Data Transfer Auto V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Type Not Installed Auto CDROM Select the type of device installed ARMD LBA Large Mode Disabled Auto Enabling LBA causes Logical Block Addressing to be used in place of Cylinders Heads and Sectors Block Multi Sector Transfer Disabled Auto Select if the device should run in Block mode PIO Mode Auto 0 1 2 3 4 Selects the method for transferring the data between the hard d
12. 1 Boot Boot Settings Configuration oooonnnccnnnnnnnnononoononancnnnnnon cinco nono nnnn nan eene nennen nennen 69 8 6 Security MON M 70 8 7 Chipset Men nds 71 8 7 1 Advanced Chipset Settings Intel Montara GML NorthBridge Configuration mma 72 8 7 2 Advanced Chipset Settings SouthBridge Configuration eeeseeeeeeeeeeeeeeeeeeneeeeeeeeteaes 73 8 8 Power Men iis aaa ANAN iaa 74 BG EMMA NAA vacax sand stops T 75 8 10 AMI BIOS Beep Code cisco a ia GANG 76 09 SETUP 77 78 C Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 70f 78 1 Introduction This manual describes the 886LCD M Flex 886LCD M ATX and 886LCD M mITX boards made by KONTRON Technology A S The boards will also be denoted 886LCD family if no differentiation is required All boards are to be used with the Intel Pentium M 4 Intel Celeron M Processors Use of this manual implies a basic knowledge of PC AT hard and software This manual is focused on describing the 886 Board s special features and is not intended to be a standard PC AT textbook New users are recommended to study the short installation procedure stated in chapter 3 before switching on the power All configuration and setup of the CPU board is either done automatically or by the user in the CMOS setup menus Except
13. A V1 5S X N A N A V2 5 Xx X N A V1 25S X N A N A V5 DUAL X X N A V3 3 DUAL x X N A V5 ALWAYS Xx X N A V3 3ALWAYS X X N A V1 5ALWAYS Xx X N A V_RTC x D x USB V5_ DUAL connectors Ref USB_ETH FRONTPNL V3 3S AC97 Codec V5 DUAL KBD MSE Ref Ref Codec KBD_MSE VCC12 Geer 4V5S LPT port Ref Ref CRT_COMA_L U1A1 U1A2 PT 4V3 3S BIOS Flash v55 COM drivers VCC12 Ref VCC 12 Ref FWH COMXDRV y Date 2005 05 24 Page VCC_ CORE VCCP V1 8S VCCP V1 2S V1 5S V2 5 xV3 3S V5S V3 3S V1 5S VCCP V_RTC V5_ ALWAYS V3 3_ ALWAYS V1 5_ ALWAYS V3 3 DUAL V2 5 V1 25S V3 3S V1 5S V3 3S V5S VCC12 V3 3 ALWAYS V3 3S V5S VCC12 VCC 12 V3 3_ALWAYS V3 3 DUAL V3 3S Processor Ref BANIAS_ North Bridge Ref GMCH_ South Bridge Ref ICHS_ DDR Memory Ref DDRX AGP Ref AGP PCI slots Ref PCIX Ethernet Controllers Ref ETH1 Ethernet Controllers Ref ETH2 ETH3 16 of 78 C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 17 of 78 3 6 Power Consumption This section lists a summary of the power consumption of the 886LCD M Boards For additional details please refer to the Power Supply Characteristics document available from Kontron Technology The idle full power
14. Ca Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 10f 78 User Manual for the Mother Boards 886LCD M ATX prt 886LCD M Flex a e C Kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 2 of 78 Document revision history Revision Date May 24 2005 PJA MLA Major revision BIOS information added Dec 20 2004 PJA 886LCD M ATX information added Dec 13 2004 PJA 886LCD M mITX information added Sept 27 2004 MLA Many correction and added information but still preliminary June 14 2004 PJA First preliminary manual version Copyright Notice Copyright O 2005 KONTRON Technology A S ALL RIGHTS RESERVED No part of this document may be reproduced or transmitted in any form or by any means electronically or mechanically for any purpose without the express written permission of KONTRON Technology A S Trademark Acknowledgement Brand and product names are trademarks or registered trademarks of their respective owners Disclaimer KONTRON Technology A S reserves the right to make changes without notice to any product including circuits and or software described or contained in this manual in order to improve design and or performance Specifications listed in this manual are subject to change without notice KONTRON Technology assumes no responsibility or liabil
15. E Public User Manual Date 2005 05 24 Page 57 of 78 8 3 Advanced Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced Settings Configure CPU Warning Setting wrong values in below sections May cause system to malfunction gt CPU Configuration gt IDE Configuration gt LAN Configuration gt Floppy Configuration gt SuperIO Configuration gt Hardware Health Configuration gt Voltage Monitor lt Select Screen gt ACPI Configuration Select Item gt Remote Access Configuration Enter Go to Sub Screen gt USB Configuration F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc 8 3 1 Advanced settings CPU Configuration Advanced Configure advanced CPU settings Depending on AC or Battery powered CPU speed will change Manufacturer Intel based on the Brand String Intel R Pentium R M processor 1500M selections Frequency 600MHz FSB Speed 400MHz Cache L1 32 KB Cache L2 1024 KB Intel R SpeedStep tm tech Maximum Speed Select Screen Select Item Change Option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Eens CTO Intel R SpeedStep tm tech Maximum Speed Select the operation mode of the CPU To Minimum Speed ensure full performance of the CPU use the Automatic Max
16. E mm pe Cow TERT I Ci 0K TBD IO o AE ee e CND HDCSB 32 IORB 2 1 _ UE 42 Wa 44 CA HK GN Note 1 Pin is longer than average length of the other pins Note 2 Pin is shorter than average length of the other pins Es Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 37 of 78 4 6 Serial ATA harddisk interface Two serial ATA harddisk controllers are available on the board a primary controller SATAO and a secondary controller SATAB 4 6 1 SATA Hard Disk Connector SATAO SATA1 SATAO Pull loh lol U D Ea KA RN GND aaa a SATAO TX PME lama E SATAO RX GND The signals used for the primary Serial ATA harddisk interface are the following anal Joem O SATAO RX SATAO TX Host receiver differential signal pair FAA All of the above signals are compliant to 4 SATA1 Pull loh lol U D En NN RN os amm HIS me a E GND SATA1 RX ES SATATRX Ui an ao 7 The signals used for the secondary Serial ATA harddisk interface are the following Signa Description O SATA1 RX Host transmitter differential signal pair SATA1 RX SATA1 TX Host receiver differential signal pair SATA1 TX All of the above signals are compliant to 4 La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Public User Man
17. Jumper installed Pin numbers Jumper normal position Jumper in Clear CMOS position To clear all CMOS settings including Password protection move the CMOS CLR jumper with or without power on the system for approximately 1 minute Alternatively if no jumper is available turn off power and remove the battery for 1 minute but be careful to orientate the battery corretly when reinserted 4 14 LPC connector unsupported Pull Pull U D loh lol pe Signal Signal Type loh lol U D LPCCLK GND HE LPC ADO LPC FRAME e LPCAD 8 O Saas ES 5 INT SERIQ LPC DRO 1 9 10 6 KTD 00474 E Kontron ss6LcD M Family always a Jump ahead Public User Manual Date 2005 05 24 Page 46 of 78 4 15 Front Panel connector FRONTPNL Pull U D loh lol pe Signal Pull Signal loh lol U D SPKR_OUT_L 23 24 SPKR OUT R Signal Description USB13 5V 5V supply for the USB devices on USB Port 1 and 3 is on board fused with a 1 5A reset able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity USB1 USB1 USB3 USB3 Universal Serial Bus Port 1 Differentials Bus Data Address Command Bus Universal Serial Bus Port 3 Differentials Bus Data Address Command Bus HD_LED Hard Disk Activity LED SUS_LED Suspend Mode LED PWRBTN_IN Power Button In Toggle this signal low to star
18. O tc cH Ge E nO o ZU e x 0 ATA100 x go SATA150 W W Wrod 4M B amplifier enplifier WE Itera TH LAS GES x Extemal USB OM OM OH LPT KD ME pod m 8 m Heeder Header Header 6 Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 15 of 78 3 5 886LCD M Power Distribution 4 Power State Map ATX PSU Battery or V3 3 ALWAY Ref ATXPWR s Se Ref V5_ALWAYS V5S V3 3S VCC12 VCC 12 BTIIl VCC 12 VCC12 LDO Regulator V1 8S Ref U3SS DC DC regulator VCC CORE Ref COREREG V1 2S DC DC E LDO regulator regulator VCCP Ref Ref V1 5S VCCPAMP VCCPREG DC DC V2 5 regulator Ref V1 25S ACPICTRL CH V5 DUAL Ref 15D 7SD ITO V3 3 DUAL Ref 15D 7SD LDO Regulator V3 3ALWAYS Ref U1SS LDO Regulator Ref U2SS V1 5ALWAYS continued 6 kontron ss6LcD M Famil always a Jump ahead KTD 00474 E Public User Manual so S3 S5 V5S X N A N A V3 3S X N A N A VCC12 X N A N A VCC 12 X N A N A V1 8S X N A N A 4VCC CORE X N A N A VCCP X N A N A V1 2S X N A N
19. REQ and GNT are tri state signals due to power sequencing requirements when 3 3V or 5 0V only add in boards are used with add in boards that use a universal UO buffer ERROR REPORTING PINS The error reporting pins are required by all devices and maybe asserted when enabled Parity Error is only for the reporting of data parity errors during all PCI transactions except a Special Cycle The PERR pin is sustained tri state and must be driven active by the agent receiving data two clocks following the data when a data parity error is detected The minimum duration of PERR is one clock for each data phase that a data parity error is detected If sequential data phases each have a data parity error the PERR signal will be asserted for more than a single clock PERR must be driven high for one clock before being tri stated as with all sustained tri state signals There are no special conditions when a data parity error may be lost or when reporting of an error may be delayed An agent cannot report a PERR until it has claimed the access by asserting DEVSEL for a target and completed a data phase or is the master of the current transaction System Error is for reporting address parity errors data parity errors on the Special Cycle command or any other system error where the result will be catastrophic If an agent does not want a non maskable interrupt NMI to be generated a different reporting mechanism is required SERR is pure open drain and is
20. Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Primary Video Device Internal External PCI Select witch graphics controller to use as the External AGP Auto primary boot device Graphics Mode Select Disabled 1MB 4MB Select the amount of system memory used by 8MB 16MB 32MB the internal graphics device IGD Device 2 Function 1 Disabled Enabled Setup the multimonitor function Boot Type VBIOS Default CRT Setup type of boot screen LFP CRT LFP EFP TV CRT EFP CRT TV EFP EFP2 EFP TV Backlight Signal Inversion Disabled Enabled Select the signal polarity LCDVCC Voltage 3 3V 5V Setup the LCD Voltage LVDS Panels Chose the connected LVDS panel DVO DVO Chip Select the DVO connection C Kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 73 of 78 8 7 2 Advanced Chipset Settings SouthBridge Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Enable Disable the ICH4 IOAPIC function IOAPIC Enabled Extended IOAPIC Enabled OnBoard AC 97 Audio Enabled OnBoard Amplifier Enabled lt Select Screen Select Item Enter Go to Sub Screen Fl General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Mega
21. That is the GMCH can finish returning the data for the request currently being serviced RBF is only sampled at the beginning of a cycle If the AGP master is always ready to accept return read data then it is not required to implement this signal During FRAME Operation This signal is not used during AGP FRAME operation Write Buffer Full indicates if the master is ready to accept Fast Write data from the GMCH When WBF is asserted the GMCH is not allowed to drive Fast Write data to the AGP master WBEF is only sampled at the beginning of a cycle If the AGP master is always ready to accept fast write data then it is not required to implement this signal During FRAME Operation This signal is not used during AGP FRAME operation AGP Status ST 2 0 Status Provides information from the arbiter to an AGP Master on what it may do ST 2 0 only have meaning to the master when its GNT is asserted When GNT is deasserted these signals have no meaning and must be ignored ST 2 0 Meaning 000 Previously requested low priority read data is being returned to the master 001 Previously requested high priority read data is being returned to the master 010 The master is to provide low priority write data for a previously queued write command 011 The master is to provide high priority write data for a previously queued write command 100 Reserved 101 Reserved 110 Reserved 111 The master has been given permission to start a bus transac
22. _ IW AMIBOOT ROM file size error Co POST BIOS B Number of Beeps BIOS ROM image mismatch file layout does not match image present in flash device eep Codes Description Memory refresh timer error Parity error in base memory first 64KB block Base memory read write test error Motherboard timer not operational Processor error 8042 Gate A20 test error cannot switch to protected mode General exception error processor exception interrupt error Display memory error system video adapter Olo N D O B D N AMIBIOS ROM checksum error CMOS shutdown register read write error a O Cache memory test failed Troubleshooting POST BIOS Beep Codes Number of Beeps Troubleshooting Action Reseat the memory or replace with known good modules Fatal error indicating a serious problem with the system Consult your system manufacturer Before declaring the motherboard beyond all hope eliminate the possibility of interference by a malfunctioning add in card Remove all expansion cards except the video adapter If beep codes are generated when all other expansion cards are absent consult your system manufacturer s technical support If beep codes are not generated when all other expansion cards are absent one of the add in cards is causing the malfunction Insert the cards back into the system one at a time until the problem happens again
23. always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 21 of 78 4 Connector Definitions The following sections provide pin definitions and detailed description of all on board connectors The connector definitions follow the following notation Column Description name Shows the pin numbers in the connector The graphical layout of the connector definition tables is made similar to the physical connectors The mnemonic name of the signal at the current pin The notation XX states that the signal XX is active low Al Analog Input Analog Output Input TTL compatible if nothing else stated Input Output TTL compatible if nothing else stated Bi directional tristate IO pin Schmitt trigger input TTL compatible Input open collector Output TTL compatible Pin not connected Output TTL compatible Output open collector or open drain TTL compatible Output with tri state capability TTL compatible LVDS Low Voltage Differential Signal PWR Power supply or ground reference pins loh Typical current in mA flowing out of an output pin through a grounded load while the output voltage is gt 2 4 V DC if nothing else stated lol Typical current in mA flowing into an output pin from a VCC connected load while the output voltage is lt 0 4 V DC if nothing else stated Pull U D On board pull up or pull down resistors on input pins or open collector output pins
24. asserted indicates that a FRAME based AGP target device has decoded its address as the target of the current access The GMCH asserts G_DEVSEL based on the DDR SDRAM address range being accessed by a PCI initiator As an input G_DEVSEL indicates whether the AGP master has recognized a PCI cycle to it REQ G REGQ Request During SBA Operation This signal is not used during SBA operation During PIPE and FRAME Operation G REQ when asserted indicates that the AGP master is requesting use of the AGP interface to run a FRAME or PIPE based operation GNT G GNT Grant During SBA PIPE and FRAME Operation G_GNT along with the information on the ST 2 0 signals status bus indicates how the AGP interface will be used next Refer to the AGP Interface Specification Revision 2 0 for further explanation of the ST 2 0 values and their meanings AD 31 0 G AD 31 0 Address Data Bus During PIPE and FRAME Operation The G AD 31 0 signals are used to transfer both address and data information on the AGP interface During SBA Operation The G AD 31 0 signals are used to transfer data on the AGP interface continued 6 KTD 00474 E CBE 3 0 Kontron 886LCD M Family always a Jump ahead Public User Manual Date 2005 05 24 Page 32 of 78 Command Byte Enable During FRAME Operation During the address phase of a transaction the G CBE 3 0 signals define the bus command During the
25. be used for connection of up till two secondary IDE drive s but only if no drive s is installed via IDE S2 socket The IDE S is not available on the 886LCD M mITX Ee up TBD RESETB obo AA OK DB7 DB6 OBS WEE TBD DB5 DB4 DB9 DB10 TBD TBD DB3 3 IORDYB DB11 DB12 TBD DB13 IO TBD DBi4 lO TBD ena DDACKB HDIRQB DAB1 HDACTB NG CBLIDB DAB2 BE HDCSB1 O TBD COND ppa Es Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 35 of 78 4 5 3 IDE Hard Disk Connector IDE_S2 This connector 44 pin 2 0 mm pitch can be used for connection of up till two secondary IDE drives but only if no drive s is installed via IDE S socket GNO A DBS MI Ga aa DB9 MOMIA o DBiO WEE NEE DB11 IM 0612 IM DB13 lO TED DB15 WED EE ao ao L GND PWR GND ssa aaa aaa GND NILUM GND VCC Es Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 36 of 78 4 5 4 CF Connector CF This connector is mounted on the backside of the 886L CD M mITX only If a Compact Flash Disk is used then no IDE drive can be connected to the IDE S2 connector The socket support DMA UDMA modules Pull Pull U D loh lol ruo EN nal
26. data phase the G CBE 3 0 signals are used as byte enables The byte enables determine which byte lanes carry meaningful data The commands issued on the G_CBE signals during FRAME based AGP transactions are the same G CBE command described in the PCI 2 2 specification During PIPE Operation When an address is enqueued using PIPE the C BE signals carry command information The command encoding used during PIPE based AGP is different than the command encoding used during FRAME based AGP cycles or standard PCI cycles on a PCI bus During SBA Operation These signals are not used during SBA operation Parity During FRAME Operation G PAR is driven by the GMCH when it acts as a FRAME based AGP initiator during address and data phases for a write cycle and during the address phase for a read cycle G PAR is driven by the GMCH when it acts as a FRAMEZ based AGP target during each data phase of a FRAME based AGP memory read cycle Even parity is generated across G AD 31 0 and G CBE 3 0 During SBA and PIPE Operation This signal is not used during SBA and PIPE operation Hub Interface signals HL 10 0 Packet Data Data signals used for HI read and write operations HLSTB Packet Strobe One of two differential strobe signals used to transmit or receive packet data over HI HLSTB Clocks Packet Strobe Complement One of two differential strobe signals used to transmit or receive packet data over HI
27. is asserted and read data is stable and valid when TRDY is asserted Data is transferred during those clocks where both IRDY and TRDY are asserted Bus Command and Byte Enables are multiplexed on the same PCI pins During the address phase of a transaction C BE 3 0 define the bus command During the data phase C BE 3 0 are used as Byte Enables The Byte Enables are valid for the entire data phase and determine which byte lanes carry meaningful data C BE 0 applies to byte O Isb and C BE 3 applies to byte 3 msb Parity is even parity across AD 31 00 and C BE 3 0 Parity generation is required by all PCI agents PAR is stable and valid one clock after the address phase For data phases PAR is stable and valid one clock after either IRDY is asserted on a write transaction or TRDY is asserted on a read transaction Once PAR is valid it remains valid until one clock after the completion of the current data phase PAR has the same timing as AD 31 00 but it is delayed by one clock The master drives PAR for address and write data phases the target drives PAR for read data phases Cycle Frame is driven by the current master to indicate the beginning and duration of an access FRAME is asserted to indicate a bus transaction is beginning While FRAME is asserted data transfers continue When FRAME is deasserted the transaction is in the final data phase or has completed FRAME IRDY Initiator Ready indicates the initi
28. is used to detect the type of attached cable 80 wire cable when low input and 40 wire cable when 5V via 10Kohm pull up resistor DDREQ Disk DMA Request might be driven by the IDE hard disk to request bus master access to the PCI bus The signal is used in conjunction with the PCI bus master IDE function and is not associated with any PC AT bus compatible DMA channel DDACK Disk DMA Acknowledge Active low signal grants IDE bus master access to the PCI bus HDACT Signal from hard disk indicating hard disk activity The signal level depends on the hard disk type normally active low The signals from primary and secondary controller are routed together through diodes and passed to the connector FEATURE All of the above signals are compliant to 4 is A for primary and B for secondary controller The pinout of the connectors are defined in the following sections Kontron ss6LcD M Family La always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 34 of 78 4 5 1 IDE Hard Disk Connector IDE_P This connector can be used for connection of two primary IDE drives CES U D BEE 0K TBD c IA DAs II S Dao MON es Daro lo reo Da Ho piso mora QO mea QC DA4 gement DA a E cv II eno It GND PWR CND EE cuo Bb gt IORDYA DDACKA HDIRQA SE HDACTA ND M 4 5 2 IDE Hard Disk Connector IDE S This connector can
29. speed Flow Control None Hardware Software Select Flow Control for serial port Redirection After BIOS POST Always Disabled Boot Loader How long shall the BIOS send the picture over the serial port Terminal Type ANSI VT100 VT UTF8 Select the target terminal type VT UTF8 Combo Key Support Disabled Enabled Setup VT UTF8 Combo Key 8 3 11 Advanced settings USB Configuration ain Advanced PCIPnP Boot Security Chipset Power Exit USB Configuration Enables USB host controllers odule Version 2 24 0 7 4 USB Devices Enabled 1 Drive USB Function All USB Ports Legacy USB Support Enabled USB 2 0 Controller Enabled USB 2 0 Controller Mode HiSpeed 5 USB Mass Storage Device Configuration ge Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature USB Function Legacy USB Support Options Disabled 2 USB Ports All USB Ports Disabled Enabled Auto Description Select the USB ports you want to enabled Support for legacy USB Keyboard USB 2 0 Controller Enabled Disabled Setup the USB 2 controller 480Mbps USB 2 0 Controller Mode FullSpeed HiSpeed Configures the USB 2 0 controller in HiSpeed 480Mbps or FullSpeed 12Mbps Setup which comport that should be used for C Kontron s86LC
30. 00001N HL54131 87831 2620 87331 2620 HL20121 70246 2421 23024 2200001N HL54151 87831 3020 87331 3020 LPC Tekcon 1136 A058 10S Foxconn HC11051 IDE P Foxconn IDE S 51 of 78 C Kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 52 of 78 6 System Ressources 6 1 Memory map Address range hex i Description 00000000 0007FFFF 512 Kbytes Conventional memory 00080000 0009FBFF 127 Kbyte Extended conventional memory 0009FCO00 0009FFFF 1 Kbyte Extended BIOS data 000A0000 000AFFFF 64 Kbytes 885GME VGA Controller Video memory and BIOS 000B0000 OOOBFFFF 64 Kbytes 885GME VGA Controller Video memory and BIOS 000C0000 000CC5FF 49 Kbytes 885GME VGA Controller Video memory and BIOS 000CC800 000CD7FF 4 Kbytes Realtek 8169 Ethernet Controller D0000000 DFFFFFFF OxFFFFFFF 885GME Processor l O Controller E8000000 EFFFFFFF Ox7FFFFFF 885GME VGA Controller F0000000 F7FFFFFF Ox7FFFFFF 885GME VGA Controller FF7FF400 FF7FF4FF OxFF Realtek 8169 Ethernet Controller FF7FF800 FF7FF8FF OxFF Realtek 8169 Ethernet Controller FF7FFCOO FF7FFCFF OxFF Realtek 8169 Ethernet Controller FF980000 FF9FFFFF Ox7FFFF 885GME VGA Controller FFA7B000 FFA7BOOF OxF PCI System Peripheral FFA7B400 FFA7B7FF Ox3FF USB Controller FFA7B800 FFA7B8FF OxFF Realtek AC97 Audio FFA7BCOO FFA7BDFF 0x1FF Realtek AC97 Audio FFA7FC00 FFAFFFFF 0x803FF Ultra SATA Controller FFA80000 FFAFFFFF Ox7
31. 400 MHz 2MB L2 745 Dothan 90nm j 400 MHz 2MB L2 735 Dothan 90nm 400 MHz 2MB L2 725 Dothan 90nm F 400 MHz 2MB L2 RH80535GC0251M Banias 130nm 400 MHz 1MB L2 715 Dothan 90nm 400 MHz 2MB L2 705 Dothan 130nm F 400 MHz 1MB L2 Intel Celeron M 370 Dothan 90nm 400 MHz 1MB L2 360 Dothan 90nm 400 MHz 1MB L2 350 Dothan 90nm 400 MHz 1MB L2 340 Banias 130nm j 400 MHz 512MB L2 Banias 130nm 400 MHz 512MB L2 Banias 130nm 400 MHz 512KB L2 The above list contains PGA versions only but also BGA versions are supported if required please ask Kontron for more information 3 3 System Memory support The 886LCD M Flex and 886LCD M ATX boards have two onboard DIMM sockets 886LCD M mITX equipped with one DIMM socket only and support the following memory features e 2 5V only 184 pin DDR SDRAM DIMMs with gold plated contacts e Supports up to two one on mITX single sided and or double sided DIMMs four rows populated with unbuffered PC1600 PC2100 PC2700 DDR SDRAM with or without ECC depends on Intel e Supports 64 Mbit 128 Mbit 256 Mbit and 512 Mbit technologies for x8 and x16 width devices e Maximum of 2 Gbytes system 1GB on mITX memory by using 512 Mbit technology devices double sided e Supports 200 MHz 266 MHz and 333 MHz DDR devices e 64 bit data interface 72 bit with ECC depends on Intel The installed DDR SDRAM should support the Serial Presence
32. 48 04 U09 1euJeuj3 Pueoquo Aq pasn aq e 49 04JU09 Jeu preoquo Aq pesn aq Ae 191011409 ger pigoquo Aq pasn aq AW wa sAs punos pJeoquo 104 pasn eq e Jejo1uoo ysIppey Ayepuooes Aq pasn aq e 191011409 xsippueu seuwud Aq pesn aq ARN yoddns Jossago1d 09 pueoquo JO pasn yoddns 3 S d pueoquo Aq pesn aq Ae wuejy Y10 9 aw eeu pigoquo Aq Daer 19 0140 xsip Addoj4 pueoquo Aq pasn aq AW Hog REIS preoquo Aq pesn aq AW J9 1011409 Y VS pigoquo Aq pasn aq Ae d Hog jeues pigoquo Aq pesn aq Ag 7 Log enas pueoquo Aq pesn eq ARN Jod val 8 HOd lenas pigoquo Aq pesn aq Ae V Hog lenas pigoquo Aq pasn aq Ae GLOUI 80u Buipeose9 Jo pas jdnuieju pueoghey pigoquo 1dnueiu 0 Jeu preoquo uoneAnoe euis YHOHDO pue s1o4e Aed wa sAs preoquo Notes PCI Interrupts IRQA IRQD can be shared These interrupt lines are managed by the PnP handler and are subject to change during system Availability of the shaded IRQs depends on the setting in the BIOS According to the PCI Standard initialisation 2 IRQ16 to IRQ26 are APIC interrupts 3 C Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 54 of 78 6 4 I O Map Address hex i Description Programmable interrupt controller System Timer Standard keyboard Syst
33. B drivers are not yet available Legacy USB support is used to access the BIOS Setup program and to install an operating system that supports USB By default Legacy USB support is set to Enabled Legacy USB support operates as follows 1 When you apply power to the computer legacy support is disabled 2 POST begins 3 Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and configure the BIOS Setup program and the maintenance menu 4 POST completes 5 The operating system loads While the operating system is loading USB keyboards and mice are recognized and may be used to configure the operating system Keyboards and mice are not recognized during this period if Legacy USB support was set to Disabled in the BIOS Setup program 6 After the operating system loads the USB drivers all legacy and non legacy USB devices are recognized by the operating system and Legacy USB support from the BIOS is no longer used To install an operating system that supports USB verify that Legacy USB support in the BIOS Setup program is set to Enabled and follow the operating system s installation instructions C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 56 of 78 8 BIOS Configuration Setup 8 4 Introduction The BIOS Setup is used to view and configure BIOS settings for the 886LCD M board The BIOS Setup is accessed by pressing the DEL key after t
34. D M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 67 of 78 8 3 12 Advanced settings USB Mass Storage Device Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit USB Mass Storage Device Configuration Enables USB host controllers USB Mass Storage Reset Delay 20 Sec Device 1 JetFlash TS256MJF2L Emulation Type Auto lt Select Screen Select Item f change option Fl General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description USB Mass Storage Reset Delay 10 Sec 20 Sec 30 Number of seconds the BIOS waits for the Sec 40 Sec USB device after start unit command Emulation Type Auto Floppy Forced Setup the emulation type for the USB device FDD Hard Disk CDROM Kontron ss6LcD M Family always a Jump ahead 6 KTD 00474 E Public User Manual Date 2005 05 24 Page 68 of 78 8 4 PCIPnP Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced PCI PnP Settings NO lets the BIOS configure all the Warning Setting wrong values in below sections devices in the system May cause system to malfunction YES lets the operating system Plug Play O S No configure Plug and PCI Latency Timer 64 Play PnP devices not Allocate IRQ to PCI VGA Yes required for boot if PCI IDE BusMaster Enabled your system
35. Detect SPD data structure This allows the BIOS to read and configure the memory controller for optimal performance If non SPD memory is used the BIOS will attempt to configure the memory settings but performance and reliability may be impacted La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 14 of 78 3 4 System overview The block diagram below shows the architecture and main components of the 886LCD boards The two key components on the board are the Intel 855GME and Intel 6300ESB ICH S Embedded Chipsets Components shown shaded are optional depending on board type 886LCD M Flex ATX or mITX and variants of the board Intel Processor M Banias amp Dahan T CR v 24bit 1x184pins 1x184pins DO lid RB DORKS AGP S65QVE Capt s Z VGA S AH a a ra pal mira Fd PO 222b 33V 10107 loo wm ROSS eave 22 22 22 22 22 22 GE we E Ge bt 22bit pn abit Pbit Pbit ce ce Sa amp CHS Mg Me Mg ME ME Mz AC97 K H mm 6 6 RLS 0 wr OIO
36. FFFF 885GME VGA Controller FFB00000 FFEFFFFF Ox3FFFFF Intel 82802 Firmware Hub Device FFF00000 FFFFFFFF 1 Mbyte Intel 82802 Firmware Hub Device 6 2 PCI devices Device Function Vendor ID Device ID IDSEL i Device Function 6300ESB Host bridge 6300ESB 1 0 Controller 6300ESB 1 0 Controller 6300ESB Pci to Pci bridge 6300ESB VGA controller 6300ESB Display controller 6300ESB Pci to Pci bridge 6300ESB USB 6300ESB USB 6300ESB Watchdog timer 6300ESB APIC 6300ESB USB 6300ESB Pci to Pci bridge 6300ESB ISA Bridge 6300ESB IDE Controller 6300ESB IDE Controller 6300ESB SMBus 6300ESB Audio S PCI slot 1 E PCI slot 2 PCI slot 3 PCI slot 4 RTL8110 Ethernet RTL8110 Ethernet RTL8110 Ethernet OMO0O N O O JNOIB OJO 2 OJO O O Ninjojojojojojojojojojojojojojojojojojojojojo o ojo N o Values are dynamically selected in BIOS Note All PCI slots for the 886LCD M boards supports PCI BUS Mastering always a Jump ahead La Kontron 856L CD M Family 53 of 78 Date 2005 05 24 Page Public User Manual KTD 00474 E Interrupt Usage 6 3 SOld eui ui suonoejes uo Duipuedep GOUI VOUI Se stoe Od uo giga 19 10 1409 SNGWS pigoquo Aq pesn aq Ae J9 01 U09 YODA pigoquo Aq pesn aq Ae Ja o1juo9 Jee pigoquo Aq pesn aq ARN Z
37. Frame During PIPE and SBA Operation Not used by AGP SBA and PIPE operations During Fast Write Operation Used to frame transactions as an output during Fast Writes During FRAME Operation G_FRAME is an output when the GMCH acts as an initiator on the AGP Interface G FRAMEE is asserted by the GMCH to indicate the beginning and duration of an access G FRAMEZ is an input when the GMCH acts as a FRAME based AGP target As a FRAME based AGP target the GMCH latches the C BE 3 0 and the AD 31 0 signals on the first clock edge on which GMCH samples FRAME active IRDY G_IRDY Initiator Ready During PIPE and SBA Operation Not used while enqueueing requests via AGP SBA and PIPE but used during the data phase of PIPE and SBA transactions During FRAME Operation G_IRDY is an output when GMCH acts as a FRAME based AGP initiator and an input when the GMCH acts as a FRAME based AGP target The assertion of G_IRDY indicates the current FRAME based AGP bus initiator s ability to complete the current data phase of the transaction During Fast Write Operation In Fast Write mode G_IRDY indicates that the AGP compliant master is ready to provide all write data for the current transaction Once G_IRDY is asserted for a write operation the master is not allowed to insert wait states The master is never allowed to insert a wait state during the initial data transfer 32 bytes of a write transaction However it may insert w
38. LCD M ATX and 886LCD M mITX is designed to be supplied from a standard ATX power supply Power Connector 886LCD M Flex 886LCD M ATX and 886LCD M mITX Pull PIN Pull Note U D loh lol pe Signal Signal pe loh lol U D MEE AAA 2V 10 20 sv pwR P_OK 18 5V PWR 7 7i GND PwR p Ca sv 6 16 GND PWR O eee GND GND RE BH s es o a CO PWR GND 3 i GND PWR Ea eo ee S SS ES Cang 3v3 EE EI Note 5V supply is not used onboard The requirements to the supply voltages are as follows also refer to ATX specification version 2 03 sapaw wm Wax Tones 12V 11 4V 12 6V 5 12V 13 2V 10 8V 10 Control signal description Signal Description Active high signal from the power supply indicating that the 5V and 3V3 supplies are within operating limits It is strongly recommended to use an ATX supply with the 886LCD M Flex 886LCD M ATX and 886LCD M mITX boards in order to implement the supervision of the 5V and 3V3 supplies These supplies are not supervised onboard the 886LCD M Flex 886LCD M ATX and 886LCD M mITX boards PS ON Active low open drain signal from the board to the power supply to turn on the power supply outputs Signal must be pulled high by the power supply Es Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 26 of 78 4 3 Keyboard and PS 2 mouse conn
39. M ATX and M Flex signal is amplified to 3W On 886LCD M mITX signal is un amplified SPKR OUT L Speaker Out Left and Right Channel Both signal are amplified to 3W SPKR OUT R SURR OUT L Lef Right ch SURR OUT R Surround Out Left and Right channe VIDEO L VIDEO R F FRONT MIC1 F FRONT MIC2 PAGING AUX Left and Right Channel input F AUX IN R cM d F MONO OUT Speaker Phone Output F SPDIF IN S PDIF Input F SPDIF OUT S PDIF Output AAGND Audio Analogue ground Not connected Dedicated MIC Input 1 2 for Frontpanel MIC C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 45 of 78 4 12 Fan connectors FAN PROC and FAN SYS The FAN PROC is used for connection of the active cooler for the CPU The FAN SYS can be used to power control and monitor a fan for chassis ventilation etc Pull pe loh lol U D od sense pr ma ell EE EE EAM Signal description Signal Description 12V 12V supply for fan can be turned on off or modulated PWM by the chipset A maximum of 800 mA can be supplied from this pin Tacho signal from the fan for supervision The signals shall be generated by an open collector transistor or similar On board is a pull up resistor 4K7 to 12V The signal has to be pulses typically 2 Hz per rotation 4 13 The Clear CMOS Jumper Clr CMOS The Clr CMOS Jumper is used to clear the CMOS content T CPU location T No
40. OVRCNT PWR 5V 12V TYPEDET si J IDO EE 3 3V aa aag ADD ID2 A A ADD_ D4 i Eet ADD ID6 a o PWR GND ieee VOX PR aa E DVOC Fld Stl DVOC D10 PR XJ 33V E 99s DVOC D6 GND k VOC ks td 1 5V ie DOC DS saa GND DVOC Hsync m ADD RS 41 5V M I2CCIk M I2CData p PWR 1 5V GPERR PWR GND O T U ch 9 9 lp DVOB Blank EEN DVOB FId S B53 DVOB D10 GND m prem DVOB D8 DVOB_D6 1 5V DVOB_Clk SS Ss DVOB_D4 Ep men DVOB_D2 o PP ADD ID3 SSS Sey ADD_RS ADD_ID5 pi ADD ID7 SS TESI RSVD EE LN ID 33V PWR DVOC D9 DVOC D7 DVOC CIk Ce se oe DVOC D5 1 5V DVOC D1 ec da DVOC_Blank um 41 5V M DVI Data M DDCData PME M DDCCIk 1 5V m H DVOB_D11 GND DVOB_D9 AE 1 5V DVOB CIk DVOB D5 H DVOB D1 gt AA aaa aaa DVOB Vsync VREFCG Baan aaa ID1 43 3V Xm Gan PA k RSVD GND DVOBC Intr DVOC D11 GN PWR DVOC_D3 EE DVOC_Vsync M DVI Ch ADD Detect HV DVOBC Clkint EP ll DVOB D7 d GND DVOB_D3 DVOB Hsync VREFGC The AGP buffers operate only in 1 5V mode not 3 3 V tolerant The AGP interface supports 1x 2x 4x AGP signaling and 2x 4x Fast Writes C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual D
41. Resume Disabled Enabled Allow RI Modem to wake from sleep states RTC Resume Enabled Disabled Let the board start up on a specific date and time RTC Alarm Date Every Day 1 31 Setup the date you want the board to start RTC Alarm Time HH MM SS Setup the time you want the board to start PS 2 Kbd Mouse 84 85 Disabled Enabled When disabled the board can wake from S1 Wake and S3 and when enabled it can also wake from S4 and S5 S3 S5 Keyboard Hotkey Any key Space Enter Setup the key that can wake up the board Sleep button AC Power Loss Restart Off On Previous State Select whether or not to restart the system after AC power loss Off keeps the power off until the power button is pressed On restores power to the computer Previous State restores the previous power state before power loss occurred C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 75 of 78 8 9 Exit Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Exit Options Exit system setup after saving the changes Save Changes and Exit Discard Changes and Exit F10 Key can be used Discard Changes for this operation Load Optimal Defaults Load Failsafe Defaults Halt on invalid Time Date Enabled Secure CMOS Disabled lt Select Screen B Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit
42. Select the mode that the parallel port will operate in EPP Version 1 9 1 7 Setup with version of EPP you want to run on the parallel port ECP Mode DMA Channel DMAO DMA1 DMA3 Select a DMA channel Parallel Port IRQ IRQ5 IRQ7 Select a IRQ ICH SIO Serial Port1 Address Disabled 3F8 IRQ4 2F8 IRQ3 3E8 IRQ4 2E8 IRQ3 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE I O addresse and IRQ ICH SIO Serial Port2 Address Disabled 3F8 IRQ4 2F8 IRQ3 3E8 IRQ4 2E8 IRQ3 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE I O addresse and IRQ C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 63 of 78 8 3 6 Advanced settings Hardware Health Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Hardware Health Event Monitoring Enable Hardware Health onitoring Device System Temperatur 1379C 989E CPU Temperature 43 C 109 F External Temperature Sensor N A Fanl Speed Fail Fan Cruise Control Disabled Fan2 Speed 2537 RPM Fan Cruise Control Thermal Fan Setting 45 C 113 F Fan3 Speed 22164 Fan Cruise Control Speed lt Select Screen Fan Setting 2177 RPM Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Fan Cruise Control Disabled Th
43. This will reveal the malfunctioning card If the system video adapter is an add in card replace or reseat the video adapter If the video adapter is an integrated part of the system board the board may be faulty C Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 77 of 78 9 OS setup Use the Setup exe files for all relevant drivers The drivers can be found on the 886LCD M Driver CD or they can be downloaded from the homepage http www kontron dk extsupport webswdb Note When installing using ADD cards like ADD DVI or ADD LVDS it s possible that the OS start up without any connected display s active If you are able to pass the Log On to Windows etc by entering the password etc without actually see the picture on the dispaly and If the Hot Keys have not been disabled in the Extreme Graphic driver then the following key combinations you can select a connected display lt CRT gt lt ALT gt lt F1 gt enables the CRT on board lt CRT gt lt ALT gt lt F3 gt enables the LVDS on board lt CRT gt lt ALT gt lt F4 gt enables display conneted to the ADD card C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 78 of 78 10 Warranty KONTRON Technology warrants its products to be free from defects in material and workmanship during the warranty period If a product proves to be defective in material or workmanshi
44. a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 39 of 78 4 8 Serial Ports Four RS232C serial ports are available on the 886LCD M Flex 886LCD M ATX and 886LCD M mITX The typical interpretation of the signals in the COM ports is as follows Signal Description Transmitte Data sends serial data to the communication link The signal is set to a marking state on hardware reset when the transmitter is empty or when loop mode operation is initiated Receive Data receives serial data from the communication link Data Terminal Ready indicates to the modem or data set that the on board UART is ready to establish a communication link Data Set Ready indicates that the modem or data set is ready to establish a communication link RTS Request To Send indicates to the modem or data set that the on board UART is ready to exchange data CTS DCD Data Carrier Detect indicates that the modem or data set has detected the data carrier Ring Indicator indicates that the modem has received a telephone ringing signal The connector pinout for each operation mode is defined in the following sections Clear To Send indicates that the modem or data set is ready to exchange data 4 8 1 Serial Port ComA DB9 Connector Pull loh lol Type C Type loh lol U D Note 5 A coo ee 5 iL 4 8 2 Serial Port ComB ComC amp ComD Pin Header Connectors The pinout of Serial po
45. actively driven for a single PCI clock by the agent reporting the error The assertion of SERR is synchronous to the clock and meets the setup and hold times of all bused signals However the restoring of SERR to the deasserted state is accomplished by a weak pullup same value as used for s t s which is provided by the system designer and not by the signaling agent or central resource This pull up may take two to three clock periods to fully restore SERR The agent that reports SERR s to the operating system does so anytime SERR is sampled asserted INTERRUPT PINS OPTIONAL Interrupts on PCI are optional and defined as level sensitive asserted low negative true using open drain output drivers The assertion and deassertion of INTx is asynchronous to CLK A device asserts its INTx line when requesting attention from its device driver Once the INTx signal is asserted it remains asserted until the device driver clears the pending request When the request is cleared the device deasserts its INTx signal PCI defines one interrupt line for a single function device and up to four interrupt lines for a multi function device or connector For a single function device only INTA may be used while the other three interrupt lines have no meaning Interrupt A is used to request an interrupt INTB Interrupt B is used to request an interrupt and only has meaning on a multi function device INTC Interrupt C is used to request an interrupt and only h
46. ad KTD 00474 E Public User Manual Date 2005 05 24 Page 48 of 78 4 17 1 PCI Slot Connector Terminal Note Type Signal S C Signal Type Note PW aw TASTE MI C B nv PR PR GND TM O ID E X UO 7D rl IN NM 5V ov IM S PWR vi INTA o o e f O S WIES NTC MA A NI SV fp ee EC Ck Im E X DEG 5V VO PR 5V 1 0 AD31 SDONE_ lo SBOH lO IOT C BE1 F44 E44 AD15 IOT IOT AD14 E45 3 3V PWR COMPONENT SIDE C BEO F53 E53 3 3V AD IM GN PWR Ab2 OT ADOPT E eg en CL PWR 5V 1 0 F59 E59 5V VO PWR E 9r ess sos o oo H a PR WENN NEU NNNM La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 49 of 78 4 17 2 Signal Description PCI Slot Connector SYSTEM PINS CLK RST Clock provides timing for all transactions on PCI and is an input to every PCI device All other PCI signals except RST INTA INTB INTC and INTD are sampled on the rising edge of CLK and all other timing parameters are defined with respect to this edge PCI operates at 33 MHz Reset is used to bring PCl specific registers sequencers and signals to a consistent state What effect RST has on a device beyond the PCI se
47. ait states after each 32 byte block is transferred TRDY G_TRDY Target Ready During PIPE and SBA Operation Not used while enqueueing requests via AGP SBA and PIPE but used during the data phase of PIPE and SBA transactions During FRAME Operation G_TRDY is an input when the GMCH acts as an AGP initiator and is an output when the GMCH acts as a FRAME based AGP target The assertion of G_TRDY indicates the target s ability to complete the current data phase of the transaction During Fast Write Operation In Fast Write mode G_TRDY indicates the AGP compliant target is ready to receive write data for the entire transaction when the transfer size is less than or equal to 32 bytes or is ready to transfer the initial or subsequent block 32 bytes of data when the transfer size is greater than 32 bytes The target is allowed to insert wait states after each block 32 bytes is transferred on write transactions STOP G_STOP Stop During PIPE and SBA Operation This signal is not used during PIPE or SBA operation During FRAME Operation G_STOP is an input when the GMCH acts as a FRAME based AGP initiator and is an output when the GMCH acts as a FRAME based AGP target G_STOP is used for disconnect retry and abort sequences on the AGP interface DEVSEL G DEVSEL Device Select During PIPE and SBA Operation This signal is not used during PIPE or SBA operation During FRAME Operation G_DEVSEL when
48. anual Date 2005 05 24 Page 28 of 78 4 4 2 LVDS Flat Panel Connector LVDS T LVDS LVDS LVDS LVDS LVDS LVDS LVDS LVDS LVDS LVDS PWR Signal 12V 12V 12V LCDVCC DDC CLK BKLTCTL BKLTEN LVDS A0 LVDS A1 LVDS A2 LVDS ACLK LVDS A3 LVDS BO LVDS B1 LVDS B2 LVDS BCLK LVDS B3 GND TU TU U U U ajaja 3 AHAT 55 5 a 6 2 5 5 lt a Signal Type Note GND LCDVCC DDC DATA VDD ENABLE GND LVDS A0 LVDS AT LVDS A2 LVDS ACLK LVDS A3 GND LVDS BO LVDS B1 LVDS B2 LVDS BCLK LVDS B3 GND B G11 Gd JNO PO PO PY P H H H H Ss O D9 DIB N O 00 D B N O 00 D BIN O CO O w0 O O N N IN IN N _ Signal Description LVDS Flat Panel Connector LVDS A0 A3 LVDS A Channel data LVDS ACLK LVDS A Channel clock LVDS Bo B3 LVDS B Channel data LVDS BCLK LVDS B Channel clock BKLTCTL BKLTEN VDD ENABLE LCDVCC Backlight control Enable backlight signal Output Display Enable VCC supply to the flat panel This supply includes power on off sequencing The flat panel supply may be either 5V DC or 3 3V DC depending on the CMOS configuration Maximum load is 1A at both voltages DDC CLK DDC Channel Clock DDC DATA DDC Channel Data Es Kontron ss6LcD M Family always a Jump ahead KTD 00474 E 4 4 3 AGP DVO connector Public User Manual Date 2005 05 24 Page 29 of 78 AA la y pe
49. as meaning on a multi function device INTD Interrupt D is used to request an interrupt and only has meaning on a multi function device 4 17 3 886LCD M PCI IRQ amp INT routing Board type 886LCD M mITX 886LCD M FLEX 886LCD M ATX INTA INT PIRQ E INT PIRQ E INTB INT PIRQ F INT PIRQ F INTC INT PIRQ G INT PIRQ G INTD INT PIRQ H INT PIRQ H INT PIRQ F INT PIRQ G INT PIRQ H INT PIRQ E INT PIRQ G INT PIRQ E INT PIRQ H INT PIRQ F INT PIRQ E INT PIRQ G INT PIRQ F INT PIRQ H INT PIRQ F INT PIRQ G INT PIRQ H INT PIRQ E INT PIRQ G INT PIRQ H INT PIRQ E INT PIRQ F INT PIRQ H INT PIRQ E INT PIRQ F INT PIRQ G INT PIRQ D INT PIRQ C INT PIRQ B INT PIRQ A INT PIRQ C INT PIRQ B INT PIRQ A INT PIRQ D C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual 5 Onboard Connectors Date 2005 05 24 Page Connector Manufacturer Typeno FAN_SYS FAN_PROC 22 23 2031 640456 3 INT KBDMSE Molex 22 23 2061 AMP 640456 6 Foxconn AMP Topyang SATAO Molex SATA1 Foxconn HF11040 103669 3 201904 013218N 67491 0010 LD18071 S04 PWR12CON Molex 39 29 3046 PT setas meme ATXPWR Molex 39 29 3206 M fcm Joes COMB Foxconn COMC Topyang COMD AUDIO HEAD Foxconn Molex Molex FRONTPNL Foxconn Molex Topyang FEATURE Foxconn Molex Molex HL20051 23010 22
50. ate 2005 05 24 Page 30 of 78 Signal Description AGP Connector Signal Address Description Pipelined Read This signal is asserted by the AGP master to indicate a full width address is to be enqueued on by the target using the AD bus One address is placed in the AGP request queue on each rising clock edge while PIPE is asserted When PIPE is deasserted no new requests are queued across the AD bus During SBA Operation This signal is not used if SBA Side Band Addressing is selected During FRAME Operation This signal is not used during AGP FRAME operation PIPE is a sustained tri state signal from masters graphics controller and is an input to the GMCH ADD ID 7 0 Side band Address These signals are used by the AGP master graphics controller to pass address and command to the GMCH The SBA bus and AD bus operate independently That is transactions can proceed on the SBA bus and the AD bus simultaneously During PIPE Operation These signals are not used during PIPE operation During FRAME Operation These signals are not used during AGP FRAME operation NOTE When sideband addressing is disabled these signals are isolated no external internal pull ups are required Flow control RBF Read Buffer Full Read buffer full indicates if the master is ready to accept previously requested low priority read data When RBF is asserted the GMCH is not allowed to initiate the return low priority read data
51. ating agent s bus master s ability to complete the current data phase of the transaction IRDY is used in conjunction with TRDY A data phase is completed on any clock both IRDY and TRDY are sampled asserted During a write IRDY indicates that valid data is present on AD 31 00 During a read it indicates the master is prepared to accept data Wait cycles are inserted until both IRDY and TRDY are asserted together Target Ready indicates the target agent s selected device s ability to complete the current data phase of the transaction TRDY is used in conjunction with IRDY A data phase is completed on any clock both TRDY and IRDY are sampled asserted During a read TRDY indicates that valid data is present on AD 31 00 During a write it indicates the target is prepared to accept data Wait cycles are inserted until both IRDY and TRDY are asserted together TRDY STOP LOCK Stop indicates the current target is requesting the master to stop the current transaction Lock indicates an atomic operation that may require multiple transactions to complete When LOCK is asserted non exclusive transactions may proceed to an address that is not currently locked A grant to start a transaction on PCI does not guarantee control of LOCK Control of LOCK is obtained under its own protocol in conjunction with GNT It is possible for different agents to use PCI while a single master retains ownership of LOCK If a device im
52. be pressed if error If no keyboard present post will continue Hit DEL Message Display Disabled Enabled Display the message or not Interrupt 19 Capture 8 6 Security Menu Disabled Enabled Allows option ROMs to trap interrupt 19 Main Advanced PCIPnP Boot Security Chipset Power Exit Security Settings Install or Change the password Supervisor Password Installed User Password Installed Change Supervisor Password User Access Level Full Access Change User Password Clear User Password Password Check Setup Boot Sector Virus Protection Disabled g Select Screen Hard Disk Security Primary Master HDD User Password Primary Slave HDD User Password Secondary Slave HDD User Password Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Change Supervisor Password Options Password Description Change the Supervisor Password User Access Level No Access View Only Limited Full Access Set the user level Access for the BIOS Change User Password Password Change the User Password Clear User Password Ok Cancel Clears the User Password Password Check Setup Always Shall the BIOS prompt for password on boot or only when entering setup Boot Sector Virus Protection Enabled Disabled Will write protect
53. cal Support and Services If you have questions about installing or using your KONTRON Technology Product check this User s Manual first you will find answers to most questions here To obtain support please contact your local Distributor or Field Application Engineer FAE Before Contacting Support Please be prepared to provide as much information as possible CPU Board 1 Type 2 Part number Number starting with 53 3 Serial Number Configuration 1 CPU Type Clock speed 2 DRAM Type and Size 3 BIOS Revision Find the Version Info in the BIOS Setup in the Kontron Section 4 BIOS Settings different than Default Settings Refer to the Software Manual System 1 O S Make and Version 2 Driver Version numbers Graphics Network and Audio 3 Attached Hardware Harddisks CD rom LCD Panels etc C Kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 4 of 78 Table of contents 1 INTRODUCTION PRG 7 2 INSTALLATION PROCEDURE 322222 aNG Aa 8 24 Installing the board anna AA iride irpo aci 8 2 2 Requirement according to EN60950 eese seen eene nnne ntn nnne sn ran 9 3 SYSTEM SPECIFICATION mere 10 3 4 Component main dalag aaa ies sie aces ocd tdeo aco idera Dua ada an ue Roda daa 10 3 2 Processor support table ANAKAN 13 3 3 S
54. consumption of the 886LCD M is measured under 1 DOS prompt idle full CPU load 2 WindowsXP idle full CPU load 3 6 1 Test system configuration The following items were used in the test setup 1 886LCD M Flex board 710180 4500 mounted with 256MB SDRAM 333MHz EZ128DDR16M168 333INF 2 Pentium M 1600 600Mhz FSB 400Mhz 1MB Cache CPU 3 Standard Pentium 4 active CPU cooler 4 PS 2 keyboard amp mouse 5 CRT 6 Primary Master HD Fujitsu MPG3102AT 10 24GB 7 ATX PSU Antec 550W 8 Tektronix TDS 620B P6243 probes 9 Fluke Current Probe 80i 100S AC DC 10 Ethernet Ports 1 2 3 are enabled 10 100 1000MB LAN 3 6 2 Measured Power Consumption Net 886LCD M board 3x1GB LAN with Pentium M 1600 400MHz 1MB L2 Cache 256MB DDR RAM 333MHz Power State Net Current I Power W DOS FULL LOAD 5VDC 4 560A 22 8W 3 3VDC 2 568A 8 7W DOS IDLE 5VDC 3 3VDC 12VDC ACPI S1 5VDC 3 3VDC ACPI S3 5VSB ACPI S4 5VSB ACPI S5 5VSB WINDOWS XP IDLE 5VDC 3 3VDC WINDOWS XP FULL LOAD 5VDC 3 3VDC C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 18 of 78 3 6 8 Power Consumption Total 886LCD M board 3x1GB LAN with Pentium M 1600 400MHz 1MB L2 Cache 256MB DDR RAM 333MHz Power State CPU Speed Power consumption Full load 1600Mhz Idle 1600Mhz ACPI S1 1600Mhz ACPI S3 1600Mhz ACPI S4 1600Mhz ACPI S5 1600Mhz
55. corretly when reinserted C kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 9 of 78 2 2 Requirement according to EN60950 Users of 886LCD boards should take care when designing chassis interface connectors in order to fulfill the EN60950 standard When an interface connector has a VCC or other power pin which is directly connected to a power plane like the VCC plane To protect the external power lines of peripheral devices the customer has to take care about e That the wires have the right diameter to withstand the maximum available power e That the enclosure of the peripheral device fulfils the fire protecting requirements of IEC EN 60950 Lithium Battery precautions CAUTION Danger of explosion if battery is incorrectly replaced Replace only with same or equivalent type recommended by manufacturer Dispose of used batteries according to the manufacturer s instructions ADVARSEL Lithiumbatteri Eksplosionsfare ved fejlagtig h ndtering Udskiftning m kun ske med batteri af samme fabrikat og type Lev r det brugte batteri tilbage til leverand ren VARNING Explosionsfara vid felaktigt batteribyte Anv nd samma batterityp eller en ekvivalent typ som rekommenderas av apparattillverkaren Kassera anv nt batteri enligt fabrikantens instruktion VORSICHT Explosionsgefahr bei unsachgem em Austausch der Batterie Ersatz nur durc
56. ctor AN ANAN GL AA Ada 29 4 5 Parallel ATA harddisk interface cnet ornari cernatur niuis erasa simon te cidos 33 4 5 1 IDE Hard Disk Connector IDE Pi 34 4 5 2 IDE Hard Disk Connector IDE Di 34 4 5 3 IDE Hard Disk Connector IDE Gi 35 45 4 GE Gonfector GE aine aia nada Maa 36 4 6 Serial ATA harddisk interface Lecce eee adonna aaseista daneas naaran Kaari ardani iaasa aoaia 37 4 6 1 SATA Hard Disk Connector SATAO SATA 2 ce ccceeeeceeeeeeeeeeeeeeeeeeeeeeeetcaeeeeeaeeseneeeeseeeeseneees 37 C Kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 5 of 78 4 7 Printer Port Connector PRINTER 4 eeeeeeeeeeeeeee eene nennen nnn nnn nnn nn nnne nnns nnn nns sn nnns nnns s nnnu 38 48 SernalPOLts uuu entente ias 39 4 8 1 Serial Port ComA DB9 Connector kA 39 4 8 2 Serial Port ComB ComC A ComD Pin Header Connectors 0ooccoccccnnccccccnnnoncnnnononononinnnonanananinos 39 AQ Ethernet connectors aa RAANG ANDA 40 4 9 1 Ethernet connector 1 ETHERI cnn cnn nnnnnncnnnnnnnnnnnnnennninans 40 4 9 2 Ethernet connector 2 3 ETHERZI enne neret ener 41 4 10 USB Connector USB 1 crier cc AA aaa 42 4 10 1 USB Connector 0 2 UGPBOI nennen aeee a nnne nnne 42 4 11 PugeinIldgee 43 4 11 1 Audio Line in Line out and Microphone oooocccccccconcno
57. e 80poled UDMA cables must be used If using the IDE S2 connector care should be taken in correct orientation when attaching the female cable The cables that KONTRON provide do not have a key There is possibility of damage to the HDD or PCB if the cable is not orientated correctly Note If the Audio Amplifiers shall be used to generate up to 3W on one or more of the Audio ouput channels then make sure that sufficent airflow is around the Audio Amplifier The Amplifier has integrated Thermal Protection and will not be damaged even though the airflow is insufficient for normal operation 6 Connect power supply to the board by the ATXPWR connector 7 Turn on the power on the ATX power supply 8 The PWRBTN IN must be toggled to start the Power supply this is done by shorting pins 16 PWRBTN IN and pin 18 GND on the FRONTPNL connector see Connector description A normally open switch can be connected via the FRONTPNL connector 9 Enter the BIOS setup by pressing the F2 key during boot up Refer to the Software Manual under preparation for details on BIOS setup Enter Advanced Menu CPU Configuration Intel SpeedStep Tech and set this option to Maximum Performance Note To clear all CMOS settings including Password protection move the CMOS_CLR jumper with or without power for approximately 1 minute Alternatively turn off power and remove the battery for 1 minute but be careful to orientate the battery
58. ectors Attachment of a keyboard or PS 2 mouse adapter can be done through the stacked PS 2 mouse and keyboard connector MSE amp KBD Both interfaces utilize open drain signaling with on board pull up The PS 2 mouse and keyboard is supplied from 5V_STB when in standby mode in order to enable keyboard or mouse activity to bring the system out from power saving states The supply is provided through a 1 1A resetable fuse 4 3 1 Stacked MINI DIN keyboard and mouse Connector MSE amp KBD Pull UD tono Type Signa signal Type tonto um LIT m Er ARAS MSCLK 4 He ff TkeooaT loc tp Signal Description Keyboard amp and mouse Connector MSE 8 KBD see below 4 3 2 keyboard and mouse pin row Connector KBDMSE Pull pe loh lol U D KBDCLK 1C TBD La f EE MSCLK IOC TBD 4K7 3 888 IC E 5V SB5V PWR O A Signal Description Keyboard amp and mouse Connector KBDMSE Signal Description S O MSCLK Bi directional clock signal used to strobe data commands from to the PS 2 mouse MSDAT Bi directional serial data line used to transfer data from or commands to the PS 2 mouse KDBCLK Bi directional clock signal used to strobe data commands from to the PC AT keyboard KBDDAT Bi directional serial data line used to transfer data from or commands to the PC AT keyboard La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Pub
59. em speaker System CMOS Real time clock Secondary Parallel ATA IDE Channel Primary Parallel ATA IDE Channel Comport 4 Comport 2 Printer Port 855GME VGA Controller 855GME VGA Controller Comport 3 Comport 1 PCI Bus Realtek 8169 Ethernet Controller PCI standard PCI to PCI brigde Realtek 8169 Ethernet Controller Realtek 8169 Ethernet Controller Standard Universal PCI to USB Host Controller Standard Universal PCI to USB Host Controller PCI System Management Bus Realtek AC97 Audio Realtek AC97 Audio 855GME VGA Controller Primary Serial ATA IDE Channel Secondary Serial ATA IDE Channel ojo jojojo n pa IW ev N 8 Co Co 6 5 DMA Channel Usage DMA Channel Number Data Width System Ressources 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits DMA Controller 16 bits Available 16 bits Available 16 bits Available C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 55 of 78 7T Overview of BIOS features This Manual section details specific BIOS features for the 886LCD M boards The 886LCD M boards are based on the AMI BIOS core version with Kontron BIOS extensions 7 1 1 System Management BIOS SMBIOS DMI SMBIOS is a Desktop Management Interface DMI compl
60. en P ATA amp S ATA mode is selected Options P ATA 1st Channel S ATA 1st Channel P0 Master P 1 Slave P0 Slave P 1 Master Description Setup the configuration of the hard drive interfaces Description Setup the configuration of the hard drive interfaces Select physical ports P0 P1 to be Master Slave or Slave Master Feature Options Description S ATA Ports Definition PO 1st P1 2nd Select physical ports PO P1 to be 1st 2nd or Feature S ATA Running Enhanced Mode mode is selected PO 2nd P1 1st Options Yes No 2nd 1st Description Setup the S ATA interface to be running in enhanced mode or legacy mode P ATA Channel Selection Primary Secondary Both Setup the active IDE channels S ATA Ports Definition Configure S ATA as RAID P0 3 P1 4 P0 4 p1 3 Select physical ports PO P1 to be 37 4 or Aan Only available when P ATA Only is selected Note Install the driver via USB Floppy connected to USB port 2 lower conn C Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 59 of 78 Feature Options Description ATA PI 80Pin Cable Detection Host amp Device Select the mechanism for detecting 80Pin Host ATA Cable Device P ATA1 Cable Detection Force Disable 40Pin 80Pin Force the board to operate as if a 40Pin ATA cable or 80Pin ATA cable is installed on the Primary channel
61. ermal Speed Select how the Fan shall operate When set to Thermal the Fan will start to run at the CPU die temperature set below When set to Speed the Fan will run at the Fixed speed set below Fan Settings 1406 5625 RPM The fan can operate in Thermal mode or in a 30 75 C fixed fan speed mode Main Advanced PCIPnP Boot Security Chipset Power Exit Voltage Monitor Enable Hardware Health onitoring Device Requested Cor 1 484 V VcoreA 1 431 V VcoreB 1 483 V 3 3Vin 13 290 V 5Vin 24 985 V 12Vin 212 016 V 12Vin Good 5VSB 15 012 V lt Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 64 of 78 8 3 7 Advanced settings ACPI Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit ACPU Settings Enable Hardware Health onitoring Device ACPI Aware O S Yes gt General ACPI Configuration gt Advanced ACPI Configuration lt Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description ACPI Aware O S Select if your O S supports ACPI 8 3 8 Advanced setting
62. for the CMOS Clear jumper no jumper configuration is required C Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 8 of 78 2 Installation procedure 2 1 Installing the board To get the board running follow these steps In some cases the board shipped from KONTRON Technology has CPU DDR DRAM and Cooler mounted In this case Step 2 4 can be skipped 1 Turn off the power supply Warning Do not use Power Supply without 3 3V monitoring watchdog which is standard feature in ATX Power Supplies Running the board without 3 3V connected will damage the board after a few minutes 2 Insert the DIMM DDR 184pin DRAM module s Be careful to push it in the slot s before locking the tabs For a list of approved DDR DRAM modules contact your Distributor or FAE list under preparation DDR333 DIMM 184pin DRAM modules are supported 3 Install the processor The CPU is keyed and will only mount in the CPU socket in one way Use the handle to open close the CPU socket Intel Pentium M and Celeron M processors Banias processors are supported 4 Use heat paste or adhesive pads between CPU and cooler and connect the Fan electrically to the FAN PROC connector 5 Insert all external cables for hard disk keyboard etc except for flat panel A CRT monitor must be connected in order to change CMOS settings to flat panel support To achieve UDMA 66 100 133 performance on the IDE interfac
63. h den selben oder einen vom Hersteller empfohlenen gleichwertigen Typ Entsorgung gebrauchter Batterien nach Angaben des Herstellers ADVARSEL Eksplosjonsfare ved feilaktig skifte av batteri Benytt samme batteritype eller en tilsvarende type anbefalt av apparatfabrikanten Brukte batterier kasseres i henhold til fabrikantens instruksjoner VAROITUS Paristo voi r j ht jos se on virheellisesti asennettu Vaihda paristo ainoastaan laltevalmistajan suosittelemaan tyyppiln H vit k ytetty paristo valmistajan ohjeiden mukaisesti C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 10 of 78 3 System specification 3 1 Component main data The table below summarises the features of the 886LCD M Flex 886LCD M ATX and 886LCD M mITX embedded motherboards Form factor 886LCD M Flex Flex ATX 190 50millimeters by 228 60millimeters 886LCD M ATX ATX 190 50millimeters by 304 00millimeters 886LCD M mITX mini ITX 170 18millimeters by 170 18millimeters Processor e Support for Intel Pentium M and Celeron M Processors in mPGA478 socket with 400MHz system bus Banias 0 13um and Dothan 0 09um family processors Memory For Flex and ATX 2x184pin DDR SDRAM Dual Inline Memory Module DIMM Sockets For mITX 1x184pin DDR SDRAM Dual Inline Memory Module DIMM sockets Support for DDR 266 333 PC2100 PC2700 Support for up to 2GB of system memory Flex and ATX Suppo
64. has a Plug PCI Raiser Support Disabled and Play operating Disable Unsed PCI Clocks Auto system Spread Spectrum Mode Disabled V02 53 C Copyright 1985 2002 American Megatrends Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit Inc Feature Plug amp Play O S Options No Yes Description Select if you have a PnP O S PCI Latency Timer 192 224 248 32 64 96 128 160 Value in units of PCI clocks for PCI device latency timer register Allocate IRQ to PCI VGA Yes No Assigns IRQ to PCI VGA card PCI IDE BusMaster Enabled Disabled Setup PCI bus mastering for read write to IDE drives PCI Raiser Support PCI Slot2 PCI Slot1 Disabled PCI Slot3 Setup if you are using a PCI Raiser card to get one more PCI Slot Vertical Disable Unused PCI Clocks Auto No Disables PCI clocks if no PCI card is detected Spread Spectrum Disabled Enabled A technique for spreading the signal bandwidth over a wide range of frequencies to lower Radiated Emission C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 69 of 78 8 5 Boot Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Boot Settings Configure Settings during System Boot Boot Settings Configuration Boot Device Priority Removable Devices 1st No
65. he Power On Self Test POST memory test begins and before the operating system boot begins The Menu bar look like this Main Advanced PCIPnP Boot Security Chipset Power Exit The available keys for the Menu screens are as Function Key Description ces 0r Select Screen 1 or Select Item lt gt Or lt gt Change Field lt Tab gt Select Field lt F1 gt General Help lt F10 gt Save and Exit lt Esc gt Exits the Menu 8 2 Main Menu Main Advanced PCIPnP Boot Security Chipset Power Exit System Overview Use ENTER TAB or SHIFT TAB to select AMIBIOS a field Version 08 00 10 Build Date 004 26 05 Use or to ID 886LCD18 configure system Time PCB ID 13 Serial 00333219 PCB ID 53630100 Processor Type Intel R Pentium R M Processor 1500 MHz lt Select Screen Speed 600MHz Select Item Change Field System Memory Tab Select Field Size 248MB F1 General Help Speed 266MHz F10 Save and Exit ESC Exit System Time 10 18 15 System Date Mon 04 28 2005 V02 53 C Copyright 1985 2002 American Megatrends Inc Main Menu Selections You can make the following selections Use the sub menus for other selections System Time HH MM SS Set the system time System Date MM DD YYYY Set the system date C Kontron 886LCD M Family always a Jump ahead KTD 00474
66. iant method for managing computers in a managed network The main component of SMBIOS is the Management Information Format MIF database which contains information about the computing system and its components Using SMBIOS a system administrator can obtain the system types capabilities operational status and installation dates for system components The MIF database defines the data and provides the method for accessing this information The BIOS enables applications such as third party management software to use SMBIOS The BIOS stores and reports the following SMBIOS information BIOS data such as the BIOS revision level Fixed system data such as peripherals serial numbers and asset tags Resource data such as memory size cache size and processor speed Dynamic data such as event detection and error logging Non Plug and Play operating systems such as Windows NT require an additional interface for obtaining the SMBIOS information The BIOS supports an SMBIOS table interface for such operating systems Using this support an SMBIOS service level application running on a non Plug and Play operating system can obtain the SMBIOS information The 886LCD M Boards supports reading certain MIF specific details by the Windows API Refer to the API section in this manual for details 7 1 2 Legacy USB Support Legacy USB support enables USB devices such as keyboards mice and hubs to be used even when the operating system s US
67. imum Speed setting Disabled Kontron ss6LcD M Family Always a Jump ahead 6 ATA PI Hard Disk Write Protect IDE Detect Time Out 80Pin Cable Detection P ATAI Cable Detection force P ATA2 Cable Detection force Sec Disabled Disabled Disabled 35 Host amp Device KTD 00474 E Public User Manual Date 2005 05 24 Page 58 of 78 8 3 2 Advanced settings IDE Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit IDE Configuration Select IDE Mode IDE Configuration P ATA Only 8 S ATA Running Enhanced Yes PATE Only P ATA Channel Selection Both 4 P ATA amp 2 S ATA S ATA Ports Definition P0 3 t P1 4th B Configure S ATA as RAID No S ATA Only 2 S ATA Primary IDE Master Hard Disk E Primary IDE Slave ot Detected E AR os Secondary IDE Master ot Detected PRATA amp S ATA Secondary IDE Slave ot Detected Third IDE Master ot Detected Third IDE Slave ot Detected Fourth IDE Master ot Detected Fourth IDE Slave ot Detected kat Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature IDE Configuration When S ATA onl When P ATA onl Feature Combined Mode Option S ATA Ports Definition mode is selected Options Disable P ATA Only S ATA Only P ATA amp S ATA Wh
68. isk and system memory The Setup menu only lists those options supported by the drive and platform continued 6 KTD 00474 E always a Jump ahead DMA Mode Public User Manual Auto SWDMAO SWDMA1 SWDMA2 MWDMAO MWDMA1 MWDMA2 UDMAO UDMA1 UDMA2 UDMA3 UDMA4 UDMA5 Kontron 886LCD M Family Date 2005 05 24 Page 60 of 78 Selects the Ultra DMA mode used for moving data to from the drive Autotype the drive to select the optimum transfer mode Note To use UDMA Mode 2 3 4 and 5 with a device the harddisk cable used MUST be UDMA66 100 133 cable 80 conductor cable S M A R T Auto Disabled Enabled Select if the Device should be monitoring itself Self Monitoring Analysis and Reporting Technology System 32Bit Data Transfer Disabled Enabled 8 3 3 Advanced settings LAN Configuration Select if the Device should be using 32Bit data Transfer ain Advanced PCIPnP Boot Security Chipset Power Exit Floppy Configuration ETH1 Configuration MAC Address ETH2 Configuration MAC Address ETH3 Configuration MAC Address V02 53 C Copyright 1985 2002 American Megatrends With PXE boot OOEOF4000001 Enabled 00E0F4000002 Enabled 00E0F4000003 Select the type of floppy drive connected to the system lt Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit
69. ith special cabling Two Serial ATA 150 IDE interfaces ATA Mode 6 not supported due to Intel Chipset restrictions Two Parallel ATA IDE interfaces with UDMA 33 ATA 66 100 support PS 2 keyboard and mouse ports Chipset continued C Kontron s86LCD M Family always a Jump ahead KTD 00474 E LAN Support Public User Manual Date 2005 05 24 Page 11 of 78 3x 10 100 1000Mbits s LAN subsystem using the Realtek RTL8110SB 32 LAN controllers or 1x 3x 10 100Mbits s LAN subsystem using the Realtek RTL8100C LAN controllers depending on board configuration PXE and RPL netboot supported Wake On LAN WOL supported e Kontron Technology AMI BIOS core version e Support for Advanced Configuration and Power Interface ACPI 1 0 2 0 Plug and Play o Suspend To Ram o Suspend To Disk o Intel Speed Step SW Watchdog currently not supported by BIOS Secure CMOS OEM Setup Defaults Always On BIOS power setting RAID Support RAID modes 0 and 1 Instantly Available PC Technology Support for PCI Local Bus Specification Revision 2 2 Suspend to RAM support Expansion Capabilities Hardware Monitor Subsystem SMBus routed to FEATURE connector LPC Bus routed to LPC connector DDC Bus routed to LVDS connector 8 x GPIOs General Purpose l Os routed to FEATURE connector PCI Bus routed to PCI slot s PCI Local Bus Specification Revision 2 2 Smart Fan control system support Thermal amp and Speed c
70. ity for the use of the described product s conveys no license or title under any patent copyright or mask work rights to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified Applications that are described in this manual are for illustration purposes only KONTRON Technology A S makes no representation or warranty that such application will be suitable for the specified use without further testing or modification C Kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 3 of 78 Life Support Policy KONTRON Technology s PRODUCTS ARE NOT FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL OF THE GENERAL MANAGER OF KONTRON Technology A S As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into body or b support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness KONTRON Technology Techni
71. lic User Manual Date 2005 05 24 Page 27 of 78 4 4 Display Connectors The 886LCD board family provides onboard two basic types of interfaces to a display Analog CRT interface and a digital interface typically used with flat panels The digital interface to flat panels can be achieved through the onboard LVDS dual channel interface and or the DVO port available on the AGP connector 4 4 1 CRT Connector CRT Pull Pull U D loh lol Type Signal C Type loh lol U D Note LEIT CM T T6 avevo Pwr AO AO AO Note 1 The 5V supply in the CRT connector is fused by a 1 1A reset able fuse Signal Description CRT Connector Signal_ Description CCOO HSYNC CRT horizontal synchronization output VSYNC CRT vertical synchronization output DDCCLK Display Data Channel Clock Used as clock signal to from monitors with DDC interface DDCDAT Display Data Channel Data Used as data signal to from monitors with DDC interface RED Analog output carrying the red color signal to the CRT For 75 Ohm cable impedance GREEN Analog output carrying the green color signal to the CRT For 75 Ohm cable impedance BLUE Analog output carrying the blue color signal to the CRT For 75 Ohm cable impedance DIG GND Ground reference for HSYNC and VSYNC ANA GND Ground reference for RED GREEN and BLUE 6 KTD 00474 E Kontron ss6LcD M Family Always a Jump ahead Public User M
72. nt Product Category CCN NWGQ2 NWGQ8 File number E194252 Theoretical MTBF 199 799hours 22 8years Calculation based on Telcordia SR 332 method Restriction of Hazardeous Substances RoHS All boards in the 886LCD M family is planned for RoHS compliance Capacitor utilization No Tantal capacitors on board Only Japanese brand Aluminium capacitors rated for 100degrees Celsius used on board Battery Exchangeable 3 0V Lithium battery for onboard Real Time Clock and CMOS RAM Manufacturer Toshiba Part number CR2032 Approximate 5 years retention CAUTION Danger of explosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 13 of 78 3 2 Processor support table 886LCD M Flex 886LCD M ATX and 886LCD M mITX boards are designed to support the following processors Intel amp Pentium M Processor 130 nm process with 1 MB L2 cache Intel amp Pentium M Processor 90 nm process with 2 MB L2 cache Intel amp Celeron amp M Processor 130 nm process with 512 kB L2 cache Intel amp Celeron amp M Processor 90 nm process with 1 MB L2 cache Processor Brand Processor Processor Front Side Number Generation Bus Intel Pentium M Dothan 90nm 400 MHz 2MB L2 755 Dothan 90nm j
73. o be unavailable Signa Description INTRUDER INTRUDER may be used to detect if the system case has been opened This signal s status is readable so it may be used like a GPI when the Intruder switch is not needed EXT_ISAIRQ EXTernal ISA IRQ active low input can activate standard AT Bus IRQ interrupt EXT SMI External SMI active low input signal can activate SMI interrupt PWR OK PoWeR OK signal is high if no power failures is detected SB5V StandBy 5V supply RA EXTernal BATtery the terminal of an external primary cell battery can be connected to this pin The terminal of the battery shall be connected to GND for instance pin 10 EXT_BAT The on board battery circuit makes sure that the external battery will not be recharged The external battery can be used with or without the on board battery installed The external battery voltage shall be in the range 2 5 4 0 V DC MESA AN General Purpose Inputs Output These Signals may be controlled or monitored through GPIOO 7 the use of the KONTRON API Application Programming Interface available for Win98 WinXP WinNT and Win2000 FANSOUT FAN 3 speed control OUTput This analogue voltage output controls the Fan s speed FANSIN FANS Input OV to 5V amplitude Fan 3 tachometer input 12V TEMP3IN Temperature sensor 3 input VREF Voltage REFerence reference voltage to be used with TEMP3IN input La Kontron ss6LcD M Family always a Jump ahe
74. onnonncnoncnon nono conan cnn nn n cono emen rennen 43 4 11 2 CD ROM Audio input CDROM cnn nn nen e nennen nenne nenn nn nen nn nenn en 43 4 11 3 AUDIO Header AUDIO HEAD sssssssssssssssseseeeneeee nennen aeaa aeaaee iaa aaeeea nnne 44 4 12 Fan connectors FAN PROC and FAN SYS eeseeeeeeeeee enne eee en nennen nenne nnns nnn nsns antennes 45 4 13 The Clear CMOS Jumper Clr CMOS 111 nananana 45 4 14 LPC connector unsupported cnn oran ann enn ernenncenn cena ennennas 45 4 15 Front Panel connector FRONTPNL cssscseseesseseeeeeeeeeseeeseaeeseaeeeseeeeseaeeeseaeeneeeseseeeseseneenss 46 4 16 Intruder Connector INT 1 nicer reir AA aa 46 4 17 Feature Connector FEATURE occiso is 47 4 17 1 PCI Slot Connector en cca 48 4 17 2 Signal Description PCI Slot Connechor AA 49 4 17 3 886LCD M PCI IRQ amp INT routmg nac enemies 50 5 ONBOARD CONNECTORS aa AA aa 51 6 SYSTEM RESSOURCES AA 52 6 1 Memory MAD iii 52 M e Re E 52 LS WT te LE 53 64 AAA e o E E In A 54 65 DMA Channel Usage ui seed GNG NANA an baveserscesacovatoeuasesauey 54 7 OVERVIEW OF BIOS FEATURES am TANAGA GRAE KAKA kaaa 55 7 1 1 System Management BIOS SMBIOS DMI ce cceeeccceeeeeeeeeeeeeeeeeeeceeeeecaeeeeeaeeseneeeeseeeeeeaeees 55 743 2 Legacy USB Supporta e abs 55 8 BIOS CONFIGURATION SETUP ANG An 56 BI Introduction e
75. p during the warranty period KONTRON Technology will at its sole option repair or replace the product with a similar product Replacement Product or parts may include remanufactured or refurbished parts or components The warranty does not cover 1 Damage deterioration or malfunction resulting from A Accident misuse neglect fire water lightning or other acts of nature unauthorized product modification or failure to follow instructions supplied with the product Repair or attempted repair by anyone not authorized by KONTRON Technology Causes external to the product such as electric power fluctuations or failure Normal wear and tear Any other causes which does not relate to a product defect 2 Removal installation and set up service charges moog Exclusion of damages KONTRON TECHNOLOGY LIABILITY IS LIMITED TO THE COST OF REPAIR OR REPLACEMENT OF THE PRODUCT KONTRON TECHNOLOGY SHALL NOT BE LIABLE FOR 1 DAMAGE TO OTHER PROPERTY CAUSED BY ANY DEFECTS IN THE PRODUCT DAMAGES BASED UPON INCONVENIENCE LOSS OF USE OF THE PRODUCT LOSS OF TIME LOSS OF PROFITS LOSS OF BUSINESS OPPORTUNITY LOSS OF GOODWILL INTERFERENCE WITH BUSINESS RELATIONSHIPS OR OTHER COMMERCIAL LOSS EVEN IF ADVISED OF THEIR POSSIBILITY OF SUCH DAMAGES 2 ANY OTHER DAMAGES WHETHER INCIDENTAL CONSEQUENTIAL OR OTHERWISE 3 ANY CLAIM AGAINST THE CUSTOMER BY ANY OTHER PARTY
76. plements Executable Memory it should also implement LOCK and guarantee complete access exclusion in that memory A target of an access that supports LOCK must provide exclusion to a minimum of 16 bytes aligned Host bridges that have system memory behind them should implement LOCK as a target from the PCI bus point of view and optionally as a master IDSEL DEVSEL Initialization Device Select is used as a chip select during configuration read and write transactions Device Select when actively driven indicates the driving device has decoded its address as the target of the current access As an input DEVSEL indicates whether any device on the bus has been selected continued C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 50 of 78 ARBITRATION PINS BUS MASTERS ONLY Request indicates to the arbiter that this agent desires use of the bus This is a point to point signal Every master has its own REQ which must be tri stated while RST is asserted Grant indicates to the agent that access to the bus has been granted This is a point to point signal Every master has its own GNT which must be ignored while RST is asserted While RST is asserted the arbiter must ignore all REQ lines since they are tri stated and do not contain a valid request The arbiter can only perform arbitration after RST is deasserted A master must ignore its GNT while RST is asserted
77. ption ACPI 2 0 Features No Yes Enable Disable ACPI 2 0 features ACPI APIC support Enabled Disabled Setup if the APIC controller should be supported in the ACPI code APIC ACPI SCI IRQ Enabled Disabled Enable Disable APIC ACPI SCI IRQ AMI OEMB table Enabled Disabled Enable Disable AMI OEMB table Headless mode Enabled Disabled Enable Disable Headless mode 8 3 10 Advanced settings Remote Access Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Configure Remote Access type and parameters Enable RSDP pointers to 64 bit Fixed System Remote Access Enabled Description Tables Serial port number ICH COMI Serial Port Mode 115200 8 n 1 Flow Control None Redirection Always Terminal Type ANSI VT UTF8 Combo Key Support Disabled g Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Kontron ss6LcD M Family C always a Jump ahead KTD 00474 E Public User Manual 66 of 78 Feature Remote Access Options Disabled Enabled Date 2005 05 24 Page Description Allows you to see the screen over the comport interface in a terminal window Serial port number SIO COMA SIO ICH COM2 COMB ICH COMI communication Serial Port Mode 1152008 n 1 57600 8 n 1 384008 n 1 19200 8 n 1 09600 8 n 1 Select the serial port
78. quencer is beyond the scope of this specification except for reset states of required PCI configuration registers Anytime RST is asserted all PCI output signals must be driven to their benign state In general this means they must be asynchronously tri stated SERR open drain is floated REQ and GNT must both be tri stated they cannot be driven low or high during reset To prevent AD C BE and PAR signals from floating during reset the central resource may drive these lines during reset bus parking but only to a logic low level they may not be driven high RST may be asynchronous to CLK when asserted or deasserted Although asynchronous deassertion is guaranteed to be a clean bounce free edge Except for configuration accesses only devices that are required to boot the system will respond after reset ADDRESS AND DATA AD 31 00 CIBE 3 0 INTERFACE CONTROL PINS Address and Data are multiplexed on the same PCI pins A bus transaction consists of an address phase followed by one or more data phases PCI supports both read and write bursts The address phase is the clock cycle in which FRAME is asserted During the address phase AD 31 00 contain a physical address 32 bits For UO this is a byte address for configuration and memory it is a DWORD address During data phases AD 07 00 contain the least significant byte Isb and AD 31 24 contain the most significant byte msb Write data is stable and valid when IRDY
79. r In MDI crossover mode this pair acts as the BI_DC pair MDI 1 receive pair in 10Base T and 100Base TX KG In MDI crossover mode this pair acts as the BI DA pair and is the transmit pair in Note MDI Media Dependent Interface 4 9 1 Ethernet connector 1 ETHER1 Ethernet connector 1 is mounted together with USB Ports O and 2 The pinout of the RJ45 connector is as follows Signal loh lol Es Kontron ss6LcD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 4 9 2 Ethernet connector 2 3 ETHER2 3 41 of 78 The two Ethernet channels in ETHER2 3 are supported by two discrete Ethernet controllers RTL8110SB connected to the onboard PCI bus This connector is not supported on the Engineering sample boards The pinout of the RJ45 s connector are as follows loh lol C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 42 of 78 4 10 USB Connector USB The 886LCD M Flex 886L CD M ATX and 886LCD M mITX contains two USB Universal Serial Bus ports UHCI Host Controllers Each Host Controller includes a root hub with two separate USB ports each for a total of 4 USB ports The USB Host Controllers suppo
80. rt for up to 1GB of system memory mITX ECC support depend on Intel ntel 855GME Chipset consisting of Intel amp 855GME Chipset Graphics and Memory Controller Hub GMCH Intel amp 6300ESB l O Controller Hub ICH 4 Mbit Firmware Hub FWH Intel Extreme Graphics 2 controller Analog Display Support 350 MHz integrated 24 bit RAMDAC with support for analogue monitors up to 2048x1536 at 75 Hz Digital Video Out Port DVOB 8 DVOC support dot clock up to 165 MHz DVI DVO ADD and CRT DVO ADD supported LVDS DVO ADD cards currently not supported Single or dual channel LVDS panel support 18 24bit OpenLDI SPWG up to UXGA panel resolution Dual independent pipe support Mirror and Dual independent display support Tri view support through LVDS interface DVO B C port and CRT CRT LVDS supported CRT DVO Add card supported LVDS DVO Add card supported AGP 2 0 1 5V connector DVO B C muxed w AGP supporting 1x 2x and 4x AGP cards or an AGP Digital Display ADD card Audio AC97 version 2 3 subsystem using the Realtek ALC655 codec e Audio Amplifier o FLEX and ATX 4x3W o mITX 2x3W Line out CDROM in SPDIF Interface Surround e Microphone Onboard speaker UO Control Winbond W83627THF LPC Bus I O Controller Peripheral Four USB 2 0 ports interfaces Four Serial ports RS232 Note Intel 6300ESB Serial port FIFO COM C D is not standard compliant May cause issues with specific SW One Parallel port SPP EPP ECP Floppy optional floppy w
81. rt the standard Universal Host Controller Interface UHCI Specification Rev 1 1 All 4 USB ports support both USB1 0 and USB2 0 signaling Over current detection on all four USB ports is supported USB Port 0 and 2 are supplied on the combined ETHER1 USBO USB2 connector USB Ports 1 and 3 are supplied on the FRONTPNL connector please refer to the FRONTPNL connector section for the pin out USB Port 2 supports USB Legacy mode 4 10 1 USB Connector 0 2 USB0 2 USB Ports 0 and 2 are mounted together with ETHER1 ethernet port loh lol Signal a Signal loh lol Note 1 The 5V supply for the USB devices is on board fused with a 1 5A reset able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity In order to meet the requirements of USB v 1 1 standard the 5V input supply must be at least 5 00V Signal Description USBO0O USBO Differential pair works as Data Address Command Bus USB2 USB2 USB5V 5V supply for external devices Fused with 1 5A reset able fuse C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 43 of 78 4 11 Audio Connector 4 11 1 Audio Line in Line out and Microphone Audio Line in Line out and Microphone are available in the stacked audio jack connector RING SLEEVE TIP Line out Left RING Line out
82. rts ComB ComC and ComD is as follows Pull Pull U D loh lol Type C C Type loh lol U D Note DCD 1 2 DSR RxD 3 4 RTS TxD 5 CTS DTR 7 RI eee CNO PO to Note 1 5V supply is shared with supply pins in ComB ComC ComD headers The common fuse is 1 1A If the DB9 adapter ribbon cable is used the DB9 pinout will be identical to the pinout of Serial ComA La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 40 of 78 4 9 Ethernet connectors The 886LCD M Flex 886LCD M ATX and 886LCD M mITX boards supports 3 channels of 10 100 1000Mb Ethernet In order to achieve the specified performance of the Ethernet port Category 5 twisted pair cables must be used with 10 100MB and Category 5E 6 or GE with 1Gb LAN networks The signals for the Ethernet ports are as follows CO MDI O In MDI mode this is the first pair in 1000Base T i e the BI DA pair and is the transmit MDI O pair in 10Base T and 100Base TX In MDI crossover mode this pair acts as the Bl_DB pair and is the receive pair in 10Base T and 100Base TX MDI 1 In MDI mode this is the second pair in 1000Base T i e the BI DB pair and is the 10Base T and 100Base TX In MDI mode this is the third pair in 1000Base T i e the BI_DC pair In MDI crossover mode this pair acts as the BI_DD pair In MDI mode this is the fourth pair in 1000Base T i e the BI_DD pai
83. ruise for three onboard Fan control connectors FAN PROC FAN SYS and FEATURE Three thermal inputs CPU die temperature System temperature and External temperature input routed to FEATURE connector e Voltage monitoring e Intrusion detect input SMI violations BIOS on HW monitor not supported Supported by API Windows Operating Systems Support e Win2000 WinXP Win98 USB2 0 ACPI S4 not supported Win2003 WinXP Embedded limitations may apply WinCE net limitations may apply Linux Feodora Core 3 Suse 9 2 limitations may appl continued C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 12 of 78 Environmental Operating Conditions 0 C 60 C operating temperature forced cooling It is the customer s responsibility to provide sufficient airflow around each of the components to keep them within allowed temperature range 10 90 relative humidity non condensing Storage 20 C 70 C 5 95 relative humidity non condensing Electro Static Discharge ESD Radiated Emissions EMI All Peripheral interfaces intended for connection to external equipment are ESD EMI protected EN 61000 4 2 2000 ESD Immunity EN55022 1998 class B Generic Emission Standard Safety UL 60950 1 2003 First Edition CSA C22 2 No 60950 1 03 1st Ed April 1 2003 Product Category Information Technology Equipment Including Electrical Business Equipme
84. s General ACPI Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Genral ACPI Configuration Select the ACPI state used for System Suspend mode S1 amp S3 STR Suspend Repost Video on S3 Resume No S4BIOS Support Disabled lt Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Suspend mode S1 POS only S1 amp S3 STR Select the ACPI state used for System Suspend Repost Video on S3 No Yes Determines whether to invoke VGA BIOS post on Resume S3 STR resume S4BIOS Support Disabled Enabled Determines if you want to support S4 power state C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 65 of 78 8 3 9 Advanced settings Advanced ACPI Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced ACPI Configuration Enable RSDP pointers to 64 bit Fixed System ACPI 2 0 Features No Description Tables ACPI APIC support Enabled AMI OEMB table Enabled Headless mode Disabled APIC ACPI SCI IRQ Disabled lt Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Descri
85. t the ATX PSU and boot the board RSTIN Reset Input Pull low to reset the board SPKR_OUT_L Speaker Out Left channel amplified 3W SPKR_OUT_R Speaker Out Right channel amplified 3W SB3V3 Standby 3 3V voltage AGND 4 16 Analogue Ground for Audio Intruder Connector INT This connector is available on the 886LCD M Flex only however please notice that the INTRUDER function is also available on the Feature connector Pull pe loh lol U D ao mh IE GND INTRUDER detect May be used to detect if the system case has been opened This signal s status is readable so it may be used like a GPI when the Intruder switch is not needed La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 47 of 78 4 17 Feature Connector FEATURE wore UD lohol type Si Signal Type tohoi UD Note EXT_ISAIRQ 3 4 EXT _SMi I a Pwrox Is ef sev MA _ D PWR 45V la to GND PWR SS IOT GPIO2 13 14 GPIO3 IOT aaa AR EA E E IOT PWR GND 19 20 FAN3OUT po yy FANSN f21 22f 12V PWR Pp TEMPSIN 23 24f VREF BS IRTX PWR Si SMBD 2K7 1 2K7 Note 1 Pull up to 3V3 supply Note 2 Pull up to RTC Voltage Note For Engineering build 26 pin header is mounted causing INTRUDER GND SMBC and SMBD signals pin 1 2 29 30 t
86. the MBR when the BIOS is used to access the harddrive HDD Password Password Locks the HDD with a password the user needs to type the password on power on C Kontron 886LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 71 of 78 8 7 Chipset Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced Chipset Settings Intel Montara GML NorthBridge chipset configuration options Warning Setting wrong values in below sections may cause system to malfunction Intel Montara GML NorthBridge Configuration SouthBridge Configuration lt Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC xit V02 53 C Copyright 1985 2002 American Megatrends Inc C Kontron s86L CD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 72 of 78 8 7 1 Advanced Chipset Settings Intel Montara GML NorthBridge Configuration Main Advanced PCIPnP Boot Security Chipset Power Exit Configure advanced settings for NorthBrigde Select which graphics controller to use as Primary Video Device Auto the primary boot Graphics Mode Select Enabled 8MB device IGD Device 2 Function 1 Enabled Boot Type CRT Backlight Signal inversion Enabled LCDVCC Voltage 3 3V1 LVDS Normal DVO N A lt Select
87. tion The master may queue AGP requests by asserting PIPE or start a PCI transaction by asserting FRAME AGP Strobes ADSTB 0 Address Data Bus Strobe 0 provides timing for 2x and 4x data on AD 15 0 and C BE 1 0 signals The agent that is providing the data will drive this signal ADSTB 0 Address Data Bus Strobe 0 Complement With AD STBO forms a differential strobe pair that provides timing information for the AD 15 0 and C BE 1 0 signals The agent that is providing the data will drive this signal ADSTB 1 Address Data Bus Strobe 1 Provides timing for 2x and 4x data on AD 31 16 and C BE 3 2 signals The agent that is providing the data will drive this signal ADSTB 1 SBSTB Address Data Bus Strobe 1 Complement With AD STB1 forms a differential strobe pair that provides timing information for the AD 15 0 and C BE 1 0 signals in 4X mode The agent that is providing the data will drive this signal Sideband Strobe Provides timing for 2x and 4x data on the SBA 7 0 bus It is driven by the AGP master after the system has been configured for 2x or 4x sideband address mode SBSTB Sideband Strobe Complement The differential complement to the SB STB signal It is used to provide timing 4x mode continued C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 31 of 78 AGP PCI Signals Semantics FRAME G_FRAME
88. to act as the DREFCLK in certain power management states i e Display Power Down Mode DPMS Clock is used to refresh video during S1 M Clock Chip is powered down in S1 M DPMS should come from a clock source that runs during S1 M and needs to be 1 5 V So an example would be to use a 1 5 V version of SUSCLK from ICH4 M La Kontron ss6LcD M Family Always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 33 of 78 4 5 Parallel ATA harddisk interface Two parallel ATA harddisk controllers are available on the board a primary and a secondary controller Standard 37 harddisks or CD ROM drives may be attached to the primary and secondary controller board by means of the 40 pin IDC connectors IDE_P and IDE_S The secondary controller is shared between the IDE_S connector and the IDE_S2 connector which is intended for 27 harddisks The harddisk controllers support Bus master IDE ultra DMA 33 66 100 133 MHz and standard operation modes Ultra DMA mode is the fastest with up to 133 MB Sec bandwidth to utilize this mode a special driver is required see Software Manual The signals used for the harddisk interface are the following Siena Description oo D 7 0 Low part of data bus RESET Reset signal to the hard disk The signal is similar to RSTDRV in the PC AT bus HDIRQ Interrupt line from hard disk Routed by the SiS630 chipset to PC AT bus interrupt CBLID This input signal CaBLe ID
89. trends Inc Feature Options Description IOAPIC Disabled Enabled Setup the ICHS IOAPIC function Extended IOAPIC Disabled Enabled Setup the extended mode of ICHS IOAPIC OnBoard AC 97 Audio Disabled Enabled Setup the onboard audio OnBoard Amplifier Disabled Enabled Use the OnBoard Amplifier on lineout C Kontron s86LCD M Family always a Jump ahead KTD 00474 E Public User Manual Date 2005 05 24 Page 74 of 78 8 8 Power Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Enable Disable SMI ADVANCED SMI ENABLE CONTROLS based power management Power Management APM Enabled and APM support Power Button Mode On Off ADVANCED RESUME EVENT CONTROLS USB Controller Resume Enabled PME Resume Disabled RI Resume Disabled RTC Resume Enabled RTC Alarm Data 11 RTC Alarm Time 11 11 11 lt Select Screen PS 2 Kbd Mouse S4 S5 Wake Disabled I Select Item S3 S5 Keyboard Hotkey Any key Change Option F1 General Help AC Power Loss Restart Off F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Power Management APM Disabled Enabled Setup the SMI APM support Power Button Mode On Off Suspend Select Power button functionality USB Controller Resume Disabled Enabled Lets the USB devices wake up from sleep state PME WOL Disabled Enabled Allow PME WOL to wake from sleep states RI
90. ual Date 2005 05 24 Page 38 of 78 4 7 Printer Port Connector PRINTER The printer port connector is provided in a standard DB25 pinout The signal definition in standard printer port mode is as follows Pull Pull U D loh lol Type Type loh lol U D Note axe esas oco ses Fig 7 14 AFD OC O 24 24 2K2 2k2 24 24 2 3 The interpretation of the signals in standard Centronics mode SPP with a printer attached is as follows Description Parallel data bus from PC board to printer The data lines are able to operate in PS 2 compatible bi directional mode Signal to select the printer sent from CPU board to printer Signal from printer to indicate that the printer is selected This signal indicates to the printer that data at PD7 0 are valid Signal from printer indicating that the printer cannot accept further data Signal from printer indicating that the printer has received the data and is ready to accept further data This active low output initializes resets the printer This active low output causes the printer to add a line feed after each line printed Signal from printer indicating that an error has been detected Signal from printer indicating that the printer is out of paper The printer port additionally supports operation in the EPP and ECP mode as defined in 3 La Kontron ss6LcD M Family Always
91. ystem Memory Support 2 iir nct cussion stas site Eo astuce BANANA NAN SNANG 13 GE WEE Rn EE 14 3 5 886LCD M Power Distribution amp Power State Map cerent 15 AA 17 3 6 1 Test system configUratiOn ecco a AA a ADAN BA ze Eee a 17 3 6 2 Measured Power Consumption Net 17 3 6 3 Power Consumption Total 18 3 6 8 Minimum recommended power supply specifications eeeeene 18 3 6 5 Recommended Power Supply specifications ooooocccnnncnnnnnnnnononcnonnnnrnnnrnononononn nan conocio nan nnn rca 18 3 7 886LCD M Clock Distribution eese eere esent nn nennt nnne nnne rnnannne 19 4 CONNECTOR el all el LE 21 4 1 Connector lay Ou to near caia 22 4 1 1 BBELOD MIFIEX EE 22 4 1 2 SBELOD M AIX resar s E 23 4 1 83 G oelCD Miml N cnn 24 4 2 Power Connector ATXPWR a RAANG SE 24 4 2 Power Connector ATXPWR ccsscccsseseeseeeeeseseeeeeeeeseeeeennesenseneesneeessnaesneaaeeseaseeneasenueasenaaseneaeenaaass 25 4 3 Keyboard and PS 2 mouse connectors ssseceeeeseeesenenseeeeneeseeesenesseessnaeeeaesenssseaeenaeeesesensesensenes 26 4 3 1 Stacked MINI DIN keyboard and mouse Connector MSE SKI 26 4 3 2 keyboard and mouse pin row Connector KBDMGE seen 26 4A Display Connectors m M 27 4 4 1 CRT Connector EAT apak GAD LA NANANA LABANANG 27 44 2 LVDS Flat Panel Connector VDS 28 4 43 AGP DVO conne

User Manual for the Mother Boards: 886LCD-M/Flex

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