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SK-86R12-CPU01

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1. 7 FSEUGCC UM_MB86R12 CPUO1_Rev1 1 11 Fujitsu Semiconductor Europe GmbH
2. 72 gt gt gt 9 9090 8 Do 9 eo 10 Sl 10 3 5 0 71111111 10 E ec cto 11 AL WSCC i ai 2 3 11 00 11 1111 1 6 11 FSEUGCC UM_MB86R12 CPU01_Rev1 1 4 Fujitsu Semiconductor Europe GmbH O FUJITSU Emerald P CPU Module SK 86R12 CPU01 O Introduction Features Here you will find a short summary and overview of the features that the SK 86R12 CPU01 Module offers It provides 98x APIX2 Video Outputs 1x APIX2 Video Input 1x USB Host JTAG Trace Debug Connectors 20 Pin Mictor Connector NOR Flash 1GBit DDR3 2x 2GBit 512MByte NOR Flash usage with 16 oder 32 Bit access Base Connectors for use with Emerald European Base Board SK 86R11 BASE and Japanese Baseboard MB86R11EVB BASE01 Mechanical dimensions PCB 117x 127 mm For details about interfaces refer to the Emerald P Hardware Manual see appendix FSEUGCC UM_MB86R12 CPU01_Rev1 1 5 O Fujitsu Semiconductor Europe GmbH O FUJITSU Emerald P CPU Module SK 86R12 CPU01 1 System Overview The Emerald P system consists of three modules CPU module Emerald P chip USB connector SK 86R12 CPU01 Base board supplies interfaces and power SK 86R11 BASE Additional Addon board from Jade L system provides 2x DVI output and 2
3. 1 2V APIX Power Supply Dedicated LDO R21 DNI R22 OR 3 4 USB HOST Settings Chip Select used MEM nCS2 gt R205 OR R204 OPEN Interrupt IRQ INT AO gt R206 OR R209 OPEN 3 5 LEDs D8 Global 5V Supply from base board connector D9 1 2V supply to MB86R12 APIX D10 3 3V supply to MB86R12 APIX D12 1 2V supply to MB86R12 general D13 5V Supply to USB bus D14 Global 3 3V Supply from base board connector D15 3 3V supply to MB86R12 general D16 1 5V supply to DDR3 memory D15 3 3V supply to MB86R12 general FSEUGCC UM MB86H12 CPUO1 Rev1 1 10 O Fujitsu Semiconductor Europe GmbH co Emerald P CPU Module FUJITSU SK 86R12 CPUO1 4 Appendix 4 1 Used literature Emerald P Hardware Manual http www fujitsu com emea services microelectronics gdc gdcdevices mb86r1 2 emerald p html Emerald P CPU Module Schematics http Awww fujitsu com emea services microelectronics gdc evalods emerald p starterkit html Emerald L Base Board Schematics http www fujitsu com emea services microelectronics gdc evalbds emerald p starterkit html Software Update Please check Website regularly for updates of the used Linux system http www fujitsu com emea services microelectronics gdc swtools gdc software index html 4 2 Figures TU 1 9 A 3 e 6 12147 2
4. Fujitsu Semiconductor Europe User Manual FSEUGCC UM_SK 86R12 CPU01_Rev1 1 EMERALD P CPU MODULE SK 86R12 CPU01 0 co FUJITSU Emerald P CPU Module SK 86R12 CPU01 Revision History 30 Nov 2011 V1 0 Herbert Honig First release 07 Dec 2011 V1 01 Herbert Hoenig Corrected typo 12 Jan 2012 V1 1 Herbert H nig Added PSMODE information This document contains 11 pages FSEUGCC UM_MB86R12 CPU01_Rev1 1 2 O Fujitsu Semiconductor Europe GmbH CO Emerald P CPU Module FUJITSU SK 86R12 CPUO1 Warranty and Disclaimer To the maximum extent permitted by applicable law Fujitsu Semiconductor Europe GmbH restricts its warranties and its liability for all products delivered free of charge eg software include or header files application examples target boards evaluation boards engineering samples of IC s etc its performance and any consequential damages on the use of the Product in accordance with i the terms of the License Agreement and the Sale and Purchase Agreement under which agreements the Product has been delivered ii the technical descriptions and iii all accompanying written materials In addition to the maximum extent permitted by applicable law Fujitsu Semiconductor Europe GimbH disclaims all warranties and liabilities for the performance of the Product and any consequential damages in cases of unauthorised decompiling and or reverse engineering and or disassembling Note all these pr
5. OFF 1 CRIPM1 ON 0 OFF 1 CRIPM2 ON 0 OFF 1 CRIPM3 ON 0 OFF 1 PSMODE OFF PLL clock frequency divider ratio O ee ON PLL clock frequency divider ratio 1 7 VINITHI ON Exception Vectors located at OXFFFFOOOO amu OFF Exception Vectors located at 0x00000000 rtp o CF Notes CRIPM O 3 default settings results in 533 MHz clock frequency PLLBYPASS ON PLL Clock is bypassed OFF OFF PLL Clock is not bypassed FSEUGCC UM MB86H12 CPUO1 Rev1 1 8 Fujitsu Semiconductor Europe GmbH O FUJITSU Emerald P CPU Module SK 86R12 CPU01 SW12 MPX Mode m m m NOREAN NOR Flash Bus Width Select ON 32 Bit O Default OFF 16 Bit 1 JTAGSEL JTAG Select ON DFT OFF Normal Default TRACEENO Pin Group B ETM ON use OFF not in use Default TRACEEN1 Pin Group H ETM ON use OFF not in use Default MPX Mode Settings also available on Main Connector A Attention Do not set SW12 7 and SW12 8 to ON at the same time TESTMODE Test Mode Select ON Test Mode OFF Normal Default Notes FSEUGCC UM MB86H12 CPUO1 Rev1 1 9 O Fujitsu Semiconductor Europe GmbH CO Emerald P CPU Module FUJITSU SK 86R12 CPUO1 3 3 Power presets R24 1 2V APIX Power Supply Adjustment Set to 1 2V at Test Point TP8 R269 1 2V Power Supply Adjustment Set to 1 2V at Test Point TP4 R275 1 5V Power Supply Adjustment Set to 1 5V at Test Point TP13 3 3V APIX Power Supply Dedicated LDO R19 OPEN R20 OR
6. ed in particular but not limited to warranties of merchantability and fitness for a particular purpose for which the Product is not designated 4 To the maximum extent permitted by applicable law Fujitsu Semiconductor Europe GmbH s and its suppliers liability is restricted to intention and gross negligence NO LIABILITY FOR CONSEQUENTIAL DAMAGES To the maximum extent permitted by applicable law in no event shall Fujitsu Semiconductor Europe GmbH and its suppliers be liable for any damages whatsoever including but without limitation consequential and or indirect damages for personal injury assets of substantial value loss of profits interruption of business operation loss of information or any other monetary or pecuniary loss arising from the use of the Product Should one of the above stipulations be or become invalid and or unenforceable the remaining stipulations shall stay in full effect FSEUGCC UM MB86H12 CPUO1 Rev1 1 3 Fujitsu Semiconductor Europe GmbH O FUJITSU Emerald P CPU Module SK 86R12 CPU01 Contents 6 10 2 Gia RE 3 bb coop oc ro 4 0 3 LER CRANE 5 E 7 7710 24772 im bi 1 7 7111 1 0 6 2 Sarup CPU 0 A 7 a 8 ei ti 8 2 17777 7 7
7. oducts are intended and must only be used in an evaluation laboratory environment 1 Fujitsu Semiconductor Europe GmbH warrants that the Product will perform substantially in accordance with the accompanying written materials for a period of 90 days form the date of receipt by the customer Concerning the hardware components of the Product Fujitsu Semiconductor Europe GmbH warrants that the Product will be free from defects in material and workmanship under use and service as specified in the accompanying written materials for a duration of 1 year from the date of receipt by the customer 2 Should a Product turn out to be defect Fujitsu Semiconductor Europe GmbH s entire liability and the customer s exclusive remedy shall be at Fujitsu Semiconductor Europe GmbH s sole discretion either return of the purchase price and the license fee or replacement of the Product or parts thereof if the Product is returned to Fujitsu Semiconductor Europe GmbH in original packing and without further defects resulting from the customer s use or the transport However this warranty is excluded if the defect has resulted from an accident not attributable to Fujitsu Semiconductor Europe GmbH or abuse or misapplication attributable to the customer or any other third party not relating to Fujitsu Semiconductor Europe GmbH 3 To the maximum extent permitted by applicable law Fujitsu Semiconductor Europe GmbH disclaims all other warranties whether expressed or impli
8. x CVBS input SK 86R03 VIDEO CPU Module AddonBoard 2x DVI Out 2x CVBS in 2x APIX t APIX TX375 2 TX125 2x 7 HDMI RS232 Out Base Board Others Peripheral Header Pin Figure 1 1 System Overview FSEUGCC UM MB86HR12 CPUO01 Rev1 1 6 O Fujitsu Semiconductor Europe GmbH co RON ESPN 2 Startup CPU Module Connect the CPU Module to the baseboard Connect appropriate cables HDMI RS232 Power etc to baseboard Please refer here to the Baseboard Manual see appendix Set switches SW1 SW11 and SW12 according to your needs please refer here to the Hardware Manual see appendix Power on baseboard Demo starts up on HDMI output Default settings for the CPU Module Clock PLL set to 533MHZ NOR Flash boot activated Bootloader and Linux system flashed in NOR and NAND Flash SW1 Boot option la MAND NOR PLLMODE MPXMODE SW12 ns 9 mexmone Jn BE mast P jon TESTMODE le TRACEEND B TRACEEN joo MPXMODE2 gt 16bitNOR Dje NOR_EAEN 16 bit AA NEO 1 08 Figure 2 1 Board Layout FSEUGCC UM MB86HR12 CPUO01 Rev1 1 7 Fujitsu Semiconductor Europe GmbH O FUJITSU Emerald P CPU Module SK 86R12 CPU01 3 Detailed Settings 3 1 NAND NOR Boot Option For NAND NOR Boot Option SW1 is used NAND SELFL HIGH Boot from NAND NOR SEFLL LOW Boot from onboard NOR default 3 2 DIP Switches SW11 PLL Mode CRIPMO ON 0

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