08 Interrupts
Contents
1. Low Bit 2 b UORENL UART 0 Receive Interrupt Request Enable Low OVer ytes UOTENL UART 0 Transmit Interrupt Request Enable Low Bit DCENL DC Interrupt Request Enable Low Bit SPIENL SPI Interrupt Request Enable Low ADCENL ADC Interrupt Request Enable Low Table 51 IRQ1 Enable High Bit Register IRQ1ENH ers 7 5 4 3 2 1 9 FIELD PADGENH PADSENH PADAENH PAD2ENH PADOENH RESET o o o o o o 9 j mw ww mw ww mw mw ww mw ADDR FF E036H ers 7 4 2 ft FIELD PAD7ENL PAD6ENL PADSENL PAD4ENL PAD2ENL PAD1ENL PADOENL o 0 o ooo o mw ww ww ww mw mm mw mw mw _ ADDR FF E037H BITS 6 6 4 3 2 s U3RENH USTENH PWMFENH C3ENH C2ENH ENH PN RESET 0 0 ADDR FF E03AH E BEEN EX UITENL EN Nm N afa ENL EN RESET 9 ADDR FF PWMTENL PWM Timer Interrupt Request Enable Low Bit UIRENL UART 1 Receive Interrupt Request Enable Low UITENL UART Transmit Interrupt Request Enable Low Bit PWMFENL PWM Fault Interrupt Request Enable Low CxENL DMAxENL Port Cx or Interrupt Request Enable Low Turn interrupts on e Enable all configured Interrupts EI orthe instructi2. presses using interrupts Can we change interrupt vector table at runtime E Can we change which ISR is called by an interrupt at runtime E How about this e Set ALL interrupts to the same ISR called dispatch e In dispatch If IRQO amp OxO1 If IRQO amp 0x02 If IRQO amp 0x04 Reentrant e keyword causes the compiler to allocate a dynamic call frame arguments and local variables are placed on the stack Allows for recursion function pointers void reentrant function int x int y int a b ZDSII for ZNEO generates j reentrant code without the reentrant keyword It will complain if you use it Reentrant e Functions that require dynamic frames include Any recursive function including indirect recursion Any function called through a pointer Any function that might be called by an interrupt handler unless it takes no parameters and has no local non static data Volatile e The volatile keyword indicates that the storage is likely to change at anytime and be changed by something the compiler Isn t aware of like an interrupt service routine or SFR How a variable change value and compiler not be aware of that The compiler know about a assignments Dutton 222 Why we need volatile Memory mapped peripheral registers e Global variables modified by an interrupt service routine e Global variables within
3. 4 button 1 void myftunct2 void 1 button if button gt 4 button 1 Look the compiled assembly _myfunc1 LINK 0 PUSHMLO 1 INC _button RAM Clearly there is a JP LE 3 I 5 LD RO 1 difference in the LD _button RAM RO way the compiler RET 3 generates code for an ISR function _myfunct2 LINK 0 INC _button RAM LD RO 4 _button RAM RO JP LF 4 9 LD RO 1 LD _button RAM Software Generated We cant simply call ISR function like we would a normal function e cause an interrupt from software write a 1 to the bit position of the corresponding interrupt in IRQOSET IRQISET IRQ2SET e The 216 interrupt controller treats these writes the same as a hardware generated interrupt Using interrupts On the LAB board to read a button Not all buttons can trigger an interrupt e Why Not VDD SW PUSHBUTTON Sw SW PUSHBUTTON SW3 SW PUSHBUTTON 33 How we that that all buttons can cause an Interrupt R hn 127171733 How does that work Like This VDD SW PUSHBUTTON 33 n PDZ gt PF6 SW PUSHBUTTON PD3 SW3 SW PUSHBUTTON 33 What get executed VECTOR POAD 456 e ple InterruptCounter Update the 8 bit latch counter example to count button
4. Interrupts INSULIN PUMP SYSTEM Real Time Embedded Systems www atomicrhubarb embedded Lecture 10 anuary 31 2012 Interrupts Section Topic Where in the books Catsoulis chapter 1 10 12 Simon chapter4 Zilog UM197 ao zer series Flash Microcontroller Contest Kit User Manual Zilog 171 ios peveroper studio i ZNEO User Manual Zilog PS220 series Product Specification Zilog UM188 cpu core User Manual Oscillators XTAL IPO On Chip Debugger POR VBO ZNEO CPU Interrupt WDT with System Controller uer RC Oscillator Clock Memory Buses b ESPI Analog Flash RAM 3 2 Controller Controller PWM I um Flash Memory RAM GPIO with External Interface Address and Data Bus Revisit that simple Radio connected to a Z16 Look at a radio Z8F642x MaxStream Development RF Module Board RF Antenna Figure 2 Connection between the Z8F642x Board and the RF Module That Radio e read the data from the radio we could write a program that loops and examines the CTS and Rx line looking for data e hats POLLING e What if we want the radio to signal the CPU when data 15 ready for it Thats an INTERRUPT Interrupts signal hardware software that interrupts the normal flow of execution and forces a temporary branch to a service routine ISR e Common in ALL microprocessor
5. a multi threaded application Architecture Specific Functions El Enable interrupts e DI Disable interrupts e SET VECTOR vector function e TDI test and disable interrupts Returns the previous interrupt status Ri stat Restore interrupts What all do you need to do if you need to process interrupts WHILE you are already processing an interrup E You Will Use nterrupts for Almost Everything
6. able for that particular interrupt Interrupts e At the completion of the ISR control is returned to the point in the program we were executing when the interrupt occurred IRET Interrupts can have a priority ust case several happen at the exact same time The interrupt with the highest priority is called first ISR ISR int button 0 pragma interrupt void button_is buttontty int button l v id interrupt button isr void ourtonc4 Durton l Common Interrupts Timers e Data Received e Data Sent WatchDog timer e Signal on pin e Change of signal on pin e Software Error Enabling Disabling e most microcontrollers once an interrupt has been triggered further interrupts are disabled When the ISR returns control interrupts are re enabled e Software can enable and disable interrupts at any time Why would you want to disable interrupts 5 The Shared Data Problem Static int iTemperatures 2 void interrupt vReadTemperatures void iTemperatures 0 get temp somehow iTemperatures 1 get temp somehow void main void int iTempO iTempl while TRUE Whats wrong iTemp0 iTemperatures 0 iTempl iTemperatures 1 with this if iTempO iTemol enable alarm Static int iTemperatures 2 void interrupt vReadTemperatures void iTemperatures 0 get temp s
7. e Add address of the ISR to the interrupt vector table Configure interrupts Enable the specific interrupts Turn on interrupts enable interrupt trapping ISR function A normal C function More or less pragma interrupt void isr_button void 4 button if button gt 4 button 1 void interrupt isr button void button if button gt 4 button 1 Add address to vector Macro defined for us in zneo h gt SEI VECTORI PSADs button P3AD is the name of the interrupt 15 button is the name of the ISR ISR must be declared an interrupt VECTOR is NOT executed at runtime but tells the compiler to place the function address in the Interrupt Vector Table Notice an interesting thing e read from the 3 buttons 2 ways e Set an interrupt on EACH Write an ISR for EACH When that ISR is called we know the button was pressed do something 2 Set an interrupt on EACH Write ONE ISR for all 3 When the ISR function is called we get the GPIO status for the buttons to determine which was pressed Configure The Interrupt e Port Select e Edge select e Set the Priority Port Select e Port and D share in interrupt Table 36 Port A Irq Mux Register PAIMUX e 8 4 3 2 t o FIELD PAIMUX7 PAIMUX6 PAIMUXS PAIMUX4 PAIMUX3 PAIMUX2 PAIMUX1 PAIMUXO ADDR FF E10E PAIMUX 7 0 Port A D Interrupt Source 0 Select Port a
8. falling input edge Port A4 or Port D4 rising or falling input edge Port A3 or Port D3 rising or falling input edge Port A2 or Port D2 rising or falling input edge Port A1 or Port D1 rising or falling input edge Port or Port DO rising or falling input edge or OCD Interrupt source selected in PortA Irq Mux registers PWM Timer UART 1 receiver UART 1 transmitter PWM Fault Port C3 both input edges DMA 3 Port C2 both input edges DMA 2 Port C1 both input edges DMA 1 Port both input edges DMA 0 Registers We Need SYSEXCPH SYSEXCPL System exception Status Indicates things like statck overflow Divide by zero Illegal Instruction LASTIRQ Indicates the last interrupt source IRQO IRQ1 IRQ2 Stores the current interrupt source as a bit field for polled interrupts IRQOSET IROISET IRS2SET Trigger the corresponding interrupt Registers We Need e IRQOENH IRQOENL IROIENH IRQ2ENH IRQ2ENL Interrupt enable disable and priority 2 bits PAIMUXI PCIMUX CO Cl C2 C3 2 POAD PIAD P2AD P3AD PAAD PSAD P6AD Interrupt names P7AD PWM FAULT PWM TIMER RESET SPI SYSEXC TIMERO TIMERI TIMER2 UARTO RX UARTO TX UARTI RX UARTI TX Some Constraints e GPIO interrupts only on ports A D Rising Falling edge configurable only on port A or D Port C bits 0 1 2 3 triggers an interrupt on both edges do we use them e Write ISR function
9. id static int iTempB 2 static BOOL UsingB FALSE while TRUE if UsingB void interrupt ReadTemps void if iTempB 0 iTempB 1 if UsingB enable alarm iTempA 0 get temp iTempA 1 get temp else else if iTempA 0 iTempA 1 iTempB 0 get temp enable alarm iTempB 1 get temp UsingB UsingB Main task wo ve Missed Avoided interrupts Interrupts e he 216 supports 24 different interrupts 12 GPIO 12 on chip peripherals Flexible selectable on rising falling edge 4 dual edge Priority 9 Levels Priority Program Memory Highest Vector Address 0004H 0008H 000CH 0010H 0014H 0018H 001CH 0020H 0024H 0028H 002CH Interrupt Table Programmable Priority Yes Yes Yes Yes Yes Yes Yes Yes Interrupt Source Reset not an interrupt System Exceptions Reserved Timer 2 Timer 1 Timer 0 UART 0 receiver UART 0 transmitter 2 SPI ADCO 0030H 0034H 0038H 003CH 0040H 0044H 0048H 004CH 0050H 0054H 0058H 005CH 0060H 0064H 0068H 006 Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Port A7 or Port D7 rising or falling input edge or Comparator output rising and falling edge source selected in PortA Irq Mux registers Port A6 or Port D6 rising or falling input edge Port A5 or Port D5 rising or
10. omehow iTemperatures 1 get temp somehow Genes 4 What happens when an int 0 iTempl interrupt happens here and while TRUE new temperatures iTempO iTemperatures 0 are recorded iTempl iTemperatures 1 if iTempO iTemol enable alarm M This condition may not be valid anymore One solution Static int iTemperatures 2 void interrupt vReadTemperatures void iTemperatures 0 get temp somehow iTemperatures 1 get temp somehow void main void int 70800 TTempl The book uses disable while TRUE 1 Drs Qc 1 We USE DI and 0 iTemperatures 0 This 18 compiler dependent iTempl iTemperatures 1 Fl if iTempO iTemol enable alarm While processing an interrupt further interrupts are disabled Why might you want to re enable them while an ISR is still executing Interrupt Latency e The amount of time it takes the system to respond to an interrupt To include all or some of these things How long interrupts are disabled The time it takes to execute higher priority interrupts How long it takes the microcontroller to look up the proper interrupt How long it takes the microcontroller to switch context ISR does critical work ISR Main task P xd NC IRQ Interrupt Request Signal Latency Alternative Disabling Interrupts static int iTempA 2 void main vo
11. on Does not change the IRQ 012 EN HL bits e Disable all configured Interrupts DI orthe DI instruction Does not change the IRQ 012 EN HL bits Polling Interrupts e complicate things a little more If we disable interrupts the Z16 continues to watch in the interrupt signals and set the appropriate bits in the IRQO IRQ2 registers e We can poll these registers too see if something has happened e Enable interrupts lower 4 bits of port Aon the rising edge upper 4 bits of port Don the falling edge In C SET VECTOR POAD my isr SET 1 my isr SET VECTOR P7AD my isr PAIMUX 72 Port Select 0 A 1 D PAIEDGE OxOF Edge Select O fall 1 rise OxFF enable and priority 0x00 EI Turn on Interrupt Recipe Interrupts 1 Determine which interrupts you need to watch 2 Write the necessary 1585 3 Configure port A or D bits PAIMUX 4 Configure edges for port A D PAIEDGE 5 Enable and set priority of each interrupt IRQxENH and IRQxENL 6 Assign the ISR to the interrupt vector SET VECTOR 7 Enable interrupts What is real difference void interrupt myfuncl void button if button gt 4 button 1 void myfunct2 void button if button gt 4 button 1 What is the difference void interrupt myfuncl void button if button gt
12. s and microcontrollers Interrupts e When an interrupt is triggered the current program counter is pushed onto the stack the working register set is pushed and the interrupt service routine is called This is called Saving Context Microprocessor usually have different return RET instructions for interrupt service routines and for normal CALL functions Hardware e Certain input pins on the processor can be configured to trigger an interrupt when it sees a particular signal high or low or transition high low or low high transition High Falling Edge Low Rising Edge Software Interrupts can be triggered software e 8086 INT instruction e Z16 TRAP instruction Interrupts e Some microprocessors have 1 or 2 pins for interrupts Multiple external sources have to share this and use some mechanism to identify the source Microcontrollers typically have many pins that can trigger an interrupt Interrupts e Interrupt An asynchronous electrical signal that indicates a specific reason to interrupt the processor e Interrupt vector An address a pointer that is the beginning of a block of code that is executed when an interrupt is received e Interrupt Table A collection of interrupt addresses a jump table Interrupts Interrupt Handler Interrupt Service Routine subroutine for handling a specific interrupt event Interrupt Number An offset in the interrupt t
13. s interrupt source Select Port Dx as interrupt source Edge Select T 37 Port A Edge Register PAIEDGE BTS s NN EE FIELD FF E10F PAIEDGE 7 0 Port Interrupt Edge 0 Select Port A D pin negedge as interrupt source 1 Select Port A D pins posedge as interrupt source Priority e 3 Levels of priority IRQ registers 24 bits e Each interrupts gets 2 bits H and L to Indicate priority Table 47 IRQO Enable and Priority Encoding IRQOENH x IRQOENL x Priority Description 0 0 Disabled Disabled 0 1 Level 1 Low 1 0 Level 2 Nominal 1 1 Level 3 High Note x indicates the register bits from 0 through 7 Priority Interrupt priority controls what happens when two or more interrupt signals are received at the same time Not what happens while one interrupt 15 being handled and another interrupt event occurs What happens while one interrupt is being handled and another interrupt event occurs 5 Enable ones we want Table 48 IRQO Enable High Bit Register IRQOENH ams 7 4 3 2 1 FIELD T2ENH 1 TOENH UORENH UOTENH I2CENH SPIENH ADCENH o o o o o R mw ww mw mw ww ww mw m T2ENL Timer 2 Interrupt Request Enable Low Bit TIENL Timer 1 Interrupt Request Enable Low Bit P rity b Its Spl It TOENL Timer 0 Interrupt Request Enable
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