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TDA5240-35-25 Explorer Documentation

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1. n 7 Explorer IET SIB2 Register Q Wizard Registers Explore About A 2 Subgroup Selection 1 Master Control Unit QO A Configuration Selection B Chip control Port Pin Output Signal El Operating Mode Port Pin 0 Selection inv high p Sleep Mode C Run Mode Slave C Self Polling Mode LOW i mj m TOES Port Pin 1 Selection inv highp E cong site EA CA DATA mj a A cond n E E be fep Port Pin 2 Selection inv high p Selection C A B C NINT rr CD C AsB C D m UNS Port Pin 3 Selection inv high p RX RUN rr Init PLL after coming from HOLD Lock Data FIFO Init of FIFO at Init of FIFO at r at EOM T Ovde Start iv Frame Stat Enable SDO High Power Pad Config A Modulation Run Mode Slave Self Polling Mode Wake Up RunMode c ASK ASK ASK c FSK FSK FSK Confia A Cc ASK FSK ASK RX RUN Configuration Enable Interrupt at signal NINT i P i c FSK ASK FSK IV Active Level on PPO for Conf A iv Q A Wake Up IV Active Level on PP1 for Conf A Vv O A Frame Sync a Jv Active Level on PP2for Conf A z o eee oaea ene I Active Level on PP3for Conf A Y O A Message ID Found ng Chip Data RX Mode TMCDS Check foractve high Iv O A End cf Message C Data MF RX Mode TMMF TMRDS uncheck tor active low Zhi Control M siB2 LNZS0379 GRZ00002 gt Read FIFO Use Burst Mode 7 Close Updated Read Registers j pe to 1 ose slightly different Crystal Oscil ator
2. of NXP MIPI of MIPI Alliance Inc MIPS of MIPS Technologies Inc USA muRata of MURATA MANUFACTURING CO MICROWAVE OFFICE MWO of Applied Wave Research Inc OmniVision of OmniVision Technologies Inc Openwave Openwave Systems Inc RED HAT Red Hat Inc RFMD RF Micro Devices Inc SIRIUS of Sirius Satellite Radio Inc SOLARIS of Sun Microsystems Inc SPANSION of Spansion LLC Ltd Symbian of Symbian Software Limited TAIYO YUDEN of Taiyo Yuden Co TEAKLITE of CEVA Inc TEKTRONIX of Tektronix Inc TOKO of TOKO KABUSHIKI KAISHA TA UNIX of X Open Company Limited VERILOG PALLADIUM of Cadence Design Systems Inc VLYNQ of Texas Instruments Incorporated VXWORKS WIND RIVER of WIND RIVER SYSTEMS INC ZETEX of Diodes Zetex Limited Last Trademarks Update 2011 02 24 e infineon cerns Agreement INFINEON LICENSE AGREEMENT LICENSE INFINEON grants to you the right to use the enclosed software the SOFTWARE but not to sell rent transfer modify or copy it except as described in this agreement The SOFTWARE is owned and copyrighted by INFINEON and is protected by United States copyright laws and international treaty provisions You are welcome to 1 Copy the SOFTWARE solely for backup or archival purposes 2 Install or use the SOFTWARE internally including over your company network 3 Transfer the SOFTWARE if you keep no copies and the recipient agrees to the t
3. Note When using the operating mode run mode slave only the actual active configuration will be saved If more than one configuration is used it is recommended to use the save modes Save Difference or Save All to preserve all settings Save Difference All differences between the actual setting and the reset values of the chip are saved It will not be considered whether a configuration is active or not active in this setting This method includes all patched registers as listed in the appendix Save All All registers displayed in the register list are saved Save configuration All registers of a specific configuration are saved even if they are not page A B C touched by the actual setting This mode can t be used to retrieve an operational SPI configuration Infineon Technologies Page 48 of 55 2011 03 11 m Cinfineon TDA5240 35 25 Explorer Documentation Regardless of the save mode selection the chip mode control register is written as first sleep mode and as last write command of the output file A short description for the configuration can be entered in the textbox below the file selection box To open a configuration from a file press the left button to save a configuration to a file press the right button In the appearing open or save file dialog box the path and name of the target file can be selected Choose the desired type of file using the Files of type or the Save as t
4. channels are set to a valid frequency within the same frequency band If you change the actual frequency band selection and the active channels are not located within the new band the frequency of all channels is set to the default value of the new frequency band Differences for the TDA5225 There are no differences to the TDA5240 Explorer Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B A channel selection is not shown because there is only one receive channel available Infineon Technologies Page 25 of 55 2011 03 11 q in fi neon TDA5240 35 25 Explorer Documentation 3 2 8 Crystal Oscillator m Explorer Le m SIB2 Register Sg Wizard Registers Explore About s e gt Subgroup Selection 3 Crystal Oscillator and System Clock 10 A Configuration Selection a HE o XTAL Calibration XTAL Coarse XTAL Fine a Calibration pF Calibration i fie 625fF m 125fF FT 250fF M 500fF r Enable High Precision Mode during SLEEP Mode Extemal Clock Generation Unit IV Enable extemal clock generation unit Crystal Oscillator Frequency MHz 21 948717 Clock Divider 11 aH Constant system division factor 2 Resulting CLKOUT Frequency kHz 997 669 Chip Control Status siB2 LNZS0379 GRZ00002 zio Read FIFO Use Burst Mode 2 Close Q Updated Read Registers Write Registers Crystal Oscillator MHz 2
5. xo0 rrrrrrrr SFR A SIGDETSAT amp 04 w CMO OCC T MF SFR A WULOT 0x025 0 00 pnonpnppmpmnunrmu SFR A SYSRCTO 0x026 CTEM SFR_A_TOTIM_SYNC 0x027 VMM lv vol vv SFR_A_TOTIM_TSI 028 HOoOooooo SFR_A_TOTIM_EOM 029 ppmpppnpmrtn SFR A AFCLIMIT x02A rrrrrrmer SFR A AFCAGCD 0x028 DOOoOoooo SFR_A_AFCSFCFG 0x02C DODODOODRA SFR A AFCKICFGO 000 05001 iT Fr rr SFR A AFCKICFG1 00 of NTT T T TF T FF 4 gt SFR A AFCKZCFGO Ox02F x50 veri r SFR_A_AFCK2CFG1 oo Z Chip Control fste2 Nzso378 GRz0002 Qg A Refresh Open Close 3 Crystal Oscillator MHz 1548717 rires gt gt SFR_RSSIRX Ox00BAc x00 E Figure 20 Registers Tab 1 Register view selection area 2 Scroll bar 3 File Control 4 Find register area 3 41 Hegister Selection Area Register Grid This area gives you full access to all available registers Each marker checkbox for a bit can be set or deleted by clicking on it All changes you make in the wizard will also be made in the register tab and vice versa Note Manual changes in the register list are allowed in principle but not subject of input validation therefore an inconsistent setting might be generated Infineon Technologies Page 47 of 55 2011 03 11 a Cinfineon TDA5240 35 25 Explorer Documentation The register grid offers you several possibilities to perform settings and access registers 3 4 2 Grid sort Click the header of a column to sort the registers by name or address Leave th
6. Configuration Selection ge Chip control 2 Operating Mode Sleep Mode C Run Mode Slave C Self Polling Mode o nv high o Hold in register config Ee Mult CA CA Lim ERES contaron s B s AB Port Pin 2 Selection inv high p Selection A B C NINT rr co C AsB C D z us Port Pin 3 Selection inv high p RX RUN rr Init PLL after coming from HOLD Lock Data FIFO Init of FIFO at Init of FIFO at E L at EOM O Cycle Start iv Frame Start Enable SDO High Power Pad Config A Modulation Run Mode Slave Self Polling Mode Wake Up RunMode I ASK ASK ASK c FSK FSK FSK Coria Cc ASK FSK ASK RX RUN Configuration Enable Interrupt at signal NINT a mom dm MET O OV OI ETUR Iv A Frame Sync RM y I Active Level on PP2for Conf A External Data E No decian of functional blocks Y Active Level on PP3for Conf A lv O A Message ID Found ng Chip Data RX Mode TMCDS CRT M Q A End of Message C Data MF RX Mode TMMF TMRDS As acia las r Chip Control r Status SIE2 LNZ50379 GRZ00002 Jo Y Use Burst Mode Figure 3 Valuable Functions Tooltips Many input and output fields will give additional tooltip information a while after moving the cursor over this field This function is available on the Wizard Tab on the Register Tab and on the Explore Tab Infineon Technologies Page 15 of 55 2011 03 11 qa Cinfineon TDA5240 35 25 Explorer Documentation 3 1 General Control
7. MHz v al L Toguency 1 4 2 Figure 4 General Control 1 SIB amp Evaluation board selection 2 Virtual status indication LED 3 Register control buttons 4 Crystal oscillator adjustment Note e Functions from the Chip control selection 7 can be chosen from SIB2 menu bar e Functions from the Register control buttons 3 can be chosen from Register menu bar e The address format of the evaluation hardware is defined as follows SIB2 lt master board ID gt lt sub board ID gt If the master board should be addressed directly the sub board ID has to be replaced by the key BOARD Infineon Technologies Page 16 of 55 2011 03 11 q Cinfineon TDA5240 35 25 Explorer Documentation 3 1 1 Chip Control Choose your sub board from the chip control Selection combo box 1 If a SIB board is connected when the Explorer runs already you have to press the Refresh button to update the combo box Most calculations of the Explorer have the crystal frequency as an input variable For some special cases it is possible to adjust this input within a small range 4 If the entered value is not in the valid range of 10 kHz around the recommended crystal frequency of 21 948717 MHz the input field turns to red and the default frequency is used then When choosing a different frequency also the second IF at 274 kHz will be detuned This can be compensated by adjusting the RF channel frequency When changing the crystal fr
8. N Save Mode Save Active y 9 SFR A PLLINTC2 oop oO Irwvivri iB SFR A PLLFRACOC2 aoe Q3 CMO OOO lem SFR A PLLFRACTC2 Gor o3 MEME PTW SFR A PLLFRAC2C2 ooo 018 DOCEREN SFR A PLLINTC3 0061 00 TI Tr rr vivNvr v SFR_A_PLLFRACOC3 0062 028 PF FMP wI ivi Note Manual changes inthe register ist SFR_A_PLLFRACIC3 0083 oF MEEME are allowed in principle but not subject of SFR A PLLFRAC2C3 noe oap LT T TT TF RF Uo cer ES SFR_SFRPAGE oo oo PORT SFR_PPCFGO 0081 0563 TMT MLW SFR_PPCFG1 0x082 x12 DODOM DOMO SFR_PPCFG2 0083 0x00 poagEnmEmnmnrmnrp SFR RXRUNCFGO Dos OFF MMV Vw SFR_RXRUNCFG1 085 kFF viv lv rv lv iv iv SFR_CLKOUTO 0086 008 PEFFWMFTVV SFR_CLKOUT1 0087 00 DONT SFR_CLKOUT2 008 00 I rrrrrrr SFR_RFC 0089 007 II I I rNvvNM SFR BPFCALCFGO aoa 07 CIPO OR ew SFR_BPFCALCFG1 k08B x04 poanmpmmnmmmnrmn SFR XTALCALO wsc on TI I vrrrr SFR XTALCAL1 DODODOODODO Chip Control sisz LNZ50379 GRz0002 19 gt gt 23 registers read FR_NPWR 0x00BD Refresh Dpen Close Si FR RSSIRX x00BA Figure 22 Find Register Area If a name of a register is filled in the textbox 6 a marker will be set at the position of the register 5 The marker position is always updated when registers are modified So it is easy to find the register that belongs to a setting on the Wizard pages by change the setting and switch to the Registers tab afterwards When the last operation was a calculation the marker points to the last regis
9. PATTERNA1 8 bit parallel TSI mode pattern A e PATTERNB 1 8 bit parallel TSI mode pattern B e PATTERNA2 8 bit TSI gap mode pattern A e PATTERNB2 8 bit TSI gap mode pattern B e PATTERNAG 8 bit extended TSI mode pattern A e PATTERNB3 8 bit extended TSI mode pattern B e GAPTIME Transmitted gap time input field for TSI gap mode default is zero e TSIGAPOVERRIDE Override checkbox to enabled TSI gap register values manually default is unchecked e TSILENA TSI length for TSIA e TSILENB TSI length for TSIA e WCA Wildcards at the end of TSIA e DLLIMIT Payload Data Length Limit for TSIA e DLLIMITB Payload Data Length Limit for TSIB The TSI patterns are stored as persistent variables to allow comfortable entering of different TSI modes for testing purpose during run time of the software Patterns are stored independently of the entered TSI length It is allowed to enter different patterns for different TSI modes but only the pattern information for the active TSI mode will be store to a configuration file The TSI pattern for the active TSI mode is reflected in the register settings On a change of the TSI mode the affected registers are set to the new values If no pattern information was found in the loaded Infineon Technologies Page 37 of 55 2011 03 11 q Cinfineon TDA5240 35 25 Explorer Documentation configuration file the default value for the TSI pattern will be set using the TSI pattern register content Differences
10. Slave C Self Polling Mode LOW lt A mi Ei Hold i Port Pin 1 Selection inv high p config See o CA DATA mim Normal Operatic Configuration LE C AB Port Pin 2 Selection inv high p Ce C ABC ME SEE CD C A B C D Port Pin 3 Selection inv high p RX_RUN SI Init PLL after coming from HOLD ee AS fede Enable SDO High Power Pad Contig A Modulation Run Mode Slave Self Polling Mode Wake Up RunMode e ASK ASK ASK c FSK FSK FSK Contig A c ASK FSK ASK RX RUN Configuration Enable Interrupt at signal NINT c FSK ASK FSK IV Active Level on PPOfor Conf A Vv O A Wake Up Y Active Level on PP1 for Conf A c Sum V Active Level on PP2 for Conf A External Data No deactivation of functional blocks a EU O A Message ID Found Processing Chip Data RX Mode TMCDS Chock jor aevo Fa Iv A End cf Message C Data MF RX Mode TMMF TMRDS uncheck for active low lv O AFrame Sync Chip Control Status siB2 LNZS0379 GRZ00002 Read FIFO Y Use Burst Mode 9 or ec Read Registers Write Regist Crystal Oscillator MHz 27528717 ndo Pond Peg 3 B dl Figure 7 Wizard Page 1 Master Control Unit This Wizard tab allows you to configure e Operating mode e Modulation type selection e Port Pin output signals e Interrupt masks For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet Depen
11. for the SPI configuration file When loading a configuration from a SPI configuration file the user interface will be set to the default values of the chip It is presumed that the SPI configuration file contains already entries for patched registers Register Name SFR_A_AFCK1CFGO SFR_A_AFCK2CFGO SFR_B_AFCK1CFGO SFR_B_AFCK2CFGO SFR_C_AFCK1CFGO SFR_C_AFCK2CFGO SFR_D_AFCK1CFGO SFR_D_AFCK2CFGO SFR_A_CDRRI SFR_B_CDRRI SFR C CDRRI SFR D CDRRI SFR PPCFGO SFR A TSILENA SFR B TSILENA SFR C TSILENA SFR D TSILENA SFR A SYSRCTO SFR B SYSRCTO SFR C SYSRCTO SFR D SYSRCTO Infineon Technologies Absolute Address Value Page 53 of 55 2011 03 11 q Cinfineon TDA5240 35 25 Explorer Documentation 5 2 SPI Configuration File Format The standard file format for saving and loading TDA5240 35 25 configurations has an easy to parse format for direct usage in target applications and is formatted as plain ASCII text The output consists of a header section and a SPI write command section Changes of the header are not allowed if you indent to reuse the file with the Explorer software It is allowed to add comments to the SPI write command section but for changes of the register values it has to be considered that they are not subject of input validation and therefore an inconsistent setting might be generated The header section starts with the parser version information the login name of the current user and a timestamp that shows wh
12. given in the tooltip for this input field Infineon Technologies Page 32 of 55 2011 03 11 Ae Cinfineon TDA5240 35 25 Explorer Documentation SIB2 Register Wizard Registers Explore About Subgroup Selection 5 Digtal Receiving Ut a Configuration Selection Config A Enter Datarate Bits s DELOG RSSI configindependent y Peak Memory Filter 2000 RSSI Offset Compensation EA NAAA IV Auto Configure Fiter 1 ChipiBit J 2 Chip Bit Po UE AAA RE I Attack Up Time Ibi 12 Oversampling a RSSI Slope Compensation Attack Factor 2 5 Factor 30 AFC Start Config OFF y Dp uh us Filter Settings Decay Down Time bit pS Configure Raw DATA Slicer Ao Taos Al Decay Factor 24 v Band Pass Filter Bandwidth Predemodulation Bandwidth IE z T BW selection 1732 analog Bw digital Bw Settling Time bits 5 3 300 kHz eee Bw sel scaling Anti Aliasing Filter porz vjr oo Logging TDA5225 Init PMF at EOM E Inver data for ext Processing r Chip Control siez LNZS0268 GRZ20245 y Q RV Use Burst Mode Register download gt OK 14 registers written gt gt Starting burst mode register download Refrest Oper Close O Updated gt gt Device SIB2 LNZS0268 GRZ20245 TDA5225 initialized Read Registers Write Registers NextGen intemal TDA5240RegisterController Crystal Oscillator MHz 2134871
13. ia me Figure 18 Wizard Page 10 AGC AFC This Wizard tab allows you to configure e AFC Automatic Frequency Control Settings e AGC Automatic Gain Control Settings For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet This page is the last page of the wizard If this page is reached the configuration is ready to be written to the chip This can be done by pressing the Write Registers button in the chip control area Dependencies The data rate setting of Wizard Page 5 Digital Receiving Unit is used for the calculation of the AFC filter coefficients Infineon Technologies Page 42 of 55 2011 03 11 oo Cinfineon TDA5240 35 25 Explorer Documentation Calculations If the auto configuration of the AFC filters is activated you can configure the AFC filter coefficients by choosing one of the predefined settling time values The warning message For a proper function of AFC it is recommended to change the LO injection side or to use a smaller AFC limit value appears in case the AFC would possibly need to change the Integer value of the LO multiplication factor Therefore the warning gives possible solutions for this case Interactivity Changes of the AFC AGC settings can be done only if the AFC AGC unit is not switched off Persistent variables Beside the content of the registers affected by this page these inputs will be stored additional
14. ideal sampling point DN v C A End of Message Optimization Optimal for minimal jitter at DATA output signal uncheck for active low Next gt Chip Control Status SIB2 LNZS0268 GRZ20030 zig Read FIFO Y Use Burst Mode 2 Close Q Updated Read Registers Write Registers J 5 Ee Choose slightly different Crystal Oscillator MHz 1 94877 E prepn a Figure 8 Wizard Page 1 Master Control Unit minimal jitter at DATA output signal Infineon Technologies Page 22 of 55 2011 03 11 m Cinfineon TDA5240 35 25 Explorer Documentation Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B Infineon Technologies Page 23 of 55 2011 03 11 Cinfineon 3 2 2 RF PLL TDA5240 35 25 Explorer Documentation n Y Explorer gt SIB2 Register Q Wizard Registers Explore About N iD lt gt Subgroup Selection 2 RF PLL A Configuration Selection 2 lt gt la F Config A Config B Config C Config D o Possible EMI Source 1 MHz Possible EMI Source 2 MHz o El Band Selection 315MHz ata 21 5 Nr of Channels Receive Frequency Channel 1 MHz 1317 973987 C Channel 1 Receive Freguency 312 989986 C Channel 142 Channel 2 MHz r Spur mixed with 1x LO cannot be Spur mixed with 1x LO cannot be eliminated by changing the injection eliminated by changing the injection side thus the crystal frequency m
15. 1 948717 Lj rune a o Resd Register SFR_RSS 1 y Figure 10 Wizard Page 3 Crystal Oscillator This Wizard tab allows you to configure e XTAL Calibration Trimming for fine trimming the crystal frequency e External Clock Generation For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet Dependencies This page does not have dependencies from other pages Calculations The CLKOUT frequency is calculated from the crystal oscillator frequency and the given clock divider factor The resulting frequency is displayed for informational purposes only The crystal oscillator frequency can be altered slightly in the chip control section 7 Infineon Technologies Page 26 of 55 2011 03 11 q Cinfineon TDA5240 35 25 Explorer Documentation By activating the check box Choose slightly different Crystal frequency the crystal oscillator input field turns to writable You are allowed to enter values within a range of 10 kHz compared to the default crystal oscillator frequency Persistent variables Beside the content of the registers affected by this page this input will be stored additionally in the configuration file e XTAL The crystal oscillator frequency default is 21948717 Hz Differences for the TDA5225 There are no differences to the TDA5240 Explorer Differences for the TDA5235 There are no differences to the TDA5240 Explorer Infine
16. 7 M Choose siohty diferent Figure 13 Wizard Page 5 Digital Receiving Unit TDA5225 Oversampling for minimal jitter at DATA output signal Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B Infineon Technologies Page 33 of 55 2011 03 11 Cinfineon TDA5240 35 25 Explorer Documentation 3 2 6 Clock Data Recovery gt Explorer lh SIB2 Register g Wizard Registers Explore bout N 5 E lt Subgroup Selection 6 Clock Data Recovery 1 A Configuration Selectig a F Config A Config B Config C Config D o Easy default C Advanced 8 Select predefined CDR setting P Loop Configuration 1 Loop Configuration Zero Tube Slicer Settings E Fast default Vets VEIT on Peak Detector slew rate lime 4 16 bit y 2 16 bit Y r 7 C Normal jup 1 32 down 1 256 v c Value Value EX 172 me PDE inner tolerance range Loop Filter Saturation Slicer Configuration Disabled Enabled 2 16 bit y Chip Mode EOM CV defa _v EDE DLL Correlator output value Disabled J Enabled E e CDR Runin amp Dutycycle RUNIN Length 6 chips y Chip Border Low Level Chip Border High Level Enable Data Rate Acceptance 4 1 Data Rate Acceptance Threshold Bit Border Low Level Bit Border High Level Positive Negative 6 3 30 35 Maximum length of code violation within datapacket lt 1bit 11bit gt Timi
17. A Wake Up Active Level on PP1 for Conf A IV OAFrame Syne IV Active Level on PP2 for Conf A External Data No deactivation of functional blocks I Active Level on PP3 for Conf A Y A Message ID Found Processing Chip Data RX Mode TMCDS eee F Check for active high A End of Message C Data MF RX Mode TMMF TMRDS perdon a O Chip Control r Status SIB2 LNZS0379 GRZ00002 Y Read FIFI Iv Use Burst Mode I Open Ci Updated Read Register Write Register ue IER ose sity deret Figure 2 Wizard Startpage TDA5240 35 25 tab Logging tab Wizard tab Registers tab see chapter 3 4 Explore tab see chapter 3 3 About tab eV SP PS Infineon Technologies Page 14 of 55 2011 03 11 enini Cinfineon TDA5240 35 25 Explorer Documentation There are 2 major areas in this software which can be easily accessed by their corresponding tabs e TDA5240 35 25 tab 1 for o Configuring the device by using the wizard 3 Chapter 3 2 o Viewing the register content in the Register tab Chapter 3 4 o Communicating with the device in the Explore tab Chapter 3 3 e Logging tab 2 for viewing the log file Chapter 4 Getting additional information about available functions x Explorer SIB2 Register Q Wizard Registers Explore About N 2 lt gt Suboroup Selection 1 Master Control Unit 0 A gt
18. C E C VDDD 2 iz 500 a End of Conversion detected Run Signal Power 0 1 QD Low FSK Noise Power Automatic NINT detection and further payload processing Received packets max 512 e 100 e 100 EE Of mm On 200 200 0 7 dins 0 m s Expected payload Ox 00 Expected bits 0 NC Peak Detector Payload Peak Detector s Em Mis 100 200 100 200 0 at ta 0 T e RSSI PMF e RSSI PMF 9 a C RSSIRX AVG 200 C RSSI Peak WU 0 E ON Received Interrupts 0 Processed Messages 0 _Reset Correctly received payload data 0 Copy Chip Control SIB2 LNZ50379 GRZ00002 10 mia Retes Tose Q Updated Wie Registers Crystal Oscillator MHz 21 948717 slightly different Read Registers q i Figure 19 Explore Page Status This Wizard tab shows readout values of e ADC Result e FSK Noise Power e Signal Power e Payload Peak Detector e Peak Detector e Serial number SPI checksum address and data tracer General Chip Info Infineon Technologies Page 44 of 55 2011 03 11 a Cinfineon TDA5240 35 25 Explorer Documentation Following functions can be triggered on this page e AFC AGC Manual Freeze e Force End of Message EOM and Time out Timer TOTIM Readout The controls are updated on each press of the Read Registers button in the chip control area Reading registers is possible with connected and opened evaluation hardware only You can perform a continuous read
19. Documentation Interactivity The IF buffer can be set independently from the number of desired IF filters The tool gives a proposal for enabling or disabling the IF filter when selecting the number of IF filters Differences for the TDA5225 There are no differences to the TDA5240 Explorer Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B Infineon Technologies Page 29 of 55 2011 03 11 qa Cinfineon TDA5240 35 25 Explorer Documentation 3 2 5 Digital Receiving Unit Explorer LO SIB2 Register Q Wizard Registers Explore About N 5 3 2 Subgroup Selection 5 Digital Receiving Unit v Q A Configuration Selection a F Config A Enter Datarate Bits s DELOG Peak Memory Filter a pwo A lla Sj 1 ChipBit Y 2Chiplei p i Up ie bar hz RSSI Slope Compensation Attack Factor 275 AFC Start Config OFF a To Filter Settings Decay Down Time bit 37 zu Raw DATA Slicer IV Auto Configure Filters D E actor ERE 3 M Auto Configure BW selection 1 32 Band Pass Filter Bandwidth Predemodulation Bandwidth ee z x Init PMF at EOM orloss of Sync analog BW digital BW Settling Time bits fis ES 300kH BW sel scaling 1 4 y zl 282kHz ad AS Digital Receiver Expected typical Jitter amp DATA unco aor Encoding Type for Decoder Anti Aliasing Filter x L E 5 settling time
20. ON proprietary rights in the SOFTWARE TERMINATION OF THIS LICENCE INFINEON may terminate this license at any time without notice if you fail to comply with any term or condition of this Agreement You agree upon termination to promptly destroy the SOFTWARE including all copies or updates Infineon Technologies Page 3 of 55 2011 03 11 Cinfineon ______ Introduction Table of Contents 1 INTrOCUCH ION e 5 1 1 Hardware and Software Components siii iii 5 1 2 Installation Up AN cee eee 5 A A 9 User Interface and Getting Started cssssssssssseesseeesenesseesseeesenesseeeseesenesseesseeneneeseeenees 13 2 1 Infineon Evaluation Software Startup Screen oooonoconncconccnoccnonnconccnonnnnnnnnnnnnnnnnnrnnnnnnnnnnnnns 13 2 2 Starting TDA5240 35 25 Explorer uides uns treo iia 13 TDA5240 35 25 B12 Explore i ssisciietaiesetasecadsdecndscedveveveseasetacetecdiondsaiedidcccet ceveiededadcauddduederevestaee 14 B HVS e e aE 16 A e o 17 3 1 2 SIB System Interface Board Status oooconocccinocccioncconocnnonncononnnnnnnnnnnnnnnnannnnnnnnnnos 17 3 1 3 Updatirig Registers cna cee a Sa 17 ME p 19 d Master Control Un e a ice aa 21 322 n enm e RoR ON NPT NEE 24 3 2 3 Crystal Oscillator PN 26 324 JRE IF Frontend puma 28 3 2 5 DigitalFieceiving Ulla st 30 32 6 Clock Dala ecos RETE 34 3 2 7 Frame Synchronization a 36 32 8 Message ID voii 39 3 2 9 Polling Timer U
21. R_A TSILENA 0x01 TSI Length Register A Write SFR_PPCFGO 0x53 PPO0 and PP1 Configuration Register Write SFR CMCO 0x12 Figure 24 SPI Configuration File Example Infineon Technologies Page 55 of 55 2011 03 11
22. SIB 2 0 Server Setup TDA5240 B12 Explorer TDA5235 B12 Explorer TDA5225 B12 Explorer Start Button eS as eS 2 2 Starting TDA5240 35 25 Explorer 1 Choose TDA5240 B12 Explorer the TDA5225 B12 Explorer or the TDA5235 B12 Explorer on the NEXTGENLOADER pad 4 2 Click the Start button 5 3 A splash screen is displayed during application loading Infineon Technologies Page 13 of 55 2011 03 11 Oo m Cinfineon TDA5240 35 25 Explorer Documentation 3 TDA5240 35 25 B12 Explorer Ar5pre6 ht k N Regi Q Wizard Registers Explore About A 2 lt gt Suboroup Selection 1 Master Control Unit 10 A z Configuration Selection B Ghip control Port Pin Output Signal 2 Operating Mode Port Pin O Selection inv high p Sleep Mode C Run Mode Slave Self Polling Mode LOW rr 8 Hold Port Pin 1 Selection inv high p E e CA CA paa rr Normal Operatic Contauration C c MS Port Pin 2 Selection inv high p c A B C par rr CD C ABCD OL Port Pin 3 Selection inv high p RX RUN rr Init PLL after coming from HOLD Lock Data FIFO Init of FIFO at Init of FIFO at m at EOM rH Cycle dd Frame Start Stat Enable SDO High Power Pad Config A Modulation Run Mode Slave Self Polling Mode Wake Up RunMode c ASK ASK ASK c FSK FSK FSK Contig A c ASK FSK ASK RX RUN Configuration Enable Interrupt at signal NINT c FSK ASK FSK IV Active Level on PPO for Conf A Vv O
23. Server Setup Wizard The Setup Wizard will install Infineon SIB 2 0 Server on your computer Click Next to continue or Cancel to exit the Setup Wizard 5 You need to install all Software components shown here except of SP3x PMA5110 Extension After choosing the required software components A please click on the Next button o Select the way you want features to be installed Cinfineon Click the icons in the tree below to change the way features will be installed a 20 2 0 Server Setup Select the features to install 7 B 2 0 Server Main Files S 3x PMA5110 Extensio A5240 Extension 8 Driver This feature requires OKB on your hard drive It has 4of 4 subfeatures selected The subfeatures require 6581KB on your hard drive Infineon Technologies Page 10 of 55 2011 03 11 Gnfineon Introduction 6 Click on the Install button to install the software on your computer Ready to install Infineon SIB 2 0 Server Cinfineon Click Install to begin the installation Click Back to review or change any of your installation settings Click Cancel to exit the wizard 7 A progress bar indicates the setup progress now Installing Infineon SIB 2 0 Server Cinfineon Please wait while the Setup Wizard installs Infineon SIB 2 0 Server Status Copying new files l Infineon Technologies Page 11 of 55 2011 03 11 Cinfineon ___ Intr
24. SmartLEWIS RX TDA5240 35 25 Explorer Configuration and Evaluation Software B12 6 51 High Sensitivity Receiver with Digital Baseband Processing 1 DA5240 35 7 Digital Slicer 5225 USER MANUAL v51 Wireless Control Infineon Technologies Never stop thinking a Cinfineon 5 5 1 1 1 1 Document Change History Document Reference 14 evaluationveval environment TDA5240 B12 Explorer CustomerDoc umentation Document Scope Explorer Software Version 51 Document State Released Date 3 11 2011 Security Level Public Document Change History Date Version Author Change Description 03 09 2008 1 0 Christoph Schertz Initial version 07 10 2008 1 24 Gerwin TOC amp Numbering Installer description Register grid amp Fleischmann Load store configuration description 07 11 2008 1 30 Gerwin Wizard status page update Fleischmann 11 11 2008 1 31 Gerwin Explorer page update Fleischmann 01 04 2009 1 4 Wolfgang Manual update to Explorer A12 4 43 Schickbichler 24 11 2009 1 5 Gerwin Manual update to Explorer B12 6 06 Fleischmann Manfred Eder 03 03 2010 1 6 Gerwin Manual update to Explorer B12 6 20 Fleischmann Manfred Eder 28 04 2010 1 7 Gerwin Manual update to Explorer B12 6 33 Fleischmann Manfred Eder 19 5 2010 1 7 Manfred Eder Also valid for Explorer B12 6 34 3 11 2011 51 Michael Fidler Manual update to Explorer B12 6 51 new Inst
25. aller Manfred Eder based on WIX Trademarks of Infineon Technologies AG AURIX C166 CanPAK CIPOS CIPURSE EconoPACK CoolMOS CoolSET CORECONTROL CROSSAVE DAVE EasyPIM EconoBRIDGE EconoDUAL EconoPIM EiceDRIVER eupec FCOS HITFET HybridPACK I7RF ISOFACE IsoPACK MIPAQ ModSTACK my d NovalithIC OptiMOS ORIGA PRIMARION PrimePACK PrimeSTACK PRO SIL PROFET RASIC ReverSave SatRIC SIEGET SINDRION SIPMOS SmartLEWIS SOLID FLASH TEMPFET thinQ TRENCHSTOP TriCore Other Trademarks Advance Design System ADS of Agilent Technologies AMBA ARM MULTI ICE KEIL PRIMECELL REALVIEW THUMB yVision of ARM Limited UK AUTOSAR is licensed by AUTOSAR development partnership Bluetooth of Bluetooth SIG Inc CAT iq of DECT Forum COLOSSUS FirstGPS of Trimble Navigation Ltd EMV of EMVCo LLC Visa Holdings Inc EPCOS of Epcos AG FLEXGO of Microsoft Corporation FlexRay is licensed by FlexRay Consortium HYPERTERMINAL of Hilgraeve Incorporated IEC of Commission Electrotechnique Internationale IrDA of Infrared Data Association Corporation ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION MATLAB of MathWorks Inc MAXIM of Maxim Integrated Products Inc MICROTEC NUCLEUS of Mentor Graphics Corporation Mifare
26. aller package In case a previous version of the TDA5240 35 25 Explorer is detected a warning to remove the old version will be displayed Infineon Technologies Page 5 of 55 2011 03 11 Gnfineon Introduction 6 The setup wizard appears Press the Next button to proceed with the installation Welcome to the TDA5240 35 25 E fi The installer will guide you through the steps required to install TDA5240 35 25 Explorer on your computer WARNING This computer program is protected by copyright law and international treaties Unauthorized duplication or distribution of this program or any portion of it may result in severe civil or criminal penalties and will be prosecuted to the maximum extent possible under the law 7 f custom installation path is desired enter it now Press the Next button to proceed with the installation Select Installation Folder Infineon The installer will install TDA5240 35 25 Explorer to the following folder To install in this folder click Next To install to a different folder enter it below or click Browse Folder C Program Files Infineon Technologies TDA5240 Family Explorer Disk Cost Cancel lt Back Next Infineon Technologies Page 6 of 55 2011 03 11 Gnfineon Introduction 8 Read the license agreement carefully and accept it to proceed with the installation Select the check box button I accept and press the Next button to
27. ation 3 2 Wizard Gaining efficiency by using the wizard If you are running this software for the first time it is recommended to use the Wizard to generate your first configurations Please apply the wizard pages in sequential order as input values of following wizard pages can depend on values from previous pages The Wizard offers you easy access to the registers of the TDA5240 35 25 and makes your first steps more comfortable 1 2 5 Explorer cai SIB2 g Wizard N 5 2 lt gt Suboroup Selection 1 Master Control Unit A Configuration Selection B Ghip control Port Pin Output Signal Operating Mode Port Pin O Selection inv high p C Sleep Mode C Run Mode Slave Self Polling Mode Low Sa R a TE Port Pin 1 Selection inv high p in regis EM pestle oe s LU a DATA rr lul E ie s Nemal Oper Configuration g E m Port Pin 2 Selection inv high p NINT rr z E C ABCD OO Port Pin 3 Selection inv high p RX RUN rr Init PLL after coming from HOLD m i ines sik zijn 7 Enable SDO High Power Pad Config A Config B Confia C Modulation I c Config A Config B Config C FSK ASK RX RUN Configuration Enable Interrupt at signal NINT c ASK FSK V Active Level on PPOfor Conf A I O A viske Up V Active Level on PP1 for Conf A lv O A Frame Sync A I Active Level on PP2for Conf A B Pr RICH ECCE I Active Level on PP3 for Conf A O A Me
28. can be r Bypass AAF for eue besote aa increased Manchester RSSI pin Invert data for ext Processing 7 Invert Baseband Chip Data Signal and Noise Detector Settings Signal Recognition See Signal Detector Thresholds Signal Detector Selection FSK Noise Detector Fenaa seo relerio scoroncte o Nole Run Mode Counter Level SIGDETO 1 range sel factor Threshold Range Sel Disabled v 0 for FSK for ASK 0 2 7 de_y Signal detection Squelch only f Wakeup Counter Level 8 defaull 8 7 defe v Threshold Level C Noise detection only AE Disabled v 0 3 8 default y Signal and noise detection simultaneously SIGDETLO Level SIGDETLO range sel fac Peak Detector Slew Rate Signal and noise detection simultaneously SIGDETLO 0 8 y 1 32 default Y Source of SPWR Readout Register SIGDET 0 1 g SIGDETLO Next gt Chip Control SE SIB2 GRZ10004 10 Read Fl IV Use Burst Mode Refresh Open Updated Crystal Oscillator MHz 21 34877 r ep i 7 2 du Figure 12 Wizard Page 5 Digital Receiving Unit This Wizard tab allows you to configure e Datarate e Resulting FSK ASK Settings e Filter Settings e RSSI Slope and Offset Compensation e Peak Memory Filter PMF e RAW Data Slicer DATA output e Digital Receiver functions e Signal Recognition Thresholds Signal Detector FSK Noise Detector For information beyond the quick help tooltip moving the mouse pointer on a sele
29. cted item refer to the official datasheet Infineon Technologies Page 30 of 55 2011 03 11 oo Cinfineon TDA5240 35 25 Explorer Documentation Dependencies The Wizard Page 10 AGC AFC depends on the Wizard Page 5 Digital Receiving Unit Most calculations on this page and enabling disabling of some controls depend on the selected modulation type on page Wizard Page 1 Master Control Unit Calculations By entering a value in the data rate field the recalculation of all related registers is initiated A new value becomes valid when you enter the data rate and press the return key afterwards when you change the data rate by pressing the up or down button or if you entered the data rate and the input field looses the focus The calculation is not done during entering number in the data rate field Input variables for the data rate calculation are e The data rate input field e The chips per bit switch e The modulation type setting e Analog and digital filter settings e External processing selection DATA matched filter output mode Changing one of the input variables for the data rate calculation will also force a recalculation The automatic calculation of the best fitting digital filter bandwidth is done by default If you want to select the digital filter bandwidth manually you have to uncheck the Auto Configure Filters checkbox The settings of the RSSI slope and RSSI offset compensation are translated to the corresponding
30. d a warning will be displayed in the SIB status box A message box appears and you will be asked whether you want to reload the actual Explorer configuration to the chip Choose Yes to download the settings of the actual configuration This will bring the chip to a state where its settings represent exactly the settings of the Explorer software If you choose No the chip will be reset but no configuration is transferred to it The configuration of the Explorer will be set to the default register settings Any former setting gets lost unless you saved it to a SPI configuration file When downloading the register settings the first time a set of registers is written additionally to these which were affected by the settings you made These registers are listed in the appendix see 5 1 Register patch list and they are written to equalize the default state of hardware and software All write operations done by the Explorer are mapped to the SPI configuration file therefore all settings you produce while experimenting using the Explorer are available in the output file regardless how often you change and download a setting to the chip 3 1 3 Updating Registers Changes in the configuration can be transferred to the chip by pressing the Write Registers button If there is any difference in the actual configuration between the user interface and the hardware the LED Updated indicated this by a red color After a successful update of the
31. dencies The Wizard Page 5 Digital Receiving Unit depends on the Wizard Page 1 Master Control Unit A change of the modulation type selection or a change of the external data processing selection has an impact on the calculation of the register values for the data rate At least one of the port pins must be set to output DATA to make the setting for the raw data slicer available on wizard Infineon Technologies Page 21 of 55 2011 03 11 eni in fi neon TDA5240 35 25 Explorer Documentation page 5 The buttons Force EOM and Force TOTIM on the Explore page are operational only if external data processing is set to Chip Data or MF Data This page allows you to set the available configurations This has an impact on all pages that contain a configuration selection tab Interactivity The available configurations and modulation types depend on the selected operating mode Only the currently possible configurations and modulation types are visible and enabled If the option Lock Data FIFO at EOM is checked the option Init of FIFO at Cycle Start gets inactive and vice versa Differences for the TDA5225 The selection for external data processing and FIFO related control bits not available The content of the port pin output signals is limited to the signals supported by the TDA5225 It is only possible to select the interrupt mask for a wake up When using the DATA output signal like in a TDA5225 this DATA out
32. e mouse pointer above a column of the grid to popup a tooltip containing the full name of the register Double click the content of the Value column to enter the edit mode of the value of a register Enter a valid hexadecimal number in c style format with a leading Ox to set the register to a new value Click into the columns 0 to 7 to change a single bit of a register The hexadecimal value field will be updated automatically Whenever a register value is changed on one of the wizard pages the pointer in the register list is set to the corresponding register address You can check the setting by switching from the wizard page to the register page after entering a value on a wizard page If an input forces a calculation and or more than a single register is affected then the pointer marks the last register that was affected by the operation Scroll Bar The register set is very large scroll up and down in normal Microsoft Windows behavior 3 4 3 File Control Saving and loading of register sets can be done here You have several options by selecting the drop down menu Save Active All differences between the active configurations A B C D of the setting and the reset values of the chip are saved Only patched registers of the active configurations will be saved When reloading a configuration that has been save using this mode the patched registers for the inactive configurations are merged with the loaded registers
33. eceiving UnitFDEVMINA 10 Wizard 4 Digital Receiving UnitCHIPSPERBITA 1 Wizard 5 RF IF FrontendAUTOCONFA 1 Wizard 4 Digital Receiving UnitAUTOCONFA 1 Wizard 4 Digital Receiving UnitAUTOCONF SLICERA 1 Wizard 4 Digital Receiving UnitSTIMEA 15 Wizard 10 AGC AFCFOFFSETMAX 10 Wizard 10 AGC AFCAUTOCONFA 1 Wizard 10 AGC AFCSTA 1 Wizard 10 AGC AFCRATIOA 10 Wizard 6 Clock Data RecoveryCVA 1 XTAL 21948717 Wizard 7 Frame Synchronization UnitPROTOCOL NAMEA Wizard 7 Frame Synchronization UnitTSILENA6A 1 Wizard 7 Frame Synchronization UnitDLLIMIT1A 256 Wizard 7 Frame Synchronization UnitPATTERN16A 0 SAVEMODE Save Active A END Write SFR CMCO 0x00 Write SFR A SIGDETSAT 0x42 Signal Detector Saturation Threshold Register Write SFR A SYSRCTO 0x7C Synchronization Search Time Out Register Write SFR A AFCSFCFG 0x01 AFC Start Freeze Configuration Register Write SFR A AFCK1CFGO 0x50 AFC Integrator 1 Gain Register 0 Write SFR A AFCK2CFGO 0x08 AFC Integrator 2 Gain Register 0 Write SFR A PDECF 0x10 Pre Decimation Factor Register Write SFR A PDECSCFSK 0x2A Pre Decimation Scaling Register FSK Mode Write SFR_A PDECSCASK 0x28 Pre Decimation Scaling Register ASK Mode Write SFR_A SRC 0x02 Sampe Rate Converter NCO Tune Write SFR_A EXTSLC 0x0B Externel Data Slicer Configuration Write SFR_A CDRRI 0x02 Clock and Data Recovery RUNIN Configuration Register Write SF
34. ed press the Close button to terminate the setup application Installation Complete In fi neon TDA5240 35 25 Explorer Setup Wizard has successfully finished Click Close to exit Cancel lt Bad Infineon Technologies Page 8 of 55 2011 03 11 Gnfineon Introduction Installing SIB 2 0 Server The SIB 2 0 Server offers communication services and protocol handling for compatible interface boards SIB2 UWlink The Explorer software can be used without SIB 2 0 Server for creating configurations only With the SIB 2 0 Server and an interface board you are able to download the configuration to the chip To verify it status registers and FIFO can be read on the Explore page NOTE SIB 2 0 Server setup is automatically done during installation of the Explorer software Anyhow the manual installation procedure is described below 1 Start installed Explorer software from the start menu Start gt Programs Infineon Technologies gt TDA5240 35 25 Explorer 6 xx x ri 1045225B12 TDA5235 B12 TDA5240 B12 Explorer Explorer Explorer 2 Choose SIB 2 0 Server Setup 3 Click the Start button Infineon Technologies Page 9 of 55 2011 03 11 Cinfineon ______ Introduction 4 The setup wizard appears Press the Next button to proceed with the installation Notice If a User Account Control dialog appear press the Yes button to continue installation Welcome to the Infineon SIB 2 0
35. egister values for the wake up level observation time the Sync Search Time out and the time out timers The input field of the timing group allows you to configure the on off timing whereas these timer values are multiple of the reference timer If the reference timer changes the values for the on time are set to the next higher time that fits and the value for the off time is set to the next lower time that fits The resulting polling period field shows the time TwasterPeriog Which is calculated as described in the figures of the Polling Timer Unit chapter of the official datasheet Interactivity This page stays disabled until you select the operating mode Self Polling on Wizard Page 1 Master Control Unit The on time input fields are displayed in dependency of the active configurations and the selected self polling mode The available input field of the wake up detection group depends on the selection of the wake up criterion and if a data criterion is selected also on the activation of ultra fast fallback to sleep Differences for the TDA5225 No change of the self polling mode and no selection on different wake up criteria is possible with the TDA5225 Explorer Also no Sync Search Time out and time out timers are available for the TDA5225 Explorer Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B There is only one channel available in the wake up selection section Infineon Technologie
36. elf Polling Mode after TOTIM Time Base On Time Cfg A ms 0 0029 Sure Time nel a aoe detected in Run Mode Self GCRT MIRT Ims pass oo Polling Disabled Enabled 0 0029 On Time Cfg B ms 0 0029 Config Channel Hop Y Cont A Nett Time ms Continue with next Config in mm Self Polling Mode after EOM A 0 111 Off Time ms On Time Cfg C ms 0 0029 detected n fun Mode Self Polling Period ms Next 0 0023 On Time Cig D Ims 0 0029 jns Cont A Contig Chip Control Status siB2 GRZ10004 zig ead Fl Use Burst Mode Refresh Open y DIGNE Cho diffi Fead Register Crystal Oscillator MHz 21328717 IT me Sent NNNM L A Figure 17 Wizard Page 9 Polling Timer Unit This Wizard tab allows you to configure e Self Polling Mode e Wake up detection e Timing adjustments for autonomous chip operation mode For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet Dependencies The number of selected RF channels per configuration has influence to the calculated polling period The value for register SYSRCTO is calculated from the selected number of RUNIN chips from Wizard page 6 Clock Data Recovery Infineon Technologies Page 40 of 55 2011 03 11 q Cinfineon TDA5240 35 25 Explorer Documentation Calculations This page integrates calculations for the polling timer unit the r
37. en the configuration file has been created The next line gives information about the software that was used to create this file and the target product this configuration file is valid for The three placeholders LastChangedDate Rev Author are inserted for inserting information automatically when utilizing versioning tools The text between the SPI CONFIGURATION METAINFO tag and the SPI CONFIGURATION SETTINGS tag is the setting description that has been entered when saving the SPI configuration file in the Explorer software All lines after the SPI CONFIGURATION SETTINGS tag and before the END tag are considered as persistent variables They are composed of the Wizard page name followed by the variable name and the configuration A B C D the variable belongs to After the colon as delimiter the ASCII representation of the variable value is suffixed Infineon Technologies Page 54 of 55 2011 03 11 q in fi neon TDA5240 35 25 Explorer Documentation File build with nextGen V2 37 File Parser V1 0 1 File generated by username Date 28 02 2011 18 27 02 Output generated by B12 Explorer build B12 6 51 for product TDA5240 LastChangedDate SRev SAuthor SPI CONFIGURATION METAINFO lt please enter a setting description SPI CONFIGURATION SETTINGS Wizard 4 Digital Receiving UnitOVSPLA 1 Wizard 4 Digital Receiving UnitDATARATEA 2000 Wizard 4 Digital Receiving UnitFDEVA 64 Wizard 4 Digital R
38. equency other than the default value all wizard pages need to be checked again 3 1 2 SIB System Interface Board Status Press the Open Button If the virtual LED 2 turns from red to green your board will be ready to use Communication with the chip is only possible when opening a sub board device sub board ID must not be BOARD A sub board can be identified by the sub board serial key The SIB connection procedure performs following operations Establishing a connection to the SIB server If the SIB server process is not started it will be started now If the SIB server start takes longer than the Explorer start or a SIB board has been connected after starting the Explorer you may have to refresh the device list by pressing the Refresh button The SIB hardware is verified If a wrong sub board is connected or an outdated SIB server plug in for the target device is installed the connection fails If you are sure about using the correct firmware please try to plug the sub board off and on to force a firmware update and press the Refresh button followed by the Open button again After the connection to the SIB hardware has been established successfully the message Device SIB2 MASTERBD SUBBOARD TDA52xx initialized will be displayed The chip variant is being verified and compared to the running Explorer variant If the chip variant does not match the running Explorer variant a correct operation is not guaranteed an
39. er an input variable of a calculation targets a register setting of another Wizard page a calculation will be initiated automatically active dependency Figure 6 shows the relationships between the pages Wizard_10 Figure 6 Active Dependencies of Wizard Pages Wizard_1 Wizard_2 To restore a configuration loading the register values of the TDA5240 35 25 is not enough Due to the fact that several calculation inputs have impact on a set of registers to summarize the complexity of the registers these inputs cannot be reproduced from the register values directly To guarantee exact restoring of the saved configuration such input variables are stored separately in the configuration file 5 2 as persistent variables for each configuration by appending A B C D to the variable name Beside numeric values e g data rate also textual values will be stored e g TSI pattern name in the configuration file Existing persistent variables are described in the chapter of the corresponding Wizard page Infineon Technologies Page 20 of 55 2011 03 11 q Cin fineon TDA5240 35 25 Explorer Documentation 3 2 1 Master Control Unit Y Explorer army SIB2 Register Q Wizard Registers Explore About N 5 E 2 B Subgroup Selection hi Master Control Unit De Q A Configuration Selection B Ghip control Port Pin Output Signal 2 Operating Mode Port Pin O Selection inv high p o Sleep Mode C Run Mode
40. erms and conditions of this agreement 4 Terminate this agreement at any time by destroying or returning the SOFTWARE and all copies You are not allowed to 1 Remove any copyright notices when installing or copying the SOFTWARE 2 Acquire ship transfer or export directly or indirectly the SOFTWARE or any product thereof into any country or in any manner prohibited by any applicable Export Control law or regulation 3 Incorporate the SOFTWARE into any other product you sell or distribute 4 Sublicense the SOFTWARE 5 Reverse engineer or decompile the SOFTWARE DISCLAIMER THE SOFTWARE IS FURNISHED AS IS WITHOUT WARRANTY OF ANY KIND INFINEON DISCLAIMS ALL OTHER WARRANTIES EITHER EXPRESS OR IMPLIED INCLUDING BUT NOT LIMITED TO IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE NEITHER INFINEON NOR ITS AFFILIATES SHALL BE LIABLE FOR ANY DAMAGES ARISING OUT OF THE USE OF OR INABILITY TO USE THE SOFTWARE INCLUDING DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR ANY SPECIAL INCIDENTAL INDIRECT OR CONSEQUENTIAL DAMAGES EVEN IF INFINEON HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES U S GOVERNMENT RESTRICTED RIGHTS The SOFTWARE is provided with RESTRICTED RIGHTS Use duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph c 1 ii of The Rights in Technical Data and Computer Software clause at 52 227 7013 and constitutes acknowledgment of INFINE
41. for the TDA5225 This page is not available in the TDA5225 Explorer Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B Infineon Technologies Page 38 of 55 2011 03 11 Cinfineon 3 2 8 Message ID TDA5240 35 25 Explorer Documentation Message ID Number Message 1 0 1 of Bytes To Scan Message 2 2 3 o C Message 3 4 5 Message 4 6 7 Message 5 8 9 Message 6 1011 Message 7 12413 Message 8 14415 Message 9 16 17 2 Byte Organized Message ID 4 Byte Organized Message ID p o we F Y Explorer Lo t SIB2 Register Q Wizard Registers Explore About 2 Subgroup Selection 8 Message ID Y Q A Configuration Selection a F Config A Config B Config C Config D 2 a Enable Message ID Screening ID Scan Start Position 0 o Message 10 18 19 o0 Chip Control siB2 LNZS0379 GRZ00002 10 Read FIFO Retesh Gose Updated y Read Registers Write Registers Crystal Oscillator MHz 21 342717 C ral slightly different t d Figure 16 Wizard Page 8 Message ID This Wizard tab allows you to configure e Message IDs with different Byte Organization modes For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet Dependencies This page does not have dependencies from other pages D
42. ge is updated to the settings of the new configuration selection Switching to another Wizard page retains the active configuration 5 Calculations which forces recalculations on other wizard pages than the active one are performed for the actual configuration only Some wizard pages offer interactive configuration support which will be described in detail for each page of the wizard These are features like automatic enabling disabling of controls in dependency of different operating mode appliance of limits calculations and dependency updates over multiple wizard pages In the following subsections for each Wizard page the available calculations and dependencies are explained in the associated paragraphs The data management of the Explorer configuration software is concentrated at the register grid on the Registers tab Individual Wizard pages communicate with the register grid to exchange register content Whenever the content of the register grid changes the affected controls will be automatically updated passive dependencies Note It is not recommended to apply manual changes on the Register Tab as these changes are not subject of input validation Otherwise inconsistent settings might be generated Beside this data exchange the necessity of reacting to the change of input variables of calculations is given These changes have impact on registers and the result of a calculation can have impact to registers on other Wizard pages Whenev
43. ifferences for the TDA5225 This page is not available in the TDA5225 Explorer Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B Infineon Technologies Page 39 of 55 2011 03 11 qa Cinfineon TDA5240 35 25 Explorer Documentation 3 2 9 Polling Timer Unit n Y Explorer 107 SIB2 Register Q Wizard Registers Explore About A 2 Subgroup Selection 9 Polling Timer Unit v Q A Configuration Selection a L Seff Polling Mode Selection 2 Constant On Off C Fast Fall Back to Sleep Mixed Mode C Permanent WU Search a Active ldle E F Enable Active Idle E Active Periods 5 ldle Periods 1 Wake Up Detection Config A Config B Config C Config D Timing config specific It Wake Up Count Bins pd Wake Up Pattern Sc Bits Ti SYNC ms tem n Data Criterion y 2 i i it 0000000000000000 z Ma in ni pme p Bus ion Ti i Timeout TSI E Wake Up Level Observation Time ms 0 3732 I7 Ini the Framer at Cycle Start in RMSP E Ims Channel 1 Channel 2 Channel 3 Enable Parallel Wake Up Mode Channel 1 Channel 1 rh Vv Ultrafast Fall Back to sleep or additional C Channel 2 Channel 1 2 Timeout EOM ms RSSI Threshold level Blocker Low Level Blocker High Level pis R Caa On OF C Channel 3 Channel1 2 3 m 50 b o zs H p tra fast fall back criteria RSSI Y Timing Continue with Self Polling Continue with next RF channel A Ti in S
44. ly in the configuration file e AUTOCONF Automatic configuration of AFC filter setting enable default is enabled e ST AFC filter settling time default is fast Differences for the TDA5225 The AFC and AGC start configuration cannot be set to Start on signal recognition event The AFC and AGC freeze modes Freeze on Signal Recognition Event and Freeze on Symbol Synchronization are not available for the TDA5225 Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B Infineon Technologies Page 43 of 55 2011 03 11 qa Cinfineon TDA5240 35 25 Explorer Documentation 3 3 Explore The Explore tab integrates basic functionality for interactive chip control In contrast to the Wizard pages a reasonable usage of the Explore page is possible with connected evaluation hardware only 3 3 1 Status r Y pes ea pis SIB2 Register Q Wizard Registers Explore About N 2 Subgroup Selection Status 10 A Configuration Selection F Power Readout Statistics General Chip Info Direct Register Control Extemal Processing j Readout o Force EOM Continuous readout ADC Result c ADC AFCOFFSET RSSIPMF RSSIRX ADC NPWR SPWR CIRSSIRX Ox Force TOTIM ADC Input Selection e KE RSSIPMF 100 409 o fo 0 0 0 0 0 RSSI S SPWR Average 5 Vw r1 M el Sa 7 J m m 7 p Manual Freeze C Temperature _AG
45. n Just enter the expected payload in the corresponding textbox in hexadecimal format and specify the number of bits of the incoming data If a data packet has been received it will be compared automatically and the result of the comparison is visualized by an increment of the Correctly received payload data counter on success Up to 512 incoming packets can be buffered by the Explorer software The packet history can be reviewed by selecting a packet in the received packets combo box Differences for the TDA5225 Signal and noise power readout is not possible with the TDA5225 Automatic payload processing is not available in the TDA5225 Explorer Differences for the TDA5235 There are no differences to the TDA5240 Explorer Infineon Technologies Page 46 of 55 2011 03 11 Infineon TDA5240 35 25 Explorer Documentation 3 4 Registers Tab lil Explorer e LX SIB2 Register 5 Wizard zx SFR A WUPATO oo e SFR_A_WUPATI 0019 0 00 rrrrrr 2 SFR A WUBCNT or o0 ILrTrrrrrr 3 2 SFR A WURSSITH1 op 0 TT T TT Tr TF zm SFR A WURSSIBL1 Qx01C pF VV Mw I SFR_A_WURSSIBH1 x01D DODOODODO SFR_A_WURSSITH2 Qx01E HOOoOoooo SFR_A_WURSSIBL2 Ox01F VMVM MM SFR_A_WURSSIBH2 020 ppmppnppmnmnpnrn SFR A WURSSITH3 x021 DODODODO SFR_A_WURSSIBL3 022 ivivivivivivie iv SFR A WURSSIBH3 003
46. n Unit Se Q A Configuration Selection a F Config A Config B Config C Config D o Name of the protocol 8 o 16 Bit TSI Mode 8 Bit Parallel TSI Mode 8 Bit Extended TSI Mode 8 Bit TSI Gap Mode gt End Of Message Control EOM by Code Violation IV EOM by Sync Loss IV EOM by Data Length TSI Length 1 to 32 chips 32 Wildcards for correlator A at the end of TSIA chips units 0000 pada Ante 01010101010101010101010101010101 chips units Data Length Limit 1 to 256 bits 256 Code Phase Readjustment in Payload Disabled defaut Y Enabled Pattem XX 1 XX XK 1 XX 01010101010101010101010101010101 I PAYLOAD I EOM TSI Gap Resync Mode Enabled eae default RSSI Detector Start up Delay 0 p Che Control SiB2 LNZS0379 GRZ00002 y Q Read FIFO Use Burst Mode Close O Updated Read Registers Write Registers 3 e Choose slightly different ead Registers Crystal Oscillator MHz 21 94877 r Crystal frequenc B B Figure 15 Wizard Page 7 Frame Synchronization Unit This Wizard tab allows you to configure the TSI modes e 16 Bit TSI Mode e 8 Bit Parallel TSI Mode e 8 Bit Extended TSI Mode e 8 Bit TSI Gap Mode For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet Dependencies This page does not have dependencies fr
47. n down to three possible settings 2 This easy mode is the recommended default mode for this unit If you want to configure the CDR manually the page mode can be changed from easy to advanced 1 The two extremes are e Fast For high data rate and duty cycle variations long gaps within the protocol e Slow For high accuracy in data rate and duty cycle at least 6 bit run in required Whenever you change to this page the actual settings are compared to the presets and if one of the presets matches the option box 2 is set to this preset This means if you change a CDR setting manually in the registers tab or in a SPI configuration file the corresponding preset will be detected automatically If no preset fits the actual setting the page mode changes from easy to advanced Persistent variables Beside the content of the registers affected by this page these inputs will be stored additionally in the configuration file e CV Maximum length of code violation within data packet default is 1 bit Differences for the TDA5225 This page is not available in the TDA5225 Explorer Differences for the TDA5235 The TDA5235 Explorer supports only 2 configurations A and B Infineon Technologies Page 35 of 55 2011 03 11 Cinfineon TDA5240 35 25 Explorer Documentation 3 2 7 Frame Synchronization Unit n E Explorer cnjns SIB2 Register E Wizard Registers Explore About D Subgroup Selection 7 Frame Synchronizatio
48. nd delimited by a colon lt address value gt The result of a batch write operation is shown in the SIB status box A direct register write access does also an update of the register grid in the Registers tab and this in succession initiates an update of all affected controls in the configuration interface Note Manual changes in the register list are allowed in principle but not subject of input validation therefore an inconsistent setting might be generated Run Section This group can be used to simulate a simple application case When starting the interrupt detection the correct NINT port pin will be configured from the actual configuration Press the switch to turn the interrupt detection on Whenever an interrupt is recognized by the interface board the counter Received interrupts increases and a readout of the interrupt status registers is done If at least one configuration indicates an end of message the FIFO of the TDA5240 35 is read and the payload peak value in the corresponding textbox is updated A successful read Infineon Technologies Page 45 of 55 2011 03 11 q Cinfineon TDA5240 35 25 Explorer Documentation FIFO operation is indicated by increasing the Processed messages counter The resulting data of the read FIFO operation is displayed in textbox as HEX string Ox and the same data is displayed as binary string Ob It is possible to compare the incoming data with a predefined payload patter
49. ng Violation Window Length 0x 23 Chip Control siB2 LNZS0379 GRZ00002 zl Q Read FIFO Use Burst Mode 2 Ref i ose Q Updated 3 Read Registers Write Registers 7 Crystal Oscilator MHz T5277 e dfe fed eaters pa o Figure 14 Wizard Page 6 Clock Data Recovery This Wizard tab allows you to configure e P Loop configuration e Loop Configuration e CDR Runin Dutycycle Data rate acceptance e Maximum number of code violations e Zero Tube Slicer For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet Infineon Technologies Page 34 of 55 2011 03 11 oo Cinfineon TDA5240 35 25 Explorer Documentation Dependencies This page does not have dependencies from other pages excepting the TSI settings of Wizard Page 7 Frame Synchronization Unit that influences the result of the timing violation window length register Calculations The time violation window length register value will be calculated according to the formula in the official datasheet Inputs of the calculation are the TSI mode existence of a gap the user input for the maximum length of a code violation within a data packet and the number of equal bits code violations at the end of the TSI pattern Interactivity For this page predefined easy settings exist that cover most of all common protocol scenarios so the complexity of the CDR configuration is broke
50. nit coito SIBI 40 320 cry rS S REDE 42 scc 44 Pw a a a 44 34 ACUISTA a E eas E LE AE 47 3 4 1 Register Selection Area Register Grid eeseseseeesssss 47 SLE e e 48 34 3 e ad 48 3 44 Find ReGISter A TOR oet nena anahateh nana ahah ath teh attt 51 A NN 52 AppendiX ii dada acia 53 AECA 53 5 2 SPI Configuration File Formal 54 Infineon Technologies Page 4 of 55 2011 03 11 Cinfineon ____ Introduction 1 Introduction The TDA5240 35 25 Explorer is used to configure the TDA5240 TDA5235 or the TDA5225 and to generate register settings The tool provides a wizard with a set of pages to configure the TDA5240 TDA5235 or the TDA5240 Each functional block of the TDA5240 35 25 is logically grouped together and represented in a separate dialog The tool allows the user to save all the changes made in the configuration and retrieve these changes later on 1 1 Hardware and Software Components For a fully functional system the following hardware components are required PC with Microsoft Windows Vista Microsoft Windows 7 32 bit or 64 bit vesion Microsoft Windows XP or Windows 2000 operating system Minimum graphical screen resolution 1024 x 768 Additionally the following software components are needed Microsoft Net Framework Version 2 or above Make sure it is installed on your computer correctly if it is not y
51. oduction 8 Setup will be completed by clicking the Finish button Completed the Infineon SIB 2 0 Server Setup Wizard Click the Finish button to exit the Setup Wizard Infineon Technologies Page 12 of 55 2011 03 11 qx Cinfineon TDA5240 35 25 Explorer Documentation 2 User Interface and Getting Started To start configuration utility choose the application loader executable NextGenLoader exe from the start menu Start gt Programs gt Infineon Technologies gt TDA5240 35 25 Explorer 6 XX X The loader pad offers a runtime environment for installed applications In the following description the TDA5240 35 25 B12 Explorer is described Please note that the TDA5235 Explorer contains just subset functionalities of the TDA5240 Explorer TDA5235 supports only 2 sets of configuration and only 1 RF channel per configuration while TDA5240 supports 4 sets of configuration and 3 RF channels per configuration Therefore the TDA5240 is mainly reflected in the following figures TDA5225 provides no digital baseband processing no Signal Recognition feature no CDR no Framer no Message ID only limited Self Polling features Differences to the TDA5225 and the TDA5235 are highlighted in the description of the configuration pages 2 1 Infineon Evaluation Software Startup Screen 9 E E J do x DA5225 B12 TDA5235 B12 TDA5240 B12 Explorer Explorer Figure 1 NEXTGENLOADER Close Button Minimize button
52. om other pages Infineon Technologies Page 36 of 55 2011 03 11 q Cinfineon TDA5240 35 25 Explorer Documentation Calculations For the 8 Bit TSI Gap Mode the value of the gap time register will be calculated from the entered time in units of bit The register can be configured manually by checking the override manually checkbox Interactivity The active TSI mode can be selected by switching to a tab page The selected tab page defines the active TSI mode The patterns for the different TSI modes are stored separately during run time Only data of the active TSI mode is saved in the configuration file see Registers tab That means that you can configure a TSI mode and then change pattern of another TSI mode without touching the configuration of the previous TSI mode even if the same register has been modified The configuration of a TSI mode page will be reloaded when you switch to the page If actually no configuration was done for the TSI mode page you selected so the page was never selected before the default register values will be used to fill the input controls The output field Pattern A B summarizes the entered TSI configuration and displays the expected TSI pattern Persistent variables Beside the content of the registers affected by this page these inputs will be stored additionally in the configuration file e PROTOCOL NAME Name of the protocol input field default is empty e PATTERN16 16 bit TSI mode pattern e
53. on Technologies Page 27 of 55 2011 03 11 q Cin fi neon TDA5240 35 25 Explorer Documentation 3 2 4 RF IF Frontend i Y Explorer Lo me SIB2 Register Q Wizard Registers Explore About A 2 3 2 Subgroup Selection la RF IF Frontend a Q gt Configuration Selection a Config A Config B Config C Config D OD rRF E amp IF Attenuation Config B Config C 5 Switch off RF path F Attenuation 5 6dB v IF Input Selection o 1IF Filter 2IF Filter Es o j J able IF Buffer y RSSI Pin 1 Pin 4 IV Enable buffer for RSSI pin Chip Control Status siB2 LNZS0379 GRZ00002 zig Read FIFO Use Burst Mode Close Updated Crystal Oscillator MHz 21 949717 Choose slightly diferent Read Registers Write Registers Crystal frequency Figure 11 Wizard Page 4 RF IF Frontend This Wizard tab allows you to configure e RF IF Front End e RSSI For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet Dependencies This page does not have dependencies from other pages excepting the single double conversion selection of Wizard Page 2 RF PLL that changes the available options for the IF attenuation setting If you change the conversion type you may have to adjust the IF attenuation manually afterwards Infineon Technologies Page 28 of 55 2011 03 11 m Cinfineon TDA5240 35 25 Explorer
54. ou can download it from http Wwww microsoft com downloads details aspx displaylangzde amp FamilyIDz0856 eacb 4362 4b0d 8edd aab15c5e04f5 Optional are the following software components Infineon SIB Server Package 1 2 Installation of Software Before installing the software please remove all previous versions of it It is recommended to uninstall the TDA5240 35 25 Explorer via the start menu link Uninstall Configuration Utility in the Infineon Technologies start menu group If uninstalling fails for some reason please try following options to remove the Windows Installer entry for the TDA5240 35 25 Explorer 1 Uninstall by using the Add Remove Programs function in the control panel 2 Use the Windows Install Clean Up tool This tool is provided by Microsoft and can be downloaded from their homepage for free Select the TDA5240 35 25 entry of the product list and press remove 3 If none of the proposed methods work please open the Windows registry regedit exe and navigate to the folder HKEY_CURRENT_USER Software Microsoft Installer Products Find the subfolder that contains the ProductKey TDA5240 35 25 Explorer and delete the folder Then remove the folder Infineon Technologies TDA Explorer in the program files folder of your system Please follow the sequence below to install the Software 4 Start your PC and Microsoft Windows 5 Execute the TDA5240 35 25 Explorer_B12 6 xx x exe inst
55. out of the registers shown within the Readout group box by checking the box Continuous readout Continuous readout is stopped by uncheck the box or when the interface board connection has been closed Power Readout Statistics This section provides statistical information on different selectable signal sources e g Signal and Noise Power SPWR NPWR All registers check marked in the list on the left side will be read By pressing the Read button the selected count of readings of the selected power readout registers are done and the average and standard deviation of the results are displayed readout may take some time This can be used for evaluation of threshold values For further information about using those results to configure the signal and noise detector refer official datasheet or refer to the application note for signal and noise detector threshold settings Direct Register Control In this area registers can be directly addressed You can either read or write a single register or you can enter a sequence of registers that should be written in one run To verify the success of a single register write operation change to the general chip info tab and press the Read Registers button in the Chip Control section The address and data tracer registers will display the recently written address and value Sequences for batch write operations consist of one or more lines of a register name followed by the register value a
56. proceed the installation ara Infineon Please take a moment to read the license agreement now If you accept the terms below dick I Accept then Next Otherwise dick Cancel Important Note and Terms of Use Please read the following important note as well as the following terms and conditions carefully The extraction of the downloaded documents as well as the installation of the downloaded software is only possible if you agree to such terms and conditions By clicking the acceptance button I agree below you agree to have read the important note set forth below and to be bound by the following terms of use If you do not agree to the terms and conditions below click the button I do not agree and the installation nrarceadiura will nat ha ctartad T Y I accept the terms in the License Agreement Came Confirm Installation Cinfineon Click Install to begin the installation Click Back to review or change any of your installation settings Click Cancel to exit the wizard Infineon Technologies Page 7 of 55 2011 03 11 Gnfineon Introduction 10 A progress bar indicates the setup progress now Notice If a User Account Control dialog appear press the Yes button to continue installation MES 5 in Finagh Please wait while the Setup installs TDA5240 35 25 Explorer Status 11 After the installation procedure has finish
57. ption Message 24 Messages received 24 Messages buffered Chip Control r Status SI82 LNZ50379 GRZ00002 zog Read FIFO Use Burst Mode Close Updated Hal le maa Wae Reges Crystal Oscillator MHz 213287177 inre rims erent Read Rester Wie Registers Ps Figure 23 Logging Logging information and warnings are displayed here Use the context menu of the NextGen Repository item in the tree view to change the warning level Infineon Technologies wishes you a successful start into the TDA5240 35 25 world of applications Infineon Technologies Page 52 of 55 2011 03 11 Cinfineon 5 Appendix 5 1 Register Patch List TDA5240 35 25 Explorer Documentation The Explorer configuration software is build for obtaining optimal settings for a widespread number of applications To start from a user friendly default state of the chip some registers are set immediately after the chip reset is done when opening the SIB2 connection In the default save mode these patched registers will be saved in the SPI configuration file only if they are required for the saved configuration e g if configuration B is not active in the actual setting a patched register for a register in configuration B will not be written If a patched register is modified during creation of a configuration and the new register value is equal to the default value of the chip no write command for this register will be generated
58. put signal can be optimized for minimal jitter In this case a data rate oversampling factor can be set on wizard page 5 i Explorer Ar SIB2 Register Q Wizard Registers Explore About N iD gt Subgroup Selection 1 Master Control Uni QO A _ Configuration Selection lt B chip control Port Pin Output Signal Operating Mode Port Pin 0 Selection inv high p o Sleep Mode C Run Mode Slave C Self Polling Mode LOW dd E E E pps Port Pin 1 Selection inv high p EE ME CA EA DATA Jj E E ti 3 5 z lo Configuration 4 B z AB Port Pin 2 Selection inv high p Selection c A B C NINT v m m CD C A B C D ere S E Port Pin 3 Selection inv high p Init PLL after coming from HOLD EAEI JEE E Lock Data FIFO E Init of FIFO at v Init of FIFO at M Fr Zo Ore stat tame Stat Enable SDO High Power Pad Config A Modulation Run Mode Slave Self Polling Mode Wake Up RunMode I ASK ASK ASK G FSK FSK FSK e ASK FSK ASK Corio A Cc FSK ASK FSK RX RUN Configuration Enable Interrupt at signal NINT V Active Level on PPO for Conf A v Q A Wake Up External Data C No deactivation of functional blocks IV Active Level on PP1 for Conf A F O NE Processing Chip Data RX Mode TMCDS IV Active Level on PP2for Conf A Data MF RX Mode TMMF TMRDS V Active Level on PP3for Conf A V O A Message ID Found Performance Optimal for highest sensitivity at
59. register values Calculating the peak memory filter is supported in two directions You can either enter the desired attack and decay time in dimensions of bit or you can select the attack and decay factor When auto configuring is enabled entering a time will configure the proper factor in respect of the actual data rate The best factor will be chosen although the entered time may not fit the calculated factor ideally Only the value for the attack and decay factor is saved and not the value of the attack and decay time Therefore whenever this wizard page is opened again the values for the attack and decay time will be back calculated This may cause slightly different time values than you have entered before Interactivity The input fields for the configuration of the signal and noise detector will be enabled or disabled in dependency of the selected signal and noise detector mode Settings not needed for configuring the selected mode will be disabled and are not accessible The raw data slicer group box is displayed only if at least one of the port pins is set to the output signal DATA The anti aliasing filter can be configured only if automatic filter configuration is disabled and the anti aliasing filter is not bypassed for the RSSI pin Infineon Technologies Page 31 of 55 2011 03 11 a Cinfineon TDA5240 35 25 Explorer Documentation If the actual filter and data rate setting does not follow the Carson bandwidth rule an alert me
60. registers the color of the LED changes to green If the color of the LED is dark grey a connection Infineon Technologies Page 17 of 55 2011 03 11 m Cinfineon TDA5240 35 25 Explorer Documentation to the evaluation hardware is not yet established The default download mode for writing registers uses the SPI burst command All differences of registers between the user interface and the chip are grouped block wise and a SPI burst command is executed for each block separately If an initial switch to the sleep hold mode is necessary a separate standard SPI write command is used You can force the usage of standard SPI write commands for all registers by un checking the Use Burst Mode checkbox The content of read only registers can be updated by pressing the Read Registers button All controls in the configuration user interface that represents the content of a read only register will be updated automatically and the register list in the Registers tab will be set to the new values Important e Only read only registers are affected you cannot perform read operations on writeable register To perform FIFO readout on trial the Read FIFO button can be used The actual FIFO content is read and will be displayed in the SIB status box For a more detailed evaluation it is recommended to use the Run section of the Explore page Infineon Technologies Page 18 of 55 2011 03 11 enini Cinfineon TDA5240 35 25 Explorer Document
61. ring the desired frequency in one of the textboxes for up to three channels The results are displayed on the Registers tab at the corresponding registers Consider that all active channels must be set to a frequency within the same frequency band If this is not the case the application will indicate it with the Out of band LED Switching the sideband or conversion selection also initiates a recalculation of the RF settings The input frequency is compared to the selected sideband and a warning message will be displayed next to the frequency input textbox if the optimal sideband is not chosen Certain EMI frequencies can have negative influence to sensitivity So there are additional input fields for entering known frequencies of your system to check their influence A warning message gets displayed in such a case Calculation formulas for this case are given in the Register Value Calculation Addendum to the Data sheet The warning message For a proper function of AFC it is recommended to change the LO injection side or to use a smaller AFC limit value appears in case the AFC would possibly need to change the Integer value of the LO multiplication factor Therefore the warning gives possible solutions for this case Interactivity Some input fields for the frequency are hidden if they are not needed in the actual configuration If you enter an input frequency the band selection is set automatically but only when all active
62. s Page 41 of 55 2011 03 11 q Cinfineon TDA5240 35 25 Explorer Documentation 3 2 10 AGC AFC al en ele Es SIB2 Register Q Wizard Registers Explore About N lt gt Subgroup Selection 10 AGC AFC A z Configuration Selection Q H Config A 2 9 AFC Automatic Frequency Control AGC Automatic Gain Control 8 AFC Offset Readout V Auto Configure Fiter Start Configuration TEETER deu Settling time Fast X OFF ba a H Start Configuration Freeze Configuration r Eee Poet a Charnel se Direct ON K1 K2 ratio o Stay ON gt commen ing Freeze Configuration Config Specific Setting Stay ON X Integrator 1 Gain Coefficient Digital RSSI Gain Correction Threshold Offset o EM 155 dB gt 63508 Frea Offset Saturation Limit epa Gal Coat Gain Control MDQ IF2 Gain Readout 42 87 kHz X e n Automatic zi j0dB 048 y Threshold Hysteresis Threshold Low Enable AFC bl Enable Restart at Channel em L B able locking le art at during a low phase in the Change in Sef Polling Threshold Up ASK signal Mode 0 For a proper functionof AFC itis recommended to change the LO injection side orto use a smaller AFC limit value Press the Write Registers button to download your configuration Chip Control r SIB2 LNZS0268 GRZ20030 1 Read FIFO Y Use Burst Mode gt R Re Close Q Updated some PeR Reose Crystal Oscillator MHz 2348717 peer
63. ssage ID Found urs erm Check for active high MO AEnd of Message RX Mode TMMF TMRDS uncheck for active low External Data No Processing Chip C Data Chi Control S1B2 LNZS0379 GRZ00002 a A Im tre Open Updated Crystal Oscillator MHz 21 348717 ere slightly different 4 Figure 5 General Control 3 Navigation buttons Subgroup selection Next button Configuration selection Uo uw qu oc Active configuration Infineon Technologies Page 19 of 55 2011 03 11 oo Cinfineon TDA5240 35 25 Explorer Documentation Navigating thru the wizard can be done by 3 different ways 1 Direct access by selecting the subgroup in the drop down menu 2 2 Browsing forward and backward by pressing the navigation buttons 7 3 Pressing the Next button 3 this option is recommended when creating a configuration for the first time as input values of following wizard pages can depend on values from previous pages The TDA5240 35 25 has a multi configuration capability Some register settings describe the same functions but they take effect only if the configuration they belong to becomes active In the Wizard pages all configuration dependent settings are framed by a configuration selection tab The tab header changes in dependency of the active configurations Whenever you change the active page of the tab 4 the content of the tab pa
64. ssage box pops up Persistent variables Beside the content of the registers affected by this page these inputs will be stored additionally in the configuration file e CHIPSPERBIT Chips per bit selection below the data rate input field default is 2 chip bit e AUTOCONF Activation of auto filter configuration default is activated e FDEV Expected max FSK deviation default is 64 kHz e FDEVMIN Expected min FSK deviation default is 10 kHz e DATARATE Data rate input default is 2000 bit s e Wizard 4 Digital Receiving UnitAUTOCONF Automatic configuration of filters in the analog and digital frontend default is enabled e Wizard 5 RF IF FrontendAUTOCONF Automatic configuration of peak memory filter attack and decay time default is enabled e AUTOCONF SLICER Automatic configuration of the RAW data slicer default is enabled e STIME Settling time of RAW data slicer default is 15 bit Differences for the TDA5225 For the TDA5225 Explorer the signal and noise detector settings are not available The AFC start configuration cannot be set to Start on signal recognition event No decoder can be configured for the TDA5225 The digital receiver calculations differ from the calculations used by the TDA5240 Explorer On selecting minimal jitter option for DATA output on wizard page 1 an oversampling of the datarate can be activated for the internal data processing virtually higher datarate Please use the information
65. ter that was modified by this calculation Infineon Technologies Page 51 of 55 2011 03 11 Cinfineon TDA5240 35 25 Explorer Documentation 4 Logging Y po leal at SIB2 Register Q ig id 4a X Clear Messages 11 Pause Scrolling id Stop D a NextGen Repository ALL Time Logger Message X a WW 09 48 46 8475 Meter Controller SFR ADCRESH 0x00AE lt 0x00 E WW 09 48 46 8631 Meter Controller SFR ADCRESL 0x00AF lt 0x00 o Wi 09 48 46 8787 Meter Controller SFR VACRES 0x00B0 lt 0x00 W 09 48 46 8943 Meter_Controller SFR_AFCOFFSET 0x00B1 lt 0x00 3 i 09 48 46 9099 Meter_Controller SFR_AGCGAINR 0x00B2 lt 0x00 A I 4 09 48 46 9255 Meter Controller SFR SPIAT 0x00B3 0x4E Ai 09 48 46 941 1 Meter Controller SFR SPIDT 0x00B4 lt 0x01 WW 09 48 46 9567 Meter Controller SFR SPICHKSUM 0x00BS lt 0x00 1 09 48 46 9879 Meter Controller SFR SNO 0x00B6 lt 0x63 WW 09 48 47 0035 Meter Controller SFR SN1 0x00B7 0xA9 09 48 47 0191 Meter Controller SFR SN2 0x00B8 0x0D E WW 09 48 47 0347 Meter Controller SFR SN3 0x00B9 lt 0x00 4 09 48 47 0503 Meter Controller SFR RSSIRX 0x00BA lt 0x00 Ki 09 48 47 0659 Meter Controller SFR RSSIPMF 0x00BB 0x00 09 48 47 081 5 Meter Controller SFR SPWR 0x00BC 0x00 Wi 09 48 47 0971 Meter Controller SFR NPWR 0x00BD 0x00 i 09 48 47 0971 Meter Controller 23 registers read Message Details Level Time Logger Thread Exce
66. ust be side thus the crystal frequency must be shifted by 9 332 kHz shifted by 2 222 kHz c Receive Frequency Channel 1 2 3 Channel 3 MHz 319 999997 Spur mixed with 1x LO cannot be eliminated by thei side thus the crystal frequency must be shifted by 2 344 kHz Double Conversion g Single Conversion 10 7 MHz 274 kHz 274 kHz MEHR gud Fora proper functionof AFC itis recommended to change the s LO injection side orto use a smaller AFC limit value LO RF LO RF IF1 IF1 Chip Control Status siB2 LNZS0379 GRZ00002 Read FIFO Use Burst Mode o i Read Registers Write Regist Crystal Oscillator MHz 21548717 em mL sen Figure 9 Wizard Page 2 RF PLL This Wizard tab allows you to configure e RF PLL channels e Conversion Mode and LO injection side For information beyond the quick help tooltip moving the mouse pointer on a selected item refer to the official datasheet Dependencies This page does not have direct dependencies from other pages excepting the visibility of channels the operating mode selection has impact on the number of active channels The calculation of the polling period on Wizard Page 9 Polling Timer Unit is depending on number of active channels and is also depending on the selected self polling mode Infineon Technologies Page 24 of 55 2011 03 11 oo Cinfineon TDA5240 35 25 Explorer Documentation Calculations This page allows you to configure the SD PLL just by ente
67. wo dimensional constant field containing pairs of register names and values Using an appropriate SFR header file is necessary to define the register addresses The Explorer can generate this header file automatically press the Save Mapping File button on the Registers page The generated file contains meta information needed by the Explorer to read back the settings Infineon Technologies Page 49 of 55 2011 03 11 Cinfineon TDA5240 35 25 Explorer Documentation a Open Organize v Ft Favorites Libraries Computer E Network Os Ji projects TDAS240 ready y 4 New folder Name 2 TDA5240 spi def p Search ready v m0 Date modified Type 26 04 2010 09 49 Export Defin m File name TDA5240_spi def SPI def i def _spi def Config Address Data txt Infineon Technologies C Header File h emm Ske Figure 21 Types of Configuration Files Page 50 of 55 2011 03 11 Infineon TDA5240 35 25 Explorer Documentation 3 44 Find Register Area n ES lil explorer an SIB2 Register Q Wizard Registers Explore About En i 7 6 51 41 3 2 110 m Register Map SPI File Control lt SFR_A_PLLFRACOCI acd PORRA y E sea sure AAA Cm xls 2 SFR A PLLFRAC2C1 aoc wF TPP hhh
68. ype dropdown box Enter a filename or select a file in the pane above to open or save a configuration It is allowed to open configuration files created for other product versions The TDA5240 Explorer is capable of loading TDA5235 and TDA5225 configurations The TDA5225 and TDA5235 Explorer variants can load other configuration files but if a register is set in a configuration that is not available in another Explorer variant this register will be ignored and a warning message informs about this It is recommended to review the settings when loading a configuration build for a different product These types of configuration files are supported e _spi def Standard TDA5240 35 25 configuration file format This is the default output of the TDA5240 35 25 The register settings are saved using an address independent format A sample SPI configuration file can be found in the appendix The output does not generate page switches explicitly a page switch is implicitly coded by using register names The Explorer software generates page switches automatically when downloading If the SPI configuration is used in custom software you have to ensure the correct insertion of page switches e txt Configuration Address Data Write commands and addresses are converted to the corresponding hexadecimal values Whenever a page switch is necessary the write command including the new page value for the switch are inserted e C Header File Generates a t

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